From 0b54a9dd09b8a06a1923c3f62f940626b062ccf7 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 10 Jun 2015 15:50:57 +0530 Subject: zynqmp: Define ep config for ZynqMP Define a new config "zynqmp_ep" for ZynqMP instead of xilinx_zynqmp. This defconfig supports all emulation platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP to ARCH_ZYNQMP. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 8 -------- include/configs/xilinx_zynqmp_ep.h | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 8 deletions(-) create mode 100644 include/configs/xilinx_zynqmp_ep.h (limited to 'include') diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ad82ed62890..e1f287b917c 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -53,7 +53,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x400000) /* Serial setup */ -#define CONFIG_ZYNQ_SERIAL_UART0 #define CONFIG_ZYNQ_SERIAL #define CONFIG_CONS_INDEX 0 @@ -61,8 +60,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_ZYNQ_SDHCI0 - /* Command line configuration */ #define CONFIG_CMD_ENV #define CONFIG_CMD_EXT2 @@ -127,9 +124,6 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 -#define CONFIG_ZYNQ_I2C0 -#define CONFIG_SYS_I2C_ZYNQ - /* I2C */ #if defined(CONFIG_SYS_I2C_ZYNQ) # define CONFIG_CMD_I2C @@ -138,8 +132,6 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 #endif -#define CONFIG_ZYNQMP_EEPROM - /* EEPROM */ #ifdef CONFIG_ZYNQMP_EEPROM # define CONFIG_CMD_EEPROM diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h new file mode 100644 index 00000000000..40a110dab2f --- /dev/null +++ b/include/configs/xilinx_zynqmp_ep.h @@ -0,0 +1,26 @@ +/* + * Configuration for Xilinx ZynqMP emulation + * platforms. See zynqmp-common.h for ZynqMP + * common configs + * + * (C) Copyright 2014 - 2015 Xilinx, Inc. + * Michal Simek + * Siva Durga Prasad Paladugu + * + * Based on Configuration for Versatile Express + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQMP_EP_H +#define __CONFIG_ZYNQMP_EP_H + +#define CONFIG_ZYNQ_SERIAL_UART0 +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_I2C0 +#define CONFIG_SYS_I2C_ZYNQ +#define CONFIG_ZYNQ_EEPROM + +#include + +#endif /* __CONFIG_ZYNQMP_EP_H */ -- cgit v1.3.1 From f994bdfe13c0565193782116515449f0711ab074 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 10 Jun 2015 15:50:58 +0530 Subject: Kconfig: zynqmp: Move CONFIG_SYS_TEXT_BASE to defconfig Move CONFIG_SYS_TEXT_BASE of ZynqMP_ep to its respective defconfig Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- Kconfig | 2 +- configs/xilinx_zynqmp_ep_defconfig | 1 + include/configs/xilinx_zynqmp.h | 1 - 3 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/Kconfig b/Kconfig index 15e15af5b3c..fc69189217a 100644 --- a/Kconfig +++ b/Kconfig @@ -178,7 +178,7 @@ config SYS_EXTRA_OPTIONS new boards should not use this option. config SYS_TEXT_BASE - depends on SPARC || ARC || X86 || ARCH_UNIPHIER + depends on SPARC || ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP hex "Text Base" help TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index cbed891a5fa..fda44eaee04 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -15,3 +15,4 @@ CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep" # CONFIG_CMD_NFS is not set CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y +CONFIG_SYS_TEXT_BASE=0x8000000 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e1f287b917c..fbd68f71286 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -40,7 +40,6 @@ #define CONFIG_IDENT_STRING " Xilinx ZynqMP" -#define CONFIG_SYS_TEXT_BASE 0x8000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) /* Flat Device Tree Definitions */ -- cgit v1.3.1 From b0d18beedb83cebd9290a27794da93cdea3529c5 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 10 Jun 2015 15:50:59 +0530 Subject: zynqmp: Provide option to enable uart dcc support for zynqmp Provide option to enable uart dcc support for zynqmp This config can be enabled as per board config file. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index fbd68f71286..8cb276ca709 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -52,7 +52,14 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x400000) /* Serial setup */ -#define CONFIG_ZYNQ_SERIAL +#if defined(CONFIG_ZYNQMP_DCC) +# define CONFIG_ARM_DCC +# define CONFIG_CPU_ARMV8 +#else +# if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) +# define CONFIG_ZYNQ_SERIAL +# endif +#endif #define CONFIG_CONS_INDEX 0 #define CONFIG_BAUDRATE 115200 -- cgit v1.3.1 From 6d6e3dbefe1a518bc8fb6a23808770568ff4c125 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Jul 2015 11:39:04 +0200 Subject: ARM: zynq: Add support for zc770-xm011 Add xm011 DTS file and related configs and configurations. Signed-off-by: Michal Simek --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynq-zc770-xm011.dts | 65 ++++++++++++++++++++++++++++++++++++++ configs/zynq_zc770_xm011_defconfig | 13 ++++++++ include/configs/zynq_zc770.h | 3 ++ 4 files changed, 82 insertions(+) create mode 100644 arch/arm/dts/zynq-zc770-xm011.dts create mode 100644 configs/zynq_zc770_xm011_defconfig (limited to 'include') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8ebd6934320..06fbd8b0af2 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \ zynq-microzed.dtb \ zynq-picozed.dtb \ zynq-zc770-xm010.dtb \ + zynq-zc770-xm011.dtb \ zynq-zc770-xm012.dtb \ zynq-zc770-xm013.dtb dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts new file mode 100644 index 00000000000..d38c8201353 --- /dev/null +++ b/arch/arm/dts/zynq-zc770-xm011.dts @@ -0,0 +1,65 @@ +/* + * Xilinx ZC770 XM013 board DTS + * + * Copyright (C) 2013 Xilinx, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/dts-v1/; +#include "zynq-7000.dtsi" +/ { + compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000"; + model = "Xilinx Zynq"; + + aliases { + i2c0 = &i2c1; + serial0 = &uart1; + spi0 = &spi0; + }; + + chosen { + bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk"; + linux,stdout-path = &uart1; + stdout-path = &uart1; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; + + usb_phy1: phy1 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; + +&spi0 { + status = "okay"; + num-cs = <4>; + is-decoded-cs = <0>; +}; + +&can0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; + + m24c02_eeprom@52 { + compatible = "at,24c02"; + reg = <0x52>; + }; +}; + +&uart1 { + status = "okay"; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy1>; +}; diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig new file mode 100644 index 00000000000..8f9221db85e --- /dev/null +++ b/configs/zynq_zc770_xm011_defconfig @@ -0,0 +1,13 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQ=y +CONFIG_TARGET_ZYNQ_ZC770=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011" +# CONFIG_SYS_MALLOC_F is not set +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011" +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_SETEXPR is not set diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 16b904743f1..7a1b8729e5b 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,9 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM011) +# define CONFIG_ZYNQ_SERIAL_UART1 + #elif defined(CONFIG_ZC770_XM012) # define CONFIG_ZYNQ_SERIAL_UART1 # undef CONFIG_SYS_NO_FLASH -- cgit v1.3.1 From cb7ea82059069c6509c26b1f705982c6a919a3fe Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 23 Jul 2015 12:03:55 +0200 Subject: ARM: zynqmp: Wire up ethernet controllers Wire up ethernet controllers and enable MII and BOOTP options. Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynqmp/hardware.h | 5 +++++ arch/arm/include/asm/arch-zynqmp/sys_proto.h | 5 +++++ board/xilinx/zynqmp/zynqmp.c | 25 +++++++++++++++++++++++++ include/configs/xilinx_zynqmp.h | 21 +++++++++++++++++++++ 4 files changed, 56 insertions(+) (limited to 'include') diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 15bd519bfbe..5d191e848cc 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -11,6 +11,11 @@ #define ZYNQ_SERIAL_BASEADDR0 0xFF000000 #define ZYNQ_SERIAL_BASEADDR1 0xFF001000 +#define ZYNQ_GEM_BASEADDR0 0xFF0B0000 +#define ZYNQ_GEM_BASEADDR1 0xFF0C0000 +#define ZYNQ_GEM_BASEADDR2 0xFF0D0000 +#define ZYNQ_GEM_BASEADDR3 0xFF0E0000 + #define ZYNQ_SPI_BASEADDR0 0xFF040000 #define ZYNQ_SPI_BASEADDR1 0xFF050000 diff --git a/arch/arm/include/asm/arch-zynqmp/sys_proto.h b/arch/arm/include/asm/arch-zynqmp/sys_proto.h index 3ca15cb6e58..f5c90d11dc4 100644 --- a/arch/arm/include/asm/arch-zynqmp/sys_proto.h +++ b/arch/arm/include/asm/arch-zynqmp/sys_proto.h @@ -8,6 +8,11 @@ #ifndef _ASM_ARCH_SYS_PROTO_H #define _ASM_ARCH_SYS_PROTO_H +/* Setup clk for network */ +static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate) +{ +} + int zynq_sdhci_init(unsigned long regbase); int zynq_slcr_get_mio_pin_status(const char *periph); diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index f5ff64d988e..fb43cb0b9aa 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -51,6 +51,31 @@ void reset_cpu(ulong addr) { } +int board_eth_init(bd_t *bis) +{ + u32 ret = 0; + +#if defined(CONFIG_ZYNQ_GEM) +# if defined(CONFIG_ZYNQ_GEM0) + ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0, + CONFIG_ZYNQ_GEM_PHY_ADDR0, 0); +# endif +# if defined(CONFIG_ZYNQ_GEM1) + ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1, + CONFIG_ZYNQ_GEM_PHY_ADDR1, 0); +# endif +# if defined(CONFIG_ZYNQ_GEM2) + ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR2, + CONFIG_ZYNQ_GEM_PHY_ADDR2, 0); +# endif +# if defined(CONFIG_ZYNQ_GEM3) + ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR3, + CONFIG_ZYNQ_GEM_PHY_ADDR3, 0); +# endif +#endif + return ret; +} + #ifdef CONFIG_CMD_MMC int board_mmc_init(bd_t *bd) { diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 8cb276ca709..9ed8771ff50 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -76,6 +76,16 @@ #define CONFIG_CMD_ELF #define CONFIG_MP +#define CONFIG_CMD_MII + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_MAY_FAIL +#define CONFIG_BOOTP_SERVERIP + /* SPI */ #ifdef CONFIG_ZYNQ_SPI # define CONFIG_SPI_FLASH_SST @@ -130,6 +140,17 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 +/* Ethernet driver */ +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) || \ + defined(CONFIG_ZYNQ_GEM2) || defined(CONFIG_ZYNQ_GEM3) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif + /* I2C */ #if defined(CONFIG_SYS_I2C_ZYNQ) # define CONFIG_CMD_I2C -- cgit v1.3.1 From 6fe6f1350990c28d3675392cc273cb3df8c31389 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 23 Jul 2015 13:27:40 +0200 Subject: ARM: zynqmp: Wire up SATA for the board Enable SATA for the ZynqMP targets. Signed-off-by: Michal Simek --- arch/arm/include/asm/arch-zynqmp/hardware.h | 2 ++ board/xilinx/zynqmp/zynqmp.c | 10 ++++++++++ include/configs/xilinx_zynqmp.h | 11 +++++++++++ include/configs/xilinx_zynqmp_ep.h | 1 + 4 files changed, 24 insertions(+) (limited to 'include') diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 5d191e848cc..7640eabad13 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -25,6 +25,8 @@ #define ZYNQ_SDHCI_BASEADDR0 0xFF160000 #define ZYNQ_SDHCI_BASEADDR1 0xFF170000 +#define ZYNQMP_SATA_BASEADDR 0xFD0C0000 + #define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000 #define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000 diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index fb43cb0b9aa..88fe3e844f5 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -7,6 +7,8 @@ #include #include +#include +#include #include #include #include @@ -51,6 +53,14 @@ void reset_cpu(ulong addr) { } +#ifdef CONFIG_SCSI_AHCI_PLAT +void scsi_init(void) +{ + ahci_init((void __iomem *)ZYNQMP_SATA_BASEADDR); + scsi_scan(1); +} +#endif + int board_eth_init(bd_t *bis) { u32 ret = 0; diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 9ed8771ff50..68853b64de5 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -169,6 +169,17 @@ # define CONFIG_SYS_EEPROM_SIZE (64 * 1024) #endif +#ifdef CONFIG_AHCI +#define CONFIG_LIBATA +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_CMD_SCSI +#endif + #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index 40a110dab2f..c872f7ce8aa 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -20,6 +20,7 @@ #define CONFIG_ZYNQ_I2C0 #define CONFIG_SYS_I2C_ZYNQ #define CONFIG_ZYNQ_EEPROM +#define CONFIG_AHCI #include -- cgit v1.3.1