From fc520894d426aae5dc0b87aa012520fc18231e1e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 18 Oct 2014 03:52:36 +0200 Subject: arm: socfpga: Move code from misc_init_r() to arch_early_init_r() Move this initialization code to proper place. The misc_init_r() function is called way too late and the platform initialization code should be executed much earlier. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Albert Aribaud Acked-by: Pavel Machek --- include/configs/socfpga_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 49504dcafbc..69527985e28 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -22,7 +22,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_MISC_INIT_R +#define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_SYS_NO_FLASH #define CONFIG_CLOCKS -- cgit v1.3.1 From 34584d190db5cfc879dea71ba345d15fe8bf348b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 16 Oct 2014 12:25:40 +0200 Subject: arm: socfpga: Zap spl.h and ad-hoc related syms Switch to the common spl.h file and zap the arch/spl.h . Since the arch/spl.h contained various ad-hoc symbols, zap those symbols as well and rework the board configuration a little so it doesn't depend on them. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Albert Aribaud Acked-by: Pavel Machek --- arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 9 --------- arch/arm/include/asm/arch-socfpga/spl.h | 15 --------------- arch/arm/include/asm/spl.h | 2 +- include/configs/socfpga_common.h | 17 +++++++++++------ 4 files changed, 12 insertions(+), 31 deletions(-) delete mode 100644 arch/arm/include/asm/arch-socfpga/spl.h (limited to 'include') diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds index db9bdad7d6c..569fa418f46 100644 --- a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds +++ b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds @@ -42,13 +42,4 @@ SECTIONS . = ALIGN(4); __bss_end = .; } >.sdram - - . = ALIGN(8); - __malloc_start = .; - . = . + CONFIG_SPL_MALLOC_SIZE; - __malloc_end = .; - - . = . + CONFIG_SPL_STACK_SIZE; - . = ALIGN(8); - __stack_start = .; } diff --git a/arch/arm/include/asm/arch-socfpga/spl.h b/arch/arm/include/asm/arch-socfpga/spl.h deleted file mode 100644 index 7e310d5a0c9..00000000000 --- a/arch/arm/include/asm/arch-socfpga/spl.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (C) 2012 Pavel Machek - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _SOCFPGA_SPL_H_ -#define _SOCFPGA_SPL_H_ - -/* Symbols from linker script */ -extern char __malloc_start, __malloc_end, __stack_start; - -#define BOOT_DEVICE_RAM 1 - -#endif diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index e5daf891271..8acd7cd1bd5 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -7,7 +7,7 @@ #ifndef _ASM_SPL_H_ #define _ASM_SPL_H_ -#if defined(CONFIG_OMAP) || defined(CONFIG_SOCFPGA) \ +#if defined(CONFIG_OMAP) \ || defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \ || defined(CONFIG_EXYNOS4210) /* Platform-specific defines */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 69527985e28..ef3572b73b7 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -167,16 +167,21 @@ /* * SPL + * + * SRAM Memory layout: + * + * 0xFFFF_0000 ...... Start of SRAM + * 0xFFFF_xxxx ...... Top of stack (grows down) + * 0xFFFF_yyyy ...... Malloc area + * 0xFFFF_zzzz ...... Global Data + * 0xFFFF_FF00 ...... End of SRAM */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_RAM_DEVICE -#define CONFIG_SPL_TEXT_BASE 0xFFFF0000 -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SPL_STACK_SIZE (4 * 1024) -#define CONFIG_SPL_MALLOC_SIZE (5 * 1024) /* FIXME */ -#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start)) -#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start) +#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR +#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024) #define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */ #define CONFIG_CRC32_VERIFY -- cgit v1.3.1 From a22a584c1f7c3fafe58be28705d7fa85ec54571c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 22 Oct 2014 19:57:42 +0200 Subject: arm: socfpga: Zap CONFIG_EPHY[01]_PHY_ADDR macro This is not used anywhere, remove it. Signed-off-by: Marek Vasut Cc: Chin Liang See Acked-by: Dinh Nguyen Cc: Vince Bridgers Cc: Albert Aribaud Cc: Pavel Machek --- include/configs/socfpga_cyclone5.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 60d7e20e83b..942738c138b 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -55,10 +55,8 @@ #if defined(CONFIG_CMD_NET) #define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS #define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII -#define CONFIG_EPHY0_PHY_ADDR 0 /* PHY */ -#define CONFIG_EPHY1_PHY_ADDR 4 #define CONFIG_PHY_MICREL #define CONFIG_PHY_MICREL_KSZ9021 #define CONFIG_KSZ9021_CLK_SKEW_ENV "micrel-ksz9021-clk-skew" -- cgit v1.3.1 From 20cadbbe2e0425783855f6ae90ef82aa0db63155 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Oct 2014 23:34:25 +0200 Subject: arm: socfpga: config: Add USB support example Add example configuration stub for the DWC2 USB controller. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Vince Bridgers Cc: Pavel Machek --- include/configs/socfpga_common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index ef3572b73b7..83a1bcdfbe3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -156,6 +156,21 @@ #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 +/* + * USB + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_DWC2 +#define CONFIG_USB_STORAGE +/* + * NOTE: User must define either of the following to select which + * of the two USB controllers available on SoCFPGA to use. + * The DWC2 driver doesn't support multiple USB controllers. + * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB0_ADDRESS + * #define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS + */ +#endif + /* * U-Boot environment */ -- cgit v1.3.1