From 46fc271b646c5e755746d348c58e380ce02122e2 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Wed, 29 Jan 2025 11:43:33 +0100 Subject: rockchip: px30: add fdtoverlay_addr_r default value to support FDTO In order to be able to use Device Tree Overlays, the fdtoverlay_addr_r needs to be specified. Follow what's been done for other Rockchip SoCs and leave 1MiB for the base DTB before the address for the overlay. Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang --- include/configs/px30_common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 13ed9011764..d0539003fd5 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -20,6 +20,7 @@ "scriptaddr=0x00500000\0" \ "pxefile_addr_r=0x00600000\0" \ "fdt_addr_r=0x08300000\0" \ + "fdtoverlay_addr_r=0x08400000\0" \ "kernel_addr_r=0x00280000\0" \ "ramdisk_addr_r=0x0a200000\0" \ "kernel_comp_addr_r=0x03e80000\0" \ -- cgit v1.3.1 From f88364d5d99da2b95f06a114eef9c852a5a3b8ee Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 6 Apr 2025 00:24:23 +0000 Subject: rockchip: Remove partitions env variable for RK356x The partitions env variable is using an outdated partition layout that is typically expected to be used with older vendor miniloader blobs. Rockchip devices will run fine using any partition layout if the first 16 MiB of MMC storage is ignored/skipped. Remove the partitions env variable to stop encourage users a continued use of this outdated partition layout on RK356x devices. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- include/configs/rk3568_common.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 09b7b71c6af..a68ca381db5 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -29,7 +29,6 @@ #define CFG_EXTRA_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -- cgit v1.3.1 From 4c8a2564b28e12218cb130ee9e500f408cba2d4f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 6 Apr 2025 00:24:24 +0000 Subject: rockchip: Remove partitions env variable for RK3588 The partitions env variable is using an outdated partition layout that is typically expected to be used with older vendor miniloader blobs. Rockchip devices will run fine using any partition layout if the first 16 MiB of MMC storage is ignored/skipped. Remove the partitions env variable to stop encourage users a continued use of this outdated partition layout on RK3588 devices. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- include/configs/rk3588_common.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h index e6654c275ac..7b02560971a 100644 --- a/include/configs/rk3588_common.h +++ b/include/configs/rk3588_common.h @@ -28,7 +28,6 @@ #define CFG_EXTRA_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "partitions=" PARTS_DEFAULT \ ENV_MEM_LAYOUT_SETTINGS \ ROCKCHIP_DEVICE_SETTINGS \ "boot_targets=" BOOT_TARGETS "\0" -- cgit v1.3.1 From e8f2dd137d573be9beca3a1ceb5b9d4c8d2bde6e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 6 Apr 2025 00:24:25 +0000 Subject: rockchip: Ensure device settings is defined before rk3568_common.h Ensure ROCKCHIP_DEVICE_SETTINGS is defined before including rk3568_common.h in board include/configs files. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- include/configs/anbernic-rgxx3-rk3566.h | 4 ++-- include/configs/evb_rk3568.h | 4 ++-- include/configs/powkiddy-x55-rk3566.h | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/anbernic-rgxx3-rk3566.h b/include/configs/anbernic-rgxx3-rk3566.h index 3c4ea4e7d84..3d9e05a976a 100644 --- a/include/configs/anbernic-rgxx3-rk3566.h +++ b/include/configs/anbernic-rgxx3-rk3566.h @@ -3,10 +3,10 @@ #ifndef __ANBERNIC_RGXX3_RK3566_H #define __ANBERNIC_RGXX3_RK3566_H -#include - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" +#include + #endif diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h index a0f2383bf2f..9070160cf58 100644 --- a/include/configs/evb_rk3568.h +++ b/include/configs/evb_rk3568.h @@ -6,10 +6,10 @@ #ifndef __EVB_RK3568_H #define __EVB_RK3568_H -#include - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" +#include + #endif diff --git a/include/configs/powkiddy-x55-rk3566.h b/include/configs/powkiddy-x55-rk3566.h index 4b25c6a8774..8ace435434f 100644 --- a/include/configs/powkiddy-x55-rk3566.h +++ b/include/configs/powkiddy-x55-rk3566.h @@ -3,10 +3,10 @@ #ifndef __POWKIDDY_X55_RK3566_H #define __POWKIDDY_X55_RK3566_H -#include - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" +#include + #endif -- cgit v1.3.1 From fd753bc2a9cc95afd4e7c3df41c6ab0b8f77cc74 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 6 Apr 2025 00:24:26 +0000 Subject: rockchip: Ensure device settings is defined before rk3588_common.h Ensure ROCKCHIP_DEVICE_SETTINGS is defined before including rk3588_common.h in board include/configs files. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- include/configs/evb_rk3588.h | 4 ++-- include/configs/khadas-edge2-rk3588s.h | 4 ++-- include/configs/toybrick_rk3588.h | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/evb_rk3588.h b/include/configs/evb_rk3588.h index 4568e2cace6..5ff1ddbfcbe 100644 --- a/include/configs/evb_rk3588.h +++ b/include/configs/evb_rk3588.h @@ -6,10 +6,10 @@ #ifndef __EVB_RK3588_H #define __EVB_RK3588_H -#include - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" +#include + #endif diff --git a/include/configs/khadas-edge2-rk3588s.h b/include/configs/khadas-edge2-rk3588s.h index d279cf3826a..fe8461d6362 100644 --- a/include/configs/khadas-edge2-rk3588s.h +++ b/include/configs/khadas-edge2-rk3588s.h @@ -6,10 +6,10 @@ #ifndef __KHADAS_EDGE2_RK3588_H #define __KHADAS_EDGE2_RK3588_H -#include - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" +#include + #endif /* __KHADAS_EDGE2_RK3588_H */ diff --git a/include/configs/toybrick_rk3588.h b/include/configs/toybrick_rk3588.h index faa2e6c19c3..00565089676 100644 --- a/include/configs/toybrick_rk3588.h +++ b/include/configs/toybrick_rk3588.h @@ -6,10 +6,10 @@ #ifndef __TOYBRICK_RK3588_H #define __TOYBRICK_RK3588_H -#include - #define ROCKCHIP_DEVICE_SETTINGS \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" +#include + #endif -- cgit v1.3.1 From 3167636f796d05f992a8b20d4f7714028ee805ec Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 6 Apr 2025 00:24:27 +0000 Subject: rockchip: Use rk3568_common.h by default for RK356x boards Ensure rk3568_common.h can be used by boards directly by defining a blank ROCKCHIP_DEVICE_SETTINGS unless it already is defined. Add a default SYS_CONFIG_NAME to include rk3568_common.h unless a board target overrides it in its board Kconfig. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3568/Kconfig | 3 +++ include/configs/rk3568_common.h | 4 ++++ 2 files changed, 7 insertions(+) (limited to 'include') diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig index c589fd58699..8a18b411c86 100644 --- a/arch/arm/mach-rockchip/rk3568/Kconfig +++ b/arch/arm/mach-rockchip/rk3568/Kconfig @@ -84,4 +84,7 @@ source "board/qnap/ts433/Kconfig" source "board/radxa/zero3-rk3566/Kconfig" source "board/xunlong/orangepi-3b-rk3566/Kconfig" +config SYS_CONFIG_NAME + default "rk3568_common" + endif diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index a68ca381db5..b2a35db0b94 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -15,6 +15,10 @@ #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 +#ifndef ROCKCHIP_DEVICE_SETTINGS +#define ROCKCHIP_DEVICE_SETTINGS +#endif + #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00c00000\0" \ "script_offset_f=0xffe000\0" \ -- cgit v1.3.1 From 0992c6690314d4eeb818e0c113e0bd2deeea8f53 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 6 Apr 2025 00:24:28 +0000 Subject: rockchip: Use rk3588_common.h by default for RK3588 boards Ensure rk3588_common.h can be used by boards directly by defining a blank ROCKCHIP_DEVICE_SETTINGS unless it already is defined. Add a default SYS_CONFIG_NAME to include rk3588_common.h unless a board target overrides it in its board Kconfig. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3588/Kconfig | 3 +++ include/configs/rk3588_common.h | 4 ++++ 2 files changed, 7 insertions(+) (limited to 'include') diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index efd192068ad..553afcc7426 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -444,4 +444,7 @@ source "board/rockchip/toybrick_rk3588/Kconfig" source "board/theobroma-systems/jaguar_rk3588/Kconfig" source "board/theobroma-systems/tiger_rk3588/Kconfig" +config SYS_CONFIG_NAME + default "rk3588_common" + endif diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h index 7b02560971a..2f0d40deb64 100644 --- a/include/configs/rk3588_common.h +++ b/include/configs/rk3588_common.h @@ -14,6 +14,10 @@ #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 +#ifndef ROCKCHIP_DEVICE_SETTINGS +#define ROCKCHIP_DEVICE_SETTINGS +#endif + #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00c00000\0" \ "script_offset_f=0xffe000\0" \ -- cgit v1.3.1 From 5ad65cae8658bb365a543ec03fcbd1af5c77002b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 7 Apr 2025 22:46:52 +0000 Subject: arch: arm: rockchip: Add initial support for RK3528 Rockchip RK3528 is a ARM-based SoC with quad-core Cortex-A53. Add initial arch support for the RK3528 SoC. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/include/asm/arch-rk3528/boot0.h | 9 ++ arch/arm/include/asm/arch-rk3528/gpio.h | 9 ++ arch/arm/mach-rockchip/Kconfig | 51 ++++++++++ arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3528/Kconfig | 15 +++ arch/arm/mach-rockchip/rk3528/Makefile | 5 + arch/arm/mach-rockchip/rk3528/clk_rk3528.c | 16 +++ arch/arm/mach-rockchip/rk3528/rk3528.c | 137 ++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3528/syscon_rk3528.c | 19 ++++ drivers/usb/gadget/Kconfig | 1 + include/configs/rk3528_common.h | 38 +++++++ 11 files changed, 301 insertions(+) create mode 100644 arch/arm/include/asm/arch-rk3528/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3528/gpio.h create mode 100644 arch/arm/mach-rockchip/rk3528/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3528/Makefile create mode 100644 arch/arm/mach-rockchip/rk3528/clk_rk3528.c create mode 100644 arch/arm/mach-rockchip/rk3528/rk3528.c create mode 100644 arch/arm/mach-rockchip/rk3528/syscon_rk3528.c create mode 100644 include/configs/rk3528_common.h (limited to 'include') diff --git a/arch/arm/include/asm/arch-rk3528/boot0.h b/arch/arm/include/asm/arch-rk3528/boot0.h new file mode 100644 index 00000000000..8ae46f25a87 --- /dev/null +++ b/arch/arm/include/asm/arch-rk3528/boot0.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright Contributors to the U-Boot project. */ + +#ifndef __ASM_ARCH_BOOT0_H__ +#define __ASM_ARCH_BOOT0_H__ + +#include + +#endif diff --git a/arch/arm/include/asm/arch-rk3528/gpio.h b/arch/arm/include/asm/arch-rk3528/gpio.h new file mode 100644 index 00000000000..5516e649b80 --- /dev/null +++ b/arch/arm/include/asm/arch-rk3528/gpio.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright Contributors to the U-Boot project. */ + +#ifndef __ASM_ARCH_GPIO_H__ +#define __ASM_ARCH_GPIO_H__ + +#include + +#endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index b61d424ba63..4d5e587cc88 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -319,6 +319,56 @@ config ROCKCHIP_RK3399 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. +config ROCKCHIP_RK3528 + bool "Support Rockchip RK3528" + select ARM64 + select SUPPORT_SPL + select SPL + select CLK + select PINCTRL + select RAM + select REGMAP + select SYSCON + select BOARD_LATE_INIT + select DM_REGULATOR_FIXED + select DM_RESET + imply ARMV8_CRYPTO + imply ARMV8_SET_SMPEN + imply BOOTSTD_FULL + imply DM_RNG + imply FIT + imply LEGACY_IMAGE_FORMAT + imply MISC + imply MISC_INIT_R + imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP + imply OF_LIBFDT_OVERLAY + imply OF_LIVE + imply OF_UPSTREAM + imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP + imply RNG_ROCKCHIP + imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_COMMON_STACK_ADDR + imply ROCKCHIP_EXTERNAL_TPL + imply ROCKCHIP_OTP + imply SPL_ATF + imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF + imply SPL_CLK + imply SPL_DM_SEQ_ALIAS + imply SPL_FIT_SIGNATURE + imply SPL_LOAD_FIT + imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT + imply SPL_OF_CONTROL + imply SPL_PINCTRL + imply SPL_RAM + imply SPL_REGMAP + imply SPL_SERIAL + imply SPL_SYSCON + imply SYS_RELOC_GD_ENV_ADDR + imply SYSRESET + imply SYSRESET_PSCI if SPL_ATF + help + The Rockchip RK3528 is a ARM-based SoC with a quad-core Cortex-A53. + config ROCKCHIP_RK3568 bool "Support Rockchip RK3568" select ARM64 @@ -639,6 +689,7 @@ source "arch/arm/mach-rockchip/rk3308/Kconfig" source "arch/arm/mach-rockchip/rk3328/Kconfig" source "arch/arm/mach-rockchip/rk3368/Kconfig" source "arch/arm/mach-rockchip/rk3399/Kconfig" +source "arch/arm/mach-rockchip/rk3528/Kconfig" source "arch/arm/mach-rockchip/rk3568/Kconfig" source "arch/arm/mach-rockchip/rk3588/Kconfig" source "arch/arm/mach-rockchip/rv1108/Kconfig" diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 5e7edc99cdc..5a7dd5b5940 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -42,6 +42,7 @@ obj-$(CONFIG_ROCKCHIP_RK3308) += rk3308/ obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/ obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/ obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/ +obj-$(CONFIG_ROCKCHIP_RK3528) += rk3528/ obj-$(CONFIG_ROCKCHIP_RK3568) += rk3568/ obj-$(CONFIG_ROCKCHIP_RK3588) += rk3588/ obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/ diff --git a/arch/arm/mach-rockchip/rk3528/Kconfig b/arch/arm/mach-rockchip/rk3528/Kconfig new file mode 100644 index 00000000000..993b2dd274e --- /dev/null +++ b/arch/arm/mach-rockchip/rk3528/Kconfig @@ -0,0 +1,15 @@ +if ROCKCHIP_RK3528 + +config ROCKCHIP_BOOT_MODE_REG + default 0xff370200 + +config ROCKCHIP_STIMER_BASE + default 0xff620000 + +config SYS_SOC + default "rk3528" + +config SYS_CONFIG_NAME + default "rk3528_common" + +endif diff --git a/arch/arm/mach-rockchip/rk3528/Makefile b/arch/arm/mach-rockchip/rk3528/Makefile new file mode 100644 index 00000000000..f0c18cd39d2 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3528/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +obj-y += rk3528.o +obj-y += clk_rk3528.o +obj-y += syscon_rk3528.o diff --git a/arch/arm/mach-rockchip/rk3528/clk_rk3528.c b/arch/arm/mach-rockchip/rk3528/clk_rk3528.c new file mode 100644 index 00000000000..6e77f11cbec --- /dev/null +++ b/arch/arm/mach-rockchip/rk3528/clk_rk3528.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright Contributors to the U-Boot project. + +#include +#include + +int rockchip_get_clk(struct udevice **devp) +{ + return uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(rockchip_rk3528_cru), devp); +} + +void *rockchip_get_cru(void) +{ + return RK3528_CRU_BASE; +} diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c new file mode 100644 index 00000000000..4892ff6ba9d --- /dev/null +++ b/arch/arm/mach-rockchip/rk3528/rk3528.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright Contributors to the U-Boot project. + +#define LOG_CATEGORY LOGC_ARCH + +#include +#include +#include +#include +#include + +#define FIREWALL_DDR_BASE 0xff2e0000 +#define FW_DDR_MST6_REG 0x58 +#define FW_DDR_MST7_REG 0x5c +#define FW_DDR_MST14_REG 0x78 +#define FW_DDR_MST16_REG 0x80 + +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "/soc/mmc@ffbf0000", + [BROM_BOOTSOURCE_SD] = "/soc/mmc@ffc30000", +}; + +static struct mm_region rk3528_mem_map[] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0xfc000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + .virt = 0xfc000000UL, + .phys = 0xfc000000UL, + .size = 0x04000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = rk3528_mem_map; + +void board_debug_uart_init(void) +{ +} + +int arch_cpu_init(void) +{ + u32 val; + + if (!IS_ENABLED(CONFIG_SPL_BUILD)) + return 0; + + /* Set the emmc to access ddr memory */ + val = readl(FIREWALL_DDR_BASE + FW_DDR_MST6_REG); + writel(val & 0x0000ffff, FIREWALL_DDR_BASE + FW_DDR_MST6_REG); + + /* Set the fspi to access ddr memory */ + val = readl(FIREWALL_DDR_BASE + FW_DDR_MST7_REG); + writel(val & 0xffff0000, FIREWALL_DDR_BASE + FW_DDR_MST7_REG); + + /* Set the sdmmc to access ddr memory */ + val = readl(FIREWALL_DDR_BASE + FW_DDR_MST14_REG); + writel(val & 0x0000ffff, FIREWALL_DDR_BASE + FW_DDR_MST14_REG); + + /* Set the usb to access ddr memory */ + val = readl(FIREWALL_DDR_BASE + FW_DDR_MST16_REG); + writel(val & 0xffff0000, FIREWALL_DDR_BASE + FW_DDR_MST16_REG); + + return 0; +} + +#define HP_TIMER_BASE CONFIG_ROCKCHIP_STIMER_BASE +#define HP_CTRL_REG 0x04 +#define TIMER_EN BIT(0) +#define HP_LOAD_COUNT0_REG 0x14 +#define HP_LOAD_COUNT1_REG 0x18 + +void rockchip_stimer_init(void) +{ + u32 reg; + + if (!IS_ENABLED(CONFIG_XPL_BUILD)) + return; + + reg = readl(HP_TIMER_BASE + HP_CTRL_REG); + if (reg & TIMER_EN) + return; + + asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY)); + writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG); + writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG); + writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG); +} + +#define RK3528_OTP_CPU_CODE_OFFSET 0x02 +#define RK3528_OTP_CPU_CHIP_TYPE_OFFSET 0x28 + +int checkboard(void) +{ + u8 cpu_code[2], chip_type; + struct udevice *dev; + char suffix[2]; + int ret; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) + return 0; + + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(rockchip_otp), &dev); + if (ret) { + log_debug("Could not find otp device, ret=%d\n", ret); + return 0; + } + + /* cpu-code: SoC model, e.g. 0x35 0x28 */ + ret = misc_read(dev, RK3528_OTP_CPU_CODE_OFFSET, cpu_code, 2); + if (ret < 0) { + log_debug("Could not read cpu-code, ret=%d\n", ret); + return 0; + } + + ret = misc_read(dev, RK3528_OTP_CPU_CHIP_TYPE_OFFSET, &chip_type, 1); + if (ret < 0) { + log_debug("Could not read chip type, ret=%d\n", ret); + return 0; + } + + suffix[0] = chip_type != 0x1 ? 'A' : '\0'; + suffix[1] = '\0'; + + printf("SoC: RK%02x%02x%s\n", cpu_code[0], cpu_code[1], suffix); + + return 0; +} diff --git a/arch/arm/mach-rockchip/rk3528/syscon_rk3528.c b/arch/arm/mach-rockchip/rk3528/syscon_rk3528.c new file mode 100644 index 00000000000..4a32a5f732e --- /dev/null +++ b/arch/arm/mach-rockchip/rk3528/syscon_rk3528.c @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// Copyright Contributors to the U-Boot project. + +#include +#include + +static const struct udevice_id rk3528_syscon_ids[] = { + { .compatible = "rockchip,rk3528-grf", .data = ROCKCHIP_SYSCON_GRF }, + { } +}; + +U_BOOT_DRIVER(rockchip_rk3528_syscon) = { + .name = "rockchip_rk3528_syscon", + .id = UCLASS_SYSCON, + .of_match = rk3528_syscon_ids, +#if CONFIG_IS_ENABLED(OF_REAL) + .bind = dm_scan_fdt_dev, +#endif +}; diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index c815764c2bc..46a83141481 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -85,6 +85,7 @@ config USB_GADGET_PRODUCT_NUM default 0x330e if ROCKCHIP_RK3308 default 0x350a if ROCKCHIP_RK3568 default 0x350b if ROCKCHIP_RK3588 + default 0x350c if ROCKCHIP_RK3528 default 0x0 help Product ID of the USB device emulated, reported to the host device. diff --git a/include/configs/rk3528_common.h b/include/configs/rk3528_common.h new file mode 100644 index 00000000000..f7dc6ecd594 --- /dev/null +++ b/include/configs/rk3528_common.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright Contributors to the U-Boot project. */ + +#ifndef __CONFIG_RK3528_COMMON_H +#define __CONFIG_RK3528_COMMON_H + +#define CFG_CPUID_OFFSET 0xa + +#include "rockchip-common.h" + +#define CFG_IRAM_BASE 0xfe480000 + +#define CFG_SYS_SDRAM_BASE 0 +#define SDRAM_MAX_SIZE 0xfc000000 + +#ifndef ROCKCHIP_DEVICE_SETTINGS +#define ROCKCHIP_DEVICE_SETTINGS +#endif + +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00c00000\0" \ + "script_offset_f=0xffe000\0" \ + "script_size_f=0x2000\0" \ + "pxefile_addr_r=0x00e00000\0" \ + "kernel_addr_r=0x02000000\0" \ + "kernel_comp_addr_r=0x0a000000\0" \ + "fdt_addr_r=0x12000000\0" \ + "fdtoverlay_addr_r=0x12100000\0" \ + "ramdisk_addr_r=0x12180000\0" \ + "kernel_comp_size=0x8000000\0" + +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ + "boot_targets=" BOOT_TARGETS "\0" + +#endif /* __CONFIG_RK3528_COMMON_H */ -- cgit v1.3.1 From e59cd9cb3d6883172f1c635a50008de9f8c6e69e Mon Sep 17 00:00:00 2001 From: Xuhui Lin Date: Tue, 15 Apr 2025 23:51:16 +0200 Subject: arm: rockchip: Add RK3576 arch core support The Rockchip RK3576 is a ARM-based SoC with quad-core Cortex-A72 and quad-core Cortex-A53 including 6TOPS NPU, Mali-G52 MC3, HDMI Out, DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, UFS, USB OTG 3.0, Type-C, USB 2.0, PCIe 2.1, SATA 3, Ethernet, SDIO3.0, I2C, UART, SPI, GPIO and PWM. Add arch core support for it. Signed-off-by: Xuhui Lin [adapted for mainline u-boot] Signed-off-by: Heiko Stuebner Reviewed-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3576-u-boot.dtsi | 131 ++++++++++++++++++++++ arch/arm/include/asm/arch-rk3576/boot0.h | 11 ++ arch/arm/include/asm/arch-rk3576/gpio.h | 11 ++ arch/arm/mach-rockchip/Kconfig | 51 +++++++++ arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/rk3576/Kconfig | 15 +++ arch/arm/mach-rockchip/rk3576/Makefile | 9 ++ arch/arm/mach-rockchip/rk3576/clk_rk3576.c | 18 +++ arch/arm/mach-rockchip/rk3576/rk3576.c | 155 ++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3576/syscon_rk3576.c | 22 ++++ arch/arm/mach-rockchip/sdram.c | 1 + doc/board/rockchip/rockchip.rst | 9 ++ include/configs/rk3576_common.h | 41 +++++++ 13 files changed, 475 insertions(+) create mode 100644 arch/arm/dts/rk3576-u-boot.dtsi create mode 100644 arch/arm/include/asm/arch-rk3576/boot0.h create mode 100644 arch/arm/include/asm/arch-rk3576/gpio.h create mode 100644 arch/arm/mach-rockchip/rk3576/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3576/Makefile create mode 100644 arch/arm/mach-rockchip/rk3576/clk_rk3576.c create mode 100644 arch/arm/mach-rockchip/rk3576/rk3576.c create mode 100644 arch/arm/mach-rockchip/rk3576/syscon_rk3576.c create mode 100644 include/configs/rk3576_common.h (limited to 'include') diff --git a/arch/arm/dts/rk3576-u-boot.dtsi b/arch/arm/dts/rk3576-u-boot.dtsi new file mode 100644 index 00000000000..be99a48a630 --- /dev/null +++ b/arch/arm/dts/rk3576-u-boot.dtsi @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2025 Rockchip Electronics Co., Ltd + */ + +#include "rockchip-u-boot.dtsi" + +/ { + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci; + }; + + dmc { + compatible = "rockchip,rk3576-dmc"; + bootph-all; + }; +}; + +&cru { + bootph-all; +}; + +&emmc_bus8 { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_clk { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_cmd { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_rstnout { + bootph-pre-ram; + bootph-some-ram; +}; + +&emmc_strb { + bootph-pre-ram; + bootph-some-ram; +}; + +&ioc_grf { + bootph-all; +}; + +&pcfg_pull_none { + bootph-all; +}; + +&pcfg_pull_up { + bootph-all; +}; + +&pcfg_pull_up_drv_level_2 { + bootph-pre-ram; + bootph-some-ram; +}; + +&pcfg_pull_up_drv_level_3 { + bootph-pre-ram; + bootph-some-ram; +}; + +&pinctrl { + bootph-all; +}; + +&pmu1_grf { + bootph-all; +}; + +&sdhci { + bootph-pre-ram; + bootph-some-ram; + u-boot,spl-fifo-mode; +}; + +&sdmmc { + bootph-pre-ram; + bootph-some-ram; + u-boot,spl-fifo-mode; +}; + +&sdmmc0_bus4 { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc0_clk { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc0_cmd { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc0_det { + bootph-pre-ram; + bootph-some-ram; +}; + +&sdmmc0_pwren { + bootph-pre-ram; + bootph-some-ram; +}; + +&sys_grf { + bootph-all; +}; + +&uart0 { + bootph-all; + clock-frequency = <24000000>; +}; + +&uart0m0_xfer { + bootph-pre-sram; + bootph-pre-ram; +}; + +&xin24m { + bootph-all; +}; diff --git a/arch/arm/include/asm/arch-rk3576/boot0.h b/arch/arm/include/asm/arch-rk3576/boot0.h new file mode 100644 index 00000000000..dea2b20252d --- /dev/null +++ b/arch/arm/include/asm/arch-rk3576/boot0.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2021 Rockchip Electronics Co., Ltd + */ + +#ifndef __ASM_ARCH_BOOT0_H__ +#define __ASM_ARCH_BOOT0_H__ + +#include + +#endif diff --git a/arch/arm/include/asm/arch-rk3576/gpio.h b/arch/arm/include/asm/arch-rk3576/gpio.h new file mode 100644 index 00000000000..b48c0a5cf84 --- /dev/null +++ b/arch/arm/include/asm/arch-rk3576/gpio.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2021 Rockchip Electronics Co., Ltd + */ + +#ifndef __ASM_ARCH_GPIO_H__ +#define __ASM_ARCH_GPIO_H__ + +#include + +#endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 4d5e587cc88..67edae71b4a 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -403,6 +403,56 @@ config ROCKCHIP_RK3568 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. +config ROCKCHIP_RK3576 + bool "Support Rockchip RK3576" + select ARM64 + select SUPPORT_SPL + select SPL + select CLK + select PINCTRL + select RAM + select REGMAP + select SYSCON + select BOARD_LATE_INIT + select DM_REGULATOR_FIXED + select DM_RESET + imply ARMV8_CRYPTO + imply ARMV8_SET_SMPEN + imply BOOTSTD_FULL + imply DM_RNG + imply FIT + imply LEGACY_IMAGE_FORMAT + imply MISC + imply MISC_INIT_R + imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP + imply OF_LIBFDT_OVERLAY + imply OF_LIVE + imply OF_UPSTREAM + imply PHY_GIGE if DWC_ETH_QOS_ROCKCHIP + imply RNG_ROCKCHIP + imply ROCKCHIP_COMMON_BOARD + imply ROCKCHIP_COMMON_STACK_ADDR + imply ROCKCHIP_EXTERNAL_TPL + imply ROCKCHIP_OTP + imply SPL_ATF + imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF + imply SPL_CLK + imply SPL_DM_SEQ_ALIAS + imply SPL_FIT_SIGNATURE + imply SPL_LOAD_FIT + imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT + imply SPL_OF_CONTROL + imply SPL_PINCTRL + imply SPL_RAM + imply SPL_REGMAP + imply SPL_SERIAL + imply SPL_SYSCON + imply SYS_RELOC_GD_ENV_ADDR + imply SYSRESET + help + The Rockchip RK3576 is a ARM-based SoC with quad-core Cortex-A72 and + and quad-core Cortex-A53. + config ROCKCHIP_RK3588 bool "Support Rockchip RK3588" select ARM64 @@ -691,6 +741,7 @@ source "arch/arm/mach-rockchip/rk3368/Kconfig" source "arch/arm/mach-rockchip/rk3399/Kconfig" source "arch/arm/mach-rockchip/rk3528/Kconfig" source "arch/arm/mach-rockchip/rk3568/Kconfig" +source "arch/arm/mach-rockchip/rk3576/Kconfig" source "arch/arm/mach-rockchip/rk3588/Kconfig" source "arch/arm/mach-rockchip/rv1108/Kconfig" source "arch/arm/mach-rockchip/rv1126/Kconfig" diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 5a7dd5b5940..ae15a9f8a2d 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/ obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/ obj-$(CONFIG_ROCKCHIP_RK3528) += rk3528/ obj-$(CONFIG_ROCKCHIP_RK3568) += rk3568/ +obj-$(CONFIG_ROCKCHIP_RK3576) += rk3576/ obj-$(CONFIG_ROCKCHIP_RK3588) += rk3588/ obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/ obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126/ diff --git a/arch/arm/mach-rockchip/rk3576/Kconfig b/arch/arm/mach-rockchip/rk3576/Kconfig new file mode 100644 index 00000000000..a94dc6706f0 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3576/Kconfig @@ -0,0 +1,15 @@ +if ROCKCHIP_RK3576 + +config ROCKCHIP_BOOT_MODE_REG + default 0x26024040 + +config ROCKCHIP_STIMER_BASE + default 0x27400000 + +config SYS_SOC + default "rk3576" + +config SYS_CONFIG_NAME + default "rk3576_common" + +endif diff --git a/arch/arm/mach-rockchip/rk3576/Makefile b/arch/arm/mach-rockchip/rk3576/Makefile new file mode 100644 index 00000000000..cbc58257deb --- /dev/null +++ b/arch/arm/mach-rockchip/rk3576/Makefile @@ -0,0 +1,9 @@ +# +# (C) Copyright 2023 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += rk3576.o +obj-y += clk_rk3576.o +obj-y += syscon_rk3576.o diff --git a/arch/arm/mach-rockchip/rk3576/clk_rk3576.c b/arch/arm/mach-rockchip/rk3576/clk_rk3576.c new file mode 100644 index 00000000000..edda1afd0bd --- /dev/null +++ b/arch/arm/mach-rockchip/rk3576/clk_rk3576.c @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2020 Rockchip Electronics Co., Ltd. + */ + +#include +#include + +int rockchip_get_clk(struct udevice **devp) +{ + return uclass_get_device_by_driver(UCLASS_CLK, + DM_DRIVER_GET(rockchip_rk3576_cru), devp); +} + +void *rockchip_get_cru(void) +{ + return (void *)RK3576_CRU_BASE; +} diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c new file mode 100644 index 00000000000..ba5c94b4b3d --- /dev/null +++ b/arch/arm/mach-rockchip/rk3576/rk3576.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2024 Rockchip Electronics Co., Ltd + */ + +#include +#include +#include + +#define SYS_GRF_BASE 0x2600A000 +#define SYS_GRF_SOC_CON2 0x0008 +#define SYS_GRF_SOC_CON7 0x001c +#define SYS_GRF_SOC_CON11 0x002c +#define SYS_GRF_SOC_CON12 0x0030 + +#define GPIO0_IOC_BASE 0x26040000 +#define GPIO0B_PULL_L 0x0024 +#define GPIO0B_IE_L 0x002C + +#define SYS_SGRF_BASE 0x26004000 +#define SYS_SGRF_SOC_CON14 0x0058 +#define SYS_SGRF_SOC_CON15 0x005C +#define SYS_SGRF_SOC_CON20 0x0070 + +#define FW_SYS_SGRF_BASE 0x26005000 +#define SGRF_DOMAIN_CON1 0x4 +#define SGRF_DOMAIN_CON2 0x8 +#define SGRF_DOMAIN_CON3 0xc +#define SGRF_DOMAIN_CON4 0x10 +#define SGRF_DOMAIN_CON5 0x14 + +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "/soc/mmc@2a330000", + [BROM_BOOTSOURCE_SD] = "/soc/mmc@2a310000", +}; + +static struct mm_region rk3576_mem_map[] = { + { + /* I/O area */ + .virt = 0x20000000UL, + .phys = 0x20000000UL, + .size = 0xb080000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* PMU_SRAM, CBUF, SYSTEM_SRAM */ + .virt = 0x3fe70000UL, + .phys = 0x3fe70000UL, + .size = 0x190000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* MSCH_DDR_PORT */ + .virt = 0x40000000UL, + .phys = 0x40000000UL, + .size = 0x400000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* PCIe 0+1 */ + .virt = 0x900000000UL, + .phys = 0x900000000UL, + .size = 0x100800000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = rk3576_mem_map; + +void board_debug_uart_init(void) +{ +} + +#define HP_TIMER_BASE CONFIG_ROCKCHIP_STIMER_BASE +#define HP_CTRL_REG 0x04 +#define TIMER_EN BIT(0) +#define HP_LOAD_COUNT0_REG 0x14 +#define HP_LOAD_COUNT1_REG 0x18 + +void rockchip_stimer_init(void) +{ + u32 reg; + + if (!IS_ENABLED(CONFIG_XPL_BUILD)) + return; + + reg = readl(HP_TIMER_BASE + HP_CTRL_REG); + if (reg & TIMER_EN) + return; + + asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY)); + writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG); + writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG); + writel((TIMER_EN << 16) | TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG); +} + +int arch_cpu_init(void) +{ + u32 val; + + if (!IS_ENABLED(CONFIG_SPL_BUILD)) + return 0; + + /* Set the emmc to access ddr memory */ + val = readl(FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON2); + writel(val | 0x7, FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON2); + + /* Set the sdmmc0 to access ddr memory */ + val = readl(FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON5); + writel(val | 0x700, FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON5); + + /* Set the UFS to access ddr memory */ + val = readl(FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON3); + writel(val | 0x70000, FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON3); + + /* Set the fspi0 and fspi1 to access ddr memory */ + val = readl(FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON4); + writel(val | 0x7700, FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON4); + + /* Set the decom to access ddr memory */ + val = readl(FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON1); + writel(val | 0x700, FW_SYS_SGRF_BASE + SGRF_DOMAIN_CON1); + + /* + * Set the GPIO0B0~B3 pull up and input enable. + * Keep consistent with other IO. + */ + writel(0x00ff00ff, GPIO0_IOC_BASE + GPIO0B_PULL_L); + writel(0x000f000f, GPIO0_IOC_BASE + GPIO0B_IE_L); + + /* + * Set SYS_GRF_SOC_CON2[12](input of pwm2_ch0) as 0, + * keep consistent with other pwm. + */ + writel(0x10000000, SYS_GRF_BASE + SYS_GRF_SOC_CON2); + + /* Enable noc slave response timeout */ + writel(0x80008000, SYS_GRF_BASE + SYS_GRF_SOC_CON11); + writel(0xffffffe0, SYS_GRF_BASE + SYS_GRF_SOC_CON12); + + /* + * Enable cci channels for below module AXI R/W + * Module: GMAC0/1, MMU0/1(PCIe, SATA, USB3) + */ + writel(0xffffff00, SYS_SGRF_BASE + SYS_SGRF_SOC_CON20); + + return 0; +} diff --git a/arch/arm/mach-rockchip/rk3576/syscon_rk3576.c b/arch/arm/mach-rockchip/rk3576/syscon_rk3576.c new file mode 100644 index 00000000000..0dbf8f8d9c0 --- /dev/null +++ b/arch/arm/mach-rockchip/rk3576/syscon_rk3576.c @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2023 Rockchip Electronics Co., Ltd + */ + +#include +#include + +static const struct udevice_id rk3576_syscon_ids[] = { + { .compatible = "rockchip,rk3576-sys-grf", .data = ROCKCHIP_SYSCON_GRF }, + { .compatible = "rockchip,rk3576-pmu1-grf", .data = ROCKCHIP_SYSCON_PMUGRF }, + { } +}; + +U_BOOT_DRIVER(rockchip_rk3576_syscon) = { + .name = "rockchip_rk3576_syscon", + .id = UCLASS_SYSCON, + .of_match = rk3576_syscon_ids, +#if CONFIG_IS_ENABLED(OF_REAL) + .bind = dm_scan_fdt_dev, +#endif +}; diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index f20d30f3595..3bc482331c7 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -110,6 +110,7 @@ static int rockchip_dram_init_banksize(void) u8 i, j; if (!IS_ENABLED(CONFIG_ROCKCHIP_RK3588) && + !IS_ENABLED(CONFIG_ROCKCHIP_RK3576) && !IS_ENABLED(CONFIG_ROCKCHIP_RK3568) && !IS_ENABLED(CONFIG_ROCKCHIP_RK3528)) return -ENOTSUPP; diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index b992e6c8b6c..1058a1ce990 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -281,6 +281,15 @@ To build rk3568 boards: make evb-rk3568_defconfig make CROSS_COMPILE=aarch64-linux-gnu- +To build rk3576 boards: + +.. code-block:: bash + + export BL31=../rkbin/bin/rk35/rk3576_bl31_v1.04.elf + export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3576_ddr_lp4_2112MHz_lp5_2736MHz_v1.03.bin + make roc-pc-rk3576_defconfig + make CROSS_COMPILE=aarch64-linux-gnu- + To build rk3588 boards: .. code-block:: bash diff --git a/include/configs/rk3576_common.h b/include/configs/rk3576_common.h new file mode 100644 index 00000000000..14d1d863609 --- /dev/null +++ b/include/configs/rk3576_common.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2024 Rockchip Electronics Co., Ltd + */ + +#ifndef __CONFIG_RK3576_COMMON_H +#define __CONFIG_RK3576_COMMON_H + +#define CFG_CPUID_OFFSET 0xa + +#include "rockchip-common.h" + +#define CFG_IRAM_BASE 0x3ff80000 + +#define CFG_SYS_SDRAM_BASE 0x40000000 +/* Used by board_get_usable_ram_top(), space below the 4G address boundary */ +#define SDRAM_MAX_SIZE (SZ_4G - CFG_SYS_SDRAM_BASE) + +#ifndef ROCKCHIP_DEVICE_SETTINGS +#define ROCKCHIP_DEVICE_SETTINGS +#endif + +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x40c00000\0" \ + "script_offset_f=0xffe000\0" \ + "script_size_f=0x2000\0" \ + "pxefile_addr_r=0x40e00000\0" \ + "kernel_addr_r=0x42000000\0" \ + "kernel_comp_addr_r=0x4a000000\0" \ + "fdt_addr_r=0x52000000\0" \ + "fdtoverlay_addr_r=0x52100000\0" \ + "ramdisk_addr_r=0x52180000\0" \ + "kernel_comp_size=0x8000000\0" + +#define CFG_EXTRA_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ + "boot_targets=" BOOT_TARGETS "\0" + +#endif /* __CONFIG_RK3576_COMMON_H */ -- cgit v1.3.1 From f7c8a69df1243496c1de04a83718d50e48efaab5 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 15 Apr 2025 23:51:28 +0200 Subject: rockchip: rk3576: Add support for ROC-RK3576-PC board The ROC-RK3576-PC is a SBC made by Firefly, designed around the RK3576 SoC. This adds the needed board infrastructure and config for it. Signed-off-by: Heiko Stuebner Reviewed-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/dts/rk3576-roc-pc-u-boot.dtsi | 11 ++++++++ arch/arm/mach-rockchip/rk3576/Kconfig | 8 ++++++ board/firefly/roc-pc-rk3576/Kconfig | 12 +++++++++ board/firefly/roc-pc-rk3576/MAINTAINERS | 7 +++++ configs/roc-pc-rk3576_defconfig | 45 +++++++++++++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 3 +++ include/configs/roc-pc-rk3576.h | 15 +++++++++++ 7 files changed, 101 insertions(+) create mode 100644 arch/arm/dts/rk3576-roc-pc-u-boot.dtsi create mode 100644 board/firefly/roc-pc-rk3576/Kconfig create mode 100644 board/firefly/roc-pc-rk3576/MAINTAINERS create mode 100644 configs/roc-pc-rk3576_defconfig create mode 100644 include/configs/roc-pc-rk3576.h (limited to 'include') diff --git a/arch/arm/dts/rk3576-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3576-roc-pc-u-boot.dtsi new file mode 100644 index 00000000000..97240345ed4 --- /dev/null +++ b/arch/arm/dts/rk3576-roc-pc-u-boot.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Joshua Riek + * + */ + +#include "rk3576-u-boot.dtsi" + +&sdhci { + cap-mmc-highspeed; +}; diff --git a/arch/arm/mach-rockchip/rk3576/Kconfig b/arch/arm/mach-rockchip/rk3576/Kconfig index a94dc6706f0..f347caf8904 100644 --- a/arch/arm/mach-rockchip/rk3576/Kconfig +++ b/arch/arm/mach-rockchip/rk3576/Kconfig @@ -1,5 +1,11 @@ if ROCKCHIP_RK3576 +config TARGET_ROC_PC_RK3576 + bool "Firefly ROC-RK3576-PC" + help + ROC-RK3576-PC is a single board computer from Firefly + using the Rockchip RK3576. + config ROCKCHIP_BOOT_MODE_REG default 0x26024040 @@ -9,6 +15,8 @@ config ROCKCHIP_STIMER_BASE config SYS_SOC default "rk3576" +source board/firefly/roc-pc-rk3576/Kconfig + config SYS_CONFIG_NAME default "rk3576_common" diff --git a/board/firefly/roc-pc-rk3576/Kconfig b/board/firefly/roc-pc-rk3576/Kconfig new file mode 100644 index 00000000000..2fc0f913c37 --- /dev/null +++ b/board/firefly/roc-pc-rk3576/Kconfig @@ -0,0 +1,12 @@ +if TARGET_ROC_PC_RK3576 + +config SYS_BOARD + default "roc-pc-rk3576" + +config SYS_VENDOR + default "firefly" + +config SYS_CONFIG_NAME + default "roc-pc-rk3576" + +endif diff --git a/board/firefly/roc-pc-rk3576/MAINTAINERS b/board/firefly/roc-pc-rk3576/MAINTAINERS new file mode 100644 index 00000000000..aa8897c16fc --- /dev/null +++ b/board/firefly/roc-pc-rk3576/MAINTAINERS @@ -0,0 +1,7 @@ +ROC-RK3576-PC +M: Heiko Stuebner +S: Maintained +F: board/firefly/roc-pc-rk3576 +F: include/configs/roc-pc-rk3576.h +F: configs/roc-pc-rk3576_defconfig +F: arch/arm/dts/rk3576-roc-pc* diff --git a/configs/roc-pc-rk3576_defconfig b/configs/roc-pc-rk3576_defconfig new file mode 100644 index 00000000000..af2c1026636 --- /dev/null +++ b/configs/roc-pc-rk3576_defconfig @@ -0,0 +1,45 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3576-roc-pc" +CONFIG_ROCKCHIP_RK3576=y +CONFIG_TARGET_ROC_PC_RK3576=y +CONFIG_SYS_LOAD_ADDR=0x40c00800 +CONFIG_DEBUG_UART_BASE=0x2AD40000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-roc-pc.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_BUTTON=y +CONFIG_BUTTON_ADC=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET_PSCI=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 1058a1ce990..8d7c2591e25 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -130,6 +130,9 @@ List of mainline supported Rockchip boards: - Radxa ROCK 3A (rock-3a-rk3568) - Radxa ROCK 3B (rock-3b-rk3568) +* rk3576 + - Firefly ROC-RK3576-PC (roc-pc-rk3576) + * rk3588 - ArmSoM Sige7 (sige7-rk3588) - Rockchip EVB (evb-rk3588) diff --git a/include/configs/roc-pc-rk3576.h b/include/configs/roc-pc-rk3576.h new file mode 100644 index 00000000000..77c95f0c560 --- /dev/null +++ b/include/configs/roc-pc-rk3576.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 Rockchip Electronics Co., Ltd. + */ + +#ifndef __ROC_PC_RK3576_H +#define __ROC_PC_RK3576_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include + +#endif -- cgit v1.3.1