From b259732d36ccdc911e5b3ed83bd55aae90a43532 Mon Sep 17 00:00:00 2001 From: Sumit Garg Date: Wed, 31 Aug 2016 08:54:15 -0400 Subject: fsl_sec_mon: Update driver for Security Monitor Update the API's for transition of Security Monitor states. Instead of providing both initial and final states for transition, just provide final state for transition as Security Monitor driver will take care of it internally. Signed-off-by: Sumit Garg [York Sun: Reformatted commit message slightly] Reviewed-by: York Sun --- include/fsl_sec_mon.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/fsl_sec_mon.h b/include/fsl_sec_mon.h index b6794cefcc5..1f31f8865c0 100644 --- a/include/fsl_sec_mon.h +++ b/include/fsl_sec_mon.h @@ -34,13 +34,16 @@ struct ccsr_sec_mon_regs { u32 hp_stat; /* 0x08 SEC_MON_HP Status Register */ }; -#define HPCOMR_SW_SV 0x100 /* Security Violation bit */ -#define HPCOMR_SW_FSV 0x200 /* Fatal Security Violation bit */ -#define HPCOMR_SSM_ST 0x1 /* SSM_ST field in SEC_MON command */ +#define HPCOMR_SW_SV 0x100 /* Security Violation bit */ +#define HPCOMR_SW_FSV 0x200 /* Fatal Security Violation bit */ +#define HPCOMR_SSM_ST 0x1 /* SSM_ST field in SEC_MON command */ +#define HPCOMR_SSM_ST_DIS 0x2 /* Disable Secure to Trusted State */ +#define HPCOMR_SSM_SFNS_DIS 0x4 /* Disable Soft Fail to Non-Secure */ #define HPSR_SSM_ST_CHECK 0x900 /* SEC_MON is in check state */ #define HPSR_SSM_ST_NON_SECURE 0xb00 /* SEC_MON is in non secure state */ #define HPSR_SSM_ST_TRUST 0xd00 /* SEC_MON is in trusted state */ #define HPSR_SSM_ST_SOFT_FAIL 0x300 /* SEC_MON is in soft fail state */ +#define HPSR_SSM_ST_SECURE 0xf00 /* SEC_MON is in secure state */ #define HPSR_SSM_ST_MASK 0xf00 /* Mask for SSM_ST field */ /* @@ -53,6 +56,7 @@ enum { SEC_MON_SW_SV, }; -int change_sec_mon_state(uint32_t initial_state, uint32_t final_state); +/* Transition SEC_MON state */ +int set_sec_mon_state(u32 state); #endif /* __FSL_SEC_MON_H */ -- cgit v1.3.1 From f85a8e8d1db374d894afc03504a0eead1de99f74 Mon Sep 17 00:00:00 2001 From: Xiaoliang Yang Date: Wed, 14 Sep 2016 11:36:14 +0800 Subject: armv7: LS1021a: enable i-cache in start.S Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang Reviewed-by: York Sun --- arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/ls102xa/soc.c | 4 ++++ board/freescale/ls1021aqds/README | 6 ++++++ board/freescale/ls1021atwr/README | 6 ++++++ include/configs/ls1021aqds.h | 1 - include/configs/ls1021atwr.h | 1 - 6 files changed, 17 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile index 0d4bfbc55b3..c1eeefd5dd7 100644 --- a/arch/arm/cpu/armv7/Makefile +++ b/arch/arm/cpu/armv7/Makefile @@ -12,7 +12,7 @@ obj-y += cache_v7.o cache_v7_asm.o obj-y += cpu.o cp15.o obj-y += syslib.o -ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA),) +ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_LS102XA),) ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y) obj-y += lowlevel_init.o endif diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c index 31f00cbd692..52fb6f8d513 100644 --- a/arch/arm/cpu/armv7/ls102xa/soc.c +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -60,6 +60,10 @@ unsigned int get_soc_major_rev(void) return major; } +void s_init(void) +{ +} + #ifdef CONFIG_SYS_FSL_ERRATUM_A010315 void erratum_a010315(void) { diff --git a/board/freescale/ls1021aqds/README b/board/freescale/ls1021aqds/README index c561776621a..6cf7146fb23 100644 --- a/board/freescale/ls1021aqds/README +++ b/board/freescale/ls1021aqds/README @@ -110,3 +110,9 @@ Start Address End Address Description Size 0x00_7E80_0000 0x00_7E80_FFFF IFC - NAND Flash 64KB 0x00_7FB0_0000 0x00_7FB0_0FFF IFC - FPGA 4KB 0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB + +LS1021a rev1.0 Soc specific Options/Settings +-------------------------------------------- +If the LS1021a Soc is rev1.0, you need modify the configure file. +Add the following define in include/configs/ls1021aqds.h: +#define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/board/freescale/ls1021atwr/README b/board/freescale/ls1021atwr/README index d2821cbb6ba..896a6594768 100644 --- a/board/freescale/ls1021atwr/README +++ b/board/freescale/ls1021atwr/README @@ -107,3 +107,9 @@ Start Address End Address Description Size 0x00_4000_0000 0x00_5FFF_FFFF QSPI 512MB 0x00_6000_0000 0x00_67FF_FFFF IFC - NOR Flash 128MB 0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB + +LS1021a rev1.0 Soc specific Options/Settings +-------------------------------------------- +If the LS1021a Soc is rev1.0, you need modify the configure file. +Add the following define in include/configs/ls1021atwr.h: +#define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 0d72e6993d5..58d927cc1c4 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -18,7 +18,6 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DEEP_SLEEP diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index e5ac50e4eec..c6294e0e7a7 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -18,7 +18,6 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DEEP_SLEEP #ifdef CONFIG_DEEP_SLEEP -- cgit v1.3.1 From abd9c1bbfbdc9fbef0f178321c43e6fac108520a Mon Sep 17 00:00:00 2001 From: Sumit Garg Date: Wed, 7 Sep 2016 12:17:34 -0400 Subject: fsl_sfp : Modify macros as per changes in SFP v3.4 SFP v3.4 supports 8 keys in SRK table which leads to corresponding changes in OSPR key revocation field. So modify OSPR_KEY_REVOC_XXX macros accordingly. Signed-off-by: Sumit Garg Reviewed-by: York Sun --- include/fsl_sfp.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/fsl_sfp.h b/include/fsl_sfp.h index 2976a2cbef6..d3a28134709 100644 --- a/include/fsl_sfp.h +++ b/include/fsl_sfp.h @@ -78,9 +78,16 @@ struct ccsr_sfp_regs { u32 fsl_uid; /* 0xB0 FSL Unique ID */ }; #endif + #define ITS_MASK 0x00000004 #define ITS_BIT 2 -#define OSPR_KEY_REVOC_SHIFT 13 -#define OSPR_KEY_REVOC_MASK 0x0000e000 + +#if defined(CONFIG_SYS_FSL_SFP_VER_3_4) +#define OSPR_KEY_REVOC_SHIFT 9 +#define OSPR_KEY_REVOC_MASK 0x0000fe00 +#else +#define OSPR_KEY_REVOC_SHIFT 13 +#define OSPR_KEY_REVOC_MASK 0x0000e000 +#endif /* CONFIG_SYS_FSL_SFP_VER_3_4 */ #endif -- cgit v1.3.1 From adee1d4c9eb16a49ec1396b3367d027b7c3d2940 Mon Sep 17 00:00:00 2001 From: Hongbo Zhang Date: Wed, 21 Sep 2016 18:31:04 +0800 Subject: ARMv7: LS102xA: Move two macros from header files to Kconfig Following commits 217f92b and 1544698, these two config CPU_V7_HAS_NONSEC and CPU_V7_HAS_VIRT are moved to Kconfig, for correctly select ARMV7_PSCI. Signed-off-by: Hongbo Zhang [York Sun: Reformatted commit message] Reviewed-by: York Sun --- arch/arm/Kconfig | 4 ++++ include/configs/ls1021aqds.h | 2 -- include/configs/ls1021atwr.h | 2 -- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f55d5b2cd74..ddc7d7b0330 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -736,6 +736,8 @@ config TARGET_LS1012AFRDM config TARGET_LS1021AQDS bool "Support ls1021aqds" select CPU_V7 + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT select SUPPORT_SPL select ARCH_LS1021A select ARCH_SUPPORT_PSCI @@ -744,6 +746,8 @@ config TARGET_LS1021AQDS config TARGET_LS1021ATWR bool "Support ls1021atwr" select CPU_V7 + select CPU_V7_HAS_NONSEC + select CPU_V7_HAS_VIRT select SUPPORT_SPL select ARCH_LS1021A select ARCH_SUPPORT_PSCI diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 58d927cc1c4..7cf8253e06f 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -543,8 +543,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_CMDLINE_TAG #define CONFIG_CMDLINE_EDITING -#define CONFIG_ARMV7_NONSEC -#define CONFIG_ARMV7_VIRT #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index c6294e0e7a7..023143c9212 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -415,8 +415,6 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_CMDLINE_EDITING -#define CONFIG_ARMV7_NONSEC -#define CONFIG_ARMV7_VIRT #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -- cgit v1.3.1 From fb2bf8c2c6c5e80a941987d7c8abcf47c825f942 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 4 Oct 2016 14:31:48 -0700 Subject: arm: Move FSL_LSCH2 FSL_LSCH3 to Kconfig Move these options to Kconfig and create a sub-menu to avoid name conflict with other architectures. Signed-off-by: York Sun Reviewed-by: Simon Glass --- arch/arm/Kconfig | 4 ++++ arch/arm/cpu/armv7/ls102xa/Kconfig | 8 ++++++++ arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 15 +++++++++++++++ include/configs/ls1012a_common.h | 1 - include/configs/ls1043a_common.h | 1 - include/configs/ls1046a_common.h | 1 - include/configs/ls2080a_common.h | 1 - scripts/config_whitelist.txt | 2 -- 8 files changed, 27 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ddc7d7b0330..5f185e1eba6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -652,6 +652,7 @@ config TARGET_VEXPRESS64_JUNO config TARGET_LS2080A_EMU bool "Support ls2080a_emu" + select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY help @@ -662,6 +663,7 @@ config TARGET_LS2080A_EMU config TARGET_LS2080A_SIMU bool "Support ls2080a_simu" + select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY help @@ -672,6 +674,7 @@ config TARGET_LS2080A_SIMU config TARGET_LS2080AQDS bool "Support ls2080aqds" + select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY select SUPPORT_SPL @@ -683,6 +686,7 @@ config TARGET_LS2080AQDS config TARGET_LS2080ARDB bool "Support ls2080ardb" + select ARCH_LS2080A select ARM64 select ARMV8_MULTIENTRY select SUPPORT_SPL diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index f0e7ae97e1c..2648416629d 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -2,6 +2,14 @@ config ARCH_LS1021A bool select SYS_FSL_ERRATUM_A010315 +menu "LS102xA architecture" + depends on ARCH_LS1021A + config LS1_DEEP_SLEEP bool "Deep sleep" depends on ARCH_LS1021A + +config SYS_FSL_ERRATUM_A010315 + bool "Workaround for PCIe erratum A010315" + +endmenu diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 9386b062bd2..d2b1be87f92 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -1,19 +1,32 @@ config ARCH_LS1012A bool + select FSL_LSCH2 select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 config ARCH_LS1043A bool + select FSL_LSCH2 select SYS_FSL_ERRATUM_A010315 select SYS_FSL_ERRATUM_A010539 config ARCH_LS1046A bool + select FSL_LSCH2 select SYS_FSL_ERRATUM_A010539 config ARCH_LS2080A bool + select FSL_LSCH3 + +config FSL_LSCH2 + bool + +config FSL_LSCH3 + bool + +menu "Layerscape architecture" + depends on FSL_LSCH2 || FSL_LSCH3 config SYS_FSL_MMDC bool @@ -23,3 +36,5 @@ config SYS_FSL_ERRATUM_A010315 config SYS_FSL_ERRATUM_A010539 bool "Workaround for PIN MUX erratum A010539" + +endmenu diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 5fb6c477b40..1056755b417 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -8,7 +8,6 @@ #define __LS1012A_COMMON_H #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_FSL_LSCH2 #define CONFIG_GICV2 #define CONFIG_SYS_HAS_SERDES diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index ed0e434702a..ac86c08ee41 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -9,7 +9,6 @@ #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_FSL_LSCH2 #define CONFIG_LS1043A #define CONFIG_MP #define CONFIG_SYS_FSL_CLK diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 7c5e6350e29..ec6c908d4b9 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -9,7 +9,6 @@ #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_FSL_LSCH2 #define CONFIG_MP #define CONFIG_SYS_FSL_CLK #define CONFIG_GICV2 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 42d02986ee9..d9eea0928f5 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -9,7 +9,6 @@ #define CONFIG_REMAKE_ELF #define CONFIG_FSL_LAYERSCAPE -#define CONFIG_FSL_LSCH3 #define CONFIG_MP #define CONFIG_GICV3 #define CONFIG_FSL_TZPC_BP147 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index efa95f07ae7..d717103caca 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1299,8 +1299,6 @@ CONFIG_FSL_LAW CONFIG_FSL_LAYERSCAPE CONFIG_FSL_LBC CONFIG_FSL_LINFLEXUART -CONFIG_FSL_LSCH2 -CONFIG_FSL_LSCH3 CONFIG_FSL_LS_PPA CONFIG_FSL_MC9SDZ60 CONFIG_FSL_MC_ENET -- cgit v1.3.1 From f534b8f5fdabfbe47c9c741864ed52e945afbd27 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 4 Oct 2016 18:01:34 -0700 Subject: arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to Kconfig Move these options to Kconfig and clean up existing uses. Signed-off-by: York Sun Reviewed-by: Simon Glass --- arch/arm/cpu/armv7/ls102xa/Kconfig | 11 +++++++++++ arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 16 ++++++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 5 ----- arch/arm/include/asm/arch-ls102xa/config.h | 2 -- include/configs/ls1012a_common.h | 2 -- include/configs/ls1021aqds.h | 2 -- include/configs/ls1021atwr.h | 2 -- include/configs/ls1043a_common.h | 3 --- include/configs/ls1043aqds.h | 2 -- include/configs/ls1046a_common.h | 3 --- include/configs/ls1046aqds.h | 2 -- include/configs/ls2080a_common.h | 3 --- 12 files changed, 27 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 88983f4c181..17f19758a69 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -1,6 +1,8 @@ config ARCH_LS1021A bool select SYS_FSL_ERRATUM_A010315 + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES menu "LS102xA architecture" depends on ARCH_LS1021A @@ -23,6 +25,15 @@ config MAX_CPUS config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" +config SYS_FSL_SRDS_1 + bool + +config SYS_FSL_SRDS_2 + bool + +config SYS_HAS_SERDES + bool + config SYS_FSL_IFC_BANK_COUNT int "Maximum banks of Integrated flash controller" depends on ARCH_LS1021A diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 7aae39727ef..28589aea8f1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -14,16 +14,23 @@ config ARCH_LS1046A bool select FSL_LSCH2 select SYS_FSL_ERRATUM_A010539 + select SYS_FSL_SRDS_2 config ARCH_LS2080A bool select FSL_LSCH3 + select SYS_FSL_HAS_DP_DDR + select SYS_FSL_SRDS_2 config FSL_LSCH2 bool + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES config FSL_LSCH3 bool + select SYS_FSL_SRDS_1 + select SYS_HAS_SERDES menu "Layerscape architecture" depends on FSL_LSCH2 || FSL_LSCH3 @@ -65,4 +72,13 @@ config SYS_FSL_IFC_BANK_COUNT config SYS_FSL_HAS_DP_DDR bool +config SYS_FSL_SRDS_1 + bool + +config SYS_FSL_SRDS_2 + bool + +config SYS_HAS_SERDES + bool + endmenu diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 6ee75cb4e83..3039e72b04e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -32,8 +32,6 @@ #ifdef CONFIG_LS2080A #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 } #define SRDS_MAX_LANES 8 -#define CONFIG_SYS_FSL_SRDS_1 -#define CONFIG_SYS_FSL_SRDS_2 #define CONFIG_SYS_PAGE_SIZE 0x10000 #ifndef L1_CACHE_BYTES #define L1_CACHE_SHIFT 6 @@ -162,8 +160,6 @@ #define CONFIG_SYS_FSL_PEX_LUT_BE #define CONFIG_SYS_FSL_SEC_BE -#define CONFIG_SYS_FSL_SRDS_1 - /* SoC related */ #ifdef CONFIG_LS1043A #define CONFIG_SYS_FMAN_V3 @@ -212,7 +208,6 @@ #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE -#define CONFIG_SYS_FSL_SRDS_2 #define CONFIG_SYS_FSL_IFC_BE #define CONFIG_SYS_FSL_SFP_VER_3_2 #define CONFIG_SYS_FSL_SNVS_LE diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 70cc7039f2a..dfcb54600d7 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -120,8 +120,6 @@ #define DCU_LAYER_MAX_NUM 16 -#define CONFIG_SYS_FSL_SRDS_1 - #ifdef CONFIG_LS102XA #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_NUM_DDR_CONTROLLERS 1 diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 1056755b417..ced8eadebee 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -10,8 +10,6 @@ #define CONFIG_FSL_LAYERSCAPE #define CONFIG_GICV2 -#define CONFIG_SYS_HAS_SERDES - #include #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 7cf8253e06f..d6945be1f37 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -142,8 +142,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_SYS_HAS_SERDES - #define CONFIG_FSL_CAAM /* Enable CAAM */ #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 023143c9212..511f573e8f1 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -169,8 +169,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_HAS_SERDES - #define CONFIG_FSL_CAAM /* Enable CAAM */ #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index ac86c08ee41..3a85b6a8efd 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -15,9 +15,6 @@ #define CONFIG_GICV2 #include -#ifdef CONFIG_SYS_FSL_SRDS_1 -#define CONFIG_SYS_HAS_SERDES -#endif /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index a80e33db542..b18fcc0c2f5 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -52,8 +52,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_SYS_HAS_SERDES - #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_FMAN_ENET #define CONFIG_PHYLIB diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index ec6c908d4b9..c4bbd5600d3 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -14,9 +14,6 @@ #define CONFIG_GICV2 #include -#ifdef CONFIG_SYS_FSL_SRDS_1 -#define CONFIG_SYS_HAS_SERDES -#endif /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 2e5c2f181ff..d1adf3f3e2c 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -49,8 +49,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_SYS_HAS_SERDES - /* DSPI */ #ifdef CONFIG_FSL_DSPI #define CONFIG_SPI_FLASH_STMICRO /* cs0 */ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index d9eea0928f5..187aee14691 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -15,9 +15,6 @@ #include #include -#if (defined(CONFIG_SYS_FSL_SRDS_1) || defined(CONFIG_SYS_FSL_SRDS_2)) -#define CONFIG_SYS_HAS_SERDES -#endif /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) -- cgit v1.3.1 From 24aaa09452162c18921d8771ac29d13be1e5dc0d Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 4 Oct 2016 18:03:08 -0700 Subject: armv8: fsl-layerscape: Move DDR config options to Kconfig Move DDR3, DDR4 and realted options to Kconfig and clean up existing uses. Signed-off-by: York Sun Reviewed-by: Simon Glass --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 54 +++++++++++++++++++++++ arch/arm/include/asm/arch-fsl-layerscape/config.h | 14 ------ configs/ls1043aqds_defconfig | 2 +- configs/ls1043aqds_lpuart_defconfig | 3 +- configs/ls1043aqds_nand_defconfig | 3 +- configs/ls1043aqds_nor_ddr3_defconfig | 1 + configs/ls1043aqds_qspi_defconfig | 3 +- configs/ls1043aqds_sdcard_ifc_defconfig | 3 +- configs/ls1043aqds_sdcard_qspi_defconfig | 3 +- configs/ls1043ardb_SECURE_BOOT_defconfig | 3 +- configs/ls1043ardb_defconfig | 2 +- configs/ls1043ardb_nand_defconfig | 3 +- configs/ls1043ardb_sdcard_defconfig | 3 +- include/configs/ls1043a_common.h | 4 -- include/configs/ls1043aqds.h | 3 -- include/configs/ls2080a_common.h | 1 - 16 files changed, 73 insertions(+), 32 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 28589aea8f1..94ec8d502b9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -1,24 +1,33 @@ config ARCH_LS1012A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE select SYS_FSL_MMDC select SYS_FSL_ERRATUM_A010315 config ARCH_LS1043A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE + select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A010315 select SYS_FSL_ERRATUM_A010539 config ARCH_LS1046A bool select FSL_LSCH2 + select SYS_FSL_DDR_BE + select SYS_FSL_DDR4 + select SYS_FSL_DDR_VER_50 select SYS_FSL_ERRATUM_A010539 select SYS_FSL_SRDS_2 config ARCH_LS2080A bool select FSL_LSCH3 + select SYS_FSL_DDR4 + select SYS_FSL_DDR_LE + select SYS_FSL_DDR_VER_50 select SYS_FSL_HAS_DP_DDR select SYS_FSL_SRDS_2 @@ -81,4 +90,49 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool +config SYS_FSL_DDR + bool "Freescale DDR driver" + help + Select Freescale General DDR driver, shared between most Freescale + PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- + based Layerscape SoCs (such as ls2080a). + +config SYS_FSL_DDR_BE + bool + help + Access DDR registers in big-endian. + +config SYS_FSL_DDR_LE + bool + help + Access DDR registers in little-endian. + +config SYS_FSL_DDR_VER + int + default 50 if SYS_FSL_DDR_VER_50 + +config SYS_FSL_DDR_VER_50 + bool + +config SYS_FSL_DDRC_ARM_GEN3 + bool + +config SYS_FSL_DDRC_GEN4 + bool + +config SYS_FSL_DDR3 + bool "Freescale DDR3 controller" + depends on !SYS_FSL_DDR4 + select SYS_FSL_DDR + select SYS_FSL_DDRC_ARM_GEN3 + help + Enable Freescale DDR3 controller on ARM-based SoCs. + +config SYS_FSL_DDR4 + bool "Freescale DDR4 controller" + select SYS_FSL_DDR + select SYS_FSL_DDRC_GEN4 + help + Enable Freescale DDR4 controller. + endmenu diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 3039e72b04e..4201e0fbec4 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -12,17 +12,6 @@ #define CONFIG_STANDALONE_LOAD_ADDR 0x80300000 -#ifdef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDRC_GEN4 -#else -#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 /* Enable Freescale ARM DDR3 driver */ -#endif - -#ifndef CONFIG_ARCH_LS1012A -#define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */ -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 -#endif - /* * Reserve secure memory * To be aligned with MMU block size @@ -42,7 +31,6 @@ #define CONFIG_SYS_FSL_OCRAM_SIZE 0x00200000 /* 2M */ /* DDR */ -#define CONFIG_SYS_FSL_DDR_LE #define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE @@ -166,7 +154,6 @@ #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 7 #define CONFIG_SYS_NUM_FM1_10GEC 1 -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE @@ -204,7 +191,6 @@ #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_NUM_FM1_DTSEC 8 #define CONFIG_SYS_NUM_FM1_10GEC 2 -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index 243ef689287..9352d82350b 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 32c8122278c..d38498513c1 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -4,7 +4,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 24f378e07ef..75e53f2cb6d 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 01f4a7a0c24..1103346c0eb 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_SPI_FLASH=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_NS16550=y CONFIG_DM_SPI=y CONFIG_USB=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index 54e57bba737..94c602c0a91 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -4,7 +4,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,QSPI_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 82a57fd329c..d2cdd8cb018 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 59dffc99979..463d317f54c 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SYS_FSL_DDR4=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index d2f80a8a107..262769d2812 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, SECURE_BOOT" +CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 66d3653a021..e1b75ac1257 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -4,7 +4,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=10 CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index ce8960285d4..3d39e182472 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 50f8532ef30..f1edf35f26b 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -12,7 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SYS_FSL_DDR4=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 3a85b6a8efd..0fd69bff4b9 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -24,10 +24,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_BOARD_EARLY_INIT_F 1 -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ -#endif - #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index b18fcc0c2f5..b80e3165a98 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -42,9 +42,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ -#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ -#endif #define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 187aee14691..3dd4da840db 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -46,7 +46,6 @@ #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #endif #ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ #define CONFIG_SYS_DDR_RAW_TIMING #endif -- cgit v1.3.1 From 53d76829d517135381ee94519828128206e70db6 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 4 Oct 2016 18:04:37 -0700 Subject: armv7: ls1021a: Move DDR config options to Kconfig Move DDR3, DDR4 and related config options to Kconfig and clean up existing uses. Signed-off-by: York Sun Reviewed-by: Simon Glass --- arch/arm/cpu/armv7/ls102xa/Kconfig | 47 ++++++++++++++++++++++++++++ arch/arm/include/asm/arch-ls102xa/config.h | 10 ------ configs/ls1021aqds_ddr4_nor_defconfig | 2 +- configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 3 +- configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + include/configs/ls1021aqds.h | 1 - 12 files changed, 57 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 17f19758a69..28bf778d9ce 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -3,6 +3,8 @@ config ARCH_LS1021A select SYS_FSL_ERRATUM_A010315 select SYS_FSL_SRDS_1 select SYS_HAS_SERDES + select SYS_FSL_DDR_BE + select SYS_FSL_DDR_VER_50 menu "LS102xA architecture" depends on ARCH_LS1021A @@ -22,6 +24,10 @@ config MAX_CPUS cores, count the reserved ports. This will allocate enough memory in spin table to properly handle all cores. +config NUM_DDR_CONTROLLERS + int "Maximum DDR controllers" + default 1 + config SYS_FSL_ERRATUM_A010315 bool "Workaround for PCIe erratum A010315" @@ -34,6 +40,47 @@ config SYS_FSL_SRDS_2 config SYS_HAS_SERDES bool +config SYS_FSL_DDR + bool "Freescale DDR driver" + help + Select Freescale General DDR driver, shared between most Freescale + PowerPC- based SoCs (such as mpc83xx, mpc85xx, mpc86xx) and ARM- + based Layerscape SoCs (such as ls2080a). + +config SYS_FSL_DDR_BE + bool + default y + help + Access DDR registers in big-endian. + +config SYS_FSL_DDR_VER + int + default 50 if SYS_FSL_DDR_VER_50 + +config SYS_FSL_DDR_VER_50 + bool + +config SYS_FSL_DDRC_ARM_GEN3 + bool + +config SYS_FSL_DDRC_GEN4 + bool + +config SYS_FSL_DDR3 + bool "Freescale DDR3 controller" + depends on !SYS_FSL_DDR4 + select SYS_FSL_DDR + select SYS_FSL_DDRC_ARM_GEN3 + help + Enable Freescale DDR3 controller on ARM-based SoCs. + +config SYS_FSL_DDR4 + bool "Freescale DDR4 controller" + select SYS_FSL_DDR + select SYS_FSL_DDRC_GEN4 + help + Enable Freescale DDR4 controller. + config SYS_FSL_IFC_BANK_COUNT int "Maximum banks of Integrated flash controller" depends on ARCH_LS1021A diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index dfcb54600d7..ec65cc0bb2b 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -94,14 +94,7 @@ #define CONFIG_SYS_FSL_ERRATUM_A008407 #ifdef CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR_BE #define CONFIG_VERY_BIG_RAM -#ifdef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDRC_GEN4 -#else -#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 -#endif -#define CONFIG_SYS_FSL_DDR #define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS1_DDR_BLOCK1_SIZE #endif @@ -121,9 +114,6 @@ #define DCU_LAYER_MAX_NUM 16 #ifdef CONFIG_LS102XA -#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 -#define CONFIG_NUM_DDR_CONTROLLERS 1 -#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 #define CONFIG_SYS_FSL_SEC_COMPAT 5 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_SYS_FSL_ERRATUM_A008378 diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 8761b60c644..b746ad73ce1 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -5,7 +5,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index 5bb475ec458..b6df3056cea 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -5,7 +5,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" +CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_SYS_FSL_DDR4=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 628f2d5e225..3beda1edde8 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -13,6 +13,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT" +CONFIG_SYS_FSL_DDR3=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index b511eb0ae02..03e7bb24305 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" +CONFIG_SYS_FSL_DDR3=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index a59d339cac0..66fdc5b10a4 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -25,6 +25,7 @@ CONFIG_DM=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_DM_SERIAL=y +CONFIG_SYS_FSL_DDR3=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index c7db8b7108a..6db90ff9d24 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="LPUART" +CONFIG_SYS_FSL_DDR3=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 49c88a67046..be2c05e169d 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -6,6 +6,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_SYS_FSL_DDR3=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index f856ad7bf4c..d76606fa44c 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT" +CONFIG_SYS_FSL_DDR3=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 09df451b44a..4fcc92c5b77 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" +CONFIG_SYS_FSL_DDR3=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index d6945be1f37..f6a3ae5efc3 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -127,7 +127,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ #ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ #define CONFIG_SYS_DDR_RAW_TIMING #endif #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -- cgit v1.3.1 From 88a62685b02d19e372cfaa0acf0a0ad54dd55867 Mon Sep 17 00:00:00 2001 From: Pratiyush Srivastava Date: Fri, 7 Oct 2016 23:07:36 +0530 Subject: armv8: ls1012a: Updating CONFIG_EXTRA_ENV_SETTINGS Remove ramdisk_addr, ramdisk_size and update UART baud-rate. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Pratiyush Mohan Srivastava Reviewed-by: York Sun --- include/configs/ls1012a_common.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index ced8eadebee..5beca458c75 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -102,19 +102,14 @@ /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "initrd_high=0xffffffff\0" \ "verify=no\0" \ - "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x80100000\0" \ "kernel_addr=0x100000\0" \ - "ramdisk_addr=0x800000\0" \ - "ramdisk_size=0x2000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_start=0xa00000\0" \ "kernel_load=0xa0000000\0" \ "kernel_size=0x2800000\0" \ - "console=ttyAMA0,38400n8\0" #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ "earlycon=uart8250,mmio,0x21c0500" -- cgit v1.3.1 From 76379dfb7e7e5092f32c79897bb58c19979e576b Mon Sep 17 00:00:00 2001 From: Pratiyush Srivastava Date: Fri, 7 Oct 2016 23:08:38 +0530 Subject: board: ls1012afrdm: overwrite CONFIG_EXTRA_ENV_SETTINGS LS1012AFRDM has 512MB of DDR. So update kernel load address to 0x96000000. Signed-off-by: Prabhakar Kushwaha Signed-off-by: Pratiyush Mohan Srivastava [York Sun: Reformatted commit message] Reviewed-by: York Sun --- include/configs/ls1012afrdm.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 612f243eeca..f6f88e84c73 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -20,6 +20,17 @@ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END 0x9fffffff +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=no\0" \ + "loadaddr=0x80100000\0" \ + "kernel_addr=0x100000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_start=0xa00000\0" \ + "kernel_load=0x96000000\0" \ + "kernel_size=0x2800000\0" + /* * USB */ -- cgit v1.3.1