From 7576ab2facae92f4062f88c4f643e2548e112437 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 6 Nov 2023 12:56:47 +0100 Subject: riscv: Add support for AMD/Xilinx MicroBlaze V MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Padmarao Begari --- include/configs/xilinx_mbv.h | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 include/configs/xilinx_mbv.h (limited to 'include') diff --git a/include/configs/xilinx_mbv.h b/include/configs/xilinx_mbv.h new file mode 100644 index 00000000000..dba398aeec4 --- /dev/null +++ b/include/configs/xilinx_mbv.h @@ -0,0 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2023, Advanced Micro Devices, Inc. + * + * Michal Simek + */ -- cgit v1.2.3