From 763bb106f66c147b7d0c3046dbba66a07d7a9dd2 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Fri, 29 Mar 2019 15:42:20 +0100 Subject: usb: dwc2_udc_otg: Add tx_fifo_sz array support All TX fifo size can be different, add tx_fifo_sz_array[] into dwc2_plat_otg_data to be able to set them. tx_fifo_sz_array[] is 17 Bytes long and can contains max 16 tx fifo size (synopsys IP supports max 16 IN endpoints). First entry of tx_fifo_sz_array[] is the number of valid fifo size the array contains. In case of tx_fifo_sz_array[] doesn't contains the same number of element than max hardware endpoint, display a warning message. Compatibility with board which doesn't use tx_fifo_sz_array[] (Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept. Signed-off-by: Patrice Chotard Signed-off-by: Patrick Delaunay Reviewed-by: Lukasz Majewski --- include/usb/dwc2_udc.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/usb/dwc2_udc.h b/include/usb/dwc2_udc.h index 8a426b631ef..369f6fbd4ad 100644 --- a/include/usb/dwc2_udc.h +++ b/include/usb/dwc2_udc.h @@ -9,6 +9,7 @@ #define __DWC2_USB_GADGET #define PHY0_SLEEP (1 << 5) +#define DWC2_MAX_HW_ENDPOINTS 16 struct dwc2_plat_otg_data { void *priv; @@ -22,6 +23,8 @@ struct dwc2_plat_otg_data { unsigned int rx_fifo_sz; unsigned int np_tx_fifo_sz; unsigned int tx_fifo_sz; + unsigned int tx_fifo_sz_array[DWC2_MAX_HW_ENDPOINTS]; + unsigned char tx_fifo_sz_nb; bool force_b_session_valid; }; -- cgit v1.3.1