From 7d84ad1da0e32f4525cee9b35bc5a4f3b5585ed8 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Fri, 14 Jun 2024 18:18:10 +0530 Subject: env_spi: support overriding spi dev from board code This enables boards to choose where to/from the environment should be saved/loaded. They can then for example support using the same device (dynamically) from which the bootloader was launched to load and save env data and do not have to define CONFIG_ENV_SPI_BUS statically. In my use case, the environment needs to be on the same device I booted from. It can be the QSPI or OSPI device. I therefore would override spi_get_env_dev in the board code, read the bootmode registers to determine where we booted from and return the corresponding device index. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20240614124811.22945-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek # Move spi_get_env_dev to sf.c --- include/spi.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/spi.h b/include/spi.h index 7e38cc2a2ad..9e9851284c8 100644 --- a/include/spi.h +++ b/include/spi.h @@ -743,4 +743,6 @@ int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep, #define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops) #define spi_emul_get_ops(dev) ((struct dm_spi_emul_ops *)(dev)->driver->ops) +int spi_get_env_dev(void); + #endif /* _SPI_H_ */ -- cgit v1.3.1 From 8bfbc09aef8a443d2e5b9d1c7fb8961b831416bf Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Wed, 19 Jun 2024 12:47:30 +0530 Subject: arm64: versal2: Add support for mini configuration Versal2 mini configuration is designed for running memory test. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20240619071733.10256-2-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- arch/arm/dts/amd-versal2-mini.dts | 11 ++++++ configs/amd_versal2_mini_defconfig | 77 ++++++++++++++++++++++++++++++++++++++ include/configs/amd_versal2_mini.h | 20 ++++++++++ 3 files changed, 108 insertions(+) create mode 100644 arch/arm/dts/amd-versal2-mini.dts create mode 100644 configs/amd_versal2_mini_defconfig create mode 100644 include/configs/amd_versal2_mini.h (limited to 'include') diff --git a/arch/arm/dts/amd-versal2-mini.dts b/arch/arm/dts/amd-versal2-mini.dts new file mode 100644 index 00000000000..ac685772da2 --- /dev/null +++ b/arch/arm/dts/amd-versal2-mini.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Empty device tree for amd-versal2-mini + * + * Copyright (C) 2024, Advanced Micro Devices, Inc. + */ + +/dts-v1/; + +/ { +}; diff --git a/configs/amd_versal2_mini_defconfig b/configs/amd_versal2_mini_defconfig new file mode 100644 index 00000000000..0dd2305bfb2 --- /dev/null +++ b/configs/amd_versal2_mini_defconfig @@ -0,0 +1,77 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="amd_versal2_mini" +# CONFIG_ARM64_CRC32 is not set +CONFIG_COUNTER_FREQUENCY=100000000 +# CONFIG_ARM64_SUPPORT_AARCH32 is not set +CONFIG_ARCH_VERSAL2=y +CONFIG_TEXT_BASE=0xBBF00000 +CONFIG_SYS_MALLOC_LEN=0x20000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF20000 +CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="amd-versal2-mini" +CONFIG_DEBUG_UART_BASE=0xf1920000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_SYS_MEM_RSVD_FOR_MMU=y +# CONFIG_PSCI_RESET is not set +CONFIG_SYS_LOAD_ADDR=0xBBF80000 +CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00001000 +# CONFIG_EXPERT is not set +CONFIG_REMAKE_ELF=y +# CONFIG_LEGACY_IMAGE_FORMAT is not set +# CONFIG_AUTOBOOT is not set +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_BOARD_LATE_INIT is not set +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_PROMPT="versal2> " +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_FDT is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MX_CYCLIC=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +# CONFIG_CMD_SLEEP is not set +CONFIG_OF_EMBED=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +# CONFIG_NET is not set +# CONFIG_DM_DEVICE_REMOVE is not set +# CONFIG_GPIO is not set +# CONFIG_I2C is not set +# CONFIG_INPUT is not set +# CONFIG_MMC is not set +# CONFIG_POWER is not set +CONFIG_DEBUG_UART_PL011=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_ARM_DCC=y +CONFIG_PL01X_SERIAL=y +# CONFIG_GZIP is not set diff --git a/include/configs/amd_versal2_mini.h b/include/configs/amd_versal2_mini.h new file mode 100644 index 00000000000..97e8f673a83 --- /dev/null +++ b/include/configs/amd_versal2_mini.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Configuration for AMD Versal Gen2 MINI configuration + * + * Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#ifndef __CONFIG_VERSAL2_MINI_H +#define __CONFIG_VERSAL2_MINI_H + +#define CFG_EXTRA_ENV_SETTINGS + +#include + +/* Undef unneeded configs */ +#undef CFG_EXTRA_ENV_SETTINGS + +#endif /* __CONFIG_VERSAL2_MINI_H */ -- cgit v1.3.1 From 5389564b521490f8e97299c2f82e26cbf75fc796 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 30 Jul 2024 15:50:17 +0200 Subject: ARM: zynq: Add support for 7z010_lr and 7z020_lr Add support for *_lr SOCs. Without this change chips are not going to be properly identified and bitstream programming won't work. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/14d8905a89d1b31fbb2318512cf57eb0256c11be.1722347416.git.michal.simek@amd.com --- arch/arm/mach-zynq/cpu.c | 2 ++ include/zynqpl.h | 6 ++++++ 2 files changed, 8 insertions(+) (limited to 'include') diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c index c75e453d573..5b6d765099d 100644 --- a/arch/arm/mach-zynq/cpu.c +++ b/arch/arm/mach-zynq/cpu.c @@ -36,9 +36,11 @@ static const struct { } zynq_fpga_descs[] = { ZYNQ_DESC(7Z007S), ZYNQ_DESC(7Z010), + ZYNQ_DESC(7Z010_LR), ZYNQ_DESC(7Z012S), ZYNQ_DESC(7Z014S), ZYNQ_DESC(7Z015), + ZYNQ_DESC(7Z020_LR), ZYNQ_DESC(7Z020), ZYNQ_DESC(7Z030), ZYNQ_DESC(7Z035), diff --git a/include/zynqpl.h b/include/zynqpl.h index d7dc064585e..08d067d8757 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -20,9 +20,11 @@ extern struct xilinx_fpga_op zynq_op; #define XILINX_ZYNQ_XC7Z007S 0x3 #define XILINX_ZYNQ_XC7Z010 0x2 +#define XILINX_ZYNQ_XC7Z010_LR 0x4 #define XILINX_ZYNQ_XC7Z012S 0x1c #define XILINX_ZYNQ_XC7Z014S 0x8 #define XILINX_ZYNQ_XC7Z015 0x1b +#define XILINX_ZYNQ_XC7Z020_LR 0x9 #define XILINX_ZYNQ_XC7Z020 0x7 #define XILINX_ZYNQ_XC7Z030 0xc #define XILINX_ZYNQ_XC7Z035 0x12 @@ -32,9 +34,11 @@ extern struct xilinx_fpga_op zynq_op; /* Device Image Sizes */ #define XILINX_XC7Z007S_SIZE 16669920/8 #define XILINX_XC7Z010_SIZE 16669920/8 +#define XILINX_XC7Z010_LR_SIZE 16669920/8 #define XILINX_XC7Z012S_SIZE 28085344/8 #define XILINX_XC7Z014S_SIZE 32364512/8 #define XILINX_XC7Z015_SIZE 28085344/8 +#define XILINX_XC7Z020_LR_SIZE 32364512/8 #define XILINX_XC7Z020_SIZE 32364512/8 #define XILINX_XC7Z030_SIZE 47839328/8 #define XILINX_XC7Z035_SIZE 106571232/8 @@ -44,9 +48,11 @@ extern struct xilinx_fpga_op zynq_op; /* Device Names */ #define XILINX_XC7Z007S_NAME "7z007s" #define XILINX_XC7Z010_NAME "7z010" +#define XILINX_XC7Z010_LR_NAME "xc7z010_lr" #define XILINX_XC7Z012S_NAME "7z012s" #define XILINX_XC7Z014S_NAME "7z014s" #define XILINX_XC7Z015_NAME "7z015" +#define XILINX_XC7Z020_LR_NAME "xa7z020_lr" #define XILINX_XC7Z020_NAME "7z020" #define XILINX_XC7Z030_NAME "7z030" #define XILINX_XC7Z035_NAME "7z035" -- cgit v1.3.1