From 54e0f96f764f662be186baae7d6c2c97423bc29d Mon Sep 17 00:00:00 2001 From: Guillaume GARDET Date: Tue, 16 Jun 2015 11:48:48 +0200 Subject: mx53loco: Use generic 'load' command instead of 'fatload' This patch uses generic 'load' command instead of 'fatload' for 'loadbootscript', 'loadimage' and 'loadfdt' for mx53loco board. This allows to use EXT partition instead of FAT, while keeping FAT compatibility. Signed-off-by: Guillaume GARDET Cc: Jason Liu Cc: Stefano Babic Acked-by: Jason Liu --- include/configs/mx53loco.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index db551a948c7..b3ac5e2c76d 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -43,6 +43,7 @@ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FS_GENERIC #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT2 #define CONFIG_DOS_PARTITION @@ -116,11 +117,11 @@ "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \ "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ - "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- cgit v1.3.1 From 3c73b0a49a5c974bb313f8087dd0cfc54ea90ad2 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 24 Jun 2015 17:09:46 +0100 Subject: imx6: standardise OCOTP and fuse config to mx6_common According to README.mxc_ocotp the OCOTP is a stanard i.MX6 SoC feature so centralise the config in mx6_common.h so functionality is standard across all boards Signed-off-by: Peter Robinson Acked-by: Stefano Babic --- include/configs/aristainetos-common.h | 3 --- include/configs/embestmx6boards.h | 5 ----- include/configs/gw_ventana.h | 5 ----- include/configs/mx6_common.h | 4 ++++ include/configs/mx6cuboxi.h | 2 -- include/configs/mx6sabre_common.h | 5 ----- include/configs/mx6slevk.h | 5 ----- include/configs/mx6sxsabresd.h | 5 ----- include/configs/nitrogen6x.h | 5 ----- include/configs/novena.h | 6 ------ include/configs/ot1200.h | 4 ---- include/configs/platinum.h | 4 ---- include/configs/tbs2910.h | 6 ------ include/configs/tqma6.h | 4 ---- include/configs/wandboard.h | 5 ----- include/configs/warp.h | 4 ---- 16 files changed, 4 insertions(+), 68 deletions(-) (limited to 'include') diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index dd012f1c3e3..4a5d4fb0802 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -26,9 +26,6 @@ #define CONFIG_MXC_UART -#define CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index cba58aa70f4..12744a61432 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -29,11 +29,6 @@ #define CONFIG_MXC_UART -#define CONFIG_CMD_FUSE -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* I2C Configs */ #define CONFIG_CMD_I2C #define CONFIG_SYS_I2C diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 902ec2c5362..df1ff434e50 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -165,11 +165,6 @@ #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ #define CONFIG_CMD_UBI #define CONFIG_RBTREE -#define CONFIG_CMD_FUSE /* eFUSE read/write support */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* Ethernet support */ #define CONFIG_FEC_MXC diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 86d7b167775..54ab890a790 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -111,4 +111,8 @@ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC +/* Fuses */ +#define CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP + #endif diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 3d5bba75d38..634a09f3492 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -20,8 +20,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT #define CONFIG_MXC_UART -#define CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 6c3c52e3e00..e42dfc90453 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -21,11 +21,6 @@ #define CONFIG_MXC_UART -#define CONFIG_CMD_FUSE -#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) -#define CONFIG_MXC_OCOTP -#endif - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index a7da111ee91..3cecd94039d 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -192,9 +192,4 @@ #define CONFIG_IMX6_THERMAL -#define CONFIG_CMD_FUSE -#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) -#define CONFIG_MXC_OCOTP -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 2b278a8ab4a..848bdcd674c 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -178,11 +178,6 @@ #define CONFIG_IMX6_THERMAL -#define CONFIG_CMD_FUSE -#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) -#define CONFIG_MXC_OCOTP -#endif - #define CONFIG_CMD_TIME #define CONFIG_FSL_QSPI diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 67a3c97f8bb..2e81ad46dae 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -26,11 +26,6 @@ #define CONFIG_USB_ETH_CDC #define CONFIG_NETCONSOLE -#define CONFIG_CMD_FUSE -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART2_BASE diff --git a/include/configs/novena.h b/include/configs/novena.h index d9b7250cad7..0970fd75483 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -25,7 +25,6 @@ #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #define CONFIG_FAT_WRITE -#define CONFIG_CMD_FUSE #define CONFIG_CMD_MII #define CONFIG_CMD_PCI #define CONFIG_CMD_PING @@ -118,11 +117,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 -/* OCOTP Configs */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* PCI express */ #ifdef CONFIG_CMD_PCI #define CONFIG_PCI diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index fb58acf5085..0d06fce1eb2 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -16,10 +16,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R -/* FUSE Configs */ -#define CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP - /* UART Configs */ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/platinum.h b/include/configs/platinum.h index fd1946160a3..d65143240b6 100644 --- a/include/configs/platinum.h +++ b/include/configs/platinum.h @@ -23,7 +23,6 @@ #define CONFIG_CMD_BMODE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_FUSE #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_MTDPARTS @@ -103,9 +102,6 @@ #define CONFIG_APBH_DMA_BURST #define CONFIG_APBH_DMA_BURST8 -/* Fuse support */ -#define CONFIG_MXC_OCOTP - /* Environment in NAND */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET (16 << 20) diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 42e58218074..5bc1209192a 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -173,12 +173,6 @@ #define CONFIG_I2C_EDID #endif -/* Fuses */ -#define CONFIG_CMD_FUSE -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - /* Environment organization */ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 2 diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index e0c4ada711d..bd93ec71327 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -100,10 +100,6 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ -/* Fuses */ -#define CONFIG_MXC_OCOTP -#define CONFIG_CMD_FUSE - #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index f05b55a0e29..f4e9cf20c53 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -84,11 +84,6 @@ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP -#define CONFIG_CMD_FUSE -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP -#endif - #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ diff --git a/include/configs/warp.h b/include/configs/warp.h index 48e2058f5f0..2331767b13a 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -94,10 +94,6 @@ #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 -/* Fuses */ -#define CONFIG_CMD_FUSE -#define CONFIG_MXC_OCOTP - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ -- cgit v1.3.1 From 452308c02bb5f4066c8d8650e9f012e17dbb2f95 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 6 Jul 2015 13:36:33 +0200 Subject: arm: mx6: tqma6: Add WRU-IV baseboard for the TQMa6 SoM This patch adds support for the "OHB System AG" baseboard with is equipped with the TQMa6S SoM. Signed-off-by: Stefan Roese Cc: Markus Niebel Cc: Stefano Babic --- board/tqc/tqma6/Kconfig | 5 + board/tqc/tqma6/Makefile | 1 + board/tqc/tqma6/tqma6_wru4.c | 346 ++++++++++++++++++++++++++++++++++++++ configs/tqma6s_wru4_mmc_defconfig | 12 ++ include/configs/tqma6.h | 2 + include/configs/tqma6_wru4.h | 71 ++++++++ 6 files changed, 437 insertions(+) create mode 100644 board/tqc/tqma6/tqma6_wru4.c create mode 100644 configs/tqma6s_wru4_mmc_defconfig create mode 100644 include/configs/tqma6_wru4.h (limited to 'include') diff --git a/board/tqc/tqma6/Kconfig b/board/tqc/tqma6/Kconfig index b56237d1875..dbd87875b52 100644 --- a/board/tqc/tqma6/Kconfig +++ b/board/tqc/tqma6/Kconfig @@ -64,6 +64,11 @@ config MBA6 Select the MBa6 starterkit. This features a GigE Phy, USB, SD-Card etc. +config WRU4 + bool "OHB WRU-IV" + help + Select the OHB Systems AG WRU-IV baseboard. + endchoice config IMX_CONFIG diff --git a/board/tqc/tqma6/Makefile b/board/tqc/tqma6/Makefile index 9ee6920abec..19b56d01658 100644 --- a/board/tqc/tqma6/Makefile +++ b/board/tqc/tqma6/Makefile @@ -7,3 +7,4 @@ obj-y := tqma6.o obj-$(CONFIG_MBA6) += tqma6_mba6.o +obj-$(CONFIG_WRU4) += tqma6_wru4.o diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c new file mode 100644 index 00000000000..4427799ca8f --- /dev/null +++ b/board/tqc/tqma6/tqma6_wru4.c @@ -0,0 +1,346 @@ +/* + * Copyright (C) 2012 Freescale Semiconductor, Inc. + * Author: Fabio Estevam + * + * Copyright (C) 2013, 2014 TQ Systems (ported SabreSD to TQMa6x) + * Author: Markus Niebel + * + * Copyright (C) 2015 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "tqma6_bb.h" + +/* UART */ +#define UART4_PAD_CTRL ( \ + PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_UP | \ + PAD_CTL_PUE | \ + PAD_CTL_PKE | \ + PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_SLOW \ + ) + +static iomux_v3_cfg_t const uart4_pads[] = { + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT17__UART4_CTS_B, UART4_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT16__UART4_RTS_B, UART4_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT13__UART4_RX_DATA, UART4_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT12__UART4_TX_DATA, UART4_PAD_CTRL), +}; + +static void setup_iomuxc_uart4(void) +{ + imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); +} + +/* MMC */ +#define USDHC2_PAD_CTRL ( \ + PAD_CTL_HYS | \ + PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST \ + ) + +#define USDHC2_CLK_PAD_CTRL ( \ + PAD_CTL_HYS | \ + PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST \ + ) + +static iomux_v3_cfg_t const usdhc2_pads[] = { + NEW_PAD_CTRL(MX6_PAD_SD2_CLK__SD2_CLK, USDHC2_CLK_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD2_CMD__SD2_CMD, USDHC2_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD2_DAT0__SD2_DATA0, USDHC2_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD2_DAT1__SD2_DATA1, USDHC2_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD2_DAT2__SD2_DATA2, USDHC2_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD2_DAT3__SD2_DATA3, USDHC2_PAD_CTRL), + + NEW_PAD_CTRL(MX6_PAD_GPIO_4__GPIO1_IO04, USDHC2_PAD_CTRL), /* CD */ + NEW_PAD_CTRL(MX6_PAD_GPIO_2__SD2_WP, USDHC2_PAD_CTRL), /* WP */ +}; + +#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) +#define USDHC2_WP_GPIO IMX_GPIO_NR(1, 2) + +static struct fsl_esdhc_cfg usdhc2_cfg = { + .esdhc_base = USDHC2_BASE_ADDR, + .max_bus_width = 4, +}; + +int tqma6_bb_board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + if (cfg->esdhc_base == USDHC2_BASE_ADDR) + ret = !gpio_get_value(USDHC2_CD_GPIO); + + return ret; +} + +int tqma6_bb_board_mmc_getwp(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + if (cfg->esdhc_base == USDHC2_BASE_ADDR) + ret = gpio_get_value(USDHC2_WP_GPIO); + + return ret; +} + +int tqma6_bb_board_mmc_init(bd_t *bis) +{ + int ret; + + imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + + ret = gpio_request(USDHC2_CD_GPIO, "mmc-cd"); + if (!ret) + gpio_direction_input(USDHC2_CD_GPIO); + ret = gpio_request(USDHC2_WP_GPIO, "mmc-wp"); + if (!ret) + gpio_direction_input(USDHC2_WP_GPIO); + + usdhc2_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + if(fsl_esdhc_initialize(bis, &usdhc2_cfg)) + puts("WARNING: failed to initialize SD\n"); + + return 0; +} + +/* Ethernet */ +#define ENET_PAD_CTRL ( \ + PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_UP | \ + PAD_CTL_PUE | \ + PAD_CTL_PKE | \ + PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_SLOW \ + ) + +static iomux_v3_cfg_t const enet_pads[] = { + NEW_PAD_CTRL(MX6_PAD_ENET_MDC__ENET_MDC, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_GPIO_16__ENET_REF_CLK, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_ENET_RXD0__ENET_RX_DATA0, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_ENET_RXD1__ENET_RX_DATA1, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_ENET_CRS_DV__ENET_RX_EN, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_ENET_RX_ER__ENET_RX_ER, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_ENET_TXD0__ENET_TX_DATA0, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_ENET_TXD1__ENET_TX_DATA1, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_ENET_TX_EN__ENET_TX_EN, ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_GPIO_19__ENET_TX_ER, ENET_PAD_CTRL), + + /* ENET1 reset */ + NEW_PAD_CTRL(MX6_PAD_GPIO_8__GPIO1_IO08, ENET_PAD_CTRL), + /* ENET1 interrupt */ + NEW_PAD_CTRL(MX6_PAD_GPIO_9__GPIO1_IO09, ENET_PAD_CTRL), +}; + +#define ENET_PHY_RESET_GPIO IMX_GPIO_NR(1, 8) + +static void setup_iomuxc_enet(void) +{ + int ret; + + imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); + + /* Reset LAN8720 PHY */ + ret = gpio_request(ENET_PHY_RESET_GPIO, "phy-reset"); + if (!ret) + gpio_direction_output(ENET_PHY_RESET_GPIO , 0); + udelay(1000); + gpio_set_value(ENET_PHY_RESET_GPIO, 1); +} + +int board_eth_init(bd_t *bis) +{ + return cpu_eth_init(bis); +} + +/* GPIO */ +#define GPIO_PAD_CTRL ( \ + PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_UP | \ + PAD_CTL_PUE | \ + PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_SLOW \ + ) + +#define GPIO_OD_PAD_CTRL ( \ + PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_UP | \ + PAD_CTL_PUE | \ + PAD_CTL_ODE | \ + PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_SLOW \ + ) + +static iomux_v3_cfg_t const gpio_pads[] = { + /* USB_H_PWR */ + NEW_PAD_CTRL(MX6_PAD_GPIO_0__GPIO1_IO00, GPIO_PAD_CTRL), + /* USB_OTG_PWR */ + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, GPIO_PAD_CTRL), + /* PCIE_RST */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CLE__GPIO6_IO07, GPIO_OD_PAD_CTRL), + /* UART1_PWRON */ + NEW_PAD_CTRL(MX6_PAD_DISP0_DAT14__GPIO5_IO08, GPIO_PAD_CTRL), + /* UART2_PWRON */ + NEW_PAD_CTRL(MX6_PAD_DISP0_DAT16__GPIO5_IO10, GPIO_PAD_CTRL), + /* UART3_PWRON */ + NEW_PAD_CTRL(MX6_PAD_DISP0_DAT18__GPIO5_IO12, GPIO_PAD_CTRL), +}; + +#define GPIO_USB_H_PWR IMX_GPIO_NR(1, 0) +#define GPIO_USB_OTG_PWR IMX_GPIO_NR(3, 22) +#define GPIO_PCIE_RST IMX_GPIO_NR(6, 7) +#define GPIO_UART1_PWRON IMX_GPIO_NR(5, 8) +#define GPIO_UART2_PWRON IMX_GPIO_NR(5, 10) +#define GPIO_UART3_PWRON IMX_GPIO_NR(5, 12) + +static void gpio_init(void) +{ + int ret; + + imx_iomux_v3_setup_multiple_pads(gpio_pads, ARRAY_SIZE(gpio_pads)); + + ret = gpio_request(GPIO_USB_H_PWR, "usb-h-pwr"); + if (!ret) + gpio_direction_output(GPIO_USB_H_PWR, 1); + ret = gpio_request(GPIO_USB_OTG_PWR, "usb-otg-pwr"); + if (!ret) + gpio_direction_output(GPIO_USB_OTG_PWR, 1); + ret = gpio_request(GPIO_PCIE_RST, "pcie-reset"); + if (!ret) + gpio_direction_output(GPIO_PCIE_RST, 1); + ret = gpio_request(GPIO_UART1_PWRON, "uart1-pwr"); + if (!ret) + gpio_direction_output(GPIO_UART1_PWRON, 0); + ret = gpio_request(GPIO_UART2_PWRON, "uart2-pwr"); + if (!ret) + gpio_direction_output(GPIO_UART2_PWRON, 0); + ret = gpio_request(GPIO_UART3_PWRON, "uart3-pwr"); + if (!ret) + gpio_direction_output(GPIO_UART3_PWRON, 0); +} + +void tqma6_iomuxc_spi(void) +{ + /* No SPI on this baseboard */ +} + +int tqma6_bb_board_early_init_f(void) +{ + setup_iomuxc_uart4(); + + return 0; +} + +int tqma6_bb_board_init(void) +{ + setup_iomuxc_enet(); + + gpio_init(); + + /* Turn the UART-couplers on one-after-another */ + gpio_set_value(GPIO_UART1_PWRON, 1); + mdelay(10); + gpio_set_value(GPIO_UART2_PWRON, 1); + mdelay(10); + gpio_set_value(GPIO_UART3_PWRON, 1); + + return 0; +} + +int tqma6_bb_board_late_init(void) +{ + return 0; +} + +const char *tqma6_bb_get_boardname(void) +{ + return "WRU-IV"; +} + +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, + /* 8 bit bus width */ + {"emmc", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, + { NULL, 0 }, +}; + +int misc_init_r(void) +{ + add_board_boot_modes(board_boot_modes); + + return 0; +} + +#define WRU4_USB_H1_PWR IMX_GPIO_NR(1, 0) +#define WRU4_USB_OTG_PWR IMX_GPIO_NR(3, 22) + +int board_ehci_hcd_init(int port) +{ + int ret; + + ret = gpio_request(WRU4_USB_H1_PWR, "usb-h1-pwr"); + if (!ret) + gpio_direction_output(WRU4_USB_H1_PWR, 1); + + ret = gpio_request(WRU4_USB_OTG_PWR, "usb-OTG-pwr"); + if (!ret) + gpio_direction_output(WRU4_USB_OTG_PWR, 1); + + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + gpio_set_value(WRU4_USB_OTG_PWR, on); + else + gpio_set_value(WRU4_USB_H1_PWR, on); + + return 0; +} + +/* + * Device Tree Support + */ +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +void tqma6_bb_ft_board_setup(void *blob, bd_t *bd) +{ + /* TBD */ +} +#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig new file mode 100644 index 00000000000..f3627601103 --- /dev/null +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -0,0 +1,12 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_TARGET_TQMA6=y +CONFIG_TQMA6S=y +CONFIG_WRU4=y +CONFIG_CMD_SETEXPR=y +CONFIG_CMD_NET=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Enter password in %d seconds to stop autoboot\n" +CONFIG_AUTOBOOT_ENCRYPTION=y +CONFIG_AUTOBOOT_STOP_STR_SHA256="36a9e7f1c95b82ffb99743e0c5c4ce95d83c9a430aac59f84ef3cbfab6145068" +CONFIG_PCA9551_LED=y diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index bd93ec71327..f7fade12f1b 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -389,6 +389,8 @@ */ #ifdef CONFIG_MBA6 #include "tqma6_mba6.h" +#elif CONFIG_WRU4 +#include "tqma6_wru4.h" #else #error "No baseboard for the TQMa6 defined!" #endif diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h new file mode 100644 index 00000000000..1c86bc07019 --- /dev/null +++ b/include/configs/tqma6_wru4.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2015 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_TQMA6_WRU4_H +#define __CONFIG_TQMA6_WRU4_H + +#define CONFIG_DEFAULT_FDT_FILE "imx6s-wru4.dtb" + +/* DTT sensors */ +#define CONFIG_DTT_SENSORS { 0, 1 } +#define CONFIG_SYS_DTT_BUS_NUM 2 + +/* Ethernet */ +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0x01 +#define CONFIG_PHY_SMSC + +/* UART */ +#define CONFIG_MXC_UART_BASE UART4_BASE +#define CONFIG_CONSOLE_DEV "ttymxc3" + +#define CONFIG_MISC_INIT_R + +/* Watchdog */ +#define CONFIG_HW_WATCHDOG +#define CONFIG_IMX_WATCHDOG +#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 + +/* Config on-board RTC */ +#define CONFIG_RTC_DS1337 +#define CONFIG_SYS_RTC_BUS_NUM 2 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +/* Turn off RTC square-wave output to save battery */ +#define CONFIG_SYS_RTC_DS1337_NOOSC +#define CONFIG_CMD_DATE + +#define CONFIG_CMD_GPIO + +/* LED */ +#define CONFIG_CMD_LED +#define CONFIG_STATUS_LED +#define CONFIG_BOARD_SPECIFIC_LED +#define STATUS_LED_BIT 0 +#define STATUS_LED_STATE STATUS_LED_ON +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT1 1 +#define STATUS_LED_STATE1 STATUS_LED_ON +#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT2 2 +#define STATUS_LED_STATE2 STATUS_LED_ON +#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT3 3 +#define STATUS_LED_STATE3 STATUS_LED_ON +#define STATUS_LED_PERIOD3 (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT4 4 +#define STATUS_LED_STATE4 STATUS_LED_ON +#define STATUS_LED_PERIOD4 (CONFIG_SYS_HZ / 2) +#define STATUS_LED_BIT5 5 +#define STATUS_LED_STATE5 STATUS_LED_ON +#define STATUS_LED_PERIOD5 (CONFIG_SYS_HZ / 2) + +/* Bootcounter */ +#define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_BOOTCOUNT_BE + +#endif /* __CONFIG_TQMA6_WRU4_H */ -- cgit v1.3.1 From 6918f974cf48b31c63f3e975302e8178575aa832 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 13 Jul 2015 22:01:52 -0300 Subject: thermal: Fix comments It seems that many comments were copied from the I2C uclass, so adjust the comments for the thermal class. Reported-by: Simon Glass Signed-off-by: Fabio Estevam Acked-by: Otavio Salvador Acked-by: Simon Glass --- include/thermal.h | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/thermal.h b/include/thermal.h index 5d6101bec6e..b197c0aaa77 100644 --- a/include/thermal.h +++ b/include/thermal.h @@ -13,7 +13,7 @@ int thermal_get_temp(struct udevice *dev, int *temp); /** - * struct struct dm_thermal_ops - Driver model Thermal operations + * struct dm_thermal_ops - Driver model Thermal operations * * The uclass interface is implemented by all Thermal devices which use * driver model. @@ -22,19 +22,11 @@ struct dm_thermal_ops { /** * Get the current temperature * - * The device provided is the slave device. It's parent controller - * will be used to provide the communication. - * - * This must be called before doing any transfers with a Thermal slave. - * It will enable and initialize any Thermal hardware as necessary, - * and make sure that the SCK line is in the correct idle state. It is - * not allowed to claim the same bus for several slaves without - * releasing the bus in between. + * This must be called before doing any transfers with a Thermal device. + * It will enable and initialize any Thermal hardware as necessary. * * @dev: The Thermal device - * - * Returns: 0 if the bus was claimed successfully, or a negative value - * if it wasn't. + * @temp: pointer that returns the measured temperature */ int (*get_temp)(struct udevice *dev, int *temp); }; -- cgit v1.3.1 From a643acd44c342afbbe14eb073f86a6d0a355c121 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jul 2015 19:48:40 -0300 Subject: power: pmic: Add support for MAX77696 PMIC Add support for MAX77696 PMIC. Signed-off-by: Fabio Estevam --- drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic_max77696.c | 32 ++++++++++++++++++++ include/power/max77696_pmic.h | 60 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 93 insertions(+) create mode 100644 drivers/power/pmic/pmic_max77696.c create mode 100644 include/power/max77696_pmic.h (limited to 'include') diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index ae86f041f34..4ad6df36c2d 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_DM_PMIC) += pmic-uclass.o obj-$(CONFIG_DM_PMIC_MAX77686) += max77686.o obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o +obj-$(CONFIG_POWER_MAX77696) += pmic_max77696.o obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o diff --git a/drivers/power/pmic/pmic_max77696.c b/drivers/power/pmic/pmic_max77696.c new file mode 100644 index 00000000000..93d92f57948 --- /dev/null +++ b/drivers/power/pmic/pmic_max77696.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * Fabio Estevam + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int power_max77696_init(unsigned char bus) +{ + static const char name[] = "MAX77696"; + struct pmic *p = pmic_alloc(); + + if (!p) { + printf("%s: POWER allocation error!\n", __func__); + return -ENOMEM; + } + + p->name = name; + p->interface = PMIC_I2C; + p->number_of_regs = PMIC_NUM_OF_REGS; + p->hw.i2c.addr = CONFIG_POWER_MAX77696_I2C_ADDR; + p->hw.i2c.tx_num = 1; + p->bus = bus; + + return 0; +} diff --git a/include/power/max77696_pmic.h b/include/power/max77696_pmic.h new file mode 100644 index 00000000000..71cdf880548 --- /dev/null +++ b/include/power/max77696_pmic.h @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * Fabio Estevam + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MAX77696_PMIC_H__ +#define __MAX77696_PMIC_H__ + +#define CONFIG_POWER_MAX77696_I2C_ADDR 0x3C + +enum { + L01_CNFG1 = 0x43, + L01_CNFG2, + L02_CNFG1, + L02_CNFG2, + L03_CNFG1, + L03_CNFG2, + L04_CNFG1, + L04_CNFG2, + L05_CNFG1, + L05_CNFG2, + L06_CNFG1, + L06_CNFG2, + L07_CNFG1, + L07_CNFG2, + L08_CNFG1, + L08_CNFG2, + L09_CNFG1, + L09_CNFG2, + L10_CNFG1, + L10_CNFG2, + LDO_INT1, + LDO_INT2, + LDO_INT1M, + LDO_INT2M, + LDO_CNFG3, + SW1_CNTRL, + SW2_CNTRL, + SW3_CNTRL, + SW4_CNTRL, + EPDCNFG, + EPDINTS, + EPDINT, + EPDINTM, + EPDVCOM, + EPDVEE, + EPDVNEG, + EPDVPOS, + EPDVDDH, + EPDSEQ, + EPDOKINTS, + CID = 0x9c, + PMIC_NUM_OF_REGS, +}; + +int power_max77696_init(unsigned char bus); + +#endif -- cgit v1.3.1 From 44f98f9c8e178942ad51b77b6d2a66820fa9d3cc Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 21 Jul 2015 19:48:41 -0300 Subject: warp: Add MAX77696 support Warp has a MAX77696 PMIC connected via I2C1 bus. Add support for it. Signed-off-by: Fabio Estevam --- board/warp/warp.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/configs/warp.h | 11 +++++++++++ 2 files changed, 61 insertions(+) (limited to 'include') diff --git a/board/warp/warp.c b/board/warp/warp.c index 21ac5e7d741..49dfdb67174 100644 --- a/board/warp/warp.c +++ b/board/warp/warp.c @@ -15,13 +15,17 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -35,6 +39,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SRE_FAST | PAD_CTL_HYS | \ PAD_CTL_LVE) +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -88,6 +97,45 @@ int board_usb_phy_mode(int port) return USB_INIT_DEVICE; } +/* I2C1 for PMIC */ +#define I2C_PMIC 0 +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +struct i2c_pads_info i2c_pad_info1 = { + .sda = { + .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC, + .gp = IMX_GPIO_NR(3, 13), + }, + .scl = { + .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC, + .gp = IMX_GPIO_NR(3, 12), + }, +}; + +int power_init_board(void) +{ + struct pmic *p; + int ret; + unsigned int reg; + + ret = power_max77696_init(I2C_PMIC); + if (ret) + return ret; + + p = pmic_get("MAX77696"); + if (!p) + return -EINVAL; + + ret = pmic_reg_read(p, CID, ®); + if (ret) + return ret; + + printf("PMIC: MAX77696 detected, rev=0x%x\n", reg); + + return pmic_probe(p); +} + int board_early_init_f(void) { setup_iomux_uart(); @@ -99,6 +147,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + return 0; } diff --git a/include/configs/warp.h b/include/configs/warp.h index 2331767b13a..d5c3215099b 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -94,6 +94,17 @@ #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M #define DFU_DEFAULT_POLL_TIMEOUT 300 +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_MAX77696 + #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ -- cgit v1.3.1 From 72d21256fb6283faac35abf01cd25a37ca150316 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 23 Jul 2015 11:02:19 -0300 Subject: cgtqmx6eval: Use default prompt Remove the custom prompt and use the default instead. Signed-off-by: Otavio Salvador --- include/configs/cgtqmx6eval.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index dd06c05b8e0..5f753e7ab5f 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -87,9 +87,6 @@ "fi; " \ "else echo ERR: Fail to boot from mmc; fi" -/* Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT "CGT-QMX6-Quad U-Boot > " - /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -- cgit v1.3.1 From d6ec45da301ffa865ea8f9a9a481d49dfdb9b24f Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 23 Jul 2015 11:02:20 -0300 Subject: cgtqmx6eval: Use the default CONFIG_SYS_PBSIZE Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into the console and hitting enter afterwards, causes a hang in the system because CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error message: "Unknown command '' - try 'help'". Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve this problem. Signed-off-by: Otavio Salvador --- include/configs/cgtqmx6eval.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 5f753e7ab5f..9d9e38874e5 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -87,9 +87,6 @@ "fi; " \ "else echo ERR: Fail to boot from mmc; fi" -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) - #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 -- cgit v1.3.1 From 862187b7cd7b9f7477d41532bc907b792455eb0d Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 23 Jul 2015 11:02:27 -0300 Subject: cgtqmx6eval: Add thermal support Add thermal support so that we can see the following message on boot: CPU: Industrial temperature grade (-40C to 105C) at 33C Signed-off-by: Otavio Salvador --- configs/cgtqmx6qeval_defconfig | 3 +++ include/configs/cgtqmx6eval.h | 8 ++++++++ 2 files changed, 11 insertions(+) (limited to 'include') diff --git a/configs/cgtqmx6qeval_defconfig b/configs/cgtqmx6qeval_defconfig index e1eb871b4a3..6fd29a00aec 100644 --- a/configs/cgtqmx6qeval_defconfig +++ b/configs/cgtqmx6qeval_defconfig @@ -1,6 +1,9 @@ CONFIG_ARM=y CONFIG_TARGET_CGTQMX6EVAL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/congatec/cgtqmx6eval/imximage.cfg,MX6Q" +CONFIG_CMD_NET=y +CONFIG_DM=y +CONFIG_DM_THERMAL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 9d9e38874e5..c82bb4101e5 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -32,6 +32,14 @@ /* Miscellaneous commands */ #define CONFIG_CMD_BMODE +/* Thermal support */ +#define CONFIG_IMX6_THERMAL + +#define CONFIG_CMD_FUSE +#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL) +#define CONFIG_MXC_OCOTP +#endif + #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ -- cgit v1.3.1 From 4c9929d63a51596db51c77620390b7b85feb8ecd Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 23 Jul 2015 11:02:28 -0300 Subject: cgtqmx6eval: Add PMIC support cgtqmx6eval has a PFUZE100 FSL PMIC connected to I2C2. Add support for it. Signed-off-by: Otavio Salvador --- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 85 ++++++++++++++++++++++++++++++++ include/configs/cgtqmx6eval.h | 13 +++++ 2 files changed, 98 insertions(+) (limited to 'include') diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index e05060c4b78..b0ca69baf17 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -16,8 +16,12 @@ #include #include #include +#include #include #include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -27,6 +31,13 @@ DECLARE_GLOBAL_DATA_PTR; #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define MX6Q_QMX6_PFUZE_MUX IMX_GPIO_NR(6, 9) + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -77,6 +88,78 @@ static iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +#define I2C_PMIC 1 /* I2C2 port is used to connect to the PMIC */ + +struct interface_level { + char *name; + uchar value; +}; + +static struct interface_level mipi_levels[] = { + {"0V0", 0x00}, + {"2V5", 0x17}, +}; + +/* setup board specific PMIC */ +int power_init_board(void) +{ + struct pmic *p; + u32 id1, id2, i; + int ret; + char const *lv_mipi; + + /* configure I2C multiplexer */ + gpio_direction_output(MX6Q_QMX6_PFUZE_MUX, 1); + + power_pfuze100_init(I2C_PMIC); + p = pmic_get("PFUZE100"); + if (!p) + return -EINVAL; + + ret = pmic_probe(p); + if (ret) + return ret; + + pmic_reg_read(p, PFUZE100_DEVICEID, &id1); + pmic_reg_read(p, PFUZE100_REVID, &id2); + printf("PFUZE100 Rev. [%02x/%02x] detected\n", id1, id2); + + if (id2 >= 0x20) + return 0; + + /* set level of MIPI if specified */ + lv_mipi = getenv("lv_mipi"); + if (lv_mipi) + return 0; + + for (i = 0; i < ARRAY_SIZE(mipi_levels); i++) { + if (!strcmp(mipi_levels[i].name, lv_mipi)) { + printf("set MIPI level %s\n", + mipi_levels[i].name); + ret = pmic_reg_write(p, PFUZE100_VGEN4VOL, + mipi_levels[i].value); + if (ret) + return ret; + } + } + + return 0; +} + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); @@ -148,6 +231,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + return 0; } diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index c82bb4101e5..ebe869e9d37 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -40,6 +40,19 @@ #define CONFIG_MXC_OCOTP #endif +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_SPEED 100000 + +/* PMIC */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_PFUZE100 +#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 + #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ -- cgit v1.3.1 From 95246ac7094cd511f02f98d403c965625ea81db4 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 23 Jul 2015 11:02:29 -0300 Subject: cgtqmx6eval: Add USB support Add USB support. Signed-off-by: Otavio Salvador --- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 44 ++++++++++++++++++++++++++++++++ include/configs/cgtqmx6eval.h | 15 +++++++++++ 2 files changed, 59 insertions(+) (limited to 'include') diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index b0ca69baf17..3987b74e004 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -88,6 +88,11 @@ static iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; +static iomux_v3_cfg_t const usb_otg_pads[] = { + MX6_PAD_EIM_D22__USB_OTG_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) struct i2c_pads_info i2c_pad_info1 = { .scl = { @@ -219,6 +224,45 @@ int board_mmc_init(bd_t *bis) } #endif +int board_ehci_hcd_init(int port) +{ + switch (port) { + case 0: + imx_iomux_v3_setup_multiple_pads(usb_otg_pads, + ARRAY_SIZE(usb_otg_pads)); + /* + * set daisy chain for otg_pin_id on 6q. + * for 6dl, this bit is reserved + */ + imx_iomux_set_gpr_register(1, 13, 1, 1); + break; + case 1: + /* nothing to do */ + break; + default: + printf("Invalid USB port: %d\n", port); + return -EINVAL; + } + + return 0; +} + +int board_ehci_power(int port, int on) +{ + switch (port) { + case 0: + break; + case 1: + gpio_direction_output(IMX_GPIO_NR(5, 5), on); + break; + default: + printf("Invalid USB port: %d\n", port); + return -EINVAL; + } + + return 0; +} + int board_early_init_f(void) { setup_iomux_uart(); diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index ebe869e9d37..8b97647df63 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -53,6 +53,21 @@ #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */ +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ -- cgit v1.3.1 From 6d551f2705e48942ef3b20c0d4a5042740781844 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 23 Jul 2015 11:02:30 -0300 Subject: cgtqmx6eval: Add splash screen support Add LVDS and HDMI support. Signed-off-by: Otavio Salvador --- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 173 +++++++++++++++++++++++++++++++ include/configs/cgtqmx6eval.h | 20 ++++ 2 files changed, 193 insertions(+) (limited to 'include') diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 3987b74e004..e0d8d34d893 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -17,11 +17,15 @@ #include #include #include +#include +#include #include #include #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -263,9 +267,178 @@ int board_ehci_power(int port, int on) return 0; } +struct display_info_t { + int bus; + int addr; + int pixfmt; + int (*detect)(struct display_info_t const *dev); + void (*enable)(struct display_info_t const *dev); + struct fb_videomode mode; +}; + +static void disable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrbits_le32(&iomux->gpr[2], IOMUXC_GPR2_LVDS_CH0_MODE_MASK | + IOMUXC_GPR2_LVDS_CH1_MODE_MASK); +} + +static void do_enable_hdmi(struct display_info_t const *dev) +{ + disable_lvds(dev); + imx_enable_hdmi_phy(); +} + +static struct display_info_t const displays[] = { +{ + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB666, + .detect = NULL, + .enable = NULL, + .mode = { + .name = + "Hannstar-XGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED } }, +{ + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = NULL, + .enable = do_enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED } } +}; + +int board_video_skip(void) +{ + int i; + int ret; + char const *panel = getenv("panel"); + if (!panel) { + for (i = 0; i < ARRAY_SIZE(displays); i++) { + struct display_info_t const *dev = displays + i; + if (dev->detect && dev->detect(dev)) { + panel = dev->mode.name; + printf("auto-detected panel %s\n", panel); + break; + } + } + if (!panel) { + panel = displays[0].mode.name; + printf("No panel detected: default to %s\n", panel); + i = 0; + } + } else { + for (i = 0; i < ARRAY_SIZE(displays); i++) { + if (!strcmp(panel, displays[i].mode.name)) + break; + } + } + if (i < ARRAY_SIZE(displays)) { + ret = ipuv3_fb_init(&displays[i].mode, 0, displays[i].pixfmt); + if (!ret) { + if (displays[i].enable) + displays[i].enable(displays + i); + printf("Display: %s (%ux%u)\n", + displays[i].mode.name, displays[i].mode.xres, + displays[i].mode.yres); + } else + printf("LCD %s cannot be configured: %d\n", + displays[i].mode.name, ret); + } else { + printf("unsupported panel %s\n", panel); + return -EINVAL; + } + + return 0; +} + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg; + + enable_ipu_clock(); + imx_setup_hdmi(); + + /* Turn on LDB0, LDB1, IPU,IPU DI0 clocks */ + setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK | + MXC_CCM_CCGR3_LDB_DI1_MASK); + + /* set LDB0, LDB1 clk select to 011/011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | + MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | + (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->cs2cdr); + + setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | + MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV); + + setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET | + CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES + | IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW + | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW + | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG + | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT + | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG + | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT + | IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED + | IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + + reg = readl(&iomux->gpr[3]); + reg = (reg & ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK | + IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) | + (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET); + writel(reg, &iomux->gpr[3]); +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + int board_early_init_f(void) { setup_iomux_uart(); + setup_display(); return 0; } diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 8b97647df63..4a208ac839a 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -68,6 +68,26 @@ #define CONFIG_USB_KEYBOARD #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP +/* Framebuffer */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#ifdef CONFIG_MX6DL +#define CONFIG_IPUV3_CLK 198000000 +#else +#define CONFIG_IPUV3_CLK 264000000 +#endif +#define CONFIG_IMX_HDMI + #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ -- cgit v1.3.1 From 6731bc8db4fe644b008e9b844aee043c6063f8af Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 23 Jul 2015 11:02:31 -0300 Subject: cgtqmx6eval: Add SATA support Add SATA support. Signed-off-by: Otavio Salvador --- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 5 +++++ include/configs/cgtqmx6eval.h | 9 +++++++++ 2 files changed, 14 insertions(+) (limited to 'include') diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index e0d8d34d893..7de6460ca0b 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -450,6 +451,10 @@ int board_init(void) setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + return 0; } diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 4a208ac839a..c86413129f3 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -88,6 +88,15 @@ #endif #define CONFIG_IMX_HDMI +/* SATA */ +#define CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA + #define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ -- cgit v1.3.1 From 5b94ce2c343074c20a6c61f48175e2b543692d37 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 23 Jul 2015 11:02:33 -0300 Subject: cgtqmx6eval: Use standard boot script Use more standard boot scripts and also add the capability of booting via NFS. Signed-off-by: Otavio Salvador --- include/configs/cgtqmx6eval.h | 94 ++++++++++++++++++++++++++++++------------- 1 file changed, 66 insertions(+), 28 deletions(-) (limited to 'include') diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index c86413129f3..fb5b82ee332 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -97,36 +97,75 @@ #define CONFIG_LBA48 #define CONFIG_LIBATA -#define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb" +/* Command definition */ + +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONSOLE_DEV "ttymxc1" +#define CONFIG_MMCROOT "/dev/mmcblk0p2" +#define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ - "boot_dir=/boot\0" \ - "console=ttymxc1\0" \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" \ - "fdt_addr=0x18000000\0" \ + "fdtfile=imx6q-qmx6.dtb\0" \ + "fdt_addr_r=0x18000000\0" \ "boot_fdt=try\0" \ - "mmcdev=1\0" \ + "ip_dyn=yes\0" \ + "console=" CONFIG_CONSOLE_DEV "\0" \ + "bootm_size=0x10000000\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ "mmcpart=1\0" \ - "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "update_sd_firmware=" \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "if mmc dev ${mmcdev}; then " \ + "if ${get_cmd} ${update_sd_firmware_filename}; then " \ + "setexpr fw_sz ${filesize} / 0x200; " \ + "setexpr fw_sz ${fw_sz} + 1; " \ + "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ + "fi; " \ + "fi\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadbootscript=" \ - "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ - "loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \ - "${boot_dir}/${image}\0" \ - "loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \ - "${boot_dir}/${fdt_file}\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ + "bootz ${loadaddr} - ${fdt_addr_r}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \ + "bootz ${loadaddr} - ${fdt_addr_r}; " \ "else " \ "if test ${boot_fdt} = try; then " \ "bootz; " \ @@ -136,21 +175,20 @@ "fi; " \ "else " \ "bootz; " \ - "fi;\0" + "fi;\0" \ #define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev};" \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "if run loadbootscript; then " \ - "run bootscript; " \ - "else " \ - "if run loadimage; then " \ - "run mmcboot; " \ - "else "\ - "echo ERR: Fail to boot from mmc; " \ - "fi; " \ - "fi; " \ - "else echo ERR: Fail to boot from mmc; fi" + "mmc dev ${mmcdev};" \ + "if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else run netboot; fi" #define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END 0x10010000 -- cgit v1.3.1 From e6fc8995d6654df23387ccac91543a2206cfcb36 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jul 2015 11:38:46 +0800 Subject: imx: mx6sabresd/sabreauto runtime setting fdt_file MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Detect the SOC and board variant at runtime and change the dtb name, but not hardcoding the fdt_file env variable. Take the following patch as a reference. Íd58699b157df75f1aa0b363ea9c21add21a0c "mx6cuboxi: Load the correct 'fdtfile' variable" Signed-off-by: Peng Fan Reviewed-by: Fabio Estevam Acked-by: Stefano Babic --- board/freescale/mx6qsabreauto/mx6qsabreauto.c | 9 +++++++++ board/freescale/mx6sabresd/mx6sabresd.c | 10 ++++++++++ include/configs/mx6qsabreauto.h | 5 ----- include/configs/mx6sabre_common.h | 21 +++++++++++++++++++-- include/configs/mx6sabresd.h | 5 ----- 5 files changed, 38 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index b76e4eb528a..943a4bd5d57 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -522,6 +522,15 @@ int board_late_init(void) add_board_boot_modes(board_boot_modes); #endif +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + setenv("board_name", "SABREAUTO"); + + if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + setenv("board_rev", "MX6Q"); + else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) + setenv("board_rev", "MX6DL"); +#endif + return 0; } diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index fa800f4b22b..eb8a8b38266 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -680,6 +680,16 @@ int board_late_init(void) #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif + +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + setenv("board_name", "SABRESD"); + + if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + setenv("board_rev", "MX6Q"); + else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) + setenv("board_rev", "MX6DL"); +#endif + return 0; } diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index 22603442d73..11cf538b0ad 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -12,11 +12,6 @@ #define CONFIG_MACH_TYPE 3529 #define CONFIG_MXC_UART_BASE UART4_BASE #define CONFIG_CONSOLE_DEV "ttymxc3" -#if defined CONFIG_MX6Q -#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabreauto.dtb" -#elif defined CONFIG_MX6DL -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabreauto.dtb" -#endif #define CONFIG_MMCROOT "/dev/mmcblk0p2" #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index e42dfc90453..903ab1860e1 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -70,10 +70,12 @@ #define EMMC_ENV "" #endif +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ - "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdt_file=undefined\0" \ "fdt_addr=0x18000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ @@ -143,9 +145,24 @@ "fi; " \ "else " \ "bootz; " \ - "fi;\0" + "fi;\0" \ + "findfdt="\ + "if test $fdt_file = undefined; then " \ + "if test $board_name = SABREAUTO && test $board_rev = MX6Q; then " \ + "setenv fdt_file imx6q-sabreauto.dtb; fi; " \ + "if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \ + "setenv fdt_file imx6dl-sabreauto.dtb; fi; " \ + "if test $board_name = SABRESD && test $board_rev = MX6Q; then " \ + "setenv fdt_file imx6q-sabresd.dtb; fi; " \ + "if test $board_name = SABRESD && test $board_rev = MX6DL; then " \ + "setenv fdt_file imx6dl-sabresd.dtb; fi; " \ + "if test $fdt_file = undefined; then " \ + "echo WARNING: Could not determine dtb to use; fi; " \ + "fi;\0" \ + #define CONFIG_BOOTCOMMAND \ + "run findfdt;" \ "mmc dev ${mmcdev};" \ "if mmc rescan; then " \ "if run loadbootscript; then " \ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 41162ca2021..5f635ca6c5a 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -19,11 +19,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE #define CONFIG_CONSOLE_DEV "ttymxc0" #define CONFIG_MMCROOT "/dev/mmcblk1p2" -#if defined(CONFIG_MX6Q) -#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb" -#elif defined(CONFIG_MX6DL) -#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb" -#endif #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ -- cgit v1.3.1 From 361b715bbfbebc96d31c0ee48c34c2e66f049684 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Sat, 11 Jul 2015 11:38:47 +0800 Subject: imx: mx6qpsabreauto: Add MX6QP SABREAUTO CPU3 board support 1. Add DDR script for mx6qpsabreauto board. 2. On CPU3 board, enet RGMII tx clock is from internal PLL. Set the GPR5[9] and init the enet pll output to 125Mhz. 3. On CPU3 board, SW1ABC=VDDSOC_IN, SW2=VDDARM_IN. Build target: mx6qpsabreauto_config Boot Log: U-Boot 2015.07-rc2-00071-gfd985ff (Jun 29 2015 - 22:10:55 +0800) CPU: Freescale i.MX6QP rev1.0 996 MHz (running at 792 MHz) CPU: Automotive temperature grade (-40C to 125C) at 34C Reset cause: POR Board: MX6Q-Sabreauto revA I2C: ready DRAM: 2 GiB PMIC: PFUZE100 ID=0x10 Flash: 32 MiB NAND: 0 MiB MMC: FSL_SDHC: 0 *** Warning - bad CRC, using default environment No panel detected: default to HDMI Display: HDMI (1024x768) In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Note: In this patch, we still add a new config mx6qpsabreauto_config, since SPL is not supported now, and IMX_CONFIG is needed at build time, so add this config. Future, when SPL is converted, this config can be removed. Signed-off-by: Peng Fan Signed-off-by: Robin Gong Signed-off-by: Ye.Li Reviewed-by: Fabio Estevam --- board/freescale/mx6qsabreauto/mx6qp.cfg | 145 ++++++++++++++++++++++++++ board/freescale/mx6qsabreauto/mx6qsabreauto.c | 33 ++++-- configs/mx6qpsabreauto_defconfig | 4 + include/configs/mx6sabre_common.h | 2 + 4 files changed, 177 insertions(+), 7 deletions(-) create mode 100644 board/freescale/mx6qsabreauto/mx6qp.cfg create mode 100644 configs/mx6qpsabreauto_defconfig (limited to 'include') diff --git a/board/freescale/mx6qsabreauto/mx6qp.cfg b/board/freescale/mx6qsabreauto/mx6qp.cfg new file mode 100644 index 00000000000..2298c772cc9 --- /dev/null +++ b/board/freescale/mx6qsabreauto/mx6qp.cfg @@ -0,0 +1,145 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ +/* image version */ + +#define __ASSEMBLY__ +#include + +IMAGE_VERSION 2 + +/* + * Boot Device : one of spi, sd, eimnor, nand, sata: + * spinor: flash_offset: 0x0400 + * nand: flash_offset: 0x0400 + * sata: flash_offset: 0x0400 + * sd/mmc: flash_offset: 0x0400 + * eimnor: flash_offset: 0x1000 + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0798 0x000C0000 +DATA 4 0x020e0758 0x00000000 +DATA 4 0x020e0588 0x00000030 +DATA 4 0x020e0594 0x00000030 +DATA 4 0x020e056c 0x00000030 +DATA 4 0x020e0578 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e057c 0x00000030 +DATA 4 0x020e058c 0x00000000 +DATA 4 0x020e059c 0x00000030 +DATA 4 0x020e05a0 0x00000030 +DATA 4 0x020e078c 0x00000030 +DATA 4 0x020e0750 0x00020000 +DATA 4 0x020e05a8 0x00000030 +DATA 4 0x020e05b0 0x00000030 +DATA 4 0x020e0524 0x00000030 +DATA 4 0x020e051c 0x00000030 +DATA 4 0x020e0518 0x00000030 +DATA 4 0x020e050c 0x00000030 +DATA 4 0x020e05b8 0x00000030 +DATA 4 0x020e05c0 0x00000030 +DATA 4 0x020e0774 0x00020000 +DATA 4 0x020e0784 0x00000030 +DATA 4 0x020e0788 0x00000030 +DATA 4 0x020e0794 0x00000030 +DATA 4 0x020e079c 0x00000030 +DATA 4 0x020e07a0 0x00000030 +DATA 4 0x020e07a4 0x00000030 +DATA 4 0x020e07a8 0x00000030 +DATA 4 0x020e0748 0x00000030 +DATA 4 0x020e05ac 0x00000030 +DATA 4 0x020e05b4 0x00000030 +DATA 4 0x020e0528 0x00000030 +DATA 4 0x020e0520 0x00000030 +DATA 4 0x020e0514 0x00000030 +DATA 4 0x020e0510 0x00000030 +DATA 4 0x020e05bc 0x00000030 +DATA 4 0x020e05c4 0x00000030 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001b001e +DATA 4 0x021b0810 0x002e0029 +DATA 4 0x021b480c 0x001b002a +DATA 4 0x021b4810 0x0019002c +DATA 4 0x021b083c 0x43240334 +DATA 4 0x021b0840 0x0324031a +DATA 4 0x021b483c 0x43340344 +DATA 4 0x021b4840 0x03280276 +DATA 4 0x021b0848 0x44383A3E +DATA 4 0x021b4848 0x3C3C3846 +DATA 4 0x021b0850 0x2e303230 +DATA 4 0x021b4850 0x38283E34 +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 +DATA 4 0x021b481c 0x33333333 +DATA 4 0x021b4820 0x33333333 +DATA 4 0x021b4824 0x33333333 +DATA 4 0x021b4828 0x33333333 +DATA 4 0x021b08c0 0x24912492 +DATA 4 0x021b48c0 0x24912492 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 +DATA 4 0x021b0004 0x00020036 +DATA 4 0x021b0008 0x09444040 +DATA 4 0x021b000c 0x898E7955 +DATA 4 0x021b0010 0xFF328F64 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x00001740 +DATA 4 0x021b001c 0x00008000 + +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x008E1023 +DATA 4 0x021b0040 0x00000047 +DATA 4 0x021b0400 0x14420000 +DATA 4 0x021b0000 0x841A0000 +DATA 4 0x00bb0008 0x00000004 +DATA 4 0x00bb000c 0x2891E41A +DATA 4 0x00bb0038 0x00000564 +DATA 4 0x00bb0014 0x00000040 +DATA 4 0x00bb0028 0x00000020 +DATA 4 0x00bb002c 0x00000020 +DATA 4 0x021b001c 0x04088032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x09408030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00011117 +DATA 4 0x021b4818 0x00011117 +DATA 4 0x021b0004 0x00025576 +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 +/* set the default clock gate to save power */ +DATA 4, 0x020c4068, 0x00C03F3F +DATA 4, 0x020c406c, 0x0030FC03 +DATA 4, 0x020c4070, 0x0FFFC000 +DATA 4, 0x020c4074, 0x3FF00000 +DATA 4, 0x020c4078, 0xFFFFF300 +DATA 4, 0x020c407c, 0x0F0000F3 +DATA 4, 0x020c4080, 0x00000FFF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, 0x020e0010, 0xF00000CF +/* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ +DATA 4, 0x020e0018, 0x77177717 +DATA 4, 0x020e001c, 0x77177717 diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 943a4bd5d57..98602f889ec 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -354,9 +354,22 @@ int board_phy_config(struct phy_device *phydev) return 0; } -int board_eth_init(bd_t *bis) +static void setup_fec(void) { + if (is_mx6dqp()) { + /* + * select ENET MAC0 TX clock from PLL + */ + imx_iomux_set_gpr_register(5, 9, 1, 1); + enable_fec_anatop_clock(ENET_125MHZ); + } + setup_iomux_enet(); +} + +int board_eth_init(bd_t *bis) +{ + setup_fec(); return cpu_eth_init(bis); } @@ -495,17 +508,21 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs) int power_init_board(void) { struct pmic *p; - unsigned int ret; + unsigned int value; p = pfuze_common_init(I2C_PMIC); if (!p) return -ENODEV; - ret = pfuze_mode_init(p, APS_PFM); - if (ret < 0) - return ret; + if (is_mx6dqp()) { + /* set SW2 staby volatage 0.975V*/ + pmic_reg_read(p, PFUZE100_SW2STBY, &value); + value &= ~0x3f; + value |= 0x17; + pmic_reg_write(p, PFUZE100_SW2STBY, value); + } - return 0; + return pfuze_mode_init(p, APS_PFM); } #ifdef CONFIG_CMD_BMODE @@ -525,7 +542,9 @@ int board_late_init(void) #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG setenv("board_name", "SABREAUTO"); - if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) + if (is_mx6dqp()) + setenv("board_rev", "MX6QP"); + else if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) setenv("board_rev", "MX6Q"); else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) setenv("board_rev", "MX6DL"); diff --git a/configs/mx6qpsabreauto_defconfig b/configs/mx6qpsabreauto_defconfig new file mode 100644 index 00000000000..293e3f27a56 --- /dev/null +++ b/configs/mx6qpsabreauto_defconfig @@ -0,0 +1,4 @@ +CONFIG_ARM=y +CONFIG_TARGET_MX6QSABREAUTO=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6qp.cfg,MX6Q" +CONFIG_SPI_FLASH=y diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 903ab1860e1..6722c9de361 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -148,6 +148,8 @@ "fi;\0" \ "findfdt="\ "if test $fdt_file = undefined; then " \ + "if test $board_name = SABREAUTO && test $board_rev = MX6QP; then " \ + "setenv fdt_file imx6qp-sabreauto.dtb; fi; " \ "if test $board_name = SABREAUTO && test $board_rev = MX6Q; then " \ "setenv fdt_file imx6q-sabreauto.dtb; fi; " \ "if test $board_name = SABREAUTO && test $board_rev = MX6DL; then " \ -- cgit v1.3.1 From 4377859aa697ebec8e2ddb1cefe2ce338cd73f65 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Thu, 23 Jul 2015 17:19:29 +0300 Subject: arm: mx6: cm-fx6: make it possible to not init display Implement a cm-fx6 specific board_video_skip() to provide the option to not initialize the display. The new function does not init display if the environment variable "panel" is not defined, or if it is set to an unsupported value. Collateral changes: - Don't use the global displays array (it's CONFIG_IMX_VIDEO_SKIP specific). - Don't use detect_hdmi(), since env controlled init makes it unnecessary. Cc: Stefano Babic Cc: Igor Grinberg Signed-off-by: Nikita Kiryanov Signed-off-by: Igor Grinberg --- board/compulab/cm_fx6/cm_fx6.c | 72 ++++++++++++++++++++++++++++-------------- include/configs/cm_fx6.h | 1 - 2 files changed, 48 insertions(+), 25 deletions(-) (limited to 'include') diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index b500f916a0c..2fb8db5e588 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -54,31 +55,27 @@ static void cm_fx6_enable_hdmi(struct display_info_t const *dev) imx_enable_hdmi_phy(); } -struct display_info_t const displays[] = { - { - .bus = -1, - .addr = 0, - .pixfmt = IPU_PIX_FMT_RGB24, - .detect = detect_hdmi, - .enable = cm_fx6_enable_hdmi, - .mode = { - .name = "HDMI", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 40385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED, - } - }, +static struct display_info_t preset_hdmi_1024X768 = { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .enable = cm_fx6_enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 40385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED, + } }; -size_t display_count = ARRAY_SIZE(displays); static void cm_fx6_setup_display(void) { @@ -93,6 +90,33 @@ static void cm_fx6_setup_display(void) writel(reg, &mxc_ccm->CCGR3); clrbits_le32(&iomuxc_regs->gpr[3], MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK); } + +int board_video_skip(void) +{ + int ret; + struct display_info_t *preset; + char const *panel = getenv("panel"); + + if (!panel) + return -ENOENT; + + if (!strcmp(panel, "HDMI")) + preset = &preset_hdmi_1024X768; + else + return -EINVAL; + + ret = ipuv3_fb_init(&preset->mode, 0, preset->pixfmt); + if (ret) { + printf("Can't init display %s: %d\n", preset->mode.name, ret); + return ret; + } + + preset->enable(preset); + printf("Display: %s (%ux%u)\n", preset->mode.name, preset->mode.xres, + preset->mode.yres); + + return 0; +} #else static inline void cm_fx6_setup_display(void) {} #endif /* CONFIG_VIDEO_IPUV3 */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 231f4ba33d0..f23ef8b01f0 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -258,7 +258,6 @@ #define CONFIG_VIDEO_IPUV3 #define CONFIG_IPUV3_CLK 260000000 #define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_CFB_CONSOLE #define CONFIG_VGA_AS_SINGLE_DEVICE #define CONFIG_SYS_CONSOLE_IS_IN_ENV -- cgit v1.3.1 From 7d731e3a9ac88329d508ded2886a2e28c21b655f Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Thu, 23 Jul 2015 17:19:32 +0300 Subject: arm: mx6: cm-fx6: move CMD configs to defconfig Move CONFIG_CMD_* options that can be selected in menuconfig to cm-fx6 defconfig. Cc: Stefano Babic Cc: Igor Grinberg Signed-off-by: Nikita Kiryanov Acked-by: Igor Grinberg --- configs/cm_fx6_defconfig | 5 +++++ include/configs/cm_fx6.h | 3 --- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 6be5c179ee5..25829dbf457 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -9,4 +9,9 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL" # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y CONFIG_SPI_FLASH=y +CONFIG_CMD_SF=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index f23ef8b01f0..9b00c0d2f26 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -50,7 +50,6 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* SPI flash */ -#define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 25000000 @@ -199,7 +198,6 @@ #define CONFIG_NET_RETRY_COUNT 5 /* USB */ -#define CONFIG_CMD_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_MX6 #define CONFIG_USB_STORAGE @@ -212,7 +210,6 @@ #define CONFIG_SYS_STDIO_DEREGISTER /* I2C */ -#define CONFIG_CMD_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ -- cgit v1.3.1 From 919e802c867543cd9e7577b92c9a1753a305185d Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Thu, 23 Jul 2015 17:19:35 +0300 Subject: arm: mx6: usb: kconfig: add USB_EHCI_MX6 kconfig option Add USB_EHCI_MX6 option to menuconfig and use it when migrating cm-fx6 usb config to defconfig. Cc: Masahiro Yamada Cc: Marek Vasut Cc: Stefano Babic Cc: Igor Grinberg Signed-off-by: Nikita Kiryanov Acked-by: Igor Grinberg --- configs/cm_fx6_defconfig | 4 ++++ drivers/usb/host/Kconfig | 7 +++++++ include/configs/cm_fx6.h | 3 --- 3 files changed, 11 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 7ad5c217834..07a84bbc3e3 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -15,4 +15,8 @@ CONFIG_CMD_PING=y CONFIG_SPI_FLASH=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y +CONFIG_USB=y CONFIG_CMD_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_MX6=y +CONFIG_USB_STORAGE=y diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 8705c7c44c2..b30b43da3b5 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -52,6 +52,13 @@ config USB_EHCI if USB_EHCI_HCD +config USB_EHCI_MX6 + bool "Support for i.MX6 on-chip EHCI USB controller" + depends on ARCH_MX6 + default y + ---help--- + Enables support for the on-chip EHCI controller on i.MX6 SoCs. + config USB_EHCI_UNIPHIER bool "Support for UniPhier on-chip EHCI USB controller" depends on ARCH_UNIPHIER && OF_CONTROL diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 9b00c0d2f26..9f69322f08e 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -198,9 +198,6 @@ #define CONFIG_NET_RETRY_COUNT 5 /* USB */ -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MX6 -#define CONFIG_USB_STORAGE #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -- cgit v1.3.1 From b2f2eea0a7accb758c457e0bd6b15b46a543ecd0 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Thu, 23 Jul 2015 17:19:36 +0300 Subject: usb: kconfig: usb keyboard kconfig Add Kconfig options for USB keyboard and use them for cm-fx6. Cc: Marek Vasut Cc: Stefano Babic Cc: Igor Grinberg Signed-off-by: Nikita Kiryanov Acked-by: Igor Grinberg --- configs/cm_fx6_defconfig | 2 ++ drivers/usb/Kconfig | 27 +++++++++++++++++++++++++++ include/configs/cm_fx6.h | 2 -- 3 files changed, 29 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 07a84bbc3e3..f0fd48cdc18 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -20,3 +20,5 @@ CONFIG_CMD_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_MX6=y CONFIG_USB_STORAGE=y +CONFIG_USB_KEYBOARD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 637ef3d567e..04289f2e613 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -59,4 +59,31 @@ config USB_STORAGE Say Y here if you want to connect USB mass storage devices to your board's USB port. +config USB_KEYBOARD + bool "USB Keyboard support" + ---help--- + Say Y here if you want to use a USB keyboard for U-Boot command line + input. + +if USB_KEYBOARD + +choice + prompt "USB keyboard polling" + optional + ---help--- + Enable a polling mechanism for USB keyboard. + + config SYS_USB_EVENT_POLL + bool "Interrupt polling" + + config SYS_USB_EVENT_POLL_VIA_INT_QUEUE + bool "Poll via interrupt queue" + + config SYS_USB_EVENT_POLL_VIA_CONTROL_EP + bool "Poll via control EP" + +endchoice + +endif + endif diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 9f69322f08e..059004c7ea0 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -202,8 +202,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ -#define CONFIG_USB_KEYBOARD -#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP #define CONFIG_SYS_STDIO_DEREGISTER /* I2C */ -- cgit v1.3.1 From d5af92315bb48740f16bf8817f38e227d3076905 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Thu, 23 Jul 2015 17:19:38 +0300 Subject: sf: kconfig: add kconfig options for spi flashes Add kconfig options for various SPI flashes and use them in cm-fx6 defconfig. Cc: Jagan Teki Cc: Stefano Babic Cc: Igor Grinberg Signed-off-by: Nikita Kiryanov Acked-by: Igor Grinberg --- configs/cm_fx6_defconfig | 8 ++++++++ drivers/mtd/spi/Kconfig | 44 ++++++++++++++++++++++++++++++++++++++++++++ include/configs/cm_fx6.h | 8 -------- 3 files changed, 52 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index f0fd48cdc18..2aba3594ea7 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -13,6 +13,14 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL,SPL" CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_CMD_SF=y CONFIG_CMD_I2C=y CONFIG_USB=y diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 4f0c0402143..8b730ff3c55 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -42,6 +42,50 @@ config SPI_FLASH_BAR Bank/Extended address registers are used to access the flash which has size > 16MiB in 3-byte addressing. +if SPI_FLASH + +config SPI_FLASH_ATMEL + bool "Atmel SPI flash support" + help + Add support for various Atmel SPI flash chips (AT45xxx and AT25xxx) + +config SPI_FLASH_EON + bool "EON SPI flash support" + help + Add support for various EON SPI flash chips (EN25xxx) + +config SPI_FLASH_GIGADEVICE + bool "GigaDevice SPI flash support" + help + Add support for various GigaDevice SPI flash chips (GD25xxx) + +config SPI_FLASH_MACRONIX + bool "Macronix SPI flash support" + help + Add support for various Macronix SPI flash chips (MX25Lxxx) + +config SPI_FLASH_SPANSION + bool "Spansion SPI flash support" + help + Add support for various Spansion SPI flash chips (S25FLxxx) + +config SPI_FLASH_STMICRO + bool "STMicro SPI flash support" + help + Add support for various STMicro SPI flash chips (M25Pxxx and N25Qxxx) + +config SPI_FLASH_SST + bool "SST SPI flash support" + help + Add support for various SST SPI flash chips (SST25xxx) + +config SPI_FLASH_WINBOND + bool "Winbond SPI flash support" + help + Add support for various Winbond SPI flash chips (W25xxx) + +endif + config SPI_FLASH_DATAFLASH bool "AT45xxx DataFlash support" depends on SPI_FLASH && DM_SPI_FLASH diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 059004c7ea0..bbd9f387495 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -162,14 +162,6 @@ /* SPI */ #define CONFIG_SPI #define CONFIG_MXC_SPI -#define CONFIG_SPI_FLASH_ATMEL -#define CONFIG_SPI_FLASH_EON -#define CONFIG_SPI_FLASH_GIGADEVICE -#define CONFIG_SPI_FLASH_MACRONIX -#define CONFIG_SPI_FLASH_SPANSION -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_SST -#define CONFIG_SPI_FLASH_WINBOND /* NAND */ #ifndef CONFIG_SPL_BUILD -- cgit v1.3.1 From 436cf40f05209c36cee78ab8760798840f7474b4 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 20 Jul 2015 19:28:26 +0800 Subject: imx: mx6ul remove errata for i.MX6UL Since i.MX6UL use A7 core, but not A9 core, we do not need the erratas for i.MX6UL. Signed-off-by: Ye.Li Signed-off-by: Peng Fan --- include/configs/mx6_common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 54ab890a790..ce43bd71cb7 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -17,11 +17,11 @@ #ifndef __MX6_COMMON_H #define __MX6_COMMON_H +#ifndef CONFIG_MX6UL #define CONFIG_ARM_ERRATA_743622 #define CONFIG_ARM_ERRATA_751472 #define CONFIG_ARM_ERRATA_794072 #define CONFIG_ARM_ERRATA_761320 -#define CONFIG_BOARD_POSTCLK_INIT #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 @@ -29,6 +29,8 @@ #endif #define CONFIG_MP +#endif +#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK #define CONFIG_SYS_NO_FLASH -- cgit v1.3.1 From 94bd1d143056c1a68d118d151bd54c73828abca1 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 20 Jul 2015 19:28:32 +0800 Subject: mx6_common: Fix LOADADDR and SYS_TEXT_BASE for i.MX6UL DRAM space starts from 0x80000000 for i.MX6UL, so need to fix LOADADDR, SYS_TEXT_BASE. Signed-off-by: Peng Fan --- include/configs/mx6_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index ce43bd71cb7..ef4cb68e8d7 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -54,7 +54,7 @@ #define CONFIG_REVISION_TAG /* Boot options */ -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL)) +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6UL)) #define CONFIG_LOADADDR 0x82000000 #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0x87800000 -- cgit v1.3.1 From 6f4b65eda919a81a02e6acb769060bb8fb121d89 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 20 Jul 2015 19:28:34 +0800 Subject: imx: imx6_spl add mx6ul support i.MX6UL's DRAM space starts from 0x80000000, same to i.MX6SX, so use same address with i.MX6SX. Signed-off-by: Peng Fan --- include/configs/imx6_spl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 21c5dce0978..0a585b700b2 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -61,7 +61,7 @@ #define CONFIG_SPL_LIBDISK_SUPPORT #endif -#if defined(CONFIG_MX6SX) +#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) #define CONFIG_SPL_BSS_START_ADDR 0x88200000 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 -- cgit v1.3.1 From f0ff57b0b272388f24d3dc313f0f97456ee78335 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Mon, 20 Jul 2015 19:28:35 +0800 Subject: imx: mx6ul_14x14_evk add basic board support 1. Add USDHC, I2C, UART, 74LV, USB, QSPI support. 2. Support SPL 3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default supports sd for usdhc2, but can do hardware rework to make usdhc2 support emmc. Boot Log: U-Boot SPL 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59 +0800) CPU: Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C)CPU: Thermal invalid data, fuse: 0x0 - invalid sensor device Reset cause: POR Board: MX6UL 14x14 EVK I2C: ready DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan --- arch/arm/Kconfig | 8 + board/freescale/mx6ul_14x14_evk/Kconfig | 15 + board/freescale/mx6ul_14x14_evk/MAINTAINERS | 6 + board/freescale/mx6ul_14x14_evk/Makefile | 6 + board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 636 ++++++++++++++++++++++ configs/mx6ul_14x14_evk_defconfig | 4 + include/configs/mx6ul_14x14_evk.h | 227 ++++++++ 7 files changed, 902 insertions(+) create mode 100644 board/freescale/mx6ul_14x14_evk/Kconfig create mode 100644 board/freescale/mx6ul_14x14_evk/MAINTAINERS create mode 100644 board/freescale/mx6ul_14x14_evk/Makefile create mode 100644 board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c create mode 100644 configs/mx6ul_14x14_evk_defconfig create mode 100644 include/configs/mx6ul_14x14_evk.h (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fc8c435bbb2..dc3c9aed628 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -578,6 +578,13 @@ config TARGET_MX6SXSABRESD select DM select DM_THERMAL +config TARGET_MX6UL_14X14_EVK + bool "Support mx6ul_14x14_evk" + select CPU_V7 + select DM + select DM_THERMAL + select SUPPORT_SPL + config TARGET_GW_VENTANA bool "Support gw_ventana" select CPU_V7 @@ -915,6 +922,7 @@ source "board/freescale/mx6qsabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig" source "board/freescale/mx6slevk/Kconfig" source "board/freescale/mx6sxsabresd/Kconfig" +source "board/freescale/mx6ul_14x14_evk/Kconfig" source "board/freescale/vf610twr/Kconfig" source "board/gateworks/gw_ventana/Kconfig" source "board/genesi/mx51_efikamx/Kconfig" diff --git a/board/freescale/mx6ul_14x14_evk/Kconfig b/board/freescale/mx6ul_14x14_evk/Kconfig new file mode 100644 index 00000000000..393aca629bc --- /dev/null +++ b/board/freescale/mx6ul_14x14_evk/Kconfig @@ -0,0 +1,15 @@ +if TARGET_MX6UL_14X14_EVK + +config SYS_BOARD + default "mx6ul_14x14_evk" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "mx6ul_14x14_evk" + +endif diff --git a/board/freescale/mx6ul_14x14_evk/MAINTAINERS b/board/freescale/mx6ul_14x14_evk/MAINTAINERS new file mode 100644 index 00000000000..611feca106d --- /dev/null +++ b/board/freescale/mx6ul_14x14_evk/MAINTAINERS @@ -0,0 +1,6 @@ +MX6ULEVK BOARD +M: Peng Fan +S: Maintained +F: board/freescale/mx6ul_14x14_evk/ +F: include/configs/mx6ul_14x14_evk.h +F: configs/mx6ul_14x14_evk_defconfig diff --git a/board/freescale/mx6ul_14x14_evk/Makefile b/board/freescale/mx6ul_14x14_evk/Makefile new file mode 100644 index 00000000000..61f67782461 --- /dev/null +++ b/board/freescale/mx6ul_14x14_evk/Makefile @@ -0,0 +1,6 @@ +# (C) Copyright 2015 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mx6ul_14x14_evk.o diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c new file mode 100644 index 00000000000..8f712cb058a --- /dev/null +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -0,0 +1,636 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_DAT3_CD_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE) + +#define IOX_SDI IMX_GPIO_NR(5, 10) +#define IOX_STCP IMX_GPIO_NR(5, 7) +#define IOX_SHCP IMX_GPIO_NR(5, 11) +#define IOX_OE IMX_GPIO_NR(5, 18) + +static iomux_v3_cfg_t const iox_pads[] = { + /* IOX_SDI */ + MX6_PAD_BOOT_MODE0__GPIO5_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* IOX_SHCP */ + MX6_PAD_BOOT_MODE1__GPIO5_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* IOX_STCP */ + MX6_PAD_SNVS_TAMPER7__GPIO5_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* IOX_nOE */ + MX6_PAD_SNVS_TAMPER8__GPIO5_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +/* + * HDMI_nRST --> Q0 + * ENET1_nRST --> Q1 + * ENET2_nRST --> Q2 + * CAN1_2_STBY --> Q3 + * BT_nPWD --> Q4 + * CSI_RST --> Q5 + * CSI_PWDN --> Q6 + * LCD_nPWREN --> Q7 + */ +enum qn { + HDMI_NRST, + ENET1_NRST, + ENET2_NRST, + CAN1_2_STBY, + BT_NPWD, + CSI_RST, + CSI_PWDN, + LCD_NPWREN, +}; + +enum qn_func { + qn_reset, + qn_enable, + qn_disable, +}; + +enum qn_level { + qn_low = 0, + qn_high = 1, +}; + +static enum qn_level seq[3][2] = { + {0, 1}, {1, 1}, {0, 0} +}; + +static enum qn_func qn_output[8] = { + qn_reset, qn_reset, qn_reset, qn_enable, qn_disable, qn_reset, + qn_disable, qn_enable +}; + +static void iox74lv_init(void) +{ + int i; + + gpio_direction_output(IOX_OE, 0); + + for (i = 7; i >= 0; i--) { + gpio_direction_output(IOX_SHCP, 0); + gpio_direction_output(IOX_SDI, seq[qn_output[i]][0]); + udelay(500); + gpio_direction_output(IOX_SHCP, 1); + udelay(500); + } + + gpio_direction_output(IOX_STCP, 0); + udelay(500); + /* + * shift register will be output to pins + */ + gpio_direction_output(IOX_STCP, 1); + + for (i = 7; i >= 0; i--) { + gpio_direction_output(IOX_SHCP, 0); + gpio_direction_output(IOX_SDI, seq[qn_output[i]][1]); + udelay(500); + gpio_direction_output(IOX_SHCP, 1); + udelay(500); + } + gpio_direction_output(IOX_STCP, 0); + udelay(500); + /* + * shift register will be output to pins + */ + gpio_direction_output(IOX_STCP, 1); + + gpio_direction_output(IOX_OE, 1); +}; + +void iox74lv_set(int index) +{ + int i; + + gpio_direction_output(IOX_OE, 0); + + for (i = 7; i >= 0; i--) { + gpio_direction_output(IOX_SHCP, 0); + + if (i == index) + gpio_direction_output(IOX_SDI, seq[qn_output[i]][0]); + else + gpio_direction_output(IOX_SDI, seq[qn_output[i]][1]); + udelay(500); + gpio_direction_output(IOX_SHCP, 1); + udelay(500); + } + + gpio_direction_output(IOX_STCP, 0); + udelay(500); + /* + * shift register will be output to pins + */ + gpio_direction_output(IOX_STCP, 1); + + for (i = 7; i >= 0; i--) { + gpio_direction_output(IOX_SHCP, 0); + gpio_direction_output(IOX_SDI, seq[qn_output[i]][1]); + udelay(500); + gpio_direction_output(IOX_SHCP, 1); + udelay(500); + } + + gpio_direction_output(IOX_STCP, 0); + udelay(500); + /* + * shift register will be output to pins + */ + gpio_direction_output(IOX_STCP, 1); + + gpio_direction_output(IOX_OE, 1); +}; + +#ifdef CONFIG_SYS_I2C_MXC +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +/* I2C1 for PMIC and EEPROM */ +struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_UART4_TX_DATA__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_UART4_TX_DATA__GPIO1_IO28 | PC, + .gp = IMX_GPIO_NR(1, 28), + }, + .sda = { + .i2c_mode = MX6_PAD_UART4_RX_DATA__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_UART4_RX_DATA__GPIO1_IO29 | PC, + .gp = IMX_GPIO_NR(1, 29), + }, +}; +#endif + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_SIZE; + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + /* VSELECT */ + MX6_PAD_GPIO1_IO05__USDHC1_VSELECT | MUX_PAD_CTRL(USDHC_PAD_CTRL), + /* CD */ + MX6_PAD_UART1_RTS_B__GPIO1_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* RST_B */ + MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +/* + * mx6ul_14x14_evk board default supports sd card. If want to use + * EMMC, need to do board rework for sd2. + * Introduce CONFIG_MX6UL_14X14_EVK_EMMC_REWORK, if sd2 reworked to support + * emmc, need to define this macro. + */ +#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) +static iomux_v3_cfg_t const usdhc2_emmc_pads[] = { + MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA04__USDHC2_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA05__USDHC2_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA06__USDHC2_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA07__USDHC2_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + /* + * RST_B + */ + MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; +#else +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_NAND_RE_B__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_WE_B__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA00__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc2_cd_pads[] = { + /* + * The evk board uses DAT3 to detect CD card plugin, + * in u-boot we mux the pin to GPIO when doing board_mmc_getcd. + */ + MX6_PAD_NAND_DATA03__GPIO4_IO05 | MUX_PAD_CTRL(USDHC_DAT3_CD_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc2_dat3_pads[] = { + MX6_PAD_NAND_DATA03__USDHC2_DATA3 | + MUX_PAD_CTRL(USDHC_DAT3_CD_PAD_CTRL), +}; +#endif + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); +} + +#ifdef CONFIG_FSL_QSPI + +#define QSPI_PAD_CTRL1 \ + (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \ + PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_60ohm) + +static iomux_v3_cfg_t const quadspi_pads[] = { + MX6_PAD_NAND_WP_B__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_READY_B__QSPI_A_DATA00 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_CE0_B__QSPI_A_DATA01 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_CE1_B__QSPI_A_DATA02 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_CLE__QSPI_A_DATA03 | MUX_PAD_CTRL(QSPI_PAD_CTRL1), + MX6_PAD_NAND_DQS__QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL1), +}; + +int board_qspi_init(void) +{ + /* Set the iomux */ + imx_iomux_v3_setup_multiple_pads(quadspi_pads, + ARRAY_SIZE(quadspi_pads)); + /* Set the clock */ + enable_qspi_clk(0); + + return 0; +} +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC1_BASE_ADDR, 0, 4}, +#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) + {USDHC2_BASE_ADDR, 0, 8}, +#else + {USDHC2_BASE_ADDR, 0, 4}, +#endif +}; + +#define USDHC1_CD_GPIO IMX_GPIO_NR(1, 19) +#define USDHC1_PWR_GPIO IMX_GPIO_NR(1, 9) +#define USDHC2_CD_GPIO IMX_GPIO_NR(4, 5) +#define USDHC2_PWR_GPIO IMX_GPIO_NR(4, 10) + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC1_BASE_ADDR: + ret = !gpio_get_value(USDHC1_CD_GPIO); + break; + case USDHC2_BASE_ADDR: +#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) + ret = 1; +#else + imx_iomux_v3_setup_multiple_pads(usdhc2_cd_pads, + ARRAY_SIZE(usdhc2_cd_pads)); + gpio_direction_input(USDHC2_CD_GPIO); + + /* + * Since it is the DAT3 pin, this pin is pulled to + * low voltage if no card + */ + ret = gpio_get_value(USDHC2_CD_GPIO); + + imx_iomux_v3_setup_multiple_pads(usdhc2_dat3_pads, + ARRAY_SIZE(usdhc2_dat3_pads)); +#endif + break; + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ +#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) + imx_iomux_v3_setup_multiple_pads(usdhc2_emmc_pads, + ARRAY_SIZE(usdhc2_emmc_pads)); +#else + imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); +#endif + gpio_direction_output(USDHC2_PWR_GPIO, 0); + udelay(500); + gpio_direction_output(USDHC2_PWR_GPIO, 1); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + return fsl_esdhc_initialize(bis, &usdhc_cfg[1]); +#else + int i, ret; + + /* + * According to the board_mmc_init() the following map is done: + * (U-boot device node) (Physical Port) + * mmc0 USDHC1 + * mmc1 USDHC2 + */ + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); + gpio_direction_input(USDHC1_CD_GPIO); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + gpio_direction_output(USDHC1_PWR_GPIO, 0); + udelay(500); + gpio_direction_output(USDHC1_PWR_GPIO, 1); + break; + case 1: +#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) + imx_iomux_v3_setup_multiple_pads( + usdhc2_emmc_pads, ARRAY_SIZE(usdhc2_emmc_pads)); +#else + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); +#endif + gpio_direction_output(USDHC2_PWR_GPIO, 0); + udelay(500); + gpio_direction_output(USDHC2_PWR_GPIO, 1); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + break; + default: + printf("Warning: you configured more USDHC controllers (%d) than supported by the board\n", i + 1); + return -EINVAL; + } + + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) { + printf("Warning: failed to initialize mmc dev %d\n", i); + return ret; + } + } +#endif + return 0; +} +#endif + +#ifdef CONFIG_USB_EHCI_MX6 +#define USB_OTHERREGS_OFFSET 0x800 +#define UCTRL_PWR_POL (1 << 9) + +static iomux_v3_cfg_t const usb_otg_pads[] = { + MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +/* At default the 3v3 enables the MIC2026 for VBUS power */ +static void setup_usb(void) +{ + imx_iomux_v3_setup_multiple_pads(usb_otg_pads, + ARRAY_SIZE(usb_otg_pads)); +} + +int board_usb_phy_mode(int port) +{ + if (port == 1) + return USB_INIT_HOST; + else + return usb_phy_mode(port); +} + +int board_ehci_hcd_init(int port) +{ + u32 *usbnc_usb_ctrl; + + if (port > 1) + return -EINVAL; + + usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET + + port * 4); + + /* Set Power polarity */ + setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL); + + return 0; +} +#endif + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + return 0; +} + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + imx_iomux_v3_setup_multiple_pads(iox_pads, ARRAY_SIZE(iox_pads)); + + iox74lv_init(); + +#ifdef CONFIG_SYS_I2C_MXC + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); +#endif + +#ifdef CONFIG_USB_EHCI_MX6 + setup_usb(); +#endif + +#ifdef CONFIG_FSL_QSPI + board_qspi_init(); +#endif + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"sd1", MAKE_CFGVAL(0x42, 0x20, 0x00, 0x00)}, + {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, + {"qspi1", MAKE_CFGVAL(0x10, 0x00, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int board_late_init(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + + return 0; +} + +u32 get_board_rev(void) +{ + return get_cpu_rev(); +} + +int checkboard(void) +{ + puts("Board: MX6UL 14x14 EVK\n"); + + return 0; +} + +#ifdef CONFIG_SPL_BUILD +#include +#include +#include + +const struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = { + .dram_dqm0 = 0x00000030, + .dram_dqm1 = 0x00000030, + .dram_ras = 0x00000030, + .dram_cas = 0x00000030, + .dram_odt0 = 0x00000030, + .dram_odt1 = 0x00000030, + .dram_sdba2 = 0x00000000, + .dram_sdclk_0 = 0x00000008, + .dram_sdqs0 = 0x00000038, + .dram_sdqs1 = 0x00000030, + .dram_reset = 0x00000030, +}; + +const struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { + .grp_addds = 0x00000030, + .grp_ddrmode_ctl = 0x00020000, + .grp_b0ds = 0x00000030, + .grp_ctlds = 0x00000030, + .grp_b1ds = 0x00000030, + .grp_ddrpke = 0x00000000, + .grp_ddrmode = 0x00020000, + .grp_ddr_type = 0x000c0000, +}; + +const struct mx6_mmdc_calibration mx6_mmcd_calib = { + .p0_mpwldectrl0 = 0x00070007, + .p0_mpdgctrl0 = 0x41490145, + .p0_mprddlctl = 0x40404546, + .p0_mpwrdlctl = 0x4040524D, +}; + +static struct mx6_ddr3_cfg mem_ddr = { + .mem_speed = 800, + .density = 4, + .width = 16, + .banks = 8, + .rowaddr = 15, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0xFFFFFFFF, &ccm->CCGR0); + writel(0xFFFFFFFF, &ccm->CCGR1); + writel(0xFFFFFFFF, &ccm->CCGR2); + writel(0xFFFFFFFF, &ccm->CCGR3); + writel(0xFFFFFFFF, &ccm->CCGR4); + writel(0xFFFFFFFF, &ccm->CCGR5); + writel(0xFFFFFFFF, &ccm->CCGR6); + writel(0xFFFFFFFF, &ccm->CCGR7); +} + +static void spl_dram_init(void) +{ + struct mx6_ddr_sysinfo sysinfo = { + .dsize = 0, + .cs_density = 20, + .ncs = 1, + .cs1_mirror = 0, + .rtt_wr = 2, + .rtt_nom = 1, /* RTT_Nom = RZQ/2 */ + .walat = 1, /* Write additional latency */ + .ralat = 5, /* Read additional latency */ + .mif3_mode = 3, /* Command prediction working mode */ + .bi_on = 1, /* Bank interleaving enabled */ + .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ + .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ + }; + + mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs); + mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr); +} + +void board_init_f(ulong dummy) +{ + /* setup AIPS and disable watchdog */ + arch_cpu_init(); + + ccgr_init(); + + /* iomux and setup of i2c */ + board_early_init_f(); + + /* setup GP timer */ + timer_init(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + /* DDR initialization */ + spl_dram_init(); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + /* load/boot image from boot device */ + board_init_r(NULL, 0); +} + +void reset_cpu(ulong addr) +{ +} +#endif diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig new file mode 100644 index 00000000000..b6eefafed2b --- /dev/null +++ b/configs/mx6ul_14x14_evk_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6UL" +CONFIG_ARM=y +CONFIG_TARGET_MX6UL_14X14_EVK=y +CONFIG_SPL=y diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h new file mode 100644 index 00000000000..436b0227b97 --- /dev/null +++ b/include/configs/mx6ul_14x14_evk.h @@ -0,0 +1,227 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * Configuration settings for the Freescale i.MX6UL 14x14 EVK board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __MX6UL_14X14_EVK_CONFIG_H +#define __MX6UL_14X14_EVK_CONFIG_H + + +#include +#include +#include "mx6_common.h" +#include + +/* SPL options */ +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT +#include "imx6_spl.h" + +#define CONFIG_MX6 +#define CONFIG_ROM_UNIFIED_SECTIONS +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +/* MMC Configs */ +#ifdef CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR + +/* NAND pin conflicts with usdhc2 */ +#ifdef CONFIG_NAND_MXS +#define CONFIG_SYS_FSL_USDHC_NUM 1 +#else +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#endif + +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#endif + +#undef CONFIG_BOOTM_NETBSD +#undef CONFIG_BOOTM_PLAN9 +#undef CONFIG_BOOTM_RTEMS + +#undef CONFIG_CMD_EXPORTENV +#undef CONFIG_CMD_IMPORTENV + +/* I2C configs */ +#define CONFIG_CMD_I2C +#ifdef CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#endif + +#define PHYS_SDRAM_SIZE SZ_512M + +#undef CONFIG_CMD_IMLS + +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=zImage\0" \ + "console=ttymxc0\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_file=imx6ul-14x14-evk.dtb\0" \ + "fdt_addr=0x83000000\0" \ + "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev};" \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else run netboot; fi" + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT "=> " +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE SZ_128K + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET (8 * SZ_64K) +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_BMODE + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_FSL_QSPI +#ifdef CONFIG_FSL_QSPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 40000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define FSL_QSPI_FLASH_NUM 1 +#define FSL_QSPI_FLASH_SIZE SZ_32M +#endif + +/* USB Configs */ +#define CONFIG_CMD_USB +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#endif + +#define CONFIG_IMX6_THERMAL + +#endif -- cgit v1.3.1