From 3666afffe7baf859c6ae0ce2bebbc8ab7e512ddc Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 17 Jun 2007 19:03:21 +0200 Subject: [FIX] fix microblaze file permitission --- include/asm-microblaze/asm.h | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 include/asm-microblaze/asm.h (limited to 'include') diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h old mode 100755 new mode 100644 -- cgit v1.3.1 From 5280f352c8da33b1d7fbf448768717d9e16ff9a1 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sat, 14 Jul 2007 13:11:28 +0200 Subject: [FIX] support for simply measuring time --- include/configs/suzaku.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 82245558961..ca5c7519c61 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -97,4 +97,6 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define XILINX_CLOCK_FREQ 50000000 + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 98889edd50aadf862071eb5664747ad0d568a20e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 5 Aug 2007 15:54:53 +0200 Subject: [FIX] Change configuration for XUPV2P Microblaze board --- board/xilinx/xupv2p/Makefile | 21 +++------------ board/xilinx/xupv2p/config.mk | 6 ++--- board/xilinx/xupv2p/xparameters.h | 27 ++++++++++--------- include/configs/xupv2p.h | 57 ++++++++++++++++++++++++++++++++++----- 4 files changed, 72 insertions(+), 39 deletions(-) (limited to 'include') diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile index 9ab5633626e..99e7047350f 100644 --- a/board/xilinx/xupv2p/Makefile +++ b/board/xilinx/xupv2p/Makefile @@ -22,32 +22,17 @@ # include $(TOPDIR)/config.mk -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)../common) -$(shell mkdir -p $(obj)../xilinx_enet) -endif - -INCS := -I../common -I../xilinx_enet -CFLAGS += $(INCS) -HOST_CFLAGS += $(INCS) LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o \ - ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ - ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ - ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ - ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \ - ../common/xbasic_types.o ../common/xdma_channel.o \ - ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ - ../common/xversion.o \ +COBJS = $(BOARD).o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $^ +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk index c07b0b35b18..eedfb24d4f3 100644 --- a/board/xilinx/xupv2p/config.mk +++ b/board/xilinx/xupv2p/config.mk @@ -25,8 +25,8 @@ # Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 # -TEXT_BASE = 0x38000000 +TEXT_BASE = 0x30000000 +PLATFORM_CPPFLAGS += -mxl-pattern-compare PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mno-xl-soft-div -PLATFORM_CPPFLAGS += -mxl-barrel-shift +PLATFORM_CPPFLAGS += -mcpu=v5.00.c diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h index a96c693c551..0bb7a805f4a 100644 --- a/board/xilinx/xupv2p/xparameters.h +++ b/board/xilinx/xupv2p/xparameters.h @@ -28,17 +28,24 @@ /* System Clock Frequency */ #define XILINX_CLOCK_FREQ 100000000 +/* Microblaze is microblaze_0 */ +#define XILINX_USE_MSR_INSTR 1 +#define XILINX_PVR 0 +#define XILINX_FSL_NUMBER 0 + /* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 11 +#define XILINX_INTC_NUM_INTR_INPUTS 7 /* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 1 +#define XILINX_TIMER_IRQ 0 /* Uart pheriphery is RS232_Uart_1 */ -#define XILINX_UART_BASEADDR 0x40600000 -#define XILINX_UART_BAUDRATE 115200 +#define XILINX_UARTLITE_BASEADDR 0x40600000 +#define XILINX_UARTLITE_BAUDRATE 115200 + +/* IIC doesn't exist */ /* GPIO is LEDs_4Bit*/ #define XILINX_GPIO_BASEADDR 0x40000000 @@ -51,14 +58,10 @@ /* Sysace Controller is SysACE_CompactFlash */ #define XILINX_SYSACE_BASEADDR 0x41800000 -#define XILINX_SYSACE_HIGHADDR 0x4180ffff #define XILINX_SYSACE_MEM_WIDTH 16 /* Ethernet controller is Ethernet_MAC */ -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 +#define XILINX_EMAC_BASEADDR 0x40c00000 +#define XILINX_EMAC_DMA_PRESENT 3 +#define XILINX_EMAC_HALF_DUPLEX_EXIST 1 +#define XILINX_EMAC_MII_EXIST 1 diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index b4c720d18b5..25fa4956412 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,13 +31,33 @@ #define CONFIG_XUPV2P 1 /* uart */ -#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR -#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE +#ifdef XILINX_UARTLITE_BASEADDR +#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR +#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } +#else +#ifdef XILINX_UART16550_BASEADDR +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE 4 +#define CONFIG_CONS_INDEX 1 +#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR +#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ + +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600, 115200 } +#endif +#endif /* ethernet */ -#define CONFIG_EMAC 1 -#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES +#ifdef XILINX_EMAC_BASEADDR +#define XILINX_EMAC 1 +#else +#ifdef XILINX_EMACLITE_BASEADDR +#define XILINX_EMACLITE 1 +#endif +#endif +#undef ET_DEBUG /* * setting reset address @@ -48,11 +68,13 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -#define CFG_RESET_ADDRESS 0x36000000 +/* #define CFG_RESET_ADDRESS 0x36000000 */ /* gpio */ +#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR +#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -118,6 +140,25 @@ #define CFG_ENV_IS_NOWHERE 1 #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) +#ifndef XILINX_SYSACE_BASEADDR +#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ + CFG_CMD_MEMORY |\ + CFG_CMD_IRQ |\ + CFG_CMD_BDI |\ + CFG_CMD_NET |\ + CFG_CMD_IMI |\ + CFG_CMD_ECHO |\ + CFG_CMD_CACHE |\ + CFG_CMD_RUN |\ + CFG_CMD_AUTOSCRIPT |\ + CFG_CMD_ASKENV |\ + CFG_CMD_LOADS |\ + CFG_CMD_LOADB |\ + CFG_CMD_MISC |\ + CFG_CMD_MFSL |\ + CFG_CMD_PING \ + ) +#else #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\ CFG_CMD_MEMORY |\ CFG_CMD_IRQ |\ @@ -134,8 +175,10 @@ CFG_CMD_MISC |\ CFG_CMD_FAT |\ CFG_CMD_EXT2 |\ + CFG_CMD_MFSL |\ CFG_CMD_PING \ ) +#endif /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -150,7 +193,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "ml401" +#define CONFIG_HOSTNAME "xupv2p" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -166,11 +209,13 @@ "echo" /* system ace */ +#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION +#endif #endif /* __CONFIG_H */ -- cgit v1.3.1 From af8377d4eb3a0ac5a831830d5ce63fbf65fecb7f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 5 Aug 2007 16:13:31 +0200 Subject: [FIX] Xilinx Uartlite driver Because PPC405 can use UARTLITE serial interface and Microblaze can use Uart16550 serial interface not only Uartlite. --- drivers/serial_xuartlite.c | 2 +- include/configs/ml401.h | 1 + include/configs/suzaku.h | 1 + include/configs/xupv2p.h | 1 + 4 files changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/drivers/serial_xuartlite.c b/drivers/serial_xuartlite.c index ed59abea862..1f3aaae4034 100644 --- a/drivers/serial_xuartlite.c +++ b/drivers/serial_xuartlite.c @@ -24,7 +24,7 @@ #include -#ifdef CONFIG_MICROBLAZE +#ifdef XILINX_UARTLITE #include diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 3db287784da..a6026528b30 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -32,6 +32,7 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ +#define XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index ca5c7519c61..9661726b2ba 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,6 +48,7 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) +#define XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 25fa4956412..bac31f476b0 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -32,6 +32,7 @@ /* uart */ #ifdef XILINX_UARTLITE_BASEADDR +#define XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } -- cgit v1.3.1 From a274ca4f6d68830e7c916f897561cff8c4101c38 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 5 Aug 2007 22:33:05 +0200 Subject: [FIX] Coding style cleanup --- drivers/net/xilinx_emac.h | 71 +++++++++++++++++++++---------------------- drivers/net/xilinx_emaclite.c | 10 +++--- include/configs/ml401.h | 10 +++--- 3 files changed, 45 insertions(+), 46 deletions(-) (limited to 'include') diff --git a/drivers/net/xilinx_emac.h b/drivers/net/xilinx_emac.h index ab4d2121f13..7c00eebf048 100644 --- a/drivers/net/xilinx_emac.h +++ b/drivers/net/xilinx_emac.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. @@ -13,7 +13,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -35,34 +35,33 @@ typedef struct { u32 IsStarted; /* Device is currently started 0-no, 1-yes */ XPacketFifoV100b RecvFifo; /* FIFO used to receive frames */ XPacketFifoV100b SendFifo; /* FIFO used to send frames */ - } XEmac; -#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ +#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ #define XIIF_V123B_RESET_MASK 0xAUL #define XIIF_V123B_RESETR_OFFSET 64UL /* reset register */ /* This constant is used with the Reset Register */ -#define XPF_RESET_FIFO_MASK 0x0000000A -#define XPF_COUNT_STATUS_REG_OFFSET 4UL +#define XPF_RESET_FIFO_MASK 0x0000000A +#define XPF_COUNT_STATUS_REG_OFFSET 4UL -/* * These constants are used with the Occupancy/Vacancy Count Register. This - * register also contains FIFO status */ -#define XPF_COUNT_MASK 0x0000FFFF -#define XPF_DEADLOCK_MASK 0x20000000 +/* These constants are used with the Occupancy/Vacancy Count Register. This + * register also contains FIFO status */ +#define XPF_COUNT_MASK 0x0000FFFF +#define XPF_DEADLOCK_MASK 0x20000000 /* Offset of the MAC registers from the IPIF base address */ -#define XEM_REG_OFFSET 0x1100UL +#define XEM_REG_OFFSET 0x1100UL /* * Register offsets for the Ethernet MAC. Each register is 32 bits. */ -#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */ -#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */ -#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */ -#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */ -#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */ -#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */ +#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */ +#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */ +#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */ +#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */ +#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */ +#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */ @@ -78,31 +77,31 @@ typedef struct { * part of the IPIF IP Interrupt registers */ /* A mask for all transmit interrupts, used in polled mode */ -#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK | \ - XEM_EIR_XMIT_ERROR_MASK | \ - XEM_EIR_XMIT_SFIFO_EMPTY_MASK | \ +#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK |\ + XEM_EIR_XMIT_ERROR_MASK | \ + XEM_EIR_XMIT_SFIFO_EMPTY_MASK |\ XEM_EIR_XMIT_LFIFO_FULL_MASK) -#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL /* Xmit complete */ -#define XEM_EIR_RECV_DONE_MASK 0x00000002UL /* Recv complete */ -#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL /* Xmit error */ -#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL /* Recv error */ -#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL /* Xmit status fifo empty */ -#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL /* Recv length fifo empty */ -#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL /* Xmit length fifo full */ -#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL /* Recv length fifo +#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL /* Xmit complete */ +#define XEM_EIR_RECV_DONE_MASK 0x00000002UL /* Recv complete */ +#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL /* Xmit error */ +#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL /* Recv error */ +#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL /* Xmit status fifo empty */ +#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL /* Recv length fifo empty */ +#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL /* Xmit length fifo full */ +#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL /* Recv length fifo * overrun */ -#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL /* Recv length fifo +#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL /* Recv length fifo * underrun */ -#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL /* Xmit status fifo +#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL /* Xmit status fifo * overrun */ -#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL /* Transmit status fifo +#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL /* Transmit status fifo * underrun */ -#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL /* Transmit length fifo +#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL /* Transmit length fifo * overrun */ -#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL /* Transmit length fifo +#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL /* Transmit length fifo * underrun */ -#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL /* Transmit pause pkt +#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL /* Transmit pause pkt * received */ /* @@ -124,5 +123,5 @@ typedef struct { * addr */ /* Transmit Status Register (TSR) */ -#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL /* Transmit excess deferral */ -#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL /* Transmit late collision */ +#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL /* Transmit excess deferral */ +#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL /* Transmit late collision */ diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 7e69211af94..99e70354b61 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -29,7 +29,7 @@ #ifdef XILINX_EMACLITE_BASEADDR -//#define DEBUG +#undef DEBUG #define ENET_MAX_MTU PKTSIZE #define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN @@ -310,7 +310,7 @@ int eth_rx (void) BaseAddress = EmacLite.BaseAddress + EmacLite.NextRxBufferToUse; Register = in_be32 (BaseAddress + XEL_RSR_OFFSET); #ifdef DEBUG -// printf ("Testing data at address 0x%x\n", BaseAddress); + printf ("Testing data at address 0x%x\n", BaseAddress); #endif if ((Register & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { #ifdef XILINX_EMACLITE_RX_PING_PONG @@ -319,7 +319,7 @@ int eth_rx (void) } else { #ifndef XILINX_EMACLITE_RX_PING_PONG #ifdef DEBUG -// printf ("No data was available - address 0x%x\n", BaseAddress); + printf ("No data was available - address 0x%x\n", BaseAddress); #endif return 0; #else @@ -328,8 +328,8 @@ int eth_rx (void) if ((Register & XEL_RSR_RECV_DONE_MASK) != XEL_RSR_RECV_DONE_MASK) { #ifdef DEBUG -// printf ("No data was available - address 0x%x\n", -// BaseAddress); + printf ("No data was available - address 0x%x\n", + BaseAddress); #endif return 0; } diff --git a/include/configs/ml401.h b/include/configs/ml401.h index a6026528b30..8b74b7c686d 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -87,7 +87,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -100,7 +100,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -243,10 +243,10 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ -- cgit v1.3.1 From d1ed28cf36ab6b1d4c479809de7252bf53d2f2d4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 15 Aug 2007 21:05:07 +0200 Subject: [FIX] Correction command setting for Microblaze boards --- include/configs/ml401.h | 12 ++---------- include/configs/suzaku.h | 15 +++++---------- include/configs/xupv2p.h | 19 ++++++------------- 3 files changed, 13 insertions(+), 33 deletions(-) (limited to 'include') diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 831929882ab..00599391af7 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Czech Technical University. * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. @@ -160,21 +160,13 @@ #include #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT -#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL -#define CONFIG_CMD_NET #define CONFIG_CMD_PING -#define CONFIG_CMD_RUN + #if defined(FLASH) #define CONFIG_CMD_ECHO diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 22c529b690b..9a2eec1bb2a 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -56,21 +56,16 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_ENV +#undef CONFIG_CMD_MEMORY +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index b93b3876bc2..006a132881d 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -155,21 +155,14 @@ */ #include -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_BDI -#define CONFIG_CMD_NET -#define CONFIG_CMD_IMI -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_RUN -#define CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MISC -#define CONFIG_CMD_PING +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_IRQ #define CONFIG_CMD_MFSL +#define CONFIG_CMD_PING #ifdef XILINX_SYSACE_BASEADDR #define CONFIG_CMD_EXT2 -- cgit v1.3.1 From 2c05fd125744981e5f2828d24e66ccc20a77d25d Mon Sep 17 00:00:00 2001 From: Semih Hazar Date: Mon, 20 Aug 2007 19:00:01 +0300 Subject: AVR32: Change prototype of memset Signed-off-by: Semih Hazar Signed-off-by: Haavard Skinnemoen --- include/asm-avr32/string.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-avr32/string.h b/include/asm-avr32/string.h index 8b05d1a031e..58582a3115d 100644 --- a/include/asm-avr32/string.h +++ b/include/asm-avr32/string.h @@ -23,6 +23,6 @@ #define __ASM_AVR32_STRING_H #define __HAVE_ARCH_MEMSET -extern void *memset(void *s, int c, size_t n); +extern void *memset(void *s, int c, __kernel_size_t n); #endif /* __ASM_AVR32_STRING_H */ -- cgit v1.3.1 From 04625764cc93ce8a61625ac19d7fe2a2ceee8143 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 29 Aug 2007 16:31:18 +0200 Subject: ppc4xx: Change lwmon5 default environment to support Linux RTC The Linux PCF8563 RTC driver doesn't do autoprobing, so we need to supply the RTC I2C address as bootline parameter. This patch adds support for this rtc probing parameter to the bootargs: "rtc-pcf8563.probe=0,0x51" Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index be483245b91..50df8481393 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -200,12 +200,13 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0"\ - "flash_nfs=run nfsargs addip addtty;" \ + "addmisc=setenv bootargs ${bootargs} rtc-pcf8563.probe=0,0x51\0"\ + "flash_nfs=run nfsargs addip addtty addmisc;" \ "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addtty;" \ + "flash_self=run ramargs addip addtty addmisc;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \ - "bootm\0" \ + "net_nfs=tftp 200000 ${bootfile};" \ + "run nfsargs addip addtty addmisc;bootm\0" \ "rootpath=/opt/eldk/ppc_4xxFP\0" \ "bootfile=/tftpboot/lwmon5/uImage\0" \ "kernel_addr=FC000000\0" \ -- cgit v1.3.1 From c88b6e1cbf9a8ae2a34fb602f78a1bf4e6692b6a Mon Sep 17 00:00:00 2001 From: Hans-Christian Egtvedt Date: Thu, 30 Aug 2007 15:03:04 +0200 Subject: Remove double quotation marks around MAC address for STK1002 Signed-off-by: Hans-Christian Egtvedt Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index e1d8f74c5ec..65736644b61 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -103,8 +103,8 @@ * generated and assigned to the environment variables "ethaddr" and * "eth1addr". */ -#define CONFIG_ETHADDR "6a:87:71:14:cd:cb" -#define CONFIG_ETH1ADDR "ca:f8:15:e6:3e:e6" +#define CONFIG_ETHADDR 6a:87:71:14:cd:cb +#define CONFIG_ETH1ADDR ca:f8:15:e6:3e:e6 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 #define CONFIG_NET_MULTI 1 -- cgit v1.3.1 From 696dd1307cd8e73a10e9bb3c51731bfd6f837bee Mon Sep 17 00:00:00 2001 From: Hans-Christian Egtvedt Date: Thu, 30 Aug 2007 15:03:05 +0200 Subject: Reduce BOOTDELAY variable to 1 second by default for STK1002 Signed-off-by: Hans-Christian Egtvedt Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 65736644b61..f7bf62c825f 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -87,7 +87,7 @@ * Only interrupt autoboot if is pressed. Otherwise, garbage * data on the serial line may interrupt the boot sequence. */ -#define CONFIG_BOOTDELAY 2 +#define CONFIG_BOOTDELAY 1 #define CONFIG_AUTOBOOT 1 #define CONFIG_AUTOBOOT_KEYED 1 #define CONFIG_AUTOBOOT_PROMPT \ -- cgit v1.3.1 From 557ab89d294f08dd532f21d19861b40093200a33 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 4 Sep 2007 14:23:50 +0100 Subject: Rename CONFIG_CMD_MUX to CONFIG_CMD_AT91_SPIMUX --- include/config_cmd_all.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100644 => 100755 include/config_cmd_all.h (limited to 'include') diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h old mode 100644 new mode 100755 index 3d91e99b97f..77ea025c097 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -76,6 +76,6 @@ #define CONFIG_CMD_USB /* USB Support */ #define CONFIG_CMD_VFD /* VFD support (TRAB) */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ -#define CONFIG_CMD_MUX /* AT91 MMC/SPI Mux Support */ +#define CONFIG_CMD_AT91_SPIMUX /* AT91 MMC/SPI Mux Support */ #endif /* _CONFIG_CMD_ALL_H */ -- cgit v1.3.1 From 7462fe0d5a9d40cde083fb1a3cd73911996b5ecb Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 4 Sep 2007 14:49:28 +0100 Subject: Move include/led.h to board/at91rm9200dk --- board/at91rm9200dk/led.h | 45 +++++++++++++++++++++++++++++++++++++++++++++ include/led.h | 45 --------------------------------------------- 2 files changed, 45 insertions(+), 45 deletions(-) create mode 100644 board/at91rm9200dk/led.h delete mode 100644 include/led.h (limited to 'include') diff --git a/board/at91rm9200dk/led.h b/board/at91rm9200dk/led.h new file mode 100644 index 00000000000..57c2b4a3777 --- /dev/null +++ b/board/at91rm9200dk/led.h @@ -0,0 +1,45 @@ +/* + * (C) Copyright 2006 + * Atmel Nordic AB + * Ulf Samuelsson + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __LED_H +#define __LED_H + +#ifndef __ASSEMBLY__ +extern void LED_init (void); +extern void red_LED_on(void); +extern void red_LED_off(void); +extern void green_LED_on(void); +extern void green_LED_off(void); +extern void yellow_LED_on(void); +extern void yellow_LED_off(void); +#else + .extern LED_init + .extern red_LED_on + .extern red_LED_off + .extern yellow_LED_on + .extern yellow_LED_off + .extern green_LED_on + .extern green_LED_off +#endif +#endif diff --git a/include/led.h b/include/led.h deleted file mode 100644 index 57c2b4a3777..00000000000 --- a/include/led.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2006 - * Atmel Nordic AB - * Ulf Samuelsson - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __LED_H -#define __LED_H - -#ifndef __ASSEMBLY__ -extern void LED_init (void); -extern void red_LED_on(void); -extern void red_LED_off(void); -extern void green_LED_on(void); -extern void green_LED_off(void); -extern void yellow_LED_on(void); -extern void yellow_LED_off(void); -#else - .extern LED_init - .extern red_LED_on - .extern red_LED_off - .extern yellow_LED_on - .extern yellow_LED_off - .extern green_LED_on - .extern green_LED_off -#endif -#endif -- cgit v1.3.1 From 9f5c3d3720e777a572dcdc8af2008b44c7243885 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 4 Sep 2007 16:18:38 +0100 Subject: Add coloured led interface for ARM boards. Use it in cpu/arm920t/start.S to indicate U-Boot code has been entered. --- board/at91rm9200dk/led.h | 45 --------------------------------------------- cpu/arm920t/start.S | 14 ++++++-------- include/asm-arm/led.h | 45 +++++++++++++++++++++++++++++++++++++++++++++ lib_arm/board.c | 24 ++++++++++++++++++++++++ 4 files changed, 75 insertions(+), 53 deletions(-) delete mode 100644 board/at91rm9200dk/led.h mode change 100644 => 100755 cpu/arm920t/start.S create mode 100755 include/asm-arm/led.h mode change 100644 => 100755 lib_arm/board.c (limited to 'include') diff --git a/board/at91rm9200dk/led.h b/board/at91rm9200dk/led.h deleted file mode 100644 index 57c2b4a3777..00000000000 --- a/board/at91rm9200dk/led.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2006 - * Atmel Nordic AB - * Ulf Samuelsson - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __LED_H -#define __LED_H - -#ifndef __ASSEMBLY__ -extern void LED_init (void); -extern void red_LED_on(void); -extern void red_LED_off(void); -extern void green_LED_on(void); -extern void green_LED_off(void); -extern void yellow_LED_on(void); -extern void yellow_LED_off(void); -#else - .extern LED_init - .extern red_LED_on - .extern red_LED_off - .extern yellow_LED_on - .extern yellow_LED_off - .extern green_LED_on - .extern green_LED_off -#endif -#endif diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S old mode 100644 new mode 100755 index b9c364bc672..1bc6099b4ef --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,9 +27,7 @@ #include #include -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF) -#include -#endif +#include /* ************************************************************************* @@ -117,13 +115,13 @@ reset: bic r0,r0,#0x1f orr r0,r0,#0xd3 msr cpsr,r0 - -#if CONFIG_AT91RM9200 -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF) - bl LED_init + /* + * if board has a red led use it to show U-Boot is running + */ + bl coloured_LED_init bl red_LED_on -#endif +#ifdef CONFIG_AT91RM9200 #ifdef CONFIG_BOOTBINFUNC /* code based on entry.S from ATMEL */ #define AT91C_BASE_CKGR 0xFFFFFC20 diff --git a/include/asm-arm/led.h b/include/asm-arm/led.h new file mode 100755 index 00000000000..f78a4b10041 --- /dev/null +++ b/include/asm-arm/led.h @@ -0,0 +1,45 @@ +/* + * (C) Copyright 2006 + * Atmel Nordic AB + * Ulf Samuelsson + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __LED_H +#define __LED_H + +#ifndef __ASSEMBLY__ +extern void coloured_LED_init (void); +extern void red_LED_on(void); +extern void red_LED_off(void); +extern void green_LED_on(void); +extern void green_LED_off(void); +extern void yellow_LED_on(void); +extern void yellow_LED_off(void); +#else + .extern LED_init + .extern red_LED_on + .extern red_LED_off + .extern yellow_LED_on + .extern yellow_LED_off + .extern green_LED_on + .extern green_LED_off +#endif +#endif diff --git a/lib_arm/board.c b/lib_arm/board.c old mode 100644 new mode 100755 index d37e5dab352..6b49925a590 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -111,6 +111,30 @@ void *sbrk (ptrdiff_t increment) return ((void *) old); } +/************************************************************************ + * Coloured LED functionality + ************************************************************************ + * May be supplied by boards if desired + */ +void inline __coloured_LED_init (void) {} +void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); +void inline __red_LED_on (void) {} +void inline red_LED_on (void) __attribute__((weak, alias("__red_LED_on"))); +void inline __red_LED_off(void) {} +void inline red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); +void inline __green_LED_on(void) {} +void inline green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); +void inline __green_LED_off(void) {} +void inline green_LED_off(void)__attribute__((weak, alias("__green_LED_off"))); +void inline __yellow_LED_on(void) {} +void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); +void inline __yellow_LED_off(void) {} +void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); + + + + + /************************************************************************ * Init Utilities * ************************************************************************ -- cgit v1.3.1 From 80767a6cead9990d9e77e62be947843c2c72f469 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Wed, 5 Sep 2007 16:04:41 +0100 Subject: Changed API name to coloured_led.h Removed code using deprecated ifdef CONFIG_BOOTBINFUNC Tidied other cpu/arm920t/start.S code --- board/at91rm9200dk/led.c | 2 +- cpu/arm920t/start.S | 126 +++++++---------------------------------- include/asm-arm/coloured_led.h | 45 +++++++++++++++ include/asm-arm/led.h | 45 --------------- 4 files changed, 67 insertions(+), 151 deletions(-) create mode 100755 include/asm-arm/coloured_led.h delete mode 100755 include/asm-arm/led.h (limited to 'include') diff --git a/board/at91rm9200dk/led.c b/board/at91rm9200dk/led.c index 051891883f6..47a3bfce68b 100644 --- a/board/at91rm9200dk/led.c +++ b/board/at91rm9200dk/led.c @@ -66,7 +66,7 @@ void red_LED_off(void) } -void LED_init (void) +void coloured_LED_init (void) { AT91PS_PIO PIOB = AT91C_BASE_PIOB; AT91PS_PMC PMC = AT91C_BASE_PMC; diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 1bc6099b4ef..df2ee20cbe9 100755 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,7 +27,7 @@ #include #include -#include +#include /* ************************************************************************* @@ -39,7 +39,7 @@ .globl _start -_start: b reset +_start: b start_code ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -62,7 +62,7 @@ _fiq: .word fiq /* ************************************************************************* * - * Startup Code (reset vector) + * Startup Code (called from the ARM reset exception vector) * * do important init only if we don't start from memory! * relocate armboot to ram @@ -104,10 +104,10 @@ FIQ_STACK_START: /* - * the actual reset code + * the actual start code */ -reset: +start_code: /* * set the cpu to SVC32 mode */ @@ -115,59 +115,13 @@ reset: bic r0,r0,#0x1f orr r0,r0,#0xd3 msr cpsr,r0 - /* - * if board has a red led use it to show U-Boot is running - */ + bl coloured_LED_init bl red_LED_on -#ifdef CONFIG_AT91RM9200 -#ifdef CONFIG_BOOTBINFUNC -/* code based on entry.S from ATMEL */ -#define AT91C_BASE_CKGR 0xFFFFFC20 -#define CKGR_MOR 0 - /* Get the CKGR Base Address */ - ldr r1, =AT91C_BASE_CKGR - -/* Main oscillator Enable register APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */ -/* ldr r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT */ - ldr r0, =0x0000FF01 - str r0, [r1, #CKGR_MOR] - /* Add loop to compensate Main Oscillator startup time */ - ldr r0, =0x00000010 -LoopOsc: - subs r0, r0, #1 - bhi LoopOsc - /* scratch stack */ - ldr r1, =0x00204000 - /* Insure word alignment */ - bic r1, r1, #3 - /* Init stack SYS */ - mov sp, r1 - /* - * This does a lot more than just set up the memory, which - * is why it's called lowlevelinit - */ - bl lowlevelinit /* in memsetup.S */ - bl icache_enable; - /* ------------------------------------ - * Read/modify/write CP15 control register - * ------------------------------------- - * read cp15 control register (cp15 r1) in r0 - * ------------------------------------ - */ - mrc p15, 0, r0, c1, c0, 0 - /* Reset bit :Little Endian end fast bus mode */ - ldr r3, =0xC0000080 - /* Set bit :Asynchronous clock mode, Not Fast Bus */ - ldr r4, =0xC0000000 - bic r0, r0, r3 - orr r0, r0, r4 - /* write r0 in cp15 control register (cp15 r1) */ - mcr p15, 0, r0, c1, c0, 0 -#endif /* CONFIG_BOOTBINFUNC */ +#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF) /* - * relocate exeception table + * relocate exception table */ ldr r0, =_start ldr r1, =0x0 @@ -179,19 +133,20 @@ copyex: bne copyex #endif -/* turn off the watchdog */ -#if defined(CONFIG_S3C2400) -# define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ -# define CLKDIVN 0x14800014 /* clock divisor register */ -#elif defined(CONFIG_S3C2410) -# define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ -# define INTSUBMSK 0x4A00001C -# define CLKDIVN 0x4C000014 /* clock divisor register */ -#endif - #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) + /* turn off the watchdog */ + +# if defined(CONFIG_S3C2400) +# define pWTCON 0x15300000 +# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ +# define CLKDIVN 0x14800014 /* clock divisor register */ +#else +# define pWTCON 0x53000000 +# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ +# define INTSUBMSK 0x4A00001C +# define CLKDIVN 0x4C000014 /* clock divisor register */ +# endif + ldr r0, =pWTCON mov r1, #0x0 str r1, [r0] @@ -224,25 +179,7 @@ copyex: #endif #ifdef CONFIG_AT91RM9200 -#ifdef CONFIG_BOOTBINFUNC -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end addreee [r2] */ - ble copy_loop -#endif /* CONFIG_BOOTBINFUNC */ -#else #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ @@ -282,27 +219,6 @@ clbss_l:str r2, [r0] /* clear loop... */ cmp r0, r1 ble clbss_l -#if 0 - /* try doing this stuff after the relocation */ - ldr r0, =pWTCON - mov r1, #0x0 - str r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTMR - default - */ - mov r1, #0xffffffff - ldr r0, =INTMR - str r1, [r0] - - /* FCLK:HCLK:PCLK = 1:2:4 */ - /* default FCLK is 120 MHz ! */ - ldr r0, =CLKDIVN - mov r1, #3 - str r1, [r0] - /* END stuff after relocation */ -#endif - ldr pc, _start_armboot _start_armboot: .word start_armboot diff --git a/include/asm-arm/coloured_led.h b/include/asm-arm/coloured_led.h new file mode 100755 index 00000000000..f78a4b10041 --- /dev/null +++ b/include/asm-arm/coloured_led.h @@ -0,0 +1,45 @@ +/* + * (C) Copyright 2006 + * Atmel Nordic AB + * Ulf Samuelsson + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __LED_H +#define __LED_H + +#ifndef __ASSEMBLY__ +extern void coloured_LED_init (void); +extern void red_LED_on(void); +extern void red_LED_off(void); +extern void green_LED_on(void); +extern void green_LED_off(void); +extern void yellow_LED_on(void); +extern void yellow_LED_off(void); +#else + .extern LED_init + .extern red_LED_on + .extern red_LED_off + .extern yellow_LED_on + .extern yellow_LED_off + .extern green_LED_on + .extern green_LED_off +#endif +#endif diff --git a/include/asm-arm/led.h b/include/asm-arm/led.h deleted file mode 100755 index f78a4b10041..00000000000 --- a/include/asm-arm/led.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2006 - * Atmel Nordic AB - * Ulf Samuelsson - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __LED_H -#define __LED_H - -#ifndef __ASSEMBLY__ -extern void coloured_LED_init (void); -extern void red_LED_on(void); -extern void red_LED_off(void); -extern void green_LED_on(void); -extern void green_LED_off(void); -extern void yellow_LED_on(void); -extern void yellow_LED_off(void); -#else - .extern LED_init - .extern red_LED_on - .extern red_LED_off - .extern yellow_LED_on - .extern yellow_LED_off - .extern green_LED_on - .extern green_LED_off -#endif -#endif -- cgit v1.3.1 From d45963854eff39d575124d859419bb4953ce2c87 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 11 Sep 2007 00:37:04 +0200 Subject: [FIX] Microblaze ML401 - repare FLASH handling --- include/configs/ml401.h | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 00599391af7..74fe88867ea 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -146,6 +146,16 @@ #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ +/* system ace */ +#ifdef XILINX_SYSACE_BASEADDR + #define CONFIG_SYSTEMACE + /* #define DEBUG_SYSTEMACE */ + #define SYSTEMACE_CONFIG_FPGA + #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR + #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH + #define CONFIG_DOS_PARTITION +#endif + /* * BOOTP options */ @@ -161,12 +171,14 @@ #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT #define CONFIG_CMD_IRQ #define CONFIG_CMD_MFSL #define CONFIG_CMD_PING +#if defined(CONFIG_SYSTEMACE) + #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_FAT +#endif #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -178,6 +190,8 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVES #endif +#else + #undef CONFIG_CMD_FLASH #endif #if defined(CONFIG_CMD_JFFS2) @@ -212,14 +226,6 @@ #define CFG_USR_EXCEP /* user exception */ #define CFG_HZ 1000 -/* system ace */ -#define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -#define SYSTEMACE_CONFIG_FPGA -#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION - #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ -- cgit v1.3.1 From d94c79e47011af5e8dd10ed6163c09b4cfc743cc Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 11 Sep 2007 15:35:01 +0100 Subject: Final tidy --- cpu/arm920t/start.S | 0 include/asm-arm/coloured_led.h | 0 include/config_cmd_all.h | 0 3 files changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 cpu/arm920t/start.S mode change 100755 => 100644 include/asm-arm/coloured_led.h mode change 100755 => 100644 include/config_cmd_all.h (limited to 'include') diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S old mode 100755 new mode 100644 diff --git a/include/asm-arm/coloured_led.h b/include/asm-arm/coloured_led.h old mode 100755 new mode 100644 diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h old mode 100755 new mode 100644 -- cgit v1.3.1 From e1f601b572db5de9aa81a0b77c68a86994fe24c4 Mon Sep 17 00:00:00 2001 From: Bartlomiej Sieka Date: Thu, 13 Sep 2007 16:33:59 +0200 Subject: tqm5200: Restore customary env. variable boot commands for powerpc kernels - update default definitions of kernel_addr and fdt_addr env. variables - make arch/powerpc booting the default scenario - update MTD partition layout to match the above Signed-off-by: Bartlomiej Sieka --- include/configs/TQM5200.h | 39 +++++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index e0c9d81be08..4e0e1517c50 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -238,13 +238,13 @@ "protect on FC000000 +${filesize}\0" #endif -#ifndef CONFIG_CAM5200 +#if defined(CONFIG_TQM5200) #define CUSTOM_ENV_SETTINGS \ + "hostname=tqm5200\0" \ "bootfile=/tftpboot/tqm5200/uImage\0" \ - "bootfile_fdt=/tftpboot/tqm5200/uImage_fdt\0" \ "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \ "u-boot=/tftpboot/tqm5200/u-boot.bin\0" -#else +#elif defined(CONFIG_CAM5200) #define CUSTOM_ENV_SETTINGS \ "bootfile=cam5200/uImage\0" \ "u-boot=cam5200/u-boot.bin\0" \ @@ -252,11 +252,13 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ - "console=ttyS0\0" \ - "kernel_addr=200000\0" \ - "fdt_addr=400000\0" \ - "hostname=tqm5200\0" \ "netdev=eth0\0" \ + "console=ttyPSC0\0" \ + "fdt_addr=FC0A0000\0" \ + "kernel_addr=FC0C0000\0" \ + "ramdisk_addr=FC300000\0" \ + "kernel_addr_r=200000\0" \ + "fdt_addr_r=400000\0" \ "rootpath=/opt/eldk/ppc_6xx\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ @@ -266,16 +268,20 @@ ":${hostname}:${netdev}:off panic=1\0" \ "addcons=setenv bootargs ${bootargs} " \ "console=${console},${baudrate}\0" \ - "flash_self=run ramargs addip addcons;" \ + "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \ "bootm ${kernel_addr} ${ramdisk_addr}\0" \ - "flash_nfs=run nfsargs addip addcons;" \ + "flash_self=run ramargs addip addcons;" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \ "bootm ${kernel_addr}\0" \ - "net_nfs=tftp ${kernel_addr} ${bootfile};" \ - "run nfsargs addip addcons;bootm\0" \ - "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt};" \ - "tftp ${fdt_addr} ${fdt_file};setenv console ttyPSC0;" \ - "run nfsargs addip addcons;" \ + "flash_nfs=run nfsargs addip addcons;" \ "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \ + "sete console ttyS0; run nfsargs addip addcons;bootm\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "tftp ${fdt_addr_r} ${fdt_file}; " \ + "run nfsargs addip addcons; " \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ CUSTOM_ENV_SETTINGS \ "load=tftp 200000 ${u-boot}\0" \ ENV_UPDT \ @@ -408,11 +414,12 @@ # endif /* CFG_LOWBOOT */ # else /* !CONFIG_TQM5200_B */ # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \ - "1408k(kernel)," \ + "128k(dtb)," \ + "2304k(kernel)," \ "2m(initrd)," \ "4m(small-fs)," \ "8m(misc)," \ - "16m(big-fs)" + "15m(big-fs)" # endif /* CONFIG_TQM5200_B */ #elif defined (CONFIG_CAM5200) # define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \ -- cgit v1.3.1 From d7e8ce101a4a45ed6ed45739fc2de5f87b13f7f1 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Mon, 10 Sep 2007 17:15:14 +0900 Subject: OneNAND support (take #2) [PATCH 3/3] OneNAND support (take #2) OneNAND support at U-Boot Signed-off-by: Kyungmin Park --- Makefile | 1 + common/Makefile | 3 +- common/cmd_nvedit.c | 9 +- common/cmd_onenand.c | 155 +++++++++++++++++++++++++++++++++ common/env_onenand.c | 134 +++++++++++++++++++++++++++++ include/config_cmd_all.h | 1 + include/linux/mtd/bbm.h | 127 +++++++++++++++++++++++++++ include/linux/mtd/onenand.h | 143 +++++++++++++++++++++++++++++++ include/linux/mtd/onenand_regs.h | 181 +++++++++++++++++++++++++++++++++++++++ include/onenand_uboot.h | 39 +++++++++ lib_arm/board.c | 8 ++ 11 files changed, 797 insertions(+), 4 deletions(-) create mode 100644 common/cmd_onenand.c create mode 100644 common/env_onenand.c create mode 100644 include/linux/mtd/bbm.h create mode 100644 include/linux/mtd/onenand.h create mode 100644 include/linux/mtd/onenand_regs.h create mode 100644 include/onenand_uboot.h (limited to 'include') diff --git a/Makefile b/Makefile index 85885b166a6..c35f0223382 100644 --- a/Makefile +++ b/Makefile @@ -211,6 +211,7 @@ LIBS += drivers/libdrivers.a LIBS += drivers/bios_emulator/libatibiosemu.a LIBS += drivers/nand/libnand.a LIBS += drivers/nand_legacy/libnand_legacy.a +LIBS += drivers/onenand/libonenand.a LIBS += drivers/net/libnet.a ifeq ($(CPU),mpc83xx) LIBS += drivers/qe/qe.a diff --git a/common/Makefile b/common/Makefile index ef7d0970789..fde5ad903d6 100644 --- a/common/Makefile +++ b/common/Makefile @@ -37,13 +37,14 @@ COBJS = main.o ACEX1K.o altera.o bedbug.o circbuf.o cmd_autoscript.o \ cmd_load.o cmd_log.o \ cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ cmd_nand.o cmd_net.o cmd_nvedit.o \ + cmd_onenand.o \ cmd_pci.o cmd_pcmcia.o cmd_portio.o \ cmd_reginfo.o cmd_reiser.o cmd_sata.o cmd_scsi.o cmd_spi.o \ cmd_universe.o cmd_usb.o cmd_vfd.o \ command.o console.o cyclon2.o devices.o dlmalloc.o docecc.o \ environment.o env_common.o \ env_nand.o env_dataflash.o env_flash.o env_eeprom.o \ - env_nvram.o env_nowhere.o \ + env_onenand.o env_nvram.o env_nowhere.o \ exports.o \ fdt_support.o flash.o fpga.o ft_build.o \ hush.o kgdb.o lcd.o lists.o lynxkdi.o \ diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 1db0fc3c03b..67704088104 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -57,8 +57,9 @@ DECLARE_GLOBAL_DATA_PTR; !defined(CFG_ENV_IS_IN_FLASH) && \ !defined(CFG_ENV_IS_IN_DATAFLASH) && \ !defined(CFG_ENV_IS_IN_NAND) && \ + !defined(CFG_ENV_IS_IN_ONENAND) && \ !defined(CFG_ENV_IS_NOWHERE) -# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|NOWHERE} +# error Define one of CFG_ENV_IS_IN_{NVRAM|EEPROM|FLASH|DATAFLASH|ONENAND|NOWHERE} #endif #define XMK_STR(x) #x @@ -553,7 +554,8 @@ int getenv_r (char *name, char *buf, unsigned len) #if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { extern char * env_name_spec; @@ -608,7 +610,8 @@ U_BOOT_CMD( #if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \ - || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)) \ + || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_ONENAND)) U_BOOT_CMD( saveenv, 1, 0, do_saveenv, "saveenv - save environment variables to persistent storage\n", diff --git a/common/cmd_onenand.c b/common/cmd_onenand.c new file mode 100644 index 00000000000..dcda099c841 --- /dev/null +++ b/common/cmd_onenand.c @@ -0,0 +1,155 @@ +/* + * U-Boot command for OneNAND support + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +#ifdef CONFIG_CMD_ONENAND + +#include +#include +#include + +#include + +extern struct mtd_info onenand_mtd; +extern struct onenand_chip onenand_chip; + +int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + int ret = 0; + + switch (argc) { + case 0: + case 1: + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + + case 2: + if (strncmp(argv[1], "open", 4) == 0) { + onenand_init(); + return 0; + } + onenand_print_device_info(onenand_chip.device_id, 1); + return 0; + + default: + /* At least 4 args */ + if (strncmp(argv[1], "erase", 5) == 0) { + struct erase_info instr; + ulong start, end; + ulong block; + + start = simple_strtoul(argv[2], NULL, 10); + end = simple_strtoul(argv[3], NULL, 10); + start -= (unsigned long)onenand_chip.base; + end -= (unsigned long)onenand_chip.base; + + if (!end || end < 0) + end = start; + + printf("Erase block from %d to %d\n", start, end); + + for (block = start; block <= end; block++) { + instr.addr = block << onenand_chip.erase_shift; + instr.len = 1 << onenand_chip.erase_shift; + ret = onenand_erase(&onenand_mtd, &instr); + if (ret) { + printf("erase failed %d\n", block); + break; + } + } + + return 0; + } + + if (strncmp(argv[1], "read", 4) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong ofs = simple_strtoul(argv[3], NULL, 16); + size_t len = simple_strtoul(argv[4], NULL, 16); + size_t retlen = 0; + int oob = strncmp(argv[1], "read.oob", 8) ? 0 : 1; + + ofs -= (unsigned long)onenand_chip.base; + + if (oob) + onenand_read_oob(&onenand_mtd, ofs, len, + &retlen, (u_char *) addr); + else + onenand_read(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + printf("Done\n"); + + return 0; + } + + if (strncmp(argv[1], "write", 5) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong ofs = simple_strtoul(argv[3], NULL, 16); + size_t len = simple_strtoul(argv[4], NULL, 16); + size_t retlen = 0; + + ofs -= (unsigned long)onenand_chip.base; + + onenand_write(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + printf("Done\n"); + + return 0; + } + + if (strncmp(argv[1], "block", 5) == 0) { + ulong addr = simple_strtoul(argv[2], NULL, 16); + ulong block = simple_strtoul(argv[3], NULL, 10); + ulong page = simple_strtoul(argv[4], NULL, 10); + size_t len = simple_strtol(argv[5], NULL, 10); + size_t retlen = 0; + ulong ofs; + int oob = strncmp(argv[1], "block.oob", 9) ? 0 : 1; + + ofs = block << onenand_chip.erase_shift; + if (page) + ofs += page << onenand_chip.page_shift; + + if (!len) { + if (oob) + len = 64; + else + len = 512; + } + + if (oob) + onenand_read_oob(&onenand_mtd, ofs, len, + &retlen, (u_char *) addr); + else + onenand_read(&onenand_mtd, ofs, len, &retlen, + (u_char *) addr); + return 0; + } + + break; + } + + return 0; +} + +U_BOOT_CMD( + onenand, 6, 1, do_onenand, + "onenand - OneNAND sub-system\n", + "info - show available OneNAND devices\n" + "onenand read[.oob] addr ofs len - read data at ofs with len to addr\n" + "onenand write addr ofs len - write data at ofs with len from addr\n" + "onenand erase saddr eaddr - erase block start addr to end addr\n" + "onenand block[.oob] addr block [page] [len] - " + "read data with (block [, page]) to addr" +); + +#endif /* CONFIG_CMD_ONENAND */ diff --git a/common/env_onenand.c b/common/env_onenand.c new file mode 100644 index 00000000000..66107f91f17 --- /dev/null +++ b/common/env_onenand.c @@ -0,0 +1,134 @@ +/* + * (C) Copyright 2005-2007 Samsung Electronics + * Kyungmin Park + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +#if defined(CFG_ENV_IS_IN_ONENAND) /* Environment is in OneNAND */ + +#include +#include +#include +#include + +#include +#include +#include + +extern struct mtd_info onenand_mtd; +extern struct onenand_chip onenand_chip; + +/* References to names in env_common.c */ +extern uchar default_environment[]; + +#define ONENAND_ENV_SIZE(mtd) (mtd.oobblock - ENV_HEADER_SIZE) + +char *env_name_spec = "OneNAND"; + +#ifdef ENV_IS_EMBEDDED +extern uchar environment[]; +env_t *env_ptr = (env_t *) (&environment[0]); +#else /* ! ENV_IS_EMBEDDED */ +static unsigned char onenand_env[MAX_ONENAND_PAGESIZE]; +env_t *env_ptr = (env_t *) onenand_env; +#endif /* ENV_IS_EMBEDDED */ + +uchar env_get_char_spec(int index) +{ + DECLARE_GLOBAL_DATA_PTR; + + return (*((uchar *) (gd->env_addr + index))); +} + +void env_relocate_spec(void) +{ + DECLARE_GLOBAL_DATA_PTR; + unsigned long env_addr; + int use_default = 0; + int retlen; + + env_addr = CFG_ENV_ADDR; + env_addr -= (unsigned long)onenand_chip.base; + + /* Check OneNAND exist */ + if (onenand_mtd.oobblock) + /* Ignore read fail */ + onenand_read(&onenand_mtd, env_addr, onenand_mtd.oobblock, + &retlen, (u_char *) env_ptr); + else + onenand_mtd.oobblock = MAX_ONENAND_PAGESIZE; + + if (crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)) != + env_ptr->crc) + use_default = 1; + + if (use_default) { + memcpy(env_ptr->data, default_environment, + ONENAND_ENV_SIZE(onenand_mtd)); + env_ptr->crc = + crc32(0, env_ptr->data, ONENAND_ENV_SIZE(onenand_mtd)); + } + + gd->env_addr = (ulong) & env_ptr->data; + gd->env_valid = 1; +} + +int saveenv(void) +{ + unsigned long env_addr = CFG_ENV_ADDR; + struct erase_info instr; + int retlen; + + instr.len = CFG_ENV_SIZE; + instr.addr = env_addr; + instr.addr -= (unsigned long)onenand_chip.base; + if (onenand_erase(&onenand_mtd, &instr)) { + printf("OneNAND: erase failed at 0x%08x\n", env_addr); + return 1; + } + + /* update crc */ + env_ptr->crc = + crc32(0, env_ptr->data, onenand_mtd.oobblock - ENV_HEADER_SIZE); + + env_addr -= (unsigned long)onenand_chip.base; + if (onenand_write(&onenand_mtd, env_addr, onenand_mtd.oobblock, &retlen, + (u_char *) env_ptr)) { + printf("OneNAND: write failed at 0x%08x\n", instr.addr); + return 2; + } + + return 0; +} + +int env_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + /* use default */ + gd->env_addr = (ulong) & default_environment[0]; + gd->env_valid = 1; + + return 0; +} + +#endif /* CFG_ENV_IS_IN_ONENAND */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 3d91e99b97f..f8eca87a844 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -59,6 +59,7 @@ #define CONFIG_CMD_NAND /* NAND support */ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_NFS /* NFS support */ +#define CONFIG_CMD_ONENAND /* OneNAND support */ #define CONFIG_CMD_PCI /* pciinfo */ #define CONFIG_CMD_PCMCIA /* PCMCIA support */ #define CONFIG_CMD_PING /* ping support */ diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h new file mode 100644 index 00000000000..f194cf1b3be --- /dev/null +++ b/include/linux/mtd/bbm.h @@ -0,0 +1,127 @@ +/* + * linux/include/linux/mtd/bbm.h + * + * NAND family Bad Block Management (BBM) header file + * - Bad Block Table (BBT) implementation + * + * Copyright (c) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * Copyright (c) 2000-2005 + * Thomas Gleixner + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __LINUX_MTD_BBM_H +#define __LINUX_MTD_BBM_H + +/* The maximum number of NAND chips in an array */ +#ifndef NAND_MAX_CHIPS +#define NAND_MAX_CHIPS 8 +#endif + +/** + * struct nand_bbt_descr - bad block table descriptor + * @param options options for this descriptor + * @param pages the page(s) where we find the bbt, used with + * option BBT_ABSPAGE when bbt is searched, + * then we store the found bbts pages here. + * Its an array and supports up to 8 chips now + * @param offs offset of the pattern in the oob area of the page + * @param veroffs offset of the bbt version counter in the oob are of the page + * @param version version read from the bbt page during scan + * @param len length of the pattern, if 0 no pattern check is performed + * @param maxblocks maximum number of blocks to search for a bbt. This number of + * blocks is reserved at the end of the device + * where the tables are written. + * @param reserved_block_code if non-0, this pattern denotes a reserved + * (rather than bad) block in the stored bbt + * @param pattern pattern to identify bad block table or factory marked + * good / bad blocks, can be NULL, if len = 0 + * + * Descriptor for the bad block table marker and the descriptor for the + * pattern which identifies good and bad blocks. The assumption is made + * that the pattern and the version count are always located in the oob area + * of the first block. + */ +struct nand_bbt_descr { + int options; + int pages[NAND_MAX_CHIPS]; + int offs; + int veroffs; + uint8_t version[NAND_MAX_CHIPS]; + int len; + int maxblocks; + int reserved_block_code; + uint8_t *pattern; +}; + +/* Options for the bad block table descriptors */ + +/* The number of bits used per block in the bbt on the device */ +#define NAND_BBT_NRBITS_MSK 0x0000000F +#define NAND_BBT_1BIT 0x00000001 +#define NAND_BBT_2BIT 0x00000002 +#define NAND_BBT_4BIT 0x00000004 +#define NAND_BBT_8BIT 0x00000008 +/* The bad block table is in the last good block of the device */ +#define NAND_BBT_LASTBLOCK 0x00000010 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_ABSPAGE 0x00000020 +/* The bbt is at the given page, else we must scan for the bbt */ +#define NAND_BBT_SEARCH 0x00000040 +/* bbt is stored per chip on multichip devices */ +#define NAND_BBT_PERCHIP 0x00000080 +/* bbt has a version counter at offset veroffs */ +#define NAND_BBT_VERSION 0x00000100 +/* Create a bbt if none axists */ +#define NAND_BBT_CREATE 0x00000200 +/* Search good / bad pattern through all pages of a block */ +#define NAND_BBT_SCANALLPAGES 0x00000400 +/* Scan block empty during good / bad block scan */ +#define NAND_BBT_SCANEMPTY 0x00000800 +/* Write bbt if neccecary */ +#define NAND_BBT_WRITE 0x00001000 +/* Read and write back block contents when writing bbt */ +#define NAND_BBT_SAVECONTENT 0x00002000 +/* Search good / bad pattern on the first and the second page */ +#define NAND_BBT_SCAN2NDPAGE 0x00004000 + +/* The maximum number of blocks to scan for a bbt */ +#define NAND_BBT_SCAN_MAXBLOCKS 4 + +/* + * Constants for oob configuration + */ +#define ONENAND_BADBLOCK_POS 0 + +/** + * struct bbt_info - [GENERIC] Bad Block Table data structure + * @param bbt_erase_shift [INTERN] number of address bits in a bbt entry + * @param badblockpos [INTERN] position of the bad block marker in the oob area + * @param bbt [INTERN] bad block table pointer + * @param badblock_pattern [REPLACEABLE] bad block scan pattern used for initial bad block scan + * @param priv [OPTIONAL] pointer to private bbm date + */ +struct bbm_info { + int bbt_erase_shift; + int badblockpos; + int options; + + uint8_t *bbt; + + int (*isbad_bbt) (struct mtd_info * mtd, loff_t ofs, int allowbbt); + + /* TODO Add more NAND specific fileds */ + struct nand_bbt_descr *badblock_pattern; + + void *priv; +}; + +/* OneNAND BBT interface */ +extern int onenand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd); +extern int onenand_default_bbt (struct mtd_info *mtd); + +#endif /* __LINUX_MTD_BBM_H */ diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h new file mode 100644 index 00000000000..4b0c2dfaaaa --- /dev/null +++ b/include/linux/mtd/onenand.h @@ -0,0 +1,143 @@ +/* + * linux/include/linux/mtd/onenand.h + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_MTD_ONENAND_H +#define __LINUX_MTD_ONENAND_H + +#include + +/* Note: The header order is impoertant */ +#include + +#include + +#define MAX_BUFFERRAM 2 +#define MAX_ONENAND_PAGESIZE (2048 + 64) + +/* Scan and identify a OneNAND device */ +extern int onenand_scan (struct mtd_info *mtd, int max_chips); +/* Free resources held by the OneNAND device */ +extern void onenand_release (struct mtd_info *mtd); + +/** + * onenand_state_t - chip states + * Enumeration for OneNAND flash chip state + */ +typedef enum { + FL_READY, + FL_READING, + FL_WRITING, + FL_ERASING, + FL_SYNCING, + FL_UNLOCKING, + FL_LOCKING, +} onenand_state_t; + +/** + * struct onenand_bufferram - OneNAND BufferRAM Data + * @param block block address in BufferRAM + * @param page page address in BufferRAM + * @param valid valid flag + */ +struct onenand_bufferram { + int block; + int page; + int valid; +}; + +/** + * struct onenand_chip - OneNAND Private Flash Chip Data + * @param base [BOARDSPECIFIC] address to access OneNAND + * @param chipsize [INTERN] the size of one chip for multichip arrays + * @param device_id [INTERN] device ID + * @param verstion_id [INTERN] version ID + * @param options [BOARDSPECIFIC] various chip options. They can partly be set to inform onenand_scan about + * @param erase_shift [INTERN] number of address bits in a block + * @param page_shift [INTERN] number of address bits in a page + * @param ppb_shift [INTERN] number of address bits in a pages per block + * @param page_mask [INTERN] a page per block mask + * @param bufferam_index [INTERN] BufferRAM index + * @param bufferam [INTERN] BufferRAM info + * @param readw [REPLACEABLE] hardware specific function for read short + * @param writew [REPLACEABLE] hardware specific function for write short + * @param command [REPLACEABLE] hardware specific function for writing commands to the chip + * @param wait [REPLACEABLE] hardware specific function for wait on ready + * @param read_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param write_bufferram [REPLACEABLE] hardware specific function for BufferRAM Area + * @param chip_lock [INTERN] spinlock used to protect access to this structure and the chip + * @param wq [INTERN] wait queue to sleep on if a OneNAND operation is in progress + * @param state [INTERN] the current state of the OneNAND device + * @param autooob [REPLACEABLE] the default (auto)placement scheme + * @param priv [OPTIONAL] pointer to private chip date + */ +struct onenand_chip { + void __iomem *base; + unsigned int chipsize; + unsigned int device_id; + unsigned int options; + + unsigned int erase_shift; + unsigned int page_shift; + unsigned int ppb_shift; /* Pages per block shift */ + unsigned int page_mask; + + unsigned int bufferram_index; + struct onenand_bufferram bufferram[MAX_BUFFERRAM]; + + int (*command) (struct mtd_info * mtd, int cmd, loff_t address, + size_t len); + int (*wait) (struct mtd_info * mtd, int state); + int (*read_bufferram) (struct mtd_info * mtd, int area, + unsigned char *buffer, int offset, size_t count); + int (*write_bufferram) (struct mtd_info * mtd, int area, + const unsigned char *buffer, int offset, + size_t count); + unsigned short (*read_word) (void __iomem * addr); + void (*write_word) (unsigned short value, void __iomem * addr); + void (*mmcontrol) (struct mtd_info * mtd, int sync_read); + + spinlock_t chip_lock; + wait_queue_head_t wq; + onenand_state_t state; + + struct nand_oobinfo *autooob; + + void *bbm; + + void *priv; +}; + +#define ONENAND_CURRENT_BUFFERRAM(this) (this->bufferram_index) +#define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) +#define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) + +/* + * Options bits + */ +#define ONENAND_CONT_LOCK (0x0001) + +/* + * OneNAND Flash Manufacturer ID Codes + */ +#define ONENAND_MFR_SAMSUNG 0xec +#define ONENAND_MFR_UNKNOWN 0x00 + +/** + * struct nand_manufacturers - NAND Flash Manufacturer ID Structure + * @param name: Manufacturer name + * @param id: manufacturer ID code of device. +*/ +struct onenand_manufacturers { + int id; + char *name; +}; + +#endif /* __LINUX_MTD_ONENAND_H */ diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h new file mode 100644 index 00000000000..c8a9f3e9044 --- /dev/null +++ b/include/linux/mtd/onenand_regs.h @@ -0,0 +1,181 @@ +/* + * linux/include/linux/mtd/onenand_regs.h + * + * OneNAND Register header file + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ONENAND_REG_H +#define __ONENAND_REG_H + +/* Memory Address Map Translation (Word order) */ +#define ONENAND_MEMORY_MAP(x) ((x) << 1) + +/* + * External BufferRAM area + */ +#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) +#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) +#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) + +/* + * OneNAND Registers + */ +#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) +#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) +#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) +#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) +#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) +#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) +#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) + +#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) +#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) +#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) +#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) +#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) +#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) +#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) +#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) + +#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) +#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) +#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) +#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) +#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) +#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) +#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) +#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) +#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) + +#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) +#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) +#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) +#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) +#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) +#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) +#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) +#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) +#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) + +/* + * Device ID Register F001h (R) + */ +#define ONENAND_DEVICE_DENSITY_SHIFT (4) +#define ONENAND_DEVICE_IS_DDP (1 << 3) +#define ONENAND_DEVICE_IS_DEMUX (1 << 2) +#define ONENAND_DEVICE_VCC_MASK (0x3) + +#define ONENAND_DEVICE_DENSITY_512Mb (0x002) + +/* + * Version ID Register F002h (R) + */ +#define ONENAND_VERSION_PROCESS_SHIFT (8) + +/* + * Start Address 1 F100h (R/W) + */ +#define ONENAND_DDP_SHIFT (15) + +/* + * Start Address 8 F107h (R/W) + */ +#define ONENAND_FPA_MASK (0x3f) +#define ONENAND_FPA_SHIFT (2) +#define ONENAND_FSA_MASK (0x03) + +/* + * Start Buffer Register F200h (R/W) + */ +#define ONENAND_BSA_MASK (0x03) +#define ONENAND_BSA_SHIFT (8) +#define ONENAND_BSA_BOOTRAM (0 << 2) +#define ONENAND_BSA_DATARAM0 (2 << 2) +#define ONENAND_BSA_DATARAM1 (3 << 2) +#define ONENAND_BSC_MASK (0x03) + +/* + * Command Register F220h (R/W) + */ +#define ONENAND_CMD_READ (0x00) +#define ONENAND_CMD_READOOB (0x13) +#define ONENAND_CMD_PROG (0x80) +#define ONENAND_CMD_PROGOOB (0x1A) +#define ONENAND_CMD_UNLOCK (0x23) +#define ONENAND_CMD_LOCK (0x2A) +#define ONENAND_CMD_LOCK_TIGHT (0x2C) +#define ONENAND_CMD_ERASE (0x94) +#define ONENAND_CMD_RESET (0xF0) +#define ONENAND_CMD_READID (0x90) + +/* NOTE: Those are not *REAL* commands */ +#define ONENAND_CMD_BUFFERRAM (0x1978) + +/* + * System Configuration 1 Register F221h (R, R/W) + */ +#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) +#define ONENAND_SYS_CFG1_BRL_7 (7 << 12) +#define ONENAND_SYS_CFG1_BRL_6 (6 << 12) +#define ONENAND_SYS_CFG1_BRL_5 (5 << 12) +#define ONENAND_SYS_CFG1_BRL_4 (4 << 12) +#define ONENAND_SYS_CFG1_BRL_3 (3 << 12) +#define ONENAND_SYS_CFG1_BRL_10 (2 << 12) +#define ONENAND_SYS_CFG1_BRL_9 (1 << 12) +#define ONENAND_SYS_CFG1_BRL_8 (0 << 12) +#define ONENAND_SYS_CFG1_BRL_SHIFT (12) +#define ONENAND_SYS_CFG1_BL_32 (4 << 9) +#define ONENAND_SYS_CFG1_BL_16 (3 << 9) +#define ONENAND_SYS_CFG1_BL_8 (2 << 9) +#define ONENAND_SYS_CFG1_BL_4 (1 << 9) +#define ONENAND_SYS_CFG1_BL_CONT (0 << 9) +#define ONENAND_SYS_CFG1_BL_SHIFT (9) +#define ONENAND_SYS_CFG1_NO_ECC (1 << 8) +#define ONENAND_SYS_CFG1_RDY (1 << 7) +#define ONENAND_SYS_CFG1_INT (1 << 6) +#define ONENAND_SYS_CFG1_IOBE (1 << 5) +#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) + +/* + * Controller Status Register F240h (R) + */ +#define ONENAND_CTRL_ONGO (1 << 15) +#define ONENAND_CTRL_LOCK (1 << 14) +#define ONENAND_CTRL_LOAD (1 << 13) +#define ONENAND_CTRL_PROGRAM (1 << 12) +#define ONENAND_CTRL_ERASE (1 << 11) +#define ONENAND_CTRL_ERROR (1 << 10) +#define ONENAND_CTRL_RSTB (1 << 7) + +/* + * Interrupt Status Register F241h (R) + */ +#define ONENAND_INT_MASTER (1 << 15) +#define ONENAND_INT_READ (1 << 7) +#define ONENAND_INT_WRITE (1 << 6) +#define ONENAND_INT_ERASE (1 << 5) +#define ONENAND_INT_RESET (1 << 4) +#define ONENAND_INT_CLEAR (0 << 0) + +/* + * NAND Flash Write Protection Status Register F24Eh (R) + */ +#define ONENAND_WP_US (1 << 2) +#define ONENAND_WP_LS (1 << 1) +#define ONENAND_WP_LTS (1 << 0) + +/* + * ECC Status Reigser FF00h (R) + */ +#define ONENAND_ECC_1BIT (1 << 0) +#define ONENAND_ECC_2BIT (1 << 1) +#define ONENAND_ECC_2BIT_ALL (0xAAAA) + +#endif /* __ONENAND_REG_H */ diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h new file mode 100644 index 00000000000..bd1831ea6d6 --- /dev/null +++ b/include/onenand_uboot.h @@ -0,0 +1,39 @@ +/* + * Header file for OneNAND support for U-Boot + * + * Adaptation from kernel to U-Boot + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __UBOOT_ONENAND_H +#define __UBOOT_ONENAND_H + +struct kvec { + void *iov_base; + size_t iov_len; +}; + +typedef int spinlock_t; +typedef int wait_queue_head_t; + +/* Functions */ +extern void onenand_init(void); +extern int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, u_char * buf); +extern int onenand_write(struct mtd_info *mtd, loff_t from, size_t len, + size_t * retlen, const u_char * buf); +extern int onenand_erase(struct mtd_info *mtd, struct erase_info *instr); + +extern int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len); + +extern void onenand_print_device_info(int device, int verbose); + +#endif /* __UBOOT_ONENAND_H */ diff --git a/lib_arm/board.c b/lib_arm/board.c index d28afc52f9f..634e4d94383 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -58,6 +58,10 @@ DECLARE_GLOBAL_DATA_PTR; void nand_init (void); #endif +#if defined(CONFIG_CMD_ONENAND) +void onenand_init(void); +#endif + ulong monitor_flash_len; #ifdef CONFIG_HAS_DATAFLASH @@ -301,6 +305,10 @@ void start_armboot (void) nand_init(); /* go init the NAND */ #endif +#if defined(CONFIG_CMD_ONENAND) + onenand_init(); +#endif + #ifdef CONFIG_HAS_DATAFLASH AT91F_DataflashInit(); dataflash_print_info(); -- cgit v1.3.1 From a4f3aab6dfbed6c29367c688bfb8a47eef62c225 Mon Sep 17 00:00:00 2001 From: Eirik Aanonsen Date: Wed, 12 Sep 2007 13:32:37 +0200 Subject: Add some comments to clocks in atstk1002.h This patch applies some clarifying comments to how the different clocks are setup according to atstk1002.h Some of the previous comments where stating wrongful information. Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index f7bf62c825f..7533b0ef9c1 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -39,8 +39,10 @@ #define CFG_HZ 1000 /* - * Set up the PLL to run at 199.5 MHz, the CPU to run at 1/2 the PLL - * frequency and the peripherals to run at 1/4 the PLL frequency. + * Set up the PLL to run at 140 MHz, the CPU to run at the PLL + * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the + * PLL frequency. + * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz */ #define CONFIG_PLL 1 #define CFG_POWER_MANAGER 1 @@ -48,9 +50,25 @@ #define CFG_PLL0_DIV 1 #define CFG_PLL0_MUL 7 #define CFG_PLL0_SUPPRESS_CYCLES 16 +/* + * Set the CPU running at: + * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz + */ #define CFG_CLKDIV_CPU 0 +/* + * Set the HSB running at: + * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz + */ #define CFG_CLKDIV_HSB 1 +/* + * Set the PBA running at: + * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz + */ #define CFG_CLKDIV_PBA 2 +/* + * Set the PBB running at: + * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz + */ #define CFG_CLKDIV_PBB 1 /* -- cgit v1.3.1 From e80e585b00fbbab7ad1bf71619741f2c5b029ab7 Mon Sep 17 00:00:00 2001 From: Eirik Aanonsen Date: Tue, 18 Sep 2007 08:47:20 +0200 Subject: Update atstk1002 bootargs. Updates to atstk1002 U-Boot header file: - Changed bootargs: * Set the bootargs for at1002 to point to the SD-card partition instead * ... of the boot flash. * Removing the rootfstype since that argument are not needed. Signed-off-by: Eirik Aanonsen Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 7533b0ef9c1..572ac23d3e9 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -96,7 +96,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_BOOTARGS \ - "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2 fbmem=600k" + "console=ttyS0 root=/dev/mmcblk0p1 fbmem=600k rootwait=1" #define CONFIG_BOOTCOMMAND \ "fsload; bootm $(fileaddr)" -- cgit v1.3.1 From bd86220f58b99d6896198c385fda132f0c980915 Mon Sep 17 00:00:00 2001 From: Peter Pearse Date: Tue, 18 Sep 2007 13:07:54 +0100 Subject: Move coloured led API to status_led.h Improve indentation in drivers/at45.c --- cpu/arm920t/start.S | 2 +- drivers/at45.c | 180 +++++++++++++++++++++-------------------- include/asm-arm/coloured_led.h | 45 ----------- include/status_led.h | 21 +++++ 4 files changed, 114 insertions(+), 134 deletions(-) mode change 100755 => 100644 drivers/at45.c delete mode 100644 include/asm-arm/coloured_led.h (limited to 'include') diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index df2ee20cbe9..aefcdd1552f 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -27,7 +27,7 @@ #include #include -#include +#include /* ************************************************************************* diff --git a/drivers/at45.c b/drivers/at45.c old mode 100755 new mode 100644 index f48d31776f2..a075ebd5d74 --- a/drivers/at45.c +++ b/drivers/at45.c @@ -48,28 +48,27 @@ AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash, /* process the address to obtain page address and byte address */ adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << - pDataFlash->pDevice->page_offset) + (DataflashAddress % - (pDataFlash->pDevice-> - pages_size)); + pDataFlash->pDevice->page_offset) + + (DataflashAddress % (pDataFlash->pDevice->pages_size)); - /* fill the command buffer */ + /* fill the command buffer */ pDataFlash->pDataFlashDesc->command[0] = OpCode; if (pDataFlash->pDevice->pages_number >= 16384) { pDataFlash->pDataFlashDesc->command[1] = - (unsigned char)((adr & 0x0F000000) >> 24); + (unsigned char)((adr & 0x0F000000) >> 24); pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)((adr & 0x00FF0000) >> 16); + (unsigned char)((adr & 0x00FF0000) >> 16); pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)((adr & 0x0000FF00) >> 8); + (unsigned char)((adr & 0x0000FF00) >> 8); pDataFlash->pDataFlashDesc->command[4] = - (unsigned char)(adr & 0x000000FF); + (unsigned char)(adr & 0x000000FF); } else { pDataFlash->pDataFlashDesc->command[1] = - (unsigned char)((adr & 0x00FF0000) >> 16); + (unsigned char)((adr & 0x00FF0000) >> 16); pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)((adr & 0x0000FF00) >> 8); + (unsigned char)((adr & 0x0000FF00) >> 8); pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)(adr & 0x000000FF); + (unsigned char)(adr & 0x000000FF); pDataFlash->pDataFlashDesc->command[4] = 0; } pDataFlash->pDataFlashDesc->command[5] = 0; @@ -78,10 +77,10 @@ AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash, /* Initialize the SpiData structure for the spi write fuction */ pDataFlash->pDataFlashDesc->tx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize; pDataFlash->pDataFlashDesc->rx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize; /* send the command and read the data */ @@ -123,8 +122,8 @@ AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc) /* \brief wait for dataflash ready (bit7 of the status register == 1) */ /*----------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc - pDataFlashDesc, - unsigned int timeout) + pDataFlashDesc, + unsigned int timeout) { pDataFlashDesc->DataFlash_state = IDLE; @@ -149,16 +148,17 @@ AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc /* : = data buffer size */ /* Return value : State of the dataflash */ /*--------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(AT91PS_DataFlash pDataFlash, - int src, - unsigned char *dataBuffer, - int sizeToRead) +AT91S_DataFlashStatus AT91F_DataFlashContinuousRead( + AT91PS_DataFlash pDataFlash, + int src, + unsigned char *dataBuffer, + int sizeToRead) { AT91S_DataFlashStatus status; /* Test the size to read in the device */ if ((src + sizeToRead) > - (pDataFlash->pDevice->pages_size * - (pDataFlash->pDevice->pages_number))) + (pDataFlash->pDevice->pages_size * + (pDataFlash->pDevice->pages_number))) return DATAFLASH_MEMORY_OVERFLOW; pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; @@ -166,8 +166,8 @@ AT91S_DataFlashStatus AT91F_DataFlashContinuousRead(AT91PS_DataFlash pDataFlash, pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer; pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead; - status = AT91F_DataFlashSendCommand - (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); + status = AT91F_DataFlashSendCommand( + pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src); /* Send the command to the dataflash */ return (status); } @@ -196,8 +196,8 @@ AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash, /* Send the command to the dataflash */ if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_PGM_BUF1, - cmdsize, dest)); + return (AT91F_DataFlashSendCommand( + pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest)); } /*---------------------------------------------------------------------------*/ @@ -208,16 +208,17 @@ AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash, /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(AT91PS_DataFlash - pDataFlash, - unsigned char - BufferCommand, - unsigned int page) +AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( + AT91PS_DataFlash + pDataFlash, + unsigned char + BufferCommand, + unsigned int page) { int cmdsize; /* Test if the buffer command is legal */ - if ((BufferCommand != DB_PAGE_2_BUF1_TRF) - && (BufferCommand != DB_PAGE_2_BUF2_TRF)) + if ((BufferCommand != DB_PAGE_2_BUF1_TRF)&& + (BufferCommand != DB_PAGE_2_BUF2_TRF)) return DATAFLASH_BAD_COMMAND; /* no data to transmit or receive */ @@ -225,9 +226,9 @@ AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(AT91PS_DataFlash cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize, - page * - pDataFlash->pDevice->pages_size)); + return (AT91F_DataFlashSendCommand( + pDataFlash, BufferCommand, cmdsize, + page * pDataFlash->pDevice->pages_size)); } /*-------------------------------------------------------------------------- */ @@ -240,16 +241,17 @@ AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(AT91PS_DataFlash /* : = data buffer size */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned char *dataBuffer, - unsigned int bufferAddress, - int SizeToWrite) +AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer( + AT91PS_DataFlash pDataFlash, + unsigned char BufferCommand, + unsigned char *dataBuffer, + unsigned int bufferAddress, + int SizeToWrite) { int cmdsize; /* Test if the buffer command is legal */ - if ((BufferCommand != DB_BUF1_WRITE) - && (BufferCommand != DB_BUF2_WRITE)) + if ((BufferCommand != DB_BUF1_WRITE) && + (BufferCommand != DB_BUF2_WRITE)) return DATAFLASH_BAD_COMMAND; /* buffer address must be lower than page size */ @@ -265,28 +267,28 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(AT91PS_DataFlash pDataFlash, if (pDataFlash->pDevice->pages_number >= 16384) { pDataFlash->pDataFlashDesc->command[2] = 0; pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)(((unsigned int)(bufferAddress & - pDataFlash->pDevice-> - byte_mask)) >> 8); + (unsigned char)(((unsigned int)(bufferAddress & + pDataFlash->pDevice-> + byte_mask)) >> 8); pDataFlash->pDataFlashDesc->command[4] = - (unsigned char)((unsigned int)bufferAddress & 0x00FF); + (unsigned char)((unsigned int)bufferAddress & 0x00FF); cmdsize = 5; } else { pDataFlash->pDataFlashDesc->command[2] = - (unsigned char)(((unsigned int)(bufferAddress & - pDataFlash->pDevice-> - byte_mask)) >> 8); + (unsigned char)(((unsigned int)(bufferAddress & + pDataFlash->pDevice-> + byte_mask)) >> 8); pDataFlash->pDataFlashDesc->command[3] = - (unsigned char)((unsigned int)bufferAddress & 0x00FF); + (unsigned char)((unsigned int)bufferAddress & 0x00FF); pDataFlash->pDataFlashDesc->command[4] = 0; cmdsize = 4; } pDataFlash->pDataFlashDesc->tx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize; pDataFlash->pDataFlashDesc->rx_cmd_pt = - pDataFlash->pDataFlashDesc->command; + pDataFlash->pDataFlashDesc->command; pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize; pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer; @@ -305,8 +307,9 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(AT91PS_DataFlash pDataFlash, /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_PageErase(AT91PS_DataFlash pDataFlash, - unsigned int page) +AT91S_DataFlashStatus AT91F_PageErase( + AT91PS_DataFlash pDataFlash, + unsigned int page) { int cmdsize; /* Test if the buffer command is legal */ @@ -316,9 +319,9 @@ AT91S_DataFlashStatus AT91F_PageErase(AT91PS_DataFlash pDataFlash, cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_ERASE, cmdsize, - page * - pDataFlash->pDevice->pages_size)); + return (AT91F_DataFlashSendCommand(pDataFlash, + DB_PAGE_ERASE, cmdsize, + page * pDataFlash->pDevice->pages_size)); } /*---------------------------------------------------------------------------*/ @@ -329,8 +332,9 @@ AT91S_DataFlashStatus AT91F_PageErase(AT91PS_DataFlash pDataFlash, /* : */ /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ -AT91S_DataFlashStatus AT91F_BlockErase(AT91PS_DataFlash pDataFlash, - unsigned int block) +AT91S_DataFlashStatus AT91F_BlockErase( + AT91PS_DataFlash pDataFlash, + unsigned int block) { int cmdsize; /* Test if the buffer command is legal */ @@ -340,8 +344,8 @@ AT91S_DataFlashStatus AT91F_BlockErase(AT91PS_DataFlash pDataFlash, if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; return (AT91F_DataFlashSendCommand(pDataFlash, DB_BLOCK_ERASE, cmdsize, - block * 8 * - pDataFlash->pDevice->pages_size)); + block * 8 * + pDataFlash->pDevice->pages_size)); } /*---------------------------------------------------------------------------*/ @@ -353,15 +357,15 @@ AT91S_DataFlashStatus AT91F_BlockErase(AT91PS_DataFlash pDataFlash, /* Return value : State of the dataflash */ /*---------------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, - unsigned char BufferCommand, - unsigned int dest) + unsigned char BufferCommand, + unsigned int dest) { int cmdsize; /* Test if the buffer command is correct */ if ((BufferCommand != DB_BUF1_PAGE_PGM) && - (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) && - (BufferCommand != DB_BUF2_PAGE_PGM) && - (BufferCommand != DB_BUF2_PAGE_ERASE_PGM)) + (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) && + (BufferCommand != DB_BUF2_PAGE_PGM) && + (BufferCommand != DB_BUF2_PAGE_ERASE_PGM)) return DATAFLASH_BAD_COMMAND; /* no data to transmit or receive */ @@ -371,8 +375,8 @@ AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; /* Send the command to the dataflash */ - return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize, - dest)); + return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, + cmdsize, dest)); } /*---------------------------------------------------------------------------*/ @@ -383,9 +387,9 @@ AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, /* : = Number of bytes to erase */ /*---------------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash, - unsigned char *src, - unsigned int dest, - unsigned int size) + unsigned char *src, + unsigned int dest, + unsigned int size) { unsigned int page; unsigned int AdrInPage; @@ -399,10 +403,10 @@ AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash, AT91C_TIMEOUT_WRDY); /*Update the SRAM buffer */ AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, - AdrInPage, size); + AdrInPage, size); AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY); + AT91C_TIMEOUT_WRDY); /* Erase page if a 128 Mbits device */ if (pDataFlash->pDevice->pages_number >= 16384) { @@ -426,8 +430,8 @@ AT91S_DataFlashStatus AT91F_PartialPageWrite(AT91PS_DataFlash pDataFlash, /* : = data buffer size */ /*---------------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, - unsigned char *src, - int dest, int size) + unsigned char *src, + int dest, int size) { unsigned int length; unsigned int page; @@ -436,14 +440,14 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, AT91F_SpiEnable(pDataFlash->pDevice->cs); if ((dest + size) > (pDataFlash->pDevice->pages_size * - (pDataFlash->pDevice->pages_number))) + (pDataFlash->pDevice->pages_number))) return DATAFLASH_MEMORY_OVERFLOW; /* If destination does not fit a page start address */ if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0) { - length = pDataFlash->pDevice->pages_size - - (dest % ((unsigned int) - (pDataFlash->pDevice->pages_size))); + length = + pDataFlash->pDevice->pages_size - + (dest % ((unsigned int)(pDataFlash->pDevice->pages_size))); if (size < length) length = size; @@ -465,9 +469,9 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, page = (unsigned int)dest / (pDataFlash->pDevice->pages_size); status = AT91F_DataFlashWriteBuffer(pDataFlash, - DB_BUF1_WRITE, src, 0, - pDataFlash->pDevice-> - pages_size); + DB_BUF1_WRITE, src, 0, + pDataFlash->pDevice-> + pages_size); AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY); @@ -478,7 +482,7 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, return DATAFLASH_ERROR; status = AT91F_WriteBufferToMain(pDataFlash, - DB_BUF1_PAGE_PGM, dest); + DB_BUF1_PAGE_PGM, dest); if (!status) return DATAFLASH_ERROR; @@ -517,20 +521,20 @@ int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash, AT91F_SpiEnable(pDataFlash->pDevice->cs); if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) + AT91C_TIMEOUT_WRDY) != DATAFLASH_OK) return -1; while (size) { SizeToRead = (size < 0x8000) ? size : 0x8000; if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, - AT91C_TIMEOUT_WRDY) != - DATAFLASH_OK) + AT91C_TIMEOUT_WRDY) != + DATAFLASH_OK) return -1; if (AT91F_DataFlashContinuousRead(pDataFlash, addr, - (uchar *) buffer, - SizeToRead) != DATAFLASH_OK) + (uchar *) buffer, + SizeToRead) != DATAFLASH_OK) return -1; size -= SizeToRead; diff --git a/include/asm-arm/coloured_led.h b/include/asm-arm/coloured_led.h deleted file mode 100644 index f78a4b10041..00000000000 --- a/include/asm-arm/coloured_led.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * (C) Copyright 2006 - * Atmel Nordic AB - * Ulf Samuelsson - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __LED_H -#define __LED_H - -#ifndef __ASSEMBLY__ -extern void coloured_LED_init (void); -extern void red_LED_on(void); -extern void red_LED_off(void); -extern void green_LED_on(void); -extern void green_LED_off(void); -extern void yellow_LED_on(void); -extern void yellow_LED_off(void); -#else - .extern LED_init - .extern red_LED_on - .extern red_LED_off - .extern yellow_LED_on - .extern yellow_LED_off - .extern green_LED_on - .extern green_LED_off -#endif -#endif diff --git a/include/status_led.h b/include/status_led.h index a6468142557..74e2147cf92 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -383,6 +383,27 @@ extern void __led_set (led_id_t mask, int state); # include #endif +/* + * Coloured LEDs API + */ +#ifndef __ASSEMBLY__ +extern void coloured_LED_init (void); +extern void red_LED_on(void); +extern void red_LED_off(void); +extern void green_LED_on(void); +extern void green_LED_off(void); +extern void yellow_LED_on(void); +extern void yellow_LED_off(void); +#else + .extern LED_init + .extern red_LED_on + .extern red_LED_off + .extern yellow_LED_on + .extern yellow_LED_off + .extern green_LED_on + .extern green_LED_off +#endif + #endif /* CONFIG_STATUS_LED */ #endif /* _STATUS_LED_H_ */ -- cgit v1.3.1 From b90c045f035c3cc9b5d2edaed6048dfb74e40763 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:08:37 +0200 Subject: synchronizition with mainline --- Makefile | 11 +- board/xilinx/xupv2p/Makefile | 21 ++- board/xilinx/xupv2p/config.mk | 6 +- board/xilinx/xupv2p/xparameters.h | 27 ++- common/cmd_jffs2.c | 36 +--- common/cmd_mfsl.c | 11 +- cpu/microblaze/cache.c | 2 +- cpu/microblaze/start.S | 6 +- cpu/microblaze/timer.c | 7 - drivers/net/Makefile | 3 +- drivers/net/xilinx_emac.c | 374 ------------------------------------- drivers/net/xilinx_emac.h | 148 --------------- drivers/net/xilinx_emaclite.c | 376 -------------------------------------- drivers/serial_xuartlite.c | 2 +- fs/Makefile | 2 +- fs/romfs/Makefile | 49 ----- fs/romfs/romfs.c | 240 ------------------------ include/configs/ml401.h | 50 ++--- include/configs/suzaku.h | 18 +- include/configs/xupv2p.h | 63 +++---- lib_microblaze/time.c | 8 - 21 files changed, 119 insertions(+), 1341 deletions(-) delete mode 100644 drivers/net/xilinx_emac.c delete mode 100644 drivers/net/xilinx_emac.h delete mode 100644 drivers/net/xilinx_emaclite.c delete mode 100644 fs/romfs/Makefile delete mode 100644 fs/romfs/romfs.c (limited to 'include') diff --git a/Makefile b/Makefile index 63e7dcb01dd..8d500f53495 100644 --- a/Makefile +++ b/Makefile @@ -144,7 +144,7 @@ ifeq ($(ARCH),m68k) CROSS_COMPILE = m68k-elf- endif ifeq ($(ARCH),microblaze) -CROSS_COMPILE = microblaze-uclinux- +CROSS_COMPILE = mb- endif ifeq ($(ARCH),blackfin) CROSS_COMPILE = bfin-uclinux- @@ -201,9 +201,8 @@ ifeq ($(CPU),ixp) LIBS += cpu/ixp/npe/libnpe.a endif LIBS += lib_$(ARCH)/lib$(ARCH).a -LIBS += fs/cramfs/libcramfs.a fs/ext2/libext2fs.a fs/fat/libfat.a \ - fs/fdos/libfdos.a fs/jffs2/libjffs2.a fs/reiserfs/libreiserfs.a \ - fs/romfs/libromfs.a +LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \ + fs/reiserfs/libreiserfs.a fs/ext2/libext2fs.a LIBS += net/libnet.a LIBS += disk/libdisk.a LIBS += rtc/librtc.a @@ -326,14 +325,14 @@ depend dep: version tags ctags: ctags -w -o $(OBJTREE)/ctags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ + fs/cramfs fs/fat fs/fdos fs/jffs2 \ net disk rtc dtt drivers drivers/sk98lin common \ \( -name CVS -prune \) -o \( -name '*.[ch]' -print \)` etags: etags -a -o $(OBJTREE)/etags `find $(SUBDIRS) include \ lib_generic board/$(BOARDDIR) cpu/$(CPU) lib_$(ARCH) \ - fs/cramfs fs/fat fs/fdos fs/jffs2 fs/romfs\ + fs/cramfs fs/fat fs/fdos fs/jffs2 \ net disk rtc dtt drivers drivers/sk98lin common \ \( -name CVS -prune \) -o \( -name '*.[ch]' -print \)` diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile index 99e7047350f..9ab5633626e 100644 --- a/board/xilinx/xupv2p/Makefile +++ b/board/xilinx/xupv2p/Makefile @@ -22,17 +22,32 @@ # include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +$(shell mkdir -p $(obj)../xilinx_enet) +endif + +INCS := -I../common -I../xilinx_enet +CFLAGS += $(INCS) +HOST_CFLAGS += $(INCS) LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o +COBJS = $(BOARD).o \ + ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \ + ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \ + ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \ + ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \ + ../common/xbasic_types.o ../common/xdma_channel.o \ + ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \ + ../common/xversion.o \ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $^ clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk index eedfb24d4f3..c07b0b35b18 100644 --- a/board/xilinx/xupv2p/config.mk +++ b/board/xilinx/xupv2p/config.mk @@ -25,8 +25,8 @@ # Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 # -TEXT_BASE = 0x30000000 +TEXT_BASE = 0x38000000 -PLATFORM_CPPFLAGS += -mxl-pattern-compare PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mcpu=v5.00.c +PLATFORM_CPPFLAGS += -mno-xl-soft-div +PLATFORM_CPPFLAGS += -mxl-barrel-shift diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h index 0bb7a805f4a..a96c693c551 100644 --- a/board/xilinx/xupv2p/xparameters.h +++ b/board/xilinx/xupv2p/xparameters.h @@ -28,24 +28,17 @@ /* System Clock Frequency */ #define XILINX_CLOCK_FREQ 100000000 -/* Microblaze is microblaze_0 */ -#define XILINX_USE_MSR_INSTR 1 -#define XILINX_PVR 0 -#define XILINX_FSL_NUMBER 0 - /* Interrupt controller is opb_intc_0 */ #define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 7 +#define XILINX_INTC_NUM_INTR_INPUTS 11 /* Timer pheriphery is opb_timer_1 */ #define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 0 +#define XILINX_TIMER_IRQ 1 /* Uart pheriphery is RS232_Uart_1 */ -#define XILINX_UARTLITE_BASEADDR 0x40600000 -#define XILINX_UARTLITE_BAUDRATE 115200 - -/* IIC doesn't exist */ +#define XILINX_UART_BASEADDR 0x40600000 +#define XILINX_UART_BAUDRATE 115200 /* GPIO is LEDs_4Bit*/ #define XILINX_GPIO_BASEADDR 0x40000000 @@ -58,10 +51,14 @@ /* Sysace Controller is SysACE_CompactFlash */ #define XILINX_SYSACE_BASEADDR 0x41800000 +#define XILINX_SYSACE_HIGHADDR 0x4180ffff #define XILINX_SYSACE_MEM_WIDTH 16 /* Ethernet controller is Ethernet_MAC */ -#define XILINX_EMAC_BASEADDR 0x40c00000 -#define XILINX_EMAC_DMA_PRESENT 3 -#define XILINX_EMAC_HALF_DUPLEX_EXIST 1 -#define XILINX_EMAC_MII_EXIST 1 +#define XPAR_XEMAC_NUM_INSTANCES 1 +#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 +#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000 +#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff +#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 +#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 +#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 3e6061a5202..513a226c431 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -85,7 +85,7 @@ */ /* - * JFFS2/CRAMFS/ROMFS support + * JFFS2/CRAMFS support */ #include #include @@ -175,11 +175,6 @@ extern int cramfs_load (char *loadoffset, struct part_info *info, char *filename extern int cramfs_ls (struct part_info *info, char *filename); extern int cramfs_info (struct part_info *info); -extern int romfs_check (struct part_info *info); -extern int romfs_load (char *loadoffset, struct part_info *info, char *filename); -extern int romfs_ls (struct part_info *info, char *filename); -extern int romfs_info (struct part_info *info); - static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int part_num); /* command line only routines */ @@ -1879,22 +1874,14 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ - /* check partition type for JFFS2, cramfs, romfs */ - if (cramfs_check(part)) { - fsname = "CRAMFS"; - } else if (romfs_check(part)) { - fsname = "ROMFS"; - } else { - fsname = "JFFS2"; - } + /* check partition type for cramfs */ + fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); printf("### %s loading '%s' to 0x%lx\n", fsname, filename, offset); if (cramfs_check(part)) { size = cramfs_load ((char *) offset, part, filename); - } else if (romfs_check(part)){ - size = romfs_load ((char *) offset, part, filename); } else { - /* if this is not cramfs or romfs assume jffs2 */ + /* if this is not cramfs assume jffs2 */ size = jffs2_1pass_load((char *)offset, part, filename); } @@ -1941,10 +1928,8 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* check partition type for cramfs */ if (cramfs_check(part)) { ret = cramfs_ls (part, filename); - } else if (romfs_check(part)) { - ret = romfs_ls (part, filename); } else { - /* if this is not cramfs or romfs assume jffs2 */ + /* if this is not cramfs assume jffs2 */ ret = jffs2_1pass_ls(part, filename); } @@ -1966,6 +1951,7 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { struct part_info *part; + char *fsname; int ret; /* make sure we are in sync with env variables */ @@ -1975,17 +1961,13 @@ int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if ((part = jffs2_part_info(current_dev, current_partnum))){ /* check partition type for cramfs */ - puts("### filesystem type is "); + fsname = (cramfs_check(part) ? "CRAMFS" : "JFFS2"); + printf("### filesystem type is %s\n", fsname); if (cramfs_check(part)) { - puts("CRAMFS\n"); ret = cramfs_info (part); - } else if (romfs_check(part)) { - puts("ROMFS\n"); - ret = romfs_info (part); } else { - /* if this is not cramfs or romfs assume jffs2 */ - puts("JFFS2\n"); + /* if this is not cramfs assume jffs2 */ ret = jffs2_1pass_info(part); } diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c index 93cc873b05a..8d4c1a38d7f 100644 --- a/common/cmd_mfsl.c +++ b/common/cmd_mfsl.c @@ -357,7 +357,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) reg = (unsigned int)simple_strtoul (argv[1], NULL, 16); val = (unsigned int)simple_strtoul (argv[2], NULL, 16); - if (argc < 2) { + if (argc < 1) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } @@ -382,7 +382,6 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) puts ("ESR"); break; default: - puts ("Unsupported register\n"); return 1; } printf (": 0x%08lx\n", val); @@ -409,10 +408,10 @@ U_BOOT_CMD (fwr, 4, 1, do_fwr, " 3 - blocking control write\n"); U_BOOT_CMD (rspr, 3, 1, do_rspr, - "rspr - read/write special purpose register\n", + "rmsr - read/write special purpose register\n", "- reg_num [write value] read/write special purpose register\n" - " 1 - MSR - Machine status register\n" - " 3 - EAR - Exception address register\n" - " 5 - ESR - Exception status register\n"); + " 0 - MSR - Machine status register\n" + " 1 - EAR - Exception address register\n" + " 2 - ESR - Exception status register\n"); #endif diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c index 4b7866fae50..6ce0b55b243 100644 --- a/cpu/microblaze/cache.c +++ b/cpu/microblaze/cache.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S index 8740284ad84..3c027ff9bb1 100644 --- a/cpu/microblaze/start.S +++ b/cpu/microblaze/start.S @@ -33,13 +33,15 @@ _start: addi r1, r0, CFG_INIT_SP_OFFSET addi r1, r1, -4 /* Decrement SP to top of memory */ /* add opcode instruction for 32bit jump - 2 instruction imm & brai*/ - addi r6, r0, 0xb0000000 /* hex b000 opcode imm */ + addi r6, r0, 0xb000 /* hex b000 opcode imm */ + bslli r6, r6, 16 /* shift */ swi r6, r0, 0x0 /* reset address */ swi r6, r0, 0x8 /* user vector exception */ swi r6, r0, 0x10 /* interrupt */ swi r6, r0, 0x20 /* hardware exception */ - addi r6, r0, 0xb8080000 /* hew b808 opcode brai*/ + addi r6, r0, 0xb808 /* hew b808 opcode brai*/ + bslli r6, r6, 16 swi r6, r0, 0x4 /* reset address */ swi r6, r0, 0xC /* user vector exception */ swi r6, r0, 0x14 /* interrupt */ diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c index b350453443e..ab1cb127492 100644 --- a/cpu/microblaze/timer.c +++ b/cpu/microblaze/timer.c @@ -33,17 +33,10 @@ void reset_timer (void) timestamp = 0; } -#ifdef CFG_TIMER_0 ulong get_timer (ulong base) { return (timestamp - base); } -#else -ulong get_timer (ulong base) -{ - return (timestamp++ - base); -} -#endif void set_timer (ulong t) { diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 063985984eb..37d69b9949b 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -24,7 +24,8 @@ include $(TOPDIR)/config.mk LIB := $(obj)libnet.a -COBJS := mcffec.o xilinx_emac.o xilinx_emaclite.o + +COBJS := mcffec.o SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/net/xilinx_emac.c b/drivers/net/xilinx_emac.c deleted file mode 100644 index 36e627aae52..00000000000 --- a/drivers/net/xilinx_emac.c +++ /dev/null @@ -1,374 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Based on Xilinx drivers - * - */ - -#include -#include -#include -#include -#include "xilinx_emac.h" - -#ifdef XILINX_EMAC - -#undef DEBUG - -#define ENET_MAX_MTU PKTSIZE -#define ENET_ADDR_LENGTH 6 - -static unsigned int etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ - -static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; - -static xemac emac; - -void eth_halt(void) -{ -#ifdef DEBUG - puts ("eth_halt\n"); -#endif -} - -int eth_init(bd_t * bis) -{ - u32 helpreg; -#ifdef DEBUG - printf("EMAC Initialization Started\n\r"); -#endif - if (emac.isstarted) { - puts("Emac is started\n"); - return 0; - } - - memset (&emac, 0, sizeof (xemac)); - - emac.baseaddress = XILINX_EMAC_BASEADDR; - - /* Setting up FIFOs */ - emac.recvfifo.regbaseaddress = emac.baseaddress + - XEM_PFIFO_RXREG_OFFSET; - emac.recvfifo.databaseaddress = emac.baseaddress + - XEM_PFIFO_RXDATA_OFFSET; - out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK); - - emac.sendfifo.regbaseaddress = emac.baseaddress + - XEM_PFIFO_TXREG_OFFSET; - emac.sendfifo.databaseaddress = emac.baseaddress + - XEM_PFIFO_TXDATA_OFFSET; - out_be32 (emac.sendfifo.regbaseaddress, XPF_RESET_FIFO_MASK); - - /* Reset the entire IPIF */ - out_be32 (emac.baseaddress + XIIF_V123B_RESETR_OFFSET, - XIIF_V123B_RESET_MASK); - - /* Stopping EMAC for setting up MAC */ - helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET); - helpreg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - if (!getenv("ethaddr")) { - memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); - } - - /* Set the device station address high and low registers */ - helpreg = (bis->bi_enetaddr[0] << 8) | bis->bi_enetaddr[1]; - out_be32 (emac.baseaddress + XEM_SAH_OFFSET, helpreg); - helpreg = (bis->bi_enetaddr[2] << 24) | (bis->bi_enetaddr[3] << 16) | - (bis->bi_enetaddr[4] << 8) | bis->bi_enetaddr[5]; - out_be32 (emac.baseaddress + XEM_SAL_OFFSET, helpreg); - - - helpreg = XEM_ECR_UNICAST_ENABLE_MASK | XEM_ECR_BROAD_ENABLE_MASK | - XEM_ECR_FULL_DUPLEX_MASK | XEM_ECR_XMIT_FCS_ENABLE_MASK | - XEM_ECR_XMIT_PAD_ENABLE_MASK | XEM_ECR_PHY_ENABLE_MASK; - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - emac.isstarted = 1; - - /* Enable the transmitter, and receiver */ - helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET); - helpreg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK); - helpreg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK); - out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg); - - printf("EMAC Initialization complete\n\r"); - return 0; -} - -int eth_send(volatile void *ptr, int len) -{ - u32 intrstatus; - u32 xmitstatus; - u32 fifocount; - u32 wordcount; - u32 extrabytecount; - u32 *wordbuffer = (u32 *) ptr; - - if (len > ENET_MAX_MTU) - len = ENET_MAX_MTU; - - /* - * Check for overruns and underruns for the transmit status and length - * FIFOs and make sure the send packet FIFO is not deadlocked. - * Any of these conditions is bad enough that we do not want to - * continue. The upper layer software should reset the device to resolve - * the error. - */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | - XEM_EIR_XMIT_LFIFO_OVER_MASK)) { -#ifdef DEBUG - puts ("Transmitting overrun error\n"); -#endif - return 0; - } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | - XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { -#ifdef DEBUG - puts ("Transmitting underrun error\n"); -#endif - return 0; - } else if (in_be32 (emac.sendfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_DEADLOCK_MASK) { -#ifdef DEBUG - puts("Transmitting fifo error\n"); -#endif - return 0; - } - - /* - * Before writing to the data FIFO, make sure the length FIFO is not - * full. The data FIFO might not be full yet even though the length FIFO - * is. This avoids an overrun condition on the length FIFO and keeps the - * FIFOs in sync. - * - * Clear the latched LFIFO_FULL bit so next time around the most - * current status is represented - */ - if (intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK) { - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK); -#ifdef DEBUG - puts ("Fifo is full\n"); -#endif - return 0; - } - - /* get the count of how many words may be inserted into the FIFO */ - fifocount = in_be32 (emac.sendfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; - wordcount = len >> 2; - extrabytecount = len & 0x3; - - if (fifocount < wordcount) { -#ifdef DEBUG - puts ("Sending packet is larger then size of FIFO\n"); -#endif - return 0; - } - - for (fifocount = 0; fifocount < wordcount; fifocount++) { - out_be32 (emac.sendfifo.databaseaddress, wordbuffer[fifocount]); - } - if (extrabytecount > 0) { - u32 lastword = 0; - u8 *extrabytesbuffer = (u8 *) (wordbuffer + wordcount); - - if (extrabytecount == 1) { - lastword = extrabytesbuffer[0] << 24; - } else if (extrabytecount == 2) { - lastword = extrabytesbuffer[0] << 24 | - extrabytesbuffer[1] << 16; - } else if (extrabytecount == 3) { - lastword = extrabytesbuffer[0] << 24 | - extrabytesbuffer[1] << 16 | - extrabytesbuffer[2] << 8; - } - out_be32 (emac.sendfifo.databaseaddress, lastword); - } - - /* Loop on the MAC's status to wait for any pause to complete */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - while ((intrstatus & XEM_EIR_XMIT_PAUSE_MASK) != 0) { - intrstatus = in_be32 ((emac.baseaddress) + - XIIF_V123B_IISR_OFFSET); - /* Clear the pause status from the transmit status register */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_PAUSE_MASK); - } - - /* - * Set the MAC's transmit packet length register to tell it to transmit - */ - out_be32 (emac.baseaddress + XEM_TPLR_OFFSET, len); - - /* - * Loop on the MAC's status to wait for the transmit to complete. - * The transmit status is in the FIFO when the XMIT_DONE bit is set. - */ - do { - intrstatus = in_be32 ((emac.baseaddress) + - XIIF_V123B_IISR_OFFSET); - } - while ((intrstatus & XEM_EIR_XMIT_DONE_MASK) == 0); - - xmitstatus = in_be32 (emac.baseaddress + XEM_TSR_OFFSET); - - if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK | - XEM_EIR_XMIT_LFIFO_OVER_MASK)) { -#ifdef DEBUG - puts ("Transmitting overrun error\n"); -#endif - return 0; - } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK | - XEM_EIR_XMIT_LFIFO_UNDER_MASK)) { -#ifdef DEBUG - puts ("Transmitting underrun error\n"); -#endif - return 0; - } - - /* Clear the interrupt status register of transmit statuses */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - intrstatus & XEM_EIR_XMIT_ALL_MASK); - - /* - * Collision errors are stored in the transmit status register - * instead of the interrupt status register - */ - if ((xmitstatus & XEM_TSR_EXCESS_DEFERRAL_MASK) || - (xmitstatus & XEM_TSR_LATE_COLLISION_MASK)) { -#ifdef DEBUG - puts ("Transmitting collision error\n"); -#endif - return 0; - } - return 1; -} - -int eth_rx(void) -{ - u32 pktlength; - u32 intrstatus; - u32 fifocount; - u32 wordcount; - u32 extrabytecount; - u32 lastword; - u8 *extrabytesbuffer; - - if (in_be32 (emac.recvfifo.regbaseaddress + XPF_COUNT_STATUS_REG_OFFSET) - & XPF_DEADLOCK_MASK) { - out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK); -#ifdef DEBUG - puts ("Receiving FIFO deadlock\n"); -#endif - return 0; - } - - /* - * Get the interrupt status to know what happened (whether an error - * occurred and/or whether frames have been received successfully). - * When clearing the intr status register, clear only statuses that - * pertain to receive. - */ - intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET); - /* - * Before reading from the length FIFO, make sure the length FIFO is not - * empty. We could cause an underrun error if we try to read from an - * empty FIFO. - */ - if (!(intrstatus & XEM_EIR_RECV_DONE_MASK)) { -#ifdef DEBUG - /* puts("Receiving FIFO is empty\n"); */ -#endif - return 0; - } - - /* - * Determine, from the MAC, the length of the next packet available - * in the data FIFO (there should be a non-zero length here) - */ - pktlength = in_be32 (emac.baseaddress + XEM_RPLR_OFFSET); - if (!pktlength) { - return 0; - } - - /* - * Write the RECV_DONE bit in the status register to clear it. This bit - * indicates the RPLR is non-empty, and we know it's set at this point. - * We clear it so that subsequent entry into this routine will reflect - * the current status. This is done because the non-empty bit is latched - * in the IPIF, which means it may indicate a non-empty condition even - * though there is something in the FIFO. - */ - out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET, - XEM_EIR_RECV_DONE_MASK); - - fifocount = in_be32 (emac.recvfifo.regbaseaddress + - XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK; - - if ((fifocount * 4) < pktlength) { -#ifdef DEBUG - puts ("Receiving FIFO is smaller than packet size.\n"); -#endif - return 0; - } - - wordcount = pktlength >> 2; - extrabytecount = pktlength & 0x3; - - for (fifocount = 0; fifocount < wordcount; fifocount++) { - etherrxbuff[fifocount] = - in_be32 (emac.recvfifo.databaseaddress); - } - - /* - * if there are extra bytes to handle, read the last word from the FIFO - * and insert the extra bytes into the buffer - */ - if (extrabytecount > 0) { - extrabytesbuffer = (u8 *) (etherrxbuff + wordcount); - - lastword = in_be32 (emac.recvfifo.databaseaddress); - - /* - * one extra byte in the last word, put the byte into the next - * location of the buffer, bytes in a word of the FIFO are - * ordered from most significant byte to least - */ - if (extrabytecount == 1) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - } else if (extrabytecount == 2) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - extrabytesbuffer[1] = (u8) (lastword >> 16); - } else if (extrabytecount == 3) { - extrabytesbuffer[0] = (u8) (lastword >> 24); - extrabytesbuffer[1] = (u8) (lastword >> 16); - extrabytesbuffer[2] = (u8) (lastword >> 8); - } - } - NetReceive((uchar *)etherrxbuff, pktlength); - return 1; -} -#endif diff --git a/drivers/net/xilinx_emac.h b/drivers/net/xilinx_emac.h deleted file mode 100644 index 966598e27a5..00000000000 --- a/drivers/net/xilinx_emac.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Based on Xilinx drivers - * - */ - -typedef struct { - u32 regbaseaddress; /* Base address of registers */ - u32 databaseaddress; /* Base address of data for FIFOs */ -} xpacketfifov100b; - -typedef struct { - u32 baseaddress; /* Base address (of IPIF) */ - u32 isstarted; /* Device is currently started 0-no, 1-yes */ - xpacketfifov100b recvfifo; /* FIFO used to receive frames */ - xpacketfifov100b sendfifo; /* FIFO used to send frames */ -} xemac; - -#define XIIF_V123B_IISR_OFFSET 32UL /* IP interrupt status register */ -#define XIIF_V123B_RESET_MASK 0xAUL -#define XIIF_V123B_RESETR_OFFSET 64UL /* reset register */ - -/* This constant is used with the Reset Register */ -#define XPF_RESET_FIFO_MASK 0x0000000A -#define XPF_COUNT_STATUS_REG_OFFSET 4UL - -/* These constants are used with the Occupancy/Vacancy Count Register. This - * register also contains FIFO status */ -#define XPF_COUNT_MASK 0x0000FFFF -#define XPF_DEADLOCK_MASK 0x20000000 - -/* Offset of the MAC registers from the IPIF base address */ -#define XEM_REG_OFFSET 0x1100UL - -/* - * Register offsets for the Ethernet MAC. Each register is 32 bits. - */ -#define XEM_ECR_OFFSET (XEM_REG_OFFSET + 0x4) /* MAC Control */ -#define XEM_SAH_OFFSET (XEM_REG_OFFSET + 0xC) /* Station addr, high */ -#define XEM_SAL_OFFSET (XEM_REG_OFFSET + 0x10) /* Station addr, low */ -#define XEM_RPLR_OFFSET (XEM_REG_OFFSET + 0x1C) /* Rx packet length */ -#define XEM_TPLR_OFFSET (XEM_REG_OFFSET + 0x20) /* Tx packet length */ -#define XEM_TSR_OFFSET (XEM_REG_OFFSET + 0x24) /* Tx status */ - - - -#define XEM_PFIFO_OFFSET 0x2000UL -/* Tx registers */ -#define XEM_PFIFO_TXREG_OFFSET (XEM_PFIFO_OFFSET + 0x0) -/* Rx registers */ -#define XEM_PFIFO_RXREG_OFFSET (XEM_PFIFO_OFFSET + 0x10) -/* Tx keyhole */ -#define XEM_PFIFO_TXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x100) -/* Rx keyhole */ -#define XEM_PFIFO_RXDATA_OFFSET (XEM_PFIFO_OFFSET + 0x200) - - -/* - * EMAC Interrupt Registers (Status and Enable) masks. These registers are - * part of the IPIF IP Interrupt registers - */ -/* A mask for all transmit interrupts, used in polled mode */ -#define XEM_EIR_XMIT_ALL_MASK (XEM_EIR_XMIT_DONE_MASK |\ - XEM_EIR_XMIT_ERROR_MASK | \ - XEM_EIR_XMIT_SFIFO_EMPTY_MASK |\ - XEM_EIR_XMIT_LFIFO_FULL_MASK) - -/* Xmit complete */ -#define XEM_EIR_XMIT_DONE_MASK 0x00000001UL -/* Recv complete */ -#define XEM_EIR_RECV_DONE_MASK 0x00000002UL -/* Xmit error */ -#define XEM_EIR_XMIT_ERROR_MASK 0x00000004UL -/* Recv error */ -#define XEM_EIR_RECV_ERROR_MASK 0x00000008UL -/* Xmit status fifo empty */ -#define XEM_EIR_XMIT_SFIFO_EMPTY_MASK 0x00000010UL -/* Recv length fifo empty */ -#define XEM_EIR_RECV_LFIFO_EMPTY_MASK 0x00000020UL -/* Xmit length fifo full */ -#define XEM_EIR_XMIT_LFIFO_FULL_MASK 0x00000040UL -/* Recv length fifo overrun */ -#define XEM_EIR_RECV_LFIFO_OVER_MASK 0x00000080UL -/* Recv length fifo underrun */ -#define XEM_EIR_RECV_LFIFO_UNDER_MASK 0x00000100UL -/* Xmit status fifo overrun */ -#define XEM_EIR_XMIT_SFIFO_OVER_MASK 0x00000200UL -/* Transmit status fifo underrun */ -#define XEM_EIR_XMIT_SFIFO_UNDER_MASK 0x00000400UL -/* Transmit length fifo overrun */ -#define XEM_EIR_XMIT_LFIFO_OVER_MASK 0x00000800UL -/* Transmit length fifo underrun */ -#define XEM_EIR_XMIT_LFIFO_UNDER_MASK 0x00001000UL -/* Transmit pause pkt received */ -#define XEM_EIR_XMIT_PAUSE_MASK 0x00002000UL - -/* - * EMAC Control Register (ECR) - */ -/* Full duplex mode */ -#define XEM_ECR_FULL_DUPLEX_MASK 0x80000000UL -/* Reset transmitter */ -#define XEM_ECR_XMIT_RESET_MASK 0x40000000UL -/* Enable transmitter */ -#define XEM_ECR_XMIT_ENABLE_MASK 0x20000000UL -/* Reset receiver */ -#define XEM_ECR_RECV_RESET_MASK 0x10000000UL -/* Enable receiver */ -#define XEM_ECR_RECV_ENABLE_MASK 0x08000000UL -/* Enable PHY */ -#define XEM_ECR_PHY_ENABLE_MASK 0x04000000UL -/* Enable xmit pad insert */ -#define XEM_ECR_XMIT_PAD_ENABLE_MASK 0x02000000UL -/* Enable xmit FCS insert */ -#define XEM_ECR_XMIT_FCS_ENABLE_MASK 0x01000000UL -/* Enable unicast addr */ -#define XEM_ECR_UNICAST_ENABLE_MASK 0x00020000UL -/* Enable broadcast addr */ -#define XEM_ECR_BROAD_ENABLE_MASK 0x00008000UL - -/* - * Transmit Status Register (TSR) - */ -/* Transmit excess deferral */ -#define XEM_TSR_EXCESS_DEFERRAL_MASK 0x80000000UL -/* Transmit late collision */ -#define XEM_TSR_LATE_COLLISION_MASK 0x01000000UL diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c deleted file mode 100644 index 5d8eaa51823..00000000000 --- a/drivers/net/xilinx_emaclite.c +++ /dev/null @@ -1,376 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include - -#ifdef XILINX_EMACLITE_BASEADDR - -#undef DEBUG - -#define ENET_MAX_MTU PKTSIZE -#define ENET_MAX_MTU_ALIGNED PKTSIZE_ALIGN -#define ENET_ADDR_LENGTH 6 - -/* EmacLite constants */ -#define XEL_BUFFER_OFFSET 0x0800 /* Next buffer's offset */ -#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ -#define XEL_TSR_OFFSET 0x07FC /* Tx status */ -#define XEL_RSR_OFFSET 0x17FC /* Rx status */ -#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ - -/* Xmit complete */ -#define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL -/* Xmit interrupt enable bit */ -#define XEL_TSR_XMIT_IE_MASK 0x00000008UL -/* Buffer is active, SW bit only */ -#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000UL -/* Program the MAC address */ -#define XEL_TSR_PROGRAM_MASK 0x00000002UL -/* define for programming the MAC address into the EMAC Lite */ -#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) - -/* Transmit packet length upper byte */ -#define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL -/* Transmit packet length lower byte */ -#define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL - -/* Recv complete */ -#define XEL_RSR_RECV_DONE_MASK 0x00000001UL -/* Recv interrupt enable bit */ -#define XEL_RSR_RECV_IE_MASK 0x00000008UL - -typedef struct { - unsigned int baseaddress; /* Base address for device (IPIF) */ - unsigned int nexttxbuffertouse; /* Next TX buffer to write to */ - unsigned int nextrxbuffertouse; /* Next RX buffer to read from */ - unsigned char deviceid; /* Unique ID of device - for future */ -} xemaclite; - -static xemaclite emaclite; - -static char etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */ - -/* hardcoded MAC address for the Xilinx EMAC Core when env is nowhere*/ -#ifdef CFG_ENV_IS_NOWHERE -static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 }; -#endif - -void xemaclite_alignedread (u32 * srcptr, void *destptr, unsigned bytecount) -{ - unsigned int i; - u32 alignbuffer; - u32 *to32ptr; - u32 *from32ptr; - u8 *to8ptr; - u8 *from8ptr; - - from32ptr = (u32 *) srcptr; - - /* Word aligned buffer, no correction needed. */ - to32ptr = (u32 *) destptr; - while (bytecount > 3) { - *to32ptr++ = *from32ptr++; - bytecount -= 4; - } - to8ptr = (u8 *) to32ptr; - - alignbuffer = *from32ptr++; - from8ptr = (u8 *) & alignbuffer; - - for (i = 0; i < bytecount; i++) { - *to8ptr++ = *from8ptr++; - } -} - -void xemaclite_alignedwrite (void *srcptr, u32 destptr, unsigned bytecount) -{ - unsigned i; - u32 alignbuffer; - u32 *to32ptr = (u32 *) destptr; - u32 *from32ptr; - u8 *to8ptr; - u8 *from8ptr; - - from32ptr = (u32 *) srcptr; - while (bytecount > 3) { - - *to32ptr++ = *from32ptr++; - bytecount -= 4; - } - - alignbuffer = 0; - to8ptr = (u8 *) & alignbuffer; - from8ptr = (u8 *) from32ptr; - - for (i = 0; i < bytecount; i++) { - *to8ptr++ = *from8ptr++; - } - - *to32ptr++ = alignbuffer; -} - -void eth_halt (void) -{ -#ifdef DEBUG - puts ("eth_halt\n"); -#endif -} - -int eth_init (bd_t * bis) -{ -#ifdef DEBUG - puts ("EmacLite Initialization Started\n"); -#endif - memset (&emaclite, 0, sizeof (xemaclite)); - emaclite.baseaddress = XILINX_EMACLITE_BASEADDR; - - if (!getenv("ethaddr")) { - memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH); - } - -/* - * TX - TX_PING & TX_PONG initialization - */ - /* Restart PING TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); - /* Copy MAC address */ - xemaclite_alignedwrite (bis->bi_enetaddr, - emaclite.baseaddress, ENET_ADDR_LENGTH); - /* Set the length */ - out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); - /* Update the MAC address in the EMAC Lite */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR); - /* Wait for EMAC Lite to finish with the MAC address update */ - while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET) & - XEL_TSR_PROG_MAC_ADDR) != 0) ; - -#ifdef XILINX_EMACLITE_TX_PING_PONG - /* The same operation with PONG TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0); - xemaclite_alignedwrite (bis->bi_enetaddr, emaclite.baseaddress + - XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH); - out_be32 (emaclite.baseaddress + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH); - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, - XEL_TSR_PROG_MAC_ADDR); - while ((in_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + - XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0) ; -#endif - -/* - * RX - RX_PING & RX_PONG initialization - */ - /* Write out the value to flush the RX buffer */ - out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET, XEL_RSR_RECV_IE_MASK); -#ifdef XILINX_EMACLITE_RX_PING_PONG - out_be32 (emaclite.baseaddress + XEL_RSR_OFFSET + XEL_BUFFER_OFFSET, - XEL_RSR_RECV_IE_MASK); -#endif - -#ifdef DEBUG - puts ("EmacLite Initialization complete\n"); -#endif - return 0; -} - -int xemaclite_txbufferavailable (xemaclite * instanceptr) -{ - u32 reg; - u32 txpingbusy; - u32 txpongbusy; - /* - * Read the other buffer register - * and determine if the other buffer is available - */ - reg = in_be32 (instanceptr->baseaddress + - instanceptr->nexttxbuffertouse + 0); - txpingbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == - XEL_TSR_XMIT_BUSY_MASK); - - reg = in_be32 (instanceptr->baseaddress + - (instanceptr->nexttxbuffertouse ^ XEL_TSR_OFFSET) + 0); - txpongbusy = ((reg & XEL_TSR_XMIT_BUSY_MASK) == - XEL_TSR_XMIT_BUSY_MASK); - - return (!(txpingbusy && txpongbusy)); -} - -int eth_send (volatile void *ptr, int len) { - - unsigned int reg; - unsigned int baseaddress; - - unsigned maxtry = 1000; - - if (len > ENET_MAX_MTU) - len = ENET_MAX_MTU; - - while (!xemaclite_txbufferavailable (&emaclite) && maxtry) { - udelay (10); - maxtry--; - } - - if (!maxtry) { - printf ("Error: Timeout waiting for ethernet TX buffer\n"); - /* Restart PING TX */ - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET, 0); -#ifdef XILINX_EMACLITE_TX_PING_PONG - out_be32 (emaclite.baseaddress + XEL_TSR_OFFSET + - XEL_BUFFER_OFFSET, 0); -#endif - return 0; - } - - /* Determine the expected TX buffer address */ - baseaddress = (emaclite.baseaddress + emaclite.nexttxbuffertouse); - - /* Determine if the expected buffer address is empty */ - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) - && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) - & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { - -#ifdef XILINX_EMACLITE_TX_PING_PONG - emaclite.nexttxbuffertouse ^= XEL_BUFFER_OFFSET; -#endif -#ifdef DEBUG - printf ("Send packet from 0x%x\n", baseaddress); -#endif - /* Write the frame to the buffer */ - xemaclite_alignedwrite ((void *) ptr, baseaddress, len); - out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & - (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - reg |= XEL_TSR_XMIT_BUSY_MASK; - if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { - reg |= XEL_TSR_XMIT_ACTIVE_MASK; - } - out_be32 (baseaddress + XEL_TSR_OFFSET, reg); - return 1; - } -#ifdef XILINX_EMACLITE_TX_PING_PONG - /* Switch to second buffer */ - baseaddress ^= XEL_BUFFER_OFFSET; - /* Determine if the expected buffer address is empty */ - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - if (((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) - && ((in_be32 ((baseaddress) + XEL_TSR_OFFSET) - & XEL_TSR_XMIT_ACTIVE_MASK) == 0)) { -#ifdef DEBUG - printf ("Send packet from 0x%x\n", baseaddress); -#endif - /* Write the frame to the buffer */ - xemaclite_alignedwrite ((void *) ptr, baseaddress, len); - out_be32 (baseaddress + XEL_TPLR_OFFSET,(len & - (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO))); - reg = in_be32 (baseaddress + XEL_TSR_OFFSET); - reg |= XEL_TSR_XMIT_BUSY_MASK; - if ((reg & XEL_TSR_XMIT_IE_MASK) != 0) { - reg |= XEL_TSR_XMIT_ACTIVE_MASK; - } - out_be32 (baseaddress + XEL_TSR_OFFSET, reg); - return 1; - } -#endif - puts ("Error while sending frame\n"); - return 0; -} - -int eth_rx (void) -{ - unsigned int length; - unsigned int reg; - unsigned int baseaddress; - - baseaddress = emaclite.baseaddress + emaclite.nextrxbuffertouse; - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); -#ifdef DEBUG - printf ("Testing data at address 0x%x\n", baseaddress); -#endif - if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { -#ifdef XILINX_EMACLITE_RX_PING_PONG - emaclite.nextrxbuffertouse ^= XEL_BUFFER_OFFSET; -#endif - } else { -#ifndef XILINX_EMACLITE_RX_PING_PONG -#ifdef DEBUG - printf ("No data was available - address 0x%x\n", baseaddress); -#endif - return 0; -#else - baseaddress ^= XEL_BUFFER_OFFSET; - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); - if ((reg & XEL_RSR_RECV_DONE_MASK) != - XEL_RSR_RECV_DONE_MASK) { -#ifdef DEBUG - printf ("No data was available - address 0x%x\n", - baseaddress); -#endif - return 0; - } -#endif - } - /* Get the length of the frame that arrived */ - switch(((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0xC)) & - 0xFFFF0000 ) >> 16) { - case 0x806: - length = 42 + 20; /* FIXME size of ARP */ -#ifdef DEBUG - puts ("ARP Packet\n"); -#endif - break; - case 0x800: - length = 14 + 14 + - (((in_be32 (baseaddress + XEL_RXBUFF_OFFSET + 0x10)) & - 0xFFFF0000) >> 16); /* FIXME size of IP packet */ -#ifdef DEBUG - puts("IP Packet\n"); -#endif - break; - default: -#ifdef DEBUG - puts("Other Packet\n"); -#endif - length = ENET_MAX_MTU; - break; - } - - xemaclite_alignedread ((u32 *) (baseaddress + XEL_RXBUFF_OFFSET), - etherrxbuff, length); - - /* Acknowledge the frame */ - reg = in_be32 (baseaddress + XEL_RSR_OFFSET); - reg &= ~XEL_RSR_RECV_DONE_MASK; - out_be32 (baseaddress + XEL_RSR_OFFSET, reg); - -#ifdef DEBUG - printf ("Packet receive from 0x%x, length %dB\n", baseaddress, length); -#endif - NetReceive ((uchar *) etherrxbuff, length); - return 1; - -} -#endif diff --git a/drivers/serial_xuartlite.c b/drivers/serial_xuartlite.c index 1f3aaae4034..ed59abea862 100644 --- a/drivers/serial_xuartlite.c +++ b/drivers/serial_xuartlite.c @@ -24,7 +24,7 @@ #include -#ifdef XILINX_UARTLITE +#ifdef CONFIG_MICROBLAZE #include diff --git a/fs/Makefile b/fs/Makefile index 118ae78f2d3..273d90e011b 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -22,7 +22,7 @@ # # -SUBDIRS := romfs jffs2 cramfs fdos fat reiserfs ext2 +SUBDIRS := jffs2 cramfs fdos fat reiserfs ext2 $(obj).depend all: @for dir in $(SUBDIRS) ; do \ diff --git a/fs/romfs/Makefile b/fs/romfs/Makefile deleted file mode 100644 index 937d755940d..00000000000 --- a/fs/romfs/Makefile +++ /dev/null @@ -1,49 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)libromfs.a - -AOBJS = -COBJS = romfs.o - -SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS)) - -#CPPFLAGS += - -all: $(LIB) $(AOBJS) - -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/fs/romfs/romfs.c b/fs/romfs/romfs.c deleted file mode 100644 index 15de3e18ff0..00000000000 --- a/fs/romfs/romfs.c +++ /dev/null @@ -1,240 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -#if defined(CONFIG_CMD_JFFS2) - -#include -#include -#include -#include - -#undef DEBUG_ROMFS - -/* ROMFS superblock */ -struct romfs_super { - u32 word0; - u32 word1; - u32 size; - u32 checksum; - char name[0]; -}; - -struct romfs_inode { - u32 next; - u32 spec; - u32 size; - u32 checksum; - char name[0]; -}; - -extern flash_info_t flash_info[]; -#define PART_OFFSET(x) (x->offset + flash_info[x->dev->id->num].start[0]) -#define ALIGN(x) (((x) & 0xfffffff0)) -#define HEADERSIZE(name) (0x20 + ALIGN(strlen(name))) - -static unsigned long romfs_resolve (unsigned long begin, unsigned long offset, - unsigned long size, int raw, char *filename) -{ - unsigned long inodeoffset = 0, nextoffset; - struct romfs_inode *inode; -#ifdef DEBUG_ROMFS - printf ("ROMFS_resolve: begin 0x%x, offset 0x%x, size 0x%x, raw 0x%x, \ - filename %s\n", begin, offset, size, raw, filename); -#endif - - while (inodeoffset < size) { - inode = (struct romfs_inode *)(begin + offset + inodeoffset); - offset = 0; - nextoffset = ALIGN (inode->next); -#ifdef DEBUG_ROMFS - printf("inode 0x%x, name %s - len 0x%x, next inode 0x%x, \ - compare names 0x%x\n", - inode, inode->name, strlen (inode->name), nextoffset, - strncmp (filename, inode->name, strlen (filename))); -#endif - if (!strncmp (filename, inode->name, strlen (inode->name))) { - char *p = strtok (NULL, "/"); - if (raw && (p == NULL || *p == '\0')) { - return offset + inodeoffset; - } - return romfs_resolve (begin, - inodeoffset + HEADERSIZE (inode->name), - size, raw, p); - } - inodeoffset = nextoffset; - } - - printf ("can't find corresponding entry\n"); - return 0; -} - -int romfs_load (char *loadoffset, struct part_info *info, char *filename) -{ - struct romfs_inode *inode; - struct romfs_super *sb; - char *data; - int pocet; - sb = (struct romfs_super *) PART_OFFSET (info); - - unsigned long offset; - - offset = romfs_resolve (PART_OFFSET (info), HEADERSIZE (sb->name), - sb->size, 1, strtok (filename, "/")); - if (offset <= 0) - return offset; - - inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); - data = (char *)((int)inode + HEADERSIZE (inode->name)); - pocet = inode->size; - while (pocet--) { - *loadoffset++ = *data++; - } - return inode->size; -} - -static int romfs_list_inode (struct part_info *info, unsigned long offset) -{ - struct romfs_inode *inode = - (struct romfs_inode *)(PART_OFFSET (info) + offset); - struct romfs_inode *hardlink = NULL; - char str[3], *data; - -/* - * mapping spec.info means - * 0 hard link link destination [file header] - * 1 directory first file's header - * 2 regular file unused, must be zero [MBZ] - * 3 symbolic link unused, MBZ (file data is the link content) - * 4 block device 16/16 bits major/minor number - * 5 char device - " - - * 6 socket unused, MBZ - * 7 fifo unused, MBZ - */ - char attributes[] = "hdflbcsp"; - str[0] = attributes[inode->next & 0x7]; - str[1] = (inode->next & 0x8) ? 'x' : '-'; - str[2] = '\0'; - - if ((str[0] == 'b') || (str[0] == 'c')) { -#ifdef DEBUG_ROMFS - printf (" %s %3d,%3d %12s 0x%08x 0x%08x", str, - (inode->spec & 0xffff0000) >> 16, - inode->spec & 0x0000ffff, inode->name, inode, - inode->spec); -#else - printf (" %s %3d,%3d %12s", str, - (inode->spec & 0xffff0000) >> 16, - inode->spec & 0x0000ffff); -#endif - } else { -#ifdef DEBUG_ROMFS - printf (" %s %7d %12s 0x%08x 0x%08x", str, inode->size, - inode->name, inode, inode->spec); -#else - printf (" %s %7d %12s", str, inode->size, inode->name); -#endif - if (str[0] == 'l') { - data = (char *)((int)inode + HEADERSIZE (inode->name)); - puts (" -> "); - puts (data); - } - if (str[0] == 'h') { - hardlink = (struct romfs_inode *)(PART_OFFSET (info) + - inode->spec); - puts (" -> "); - puts (hardlink->name); - } - } - puts ("\n"); - return ALIGN (inode->next); -} - -int romfs_ls (struct part_info *info, char *filename) -{ - struct romfs_inode *inode; - unsigned long inodeoffset = 0, nextoffset; - unsigned long offset, size; - struct romfs_super *sb; - sb = (struct romfs_super *)PART_OFFSET (info); - - if (strlen (filename) == 0 || !strcmp (filename, "/")) { - offset = HEADERSIZE (sb->name); - size = sb->size; - } else { - offset = romfs_resolve (PART_OFFSET (info), - HEADERSIZE (sb->name), sb->size, 1, - strtok (filename, "/")); - - if (offset == 0) { - return offset; - } - inode = (struct romfs_inode *)(PART_OFFSET (info) + offset); - if ((inode->next & 0x7) != 1) { - return (romfs_list_inode (info, offset) > 0); - } - - size = sb->size; - offset = offset + HEADERSIZE (inode->name); - } - - inodeoffset = offset + inodeoffset; - while (inodeoffset < size) { - nextoffset = romfs_list_inode (info, inodeoffset); - if (nextoffset == 0) - break; - inodeoffset = nextoffset; - } - return 1; -} - -int romfs_info (struct part_info *info) -{ - struct romfs_super *sb; - sb = (struct romfs_super *)PART_OFFSET (info); - - printf ("name: \t\t%s, len %d B\n", sb->name, strlen (sb->name)); - printf ("size of SB:\t%d B\n", HEADERSIZE (sb->name)); - printf ("full size:\t%d B\n", sb->size); - printf ("checksum:\t0x%x\n", sb->checksum); - return 0; -} - -int romfs_check (struct part_info *info) -{ - struct romfs_super *sb; - if (info->dev->id->type != MTD_DEV_TYPE_NOR) - return 0; - - sb = (struct romfs_super *)PART_OFFSET (info); - if ((sb->word0 != 0x2D726F6D) || (sb->word1 != 0x3166732D)) { - return 0; - } - return 1; -} - -#endif diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 74fe88867ea..7eeae708a72 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2007 Czech Technical University. * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. @@ -32,7 +32,6 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ -#define XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -87,7 +86,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -100,7 +99,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -146,16 +145,6 @@ #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ -/* system ace */ -#ifdef XILINX_SYSACE_BASEADDR - #define CONFIG_SYSTEMACE - /* #define DEBUG_SYSTEMACE */ - #define SYSTEMACE_CONFIG_FPGA - #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR - #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH - #define CONFIG_DOS_PARTITION -#endif - /* * BOOTP options */ @@ -164,21 +153,28 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME + /* * Command line configuration. */ #include #define CONFIG_CMD_ASKENV +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL +#define CONFIG_CMD_NET #define CONFIG_CMD_PING - -#if defined(CONFIG_SYSTEMACE) - #define CONFIG_CMD_EXT2 - #define CONFIG_CMD_FAT -#endif +#define CONFIG_CMD_RUN #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -190,8 +186,6 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVES #endif -#else - #undef CONFIG_CMD_FLASH #endif #if defined(CONFIG_CMD_JFFS2) @@ -216,16 +210,24 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ #define CFG_USR_EXCEP /* user exception */ #define CFG_HZ 1000 +/* system ace */ +#define CONFIG_SYSTEMACE +/* #define DEBUG_SYSTEMACE */ +#define SYSTEMACE_CONFIG_FPGA +#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR +#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH +#define CONFIG_DOS_PARTITION + #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 9a2eec1bb2a..08ac9cbd58b 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,7 +48,6 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) -#define XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } @@ -56,16 +55,21 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + /* * Command line configuration. */ #include -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_ENV -#undef CONFIG_CMD_MEMORY -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE @@ -104,6 +108,4 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET -#define XILINX_CLOCK_FREQ 50000000 - #endif /* __CONFIG_H */ diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 006a132881d..35001d7ada3 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,34 +31,13 @@ #define CONFIG_XUPV2P 1 /* uart */ -#ifdef XILINX_UARTLITE_BASEADDR -#define XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR +#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XILINX_UART16550_BASEADDR -#define CFG_NS16550 -#define CFG_NS16550_SERIAL -#define CFG_NS16550_REG_SIZE 4 -#define CONFIG_CONS_INDEX 1 -#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR -#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ - -#define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600, 115200 } -#endif -#endif /* ethernet */ -#ifdef XILINX_EMAC_BASEADDR -#define XILINX_EMAC 1 -#else -#ifdef XILINX_EMACLITE_BASEADDR -#define XILINX_EMACLITE 1 -#endif -#endif -#undef ET_DEBUG +#define CONFIG_EMAC 1 +#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES /* * setting reset address @@ -69,13 +48,11 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -/* #define CFG_RESET_ADDRESS 0x36000000 */ +#define CFG_RESET_ADDRESS 0x36000000 /* gpio */ -#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -142,6 +119,7 @@ #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) + /* * BOOTP options */ @@ -150,24 +128,29 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME + /* * Command line configuration. */ #include -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE +#define CONFIG_CMD_MEMORY #define CONFIG_CMD_IRQ -#define CONFIG_CMD_MFSL +#define CONFIG_CMD_BDI +#define CONFIG_CMD_NET +#define CONFIG_CMD_IMI +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_RUN +#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_LOADB +#define CONFIG_CMD_MISC +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_PING -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#endif /* Miscellaneous configurable options */ #define CFG_PROMPT "U-Boot-mONStR> " @@ -179,7 +162,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "xupv2p" +#define CONFIG_HOSTNAME "ml401" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -195,13 +178,11 @@ "echo" /* system ace */ -#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION -#endif #endif /* __CONFIG_H */ diff --git a/lib_microblaze/time.c b/lib_microblaze/time.c index 0fef834992a..3fa1b112627 100644 --- a/lib_microblaze/time.c +++ b/lib_microblaze/time.c @@ -26,17 +26,9 @@ #include -#ifdef CFG_TIMER_0 void udelay (unsigned long usec) { int i; i = get_timer (0); while ((get_timer (0) - i) < (usec / 1000)) ; } -#else -void udelay (unsigned long usec) -{ - unsigned int i; - for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++); -} -#endif -- cgit v1.3.1 From 0731cbae6c2feab93b244d83fd6a43f5cc9bf852 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:25:11 +0200 Subject: [PATCH] Change macro name for UartLite because PowerPC 405 can use UartLite as console --- drivers/serial_xuartlite.c | 2 +- include/configs/ml401.h | 1 + include/configs/suzaku.h | 1 + include/configs/xupv2p.h | 1 + 4 files changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/drivers/serial_xuartlite.c b/drivers/serial_xuartlite.c index ed59abea862..d678ab6b766 100644 --- a/drivers/serial_xuartlite.c +++ b/drivers/serial_xuartlite.c @@ -24,7 +24,7 @@ #include -#ifdef CONFIG_MICROBLAZE +#ifdef CONFIG_XILINX_UARTLITE #include diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 7eeae708a72..2cf09495773 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -32,6 +32,7 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 08ac9cbd58b..2353b63f5da 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -48,6 +48,7 @@ #define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */ #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - (1024 * 1024)) +#define CONFIG_XILINX_UARTLITE #define CONFIG_BAUDRATE 115200 #define CFG_BAUDRATE_TABLE { 115200 } diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 35001d7ada3..8ab0b49cd00 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,6 +31,7 @@ #define CONFIG_XUPV2P 1 /* uart */ +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } -- cgit v1.3.1 From cb1bc63b75a232571eb69aa2c8aa919321655845 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:30:42 +0200 Subject: [FIX] Email reparation & Copyright Both codes are written by myself without any support from CTU --- include/configs/ml401.h | 4 ++-- include/configs/xupv2p.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 2cf09495773..48291e89da0 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -1,7 +1,7 @@ /* - * (C) Copyright 2007 Czech Technical University. + * (C) Copyright 2007 Michal Simek * - * Michal SIMEK + * Michal SIMEK * * See file CREDITS for list of people who contributed to this * project. diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 8ab0b49cd00..b1c0ee666f4 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 Czech Technical University. + * (C) Copyright 2007 Michal Simek * * Michal SIMEK * -- cgit v1.3.1 From f240356507038e5ce55e8a24cb2607e9eae6d10c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:36:06 +0200 Subject: [FIX] change sets of commands because changing of command handling brings compilation problems --- include/configs/suzaku.h | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h index 2353b63f5da..020ed02304d 100644 --- a/include/configs/suzaku.h +++ b/include/configs/suzaku.h @@ -56,21 +56,16 @@ #define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000 #define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_ENV +#undef CONFIG_CMD_MEMORY +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_MISC #define CFG_UART1_BASE (0xFFFF2000) #define CONFIG_SERIAL_BASE CFG_UART1_BASE @@ -109,4 +104,7 @@ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +#define XILINX_CLOCK_FREQ 50000000 +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 853643d8cf2ca80cb2e25c53ad5dc580abafe166 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Sep 2007 00:41:30 +0200 Subject: [FIX] change command handling and removing code violation --- include/configs/ml401.h | 50 ++++++++++++++++++++++++------------------------- 1 file changed, 24 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 48291e89da0..b32043850e6 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -32,7 +32,7 @@ #define CONFIG_ML401 1 /* ML401 Board */ /* uart */ -#define CONFIG_XILINX_UARTLITE +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -59,6 +59,7 @@ #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ /* FSL */ #define CFG_FSL_2 @@ -87,7 +88,7 @@ * 0x11FB_F000 CFG_MONITOR_BASE * MONITOR_CODE 256kB Env * 0x13FF_F000 CFG_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd + * GLOBAL_DATA 4kB bd, gd * 0x1400_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE */ @@ -100,7 +101,7 @@ /* global pointer */ #define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */ /* start of global data */ -#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) +#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* monitor code */ #define SIZE 0x40000 @@ -146,6 +147,16 @@ #define CFG_FLASH_PROTECTION /* hardware flash protection */ #endif /* !FLASH */ +/* system ace */ +#ifdef XILINX_SYSACE_BASEADDR + #define CONFIG_SYSTEMACE + /* #define DEBUG_SYSTEMACE */ + #define SYSTEMACE_CONFIG_FPGA + #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR + #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH + #define CONFIG_DOS_PARTITION +#endif + /* * BOOTP options */ @@ -154,28 +165,21 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ #include #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_BDI #define CONFIG_CMD_CACHE -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_IMI #define CONFIG_CMD_IRQ -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_MISC #define CONFIG_CMD_MFSL -#define CONFIG_CMD_NET #define CONFIG_CMD_PING -#define CONFIG_CMD_RUN + +#if defined(CONFIG_SYSTEMACE) + #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_FAT +#endif #if defined(FLASH) #define CONFIG_CMD_ECHO @@ -187,6 +191,8 @@ #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVES #endif +#else + #undef CONFIG_CMD_FLASH #endif #if defined(CONFIG_CMD_JFFS2) @@ -211,24 +217,16 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" #define CONFIG_HOSTNAME "ml401" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" +#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 +#define CONFIG_SERVERIP 192.168.0.5 +#define CONFIG_GATEWAYIP 192.168.0.1 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD /* architecture dependent code */ #define CFG_USR_EXCEP /* user exception */ #define CFG_HZ 1000 -/* system ace */ -#define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -#define SYSTEMACE_CONFIG_FPGA -#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION - #define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo" #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ -- cgit v1.3.1 From 3e954beb614b5b190d7f4f4c3b641437a0132e35 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 11 Sep 2007 14:12:55 +0200 Subject: ppc4xx: lwmon5: Change GPIO 58 to default to low (watchdog test) Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index be483245b91..a9db0862f40 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -472,7 +472,7 @@ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO55 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO56 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO57 Unselect via TraceSelect Bit */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO58 Unselect via TraceSelect Bit */ \ +{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO58 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO59 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO60 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO61 Unselect via TraceSelect Bit */ \ -- cgit v1.3.1 From 87c1833a39e944db66385286fd5e28f9b3fcdd50 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 2 Oct 2007 11:44:19 +0200 Subject: ppc4xx: lwmon5: Remove watchdog for now, since not fully tested yet Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 8ec4742c0fb..00c34d5d7b9 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -339,7 +339,12 @@ #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */ #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */ +#if 0 +/* + * ToDo: Watchdog is not test fully, so exclude it for now + */ #define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */ +#endif /* * For booting Linux, the board info and command line data -- cgit v1.3.1 From 9add9884b1fddc34ca186e00a2f868ccd5d02d87 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Tue, 2 Oct 2007 19:09:01 +0200 Subject: Fix memtest breakage CFG_MEMTEST_START uses weird magic involving gd, which fails to compile. Use hardcoded values instead (we actually know how much RAM we have on board.) Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 265264efbbb..1809fc5d864 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -200,12 +200,8 @@ #define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) #define CFG_LONGHELP 1 -#define CFG_MEMTEST_START \ - ({ gd->bd->bi_dram[0].start; }) -#define CFG_MEMTEST_END \ - ({ \ - gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \ - }) +#define CFG_MEMTEST_START CFG_SDRAM_BASE +#define CFG_MEMTEST_END (CFG_MEMTEST_START + 0x700000) #define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } #endif /* __CONFIG_H */ -- cgit v1.3.1 From 2b2a587d6d3076387d22ac740f44044bf46e2cb8 Mon Sep 17 00:00:00 2001 From: Marian Balakowicz Date: Fri, 5 Oct 2007 10:40:54 +0200 Subject: tqm5200: Fix CONFIG_CMD_PCI typo in board config file. Signed-off-by: Marian Balakowicz --- include/configs/TQM5200.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index e0c9d81be08..5fd6b279e48 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -188,7 +188,7 @@ #endif #ifdef CONFIG_PCI -#define CONFIG_CMD_CMD_PCI +#define CONFIG_CMD_PCI #endif #if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300) -- cgit v1.3.1 From 8002012041f1ff9f997a5727abe5015f70cd2e46 Mon Sep 17 00:00:00 2001 From: Grzegorz Bernacki Date: Tue, 9 Oct 2007 13:58:24 +0200 Subject: [ads5121] EEPROM support added. Signed-off-by: Grzegorz Bernacki --- include/configs/ads5121.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index 22eac1b4b95..ee9cfd6768c 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -234,6 +234,14 @@ #define CFG_I2C_NOPROBES {{0,0x69}} * Don't probe these addrs */ #endif +/* + * EEPROM configuration + */ +#define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ +#define CFG_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ +#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ + /* * Ethernet configuration */ @@ -275,6 +283,7 @@ #define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO +#define CONFIG_CMD_EEPROM #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -- cgit v1.3.1 From e1893815b0999410d7a327589611c7b38e95299e Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 12 Oct 2007 15:49:39 +0200 Subject: GP3 SSA: enable RTC Signed-off-by: Wolfgang Denk --- include/configs/stxssa.h | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index b41dafaf986..c6e79532096 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -189,20 +189,21 @@ #define CFG_PROMPT_HUSH_PS2 "> " #endif -/* I2C */ +/* + * I2C + */ #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ #define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F -#if 0 -#define CFG_I2C_NOPROBES {0x00} /* Don't probe these addrs */ -#else -/* I did the 'if 0' so we could keep the syntax above if ever needed. */ #undef CFG_I2C_NOPROBES -#endif #define CFG_I2C_OFFSET 0x3000 +/* I2C RTC */ +#define CONFIG_RTC_DS1337 /* This is really a DS1339 RTC */ +#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ + /* I2C EEPROM. AT24C32, we keep our environment in here. */ #define CFG_I2C_EEPROM_ADDR 0x51 /* 1010001x */ @@ -341,8 +342,13 @@ */ #include -#define CONFIG_CMD_PING +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI -- cgit v1.3.1 From de74b9eeacccaf0a42e5ecc9ae79a88f7a311296 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 13 Oct 2007 21:15:39 +0200 Subject: Coding Style cleanup. Signed-off-by: Wolfgang Denk --- CHANGELOG | 175 ++++++++++++++++++++++++++++++++++++++++++++++ drivers/at45.c | 18 ++--- include/configs/ads5121.h | 2 +- include/status_led.h | 4 +- lib_arm/board.c | 17 ++--- 5 files changed, 194 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/CHANGELOG b/CHANGELOG index 82b3145357d..66fa2e1e0e9 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,98 @@ +commit e1893815b0999410d7a327589611c7b38e95299e +Author: Wolfgang Denk +Date: Fri Oct 12 15:49:39 2007 +0200 + + GP3 SSA: enable RTC + + Signed-off-by: Wolfgang Denk + +commit 8002012041f1ff9f997a5727abe5015f70cd2e46 +Author: Grzegorz Bernacki +Date: Tue Oct 9 13:58:24 2007 +0200 + + [ads5121] EEPROM support added. + + Signed-off-by: Grzegorz Bernacki + +commit 2b2a587d6d3076387d22ac740f44044bf46e2cb8 +Author: Marian Balakowicz +Date: Fri Oct 5 10:40:54 2007 +0200 + + tqm5200: Fix CONFIG_CMD_PCI typo in board config file. + + Signed-off-by: Marian Balakowicz + +commit 92869195ef8210758d2176230c0a36897afd50ed +Author: Bartlomiej Sieka +Date: Fri Oct 5 09:46:06 2007 +0200 + + CM5200: Fix missing null-termination in hostname manipulation code + + Signed-off-by: Bartlomiej Sieka + +commit 738815c0cc44aa329097f868dc1efc49ede9c5ba +Author: Stefan Roese +Date: Tue Oct 2 11:44:46 2007 +0200 + + ppc4xx: Coding style cleanup + + Signed-off-by: Stefan Roese + +commit 87c1833a39e944db66385286fd5e28f9b3fcdd50 +Author: Stefan Roese +Date: Tue Oct 2 11:44:19 2007 +0200 + + ppc4xx: lwmon5: Remove watchdog for now, since not fully tested yet + + Signed-off-by: Stefan Roese + +commit 2db64784061bfc34f4ba70ef1d2fbe7133b55670 +Author: Grzegorz Bernacki +Date: Mon Oct 1 09:51:50 2007 +0200 + + Program EPLD to force full duplex mode for PHY. + + EPLD forces modes of PHY operation. By default full duplex is turned off. + This fix turns it on. + + Signed-off-by: Grzegorz Bernacki + +commit 86ec86c04326c3913178a7679aa910de071da75d +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Thu Sep 27 23:27:47 2007 +0200 + + Fix missing DECLARE_GLOBAL_DATA_PTR on CONFIG_LPC2292 in serial + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 3e954beb614b5b190d7f4f4c3b641437a0132e35 +Author: Stefan Roese +Date: Tue Sep 11 14:12:55 2007 +0200 + + ppc4xx: lwmon5: Change GPIO 58 to default to low (watchdog test) + + Signed-off-by: Stefan Roese + +commit 0d38effc6e359e6b1b0c78d66e8bc1a4dc15a2ae +Author: Grant Likely +Date: Tue Sep 25 15:48:05 2007 -0600 + + Fpga: fix incorrect test of CFG_FPGA_XILINX macro + + CFG_FPGA_XILINX is a bit value used to test against the value in + CONFIG_FPGA. Testing for a value will always return TRUE. I don't + think that is the intention in this code. + + Signed-off-by: Grant Likely + +commit 66dcad3a9a53e0766d90e0084123bd8529522fb0 +Author: Wolfgang Denk +Date: Thu Sep 20 00:04:14 2007 +0200 + + v1.3.0-rc2 + + Signed-off-by: Wolfgang Denk + commit 135e19bc2773ebca487e9a8371f67e1ba202313a Author: Wolfgang Denk Date: Tue Sep 18 21:36:35 2007 +0200 @@ -38,6 +133,21 @@ Date: Tue Sep 18 17:40:27 2007 +0200 Signed-off-by: Wolfgang Denk +commit bd86220f58b99d6896198c385fda132f0c980915 +Author: Peter Pearse +Date: Tue Sep 18 13:07:54 2007 +0100 + + Move coloured led API to status_led.h + Improve indentation in drivers/at45.c + +commit 97213f32416ead885deafea86774e912ffd60ad0 +Author: David Saada +Date: Mon Sep 17 17:04:47 2007 +0200 + + Description: Add NEC's PCI OHCI module ID to the USB OHCI driver + + Signed-off-by: David Saada + commit 67c31036acaaaa992fc346cc89db0909a7e733c4 Author: Wolfgang Denk Date: Sun Sep 16 17:10:04 2007 +0200 @@ -193,6 +303,18 @@ Date: Thu Sep 13 18:21:48 2007 +0200 Signed-off-by: Marian Balakowicz +commit e1f601b572db5de9aa81a0b77c68a86994fe24c4 +Author: Bartlomiej Sieka +Date: Thu Sep 13 16:33:59 2007 +0200 + + tqm5200: Restore customary env. variable boot commands for powerpc kernels + + - update default definitions of kernel_addr and fdt_addr env. variables + - make arch/powerpc booting the default scenario + - update MTD partition layout to match the above + + Signed-off-by: Bartlomiej Sieka + commit f34024d4a328e6edd906456da98d2c537155c4f7 Author: Wolfgang Denk Date: Wed Sep 12 00:48:57 2007 +0200 @@ -201,6 +323,12 @@ Date: Wed Sep 12 00:48:57 2007 +0200 Signed-off-by: Wolfgang Denk +commit d94c79e47011af5e8dd10ed6163c09b4cfc743cc +Author: Peter Pearse +Date: Tue Sep 11 15:35:01 2007 +0100 + + Final tidy + commit 38ad82da0c1180ecdeb212a8f4245e945bcc546e Author: Grzegorz Bernacki Date: Tue Sep 11 15:42:11 2007 +0200 @@ -507,6 +635,14 @@ Date: Thu Sep 6 09:46:17 2007 -0600 Signed-off-by: Grant Likely +commit 80767a6cead9990d9e77e62be947843c2c72f469 +Author: Peter Pearse +Date: Wed Sep 5 16:04:41 2007 +0100 + + Changed API name to coloured_led.h + Removed code using deprecated ifdef CONFIG_BOOTBINFUNC + Tidied other cpu/arm920t/start.S code + commit 56a9270521baaa00e12639a978302a67f61ef060 Author: Kumar Gala Date: Thu Aug 30 16:18:18 2007 -0500 @@ -532,6 +668,31 @@ Date: Thu Aug 30 01:58:48 2007 -0500 Signed-off-by: Ed Swarthout +commit 9f5c3d3720e777a572dcdc8af2008b44c7243885 +Author: Peter Pearse +Date: Tue Sep 4 16:18:38 2007 +0100 + + Add coloured led interface for ARM boards. + Use it in cpu/arm920t/start.S to indicate U-Boot code has been entered. + +commit 7462fe0d5a9d40cde083fb1a3cd73911996b5ecb +Author: Peter Pearse +Date: Tue Sep 4 14:49:28 2007 +0100 + + Move include/led.h to board/at91rm9200dk + +commit 6e4bf9b24e57c15abc6542e685d06380bc64af27 +Author: Peter Pearse +Date: Tue Sep 4 14:25:51 2007 +0100 + + Ran Lindent on drivers/at45.c + +commit 557ab89d294f08dd532f21d19861b40093200a33 +Author: Peter Pearse +Date: Tue Sep 4 14:23:50 2007 +0100 + + Rename CONFIG_CMD_MUX to CONFIG_CMD_AT91_SPIMUX + commit 81b73dec16fd1227369a191e725e10044a9d56b8 Author: Gary Jennejohn Date: Fri Aug 31 15:21:46 2007 +0200 @@ -607,6 +768,20 @@ Date: Wed Aug 29 18:26:24 2007 -0600 Signed-off-by: Grant Likely +commit 04625764cc93ce8a61625ac19d7fe2a2ceee8143 +Author: Stefan Roese +Date: Wed Aug 29 16:31:18 2007 +0200 + + ppc4xx: Change lwmon5 default environment to support Linux RTC + + The Linux PCF8563 RTC driver doesn't do autoprobing, so we need + to supply the RTC I2C address as bootline parameter. This patch + adds support for this rtc probing parameter to the bootargs: + + "rtc-pcf8563.probe=0,0x51" + + Signed-off-by: Stefan Roese + commit 2602a5c40ae37ab965a4e240854fdaffb51328a4 Author: Kim Phillips Date: Wed Aug 29 09:06:05 2007 -0500 diff --git a/drivers/at45.c b/drivers/at45.c index a075ebd5d74..dac987a43a5 100644 --- a/drivers/at45.c +++ b/drivers/at45.c @@ -48,7 +48,7 @@ AT91S_DataFlashStatus AT91F_DataFlashSendCommand(AT91PS_DataFlash pDataFlash, /* process the address to obtain page address and byte address */ adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << - pDataFlash->pDevice->page_offset) + + pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size)); /* fill the command buffer */ @@ -217,9 +217,10 @@ AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert( { int cmdsize; /* Test if the buffer command is legal */ - if ((BufferCommand != DB_PAGE_2_BUF1_TRF)&& - (BufferCommand != DB_PAGE_2_BUF2_TRF)) + if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && + (BufferCommand != DB_PAGE_2_BUF2_TRF)) { return DATAFLASH_BAD_COMMAND; + } /* no data to transmit or receive */ pDataFlash->pDataFlashDesc->tx_data_size = 0; @@ -250,9 +251,10 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer( { int cmdsize; /* Test if the buffer command is legal */ - if ((BufferCommand != DB_BUF1_WRITE) && - (BufferCommand != DB_BUF2_WRITE)) + if ((BufferCommand != DB_BUF1_WRITE) && + (BufferCommand != DB_BUF2_WRITE)) { return DATAFLASH_BAD_COMMAND; + } /* buffer address must be lower than page size */ if (bufferAddress > pDataFlash->pDevice->pages_size) @@ -319,7 +321,7 @@ AT91S_DataFlashStatus AT91F_PageErase( cmdsize = 4; if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; - return (AT91F_DataFlashSendCommand(pDataFlash, + return (AT91F_DataFlashSendCommand(pDataFlash, DB_PAGE_ERASE, cmdsize, page * pDataFlash->pDevice->pages_size)); } @@ -375,7 +377,7 @@ AT91S_DataFlashStatus AT91F_WriteBufferToMain(AT91PS_DataFlash pDataFlash, if (pDataFlash->pDevice->pages_number >= 16384) cmdsize = 5; /* Send the command to the dataflash */ - return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, + return (AT91F_DataFlashSendCommand(pDataFlash, BufferCommand, cmdsize, dest)); } @@ -445,7 +447,7 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash, /* If destination does not fit a page start address */ if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0) { - length = + length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size))); diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index ee9cfd6768c..bb1efdf6dea 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -239,7 +239,7 @@ */ #define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */ #define CFG_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */ -#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */ /* diff --git a/include/status_led.h b/include/status_led.h index 74e2147cf92..d12bb67c2c8 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -383,9 +383,9 @@ extern void __led_set (led_id_t mask, int state); # include #endif -/* +/* * Coloured LEDs API - */ + */ #ifndef __ASSEMBLY__ extern void coloured_LED_init (void); extern void red_LED_on(void); diff --git a/lib_arm/board.c b/lib_arm/board.c index 87848d94c04..af0233a6201 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -117,23 +117,19 @@ void *sbrk (ptrdiff_t increment) * May be supplied by boards if desired */ void inline __coloured_LED_init (void) {} -void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); +void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); void inline __red_LED_on (void) {} void inline red_LED_on (void) __attribute__((weak, alias("__red_LED_on"))); void inline __red_LED_off(void) {} -void inline red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); +void inline red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); void inline __green_LED_on(void) {} -void inline green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); +void inline green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); void inline __green_LED_off(void) {} -void inline green_LED_off(void)__attribute__((weak, alias("__green_LED_off"))); +void inline green_LED_off(void)__attribute__((weak, alias("__green_LED_off"))); void inline __yellow_LED_on(void) {} -void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); +void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); void inline __yellow_LED_off(void) {} -void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); - - - - +void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); /************************************************************************ * Init Utilities * @@ -209,7 +205,6 @@ static void display_flash_config (ulong size) } #endif /* CFG_NO_FLASH */ - /* * Breathe some life into the board... * -- cgit v1.3.1 From f8bf90461d9bad2e6fed31fcebaf235f60dd6763 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Sun, 14 Oct 2007 16:12:29 +0200 Subject: [FIX] XUPV2P change command handling and remove code violation --- include/configs/xupv2p.h | 36 +++++++++++++++++------------------- 1 file changed, 17 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index b1c0ee666f4..c9320c287c2 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -31,7 +31,7 @@ #define CONFIG_XUPV2P 1 /* uart */ -#define CONFIG_XILINX_UARTLITE +#define CONFIG_XILINX_UARTLITE #define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR #define CONFIG_BAUDRATE XILINX_UART_BAUDRATE #define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE } @@ -49,11 +49,13 @@ * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze * jump to CFG_RESET_ADDRESS where is the original U-BOOT code. */ -#define CFG_RESET_ADDRESS 0x36000000 +/* #define CFG_RESET_ADDRESS 0x36000000 */ /* gpio */ +#ifdef XILINX_GPIO_BASEADDR #define CFG_GPIO_0 1 #define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR +#endif /* interrupt controller */ #define CFG_INTC_0 1 @@ -66,6 +68,7 @@ #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ /* * memory layout - Example @@ -120,7 +123,6 @@ #define CFG_ENV_SIZE 0x1000 #define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE) - /* * BOOTP options */ @@ -129,29 +131,23 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME - /* * Command line configuration. */ #include -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_BDI -#define CONFIG_CMD_NET -#define CONFIG_CMD_IMI -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_RUN -#define CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_IMLS + #define CONFIG_CMD_ASKENV -#define CONFIG_CMD_LOADS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_MISC -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_IRQ #define CONFIG_CMD_PING +#ifdef XILINX_SYSACE_BASEADDR +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#endif /* Miscellaneous configurable options */ #define CFG_PROMPT "U-Boot-mONStR> " @@ -163,7 +159,7 @@ #define CONFIG_BOOTDELAY 30 #define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "ml401" +#define CONFIG_HOSTNAME "xupv2p" #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" #define CONFIG_IPADDR 192.168.0.3 #define CONFIG_SERVERIP 192.168.0.5 @@ -179,11 +175,13 @@ "echo" /* system ace */ +#ifdef XILINX_SYSACE_BASEADDR #define CONFIG_SYSTEMACE /* #define DEBUG_SYSTEMACE */ #define SYSTEMACE_CONFIG_FPGA #define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR #define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH #define CONFIG_DOS_PARTITION +#endif #endif /* __CONFIG_H */ -- cgit v1.3.1 From 9ef57bbee1c67cc01da2026c242c4692db32be36 Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Wed, 26 Sep 2007 17:55:55 +0200 Subject: TQM866M: adjust for doubled flash sector size. Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause --- include/configs/TQM866M.h | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 0d778919a2b..76facc42958 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -81,9 +81,14 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM866M/uImage\0" \ - "fdt_addr=40080000\0" \ - "kernel_addr=400A0000\0" \ + "fdt_addr=400C0000\0" \ + "kernel_addr=40100000\0" \ "ramdisk_addr=40280000\0" \ + "load=tftp 200000 ${u-boot}\0" \ + "update=protect off 40000000 +${filesize};" \ + "erase 40000000 +${filesize};" \ + "cp.b 200000 40000000 ${filesize};" \ + "protect on 40000000 +${filesize}\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -215,7 +220,7 @@ #define CFG_FLASH_BASE 0x40000000 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CFG_MONITOR_BASE CFG_FLASH_BASE -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ /* * For booting Linux, the board info and command line data @@ -236,7 +241,7 @@ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */ -#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) -- cgit v1.3.1 From d43e489baf02afae49077791fb22332d240d8656 Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Thu, 27 Sep 2007 14:54:36 +0200 Subject: TQM866M: fix SDRAM refresh At 133 MHz the current SDRAM refresh rate is too fast (measured 4 * 1.17 us). CFG_MAMR_PTA changes from 39 to 97. This result in a refresh rate of 4 * 7.8 us at the default clock 50 MHz. At 133 MHz the value will be then 4 * 2.9 us. This is a compromise until a new method is found to adjust the refresh rate. Signed-off-by: Martin Krause --- include/configs/TQM866M.h | 36 ++++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h index 76facc42958..ca3c166524f 100644 --- a/include/configs/TQM866M.h +++ b/include/configs/TQM866M.h @@ -426,26 +426,30 @@ #define CFG_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64)) /* - * Memory Periodic Timer Prescaler - * Periodic timer for refresh, start with refresh rate for 40 MHz clock - * (CFG_8xx_CPUCLK_MIN / CFG_PTA_PER_CLK) + * Periodic timer (MAMR[PTx]) for 4 * 7.8 us refresh (= 31.2 us per quad) + * + * CPUclock(MHz) * 31.2 + * CFG_MAMR_PTA = ----------------------------------- with DFBRG = 0 + * 2^(2*SCCR[DFBRG]) * MPTPR_PTP_DIV16 + * + * CPU clock = 15 MHz: CFG_MAMR_PTA = 29 -> 4 * 7.73 us + * CPU clock = 50 MHz: CFG_MAMR_PTA = 97 -> 4 * 7.76 us + * CPU clock = 66 MHz: CFG_MAMR_PTA = 128 -> 4 * 7.75 us + * CPU clock = 133 MHz: CFG_MAMR_PTA = 255 -> 4 * 7.67 us + * + * Value 97 is for 4 * 7.8 us at 50 MHz. So the refresh cycle requirement will + * be met also in the default configuration, i.e. if environment variable + * 'cpuclk' is not set. */ -#define CFG_MAMR_PTA 39 +#define CFG_MAMR_PTA 97 /* - * For 16 MBit, refresh rates could be 31.3 us - * (= 64 ms / 2K = 125 / quad bursts). - * For a simpler initialization, 15.6 us is used instead. - * - * #define CFG_MPTPR_2BK_2K MPTPR_PTP_DIV32 for 2 banks - * #define CFG_MPTPR_1BK_2K MPTPR_PTP_DIV64 for 1 bank + * Memory Periodic Timer Prescaler Register (MPTPR) values. */ -#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 /* setting for 2 banks */ -#define CFG_MPTPR_1BK_4K MPTPR_PTP_DIV32 /* setting for 1 bank */ - -/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit */ -#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* setting for 2 banks */ -#define CFG_MPTPR_1BK_8K MPTPR_PTP_DIV16 /* setting for 1 bank */ +/* 4 * 7.8 us refresh (= 31.2 us per quad) at 50 MHz and PTA = 97 */ +#define CFG_MPTPR_2BK_4K MPTPR_PTP_DIV16 +/* 4 * 3.9 us refresh (= 15.6 us per quad) at 50 MHz and PTA = 97 */ +#define CFG_MPTPR_2BK_8K MPTPR_PTP_DIV8 /* * MAMR settings for SDRAM -- cgit v1.3.1 From da3aad55cbde80ab6e301aafa82a2c411aa53eff Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Wed, 26 Sep 2007 17:55:56 +0200 Subject: TQM860M: adjust for doubled flash sector size. Adjust flash map to support the new S29GLxxN (N-Type) Flashes with doubled sector size. Signed-off-by: Martin Krause --- include/configs/TQM860M.h | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h index 684b86f2efe..fe3a2f020c0 100644 --- a/include/configs/TQM860M.h +++ b/include/configs/TQM860M.h @@ -69,9 +69,14 @@ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \ "rootpath=/opt/eldk/ppc_8xx\0" \ "bootfile=/tftpboot/TQM860M/uImage\0" \ - "fdt_addr=40080000\0" \ - "kernel_addr=400A0000\0" \ + "fdt_addr=400C0000\0" \ + "kernel_addr=40100000\0" \ "ramdisk_addr=40280000\0" \ + "load=tftp 200000 ${u-boot}\0" \ + "update=protect off 40000000 +${filesize};" \ + "erase 40000000 +${filesize};" \ + "cp.b 200000 40000000 ${filesize};" \ + "protect on 40000000 +${filesize}\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" @@ -172,7 +177,7 @@ #define CFG_FLASH_BASE 0x40000000 #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CFG_MONITOR_BASE CFG_FLASH_BASE -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ /* * For booting Linux, the board info and command line data @@ -193,7 +198,7 @@ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_OFFSET 0x40000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */ -#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE) -- cgit v1.3.1 From 5a5958b7de70ae99f0e7cbd5c97ec1346e051587 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 15 Oct 2007 11:29:33 +0200 Subject: ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & Yosemite The BCSR status bit for the 66MHz PCI operation was correctly addressed (MSB/LSB problem). Now the correct currently setup PCI frequency is displayed upon bootup. This patch also fixes this problem on Rainier & Yellowstone, since these boards use the same souce code as Sequoia & Yosemite do. Signed-off-by: Stefan Roese --- board/amcc/sequoia/sequoia.c | 7 ++++--- board/amcc/yosemite/yosemite.c | 7 +++++-- include/configs/sequoia.h | 2 ++ include/configs/yosemite.h | 2 ++ 4 files changed, 13 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index f823117687e..4e47ab395b4 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2006 + * (C) Copyright 2006-2007 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * (C) Copyright 2006 @@ -24,6 +24,7 @@ #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -362,8 +363,8 @@ int checkboard(void) printf("Board: Rainier - AMCC PPC440GRx Evaluation Board"); #endif - rev = in8(CFG_BCSR_BASE + 0); - val = in8(CFG_BCSR_BASE + 5) & 0x01; + rev = in_8((void *)(CFG_BCSR_BASE + 0)); + val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN; printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); if (s != NULL) { diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 912f09ee439..6ec922ab007 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -1,4 +1,6 @@ /* + * (C) Copyright 2006-2007 + * Stefan Roese, DENX Software Engineering, sr@denx.de. * * See file CREDITS for list of people who contributed to this * project. @@ -22,6 +24,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -181,8 +184,8 @@ int checkboard(void) printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board"); #endif - rev = *(u8 *)(CFG_CPLD + 0); - val = *(u8 *)(CFG_CPLD + 5) & 0x01; + rev = in_8((void *)(CFG_BCSR_BASE + 0)); + val = in_8((void *)(CFG_BCSR_BASE + 5)) & CFG_BCSR5_PCI66EN; printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); if (s != NULL) { diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index c2e1386217f..600f98cf0d4 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -450,6 +450,8 @@ #define CFG_EBC_PB2AP 0x24814580 #define CFG_EBC_PB2CR (CFG_BCSR_BASE | 0x38000) +#define CFG_BCSR5_PCI66EN 0x80 + /*----------------------------------------------------------------------- * NAND FLASH *----------------------------------------------------------------------*/ diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h index 6a5b7f1eaac..35bce4af904 100644 --- a/include/configs/yosemite.h +++ b/include/configs/yosemite.h @@ -359,6 +359,8 @@ #define CFG_EBC_PB2AP 0x04814500 #define CFG_EBC_PB2CR (CFG_CPLD | 0x18000) +#define CFG_BCSR5_PCI66EN 0x80 + /*----------------------------------------------------------------------- * Cache Configuration */ -- cgit v1.3.1 From 7ee6ba1a056e4061ab4cfde30127e332e7957afd Mon Sep 17 00:00:00 2001 From: "runet@innovsys.com" Date: Tue, 16 Oct 2007 14:50:40 -0500 Subject: Make MPC8266ADS board compile again. Signed-off-by: Runet Torgersen --- include/configs/MPC8266ADS.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index 14b041e3aec..d392b981edd 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -168,6 +168,7 @@ #undef CONFIG_CMD_MFSL #undef CONFIG_CMD_MMC #undef CONFIG_CMD_NAND +#undef CONFIG_CMD_ONENAND #undef CONFIG_CMD_PCMCIA #undef CONFIG_CMD_REISER #undef CONFIG_CMD_SCSI @@ -177,6 +178,7 @@ #undef CONFIG_CMD_UNIVERSE #undef CONFIG_CMD_USB #undef CONFIG_CMD_XIMG +#undef CONFIG_CMD_AT91_SPIMUX /* Define a command string that is automatically executed when no character * is read on the console interface withing "Boot Delay" after reset. -- cgit v1.3.1 From a3063eec775719b7e91023bbec3f64b3118791df Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 11 Oct 2007 00:18:48 -0500 Subject: Set OF_STDOUT_PATH to match the default console on MPC8568 MDS On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured console. Make it so we match that config what we tell Linux as the early STDOUT console. Signed-off-by: Kumar Gala --- include/configs/MPC8568MDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ba744e99f8d..548e1582a8f 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -297,7 +297,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8568@e0000000" #define OF_QE "qe@e0080000" #define OF_TBCLK (bd->bi_busfreq / 8) -#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4600" +#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4500" /* * I2C -- cgit v1.3.1 From 7600d47b8f6a10019e537dc9a62aa1498df58d25 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 11 Oct 2007 00:29:18 -0500 Subject: Improve handling of PCI interrupt device tree fixup on MPC85xx CDS On the MPC85xx CDS we have two issues: 1. The device tree fixup code did not check to see if the property we are trying to update is actually found. Its possible that it would update random memory starting at 0. 2. Newer Linux kernel's have moved the location of the PCI nodes to be sibilings of the soc node and not children. The explicit PATH to the PCI node would not be found for these device trees. Add the ability to handle both paths. In the future we shouldn't handle such fixups by explicit path. Signed-off-by: Kumar Gala --- board/cds/common/ft_board.c | 23 +++++++++++++++-------- include/configs/MPC8541CDS.h | 1 + include/configs/MPC8548CDS.h | 1 + include/configs/MPC8555CDS.h | 1 + 4 files changed, 18 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c index 9d97905ca9b..3eda1009efd 100644 --- a/board/cds/common/ft_board.c +++ b/board/cds/common/ft_board.c @@ -37,17 +37,24 @@ static void cds_pci_fixup(void *blob) map = ft_get_prop(blob, "/" OF_SOC "/pci@8000/interrupt-map", &len); - len /= sizeof(u32); + if (!map) + map = ft_get_prop(blob, "/" OF_PCI "/interrupt-map", &len); - slot = get_pci_slot(); + if (map) { + len /= sizeof(u32); - for (i=0;ibi_busfreq / 8) #define OF_STDOUT_PATH "/soc8541@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 60837151893..4edc7fd2b6a 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -340,6 +340,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8548@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 1d1b7c90795..c414bf033e4 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8555@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8555@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C -- cgit v1.3.1 From de9a738faa7c2f47286119c3bfebc3dfbfe7d86d Mon Sep 17 00:00:00 2001 From: Vlad Lungu Date: Sun, 21 Oct 2007 22:10:10 +0900 Subject: [MIPS] Fix UNCACHED_SDRAM PHYSADDR is for physical address, KSEG1ADDR is for uncached. Signed-off-by: Vlad Lungu Signed-off-by: Shinya Kuribayashi --- include/asm-mips/addrspace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index b8214b1c859..0e6abd7d0fa 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -49,7 +49,7 @@ cannot access physical memory directly from core */ #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) #else /* !CONFIG_AU1X00 */ -#define UNCACHED_SDRAM(a) PHYSADDR(a) +#define UNCACHED_SDRAM(a) KSEG1ADDR(a) #endif /* CONFIG_AU1X00 */ #endif /* __ASSEMBLY__ */ /* -- cgit v1.3.1 From 20d500d531a6b971ce6cc1bf191cb0092cdc0afc Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 23 Oct 2007 10:17:42 +0200 Subject: ppc4xx: lwmon5: Some further GPIO config changes Signed-off-by: Stefan Roese --- include/configs/lwmon5.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 00c34d5d7b9..52deab43f15 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -432,7 +432,7 @@ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO12 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO13 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO14 */ \ -{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO15 */ \ +{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO15 */ \ {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO16 GMCTxD(4) */ \ {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO17 GMCTxD(5) */ \ {GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO18 GMCTxD(6) */ \ @@ -473,7 +473,7 @@ {GPIO1_BASE, GPIO_IN, GPIO_SEL , GPIO_OUT_0}, /* GPIO50 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52 Unselect via TraceSelect Bit */ \ -{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO53 Unselect via TraceSelect Bit */ \ +{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO53 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO54 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO55 Unselect via TraceSelect Bit */ \ {GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO56 Unselect via TraceSelect Bit */ \ -- cgit v1.3.1 From d3afa1ee19345a31fd1eaad3e98b97d13ca47315 Mon Sep 17 00:00:00 2001 From: Bartlomiej Sieka Date: Tue, 23 Oct 2007 13:14:10 +0200 Subject: Motion-PRO: Update configuration to accomodate next generation board. New board has faster oscillator and a different Flash chip. This affects: - CFG_MPC5XXX_CLKIN - SDRAM timings - Flash CS configuration (timings) - Flash sector size, and thus MTD partition layout - malloc() arena size (due to bigger Flash sectors) - smaller memory test range (due to bigger malloc() arena) This patch also enables more extensive memory testing via "mtest". Signed-off-by: Bartlomiej Sieka --- include/configs/motionpro.h | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h index 9a216321628..1503598166c 100644 --- a/include/configs/motionpro.h +++ b/include/configs/motionpro.h @@ -163,9 +163,9 @@ /* - * Clock configuration: SYS_XTALIN = 25MHz + * Clock configuration: SYS_XTALIN = 33MHz */ -#define CFG_MPC5XXX_CLKIN 25000000 +#define CFG_MPC5XXX_CLKIN 33000000 /* @@ -211,7 +211,7 @@ #endif #define CFG_MONITOR_LEN (256 << 10) /* 256 kB for Monitor */ -#define CFG_MALLOC_LEN (128 << 10) /* 128 kB for malloc() */ +#define CFG_MALLOC_LEN (1024 << 10) /* 1 MiB for malloc() */ #define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */ @@ -221,7 +221,7 @@ /* Boot Chipselect */ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#define CFG_BOOTCS_CFG 0x03035D00 +#define CFG_BOOTCS_CFG 0x00045D00 /* Flash memory addressing */ #define CFG_CS0_START CFG_FLASH_BASE @@ -251,11 +251,11 @@ /* * SDRAM configuration */ -/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 2, 32 bit data bus */ -#define SDRAM_CONFIG1 0x52222600 -#define SDRAM_CONFIG2 0x88b70000 -#define SDRAM_CONTROL 0x50570000 -#define SDRAM_MODE 0x008d0000 +/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */ +#define SDRAM_CONFIG1 0x62322900 +#define SDRAM_CONFIG2 0x88c70000 +#define SDRAM_CONTROL 0x504f0000 +#define SDRAM_MODE 0x00cd0000 /* @@ -267,7 +267,7 @@ #define CFG_FLASH_SIZE 0x01000000 #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } -#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ #define CONFIG_FLASH_16BIT /* Flash is 16-bit */ /* @@ -277,8 +277,8 @@ #define MTDIDS_DEFAULT "nor0=motionpro-0" #define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \ "13m(fs),2m(kernel),256k(uboot)," \ - "64k(env),64k(redund_env),64k(dtb)," \ - "-(user_data)" + "128k(env),128k(redund_env)," \ + "128k(dtb),-(user_data)" /* * IDE/ATA configuration @@ -356,7 +356,7 @@ extern void __led_set(led_id_t id, int state); /* This has to be a multiple of the Flash sector size */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_ENV_SIZE 0x1000 -#define CFG_ENV_SECT_SIZE 0x10000 +#define CFG_ENV_SECT_SIZE 0x20000 /* Configuration of redundant environment */ #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) @@ -394,7 +394,8 @@ extern void __led_set(led_id_t id, int state); #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ -#define CFG_MEMTEST_END 0x03f00000 /* 1 ... 64 MiB in DRAM */ +#define CFG_MEMTEST_END 0x03e00000 /* 1 ... 62 MiB in DRAM */ +#define CFG_ALT_MEMTEST #define CFG_LOAD_ADDR 0x200000 /* default kernel load addr */ -- cgit v1.3.1 From 298cd4cafe81ff8a6c87be8fbc440a20720d3ed6 Mon Sep 17 00:00:00 2001 From: Rune Torgersen Date: Wed, 17 Oct 2007 11:56:31 -0500 Subject: Make MPC8266ADS command selection more robust Fix MPC8266 command line definition so it won't break when new commands are added to u-boot. Signed-off-by Rune Torgersen --- include/configs/MPC8266ADS.h | 53 +++++++++++++++++--------------------------- 1 file changed, 20 insertions(+), 33 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index d392b981edd..3659002d5e8 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -146,39 +146,26 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_ONENAND -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_VFD -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_XIMG -#undef CONFIG_CMD_AT91_SPIMUX +#include + +/* Commands we want, that are not part of default set */ +#define CONFIG_CMD_ASKENV /* ask for env variable */ +#define CONFIG_CMD_CACHE /* icache, dcache */ +#define CONFIG_CMD_DHCP /* DHCP Support */ +#define CONFIG_CMD_DIAG /* Diagnostics */ +#define CONFIG_CMD_IMMAP /* IMMR dump support */ +#define CONFIG_CMD_IRQ /* irqinfo */ +#define CONFIG_CMD_MII /* MII support */ +#define CONFIG_CMD_PCI /* pciinfo */ +#define CONFIG_CMD_PING /* ping support */ +#define CONFIG_CMD_PORTIO /* Port I/O */ +#define CONFIG_CMD_REGINFO /* Register dump */ +#define CONFIG_CMD_SAVES /* save S record dump */ +#define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */ + +/* Commands from default set we don't need */ +#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ +#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ /* Define a command string that is automatically executed when no character * is read on the console interface withing "Boot Delay" after reset. -- cgit v1.3.1 From 2a4741d9a14ec475f50e9856d2c0a67e8b4271bd Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Fri, 19 Oct 2007 00:25:33 +0200 Subject: fix pxa255_idp board The pxa255_idp being an old unmaintained board showed several issues: 1. CONFIG_INIT_CRITICAL was still defined. 2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined. 3. Symbol flash_addr was undeclared. 4. The boards lowlevel_init function was still called memsetup. 5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000. 6. Using -march=armv5 instead of -march=armv5te resulted in lots of 'target CPU does not support interworking' warnings on recent compilers. 7. The PXA's serial driver redefined FFUART, BTUART and STUART used as indexes rather than the register definitions from the pxa-regs header file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to avoid any ambiguities. 8. There were several redefinition warnings concerning ICMR, OSMR3, OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file. 9. The board configuration file was rather outdated. 10. The part header file defined the vendor, product and revision arrays as unsigned chars instead of just chars in the block_dev_desc_t structure. Signed-off-by: Marcel Ziswiler --- board/pxa255_idp/Makefile | 2 +- board/pxa255_idp/config.mk | 2 +- board/pxa255_idp/lowlevel_init.S | 496 +++++++++++++++++++++++++++++++++++++++ board/pxa255_idp/memsetup.S | 496 --------------------------------------- board/pxa255_idp/u-boot.lds | 1 + cpu/pxa/config.mk | 3 +- cpu/pxa/serial.c | 72 +++--- cpu/pxa/start.S | 6 +- include/configs/pxa255_idp.h | 13 +- include/part.h | 6 +- 10 files changed, 551 insertions(+), 546 deletions(-) create mode 100644 board/pxa255_idp/lowlevel_init.S delete mode 100644 board/pxa255_idp/memsetup.S (limited to 'include') diff --git a/board/pxa255_idp/Makefile b/board/pxa255_idp/Makefile index a957dd39615..32399f0e940 100644 --- a/board/pxa255_idp/Makefile +++ b/board/pxa255_idp/Makefile @@ -27,7 +27,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a COBJS := pxa_idp.o -SOBJS := memsetup.o +SOBJS := lowlevel_init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/pxa255_idp/config.mk b/board/pxa255_idp/config.mk index d2a2040e689..55c8b270a11 100644 --- a/board/pxa255_idp/config.mk +++ b/board/pxa255_idp/config.mk @@ -1,3 +1,3 @@ #TEXT_BASE = 0xa1700000 -TEXT_BASE = 0xa3000000 +TEXT_BASE = 0xa3080000 #TEXT_BASE = 0 diff --git a/board/pxa255_idp/lowlevel_init.S b/board/pxa255_idp/lowlevel_init.S new file mode 100644 index 00000000000..aaa4d8eb93b --- /dev/null +++ b/board/pxa255_idp/lowlevel_init.S @@ -0,0 +1,496 @@ +/* + * Most of this taken from Redboot hal_platform_setup.h with cleanup + * + * NOTE: I haven't clean this up considerably, just enough to get it + * running. See hal_platform_setup.h for the source. See + * board/cradle/lowlevel_init.S for another PXA250 setup that is + * much cleaner. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +DRAM_SIZE: .long CFG_DRAM_SIZE + +/* wait for coprocessor write complete */ + .macro CPWAIT reg + mrc p15,0,\reg,c2,c0,0 + mov \reg,\reg + sub pc,pc,#4 + .endm + +/* + * Memory setup + */ +.globl lowlevel_init +lowlevel_init: + + mov r10, lr + +#ifdef DEBUG_BLINK_ENABLE + /* 3rd blink */ + bl blink +#endif + + /* Set up GPIO pins first ----------------------------------------- */ + ldr r0, =GPSR0 + ldr r1, =CFG_GPSR0_VAL + str r1, [r0] + + ldr r0, =GPSR1 + ldr r1, =CFG_GPSR1_VAL + str r1, [r0] + + ldr r0, =GPSR2 + ldr r1, =CFG_GPSR2_VAL + str r1, [r0] + + ldr r0, =GPCR0 + ldr r1, =CFG_GPCR0_VAL + str r1, [r0] + + ldr r0, =GPCR1 + ldr r1, =CFG_GPCR1_VAL + str r1, [r0] + + ldr r0, =GPCR2 + ldr r1, =CFG_GPCR2_VAL + str r1, [r0] + + ldr r0, =GPDR0 + ldr r1, =CFG_GPDR0_VAL + str r1, [r0] + + ldr r0, =GPDR1 + ldr r1, =CFG_GPDR1_VAL + str r1, [r0] + + ldr r0, =GPDR2 + ldr r1, =CFG_GPDR2_VAL + str r1, [r0] + + ldr r0, =GAFR0_L + ldr r1, =CFG_GAFR0_L_VAL + str r1, [r0] + + ldr r0, =GAFR0_U + ldr r1, =CFG_GAFR0_U_VAL + str r1, [r0] + + ldr r0, =GAFR1_L + ldr r1, =CFG_GAFR1_L_VAL + str r1, [r0] + + ldr r0, =GAFR1_U + ldr r1, =CFG_GAFR1_U_VAL + str r1, [r0] + + ldr r0, =GAFR2_L + ldr r1, =CFG_GAFR2_L_VAL + str r1, [r0] + + ldr r0, =GAFR2_U + ldr r1, =CFG_GAFR2_U_VAL + str r1, [r0] + + ldr r0, =PSSR /* enable GPIO pins */ + ldr r1, =CFG_PSSR_VAL + str r1, [r0] + +#ifdef DEBUG_BLINK_ENABLE + /* 4th debug blink */ + bl blink +#endif + + /* ---------------------------------------------------------------- */ + /* Enable memory interface */ + /* */ + /* The sequence below is based on the recommended init steps */ + /* detailed in the Intel PXA250 Operating Systems Developers Guide, */ + /* Chapter 10. */ + /* ---------------------------------------------------------------- */ + + /* ---------------------------------------------------------------- */ + /* Step 1: Wait for at least 200 microsedonds to allow internal */ + /* clocks to settle. Only necessary after hard reset... */ + /* FIXME: can be optimized later */ + /* ---------------------------------------------------------------- */ + + ldr r3, =OSCR /* reset the OS Timer Count to zero */ + mov r2, #0 + str r2, [r3] + ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ + /* so 0x300 should be plenty */ +1: + ldr r2, [r3] + cmp r4, r2 + bgt 1b + +mem_init: + + ldr r1, =MEMC_BASE /* get memory controller base addr. */ + + /* ---------------------------------------------------------------- */ + /* Step 2a: Initialize Asynchronous static memory controller */ + /* ---------------------------------------------------------------- */ + + /* MSC registers: timing, bus width, mem type */ + + /* MSC0: nCS(0,1) */ + ldr r2, =CFG_MSC0_VAL + str r2, [r1, #MSC0_OFFSET] + ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ + /* that data latches */ + /* MSC1: nCS(2,3) */ + ldr r2, =CFG_MSC1_VAL + str r2, [r1, #MSC1_OFFSET] + ldr r2, [r1, #MSC1_OFFSET] + + /* MSC2: nCS(4,5) */ + ldr r2, =CFG_MSC2_VAL + str r2, [r1, #MSC2_OFFSET] + ldr r2, [r1, #MSC2_OFFSET] + + /* ---------------------------------------------------------------- */ + /* Step 2b: Initialize Card Interface */ + /* ---------------------------------------------------------------- */ + + /* MECR: Memory Expansion Card Register */ + ldr r2, =CFG_MECR_VAL + str r2, [r1, #MECR_OFFSET] + ldr r2, [r1, #MECR_OFFSET] + + /* MCMEM0: Card Interface slot 0 timing */ + ldr r2, =CFG_MCMEM0_VAL + str r2, [r1, #MCMEM0_OFFSET] + ldr r2, [r1, #MCMEM0_OFFSET] + + /* MCMEM1: Card Interface slot 1 timing */ + ldr r2, =CFG_MCMEM1_VAL + str r2, [r1, #MCMEM1_OFFSET] + ldr r2, [r1, #MCMEM1_OFFSET] + + /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ + ldr r2, =CFG_MCATT0_VAL + str r2, [r1, #MCATT0_OFFSET] + ldr r2, [r1, #MCATT0_OFFSET] + + /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ + ldr r2, =CFG_MCATT1_VAL + str r2, [r1, #MCATT1_OFFSET] + ldr r2, [r1, #MCATT1_OFFSET] + + /* MCIO0: Card Interface I/O Space Timing, slot 0 */ + ldr r2, =CFG_MCIO0_VAL + str r2, [r1, #MCIO0_OFFSET] + ldr r2, [r1, #MCIO0_OFFSET] + + /* MCIO1: Card Interface I/O Space Timing, slot 1 */ + ldr r2, =CFG_MCIO1_VAL + str r2, [r1, #MCIO1_OFFSET] + ldr r2, [r1, #MCIO1_OFFSET] + +#ifdef DEBUG_BLINK_ENABLE + /* 5th blink */ + bl blink +#endif + + /* ---------------------------------------------------------------- */ + /* Step 2c: Write FLYCNFG FIXME: what's that??? */ + /* ---------------------------------------------------------------- */ + + /* ---------------------------------------------------------------- */ + /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ + /* ---------------------------------------------------------------- */ + + /* Before accessing MDREFR we need a valid DRI field, so we set */ + /* this to power on defaults + DRI field. */ + + ldr r3, =CFG_MDREFR_VAL + ldr r2, =0xFFF + and r3, r3, r2 + ldr r4, =0x03ca4000 + orr r4, r4, r3 + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] + + /* Note: preserve the mdrefr value in r4 */ + + /* ---------------------------------------------------------------- */ + /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */ + /* ---------------------------------------------------------------- */ + + /* Initialize SXCNFG register. Assert the enable bits */ + + /* Write SXMRS to cause an MRS command to all enabled banks of */ + /* synchronous static memory. Note that SXLCR need not be written */ + /* at this time. */ + + /* FIXME: we use async mode for now */ + + /* ---------------------------------------------------------------- */ + /* Step 4: Initialize SDRAM */ + /* ---------------------------------------------------------------- */ + + /* set MDREFR according to user define with exception of a few bits */ + + ldr r4, =CFG_MDREFR_VAL + orr r4, r4, #(MDREFR_SLFRSH) + bic r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN) + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] + + /* Step 4b: de-assert MDREFR:SLFRSH. */ + + bic r4, r4, #(MDREFR_SLFRSH) + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] + + /* Step 4c: assert MDREFR:E1PIN and E0PIO as desired */ + + ldr r4, =CFG_MDREFR_VAL + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] + + + /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ + /* configure but not enable each SDRAM partition pair. */ + + ldr r4, =CFG_MDCNFG_VAL + bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) + + str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ + ldr r4, [r1, #MDCNFG_OFFSET] + + /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ + /* 100..200 µsec. */ + + ldr r3, =OSCR /* reset the OS Timer Count to zero */ + mov r2, #0 + str r2, [r3] + ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ + /* so 0x300 should be plenty */ +1: + ldr r2, [r3] + cmp r4, r2 + bgt 1b + + /* Step 4f: Trigger a number (usually 8) refresh cycles by */ + /* attempting non-burst read or write accesses to disabled */ + /* SDRAM, as commonly specified in the power up sequence */ + /* documented in SDRAM data sheets. The address(es) used */ + /* for this purpose must not be cacheable. */ + + ldr r3, =CFG_DRAM_BASE + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + str r2, [r3] + + /* Step 4g: Write MDCNFG with enable bits asserted */ + /* (MDCNFG:DEx set to 1). */ + + ldr r3, [r1, #MDCNFG_OFFSET] + orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1) + str r3, [r1, #MDCNFG_OFFSET] + + /* Step 4h: Write MDMRS. */ + + ldr r2, =CFG_MDMRS_VAL + str r2, [r1, #MDMRS_OFFSET] + + /* We are finished with Intel's memory controller initialisation */ +#if 0 + /* FIXME turn on serial ports */ + /* look into moving this to board_init() */ + ldr r2, =(PXA_CS5_PHYS + 0x03C0002c) + mov r3, #0x13 + str r3, [r2] +#endif + +#ifdef DEBUG_BLINK_ENABLE + /* 6th blink */ + bl blink +#endif + + /* ---------------------------------------------------------------- */ + /* Disable (mask) all interrupts at interrupt controller */ + /* ---------------------------------------------------------------- */ + +initirqs: + + mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ + ldr r2, =ICLR + str r1, [r2] + + ldr r2, =ICMR /* mask all interrupts at the controller */ + str r1, [r2] + + /* ---------------------------------------------------------------- */ + /* Clock initialisation */ + /* ---------------------------------------------------------------- */ + +initclks: + + /* Disable the peripheral clocks, and set the core clock frequency */ + /* (hard-coding at 398.12MHz for now). */ + + /* Turn Off ALL on-chip peripheral clocks for re-configuration */ + /* Note: See label 'ENABLECLKS' for the re-enabling */ +#if 0 + ldr r1, =CKEN + mov r2, #0 + str r2, [r1] + + /* default value in case no valid rotary switch setting is found */ + ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ + + /* ... and write the core clock config register */ + ldr r1, =CCCR + str r2, [r1] + +#endif + +#ifdef RTC + /* enable the 32Khz oscillator for RTC and PowerManager */ + + ldr r1, =OSCC + mov r2, #OSCC_OON + str r2, [r1] + + /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ + /* has settled. */ +60: + ldr r2, [r1] + ands r2, r2, #1 + beq 60b +#endif + + /* ---------------------------------------------------------------- */ + /* */ + /* ---------------------------------------------------------------- */ + + /* Save SDRAM size */ + ldr r1, =DRAM_SIZE + str r8, [r1] + + /* Interrupt init: Mask all interrupts */ + ldr r0, =ICMR /* enable no sources */ + mov r1, #0 + str r1, [r0] + + /* FIXME */ + +#define NODEBUG +#ifdef NODEBUG + /*Disable software and data breakpoints */ + mov r0,#0 + mcr p15,0,r0,c14,c8,0 /* ibcr0 */ + mcr p15,0,r0,c14,c9,0 /* ibcr1 */ + mcr p15,0,r0,c14,c4,0 /* dbcon */ + + /*Enable all debug functionality */ + mov r0,#0x80000000 + mcr p14,0,r0,c10,c0,0 /* dcsr */ +#endif + + /* ---------------------------------------------------------------- */ + /* End memsetup */ + /* ---------------------------------------------------------------- */ + +#ifdef DEBUG_BLINK_ENABLE + /* 7th blink */ + bl blink +#endif + +endlowlevel_init: + + mov pc, r10 + + +#ifdef DEBUG_BLINK_ENABLE + +/* debug LED code */ + +/* delay about 200ms */ +delay: + + /* reset OSCR to 0 */ + ldr r8, =OSCR + mov r9, #0 + str r9, [r8] + + /* make sure new value has stuck */ +1: + ldr r8, =OSCR + ldr r9, [r8] + mov r8, #0x10000 + cmp r9, r8 + bgt 1b + + /* now, wait for delay to expire */ +1: + ldr r8, =OSCR + ldr r9, [r8] + mov r8, #0xd4000 + cmp r8, r9 + bgt 1b + + mov pc, lr + +/* blink code -- trashes r7, r8, r9 */ + +.globl blink +blink: + + mov r7, lr + + /* set GPIO10 as outout */ + ldr r8, =GPDR0 + ldr r9, [r8] + orr r9, r9, #(1<<10) + str r9, [r8] + + /* turn LED off */ + mov r9, #(1<<10) + ldr r8, =GPCR0 + str r9, [r8] + bl delay + + /* turn LED on */ + mov r9, #(1<<10) + ldr r8, =GPSR0 + str r9, [r8] + bl delay + + /* turn LED off */ + mov r9, #(1<<10) + ldr r8, =GPCR0 + str r9, [r8] + + mov pc, r7 + +#endif diff --git a/board/pxa255_idp/memsetup.S b/board/pxa255_idp/memsetup.S deleted file mode 100644 index 7e485a28a61..00000000000 --- a/board/pxa255_idp/memsetup.S +++ /dev/null @@ -1,496 +0,0 @@ -/* - * Most of this taken from Redboot hal_platform_setup.h with cleanup - * - * NOTE: I haven't clean this up considerably, just enough to get it - * running. See hal_platform_setup.h for the source. See - * board/cradle/memsetup.S for another PXA250 setup that is - * much cleaner. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -DRAM_SIZE: .long CFG_DRAM_SIZE - -/* wait for coprocessor write complete */ - .macro CPWAIT reg - mrc p15,0,\reg,c2,c0,0 - mov \reg,\reg - sub pc,pc,#4 - .endm - -/* - * Memory setup - */ -.globl memsetup -memsetup: - - mov r10, lr - -#ifdef DEBUG_BLINK_ENABLE - /* 3rd blink */ - bl blink -#endif - - /* Set up GPIO pins first ----------------------------------------- */ - ldr r0, =GPSR0 - ldr r1, =CFG_GPSR0_VAL - str r1, [r0] - - ldr r0, =GPSR1 - ldr r1, =CFG_GPSR1_VAL - str r1, [r0] - - ldr r0, =GPSR2 - ldr r1, =CFG_GPSR2_VAL - str r1, [r0] - - ldr r0, =GPCR0 - ldr r1, =CFG_GPCR0_VAL - str r1, [r0] - - ldr r0, =GPCR1 - ldr r1, =CFG_GPCR1_VAL - str r1, [r0] - - ldr r0, =GPCR2 - ldr r1, =CFG_GPCR2_VAL - str r1, [r0] - - ldr r0, =GPDR0 - ldr r1, =CFG_GPDR0_VAL - str r1, [r0] - - ldr r0, =GPDR1 - ldr r1, =CFG_GPDR1_VAL - str r1, [r0] - - ldr r0, =GPDR2 - ldr r1, =CFG_GPDR2_VAL - str r1, [r0] - - ldr r0, =GAFR0_L - ldr r1, =CFG_GAFR0_L_VAL - str r1, [r0] - - ldr r0, =GAFR0_U - ldr r1, =CFG_GAFR0_U_VAL - str r1, [r0] - - ldr r0, =GAFR1_L - ldr r1, =CFG_GAFR1_L_VAL - str r1, [r0] - - ldr r0, =GAFR1_U - ldr r1, =CFG_GAFR1_U_VAL - str r1, [r0] - - ldr r0, =GAFR2_L - ldr r1, =CFG_GAFR2_L_VAL - str r1, [r0] - - ldr r0, =GAFR2_U - ldr r1, =CFG_GAFR2_U_VAL - str r1, [r0] - - ldr r0, =PSSR /* enable GPIO pins */ - ldr r1, =CFG_PSSR_VAL - str r1, [r0] - -#ifdef DEBUG_BLINK_ENABLE - /* 4th debug blink */ - bl blink -#endif - - /* ---------------------------------------------------------------- */ - /* Enable memory interface */ - /* */ - /* The sequence below is based on the recommended init steps */ - /* detailed in the Intel PXA250 Operating Systems Developers Guide, */ - /* Chapter 10. */ - /* ---------------------------------------------------------------- */ - - /* ---------------------------------------------------------------- */ - /* Step 1: Wait for at least 200 microsedonds to allow internal */ - /* clocks to settle. Only necessary after hard reset... */ - /* FIXME: can be optimized later */ - /* ---------------------------------------------------------------- */ - - ldr r3, =OSCR /* reset the OS Timer Count to zero */ - mov r2, #0 - str r2, [r3] - ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ - /* so 0x300 should be plenty */ -1: - ldr r2, [r3] - cmp r4, r2 - bgt 1b - -mem_init: - - ldr r1, =MEMC_BASE /* get memory controller base addr. */ - - /* ---------------------------------------------------------------- */ - /* Step 2a: Initialize Asynchronous static memory controller */ - /* ---------------------------------------------------------------- */ - - /* MSC registers: timing, bus width, mem type */ - - /* MSC0: nCS(0,1) */ - ldr r2, =CFG_MSC0_VAL - str r2, [r1, #MSC0_OFFSET] - ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ - /* that data latches */ - /* MSC1: nCS(2,3) */ - ldr r2, =CFG_MSC1_VAL - str r2, [r1, #MSC1_OFFSET] - ldr r2, [r1, #MSC1_OFFSET] - - /* MSC2: nCS(4,5) */ - ldr r2, =CFG_MSC2_VAL - str r2, [r1, #MSC2_OFFSET] - ldr r2, [r1, #MSC2_OFFSET] - - /* ---------------------------------------------------------------- */ - /* Step 2b: Initialize Card Interface */ - /* ---------------------------------------------------------------- */ - - /* MECR: Memory Expansion Card Register */ - ldr r2, =CFG_MECR_VAL - str r2, [r1, #MECR_OFFSET] - ldr r2, [r1, #MECR_OFFSET] - - /* MCMEM0: Card Interface slot 0 timing */ - ldr r2, =CFG_MCMEM0_VAL - str r2, [r1, #MCMEM0_OFFSET] - ldr r2, [r1, #MCMEM0_OFFSET] - - /* MCMEM1: Card Interface slot 1 timing */ - ldr r2, =CFG_MCMEM1_VAL - str r2, [r1, #MCMEM1_OFFSET] - ldr r2, [r1, #MCMEM1_OFFSET] - - /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - ldr r2, =CFG_MCATT0_VAL - str r2, [r1, #MCATT0_OFFSET] - ldr r2, [r1, #MCATT0_OFFSET] - - /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - ldr r2, =CFG_MCATT1_VAL - str r2, [r1, #MCATT1_OFFSET] - ldr r2, [r1, #MCATT1_OFFSET] - - /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - ldr r2, =CFG_MCIO0_VAL - str r2, [r1, #MCIO0_OFFSET] - ldr r2, [r1, #MCIO0_OFFSET] - - /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - ldr r2, =CFG_MCIO1_VAL - str r2, [r1, #MCIO1_OFFSET] - ldr r2, [r1, #MCIO1_OFFSET] - -#ifdef DEBUG_BLINK_ENABLE - /* 5th blink */ - bl blink -#endif - - /* ---------------------------------------------------------------- */ - /* Step 2c: Write FLYCNFG FIXME: what's that??? */ - /* ---------------------------------------------------------------- */ - - /* ---------------------------------------------------------------- */ - /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ - /* ---------------------------------------------------------------- */ - - /* Before accessing MDREFR we need a valid DRI field, so we set */ - /* this to power on defaults + DRI field. */ - - ldr r3, =CFG_MDREFR_VAL - ldr r2, =0xFFF - and r3, r3, r2 - ldr r4, =0x03ca4000 - orr r4, r4, r3 - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - /* Note: preserve the mdrefr value in r4 */ - - /* ---------------------------------------------------------------- */ - /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */ - /* ---------------------------------------------------------------- */ - - /* Initialize SXCNFG register. Assert the enable bits */ - - /* Write SXMRS to cause an MRS command to all enabled banks of */ - /* synchronous static memory. Note that SXLCR need not be written */ - /* at this time. */ - - /* FIXME: we use async mode for now */ - - /* ---------------------------------------------------------------- */ - /* Step 4: Initialize SDRAM */ - /* ---------------------------------------------------------------- */ - - /* set MDREFR according to user define with exception of a few bits */ - - ldr r4, =CFG_MDREFR_VAL - orr r4, r4, #(MDREFR_SLFRSH) - bic r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - /* Step 4b: de-assert MDREFR:SLFRSH. */ - - bic r4, r4, #(MDREFR_SLFRSH) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - /* Step 4c: assert MDREFR:E1PIN and E0PIO as desired */ - - ldr r4, =CFG_MDREFR_VAL - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] - - - /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ - /* configure but not enable each SDRAM partition pair. */ - - ldr r4, =CFG_MDCNFG_VAL - bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) - - str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ - ldr r4, [r1, #MDCNFG_OFFSET] - - /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ - /* 100..200 µsec. */ - - ldr r3, =OSCR /* reset the OS Timer Count to zero */ - mov r2, #0 - str r2, [r3] - ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ - /* so 0x300 should be plenty */ -1: - ldr r2, [r3] - cmp r4, r2 - bgt 1b - - /* Step 4f: Trigger a number (usually 8) refresh cycles by */ - /* attempting non-burst read or write accesses to disabled */ - /* SDRAM, as commonly specified in the power up sequence */ - /* documented in SDRAM data sheets. The address(es) used */ - /* for this purpose must not be cacheable. */ - - ldr r3, =CFG_DRAM_BASE - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - str r2, [r3] - - /* Step 4g: Write MDCNFG with enable bits asserted */ - /* (MDCNFG:DEx set to 1). */ - - ldr r3, [r1, #MDCNFG_OFFSET] - orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1) - str r3, [r1, #MDCNFG_OFFSET] - - /* Step 4h: Write MDMRS. */ - - ldr r2, =CFG_MDMRS_VAL - str r2, [r1, #MDMRS_OFFSET] - - /* We are finished with Intel's memory controller initialisation */ -#if 0 - /* FIXME turn on serial ports */ - /* look into moving this to board_init() */ - ldr r2, =(PXA_CS5_PHYS + 0x03C0002c) - mov r3, #0x13 - str r3, [r2] -#endif - -#ifdef DEBUG_BLINK_ENABLE - /* 6th blink */ - bl blink -#endif - - /* ---------------------------------------------------------------- */ - /* Disable (mask) all interrupts at interrupt controller */ - /* ---------------------------------------------------------------- */ - -initirqs: - - mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ - ldr r2, =ICLR - str r1, [r2] - - ldr r2, =ICMR /* mask all interrupts at the controller */ - str r1, [r2] - - /* ---------------------------------------------------------------- */ - /* Clock initialisation */ - /* ---------------------------------------------------------------- */ - -initclks: - - /* Disable the peripheral clocks, and set the core clock frequency */ - /* (hard-coding at 398.12MHz for now). */ - - /* Turn Off ALL on-chip peripheral clocks for re-configuration */ - /* Note: See label 'ENABLECLKS' for the re-enabling */ -#if 0 - ldr r1, =CKEN - mov r2, #0 - str r2, [r1] - - /* default value in case no valid rotary switch setting is found */ - ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ - - /* ... and write the core clock config register */ - ldr r1, =CCCR - str r2, [r1] - -#endif - -#ifdef RTC - /* enable the 32Khz oscillator for RTC and PowerManager */ - - ldr r1, =OSCC - mov r2, #OSCC_OON - str r2, [r1] - - /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ - /* has settled. */ -60: - ldr r2, [r1] - ands r2, r2, #1 - beq 60b -#endif - - /* ---------------------------------------------------------------- */ - /* */ - /* ---------------------------------------------------------------- */ - - /* Save SDRAM size */ - ldr r1, =DRAM_SIZE - str r8, [r1] - - /* Interrupt init: Mask all interrupts */ - ldr r0, =ICMR /* enable no sources */ - mov r1, #0 - str r1, [r0] - - /* FIXME */ - -#define NODEBUG -#ifdef NODEBUG - /*Disable software and data breakpoints */ - mov r0,#0 - mcr p15,0,r0,c14,c8,0 /* ibcr0 */ - mcr p15,0,r0,c14,c9,0 /* ibcr1 */ - mcr p15,0,r0,c14,c4,0 /* dbcon */ - - /*Enable all debug functionality */ - mov r0,#0x80000000 - mcr p14,0,r0,c10,c0,0 /* dcsr */ -#endif - - /* ---------------------------------------------------------------- */ - /* End memsetup */ - /* ---------------------------------------------------------------- */ - -#ifdef DEBUG_BLINK_ENABLE - /* 7th blink */ - bl blink -#endif - -endmemsetup: - - mov pc, r10 - - -#ifdef DEBUG_BLINK_ENABLE - -/* debug LED code */ - -/* delay about 200ms */ -delay: - - /* reset OSCR to 0 */ - ldr r8, =OSCR - mov r9, #0 - str r9, [r8] - - /* make sure new value has stuck */ -1: - ldr r8, =OSCR - ldr r9, [r8] - mov r8, #0x10000 - cmp r9, r8 - bgt 1b - - /* now, wait for delay to expire */ -1: - ldr r8, =OSCR - ldr r9, [r8] - mov r8, #0xd4000 - cmp r8, r9 - bgt 1b - - mov pc, lr - -/* blink code -- trashes r7, r8, r9 */ - -.globl blink -blink: - - mov r7, lr - - /* set GPIO10 as outout */ - ldr r8, =GPDR0 - ldr r9, [r8] - orr r9, r9, #(1<<10) - str r9, [r8] - - /* turn LED off */ - mov r9, #(1<<10) - ldr r8, =GPCR0 - str r9, [r8] - bl delay - - /* turn LED on */ - mov r9, #(1<<10) - ldr r8, =GPSR0 - str r9, [r8] - bl delay - - /* turn LED off */ - mov r9, #(1<<10) - ldr r8, =GPCR0 - str r9, [r8] - - mov pc, r7 - -#endif diff --git a/board/pxa255_idp/u-boot.lds b/board/pxa255_idp/u-boot.lds index 20ce1089389..2facd832e9b 100644 --- a/board/pxa255_idp/u-boot.lds +++ b/board/pxa255_idp/u-boot.lds @@ -44,6 +44,7 @@ SECTIONS . = ALIGN(4); .got : { *(.got) } + . = .; __u_boot_cmd_start = .; .u_boot_cmd : { *(.u_boot_cmd) } __u_boot_cmd_end = .; diff --git a/cpu/pxa/config.mk b/cpu/pxa/config.mk index fb810ca7c26..f0b86b7dc16 100644 --- a/cpu/pxa/config.mk +++ b/cpu/pxa/config.mk @@ -25,8 +25,7 @@ PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -ffixed-r8 \ -msoft-float -#PLATFORM_CPPFLAGS += -mapcs-32 -march=armv4 -mtune=strongarm1100 -PLATFORM_CPPFLAGS += -march=armv5 -mtune=xscale +PLATFORM_CPPFLAGS += -march=armv5te -mtune=xscale # ========================================================================= # # Supply options according to compiler version diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c index 51e7f658878..9ba457e75aa 100644 --- a/cpu/pxa/serial.c +++ b/cpu/pxa/serial.c @@ -35,17 +35,17 @@ DECLARE_GLOBAL_DATA_PTR; -#define FFUART 0 -#define BTUART 1 -#define STUART 2 +#define FFUART_INDEX 0 +#define BTUART_INDEX 1 +#define STUART_INDEX 2 #ifndef CONFIG_SERIAL_MULTI #if defined (CONFIG_FFUART) -#define UART_INDEX FFUART +#define UART_INDEX FFUART_INDEX #elif defined (CONFIG_BTUART) -#define UART_INDEX BTUART +#define UART_INDEX BTUART_INDEX #elif defined (CONFIG_STUART) -#define UART_INDEX STUART +#define UART_INDEX STUART_INDEX #else #error "Bad: you didn't configure serial ..." #endif @@ -71,7 +71,7 @@ void pxa_setbrg_dev (unsigned int uart_index) hang (); switch (uart_index) { - case FFUART: + case FFUART_INDEX: #ifdef CONFIG_CPU_MONAHANS CKENA |= CKENA_22_FFUART; #else @@ -90,7 +90,7 @@ void pxa_setbrg_dev (unsigned int uart_index) FFIER = IER_UUE; /* Enable FFUART */ break; - case BTUART: + case BTUART_INDEX: #ifdef CONFIG_CPU_MONAHANS CKENA |= CKENA_21_BTUART; #else @@ -110,7 +110,7 @@ void pxa_setbrg_dev (unsigned int uart_index) break; - case STUART: + case STUART_INDEX: #ifdef CONFIG_CPU_MONAHANS CKENA |= CKENA_23_STUART; #else @@ -154,20 +154,20 @@ int pxa_init_dev (unsigned int uart_index) void pxa_putc_dev (unsigned int uart_index,const char c) { switch (uart_index) { - case FFUART: + case FFUART_INDEX: /* wait for room in the tx FIFO on FFUART */ while ((FFLSR & LSR_TEMT) == 0) WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ FFTHR = c; break; - case BTUART: + case BTUART_INDEX: while ((BTLSR & LSR_TEMT ) == 0 ) WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ BTTHR = c; break; - case STUART: + case STUART_INDEX: while ((STLSR & LSR_TEMT ) == 0 ) WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ STTHR = c; @@ -187,11 +187,11 @@ void pxa_putc_dev (unsigned int uart_index,const char c) int pxa_tstc_dev (unsigned int uart_index) { switch (uart_index) { - case FFUART: + case FFUART_INDEX: return FFLSR & LSR_DR; - case BTUART: + case BTUART_INDEX: return BTLSR & LSR_DR; - case STUART: + case STUART_INDEX: return STLSR & LSR_DR; } return -1; @@ -205,16 +205,16 @@ int pxa_tstc_dev (unsigned int uart_index) int pxa_getc_dev (unsigned int uart_index) { switch (uart_index) { - case FFUART: + case FFUART_INDEX: while (!(FFLSR & LSR_DR)) WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ return (char) FFRBR & 0xff; - case BTUART: + case BTUART_INDEX: while (!(BTLSR & LSR_DR)) WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ return (char) BTRBR & 0xff; - case STUART: + case STUART_INDEX: while (!(STLSR & LSR_DR)) WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ return (char) STRBR & 0xff; @@ -233,32 +233,32 @@ pxa_puts_dev (unsigned int uart_index,const char *s) #if defined (CONFIG_FFUART) static int ffuart_init(void) { - return pxa_init_dev(FFUART); + return pxa_init_dev(FFUART_INDEX); } static void ffuart_setbrg(void) { - return pxa_setbrg_dev(FFUART); + return pxa_setbrg_dev(FFUART_INDEX); } static void ffuart_putc(const char c) { - return pxa_putc_dev(FFUART,c); + return pxa_putc_dev(FFUART_INDEX,c); } static void ffuart_puts(const char *s) { - return pxa_puts_dev(FFUART,s); + return pxa_puts_dev(FFUART_INDEX,s); } static int ffuart_getc(void) { - return pxa_getc_dev(FFUART); + return pxa_getc_dev(FFUART_INDEX); } static int ffuart_tstc(void) { - return pxa_tstc_dev(FFUART); + return pxa_tstc_dev(FFUART_INDEX); } struct serial_device serial_ffuart_device = @@ -277,32 +277,32 @@ struct serial_device serial_ffuart_device = #if defined (CONFIG_BTUART) static int btuart_init(void) { - return pxa_init_dev(BTUART); + return pxa_init_dev(BTUART_INDEX); } static void btuart_setbrg(void) { - return pxa_setbrg_dev(BTUART); + return pxa_setbrg_dev(BTUART_INDEX); } static void btuart_putc(const char c) { - return pxa_putc_dev(BTUART,c); + return pxa_putc_dev(BTUART_INDEX,c); } static void btuart_puts(const char *s) { - return pxa_puts_dev(BTUART,s); + return pxa_puts_dev(BTUART_INDEX,s); } static int btuart_getc(void) { - return pxa_getc_dev(BTUART); + return pxa_getc_dev(BTUART_INDEX); } static int btuart_tstc(void) { - return pxa_tstc_dev(BTUART); + return pxa_tstc_dev(BTUART_INDEX); } struct serial_device serial_btuart_device = @@ -321,32 +321,32 @@ struct serial_device serial_btuart_device = #if defined (CONFIG_STUART) static int stuart_init(void) { - return pxa_init_dev(STUART); + return pxa_init_dev(STUART_INDEX); } static void stuart_setbrg(void) { - return pxa_setbrg_dev(STUART); + return pxa_setbrg_dev(STUART_INDEX); } static void stuart_putc(const char c) { - return pxa_putc_dev(STUART,c); + return pxa_putc_dev(STUART_INDEX,c); } static void stuart_puts(const char *s) { - return pxa_puts_dev(STUART,s); + return pxa_puts_dev(STUART_INDEX,s); } static int stuart_getc(void) { - return pxa_getc_dev(STUART); + return pxa_getc_dev(STUART_INDEX); } static int stuart_tstc(void) { - return pxa_tstc_dev(STUART); + return pxa_tstc_dev(STUART_INDEX); } struct serial_device serial_stuart_device = diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index ffaa30fdc58..b922485ed33 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -166,13 +166,17 @@ _start_armboot: .word start_armboot /* */ /****************************************************************************/ /* mk@tbd: Fix this! */ -#ifdef CONFIG_CPU_MONAHANS +#if defined(CONFIG_PXA250) || defined(CONFIG_CPU_MONAHANS) #undef ICMR #undef OSMR3 #undef OSCR #undef OWER #undef OIER #endif +#ifdef CONFIG_PXA250 +#undef RCSR +#undef CCCR +#endif /* Interrupt-Controller base address */ IC_BASE: .word 0x40d00000 diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index 0e884fc114c..4a9cadbc738 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -38,10 +38,11 @@ #include /* - * If we are developing, we might want to start armboot from ram + * If we are developing, we might want to start U-Boot from RAM * so we MUST NOT initialize critical regs like mem-timing ... */ -#define CONFIG_INIT_CRITICAL /* undef for developing */ +#undef CONFIG_SKIP_LOWLEVEL_INIT /* define for developing */ +#undef CONFIG_SKIP_RELOCATE_UBOOT /* define for developing */ /* * define the following to enable debug blinks. A debug blink function @@ -62,6 +63,7 @@ #endif #define CONFIG_MMC 1 +#define CONFIG_DOS_PARTITION 1 #define BOARD_LATE_INIT 1 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ @@ -121,7 +123,6 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_DHCP - #define CONFIG_BOOTDELAY 3 #define CONFIG_BOOTCOMMAND "bootm 40000" #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200" @@ -332,7 +333,7 @@ #define CFG_FLASH_CFI_DRIVER 1 #define CFG_MONITOR_BASE 0 -#define CFG_MONITOR_LEN 0x40000 +#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ @@ -347,7 +348,7 @@ #define CFG_ENV_IS_IN_FLASH 1 /* Addr of Environment Sector */ #define CFG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SIZE - 0x40000) -#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ -#define CFG_ENV_SECT_SIZE 0x40000 +#define CFG_ENV_SIZE PHYS_FLASH_SECT_SIZE /* Total Size of Environment Sector */ +#define CFG_ENV_SECT_SIZE (PHYS_FLASH_SECT_SIZE / 16) #endif /* __CONFIG_H */ diff --git a/include/part.h b/include/part.h index 29c03205f2d..37b2b6845bc 100644 --- a/include/part.h +++ b/include/part.h @@ -38,9 +38,9 @@ typedef struct block_dev_desc { #endif lbaint_t lba; /* number of blocks */ unsigned long blksz; /* block size */ - unsigned char vendor [40+1]; /* IDE model, SCSI Vendor */ - unsigned char product[20+1]; /* IDE Serial no, SCSI product */ - unsigned char revision[8+1]; /* firmware revision */ + char vendor [40+1]; /* IDE model, SCSI Vendor */ + char product[20+1]; /* IDE Serial no, SCSI product */ + char revision[8+1]; /* firmware revision */ unsigned long (*block_read)(int dev, unsigned long start, lbaint_t blkcnt, -- cgit v1.3.1 From 10cdb8dbd67a818823ab9ec88b68fc348903db59 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Fri, 19 Oct 2007 00:24:59 +0200 Subject: lubbock: Fix no partition type specified, use DOS as default Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/lubbock.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index 4adf2542219..82fe19c725f 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -42,6 +42,7 @@ #endif #define CONFIG_MMC 1 #define BOARD_LATE_INIT 1 +#define CONFIG_DOS_PARTITION #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ -- cgit v1.3.1 From e78220f6e514206757acfe247297fc9a328a881f Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Fri, 19 Oct 2007 06:33:45 +0200 Subject: xsengine: Fix no partition type specified, use DOS as default Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/xsengine/flash.c | 4 ++-- include/configs/xsengine.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/board/xsengine/flash.c b/board/xsengine/flash.c index 2b9afc7a77b..a188e244089 100644 --- a/board/xsengine/flash.c +++ b/board/xsengine/flash.c @@ -46,11 +46,11 @@ unsigned long flash_init (void) for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { switch (i) { case 0: - flash_get_size ((long *) PHYS_FLASH_1, &flash_info[i]); + flash_get_size ((vu_long *) PHYS_FLASH_1, &flash_info[i]); flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); break; case 1: - flash_get_size ((long *) PHYS_FLASH_2, &flash_info[i]); + flash_get_size ((vu_long *) PHYS_FLASH_2, &flash_info[i]); flash_get_offsets (PHYS_FLASH_2, &flash_info[i]); break; default: diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h index 5733933d616..766617e0753 100644 --- a/include/configs/xsengine.h +++ b/include/configs/xsengine.h @@ -32,6 +32,7 @@ #define CONFIG_PXA250 1 /* This is an PXA250 CPU */ #define CONFIG_XSENGINE 1 #define CONFIG_MMC 1 +#define CONFIG_DOS_PARTITION 1 #define BOARD_POST_INIT 1 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -- cgit v1.3.1 From e9d0d527992566ebef9826962ff1745b2f082b92 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Fri, 19 Oct 2007 10:55:24 +0200 Subject: delta: Fix OHCI_REGS_BASE undeclared and wait_ms implicit declaration Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- cpu/pxa/usb.c | 1 + include/configs/delta.h | 2 ++ 2 files changed, 3 insertions(+) (limited to 'include') diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c index d2812a413ed..72b7dfadfe7 100644 --- a/cpu/pxa/usb.c +++ b/cpu/pxa/usb.c @@ -27,6 +27,7 @@ # if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) #include +#include int usb_cpu_init(void) { diff --git a/include/configs/delta.h b/include/configs/delta.h index 09667edaa5a..14fde1a9579 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -123,6 +123,8 @@ #define CONFIG_USB_STORAGE 1 #define CONFIG_DOS_PARTITION 1 +#include /* for OHCI_REGS_BASE */ + #undef CFG_USB_OHCI_BOARD_INIT #define CFG_USB_OHCI_CPU_INIT 1 #define CFG_USB_OHCI_REGS_BASE OHCI_REGS_BASE -- cgit v1.3.1 From 7b0a42219f30277f71f4405cbaf8a269f6d2d227 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 21 Oct 2007 09:14:28 +0200 Subject: Mips: Fix string functions differ prototype declaration Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/asm-mips/string.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h index c42ad82c477..579a591e629 100644 --- a/include/asm-mips/string.h +++ b/include/asm-mips/string.h @@ -19,21 +19,21 @@ extern char *strcpy(char *__dest, __const__ char *__src); #undef __HAVE_ARCH_STRNCPY -extern char *strncpy(char *__dest, __const__ char *__src, size_t __n); +extern char *strncpy(char *__dest, __const__ char *__src, __kernel_size_t __n); #undef __HAVE_ARCH_STRCMP extern int strcmp(__const__ char *__cs, __const__ char *__ct); #undef __HAVE_ARCH_STRNCMP -extern int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count); +extern int strncmp(__const__ char *__cs, __const__ char *__ct, __kernel_size_t __count); #undef __HAVE_ARCH_MEMSET -extern void *memset(void *__s, int __c, size_t __count); +extern void *memset(void *__s, int __c, __kernel_size_t __count); #undef __HAVE_ARCH_MEMCPY -extern void *memcpy(void *__to, __const__ void *__from, size_t __n); +extern void *memcpy(void *__to, __const__ void *__from, __kernel_size_t __n); #undef __HAVE_ARCH_MEMMOVE -extern void *memmove(void *__dest, __const__ void *__src, size_t __n); +extern void *memmove(void *__dest, __const__ void *__src, __kernel_size_t __n); #endif /* _ASM_STRING_H */ -- cgit v1.3.1 From b31f64343ead9482cd439b1adbe4c34026a641b1 Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Mon, 22 Oct 2007 16:45:53 +0200 Subject: TQM5200: fix spurious characters on second serial interface With this patch PSC3 is configured as UART. This is done, because if the pins of PSC3 are not configured at all (-> all pins are GPI), due to crosstalk, spurious characters may be send over the RX232_2_TXD signal line. Signed-off-by: Martin Krause --- include/configs/TQM5200.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index d55340404d8..c3f16f524ef 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -547,7 +547,7 @@ # if defined (CONFIG_TQM5200_REV100) # error TQM5200 REV100 not supported on STK52XX REV200 or above # else/* TQM5200 REV200 and above */ -# define CFG_GPS_PORT_CONFIG 0x91500004 +# define CFG_GPS_PORT_CONFIG 0x91500404 # endif # endif #elif defined (CONFIG_FO300) -- cgit v1.3.1 From 1a0ce20aa4cb4e3068da04e7290ee9986fd0b834 Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Wed, 24 Oct 2007 08:42:25 +0200 Subject: TQM5200: fix spurious characters on second serial interface With this patch PSC3 is configured as UART. This is done, because if the pins of PSC3 are not configured at all (-> all pins are GPI), due to crosstalk, spurious characters may be send over the RX232_2_TXD signal line. Signed-off-by: Martin Krause Signed-off-by: Grant Likely --- include/configs/TQM5200.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index d55340404d8..c3f16f524ef 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -547,7 +547,7 @@ # if defined (CONFIG_TQM5200_REV100) # error TQM5200 REV100 not supported on STK52XX REV200 or above # else/* TQM5200 REV200 and above */ -# define CFG_GPS_PORT_CONFIG 0x91500004 +# define CFG_GPS_PORT_CONFIG 0x91500404 # endif # endif #elif defined (CONFIG_FO300) -- cgit v1.3.1 From d78791ae914d4e7c5edca1cdad73b3dc81a4eb82 Mon Sep 17 00:00:00 2001 From: Bartlomiej Sieka Date: Thu, 25 Oct 2007 17:20:01 +0200 Subject: TQM5200: increase kernel_addr_r and fdt_addr_r (hinted by Wolfgang Denk). Signed-off-by: Bartlomiej Sieka --- include/configs/TQM5200.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index c3f16f524ef..7ecc275a1cd 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -257,8 +257,8 @@ "fdt_addr=FC0A0000\0" \ "kernel_addr=FC0C0000\0" \ "ramdisk_addr=FC300000\0" \ - "kernel_addr_r=200000\0" \ - "fdt_addr_r=400000\0" \ + "kernel_addr_r=400000\0" \ + "fdt_addr_r=600000\0" \ "rootpath=/opt/eldk/ppc_6xx\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ -- cgit v1.3.1 From 2acefa72ee0026f862ab65597ca687428f63a973 Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:09:17 -0500 Subject: ColdFire 5282: Fix external flash boot and return dramsize Signed-off-by: TsiChungLiew --- board/m5282evb/m5282evb.c | 1 + cpu/mcf52x2/start.S | 6 +++++- include/configs/M5282EVB.h | 2 +- 3 files changed, 7 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c index 243d6a4d83e..7d6d1d6231a 100644 --- a/board/m5282evb/m5282evb.c +++ b/board/m5282evb/m5282evb.c @@ -89,4 +89,5 @@ long int initdram (int board_type) /* Write to the SDRAM Mode Register */ *(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696; } + return dramsize; } diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 686e2a53330..260a09abf76 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -58,7 +58,7 @@ _vectors: .long 0x00000000 /* Flash offset is 0 until we setup CS0 */ #if defined(CONFIG_R5200) .long 0x400 -#elif defined(CONFIG_M5282) +#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) .long _start - TEXT_BASE #else .long _START @@ -177,7 +177,11 @@ _after_flashbar_copy: * therefore no VBR to set */ #if !defined(CONFIG_MONITOR_IS_IN_RAM) +#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) + move.l #CFG_INT_FLASH_BASE, %d0 +#else move.l #CFG_FLASH_BASE, %d0 +#endif movec %d0, %VBR #endif diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 3c17c1ea146..7bb9f60f765 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -163,7 +163,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CFG_FLASH_BASE 0xffe00000 #define CFG_INT_FLASH_BASE 0xf0000000 #define CFG_INT_FLASH_ENABLE 0x21 -- cgit v1.3.1 From 95e9f2c212a65610b2e59a5c00d0113383a4da0b Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:10:23 -0500 Subject: ColdFire 5253: Assign correct SDRAM size Signed-off-by: TsiChungLiew --- include/configs/M5253EVBE.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 48170e7a35a..f5e1b646ca2 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -146,7 +146,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ #ifdef CONFIG_MONITOR_IS_IN_RAM #define CFG_MONITOR_BASE 0x20000 -- cgit v1.3.1 From c67e12e705b204cfe914e3e3e693d69a445dcabf Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:12:36 -0500 Subject: ColdFire 5329: Assign correct SDRAM size and fix cache Signed-off-by: TsiChungLiew --- cpu/mcf532x/start.S | 4 ++-- include/configs/M5329EVB.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 5cc1c87cdd0..61be2eac695 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -131,7 +131,7 @@ _start: movec %d0, %VBR move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR0 + movec %d0, %RAMBAR1 /* invalidate and disable cache */ move.l #0x01000000, %d0 /* Invalidate cache cmd */ @@ -268,7 +268,7 @@ _int_handler: icache_enable: move.l #0x01000000, %d0 /* Invalidate cache cmd */ movec %d0, %CACR /* Invalidate cache */ - move.l #(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0 + move.l #(CFG_SDRAM_BASE + 0x1c000), %d0 movec %d0, %ACR0 /* Enable cache */ move.l #0x80000200, %d0 /* Setup cache mask */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d3b160505be..47d74a3c37a 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -175,7 +175,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x40000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 32 /* SDRAM size in MB */ #define CFG_SDRAM_CFG1 0x53722730 #define CFG_SDRAM_CFG2 0x56670000 #define CFG_SDRAM_CTRL 0xE1092000 -- cgit v1.3.1 From e8ee8f3ade2a06c1893dd5e68f223070d650c7ed Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 25 Oct 2007 17:16:22 -0500 Subject: ColdFire 54455: Fix correct boot location for atmel and intel Signed-off-by: TsiChungLiew --- Makefile | 4 ++++ board/freescale/m54455evb/config.mk | 4 +++- include/configs/M54455EVB.h | 36 ++++++++++++++++++++---------------- 3 files changed, 27 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/Makefile b/Makefile index ce7b07f9d18..850c68e235c 100644 --- a/Makefile +++ b/Makefile @@ -1733,9 +1733,13 @@ M54455EVB_i66_config : unconfig >include/config.h ; \ if [ "$${FLASH}" == "INTEL" ] ; then \ echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \ + echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \ echo "... with INTEL boot..." ; \ else \ echo "#define CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \ + echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \ echo "... with ATMEL boot..." ; \ fi; \ echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \ diff --git a/board/freescale/m54455evb/config.mk b/board/freescale/m54455evb/config.mk index ce014edca8f..b42fcc94ce7 100644 --- a/board/freescale/m54455evb/config.mk +++ b/board/freescale/m54455evb/config.mk @@ -22,4 +22,6 @@ # MA 02111-1307 USA # -TEXT_BASE = 0 +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 6f4859c2380..ba050cb7e46 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -27,8 +27,8 @@ * board/config.h - configuration options, board specific */ -#ifndef _JAMICA54455_H -#define _JAMICA54455_H +#ifndef _M54455EVB_H +#define _M54455EVB_H /* * High Level Configuration Options @@ -75,7 +75,7 @@ #define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_NET -#define CONFIG_CMD_PCI +#undef CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO @@ -129,8 +129,8 @@ "u-boot=u-boot.bin\0" \ "load=tftp ${loadaddr) ${u-boot}\0" \ "upd=run load; run prog\0" \ - "prog=prot off 0 2ffff;" \ - "era 0 2ffff;" \ + "prog=prot off 4000000 402ffff;" \ + "era 4000000 402ffff;" \ "cp.b ${loadaddr} 0 ${filesize};" \ "save\0" \ "" @@ -174,6 +174,7 @@ #define CFG_IMMR CFG_MBAR /* PCI */ +#ifdef CONFIG_CMD_PCI #define CONFIG_PCI 1 #define CFG_PCI_MEM_BUS 0xA0000000 @@ -187,6 +188,7 @@ #define CFG_PCI_CFG_BUS 0xB0000000 #define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS #define CFG_PCI_CFG_SIZE 0x01000000 +#endif /* FPGA - Spartan 2 */ /* experiment @@ -268,8 +270,6 @@ /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ -#define CFG_ENV_OFFSET 0x4000 -#define CFG_ENV_SECT_SIZE 0x2000 #define CFG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_OVERWRITE 1 #undef CFG_ENV_IS_EMBEDDED @@ -278,13 +278,17 @@ * FLASH organization */ #ifdef CFG_ATMEL_BOOT -# define CFG_FLASH_BASE 0 +# define CFG_FLASH_BASE CFG_CS0_BASE # define CFG_FLASH0_BASE CFG_CS0_BASE # define CFG_FLASH1_BASE CFG_CS1_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) +# define CFG_ENV_SECT_SIZE 0x2000 #else # define CFG_FLASH_BASE CFG_FLASH0_BASE # define CFG_FLASH0_BASE CFG_CS1_BASE # define CFG_FLASH1_BASE CFG_CS0_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000) +# define CFG_ENV_SECT_SIZE 0x20000 #endif /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system @@ -328,9 +332,9 @@ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. */ #ifdef CFG_ATMEL_BOOT -# define CONFIG_JFFS2_DEV "nor0" +# define CONFIG_JFFS2_DEV "nor1" # define CONFIG_JFFS2_PART_SIZE 0x01000000 -# define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE +# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH1_BASE + 0x500000) #else # define CONFIG_JFFS2_DEV "nor0" # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000) @@ -356,20 +360,20 @@ #ifdef CFG_ATMEL_BOOT /* Atmel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x04000000 #define CFG_CS0_MASK 0x00070001 #define CFG_CS0_CTRL 0x00001140 /* Intel Flash */ -#define CFG_CS1_BASE 0x04000000 +#define CFG_CS1_BASE 0x00000000 #define CFG_CS1_MASK 0x01FF0001 -#define CFG_CS1_CTRL 0x003F3D60 +#define CFG_CS1_CTRL 0x00000D60 #define CFG_ATMEL_BASE CFG_CS0_BASE #else /* Intel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x00000000 #define CFG_CS0_MASK 0x01FF0001 -#define CFG_CS0_CTRL 0x003F3D60 +#define CFG_CS0_CTRL 0x00000D60 /* Atmel Flash */ #define CFG_CS1_BASE 0x04000000 #define CFG_CS1_MASK 0x00070001 @@ -388,4 +392,4 @@ #define CFG_CS3_MASK 0x00070001 #define CFG_CS3_CTRL 0x00000020 -#endif /* _JAMICA54455_H */ +#endif /* _M54455EVB_H */ -- cgit v1.3.1 From 8b6684a698500be9c142ec2c9f46cfc348e17f0c Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Wed, 24 Oct 2007 15:48:37 +0200 Subject: ATSTK1002: Remove default ethernet addresses Wolfgang is right: It's not a good idea to set up default initial ethernet addresses for a board, even though they belong to the local range. This will change the failure mode from "IT manager screams at you for using duplicate ethernet addresses" to a nice error message explaining that the ethernet address hasn't been set properly. Signed-off-by: Haavard Skinnemoen --- include/configs/atstk1002.h | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 1809fc5d864..b33e26fe011 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -114,15 +114,10 @@ #define CONFIG_AUTOBOOT_STOP_STR " " /* - * These are "locally administered ethernet addresses" generated by - * ./tools/gen_eth_addr - * - * After booting the board for the first time, new addresses should be - * generated and assigned to the environment variables "ethaddr" and - * "eth1addr". + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. */ -#define CONFIG_ETHADDR 6a:87:71:14:cd:cb -#define CONFIG_ETH1ADDR ca:f8:15:e6:3e:e6 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 #define CONFIG_NET_MULTI 1 -- cgit v1.3.1 From 6abd82e19ae93c0b4d104e50165e235915ec0875 Mon Sep 17 00:00:00 2001 From: Sergej Stepanov Date: Wed, 17 Oct 2007 11:18:42 +0200 Subject: changes for IDS8247 board support To get the IDS8247 board working following are done: - FCC2 is deactivated - FCC1 is activated - I2C is activated - CFI driver is activated - Adapted for use with LIBFDT Signed-off-by: Sergej Stepanov -- --- board/ids8247/ids8247.c | 106 +++++++++++++++++++++++++++++++--------------- include/configs/IDS8247.h | 38 ++++++++++++----- 2 files changed, 101 insertions(+), 43 deletions(-) (limited to 'include') diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index 19823a474ed..b05424d32b2 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -25,6 +25,12 @@ #include #include +#if defined(CONFIG_OF_LIBFDT) +#include +#include +#include +#endif + DECLARE_GLOBAL_DATA_PTR; /* @@ -38,12 +44,12 @@ const iop_conf_t iop_conf_tab[4][32] = { /* Port A configuration */ { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 COL */ - /* PA30 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 CRS */ - /* PA29 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 TXER */ - /* PA28 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */ - /* PA27 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ - /* PA26 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ + /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 COL */ + /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 CRS */ + /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXER */ + /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 TXEN */ + /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */ + /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */ /* PA25 */ { 0, 0, 0, 0, 1, 0 }, /* 8247_P0 */ #if defined(CONFIG_SOFT_I2C) /* PA24 */ { 1, 0, 0, 0, 1, 1 }, /* I2C_SDA2 */ @@ -53,14 +59,14 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PA23 */ { 0, 0, 0, 1, 0, 0 }, /* PA23 */ #endif /* PA22 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_DCD */ - /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */ - /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */ - /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */ - /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */ - /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */ - /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD1 */ - /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */ - /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */ + /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD3 */ + /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD2 */ + /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD1 */ + /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 TXD0 */ + /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD0 */ + /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD1 */ + /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD2 */ + /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 RXD3 */ /* PA13 */ { 0, 0, 0, 1, 1, 0 }, /* SMC2_RTS */ /* PA12 */ { 0, 0, 0, 0, 1, 0 }, /* SMC2_CTS */ /* PA11 */ { 0, 0, 0, 1, 1, 0 }, /* SMC2_DTR */ @@ -79,20 +85,20 @@ const iop_conf_t iop_conf_tab[4][32] = { /* Port B configuration */ { /* conf ppar psor pdir podr pdat */ - /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ - /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ - /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ - /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ - /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ - /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ - /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ - /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ - /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ - /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ - /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ - /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ - /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ - /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ + /* PB31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ + /* PB30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ + /* PB29 */ { 0, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ + /* PB28 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ + /* PB27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ + /* PB26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ + /* PB25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ + /* PB24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ + /* PB23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ + /* PB22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ + /* PB21 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ + /* PB20 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ + /* PB19 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ + /* PB18 */ { 0, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ /* PB17 */ { 0, 0, 0, 0, 0, 0 }, /* PB17 */ /* PB16 */ { 0, 0, 0, 0, 0, 0 }, /* PB16 */ /* PB15 */ { 0, 0, 0, 0, 0, 0 }, /* PB15 */ @@ -123,8 +129,8 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */ /* PC25 */ { 0, 1, 1, 0, 0, 0 }, /* SYNC_IN */ /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */ - /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */ - /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */ + /* PC23 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII TX_CLK */ + /* PC22 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RX_CLK */ /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */ /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */ /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK */ @@ -180,7 +186,7 @@ const iop_conf_t iop_conf_tab[4][32] = { /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ /* PD9 */ { 0, 0, 0, 0, 0, 0 }, /* PD9 */ /* PD8 */ { 0, 0, 0, 0, 0, 0 }, /* PD8 */ - /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* MII_MDIO */ + /* PD7 */ { 1, 0, 0, 1, 0, 1 }, /* MII_MDIO */ /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */ @@ -224,7 +230,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, * mapped by the controller. That means, that the initial mapping has * to be (at least) twice as large as the maximum expected size. */ - maxsize = (1 + (~orx | 0x7fff)) / 2; + maxsize = (1 + (~orx | 0x7fff))/* / 2*/; sdmr_ptr = &memctl->memc_psdmr; orx_ptr = &memctl->memc_or2; @@ -315,4 +321,38 @@ nand_init (void) printf ("%4lu MB\n", totlen >>20); } -#endif +#endif /* CFG_CMD_NAND */ + +#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) +/* + * update "memory" property in the blob + */ +void ft_blob_update(void *blob, bd_t *bd) +{ + int ret, nodeoffset = 0; + ulong memory_data[2] = {0}; + + memory_data[0] = cpu_to_be32(bd->bi_memstart); + memory_data[1] = cpu_to_be32(bd->bi_memsize); + + nodeoffset = fdt_find_node_by_path (blob, "/memory"); + if (nodeoffset >= 0) { + ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, + sizeof(memory_data)); + if (ret < 0) + printf("ft_blob_update): cannot set /memory/reg " + "property err:%s\n", fdt_strerror(ret)); + } + else { + /* memory node is required in dts */ + printf("ft_blob_update(): cannot find /memory node " + "err:%s\n", fdt_strerror(nodeoffset)); + } +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup( blob, bd); + ft_blob_update(blob, bd); +} +#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */ diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index 85d2bb3f513..bb87fae8c49 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -120,6 +120,17 @@ #define CFG_NS16550_COM1 (CFG_UART_BASE + 0x8000) + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 + +#define OF_CPU "PowerPC,8247@0" +#define OF_SOC "soc@f0000000" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc@f0000000/serial8250@e0008000" + + /* * select ethernet configuration * @@ -133,16 +144,18 @@ #undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ #define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ #undef CONFIG_ETHER_NONE /* define if ether on something else */ -#define CONFIG_ETHER_INDEX 2 /* which SCC/FCC channel for ethernet */ +#define CONFIG_ETHER_INDEX 1 /* which SCC/FCC channel for ethernet */ +#define CONFIG_ETHER_ON_FCC1 +#define FCC_ENET /* - * - Rx-CLK is CLK13 - * - Tx-CLK is CLK14 + * - Rx-CLK is CLK10 + * - Tx-CLK is CLK9 * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CFG_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CFG_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CFG_CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK9) # define CFG_CPMFCR_RAMTYPE 0 # define CFG_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) @@ -166,6 +179,8 @@ #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_RTC_PCF8563 +#define CFG_I2C_RTC_ADDR 0x51 /* * Command line configuration. @@ -211,7 +226,10 @@ */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - +#define CFG_FLASH_CFI /* The flash is CFI compatible */ +#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */ +#define CFG_FLASH_BANKS_LIST { 0xFF800000 } +#define CFG_MAX_FLASH_BANKS_DETECT 1 /* What should the base address of the main FLASH be and how big is * it (in MBytes)? This must contain TEXT_BASE from board/ids8247/config.mk * The main FLASH is whichever is connected to *CS0. @@ -227,7 +245,7 @@ * FLASH organization */ #define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */ -#define CFG_MAX_FLASH_SECT 64 /* max num of sects on one chip */ +#define CFG_MAX_FLASH_SECT 128 /* max num of sects on one chip */ #define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */ @@ -511,12 +529,12 @@ */ #define CFG_OR2 ((~(CFG_GLOBAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A10 |\ + ORxS_ROWST_PBI0_A9 |\ ORxS_NUMR_12) -#define CFG_PSDMR (PSDMR_SDAM_A13_IS_A5 |\ +#define CFG_PSDMR (PSDMR_SDAM_A14_IS_A5 |\ PSDMR_BSMA_A15_A17 |\ - PSDMR_SDA10_PBI0_A11 |\ + PSDMR_SDA10_PBI0_A10 |\ PSDMR_RFRC_5_CLK |\ PSDMR_PRETOACT_2W |\ PSDMR_ACTTORW_2W |\ -- cgit v1.3.1 From 4e62041023dc3de9d98d977bb080235bc6d035e0 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Wed, 24 Oct 2007 18:16:01 +0200 Subject: Use config_cmd_default.h instead of config_cmd_all.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/ADNPESC1.h | 50 ++++++++++++++++++------------------------- include/configs/DK1C20.h | 47 ++++++++++++++++------------------------ include/configs/DK1S10.h | 51 +++++++++++++++++--------------------------- include/configs/LANTEC.h | 48 +++++++++++++++-------------------------- include/configs/MPC8260ADS.h | 48 +++++++++++++++++------------------------ include/configs/RBC823.h | 49 +++++++++++++++++++----------------------- include/configs/ep8260.h | 47 +++++++++++++++++----------------------- include/configs/hymod.h | 49 +++++++++++++++++++++--------------------- 8 files changed, 160 insertions(+), 229 deletions(-) (limited to 'include') diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h index 77938b140da..c45c39554eb 100644 --- a/include/configs/ADNPESC1.h +++ b/include/configs/ADNPESC1.h @@ -574,38 +574,30 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_FAT -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_NAND +#include + +#define CONFIG_CMD_BSP +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_REISER +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_VFD -#undef CONFIG_CMD_USB #undef CONFIG_CMD_XIMG -#if (CFG_NIOS_CPU_SPI_NUMS != 1) -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_DATE +#if (CFG_NIOS_CPU_SPI_NUMS == 1) +#define CONFIG_CMD_DATE +#define CONFIG_CMD_SPI #endif /*------------------------------------------------------------------------ diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h index 0ddf0e3aeb9..eb780802080 100644 --- a/include/configs/DK1C20.h +++ b/include/configs/DK1C20.h @@ -459,38 +459,27 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_NAND +#include + +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IDE +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_VFD -#undef CONFIG_CMD_USB #undef CONFIG_CMD_XIMG - /*------------------------------------------------------------------------ * COMPACT FLASH *----------------------------------------------------------------------*/ diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h index 0032fd3db71..bd360717a79 100644 --- a/include/configs/DK1S10.h +++ b/include/configs/DK1S10.h @@ -466,38 +466,25 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_ASKENV -#undef COND_CMD_BEDBUG -#undef COND_CMD_BMP -#undef COND_CMD_BSP -#undef COND_CMD_CACHE -#undef COND_CMD_DATE -#undef COND_CMD_DOC -#undef COND_CMD_DTT -#undef COND_CMD_EEPROM -#undef COND_CMD_ELF -#undef COND_CMD_FAT -#undef COND_CMD_FDC -#undef COND_CMD_FDOS -#undef COND_CMD_HWFLOW -#undef COND_CMD_IDE -#undef COND_CMD_I2C -#undef COND_CMD_JFFS2 -#undef COND_CMD_KGDB -#undef COND_CMD_NAND -#undef COND_CMD_NFS -#undef COND_CMD_MMC -#undef COND_CMD_MII -#undef COND_CMD_PCI -#undef COND_CMD_PCMCIA -#undef COND_CMD_SCSI -#undef COND_CMD_SPI -#undef COND_CMD_VFD -#undef COND_CMD_USB -#undef COND_CMD_XIMG - +#include + +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DISPLAY +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_REISER +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_XIMG /*------------------------------------------------------------------------ * KGDB diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h index 46edd08a91f..e92069b5a93 100644 --- a/include/configs/LANTEC.h +++ b/include/configs/LANTEC.h @@ -87,37 +87,23 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_FAT +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_XIMG #if !(CONFIG_LANTEC >= 2) diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index 713518d0da2..23508f9f5ae 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -209,35 +209,25 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FAT -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM + #undef CONFIG_CMD_XIMG #if CONFIG_ADSTYPE == CFG_8272ADS diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 2f6de815514..fa32e33796a 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -105,36 +105,31 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BSP -#undef CONFIG_CMD_DATE -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_IRQ -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BEDBUG +#define CONFIG_CMD_BMP +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DOC +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_KGDB +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM + #undef CONFIG_CMD_SETGETDCR -#undef CONFIG_CMD_SNTP -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - /* * Miscellaneous configurable options */ diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index 025c24960d2..490db5fefd2 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -303,38 +303,29 @@ /* * Command line configuration. */ -#include +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BEDBUG +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_BSP #undef CONFIG_CMD_DCR -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_DTT -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_KGDB -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - /* Where do the internal registers live? */ #define CFG_IMMR 0xF0000000 #define CFG_DEFAULT_IMMR 0x00010000 diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 2547afb3cf0..01e79701623 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -185,33 +185,34 @@ /* * Command line configuration. */ -#include - -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_BMP -#undef CONFIG_CMD_DISPLAY -#undef CONFIG_CMD_DOC -#undef CONFIG_CMD_EXT2 -#undef CONFIG_CMD_FDC -#undef CONFIG_CMD_FDOS +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_BSP +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_CDP +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_DTT +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMMAP +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_KGDB +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_PORTIO +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SAVES +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SNTP + #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_HWFLOW -#undef CONFIG_CMD_IDE -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_NAND -#undef CONFIG_CMD_MFSL -#undef CONFIG_CMD_MMC -#undef CONFIG_CMD_PCMCIA -#undef CONFIG_CMD_PCI -#undef CONFIG_CMD_USB -#undef CONFIG_CMD_REISER -#undef CONFIG_CMD_SCSI -#undef CONFIG_CMD_SPI -#undef CONFIG_CMD_UNIVERSE -#undef CONFIG_CMD_VFD #undef CONFIG_CMD_XIMG - #ifdef DEBUG #define CONFIG_BOOTDELAY -1 /* autoboot disabled */ #else -- cgit v1.3.1 From bbf4796f6498fbade56d56eff3a0a49b299d93e5 Mon Sep 17 00:00:00 2001 From: Zhang Wei Date: Thu, 25 Oct 2007 17:30:04 +0800 Subject: Fix USB support issue for MPC8641HPCN board. The configuration file has already enabled USB, but it missed definition of CFG_OHCI_SWAP_REG_ACCESS, the USB on MPC8641HPCN can not work because of the wrong USB register endian. And add the USB command to U-Boot commands list. Signed-off-by: Zhang Wei --- include/configs/MPC8641HPCN.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 7d8a380dc04..aa6dbc47adf 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -346,6 +346,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CFG_USB_EVENT_POLL 1 #define CFG_USB_OHCI_SLOT_NAME "ohci_pci" #define CFG_USB_OHCI_MAX_ROOT_PORTS 15 +#define CFG_OHCI_SWAP_REG_ACCESS 1 #if !defined(CONFIG_PCI_PNP) #define PCI_ENET0_IOADDR 0xe0000000 @@ -544,6 +545,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CMD_PCI #define CONFIG_CMD_SCSI #define CONFIG_CMD_EXT2 + #define CONFIG_CMD_USB #endif -- cgit v1.3.1 From 992742a5b09d9040adbd156fb90756af66ade310 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 3 Nov 2007 23:09:27 +0100 Subject: Cleanup coding style; update CHANGELOG Signed-off-by: Wolfgang Denk --- CHANGELOG | 519 ++++++++++++++++++++++++++++++++++++++++++++ cpu/mpc85xx/start.S | 4 +- include/configs/M54455EVB.h | 2 +- net/bootp.c | 5 +- 4 files changed, 524 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/CHANGELOG b/CHANGELOG index 549c4f919cb..0068947f754 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,328 @@ +commit e881cb563e32f45832b7b6db77bdcd017adcbb41 +Author: Bruce Adler +Date: Fri Nov 2 13:15:42 2007 -0700 + + fix wording in README + + Changed the wording to properly describe the shadowing + of the environment from ROM to RAM + + Signed-off-by: Bruce Adler + +commit ad845beef06245426c57b53dcdc01b7dc70e0d45 +Author: Shinya Kuribayashi +Date: Wed Oct 31 02:18:15 2007 +0900 + + blackfin: Move `-D__BLACKFIN__' to $(ARCH)_config.mk + + Signed-off-by: Shinya Kuribayashi + +commit ec22755799466c8a103664bb3a5e647bf9c238f4 +Author: Vlad Lungu +Date: Thu Oct 25 16:08:14 2007 +0300 + + Trimmed some variables in ne2000.c + + Signed-off-by: Vlad Lungu + +commit eb6f214d3644b2a77968c176ed36dcf858cfe7e0 +Author: Zhang Wei +Date: Thu Oct 25 17:51:27 2007 +0800 + + Fix the issue of usb_kbd driver missing the scan code of key 'z'. + + The scan code of the key 'z' is 0x1d, which should be handled. + + The change has be tested on NOVATEK USB keyboard and ULI PCI OHCI + controller. + + Signed-off-by: Zhang Wei + +commit bbf4796f6498fbade56d56eff3a0a49b299d93e5 +Author: Zhang Wei +Date: Thu Oct 25 17:30:04 2007 +0800 + + Fix USB support issue for MPC8641HPCN board. + + The configuration file has already enabled USB, but it + missed definition of CFG_OHCI_SWAP_REG_ACCESS, the USB + on MPC8641HPCN can not work because of the wrong USB + register endian. + + And add the USB command to U-Boot commands list. + + Signed-off-by: Zhang Wei + +commit 4e62041023dc3de9d98d977bb080235bc6d035e0 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Wed Oct 24 18:16:01 2007 +0200 + + Use config_cmd_default.h instead of config_cmd_all.h + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 56622f87857439b1c221e9deef11a9d5bb5d4308 +Author: Marian Balakowicz +Date: Wed Oct 24 01:37:36 2007 +0200 + + TQM5200: Call usb_cpu_init() during board init + + usb_cpu_init() configures GPS USB pins, clocks, etc. and + is required for proper operation of kernel USB subsystem. + This setup was previously done in the kernel by the fixup + code which is being removed, thus low level init must be + done by U-boot now. + + Signed-off-by: Marian Balakowicz + +commit 29c29c0267fe857e72014ce90c5d35b2ef6302bd +Author: Guennadi Liakhovetski +Date: Tue Oct 23 16:25:50 2007 +0200 + + Fix typo in nfs.c + + An obvious typo. Originally fixed in linkstation u-boot port. + + Signed-off-by: Guennadi Liakhovetski + +commit 59543fe00a4ce720ef9f5aa7fb387c6daf1c7d78 +Author: Guennadi Liakhovetski +Date: Tue Oct 23 14:35:05 2007 +0200 + + Fix a typo in cpu/mpc824x/interrupts.c + + Since December 2003 the timer_interrupt_cpu() function in + cpu/mpc824x/interrupts.c contains what seems to be a superfluous + parameter. Remove it. + + Signed-off-by: Guennadi Liakhovetski + +commit c9e7b9b9a1700fe009678d1f9b41e6364ac5df2d +Author: Sergej Stepanov +Date: Wed Oct 17 11:13:51 2007 +0200 + + add ft_cpu_setup(..) on mpc8260 + + Add ft_cpu_setup(..)-function to adapt it for use with libfdt + based on code from mpc5xxx + + Sigend-off-by: Sergej Stepanov + -- + +commit 6abd82e19ae93c0b4d104e50165e235915ec0875 +Author: Sergej Stepanov +Date: Wed Oct 17 11:18:42 2007 +0200 + + changes for IDS8247 board support + + To get the IDS8247 board working following are done: + - FCC2 is deactivated + - FCC1 is activated + - I2C is activated + - CFI driver is activated + - Adapted for use with LIBFDT + + Signed-off-by: Sergej Stepanov + -- + +commit 8b6684a698500be9c142ec2c9f46cfc348e17f0c +Author: Haavard Skinnemoen +Date: Wed Oct 24 15:48:37 2007 +0200 + + ATSTK1002: Remove default ethernet addresses + + Wolfgang is right: It's not a good idea to set up default initial + ethernet addresses for a board, even though they belong to the local + range. + + This will change the failure mode from "IT manager screams at you for + using duplicate ethernet addresses" to a nice error message explaining + that the ethernet address hasn't been set properly. + + Signed-off-by: Haavard Skinnemoen + +commit e5c794e491a57d829b6d8733e2ed8368a2269abf +Author: Justin Flammia +Date: Mon Oct 29 17:40:35 2007 -0400 + + DHCP Client Fix + + This is a multi-part message in MIME format. + + commit e6e505eae94ed721e123e177489291fc4544b7b8 + Author: Justin Flammia + Date: Mon Oct 29 17:19:03 2007 -0400 + + Found a bug in the way the DHCP Request packet is built, where the IP address + that is offered by the server is bound to prematurely. This patch is a fix of + that bug where the IP address offered by the DHCP server is not used until + after the DHCP ACK from the server is received. + + Signed-off-by: Justin Flammia + Signed-off-by: Ben Warren + +commit e8ee8f3ade2a06c1893dd5e68f223070d650c7ed +Author: TsiChungLiew +Date: Thu Oct 25 17:16:22 2007 -0500 + + ColdFire 54455: Fix correct boot location for atmel and intel + + Signed-off-by: TsiChungLiew + +commit 688e8eb414ac111cca7ce60bdf30e805ab9a7bcb +Author: TsiChungLiew +Date: Thu Oct 25 17:14:00 2007 -0500 + + ColdFire: Fix build error when CONFIG_WATCHDOG is defined + + Signed-off-by: TsiChungLiew + +commit c67e12e705b204cfe914e3e3e693d69a445dcabf +Author: TsiChungLiew +Date: Thu Oct 25 17:12:36 2007 -0500 + + ColdFire 5329: Assign correct SDRAM size and fix cache + + Signed-off-by: TsiChungLiew + +commit 95e9f2c212a65610b2e59a5c00d0113383a4da0b +Author: TsiChungLiew +Date: Thu Oct 25 17:10:23 2007 -0500 + + ColdFire 5253: Assign correct SDRAM size + + Signed-off-by: TsiChungLiew + +commit 2acefa72ee0026f862ab65597ca687428f63a973 +Author: TsiChungLiew +Date: Thu Oct 25 17:09:17 2007 -0500 + + ColdFire 5282: Fix external flash boot and return dramsize + + Signed-off-by: TsiChungLiew + +commit d78791ae914d4e7c5edca1cdad73b3dc81a4eb82 +Author: Bartlomiej Sieka +Date: Thu Oct 25 17:20:01 2007 +0200 + + TQM5200: increase kernel_addr_r and fdt_addr_r (hinted by Wolfgang Denk). + + Signed-off-by: Bartlomiej Sieka + +commit 1a0ce20aa4cb4e3068da04e7290ee9986fd0b834 +Author: Martin Krause +Date: Wed Oct 24 08:42:25 2007 +0200 + + TQM5200: fix spurious characters on second serial interface + + With this patch PSC3 is configured as UART. This is done, because if + the pins of PSC3 are not configured at all (-> all pins are GPI), + due to crosstalk, spurious characters may be send over the RX232_2_TXD + signal line. + + Signed-off-by: Martin Krause + Signed-off-by: Grant Likely + +commit be4a87f11e297a5cededbf7dd71c0248f3874acd +Author: Martin Krause +Date: Wed Oct 24 08:41:27 2007 +0200 + + TQM5200S: fix commands for STK52xx base board because of missing SM501 grafic controller + + Some commands for the STK52xx base board try to access the SM501 grafic + controller. But the TQM5200S has no grafic controller (only the TQM5200 + and the TQM5200B have). This patch deactivates the commands accessing + the SM501 for the TQM5200S. + + Signed-off-by: Martin Krause + Signed-off-by: Grant Likely + +commit b31f64343ead9482cd439b1adbe4c34026a641b1 +Author: Martin Krause +Date: Mon Oct 22 16:45:53 2007 +0200 + + TQM5200: fix spurious characters on second serial interface + + With this patch PSC3 is configured as UART. This is done, because if + the pins of PSC3 are not configured at all (-> all pins are GPI), + due to crosstalk, spurious characters may be send over the RX232_2_TXD + signal line. + + Signed-off-by: Martin Krause + +commit 0fc0f91b20ffa802f5a66534ca5c2844910583f6 +Author: Martin Krause +Date: Mon Oct 22 16:40:06 2007 +0200 + + TQM5200S: fix commands for STK52xx base board because of missing SM501 grafic controller + + Some commands for the STK52xx base board try to access the SM501 grafic + controller. But the TQM5200S has no grafic controller (only the TQM5200 + and the TQM5200B have). This patch deactivates the commands accessing + the SM501 for the TQM5200S. + + Signed-off-by: Martin Krause + +commit 7b0a42219f30277f71f4405cbaf8a269f6d2d227 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Oct 21 09:14:28 2007 +0200 + + Mips: Fix string functions differ prototype declaration + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit cb8250fe4b3c4ed549b270e8a20bc22060e7e1d2 +Author: Ed Swarthout +Date: Fri Oct 19 17:51:40 2007 -0500 + + fsl_pci_init enable COMMAND_MEMORY if inbound window + + Patch 16e23c3f removed PCSRBAR allocation. But passing zero windows + to pciauto_setup_device has the side effect of not getting + COMMAND_MEMORY set. + + Signed-off-by: Ed Swarthout + +commit e9d0d527992566ebef9826962ff1745b2f082b92 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 19 10:55:24 2007 +0200 + + delta: Fix OHCI_REGS_BASE undeclared and wait_ms implicit declaration + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 9c4884f54da982ce990c7d1760ac81b0704d3c64 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 19 08:10:15 2007 +0200 + + fix warning: no return statement in function returning non-void + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit e78220f6e514206757acfe247297fc9a328a881f +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 19 06:33:45 2007 +0200 + + xsengine: Fix no partition type specified, use DOS as default + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 10cdb8dbd67a818823ab9ec88b68fc348903db59 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 19 00:24:59 2007 +0200 + + lubbock: Fix no partition type specified, use DOS as default + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 41b4d282d38fa7231c315c5f6cfff5bdd24e0191 +Author: Wolfgang Denk +Date: Tue Oct 23 16:50:03 2007 +0200 + + Coding style: keep lists sorted; update CHANGELOG + + Signed-off-by: Wolfgang Denk + commit 58b74b05c621e2835ecf4e2d3243042cf4186777 Author: Jean-Christophe PLAGNIOL-VILLARD Date: Fri Oct 19 00:09:05 2007 +0200 @@ -51,6 +376,112 @@ Date: Wed Oct 17 11:56:31 2007 -0500 are added to u-boot. Signed-off-by Rune Torgersen +commit d3afa1ee19345a31fd1eaad3e98b97d13ca47315 +Author: Bartlomiej Sieka +Date: Tue Oct 23 13:14:10 2007 +0200 + + Motion-PRO: Update configuration to accomodate next generation board. + + New board has faster oscillator and a different Flash chip. This affects: + - CFG_MPC5XXX_CLKIN + - SDRAM timings + - Flash CS configuration (timings) + - Flash sector size, and thus MTD partition layout + - malloc() arena size (due to bigger Flash sectors) + - smaller memory test range (due to bigger malloc() arena) + + This patch also enables more extensive memory testing via "mtest". + + Signed-off-by: Bartlomiej Sieka + +commit eff501904df2bf1724a750062628ba2c51dbb1f8 +Author: Bartlomiej Sieka +Date: Tue Oct 23 11:36:07 2007 +0200 + + Motion-PRO: Add setting of SDelay reg. to SDRAM controller configuration. + + Per AN3221 (MPC5200B SDRAM Initialization and Configuration), the SDelay + register must be written a value of 0x00000004 as the first step of the + SDRAM contorller configuration. + + Signed-off-by: Bartlomiej Sieka + +commit 7a9348728ebda63cdbaacffd83099aa71d9d4c54 +Author: Peter Pearse +Date: Tue Oct 23 10:22:16 2007 +0100 + + Move PL01* serial drivers to drivers/serial and adjust Makefiles. + +commit de9a738faa7c2f47286119c3bfebc3dfbfe7d86d +Author: Vlad Lungu +Date: Sun Oct 21 22:10:10 2007 +0900 + + [MIPS] Fix UNCACHED_SDRAM + + PHYSADDR is for physical address, KSEG1ADDR is for uncached. + + Signed-off-by: Vlad Lungu + Signed-off-by: Shinya Kuribayashi + +commit 00101dd7a32d12f698150123e47e4b3420279f86 +Author: Shinya Kuribayashi +Date: Sun Oct 21 21:30:42 2007 +0900 + + [MIPS] Add PIC-related switches to PLATFORM_{CPP,LD}FLAGS and cleanup + + Signed-off-by: Shinya Kuribayashi + +commit eb700636db017d310edaeb559b13d82588560674 +Author: Shinya Kuribayashi +Date: Sun Oct 21 10:55:37 2007 +0900 + + [MIPS] u-boot.lds: Define _gp in a standard manner + + Signed-off-by: Shinya Kuribayashi + +commit 22069215eb7adf5a3888bf7c7784ea9d70a72cd0 +Author: Shinya Kuribayashi +Date: Sun Oct 21 10:55:36 2007 +0900 + + [MIPS] Fix $gp usage + + Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use. + As a general principle, we should use _gp for $gp. + + Thanks to linker script's help we fortunately have _gp which equals to + _GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not + be able to access to GOT entires, global variables and procedure entry + points. The right thing to do is to use _gp. + + This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_' + which holds the offset from _gp. When updating GOT entries, we use this + offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_. + + This patch is originally submitted by Vlad Lungu , then + I made some change to leave over num_got_entries. + + Signed-off-by: Shinya Kuribayashi + Cc: Vlad Lungu + +commit cbf2323b5b8285ea01acba7bbb905a3162d9b021 +Author: Shinya Kuribayashi +Date: Sun Oct 21 10:55:36 2007 +0900 + + [MIPS] u-boot.lds: Fix __got_start and __got_end + + Ensure that __got_start points to top of the `.got', and __got_end points + to bottom as well, so that we never fail to count num_got_entries. + + Signed-off-by: Shinya Kuribayashi + +commit e5f325fec5b48ae705c89522923ba5a2e37cd5c7 +Author: Shinya Kuribayashi +Date: Sun Oct 21 10:55:36 2007 +0900 + + [MIPS] u-boot.lds: Remove duplicated .sdata section + + Signed-off-by: Shinya Kuribayashi + commit 05bf4919c1ce49cdedadacd564d0786a8ed796a1 Author: Wolfgang Denk Date: Sun Oct 21 01:01:17 2007 +0200 @@ -73,6 +504,84 @@ Date: Thu Oct 4 20:47:10 2007 +0300 Signed-off-by: Vlad Lungu +commit df90968b48fb34fa9072fab150db2ac89678f537 +Author: urwithsughosh@gmail.com +Date: Mon Sep 24 13:32:13 2007 -0400 + + Setting MSR[DE] in do_reset + + Hello, + This patch ensures the soft reset of the board for the 85xx boards + by setting the MSR[DE] in the do_reset function. + + Signed-off-by: Sughosh Ganu + +commit 1e701e701304b3c3a3768ca83dd2ab7b9e88c77d +Author: urwithsughosh@gmail.com +Date: Mon Sep 24 13:36:01 2007 -0400 + + MSR overwrite fix + + Hello, + This patch fixes the MSR overwrite in the start.S when moving out of + the last 4K page. + + Signed-off-by: Sughosh Ganu + +commit 5c7ea64bb74a850a2b2303f853a8270695ad8602 +Author: Dan Wilson +Date: Fri Oct 19 11:33:48 2007 -0500 + + tsec driver should clear RHALT on startup + + This was causing problems for some people. + + Signed-off-by: Alain Gravel + Signed-off-by: Dan Wilson + Signed-off-by: Andy Fleming + +commit 7600d47b8f6a10019e537dc9a62aa1498df58d25 +Author: Kumar Gala +Date: Thu Oct 11 00:29:18 2007 -0500 + + Improve handling of PCI interrupt device tree fixup on MPC85xx CDS + + On the MPC85xx CDS we have two issues: + + 1. The device tree fixup code did not check to see if the property we are + trying to update is actually found. Its possible that it would update + random memory starting at 0. + + 2. Newer Linux kernel's have moved the location of the PCI nodes to be + sibilings of the soc node and not children. The explicit PATH to the PCI + node would not be found for these device trees. Add the ability to handle + both paths. In the future we shouldn't handle such fixups by explicit path. + + Signed-off-by: Kumar Gala + +commit a3063eec775719b7e91023bbec3f64b3118791df +Author: Kumar Gala +Date: Thu Oct 11 00:18:48 2007 -0500 + + Set OF_STDOUT_PATH to match the default console on MPC8568 MDS + + On the MPC8568 MDS we use ttyS0, UART0, etc. as the standard configured + console. Make it so we match that config what we tell Linux as the early + STDOUT console. + + Signed-off-by: Kumar Gala + +commit e1ce3cb617bb06f91f82f98915391175addf3e82 +Author: Kumar Gala +Date: Tue Oct 2 11:12:27 2007 -0500 + + Remove magic numbers from cache related operations for mpc85xx + + The mpc85xx start code uses some magic numbers that we actually + have #defines for in so use those instead. + + Signed-off-by: Kumar Gala + commit 5441f61a3d8b7034f19fc1361183e936198e6dbb Author: Detlev Zundel Date: Fri Oct 19 16:47:26 2007 +0200 @@ -409,6 +918,16 @@ Date: Tue Sep 11 14:12:55 2007 +0200 Signed-off-by: Stefan Roese +commit 1487adbdcf9594bb2eb686325a6f9540dad1b70a +Author: Ed Swarthout +Date: Wed Sep 26 16:35:54 2007 -0500 + + 85xx io out functions need sync after write. + + This fixes the mc146818 rtc_read/write functions for 85xx. + + Signed-off-by: Ed Swarthout + commit 0d38effc6e359e6b1b0c78d66e8bc1a4dc15a2ae Author: Grant Likely Date: Tue Sep 25 15:48:05 2007 -0600 diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index ada6ea505fb..b769ef8a76a 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -268,7 +268,7 @@ _start_e500: */ lis r3,CFG_INIT_RAM_ADDR@h ori r3,r3,CFG_INIT_RAM_ADDR@l - li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) + li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r2 li r0,0 1: @@ -1061,7 +1061,7 @@ unlock_ram_in_cache: /* invalidate the INIT_RAM section */ lis r3,(CFG_INIT_RAM_ADDR & ~31)@h ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l - li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) + li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r4 1: icbi r0,r3 dcbi r0,r3 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index ba050cb7e46..db309584b9a 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -278,7 +278,7 @@ * FLASH organization */ #ifdef CFG_ATMEL_BOOT -# define CFG_FLASH_BASE CFG_CS0_BASE +# define CFG_FLASH_BASE CFG_CS0_BASE # define CFG_FLASH0_BASE CFG_CS0_BASE # define CFG_FLASH1_BASE CFG_CS1_BASE # define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) diff --git a/net/bootp.c b/net/bootp.c index cfe6f8dd6b9..55dcc81db60 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -979,7 +979,6 @@ void DhcpRequest(void) { BootpRequest(); } -#endif - -#endif +#endif /* CONFIG_CMD_DHCP */ +#endif /* CONFIG_CMD_NET */ -- cgit v1.3.1 From 298035df4948b113d29ac0e694717d34b95bc5dc Mon Sep 17 00:00:00 2001 From: Larry Johnson Date: Wed, 31 Oct 2007 11:21:29 -0500 Subject: NET: Cosmetic changes Signed-off-by: Larry Johnson Signed-off-by: Ben Warren --- common/miiphyutil.c | 141 +++++++++++++++++++++++++--------------------------- include/miiphy.h | 92 ++++++++++++++++------------------ 2 files changed, 110 insertions(+), 123 deletions(-) (limited to 'include') diff --git a/common/miiphyutil.c b/common/miiphyutil.c index c69501fedfb..58ebc5ec2c1 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -49,10 +49,10 @@ struct mii_dev { struct list_head link; char *name; - int (* read)(char *devname, unsigned char addr, - unsigned char reg, unsigned short *value); - int (* write)(char *devname, unsigned char addr, - unsigned char reg, unsigned short value); + int (*read) (char *devname, unsigned char addr, + unsigned char reg, unsigned short *value); + int (*write) (char *devname, unsigned char addr, + unsigned char reg, unsigned short value); }; static struct list_head mii_devs; @@ -62,21 +62,21 @@ static struct mii_dev *current_mii; * * Initialize global data. Need to be called before any other miiphy routine. */ -void miiphy_init() +void miiphy_init () { - INIT_LIST_HEAD(&mii_devs); - current_mii = NULL; + INIT_LIST_HEAD (&mii_devs); + current_mii = NULL; } /***************************************************************************** * * Register read and write MII access routines for the device . */ -void miiphy_register(char *name, - int (* read)(char *devname, unsigned char addr, - unsigned char reg, unsigned short *value), - int (* write)(char *devname, unsigned char addr, - unsigned char reg, unsigned short value)) +void miiphy_register (char *name, + int (*read) (char *devname, unsigned char addr, + unsigned char reg, unsigned short *value), + int (*write) (char *devname, unsigned char addr, + unsigned char reg, unsigned short value)) { struct list_head *entry; struct mii_dev *new_dev; @@ -84,63 +84,64 @@ void miiphy_register(char *name, unsigned int name_len; /* check if we have unique name */ - list_for_each(entry, &mii_devs) { - miidev = list_entry(entry, struct mii_dev, link); - if (strcmp(miidev->name, name) == 0) { - printf("miiphy_register: non unique device name '%s'\n", - name); + list_for_each (entry, &mii_devs) { + miidev = list_entry (entry, struct mii_dev, link); + if (strcmp (miidev->name, name) == 0) { + printf ("miiphy_register: non unique device name " + "'%s'\n", name); return; } } /* allocate memory */ - name_len = strlen(name); - new_dev = (struct mii_dev *)malloc(sizeof(struct mii_dev) + name_len + 1); + name_len = strlen (name); + new_dev = + (struct mii_dev *)malloc (sizeof (struct mii_dev) + name_len + 1); - if(new_dev == NULL) { - printf("miiphy_register: cannot allocate memory for '%s'\n", - name); + if (new_dev == NULL) { + printf ("miiphy_register: cannot allocate memory for '%s'\n", + name); return; } - memset(new_dev, 0, sizeof(struct mii_dev) + name_len); + memset (new_dev, 0, sizeof (struct mii_dev) + name_len); /* initalize mii_dev struct fields */ - INIT_LIST_HEAD(&new_dev->link); + INIT_LIST_HEAD (&new_dev->link); new_dev->read = read; new_dev->write = write; new_dev->name = (char *)(new_dev + 1); - strncpy(new_dev->name, name, name_len); + strncpy (new_dev->name, name, name_len); new_dev->name[name_len] = '\0'; - debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n", - new_dev->name, new_dev->read, new_dev->write); + debug ("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n", + new_dev->name, new_dev->read, new_dev->write); /* add it to the list */ - list_add_tail(&new_dev->link, &mii_devs); + list_add_tail (&new_dev->link, &mii_devs); if (!current_mii) current_mii = new_dev; } -int miiphy_set_current_dev(char *devname) +int miiphy_set_current_dev (char *devname) { struct list_head *entry; struct mii_dev *dev; - list_for_each(entry, &mii_devs) { - dev = list_entry(entry, struct mii_dev, link); + list_for_each (entry, &mii_devs) { + dev = list_entry (entry, struct mii_dev, link); - if (strcmp(devname, dev->name) == 0) { + if (strcmp (devname, dev->name) == 0) { current_mii = dev; return 0; } } - printf("No such device: %s\n", devname); + printf ("No such device: %s\n", devname); return 1; } -char *miiphy_get_current_dev() +char *miiphy_get_current_dev () { if (current_mii) return current_mii->name; @@ -156,8 +157,8 @@ char *miiphy_get_current_dev() * Returns: * 0 on success */ -int miiphy_read(char *devname, unsigned char addr, unsigned char reg, - unsigned short *value) +int miiphy_read (char *devname, unsigned char addr, unsigned char reg, + unsigned short *value) { struct list_head *entry; struct mii_dev *dev; @@ -165,22 +166,22 @@ int miiphy_read(char *devname, unsigned char addr, unsigned char reg, int read_ret = 0; if (!devname) { - printf("NULL device name!\n"); + printf ("NULL device name!\n"); return 1; } - list_for_each(entry, &mii_devs) { - dev = list_entry(entry, struct mii_dev, link); + list_for_each (entry, &mii_devs) { + dev = list_entry (entry, struct mii_dev, link); - if (strcmp(devname, dev->name) == 0) { + if (strcmp (devname, dev->name) == 0) { found_dev = 1; - read_ret = dev->read(devname, addr, reg, value); + read_ret = dev->read (devname, addr, reg, value); break; } } if (found_dev == 0) - printf("No such device: %s\n", devname); + printf ("No such device: %s\n", devname); return ((found_dev) ? read_ret : 1); } @@ -193,8 +194,8 @@ int miiphy_read(char *devname, unsigned char addr, unsigned char reg, * Returns: * 0 on success */ -int miiphy_write(char *devname, unsigned char addr, unsigned char reg, - unsigned short value) +int miiphy_write (char *devname, unsigned char addr, unsigned char reg, + unsigned short value) { struct list_head *entry; struct mii_dev *dev; @@ -202,22 +203,22 @@ int miiphy_write(char *devname, unsigned char addr, unsigned char reg, int write_ret = 0; if (!devname) { - printf("NULL device name!\n"); + printf ("NULL device name!\n"); return 1; } - list_for_each(entry, &mii_devs) { - dev = list_entry(entry, struct mii_dev, link); + list_for_each (entry, &mii_devs) { + dev = list_entry (entry, struct mii_dev, link); - if (strcmp(devname, dev->name) == 0) { + if (strcmp (devname, dev->name) == 0) { found_dev = 1; - write_ret = dev->write(devname, addr, reg, value); + write_ret = dev->write (devname, addr, reg, value); break; } } if (found_dev == 0) - printf("No such device: %s\n", devname); + printf ("No such device: %s\n", devname); return ((found_dev) ? write_ret : 1); } @@ -226,23 +227,22 @@ int miiphy_write(char *devname, unsigned char addr, unsigned char reg, * * Print out list of registered MII capable devices. */ -void miiphy_listdev(void) +void miiphy_listdev (void) { struct list_head *entry; struct mii_dev *dev; - puts("MII devices: "); - list_for_each(entry, &mii_devs) { - dev = list_entry(entry, struct mii_dev, link); - printf("'%s' ", dev->name); + puts ("MII devices: "); + list_for_each (entry, &mii_devs) { + dev = list_entry (entry, struct mii_dev, link); + printf ("'%s' ", dev->name); } - puts("\n"); + puts ("\n"); if (current_mii) - printf("Current device: '%s'\n", current_mii->name); + printf ("Current device: '%s'\n", current_mii->name); } - /***************************************************************************** * * Read the OUI, manufacture's model number, and revision number. @@ -254,9 +254,7 @@ void miiphy_listdev(void) * Returns: * 0 on success */ -int miiphy_info (char *devname, - unsigned char addr, - unsigned int *oui, +int miiphy_info (char *devname, unsigned char addr, unsigned int *oui, unsigned char *model, unsigned char *rev) { unsigned int reg = 0; @@ -288,13 +286,12 @@ int miiphy_info (char *devname, #ifdef DEBUG printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg); #endif - *oui = ( reg >> 10); - *model = (unsigned char) ((reg >> 4) & 0x0000003F); - *rev = (unsigned char) ( reg & 0x0000000F); + *oui = (reg >> 10); + *model = (unsigned char)((reg >> 4) & 0x0000003F); + *rev = (unsigned char)(reg & 0x0000000F); return (0); } - /***************************************************************************** * * Reset the PHY. @@ -345,7 +342,6 @@ int miiphy_reset (char *devname, unsigned char addr) return (0); } - /***************************************************************************** * * Determine the ethernet speed (10/100). @@ -359,7 +355,8 @@ int miiphy_speed (char *devname, unsigned char addr) printf ("PHY 1000BT Status read failed\n"); } else { if (reg != 0xFFFF) { - if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) !=0) { + if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) + != 0) { return (_1000BASET); } } @@ -393,7 +390,6 @@ int miiphy_speed (char *devname, unsigned char addr) } - /***************************************************************************** * * Determine full/half duplex. @@ -406,9 +402,9 @@ int miiphy_duplex (char *devname, unsigned char addr) if (miiphy_read (devname, addr, PHY_1000BTSR, ®)) { printf ("PHY 1000BT Status read failed\n"); } else { - if ( (reg != 0xFFFF) && - (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) ) { - if ((reg & PHY_1000BTSR_1000FD) !=0) { + if ((reg != 0xFFFF) && + (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) { + if ((reg & PHY_1000BTSR_1000FD) != 0) { return (FULL); } else { return (HALF); @@ -455,7 +451,7 @@ int miiphy_link (char *devname, unsigned char addr) unsigned short reg; /* dummy read; needed to latch some phys */ - (void)miiphy_read(devname, addr, PHY_BMSR, ®); + (void)miiphy_read (devname, addr, PHY_BMSR, ®); if (miiphy_read (devname, addr, PHY_BMSR, ®)) { puts ("PHY_BMSR read failed, assuming no link\n"); return (0); @@ -469,5 +465,4 @@ int miiphy_link (char *devname, unsigned char addr) } } #endif - #endif /* CONFIG_MII */ diff --git a/include/miiphy.h b/include/miiphy.h index 71716b04d40..42f2ad0c967 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -26,56 +26,48 @@ | | Author: Mark Wisner | -| Change Activity- -| -| Date Description of Change BY -| --------- --------------------- --- -| 04-May-99 Created MKW -| 07-Jul-99 Added full duplex support MKW -| 08-Sep-01 Tweaks gvb -| +----------------------------------------------------------------------------*/ #ifndef _miiphy_h_ #define _miiphy_h_ #include -int miiphy_read(char *devname, unsigned char addr, unsigned char reg, - unsigned short *value); -int miiphy_write(char *devname, unsigned char addr, unsigned char reg, - unsigned short value); -int miiphy_info(char *devname, unsigned char addr, unsigned int *oui, - unsigned char *model, unsigned char *rev); -int miiphy_reset(char *devname, unsigned char addr); -int miiphy_speed(char *devname, unsigned char addr); -int miiphy_duplex(char *devname, unsigned char addr); +int miiphy_read (char *devname, unsigned char addr, unsigned char reg, + unsigned short *value); +int miiphy_write (char *devname, unsigned char addr, unsigned char reg, + unsigned short value); +int miiphy_info (char *devname, unsigned char addr, unsigned int *oui, + unsigned char *model, unsigned char *rev); +int miiphy_reset (char *devname, unsigned char addr); +int miiphy_speed (char *devname, unsigned char addr); +int miiphy_duplex (char *devname, unsigned char addr); #ifdef CFG_FAULT_ECHO_LINK_DOWN -int miiphy_link(char *devname, unsigned char addr); +int miiphy_link (char *devname, unsigned char addr); #endif -void miiphy_init(void); +void miiphy_init (void); -void miiphy_register(char *devname, - int (* read)(char *devname, unsigned char addr, - unsigned char reg, unsigned short *value), - int (* write)(char *devname, unsigned char addr, - unsigned char reg, unsigned short value)); +void miiphy_register (char *devname, + int (*read) (char *devname, unsigned char addr, + unsigned char reg, unsigned short *value), + int (*write) (char *devname, unsigned char addr, + unsigned char reg, unsigned short value)); -int miiphy_set_current_dev(char *devname); -char *miiphy_get_current_dev(void); +int miiphy_set_current_dev (char *devname); +char *miiphy_get_current_dev (void); -void miiphy_listdev(void); +void miiphy_listdev (void); #define BB_MII_DEVNAME "bbmii" int bb_miiphy_read (char *devname, unsigned char addr, - unsigned char reg, unsigned short *value); + unsigned char reg, unsigned short *value); int bb_miiphy_write (char *devname, unsigned char addr, - unsigned char reg, unsigned short value); + unsigned char reg, unsigned short value); /* phy seed setup */ #define AUTO 99 -#define _1000BASET 1000 +#define _1000BASET 1000 #define _100BASET 100 #define _10BASET 10 #define HALF 22 @@ -90,9 +82,9 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_ANLPAR 0x05 #define PHY_ANER 0x06 #define PHY_ANNPTR 0x07 -#define PHY_ANLPNP 0x08 -#define PHY_1000BTCR 0x09 -#define PHY_1000BTSR 0x0A +#define PHY_ANLPNP 0x08 +#define PHY_1000BTCR 0x09 +#define PHY_1000BTSR 0x0A #define PHY_PHYSTS 0x10 #define PHY_MIPSCR 0x11 #define PHY_MIPGSR 0x12 @@ -115,10 +107,10 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_BMCR_DPLX 0x0100 #define PHY_BMCR_COL_TST 0x0080 -#define PHY_BMCR_SPEED_MASK 0x2040 -#define PHY_BMCR_1000_MBPS 0x0040 -#define PHY_BMCR_100_MBPS 0x2000 -#define PHY_BMCR_10_MBPS 0x0000 +#define PHY_BMCR_SPEED_MASK 0x2040 +#define PHY_BMCR_1000_MBPS 0x0040 +#define PHY_BMCR_100_MBPS 0x2000 +#define PHY_BMCR_10_MBPS 0x0000 /* phy BMSR */ #define PHY_BMSR_100T4 0x8000 @@ -143,18 +135,18 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_ANLPAR_TX 0x0080 #define PHY_ANLPAR_10FD 0x0040 #define PHY_ANLPAR_10 0x0020 -#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */ - -#define PHY_ANLPAR_PSB_MASK 0x001f -#define PHY_ANLPAR_PSB_802_3 0x0001 -#define PHY_ANLPAR_PSB_802_9 0x0002 - -/* PHY_1000BTSR */ -#define PHY_1000BTSR_MSCF 0x8000 -#define PHY_1000BTSR_MSCR 0x4000 -#define PHY_1000BTSR_LRS 0x2000 -#define PHY_1000BTSR_RRS 0x1000 -#define PHY_1000BTSR_1000FD 0x0800 -#define PHY_1000BTSR_1000HD 0x0400 +#define PHY_ANLPAR_100 0x0380 /* we can run at 100 */ + +#define PHY_ANLPAR_PSB_MASK 0x001f +#define PHY_ANLPAR_PSB_802_3 0x0001 +#define PHY_ANLPAR_PSB_802_9 0x0002 + +/* phy 1000BTSR */ +#define PHY_1000BTSR_MSCF 0x8000 +#define PHY_1000BTSR_MSCR 0x4000 +#define PHY_1000BTSR_LRS 0x2000 +#define PHY_1000BTSR_RRS 0x1000 +#define PHY_1000BTSR_1000FD 0x0800 +#define PHY_1000BTSR_1000HD 0x0400 #endif -- cgit v1.3.1 From 71bc6e6474fea8ef481b9b45d1edd7ad1f6dfbbd Mon Sep 17 00:00:00 2001 From: Larry Johnson Date: Thu, 1 Nov 2007 08:46:50 -0500 Subject: NET: Add Ethernet 1000BASE-X support for PPC4xx This patch adds support for 1000BASE-X to functions "miiphy_speed ()" and "miiphy_duplex()". It also adds function "miiphy_is_1000base_x ()", which returns non-zero iff the PHY registers are configured for 1000BASE-X. The "mii info" command is modified to distinguish between 1000BASE-T and -X. Signed-off-by: Larry Johnson Signed-off-by: Ben Warren --- common/cmd_mii.c | 8 ++- common/miiphyutil.c | 151 ++++++++++++++++++++++++++++++++-------------------- include/miiphy.h | 22 ++++++++ 3 files changed, 121 insertions(+), 60 deletions(-) (limited to 'include') diff --git a/common/cmd_mii.c b/common/cmd_mii.c index 72e11d54425..3b4dc8ae098 100644 --- a/common/cmd_mii.c +++ b/common/cmd_mii.c @@ -112,9 +112,11 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) "OUI = 0x%04X, " "Model = 0x%02X, " "Rev = 0x%02X, " - "%3dbaseT, %s\n", + "%3dbase%s, %s\n", j, oui, model, rev, miiphy_speed (devname, j), + miiphy_is_1000base_x (devname, j) + ? "X" : "T", (miiphy_duplex (devname, j) == FULL) ? "FDX" : "HDX"); } @@ -496,9 +498,11 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) "OUI = 0x%04X, " "Model = 0x%02X, " "Rev = 0x%02X, " - "%3dbaseT, %s\n", + "%3dbase%s, %s\n", j, oui, model, rev, miiphy_speed (devname, j), + miiphy_is_1000base_x (devname, j) + ? "X" : "T", (miiphy_duplex (devname, j) == FULL) ? "FDX" : "HDX"); } diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 58ebc5ec2c1..281f0b29e3b 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -344,101 +344,136 @@ int miiphy_reset (char *devname, unsigned char addr) /***************************************************************************** * - * Determine the ethernet speed (10/100). + * Determine the ethernet speed (10/100/1000). Return 10 on error. */ int miiphy_speed (char *devname, unsigned char addr) { - unsigned short reg; + u16 bmcr, anlpar; #if defined(CONFIG_PHY_GIGE) - if (miiphy_read (devname, addr, PHY_1000BTSR, ®)) { - printf ("PHY 1000BT Status read failed\n"); - } else { - if (reg != 0xFFFF) { - if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) - != 0) { - return (_1000BASET); - } - } + u16 btsr; + + /* + * Check for 1000BASE-X. If it is supported, then assume that the speed + * is 1000. + */ + if (miiphy_is_1000base_x (devname, addr)) { + return _1000BASET; + } + /* + * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. + */ + /* Check for 1000BASE-T. */ + if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) { + printf ("PHY 1000BT status"); + goto miiphy_read_failed; + } + if (btsr != 0xFFFF && + (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) { + return _1000BASET; } #endif /* CONFIG_PHY_GIGE */ /* Check Basic Management Control Register first. */ - if (miiphy_read (devname, addr, PHY_BMCR, ®)) { - puts ("PHY speed read failed, assuming 10bT\n"); - return (_10BASET); + if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) { + printf ("PHY speed"); + goto miiphy_read_failed; } /* Check if auto-negotiation is on. */ - if ((reg & PHY_BMCR_AUTON) != 0) { + if (bmcr & PHY_BMCR_AUTON) { /* Get auto-negotiation results. */ - if (miiphy_read (devname, addr, PHY_ANLPAR, ®)) { - puts ("PHY AN speed read failed, assuming 10bT\n"); - return (_10BASET); - } - if ((reg & PHY_ANLPAR_100) != 0) { - return (_100BASET); - } else { - return (_10BASET); + if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) { + printf ("PHY AN speed"); + goto miiphy_read_failed; } + return (anlpar & PHY_ANLPAR_100) ? _100BASET : _10BASET; } /* Get speed from basic control settings. */ - else if (reg & PHY_BMCR_100MB) { - return (_100BASET); - } else { - return (_10BASET); - } + return (bmcr & PHY_BMCR_100MB) ? _100BASET : _10BASET; + miiphy_read_failed: + printf (" read failed, assuming 10BASE-T\n"); + return _10BASET; } /***************************************************************************** * - * Determine full/half duplex. + * Determine full/half duplex. Return half on error. */ int miiphy_duplex (char *devname, unsigned char addr) { - unsigned short reg; + u16 bmcr, anlpar; #if defined(CONFIG_PHY_GIGE) - if (miiphy_read (devname, addr, PHY_1000BTSR, ®)) { - printf ("PHY 1000BT Status read failed\n"); - } else { - if ((reg != 0xFFFF) && - (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD))) { - if ((reg & PHY_1000BTSR_1000FD) != 0) { - return (FULL); - } else { - return (HALF); - } + u16 btsr; + + /* Check for 1000BASE-X. */ + if (miiphy_is_1000base_x (devname, addr)) { + /* 1000BASE-X */ + if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) { + printf ("1000BASE-X PHY AN duplex"); + goto miiphy_read_failed; + } + } + /* + * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set. + */ + /* Check for 1000BASE-T. */ + if (miiphy_read (devname, addr, PHY_1000BTSR, &btsr)) { + printf ("PHY 1000BT status"); + goto miiphy_read_failed; + } + if (btsr != 0xFFFF) { + if (btsr & PHY_1000BTSR_1000FD) { + return FULL; + } else if (btsr & PHY_1000BTSR_1000HD) { + return HALF; } } #endif /* CONFIG_PHY_GIGE */ /* Check Basic Management Control Register first. */ - if (miiphy_read (devname, addr, PHY_BMCR, ®)) { - puts ("PHY duplex read failed, assuming half duplex\n"); - return (HALF); + if (miiphy_read (devname, addr, PHY_BMCR, &bmcr)) { + puts ("PHY duplex"); + goto miiphy_read_failed; } /* Check if auto-negotiation is on. */ - if ((reg & PHY_BMCR_AUTON) != 0) { + if (bmcr & PHY_BMCR_AUTON) { /* Get auto-negotiation results. */ - if (miiphy_read (devname, addr, PHY_ANLPAR, ®)) { - puts ("PHY AN duplex read failed, assuming half duplex\n"); - return (HALF); - } - - if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) { - return (FULL); - } else { - return (HALF); + if (miiphy_read (devname, addr, PHY_ANLPAR, &anlpar)) { + puts ("PHY AN duplex"); + goto miiphy_read_failed; } + return (anlpar & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) ? + FULL : HALF; } /* Get speed from basic control settings. */ - else if (reg & PHY_BMCR_DPLX) { - return (FULL); - } else { - return (HALF); - } + return (bmcr & PHY_BMCR_DPLX) ? FULL : HALF; + + miiphy_read_failed: + printf (" read failed, assuming half duplex\n"); + return HALF; +} +/***************************************************************************** + * + * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/ + * 1000BASE-T, or on error. + */ +int miiphy_is_1000base_x (char *devname, unsigned char addr) +{ +#if defined(CONFIG_PHY_GIGE) + u16 exsr; + + if (miiphy_read (devname, addr, PHY_EXSR, &exsr)) { + printf ("PHY extended status read failed, assuming no " + "1000BASE-X\n"); + return 0; + } + return 0 != (exsr & (PHY_EXSR_1000XF | PHY_EXSR_1000XH)); +#else + return 0; +#endif } #ifdef CFG_FAULT_ECHO_LINK_DOWN diff --git a/include/miiphy.h b/include/miiphy.h index 42f2ad0c967..5518a0a89c2 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -41,6 +41,7 @@ int miiphy_info (char *devname, unsigned char addr, unsigned int *oui, int miiphy_reset (char *devname, unsigned char addr); int miiphy_speed (char *devname, unsigned char addr); int miiphy_duplex (char *devname, unsigned char addr); +int miiphy_is_1000base_x (char *devname, unsigned char addr); #ifdef CFG_FAULT_ECHO_LINK_DOWN int miiphy_link (char *devname, unsigned char addr); #endif @@ -85,6 +86,7 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_ANLPNP 0x08 #define PHY_1000BTCR 0x09 #define PHY_1000BTSR 0x0A +#define PHY_EXSR 0x0F #define PHY_PHYSTS 0x10 #define PHY_MIPSCR 0x11 #define PHY_MIPGSR 0x12 @@ -118,6 +120,7 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_BMSR_100TXH 0x2000 #define PHY_BMSR_10TF 0x1000 #define PHY_BMSR_10TH 0x0800 +#define PHY_BMSR_EXT_STAT 0x0100 #define PHY_BMSR_PRE_SUP 0x0040 #define PHY_BMSR_AUTN_COMP 0x0020 #define PHY_BMSR_RF 0x0010 @@ -130,17 +133,30 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_ANLPAR_NP 0x8000 #define PHY_ANLPAR_ACK 0x4000 #define PHY_ANLPAR_RF 0x2000 +#define PHY_ANLPAR_ASYMP 0x0800 +#define PHY_ANLPAR_PAUSE 0x0400 #define PHY_ANLPAR_T4 0x0200 #define PHY_ANLPAR_TXFD 0x0100 #define PHY_ANLPAR_TX 0x0080 #define PHY_ANLPAR_10FD 0x0040 #define PHY_ANLPAR_10 0x0020 #define PHY_ANLPAR_100 0x0380 /* we can run at 100 */ +/* phy ANLPAR 1000BASE-X */ +#define PHY_X_ANLPAR_NP 0x8000 +#define PHY_X_ANLPAR_ACK 0x4000 +#define PHY_X_ANLPAR_RF_MASK 0x3000 +#define PHY_X_ANLPAR_PAUSE_MASK 0x0180 +#define PHY_X_ANLPAR_HD 0x0040 +#define PHY_X_ANLPAR_FD 0x0020 #define PHY_ANLPAR_PSB_MASK 0x001f #define PHY_ANLPAR_PSB_802_3 0x0001 #define PHY_ANLPAR_PSB_802_9 0x0002 +/* phy 1000BTCR */ +#define PHY_1000BTCR_1000FD 0x0200 +#define PHY_1000BTCR_1000HD 0x0100 + /* phy 1000BTSR */ #define PHY_1000BTSR_MSCF 0x8000 #define PHY_1000BTSR_MSCR 0x4000 @@ -149,4 +165,10 @@ int bb_miiphy_write (char *devname, unsigned char addr, #define PHY_1000BTSR_1000FD 0x0800 #define PHY_1000BTSR_1000HD 0x0400 +/* phy EXSR */ +#define PHY_EXSR_1000XF 0x8000 +#define PHY_EXSR_1000XH 0x4000 +#define PHY_EXSR_1000TF 0x2000 +#define PHY_EXSR_1000TH 0x1000 + #endif -- cgit v1.3.1 From 248c7c14835f34d5d910b45e5600050e58ca6cab Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Wed, 7 Nov 2007 17:56:15 -0600 Subject: ColdFire: MCF532x - Update do_reset() using core reset Signed-off-by: TsiChungLiew --- cpu/mcf532x/cpu.c | 8 ++------ include/asm-m68k/immap_5329.h | 3 ++- include/asm-m68k/m5329.h | 15 +++++++++++++++ 3 files changed, 19 insertions(+), 7 deletions(-) mode change 100644 => 100755 include/asm-m68k/m5329.h (limited to 'include') diff --git a/cpu/mcf532x/cpu.c b/cpu/mcf532x/cpu.c index 2f62e956cca..89cc8ad9307 100644 --- a/cpu/mcf532x/cpu.c +++ b/cpu/mcf532x/cpu.c @@ -35,14 +35,10 @@ DECLARE_GLOBAL_DATA_PTR; int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) { - volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG); + volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM); - wdp->cr = 0; udelay(1000); - - /* enable watchdog, set timeout to 0 and wait */ - wdp->cr = WTM_WCR_EN; - while (1) ; + rcm->rcr |= RCM_RCR_SOFTRST; /* we don't return! */ return 0; diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h index 2a3980c1302..dd86e7d9822 100644 --- a/include/asm-m68k/immap_5329.h +++ b/include/asm-m68k/immap_5329.h @@ -57,7 +57,8 @@ #define MMAP_PWM 0xFC090000 #define MMAP_EPORT 0xFC094000 #define MMAP_WDOG 0xFC098000 -#define MMAP_CCM 0xFC0A0000 +#define MMAP_RCM 0xFC0A0000 +#define MMAP_CCM 0xFC0A0004 #define MMAP_GPIO 0xFC0A4000 #define MMAP_RTC 0xFC0A8000 #define MMAP_LCDC 0xFC0AC000 diff --git a/include/asm-m68k/m5329.h b/include/asm-m68k/m5329.h old mode 100644 new mode 100755 index cd69fb0b5af..3f056511cb6 --- a/include/asm-m68k/m5329.h +++ b/include/asm-m68k/m5329.h @@ -245,6 +245,21 @@ #define CSCR_BSTR (0x00000010) #define CSCR_BSTW (0x00000008) +/********************************************************************* +* Reset Controller Module (RCM) +*********************************************************************/ + +/* Bit definitions and macros for RCR */ +#define RCM_RCR_FRCRSTOUT (0x40) +#define RCM_RCR_SOFTRST (0x80) + +/* Bit definitions and macros for RSR */ +#define RCM_RSR_LOL (0x01) +#define RCM_RSR_WDR_CORE (0x02) +#define RCM_RSR_EXT (0x04) +#define RCM_RSR_POR (0x08) +#define RCM_RSR_SOFT (0x20) + /********************************************************************* * FlexCAN Module (CAN) *********************************************************************/ -- cgit v1.3.1 From 225a24b5e062ad94627424508ae814f51dbe1a34 Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Wed, 7 Nov 2007 18:00:54 -0600 Subject: ColdFire: MCF5445x - Update correct RAMBAR and missing linker files Signed-off-by: TsiChungLiew --- board/freescale/m54455evb/u-boot.atm | 144 +++++++++++++++++++++++++++++++++++ board/freescale/m54455evb/u-boot.int | 141 ++++++++++++++++++++++++++++++++++ cpu/mcf5445x/start.S | 2 +- include/asm-m68k/m5445x.h | 4 +- 4 files changed, 288 insertions(+), 3 deletions(-) create mode 100644 board/freescale/m54455evb/u-boot.atm create mode 100644 board/freescale/m54455evb/u-boot.int (limited to 'include') diff --git a/board/freescale/m54455evb/u-boot.atm b/board/freescale/m54455evb/u-boot.atm new file mode 100644 index 00000000000..bda68e4f824 --- /dev/null +++ b/board/freescale/m54455evb/u-boot.atm @@ -0,0 +1,144 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(m68k) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mcf5445x/start.o (.text) + lib_m68k/traps.o (.text) + lib_m68k/interrupts.o (.text) + common/dlmalloc.o (.text) + lib_generic/zlib.o (.text) + + . = DEFINED(env_offset) ? env_offset : .; + common/environment.o (.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + + .reloc : + { + __got_start = .; + *(.got) + __got_end = .; + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + _sbss = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(4); + _ebss = .; + } + _end = . ; + PROVIDE (end = .); +} diff --git a/board/freescale/m54455evb/u-boot.int b/board/freescale/m54455evb/u-boot.int new file mode 100644 index 00000000000..e480c292278 --- /dev/null +++ b/board/freescale/m54455evb/u-boot.int @@ -0,0 +1,141 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(m68k) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + cpu/mcf5445x/start.o (.text) + lib_m68k/traps.o (.text) + lib_m68k/interrupts.o (.text) + common/dlmalloc.o (.text) + lib_generic/zlib.o (.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + + .reloc : + { + __got_start = .; + *(.got) + __got_end = .; + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + _sbss = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + . = ALIGN(4); + _ebss = .; + } + _end = . ; + PROVIDE (end = .); +} diff --git a/cpu/mcf5445x/start.S b/cpu/mcf5445x/start.S index cd989ab6261..423583d04ad 100644 --- a/cpu/mcf5445x/start.S +++ b/cpu/mcf5445x/start.S @@ -136,7 +136,7 @@ _start: movec %d0, %VBR move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR0 + movec %d0, %RAMBAR1 /* initialize general use internal ram */ move.l #0, %d0 diff --git a/include/asm-m68k/m5445x.h b/include/asm-m68k/m5445x.h index 8b886b0b605..b2bfb69264c 100644 --- a/include/asm-m68k/m5445x.h +++ b/include/asm-m68k/m5445x.h @@ -792,8 +792,8 @@ #define GPIO_PAR_FEC_FEC0_MASK (0xF8) #define GPIO_PAR_FEC_FEC0_MII (0x07) #define GPIO_PAR_FEC_FEC0_RMII_GPIO (0x03) -#define GPIO_PAR_FEC_FEC0_RMII_ATA (0x02) -#define GPIO_PAR_FEC_FEC0_ATA (0x01) +#define GPIO_PAR_FEC_FEC0_RMII_ULPI (0x02) +#define GPIO_PAR_FEC_FEC0_ULPI (0x01) #define GPIO_PAR_FEC_FEC0_GPIO (0x00) /* Bit definitions and macros for PAR_DMA */ -- cgit v1.3.1 From 09b26cf00d76d75fdf7fdc4b13e4dd929743bc21 Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 8 Nov 2007 12:19:01 -0600 Subject: ColdFire: MCF5329 - revert include/asm-m68k/m5329.h file mode Signed-off-by: TsiChungLiew --- include/asm-m68k/m5329.h | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 include/asm-m68k/m5329.h (limited to 'include') diff --git a/include/asm-m68k/m5329.h b/include/asm-m68k/m5329.h old mode 100755 new mode 100644 -- cgit v1.3.1 From 7d7cdea769a60b0a6e4c18bef7f9d648fd14b8d7 Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 8 Nov 2007 12:31:11 -0600 Subject: ColdFire: MCF5329 - Add Reset structure to immap_5329.h Signed-off-by: TsiChungLiew --- include/asm-m68k/immap_5329.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h index dd86e7d9822..60ecd42cab9 100644 --- a/include/asm-m68k/immap_5329.h +++ b/include/asm-m68k/immap_5329.h @@ -494,6 +494,11 @@ typedef struct ccm_ctrl { u16 uocsr; /* 0x16 USB On-the-Go Controller Status Register */ } ccm_t; +typedef struct rcm { + u8 rcr; + u8 rsr; +} rcm_t; + /* GPIO port registers */ typedef struct gpio_ctrl { /* Port Output Data Registers */ -- cgit v1.3.1 From 8d737a28152ec12873f8544cca1fb39a49e5e693 Mon Sep 17 00:00:00 2001 From: TsiChungLiew Date: Thu, 8 Nov 2007 12:50:18 -0600 Subject: ColdFire: MCF5329 - Remove reset registers from CCM Signed-off-by: TsiChungLiew --- include/asm-m68k/immap_5329.h | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h index 60ecd42cab9..271c27655bd 100644 --- a/include/asm-m68k/immap_5329.h +++ b/include/asm-m68k/immap_5329.h @@ -480,18 +480,15 @@ typedef struct wdog_ctrl { /*Chip configuration module registers */ typedef struct ccm_ctrl { - u8 rstctrl; /* 0x00 Reset Controller register */ - u8 rststat; /* 0x01 Reset Status register */ - u16 res1; /* 0x02 - 0x03 */ - u16 ccr; /* 0x04 Chip configuration register */ - u16 res2; /* 0x06 */ - u16 rcon; /* 0x08 Rreset configuration register */ - u16 cir; /* 0x0A Chip identification register */ - u32 res3; /* 0x0C */ - u16 misccr; /* 0x10 Miscellaneous control register */ - u16 cdr; /* 0x12 Clock divider register */ - u16 uhcsr; /* 0x14 USB Host controller status register */ - u16 uocsr; /* 0x16 USB On-the-Go Controller Status Register */ + u16 ccr; /* 0x00 Chip configuration register */ + u16 res2; /* 0x02 */ + u16 rcon; /* 0x04 Rreset configuration register */ + u16 cir; /* 0x06 Chip identification register */ + u32 res3; /* 0x08 */ + u16 misccr; /* 0x0A Miscellaneous control register */ + u16 cdr; /* 0x0C Clock divider register */ + u16 uhcsr; /* 0x10 USB Host controller status register */ + u16 uocsr; /* 0x12 USB On-the-Go Controller Status Reg */ } ccm_t; typedef struct rcm { -- cgit v1.3.1 From 1ce55151c85d068f70317a8d65c61058b891afb4 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Tue, 13 Nov 2007 07:50:29 +0100 Subject: [UC101] SRAM now with 2 MB working. Signed-off-by: Heiko Schocher --- include/configs/uc101.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/uc101.h b/include/configs/uc101.h index aed80ec1e51..81df1419f51 100644 --- a/include/configs/uc101.h +++ b/include/configs/uc101.h @@ -297,7 +297,7 @@ /* 8Mbit SRAM @0x80100000 */ #define CFG_CS1_START CFG_SRAM_BASE -#define CFG_CS1_SIZE 0x00100000 +#define CFG_CS1_SIZE 0x00200000 #define CFG_CS1_CFG 0x21D00 /* Display H1, Status Inputs, EPLD @0x80600000 8 Bit */ -- cgit v1.3.1 From c93945e8f9e300860d2bf73a2549ce5794f8bd00 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 15 Nov 2007 08:20:25 -0700 Subject: Revert "[MPC512x] Correct fixup relocation" This reverts commit 8d17979d0359492a822a0a409d26e3a3549b4cd4. Signed-off-by: Grant Likely --- board/ads5121/u-boot.lds | 1 + cpu/mpc512x/config.mk | 2 +- include/common.h | 1 - 3 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/board/ads5121/u-boot.lds b/board/ads5121/u-boot.lds index 34ceb0fdac4..038d8495531 100644 --- a/board/ads5121/u-boot.lds +++ b/board/ads5121/u-boot.lds @@ -51,6 +51,7 @@ SECTIONS { cpu/mpc512x/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/cpu/mpc512x/config.mk b/cpu/mpc512x/config.mk index 3259d53a13f..8a07c5a3b67 100644 --- a/cpu/mpc512x/config.mk +++ b/cpu/mpc512x/config.mk @@ -19,7 +19,7 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \ -ffixed-r2 -ffixed-r29 -msoft-float -mcpu=603e diff --git a/include/common.h b/include/common.h index aca281bdad6..5a63906666a 100644 --- a/include/common.h +++ b/include/common.h @@ -70,7 +70,6 @@ typedef volatile unsigned char vu_char; #elif defined(CONFIG_MPC512X) #include #include -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC8220) #include #define CONFIG_RELOC_FIXUP_WORKS -- cgit v1.3.1 From 928fe33b24cdf382a8dc8687fed24b1961cdb5d6 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 15 Nov 2007 08:20:43 -0700 Subject: Revert "Correct fixup relocation for mpc83xx" This reverts commit 057004f4a4863554d56cc56268bfa7c7d9738e27. Signed-off-by: Grant Likely --- cpu/mpc83xx/config.mk | 2 +- cpu/mpc83xx/u-boot.lds | 1 + include/common.h | 1 - 3 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/cpu/mpc83xx/config.mk b/cpu/mpc83xx/config.mk index 2ec395d4ca9..ecf8a60bbef 100644 --- a/cpu/mpc83xx/config.mk +++ b/cpu/mpc83xx/config.mk @@ -20,7 +20,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \ -ffixed-r2 -ffixed-r29 -msoft-float diff --git a/cpu/mpc83xx/u-boot.lds b/cpu/mpc83xx/u-boot.lds index ca663bc87bf..937c87a27cd 100644 --- a/cpu/mpc83xx/u-boot.lds +++ b/cpu/mpc83xx/u-boot.lds @@ -52,6 +52,7 @@ SECTIONS { cpu/mpc83xx/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/include/common.h b/include/common.h index 5a63906666a..3973ed86c5e 100644 --- a/include/common.h +++ b/include/common.h @@ -99,7 +99,6 @@ typedef volatile unsigned char vu_char; #ifdef CONFIG_MPC83XX #include #include -#define CONFIG_RELOC_FIXUP_WORKS #endif #ifdef CONFIG_4xx #include -- cgit v1.3.1 From 96279ab4cad60cb5972aa934fbe4845ac02cc75a Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 15 Nov 2007 08:20:50 -0700 Subject: Revert "Correct fixup relocation for mpc8260" This reverts commit 5af61b2f4b838a05f79be274f3e5a66edd2d9c96. Signed-off-by: Grant Likely --- board/cogent/u-boot.lds | 1 + board/hymod/u-boot.lds | 1 + board/rsdproto/u-boot.lds | 1 + cpu/mpc8260/config.mk | 2 +- cpu/mpc8260/u-boot.lds | 1 + include/common.h | 1 - 6 files changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/board/cogent/u-boot.lds b/board/cogent/u-boot.lds index d87a39b2496..5ce2694cbf7 100644 --- a/board/cogent/u-boot.lds +++ b/board/cogent/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { *(.text) common/environment.o(.text) + *(.fixup) *(.got1) } _etext = .; diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds index 9bf0f0938a2..337a3954d2d 100644 --- a/board/hymod/u-boot.lds +++ b/board/hymod/u-boot.lds @@ -69,6 +69,7 @@ SECTIONS common/environment.o(.text) *(.text) + *(.fixup) *(.got1) } _etext = .; diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds index 9bd62480952..70fc3a5d279 100644 --- a/board/rsdproto/u-boot.lds +++ b/board/rsdproto/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc8260/start.o (.text) *(.text) + *(.fixup) *(.got1) /*. = env_offset; */ } diff --git a/cpu/mpc8260/config.mk b/cpu/mpc8260/config.mk index d401e4ca04f..683b6fbf2b2 100644 --- a/cpu/mpc8260/config.mk +++ b/cpu/mpc8260/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 -ffixed-r29 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc8260/u-boot.lds b/cpu/mpc8260/u-boot.lds index b8abc17d413..3e84f234d72 100644 --- a/cpu/mpc8260/u-boot.lds +++ b/cpu/mpc8260/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc8260/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/include/common.h b/include/common.h index 3973ed86c5e..d763cc7e2e5 100644 --- a/include/common.h +++ b/include/common.h @@ -86,7 +86,6 @@ typedef volatile unsigned char vu_char; #define CONFIG_MPC8260 1 #endif #include -#define CONFIG_RELOC_FIXUP_WORKS #endif #ifdef CONFIG_MPC86xx #include -- cgit v1.3.1 From 70922342369e5e39b286fe21e768a239ca07a514 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 15 Nov 2007 08:20:57 -0700 Subject: Revert "Correct fixup relocation for mpc824x" This reverts commit f3a52fe05923935db86985daf9438e2f70ac39aa. Signed-off-by: Grant Likely --- board/mousse/u-boot.lds | 1 + cpu/mpc824x/config.mk | 2 +- cpu/mpc824x/u-boot.lds | 1 + include/common.h | 2 -- 4 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds index eb4d8e4e2b6..57358b8a49d 100644 --- a/board/mousse/u-boot.lds +++ b/board/mousse/u-boot.lds @@ -60,6 +60,7 @@ SECTIONS lib_generic/crc32.o (.text) lib_generic/zlib.o (.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/cpu/mpc824x/config.mk b/cpu/mpc824x/config.mk index 17fdb21d35a..66207f4354d 100644 --- a/cpu/mpc824x/config.mk +++ b/cpu/mpc824x/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -ffixed-r29 -mstring -mcpu=603e -msoft-float diff --git a/cpu/mpc824x/u-boot.lds b/cpu/mpc824x/u-boot.lds index 8cbef4aed43..c90d1e9457e 100644 --- a/cpu/mpc824x/u-boot.lds +++ b/cpu/mpc824x/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc824x/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/include/common.h b/include/common.h index d763cc7e2e5..8ba57e8ef3f 100644 --- a/include/common.h +++ b/include/common.h @@ -73,8 +73,6 @@ typedef volatile unsigned char vu_char; #elif defined(CONFIG_MPC8220) #include #define CONFIG_RELOC_FIXUP_WORKS -#elif defined(CONFIG_824X) -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_8260) #if defined(CONFIG_MPC8247) \ || defined(CONFIG_MPC8248) \ -- cgit v1.3.1 From 139365fbe566d0fc619a1ed04452ec5388f0cef8 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 15 Nov 2007 08:21:04 -0700 Subject: Revert "Correct fixup relocation for mpc8220" This reverts commit a85dd254c0577fca13627c46e93fc2ad4c4f1f00. Signed-off-by: Grant Likely --- cpu/mpc8220/config.mk | 2 +- cpu/mpc8220/u-boot.lds | 1 + include/common.h | 1 - 3 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/cpu/mpc8220/config.mk b/cpu/mpc8220/config.mk index c41cafe97fe..8e3ba54287c 100644 --- a/cpu/mpc8220/config.mk +++ b/cpu/mpc8220/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 -ffixed-r29 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc8220/u-boot.lds b/cpu/mpc8220/u-boot.lds index a199a64f131..889bc77d2f8 100644 --- a/cpu/mpc8220/u-boot.lds +++ b/cpu/mpc8220/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc8220/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/include/common.h b/include/common.h index 8ba57e8ef3f..a4d1f8d962e 100644 --- a/include/common.h +++ b/include/common.h @@ -72,7 +72,6 @@ typedef volatile unsigned char vu_char; #include #elif defined(CONFIG_MPC8220) #include -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_8260) #if defined(CONFIG_MPC8247) \ || defined(CONFIG_MPC8248) \ -- cgit v1.3.1 From e15633888a058aacb31a62d2cf1278e1e4c236ab Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 15 Nov 2007 08:24:32 -0700 Subject: Revert "Correct fixup relocation for MPC5xxx" This reverts commit 6f7576b20ecf0d040c3ac3b032b5cbc860e38a90. Signed-off-by: Grant Likely --- cpu/mpc5xxx/config.mk | 2 +- cpu/mpc5xxx/u-boot-customlayout.lds | 1 + cpu/mpc5xxx/u-boot.lds | 1 + include/common.h | 1 - 4 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/cpu/mpc5xxx/config.mk b/cpu/mpc5xxx/config.mk index 0e861c4a0f8..0df51babd70 100644 --- a/cpu/mpc5xxx/config.mk +++ b/cpu/mpc5xxx/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 -ffixed-r29 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc5xxx/u-boot-customlayout.lds b/cpu/mpc5xxx/u-boot-customlayout.lds index 11079430d57..123a14c5aa0 100644 --- a/cpu/mpc5xxx/u-boot-customlayout.lds +++ b/cpu/mpc5xxx/u-boot-customlayout.lds @@ -66,6 +66,7 @@ SECTIONS common/environment.o (.ppcenv) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/cpu/mpc5xxx/u-boot.lds b/cpu/mpc5xxx/u-boot.lds index a28a3afc71c..78818a49ebd 100644 --- a/cpu/mpc5xxx/u-boot.lds +++ b/cpu/mpc5xxx/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc5xxx/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/include/common.h b/include/common.h index a4d1f8d962e..4bfb8c5627d 100644 --- a/include/common.h +++ b/include/common.h @@ -66,7 +66,6 @@ typedef volatile unsigned char vu_char; #define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC5xxx) #include -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC512X) #include #include -- cgit v1.3.1 From 955413f35f054a82e40042f1dbcf501c6a05719b Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 15 Nov 2007 08:27:52 -0700 Subject: Revert "Correct relocation fixup for mpc5xx" This reverts commit 3649cd99ba815b6601868735765602f00ef3692b. Signed-off-by: Grant Likely --- cpu/mpc5xx/config.mk | 2 +- cpu/mpc5xx/u-boot.lds | 1 + include/common.h | 1 - 3 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/cpu/mpc5xx/config.mk b/cpu/mpc5xx/config.mk index e95b8a1a855..64cd60071ad 100644 --- a/cpu/mpc5xx/config.mk +++ b/cpu/mpc5xx/config.mk @@ -28,7 +28,7 @@ # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_5xx -ffixed-r2 -ffixed-r29 -mpowerpc -msoft-float diff --git a/cpu/mpc5xx/u-boot.lds b/cpu/mpc5xx/u-boot.lds index 10001b1c1de..5b03fef66c7 100644 --- a/cpu/mpc5xx/u-boot.lds +++ b/cpu/mpc5xx/u-boot.lds @@ -59,6 +59,7 @@ SECTIONS cpu/mpc5xx/start.o (.text) *(.text) + *(.fixup) *(.got1) } _etext = .; diff --git a/include/common.h b/include/common.h index 4bfb8c5627d..63ac8b062cd 100644 --- a/include/common.h +++ b/include/common.h @@ -63,7 +63,6 @@ typedef volatile unsigned char vu_char; #endif #elif defined(CONFIG_5xx) #include -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC5xxx) #include #elif defined(CONFIG_MPC512X) -- cgit v1.3.1 From 1b4aaffe4fb2a5e95d9111a5d94fd1f89215dce4 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Mon, 24 Sep 2007 09:05:30 -0600 Subject: Add .gitignore files Signed-off-by: Grant Likely Acked-by: Kim Phillips --- .gitignore | 13 +++++++++++++ examples/.gitignore | 5 +++++ include/.gitignore | 6 ++++++ tools/.gitignore | 9 +++++++++ 4 files changed, 33 insertions(+) create mode 100644 .gitignore create mode 100644 examples/.gitignore create mode 100644 include/.gitignore create mode 100644 tools/.gitignore (limited to 'include') diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000000..67fed082c83 --- /dev/null +++ b/.gitignore @@ -0,0 +1,13 @@ +*.orig +*.a +*.o +*.depend +System.map +/u-boot +/u-boot.map +/u-boot.bin +/u-boot.srec +/LOG +/errlog +/reloc_off + diff --git a/examples/.gitignore b/examples/.gitignore new file mode 100644 index 00000000000..f5470247848 --- /dev/null +++ b/examples/.gitignore @@ -0,0 +1,5 @@ +/hello_world +/interrupt +/sched +*.bin +*.srec diff --git a/include/.gitignore b/include/.gitignore new file mode 100644 index 00000000000..d8fda80d5ea --- /dev/null +++ b/include/.gitignore @@ -0,0 +1,6 @@ +/asm +/asm-ppc/arch +/bmp_logo.h +/config.h +/config.mk +/version_autogenerated.h diff --git a/tools/.gitignore b/tools/.gitignore new file mode 100644 index 00000000000..c33679a9d27 --- /dev/null +++ b/tools/.gitignore @@ -0,0 +1,9 @@ +/bmp_logo +/crc32.c +/envcrc +/environment.c +/gen_eth_addr +/img2srec +/mkimage +/sha1.c +/ubsha1 -- cgit v1.3.1 From db74b3c1c9481a6bffbf8cd445e5bcbf6908e836 Mon Sep 17 00:00:00 2001 From: Jason Jin Date: Mon, 29 Oct 2007 19:26:21 +0800 Subject: Unify pixis_reset altbank across board families Basically, refactor the CFG_PIXIS_VBOOT_MASK values into the separate board config files. Signed-off-by: Jason Jin Signed-off-by: Jon Loeliger --- board/freescale/common/pixis.c | 5 ++++- include/configs/MPC8544DS.h | 1 + include/configs/MPC8641HPCN.h | 1 + 3 files changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index fd99a938c0f..45dcf4dab03 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -207,13 +207,16 @@ void read_from_px_regs_altbank(int set) out8(PIXIS_BASE + PIXIS_VCFGEN1, tmp); } +#ifndef CFG_PIXIS_VBOOT_MASK +#define CFG_PIXIS_VBOOT_MASK 0x40 +#endif void set_altbank(void) { u8 tmp; tmp = in8(PIXIS_BASE + PIXIS_VBOOT); - tmp ^= 0x40; + tmp ^= CFG_PIXIS_VBOOT_MASK; out8(PIXIS_BASE + PIXIS_VBOOT, tmp); } diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index f580ccadee5..13e2a2c079f 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -198,6 +198,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ +#define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/ /* define to use L1 as initial stack */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index aa6dbc47adf..6f872402633 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -201,6 +201,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ +#define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/ #define CFG_MAX_FLASH_BANKS 2 /* number of banks */ #define CFG_MAX_FLASH_SECT 128 /* sectors per device */ -- cgit v1.3.1 From 5c15010efad980ad5498cc565fc1ed70df2f52b4 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 13 Nov 2007 09:11:05 +0100 Subject: Fixed mips_io_port_base build errors. This patch has been sent on: - 29 Sep 2007 Although mips_io_port_base is currently a part of IDE command, it is quite fundamental for MIPS I/O port access such as in[bwl] and out[bwl]. So move it to MIPS general part, and introduce `set_io_port_base()' from Linux. This patch is triggered by multiple definition of `mips_io_port_base' build error on gth2 (and tb0229 also needs this fix.) board/gth2/libgth2.a(gth2.o): In function `log_serial_char': /home/skuribay/devel/u-boot.git/board/gth2/gth2.c:47: multiple definition of `mips_io_port_base' common/libcommon.a(cmd_ide.o):/home/skuribay/devel/u-boot.git/common/cmd_ide.c:712: first defined here make: *** [u-boot] Error 1 Signed-off-by: Shinya Kuribayashi Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/dbau1x00/dbau1x00.c | 4 ++++ board/gth2/gth2.c | 6 ++++-- board/incaip/incaip.c | 5 +++-- board/pb1x00/pb1x00.c | 4 ++++ board/purple/purple.c | 3 +++ board/tb0229/tb0229.c | 7 +++---- common/cmd_ide.c | 4 ---- include/asm-mips/io.h | 16 +++++++++++++++- lib_mips/board.c | 5 +++++ 9 files changed, 41 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c index d29e8d591e3..a13eeeb1232 100644 --- a/board/dbau1x00/dbau1x00.c +++ b/board/dbau1x00/dbau1x00.c @@ -25,6 +25,7 @@ #include #include #include +#include long int initdram(int board_type) { @@ -77,6 +78,9 @@ int checkboard (void) default: printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id); } + + set_io_port_base(0); + #ifdef CONFIG_IDE_PCMCIA /* Enable 3.3 V on slot 0 ( VCC ) No 5V */ diff --git a/board/gth2/gth2.c b/board/gth2/gth2.c index ffeaf587b56..1593f02109a 100644 --- a/board/gth2/gth2.c +++ b/board/gth2/gth2.c @@ -26,14 +26,13 @@ #include #include #include +#include #include #include "ee_access.h" static int wdi_status = 0; -unsigned long mips_io_port_base = 0; - #define SDRAM_SIZE ((64*1024*1024)-(12*4096)) @@ -147,6 +146,9 @@ int checkboard (void) default: printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id); } + + set_io_port_base(0); + #ifdef CONFIG_IDE_PCMCIA /* PCMCIA is on a 36 bit physical address. We need to map it into a 32 bit addresses */ diff --git a/board/incaip/incaip.c b/board/incaip/incaip.c index b5d9e004927..dbf0ecc5af3 100644 --- a/board/incaip/incaip.c +++ b/board/incaip/incaip.c @@ -25,7 +25,7 @@ #include #include #include - +#include extern uint incaip_get_cpuclk(void); @@ -85,7 +85,6 @@ long int initdram(int board_type) int checkboard (void) { - unsigned long chipid = *INCA_IP_WDT_CHIPID; int part_num; @@ -107,5 +106,7 @@ int checkboard (void) printf("CPU Speed %d MHz\n", incaip_get_cpuclk()/1000000); + set_io_port_base(0); + return 0; } diff --git a/board/pb1x00/pb1x00.c b/board/pb1x00/pb1x00.c index 40ac2a4d7cd..95b7d8246ee 100644 --- a/board/pb1x00/pb1x00.c +++ b/board/pb1x00/pb1x00.c @@ -25,6 +25,7 @@ #include #include #include +#include long int initdram(int board_type) { @@ -69,6 +70,9 @@ int checkboard (void) default: printf ("Unsupported cpu %d, proc_id=0x%x\n", proc_id >> 24, proc_id); } + + set_io_port_base(0); + #if defined(CONFIG_IDE_PCMCIA) && 0 /* Enable 3.3 V on slot 0 ( VCC ) No 5V */ diff --git a/board/purple/purple.c b/board/purple/purple.c index 4c3e5b44b53..74718afb489 100644 --- a/board/purple/purple.c +++ b/board/purple/purple.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -145,6 +146,8 @@ int checkboard (void) printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000); + set_io_port_base(0); + return 0; } diff --git a/board/tb0229/tb0229.c b/board/tb0229/tb0229.c index e7914bd15bd..61c2e9bd366 100644 --- a/board/tb0229/tb0229.c +++ b/board/tb0229/tb0229.c @@ -13,10 +13,9 @@ #include #include #include +#include #include -unsigned long mips_io_port_base = 0; - #if defined(CONFIG_PCI) static struct pci_controller hose; @@ -26,17 +25,17 @@ void pci_init_board (void) } #endif - long int initdram(int board_type) { return get_ram_size (CFG_SDRAM_BASE, 0x8000000); } - int checkboard (void) { printf("Board: TANBAC TB0229 "); printf("(CPU Speed %d MHz)\n", (int)CPU_CLOCK_RATE/1000000); + set_io_port_base(0); + return 0; } diff --git a/common/cmd_ide.c b/common/cmd_ide.c index 27cecac4eed..2202009f5f2 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -54,10 +54,6 @@ #ifndef __PPC__ #include -#ifdef __MIPS__ -/* Macros depend on this variable */ -unsigned long mips_io_port_base = 0; -#endif #endif #ifdef CONFIG_IDE_8xx_DIRECT diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index cd4d5dc9d9e..1e060f7c31d 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -71,7 +71,21 @@ * instruction, so the lower 16 bits must be zero. Should be true on * on any sane architecture; generic code does not use this assumption. */ -extern unsigned long mips_io_port_base; +extern const unsigned long mips_io_port_base; + +/* + * Gcc will generate code to load the value of mips_io_port_base after each + * function call which may be fairly wasteful in some cases. So we don't + * play quite by the book. We tell gcc mips_io_port_base is a long variable + * which solves the code generation issue. Now we need to violate the + * aliasing rules a little to make initialization possible and finally we + * will need the barrier() to fight side effects of the aliasing chat. + * This trickery will eventually collapse under gcc's optimizer. Oh well. + */ +static inline void set_io_port_base(unsigned long base) +{ + * (unsigned long *) &mips_io_port_base = base; +} /* * Thanks to James van Artsdalen for a better timing-fix than diff --git a/lib_mips/board.c b/lib_mips/board.c index 91ccec04df7..c1a0acf4698 100644 --- a/lib_mips/board.c +++ b/lib_mips/board.c @@ -62,6 +62,11 @@ static ulong mem_malloc_start; static ulong mem_malloc_end; static ulong mem_malloc_brk; +/* + * mips_io_port_base is the begin of the address space to which x86 style + * I/O ports are mapped. + */ +unsigned long mips_io_port_base = -1; /* * The Malloc area is immediately below the monitor copy in DRAM -- cgit v1.3.1 From 1c3dd43338a077165e7e0309cb3994e65d2bdbf8 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Tue, 13 Nov 2007 22:18:33 -0700 Subject: powerpc: Backout relocation changes. Ugh. I *hate* to back this change out, but these compiler flags don't work for relocation on all versions of GCC. I've not been able to reproduce the environment in my setup (and hence, not been able to find a combination that *does* work), so I've got no choice but to go back to the old gcc flags and linker script. Signed-off-by: Grant Likely --- board/cogent/u-boot.lds | 1 + board/hymod/u-boot.lds | 1 + board/mousse/u-boot.lds | 1 + board/rsdproto/u-boot.lds | 1 + cpu/mpc512x/config.mk | 2 +- cpu/mpc5xx/config.mk | 2 +- cpu/mpc5xx/u-boot.lds | 1 + cpu/mpc5xxx/config.mk | 2 +- cpu/mpc5xxx/u-boot-customlayout.lds | 1 + cpu/mpc5xxx/u-boot.lds | 1 + cpu/mpc8220/config.mk | 2 +- cpu/mpc8220/u-boot.lds | 1 + cpu/mpc824x/config.mk | 2 +- cpu/mpc824x/u-boot.lds | 1 + cpu/mpc8260/config.mk | 2 +- cpu/mpc8260/u-boot.lds | 1 + cpu/mpc83xx/config.mk | 2 +- cpu/mpc83xx/u-boot.lds | 1 + include/common.h | 8 -------- 19 files changed, 18 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/board/cogent/u-boot.lds b/board/cogent/u-boot.lds index d87a39b2496..5ce2694cbf7 100644 --- a/board/cogent/u-boot.lds +++ b/board/cogent/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { *(.text) common/environment.o(.text) + *(.fixup) *(.got1) } _etext = .; diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds index 9bf0f0938a2..337a3954d2d 100644 --- a/board/hymod/u-boot.lds +++ b/board/hymod/u-boot.lds @@ -69,6 +69,7 @@ SECTIONS common/environment.o(.text) *(.text) + *(.fixup) *(.got1) } _etext = .; diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds index eb4d8e4e2b6..57358b8a49d 100644 --- a/board/mousse/u-boot.lds +++ b/board/mousse/u-boot.lds @@ -60,6 +60,7 @@ SECTIONS lib_generic/crc32.o (.text) lib_generic/zlib.o (.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds index 9bd62480952..70fc3a5d279 100644 --- a/board/rsdproto/u-boot.lds +++ b/board/rsdproto/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc8260/start.o (.text) *(.text) + *(.fixup) *(.got1) /*. = env_offset; */ } diff --git a/cpu/mpc512x/config.mk b/cpu/mpc512x/config.mk index 3259d53a13f..8a07c5a3b67 100644 --- a/cpu/mpc512x/config.mk +++ b/cpu/mpc512x/config.mk @@ -19,7 +19,7 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \ -ffixed-r2 -ffixed-r29 -msoft-float -mcpu=603e diff --git a/cpu/mpc5xx/config.mk b/cpu/mpc5xx/config.mk index e95b8a1a855..64cd60071ad 100644 --- a/cpu/mpc5xx/config.mk +++ b/cpu/mpc5xx/config.mk @@ -28,7 +28,7 @@ # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_5xx -ffixed-r2 -ffixed-r29 -mpowerpc -msoft-float diff --git a/cpu/mpc5xx/u-boot.lds b/cpu/mpc5xx/u-boot.lds index 10001b1c1de..5b03fef66c7 100644 --- a/cpu/mpc5xx/u-boot.lds +++ b/cpu/mpc5xx/u-boot.lds @@ -59,6 +59,7 @@ SECTIONS cpu/mpc5xx/start.o (.text) *(.text) + *(.fixup) *(.got1) } _etext = .; diff --git a/cpu/mpc5xxx/config.mk b/cpu/mpc5xxx/config.mk index 0e861c4a0f8..0df51babd70 100644 --- a/cpu/mpc5xxx/config.mk +++ b/cpu/mpc5xxx/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 -ffixed-r29 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc5xxx/u-boot-customlayout.lds b/cpu/mpc5xxx/u-boot-customlayout.lds index 11079430d57..123a14c5aa0 100644 --- a/cpu/mpc5xxx/u-boot-customlayout.lds +++ b/cpu/mpc5xxx/u-boot-customlayout.lds @@ -66,6 +66,7 @@ SECTIONS common/environment.o (.ppcenv) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/cpu/mpc5xxx/u-boot.lds b/cpu/mpc5xxx/u-boot.lds index a28a3afc71c..78818a49ebd 100644 --- a/cpu/mpc5xxx/u-boot.lds +++ b/cpu/mpc5xxx/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc5xxx/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/cpu/mpc8220/config.mk b/cpu/mpc8220/config.mk index c41cafe97fe..8e3ba54287c 100644 --- a/cpu/mpc8220/config.mk +++ b/cpu/mpc8220/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 -ffixed-r29 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc8220/u-boot.lds b/cpu/mpc8220/u-boot.lds index a199a64f131..889bc77d2f8 100644 --- a/cpu/mpc8220/u-boot.lds +++ b/cpu/mpc8220/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc8220/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/cpu/mpc824x/config.mk b/cpu/mpc824x/config.mk index 17fdb21d35a..66207f4354d 100644 --- a/cpu/mpc824x/config.mk +++ b/cpu/mpc824x/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -ffixed-r29 -mstring -mcpu=603e -msoft-float diff --git a/cpu/mpc824x/u-boot.lds b/cpu/mpc824x/u-boot.lds index 8cbef4aed43..c90d1e9457e 100644 --- a/cpu/mpc824x/u-boot.lds +++ b/cpu/mpc824x/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc824x/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/cpu/mpc8260/config.mk b/cpu/mpc8260/config.mk index d401e4ca04f..683b6fbf2b2 100644 --- a/cpu/mpc8260/config.mk +++ b/cpu/mpc8260/config.mk @@ -21,7 +21,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 -ffixed-r29 \ -mstring -mcpu=603e -mmultiple diff --git a/cpu/mpc8260/u-boot.lds b/cpu/mpc8260/u-boot.lds index b8abc17d413..3e84f234d72 100644 --- a/cpu/mpc8260/u-boot.lds +++ b/cpu/mpc8260/u-boot.lds @@ -55,6 +55,7 @@ SECTIONS { cpu/mpc8260/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/cpu/mpc83xx/config.mk b/cpu/mpc83xx/config.mk index 2ec395d4ca9..ecf8a60bbef 100644 --- a/cpu/mpc83xx/config.mk +++ b/cpu/mpc83xx/config.mk @@ -20,7 +20,7 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable +PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \ -ffixed-r2 -ffixed-r29 -msoft-float diff --git a/cpu/mpc83xx/u-boot.lds b/cpu/mpc83xx/u-boot.lds index ca663bc87bf..937c87a27cd 100644 --- a/cpu/mpc83xx/u-boot.lds +++ b/cpu/mpc83xx/u-boot.lds @@ -52,6 +52,7 @@ SECTIONS { cpu/mpc83xx/start.o (.text) *(.text) + *(.fixup) *(.got1) . = ALIGN(16); *(.rodata) diff --git a/include/common.h b/include/common.h index aca281bdad6..63ac8b062cd 100644 --- a/include/common.h +++ b/include/common.h @@ -63,19 +63,13 @@ typedef volatile unsigned char vu_char; #endif #elif defined(CONFIG_5xx) #include -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC5xxx) #include -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC512X) #include #include -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_MPC8220) #include -#define CONFIG_RELOC_FIXUP_WORKS -#elif defined(CONFIG_824X) -#define CONFIG_RELOC_FIXUP_WORKS #elif defined(CONFIG_8260) #if defined(CONFIG_MPC8247) \ || defined(CONFIG_MPC8248) \ @@ -87,7 +81,6 @@ typedef volatile unsigned char vu_char; #define CONFIG_MPC8260 1 #endif #include -#define CONFIG_RELOC_FIXUP_WORKS #endif #ifdef CONFIG_MPC86xx #include @@ -100,7 +93,6 @@ typedef volatile unsigned char vu_char; #ifdef CONFIG_MPC83XX #include #include -#define CONFIG_RELOC_FIXUP_WORKS #endif #ifdef CONFIG_4xx #include -- cgit v1.3.1 From fd329e6f05bbdfe6bd71b0e09f0c76d3b0a025a5 Mon Sep 17 00:00:00 2001 From: Luotao Fu Date: Wed, 14 Nov 2007 18:58:33 +0100 Subject: Fix the i2c frequency and default address in rsdproto board rsdproto board support has wrong I2C frequency and wrong return value handling. Signed-off-by: Luotao Fu --- board/rsdproto/rsdproto.c | 4 ++-- include/configs/rsdproto.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/board/rsdproto/rsdproto.c b/board/rsdproto/rsdproto.c index bf4fd5305f9..312d4b8605d 100644 --- a/board/rsdproto/rsdproto.c +++ b/board/rsdproto/rsdproto.c @@ -210,7 +210,7 @@ void read_RS5C372_time (struct tm *timedate) #define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10) - if (i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) { + if (! i2c_read (RS5C372_PPC_I2C_ADR, 0, 1, buffer, sizeof (buffer))) { timedate->tm_sec = BCD_TO_BIN (buffer[0]); timedate->tm_min = BCD_TO_BIN (buffer[1]); timedate->tm_hour = BCD_TO_BIN (buffer[2]); @@ -231,7 +231,7 @@ int read_LM84_temp (int address) unsigned char buffer[8]; /*int rc;*/ - if (i2c_read (address, 0, 1, buffer, 1)) { + if (! i2c_read (address, 0, 1, buffer, 1)) { return (int) buffer[0]; } else { /*printf("i2c error %02x\n", rc); */ diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h index 814082ccc63..40a05fa5e89 100644 --- a/include/configs/rsdproto.h +++ b/include/configs/rsdproto.h @@ -92,8 +92,8 @@ /* enable I2C */ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ -#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CFG_I2C_SLAVE 0x7F +#define CFG_I2C_SPEED 50000 /* I2C speed and slave address */ +#define CFG_I2C_SLAVE 0x30 /* system clock rate (CLKIN) - equal to the 60x and local bus speed */ -- cgit v1.3.1 From e8da58f2bc092891e8cc92b927ed5c4bd0cb0cab Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Mon, 19 Nov 2007 12:59:14 +0100 Subject: Fix build problems with mp2usb board Signed-off-by: Wolfgang Denk --- drivers/usb_ohci.c | 4 ++++ include/asm-arm/arch-at91rm9200/hardware.h | 2 -- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/usb_ohci.c b/drivers/usb_ohci.c index 7ddcab63e73..cfa384eff6f 100644 --- a/drivers/usb_ohci.c +++ b/drivers/usb_ohci.c @@ -59,6 +59,10 @@ #include #include "usb_ohci.h" +#ifdef CONFIG_AT91RM9200 +#include /* needed for AT91_USB_HOST_BASE */ +#endif + #if defined(CONFIG_ARM920T) || \ defined(CONFIG_S3C2400) || \ defined(CONFIG_S3C2410) || \ diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h index 8bb0c475236..b868e38a3ef 100644 --- a/include/asm-arm/arch-at91rm9200/hardware.h +++ b/include/asm-arm/arch-at91rm9200/hardware.h @@ -24,8 +24,6 @@ #ifndef __ASSEMBLY__ #include "AT91RM9200.h" -#else -#include "AT91RM9200_inc.h" #endif /* Virtual and Physical base address for system peripherals */ -- cgit v1.3.1 From f30ad49b16bf998b03c1a5228b6c86369d61c258 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Mon, 19 Nov 2007 10:02:13 -0500 Subject: Move CONFIG_QE out of CONFIG_PCI wrap for MPC8568MDS CONFIG_QE shouldn't be in the wrap of CONFIG_PCI, fix it. Signed-off-by: Haiying Wang --- include/configs/MPC8568MDS.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 548e1582a8f..b9366cc9947 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -334,11 +334,6 @@ extern unsigned long get_clock_freq(void); #define CFG_SRIO_MEM_BASE 0xc0000000 -#if defined(CONFIG_PCI) - -#define CONFIG_NET_MULTI -#define CONFIG_PCI_PNP /* do pci plug-and-play */ - #ifdef CONFIG_QE /* * QE UEC ethernet configuration @@ -377,6 +372,11 @@ extern unsigned long get_clock_freq(void); #endif #endif /* CONFIG_QE */ +#if defined(CONFIG_PCI) + +#define CONFIG_NET_MULTI +#define CONFIG_PCI_PNP /* do pci plug-and-play */ + #undef CONFIG_EEPRO100 #undef CONFIG_TULIP -- cgit v1.3.1