From 82cc368cd2b3bc8664d7e12f4f87af49c1783237 Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Wed, 6 Aug 2025 12:32:31 +0800 Subject: i3c: master: dw-i3c-master: Fix OD_TIMING for spike filter Fix the I3C device with spike filter unable to detect issue by setting tHIGH_INIT to 200ns for first broadcast address. This is according to MIPI SPEC 1.1.1 for first broadcast address which is already part of linux upstreamed patch. Signed-off-by: Dinesh Maniyam --- include/dw-i3c.h | 1 + include/linux/i3c/master.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/dw-i3c.h b/include/dw-i3c.h index 920f18bccb4..42c37d6dfa2 100644 --- a/include/dw-i3c.h +++ b/include/dw-i3c.h @@ -240,6 +240,7 @@ struct dw_i3c_master { char version[5]; char type[5]; u8 addrs[MAX_DEVS]; + bool first_broadcast; }; struct dw_i3c_i2c_dev_data { diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h index 213de4ca06a..04017f34822 100644 --- a/include/linux/i3c/master.h +++ b/include/linux/i3c/master.h @@ -278,6 +278,7 @@ struct i3c_device { #define I3C_BUS_I2C_FM_PLUS_SCL_RATE 1000000 #define I3C_BUS_I2C_FM_SCL_RATE 400000 #define I3C_BUS_TLOW_OD_MIN_NS 200 +#define I3C_BUS_THIGH_INIT_OD_MIN_NS 200 /** * enum i3c_bus_mode - I3C bus mode -- cgit v1.2.3