From 2dbe777753927176580dd4121b826241283009cb Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 26 Feb 2021 15:17:36 +0100 Subject: configs: meson64: add NVME boot target Let's add a boot target for NVMe so we can do a full boot over NVMe. Signed-off-by: Neil Armstrong --- include/configs/meson64.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 7e97f890526..17ebccd2c4b 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -58,6 +58,12 @@ #define BOOT_TARGET_DEVICES_USB(func) #endif +#ifdef CONFIG_CMD_NVME + #define BOOT_TARGET_NVME(func) func(NVME, nvme, 0) +#else + #define BOOT_TARGET_NVME(func) +#endif + #ifndef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ func(ROMUSB, romusb, na) \ @@ -65,6 +71,7 @@ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_NVME(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) #endif -- cgit v1.2.3 From 0a527fda7821c133ff34132b50e29e2b707db3f0 Mon Sep 17 00:00:00 2001 From: Reinoud Zandijk Date: Wed, 24 Feb 2021 17:44:42 +0100 Subject: Fix IDE commands issued, fix endian issues, fix non MMIO Fixes IDE issues found on the Malta board under Qemu: 1) DMA implied commands were sent to the controller in stead of the PIO variants. The rest of the code is DMA free and written for PIO operation. 2) direct pointer access was used to read and write the registers instead of the inb/inw/outb/outw functions/macros. Registers don't have to be memory mapped and ATA_CURR_BASE() does not have to return an offset from address zero. 3) Endian isues in ide_ident() and reading/writing data in general. Names were corrupted and sizes misreported. Tested malta_defconfig and maltael_defconfig to work again in Qemu. Signed-off-by: Reinoud Zandijk Tested-by: Heinrich Schuchardt --- include/ata.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/ata.h b/include/ata.h index 3d870c973f2..32ad5f64271 100644 --- a/include/ata.h +++ b/include/ata.h @@ -134,7 +134,7 @@ typedef struct hd_driveid { unsigned short cur_capacity1; /* (2 words, misaligned int) */ unsigned char multsect; /* current multiple sector count */ unsigned char multsect_valid; /* when (bit0==1) multsect is ok */ - unsigned int lba_capacity; /* total number of sectors */ + unsigned short lba_capacity[2];/* two words containing total number of sectors */ unsigned short dma_1word; /* single-word dma info */ unsigned short dma_mword; /* multiple-word dma info */ unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */ -- cgit v1.2.3 From ab7f8d18502eda35cef5539b1cf2dbbce9d48c30 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Thu, 25 Mar 2021 17:07:32 -0700 Subject: arm: octeontx: move CONFIG_SUPPORT_RAW_INITRD to configs Move CONFIG_SUPPORT_RAW_INITRD out of the octeontx_common header and into the defconfig files. Signed-off-by: Tim Harvey Reviewed-by: Stefan Roese --- include/configs/octeontx_common.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 810b2bdbd5b..55d329f55e9 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -8,8 +8,6 @@ #ifndef __OCTEONTX_COMMON_H__ #define __OCTEONTX_COMMON_H__ -#define CONFIG_SUPPORT_RAW_INITRD - /** Maximum size of image supported for bootm (and bootable FIT images) */ #define CONFIG_SYS_BOOTM_LEN (256 << 20) -- cgit v1.2.3 From 8bb5a66e5b100b7de1d787a471c117c14743537b Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Thu, 25 Mar 2021 17:07:33 -0700 Subject: arm: octeontx: support generic distro config Support Generic Distro Default config Signed-off-by: Tim Harvey Reviewed-by: Stefan Roese --- include/configs/octeontx_common.h | 31 ++++++++++++++++++++++++++----- 1 file changed, 26 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 55d329f55e9..434e54442fc 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -8,6 +8,32 @@ #ifndef __OCTEONTX_COMMON_H__ #define __OCTEONTX_COMMON_H__ +#ifdef CONFIG_DISTRO_DEFAULTS +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(USB, usb, 0) \ + func(SCSI, scsi, 0) + +#include +/* Extra environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=0\0" \ + "loadaddr=0x20080000\0" \ + "kernel_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x03000000\0" \ + "scriptaddr=0x04000000\0" \ + BOOTENV + +#else + +/** Extra environment settings */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=20080000\0" \ + "autoload=0\0" + +#endif /* ifdef CONFIG_DISTRO_DEFAULTS*/ + /** Maximum size of image supported for bootm (and bootable FIT images) */ #define CONFIG_SYS_BOOTM_LEN (256 << 20) @@ -50,11 +76,6 @@ # define CONFIG_SF_DEFAULT_CS 0 #endif -/** Extra environment settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=20080000\0" \ - "autoload=0\0" - /** Environment defines */ #if defined(CONFIG_ENV_IS_IN_MMC) #define CONFIG_SYS_MMC_ENV_DEV 0 -- cgit v1.2.3 From 84b2cd74f370dabb707e2611bf57714a66d08622 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 12 Apr 2021 01:04:50 +0100 Subject: arm: highbank: Limit FDT and initrd load addresses So far on Highbank/Midway machines U-Boot only ever uses 512MB of DRAM, even though the machines have typically 4GB and 8GB, respectively. That means that so far we didn't need an extra limit for placing the DTB and initrd, as the 512MB are lower than the kernel's limit ("lowmem", typically 768MB). With U-Boot now needing to learn about the actual memory size (to correctly populate the EFI memory map), it might relocate fdt and initrd to the end of DRAM, which is out of reach of the kernel. So add limiting values to the fdt_high and initrd_high environment variables, to prevent U-Boot from using too high addresses. Signed-off-by: Andre Przywara Reviewed-by: Tom Rini --- include/configs/highbank.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/highbank.h b/include/configs/highbank.h index bdbaa475d20..5e3cc3a1db6 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -57,4 +57,8 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x01000000 #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x20000000\0" \ + "initrd_high=0x20000000\0" + #endif -- cgit v1.2.3 From 109552d773e7aeb0f6417d8245fb0ecf01599ef3 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 12 Apr 2021 01:04:51 +0100 Subject: arm: highbank: Enable OF_CONTROL All Calxeda machines are actually a poster book example of device tree usage: the DT is loaded from flash by the management processor into DRAM, the memory node is populated with the detected DRAM size and this DT is then handed over to the kernel. So it's a shame that U-Boot didn't participate in this chain, but fortunately this is easy to fix: Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial function to tell U-Boot about the (fixed) location of the DTB in DRAM. Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform data from the DT. Also define AHCI, to bring this driver into the driver model world as well. Signed-off-by: Andre Przywara --- include/configs/highbank.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 5e3cc3a1db6..7f37c81fc9f 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) #define CONFIG_PL011_CLOCK 150000000 -#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ -- cgit v1.2.3 From debb07bf107a9feb3cbf03db6b10abae466e4d41 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 12 Apr 2021 01:04:52 +0100 Subject: net: calxedagmac: Convert to DM_ETH To squash that nasty warning message and make better use of the newly gained OF_CONTROL feature, let's convert the calxedagmac driver to the "new" driver model. The conversion is pretty straight forward, mostly just adjusting the use of the involved data structures. The only actual change is the required split of the receive routine into a receive and free_pkt part. Also this allows us to get rid of the hardcoded platform information and explicit init calls. This also uses the opportunity to wrap the code decoding the MMIO register base address, to make it safe for using PHYS_64BIT later. Signed-off-by: Andre Przywara Reviewed-by: Ramon Fried --- include/configs/highbank.h | 2 -- include/netdev.h | 1 - 2 files changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 7f37c81fc9f..fbd26ddd0fc 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -27,8 +27,6 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) -#define CONFIG_CALXEDA_XGMAC - #define CONFIG_BOOT_RETRY_TIME -1 #define CONFIG_RESET_TO_RETRY diff --git a/include/netdev.h b/include/netdev.h index 0ad9f8dc3a5..b960c421063 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -33,7 +33,6 @@ int at91emac_register(struct bd_info *bis, unsigned long iobase); int ax88180_initialize(struct bd_info *bis); int bcm_sf2_eth_register(struct bd_info *bis, u8 dev_num); int bfin_EMAC_initialize(struct bd_info *bis); -int calxedaxgmac_initialize(u32 id, ulong base_addr); int cs8900_initialize(u8 dev_num, int base_addr); int dc21x4x_initialize(struct bd_info *bis); int designware_initialize(ulong base_addr, u32 interface); -- cgit v1.2.3 From ff47d539f28bcae15bc680d2e32fec6cc9551eb4 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 12 Apr 2021 01:04:53 +0100 Subject: arm: highbank: Remove artificial SDRAM size So far we were defining a somewhat confusing PHYS_SDRAM_1_SIZE variable, which originally was only used for setting the memtest boundaries. This definition in highbank.h has been removed about a year ago (moved to Kconfig), so we also don't need the hard-coded size definition any longer. Get rid of the misleading memory size definition, which was actually wrong anyway (it's 4088 MB for those machines with just 4GB of DRAM). Signed-off-by: Andre Przywara --- include/configs/highbank.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include') diff --git a/include/configs/highbank.h b/include/configs/highbank.h index fbd26ddd0fc..ff92c4f5540 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -39,12 +39,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x800000 #define CONFIG_SYS_64BIT_LBA -/*----------------------------------------------------------------------- - * Physical Memory Map - * The DRAM is already setup, so do not touch the DT node later. - */ -#define PHYS_SDRAM_1_SIZE (4089 << 20) - /* Environment data setup */ #define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ -- cgit v1.2.3 From 56a3433ef559512e731a943d8af7965973d090df Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 19 Apr 2021 16:18:49 -0400 Subject: sysinfo.h: Add re-inclusion guard Add #ifndef __SYSINFO_H__ ... #endif to prevent re-inclusion of this file. Signed-off-by: Tom Rini --- include/sysinfo.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/sysinfo.h b/include/sysinfo.h index 68fad25a065..8054d4d4a1f 100644 --- a/include/sysinfo.h +++ b/include/sysinfo.h @@ -4,6 +4,9 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ +#ifndef __SYSINFO_H__ +#define __SYSINFO_H__ + struct udevice; /* @@ -228,3 +231,4 @@ static inline int sysinfo_get_fit_loadable(struct udevice *dev, int index, } #endif +#endif -- cgit v1.2.3 From 2963d606bc6bbaf7b097ec8a42abec7f71339a9d Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Thu, 1 Apr 2021 02:01:52 +0300 Subject: psci: add v1.0/v1.1 definitions from Linux Sync and add PSCI API versions 1.0/1.1 definitions from Linux. Signed-off-by: Igor Opaniuk --- include/linux/psci.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'include') diff --git a/include/linux/psci.h b/include/linux/psci.h index 841dbc8da7e..38edde31370 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -46,6 +46,14 @@ #define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) +#define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) +#define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) +#define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15) +#define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) + +#define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) +#define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) + /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff #define PSCI_0_2_POWER_STATE_ID_SHIFT 0 @@ -56,6 +64,13 @@ #define PSCI_0_2_POWER_STATE_AFFL_MASK \ (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) +/* PSCI extended power state encoding for CPU_SUSPEND function */ +#define PSCI_1_0_EXT_POWER_STATE_ID_MASK 0xfffffff +#define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 0 +#define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 30 +#define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK \ + (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT) + /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ #define PSCI_0_2_AFFINITY_LEVEL_ON 0 #define PSCI_0_2_AFFINITY_LEVEL_OFF 1 @@ -75,6 +90,18 @@ (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) #define PSCI_VERSION_MINOR(ver) \ ((ver) & PSCI_VERSION_MINOR_MASK) +#define PSCI_VERSION(maj, min) \ + ((((maj) << PSCI_VERSION_MAJOR_SHIFT) & PSCI_VERSION_MAJOR_MASK) | \ + ((min) & PSCI_VERSION_MINOR_MASK)) + +/* PSCI features decoding (>=1.0) */ +#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 1 +#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \ + (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) + +#define PSCI_1_0_OS_INITIATED BIT(0) +#define PSCI_1_0_SUSPEND_MODE_PC 0 +#define PSCI_1_0_SUSPEND_MODE_OSI 1 /* PSCI return values (inclusive of all PSCI versions) */ #define PSCI_RET_SUCCESS 0 @@ -86,6 +113,7 @@ #define PSCI_RET_INTERNAL_FAILURE -6 #define PSCI_RET_NOT_PRESENT -7 #define PSCI_RET_DISABLED -8 +#define PSCI_RET_INVALID_ADDRESS -9 #ifdef CONFIG_ARM_PSCI_FW unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, -- cgit v1.2.3 From b7135b034f9f19a89516bb53535891e14a545395 Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Thu, 1 Apr 2021 02:01:53 +0300 Subject: psci: add features/reset2 support Adds support for: * PSCI_FEATURES, which was introduced in PSCI 1.0. This provides API that allows discovering whether a specific PSCI function is implemented and its features. * SYSTEM_RESET2, which was introduced in PSCI 1.1, which extends existing SYSTEM_RESET. It provides support for vendor-specific resets, providing reset_type as an additional param. For additional details visit [1]. Implementations of some functions were borrowed from Linux PSCI driver code [2]. [1] https://developer.arm.com/documentation/den0022/latest/ [2] drivers/firmware/psci/psci.c Signed-off-by: Igor Opaniuk --- include/linux/psci.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/psci.h b/include/linux/psci.h index 38edde31370..c78c1079a82 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -118,6 +118,9 @@ #ifdef CONFIG_ARM_PSCI_FW unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3); +void psci_sys_reset(u32 type); +void psci_sys_poweroff(void); + #else static inline unsigned long invoke_psci_fn(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3) -- cgit v1.2.3