From 99154714e29fbea8d5cd30e691ff4db990dcc6f4 Mon Sep 17 00:00:00 2001 From: Simon Schwarz Date: Fri, 30 Sep 2011 00:41:34 +0000 Subject: devkit8000: Add config to enable SPL MMC boot Add MMC boot configs to devkit8000 config. Signed-off-by: Simon Schwarz --- include/configs/devkit8000.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index ba0d23e312b..eed1b0653df 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -322,7 +322,12 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ #define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ -- cgit v1.3.1 From 43883dc3e50e224ea68031bf34b766544311bf60 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Fri, 21 Jan 2011 17:39:03 +0100 Subject: MX51: vision2: Set global macros Adapt vision2 to the current u-boot version. Drop own macros to set global data and use the common ones. Signed-off-by: Stefano Babic --- include/configs/vision2.h | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 3b42afc9234..e411faa2b81 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -187,14 +187,15 @@ #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) #define PHYS_SDRAM_2 CSD1_BASE_ADDR #define PHYS_SDRAM_2_SIZE (256 * 1024 * 1024) -#define CONFIG_SYS_SDRAM_BASE 0x90000000 -#define CONFIG_SYS_INIT_RAM_ADDR 0x1FFE8000 - -#define CONFIG_SYS_INIT_RAM_SIZE (64 * 1024) -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_GBL_DATA_OFFSET) +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + #define CONFIG_BOARD_EARLY_INIT_F /* 166 MHz DDR RAM */ -- cgit v1.3.1 From e542b7f0a28f0a0ccb0921ed97f38e47afbb40d8 Mon Sep 17 00:00:00 2001 From: Łukasz Majewski Date: Thu, 6 Oct 2011 02:37:34 +0000 Subject: misc:pmic:core New generic PMIC driver I2C or SPI PMIC devices can be accessed. Separate files: pmic_i2c.c and pmic_spi.c are responsible for handling transmission over I2C or SPI bus. New flags: CONFIG_PMIC - enable PMIC general device. CONFIG_PMIC_I2C/SPI - specify the interface to be used. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- drivers/misc/Makefile | 3 + drivers/misc/pmic_core.c | 147 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/misc/pmic_i2c.c | 92 +++++++++++++++++++++++++++++ drivers/misc/pmic_spi.c | 109 +++++++++++++++++++++++++++++++++++ include/pmic.h | 71 +++++++++++++++++++++++ 5 files changed, 422 insertions(+) create mode 100644 drivers/misc/pmic_core.c create mode 100644 drivers/misc/pmic_i2c.c create mode 100644 drivers/misc/pmic_spi.c create mode 100644 include/pmic.h (limited to 'include') diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index b152486116e..91c5bfa38df 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -35,6 +35,9 @@ COBJS-$(CONFIG_NS87308) += ns87308.o COBJS-$(CONFIG_PDSP188x) += pdsp188x.o COBJS-$(CONFIG_STATUS_LED) += status_led.o COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o +COBJS-$(CONFIG_PMIC) += pmic_core.o +COBJS-$(CONFIG_PMIC_I2C) += pmic_i2c.o +COBJS-$(CONFIG_PMIC_SPI) += pmic_spi.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/misc/pmic_core.c b/drivers/misc/pmic_core.c new file mode 100644 index 00000000000..5d62a56d346 --- /dev/null +++ b/drivers/misc/pmic_core.c @@ -0,0 +1,147 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de + * + * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +static struct pmic pmic; + +int check_reg(u32 reg) +{ + if (reg >= pmic.number_of_regs) { + printf(" = %d is invalid. Should be less than %d\n", + reg, pmic.number_of_regs); + return -1; + } + return 0; +} + +int pmic_set_output(struct pmic *p, u32 reg, int out, int on) +{ + u32 val; + + if (pmic_reg_read(p, reg, &val)) + return -1; + + if (on) + val |= out; + else + val &= ~out; + + if (pmic_reg_write(p, reg, val)) + return -1; + + return 0; +} + +static void pmic_show_info(struct pmic *p) +{ + printf("PMIC: %s\n", p->name); +} + +static void pmic_dump(struct pmic *p) +{ + int i, ret; + u32 val; + + pmic_show_info(p); + for (i = 0; i < p->number_of_regs; i++) { + ret = pmic_reg_read(p, i, &val); + if (ret) + puts("PMIC: Registers dump failed\n"); + + if (!(i % 8)) + printf("\n0x%02x: ", i); + + printf("%08x ", val); + } + puts("\n"); +} + +struct pmic *get_pmic(void) +{ + return &pmic; +} + +int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + u32 ret, reg, val; + char *cmd; + + struct pmic *p = &pmic; + + /* at least two arguments please */ + if (argc < 2) + return cmd_usage(cmdtp); + + cmd = argv[1]; + if (strcmp(cmd, "dump") == 0) { + pmic_dump(p); + return 0; + } + + if (strcmp(cmd, "read") == 0) { + if (argc < 3) + return cmd_usage(cmdtp); + + reg = simple_strtoul(argv[2], NULL, 16); + + ret = pmic_reg_read(p, reg, &val); + + if (ret) + puts("PMIC: Register read failed\n"); + + printf("\n0x%02x: 0x%08x\n", reg, val); + + return 0; + } + + if (strcmp(cmd, "write") == 0) { + if (argc < 4) + return cmd_usage(cmdtp); + + reg = simple_strtoul(argv[2], NULL, 16); + val = simple_strtoul(argv[3], NULL, 16); + + pmic_reg_write(p, reg, val); + + return 0; + } + + /* No subcommand found */ + return 1; +} + +U_BOOT_CMD( + pmic, CONFIG_SYS_MAXARGS, 1, do_pmic, + "PMIC", + "dump - dump PMIC registers\n" + "pmic read - read register\n" + "pmic write - write register" +); diff --git a/drivers/misc/pmic_i2c.c b/drivers/misc/pmic_i2c.c new file mode 100644 index 00000000000..b82e8997e01 --- /dev/null +++ b/drivers/misc/pmic_i2c.c @@ -0,0 +1,92 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de + * + * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +int pmic_reg_write(struct pmic *p, u32 reg, u32 val) +{ + unsigned char buf[4] = { 0 }; + + if (check_reg(reg)) + return -1; + + switch (pmic_i2c_tx_num) { + case 3: + buf[0] = (val >> 16) & 0xff; + buf[1] = (val >> 8) & 0xff; + buf[2] = val & 0xff; + break; + case 1: + buf[0] = val & 0xff; + break; + } + + if (i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num)) + return -1; + + return 0; +} + +int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) +{ + unsigned char buf[4] = { 0 }; + u32 ret_val = 0; + + if (check_reg(reg)) + return -1; + + if (i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num)) + return -1; + + switch (pmic_i2c_tx_num) { + case 3: + ret_val = buf[0] << 16 | buf[1] << 8 | buf[2]; + break; + case 1: + ret_val = buf[0]; + break; + } + memcpy(val, &ret_val, sizeof(ret_val)); + + return 0; +} + +int pmic_probe(struct pmic *p) +{ + i2c_set_bus_num(p->bus); + debug("PMIC:%s probed!\n", p->name); + if (i2c_probe(pmic_i2c_addr)) { + printf("Can't find PMIC:%s\n", p->name); + return -1; + } + + return 0; +} diff --git a/drivers/misc/pmic_spi.c b/drivers/misc/pmic_spi.c new file mode 100644 index 00000000000..ff35377afc3 --- /dev/null +++ b/drivers/misc/pmic_spi.c @@ -0,0 +1,109 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * (C) Copyright 2010 + * Stefano Babic, DENX Software Engineering, sbabic@denx.de + * + * (C) Copyright 2008-2009 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +static struct spi_slave *slave; + +void pmic_spi_free(struct spi_slave *slave) +{ + if (slave) + spi_free_slave(slave); +} + +struct spi_slave *pmic_spi_probe(struct pmic *p) +{ + return spi_setup_slave(p->bus, + p->hw.spi.cs, + p->hw.spi.clk, + p->hw.spi.mode); +} + +static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32 write) +{ + u32 pmic_tx, pmic_rx; + u32 tmp; + + if (!slave) { + slave = pmic_spi_probe(p); + + if (!slave) + return -1; + } + + if (check_reg(reg)) + return -1; + + if (spi_claim_bus(slave)) + return -1; + + pmic_tx = p->hw.spi.prepare_tx(reg, val, write); + + tmp = cpu_to_be32(pmic_tx); + + if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx, + pmic_spi_flags)) { + spi_release_bus(slave); + return -1; + } + + if (write) { + pmic_tx = p->hw.spi.prepare_tx(0, NULL, write); + pmic_tx &= ~(1 << 31); + tmp = cpu_to_be32(pmic_tx); + if (spi_xfer(slave, pmic_spi_bitlen, &tmp, &pmic_rx, + pmic_spi_flags)) { + spi_release_bus(slave); + return -1; + } + } + + spi_release_bus(slave); + *val = cpu_to_be32(pmic_rx); + + return 0; +} + +int pmic_reg_write(struct pmic *p, u32 reg, u32 val) +{ + if (pmic_reg(p, reg, &val, 1)) + return -1; + + return 0; +} + +int pmic_reg_read(struct pmic *p, u32 reg, u32 *val) +{ + if (pmic_reg(p, reg, val, 0)) + return -1; + + return 0; +} diff --git a/include/pmic.h b/include/pmic.h new file mode 100644 index 00000000000..52a1526d951 --- /dev/null +++ b/include/pmic.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CORE_PMIC_H_ +#define __CORE_PMIC_H_ + +enum { PMIC_I2C, PMIC_SPI, }; +enum { I2C_PMIC, I2C_NUM, }; +enum { PMIC_READ, PMIC_WRITE, }; + +struct p_i2c { + unsigned char addr; + unsigned char *buf; + unsigned char tx_num; +}; + +struct p_spi { + unsigned int cs; + unsigned int mode; + unsigned int bitlen; + unsigned int clk; + unsigned int flags; + u32 (*prepare_tx)(u32 reg, u32 *val, u32 write); +}; + +struct pmic { + const char *name; + unsigned char bus; + unsigned char interface; + unsigned char number_of_regs; + union hw { + struct p_i2c i2c; + struct p_spi spi; + } hw; +}; + +int pmic_init(void); +int check_reg(u32 reg); +struct pmic *get_pmic(void); +int pmic_probe(struct pmic *p); +int pmic_reg_read(struct pmic *p, u32 reg, u32 *val); +int pmic_reg_write(struct pmic *p, u32 reg, u32 val); +int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on); + +#define pmic_i2c_addr (p->hw.i2c.addr) +#define pmic_i2c_tx_num (p->hw.i2c.tx_num) + +#define pmic_spi_bitlen (p->hw.spi.bitlen) +#define pmic_spi_flags (p->hw.spi.flags) + +#endif /* __CORE_PMIC_H_ */ -- cgit v1.3.1 From 993858585decc107ddcd7db9c1d374e80ed93d7f Mon Sep 17 00:00:00 2001 From: Łukasz Majewski Date: Mon, 3 Oct 2011 19:45:50 +0000 Subject: misc:pmic:max8998 MAX8998 support at a new PMIC driver. This commit adds support for MAX8998 PMIC driver. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- drivers/misc/Makefile | 1 + drivers/misc/pmic_max8998.c | 43 +++++++++++++++++++++++ include/max8998_pmic.h | 84 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 128 insertions(+) create mode 100644 drivers/misc/pmic_max8998.c create mode 100644 include/max8998_pmic.h (limited to 'include') diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 91c5bfa38df..6d82c22bde0 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o COBJS-$(CONFIG_PMIC) += pmic_core.o COBJS-$(CONFIG_PMIC_I2C) += pmic_i2c.o COBJS-$(CONFIG_PMIC_SPI) += pmic_spi.o +COBJS-$(CONFIG_PMIC_MAX8998) += pmic_max8998.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/misc/pmic_max8998.c b/drivers/misc/pmic_max8998.c new file mode 100644 index 00000000000..cc69fd70803 --- /dev/null +++ b/drivers/misc/pmic_max8998.c @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +int pmic_init(void) +{ + struct pmic *p = get_pmic(); + static const char name[] = "MAX8998_PMIC"; + + puts("Board PMIC init\n"); + + p->name = name; + p->interface = PMIC_I2C; + p->number_of_regs = PMIC_NUM_OF_REGS; + p->hw.i2c.addr = MAX8998_I2C_ADDR; + p->hw.i2c.tx_num = 1; + p->bus = I2C_PMIC; + + return 0; +} diff --git a/include/max8998_pmic.h b/include/max8998_pmic.h new file mode 100644 index 00000000000..bf28820c5f4 --- /dev/null +++ b/include/max8998_pmic.h @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MAX8998_PMIC_H_ +#define __MAX8998_PMIC_H_ + +/* MAX 8998 registers */ +enum { + MAX8998_REG_IRQ1, + MAX8998_REG_IRQ2, + MAX8998_REG_IRQ3, + MAX8998_REG_IRQ4, + MAX8998_REG_IRQM1, + MAX8998_REG_IRQM2, + MAX8998_REG_IRQM3, + MAX8998_REG_IRQM4, + MAX8998_REG_STATUS1, + MAX8998_REG_STATUS2, + MAX8998_REG_STATUSM1, + MAX8998_REG_STATUSM2, + MAX8998_REG_CHGR1, + MAX8998_REG_CHGR2, + MAX8998_REG_LDO_ACTIVE_DISCHARGE1, + MAX8998_REG_LDO_ACTIVE_DISCHARGE2, + MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, + MAX8998_REG_ONOFF1, + MAX8998_REG_ONOFF2, + MAX8998_REG_ONOFF3, + MAX8998_REG_ONOFF4, + MAX8998_REG_BUCK1_VOLTAGE1, + MAX8998_REG_BUCK1_VOLTAGE2, + MAX8998_REG_BUCK1_VOLTAGE3, + MAX8998_REG_BUCK1_VOLTAGE4, + MAX8998_REG_BUCK2_VOLTAGE1, + MAX8998_REG_BUCK2_VOLTAGE2, + MAX8998_REG_BUCK3, + MAX8998_REG_BUCK4, + MAX8998_REG_LDO2_LDO3, + MAX8998_REG_LDO4, + MAX8998_REG_LDO5, + MAX8998_REG_LDO6, + MAX8998_REG_LDO7, + MAX8998_REG_LDO8_LDO9, + MAX8998_REG_LDO10_LDO11, + MAX8998_REG_LDO12, + MAX8998_REG_LDO13, + MAX8998_REG_LDO14, + MAX8998_REG_LDO15, + MAX8998_REG_LDO16, + MAX8998_REG_LDO17, + MAX8998_REG_BKCHR, + MAX8998_REG_LBCNFG1, + MAX8998_REG_LBCNFG2, + PMIC_NUM_OF_REGS, +}; + +#define MAX8998_LDO3 (1 << 2) +#define MAX8998_LDO8 (1 << 5) + +#define MAX8998_I2C_ADDR (0xCC >> 1) + +enum { LDO_OFF, LDO_ON }; + +#endif /* __MAX8998_PMIC_H_ */ -- cgit v1.3.1 From 2a7dd9d71cb7086faa102ef1eb148ea6481214ae Mon Sep 17 00:00:00 2001 From: Łukasz Majewski Date: Mon, 3 Oct 2011 19:45:51 +0000 Subject: misc:pmic:samsung Enable PMIC driver at GONI target Enable support for new PMIC driver at GONI reference target. Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- board/samsung/goni/goni.c | 4 ++++ include/configs/s5p_goni.h | 4 ++++ 2 files changed, 8 insertions(+) (limited to 'include') diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index e24cd29f375..e191bfbd28c 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -25,6 +25,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -38,6 +39,9 @@ int board_init(void) gd->bd->bi_arch_number = MACH_TYPE_GONI; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; +#if defined(CONFIG_PMIC) + pmic_init(); +#endif return 0; } diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 6d0058f8e86..a52b0a561b3 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -220,6 +220,10 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) +#define CONFIG_PMIC +#define CONFIG_PMIC_I2C +#define CONFIG_PMIC_MAX8998 + #include /* * I2C Settings -- cgit v1.3.1 From b2e5add3b2a27accbf4ca649bcd2b763640cea01 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Wed, 5 Oct 2011 12:38:27 +0200 Subject: misc: pmic: Freescale PMIC switches to generic PMIC driver Signed-off-by: Lukasz Majewski Signed-off-by: Kyungmin Park Cc: Stefano Babic --- drivers/misc/Makefile | 1 + drivers/misc/pmic_fsl.c | 57 +++++++++++++++++++++++++++++++++++++++++++++++++ include/fsl_pmic.h | 5 +---- 3 files changed, 59 insertions(+), 4 deletions(-) create mode 100644 drivers/misc/pmic_fsl.c (limited to 'include') diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 6d82c22bde0..f732a95b0e4 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -36,6 +36,7 @@ COBJS-$(CONFIG_PDSP188x) += pdsp188x.o COBJS-$(CONFIG_STATUS_LED) += status_led.o COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o COBJS-$(CONFIG_PMIC) += pmic_core.o +COBJS-$(CONFIG_PMIC_FSL) += pmic_fsl.o COBJS-$(CONFIG_PMIC_I2C) += pmic_i2c.o COBJS-$(CONFIG_PMIC_SPI) += pmic_spi.o COBJS-$(CONFIG_PMIC_MAX8998) += pmic_max8998.o diff --git a/drivers/misc/pmic_fsl.c b/drivers/misc/pmic_fsl.c new file mode 100644 index 00000000000..13dde47fc86 --- /dev/null +++ b/drivers/misc/pmic_fsl.c @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2011 Samsung Electronics + * Lukasz Majewski + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write) +{ + if ((val == NULL) && (write)) + return *val & ~(1 << 31); + else + return (write << 31) | (reg << 25) | (*val & 0x00FFFFFF); +} + +int pmic_init(void) +{ + struct pmic *p = get_pmic(); + static const char name[] = "FSL_PMIC"; + + puts("Board PMIC init\n"); + + p->name = name; + p->interface = PMIC_SPI; + p->number_of_regs = PMIC_NUM_OF_REGS; + p->bus = CONFIG_FSL_PMIC_BUS; + + p->hw.spi.cs = CONFIG_FSL_PMIC_CS; + p->hw.spi.clk = CONFIG_FSL_PMIC_CLK; + p->hw.spi.mode = CONFIG_FSL_PMIC_MODE; + p->hw.spi.bitlen = CONFIG_FSL_PMIC_BITLEN; + p->hw.spi.flags = SPI_XFER_BEGIN | SPI_XFER_END; + p->hw.spi.prepare_tx = pmic_spi_prepare_tx; + + return 0; +} diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h index e3abde6e4d7..742f2e19f9e 100644 --- a/include/fsl_pmic.h +++ b/include/fsl_pmic.h @@ -99,6 +99,7 @@ enum { REG_TEST2, REG_TEST3, REG_TEST4, + PMIC_NUM_OF_REGS, }; /* REG_POWER_MISC */ @@ -121,8 +122,4 @@ enum { /* Interrupt status 1 */ #define RTCRSTI (1 << 7) -void pmic_show_pmic_info(void); -void pmic_reg_write(u32 reg, u32 value); -u32 pmic_reg_read(u32 reg); - #endif -- cgit v1.3.1 From bac395ee42d6770c3e71f5e06bc1825a04cff224 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sun, 2 Oct 2011 12:58:03 +0200 Subject: MX5: vision2: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic --- board/ttcontrol/vision2/vision2.c | 33 +++++++++++++++++++-------------- include/configs/vision2.h | 5 ++++- 2 files changed, 23 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c index e496f643125..d3815b2eed8 100644 --- a/board/ttcontrol/vision2/vision2.c +++ b/board/ttcontrol/vision2/vision2.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include @@ -313,59 +314,63 @@ static void reset_peripherals(int reset) static void power_init_mx51(void) { unsigned int val; + struct pmic *p; + + pmic_init(); + p = get_pmic(); /* Write needed to Power Gate 2 register */ - val = pmic_reg_read(REG_POWER_MISC); + pmic_reg_read(p, REG_POWER_MISC, &val); /* enable VCAM with 2.775V to enable read from PMIC */ val = VCAMCONFIG | VCAMEN; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); /* * Set switchers in Auto in NORMAL mode & STANDBY mode * Setup the switcher mode for SW1 & SW2 */ - val = pmic_reg_read(REG_SW_4); + pmic_reg_read(p, REG_SW_4, &val); val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) | (SWMODE_MASK << SWMODE2_SHIFT))); val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) | (SWMODE_AUTO_AUTO << SWMODE2_SHIFT); - pmic_reg_write(REG_SW_4, val); + pmic_reg_write(p, REG_SW_4, val); /* Setup the switcher mode for SW3 & SW4 */ - val = pmic_reg_read(REG_SW_5); + pmic_reg_read(p, REG_SW_5, &val); val &= ~((SWMODE_MASK << SWMODE4_SHIFT) | (SWMODE_MASK << SWMODE3_SHIFT)); val |= (SWMODE_AUTO_AUTO << SWMODE4_SHIFT) | (SWMODE_AUTO_AUTO << SWMODE3_SHIFT); - pmic_reg_write(REG_SW_5, val); + pmic_reg_write(p, REG_SW_5, val); /* Set VGEN3 to 1.8V, VCAM to 3.0V */ - val = pmic_reg_read(REG_SETTING_0); + pmic_reg_read(p, REG_SETTING_0, &val); val &= ~(VCAM_MASK | VGEN3_MASK); val |= VCAM_3_0; - pmic_reg_write(REG_SETTING_0, val); + pmic_reg_write(p, REG_SETTING_0, val); /* Set VVIDEO to 2.775V, VAUDIO to 3V0, VSD to 1.8V */ - val = pmic_reg_read(REG_SETTING_1); + pmic_reg_read(p, REG_SETTING_1, &val); val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK); val |= VVIDEO_2_775 | VAUDIO_3_0 | VSD_1_8; - pmic_reg_write(REG_SETTING_1, val); + pmic_reg_write(p, REG_SETTING_1, val); /* Configure VGEN3 and VCAM regulators to use external PNP */ val = VGEN3CONFIG | VCAMCONFIG; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); udelay(200); /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG | VVIDEOEN | VAUDIOEN | VSDEN; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); - val = pmic_reg_read(REG_POWER_CTL2); + pmic_reg_read(p, REG_POWER_CTL2, &val); val |= WDIRESET; - pmic_reg_write(REG_POWER_CTL2, val); + pmic_reg_write(p, REG_POWER_CTL2, val); udelay(2500); diff --git a/include/configs/vision2.h b/include/configs/vision2.h index e411faa2b81..a2a9f3fb433 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -87,11 +87,14 @@ #define CONFIG_ENV_IS_IN_SPI_FLASH /* PMIC Controller */ -#define CONFIG_FSL_PMIC +#define CONFIG_PMIC +#define CONFIG_PMIC_SPI +#define CONFIG_PMIC_FSL #define CONFIG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE SPI_MODE_0 +#define CONFIG_FSL_PMIC_BITLEN 32 #define CONFIG_RTC_MC13783 /* -- cgit v1.3.1 From f33bd087c6a6b833236cb2f327cab39fe218c38c Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Thu, 6 Oct 2011 11:23:33 +0200 Subject: MX3: qong: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic --- board/davedenx/qong/qong.c | 11 ++++++++--- include/configs/qong.h | 5 ++++- 2 files changed, 12 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index 9fca1f8ddf1..a9f2ef0d9d8 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include "qong_fpga.h" @@ -176,11 +177,15 @@ int board_init (void) int board_late_init(void) { u32 val; + struct pmic *p; + + pmic_init(); + p = get_pmic(); /* Enable RTC battery */ - val = pmic_reg_read(REG_POWER_CTL0); - pmic_reg_write(REG_POWER_CTL0, val | COINCHEN); - pmic_reg_write(REG_INT_STATUS1, RTCRSTI); + pmic_reg_read(p, REG_POWER_CTL0, &val); + pmic_reg_write(p, REG_POWER_CTL0, val | COINCHEN); + pmic_reg_write(p, REG_INT_STATUS1, RTCRSTI); #ifdef CONFIG_HW_WATCHDOG mxc_hw_watchdog_enable(); diff --git a/include/configs/qong.h b/include/configs/qong.h index b1fc80c527d..f2a1e0143d2 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -60,11 +60,14 @@ #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_RTC_MC13783 -#define CONFIG_FSL_PMIC +#define CONFIG_PMIC +#define CONFIG_PMIC_SPI +#define CONFIG_PMIC_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 100000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC_BITLEN 32 /* FPGA */ #define CONFIG_FPGA -- cgit v1.3.1 From 9c38f7dfeb3543a35a250fff744d5039badb941b Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Thu, 6 Oct 2011 11:44:26 +0200 Subject: MX5: efikamx/efikasb: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic CC: Marek Vasut Acked-by: Marek Vasut --- board/efikamx/efikamx.c | 51 ++++++++++++++++++++++++++--------------------- include/configs/efikamx.h | 5 ++++- 2 files changed, 32 insertions(+), 24 deletions(-) (limited to 'include') diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c index 0c4e24bb4cc..b78bf6ccba1 100644 --- a/board/efikamx/efikamx.c +++ b/board/efikamx/efikamx.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include @@ -205,34 +206,38 @@ static void power_init(void) { unsigned int val; struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; + struct pmic *p; + + pmic_init(); + p = get_pmic(); /* Write needed to Power Gate 2 register */ - val = pmic_reg_read(REG_POWER_MISC); + pmic_reg_read(p, REG_POWER_MISC, &val); val &= ~PWGT2SPIEN; - pmic_reg_write(REG_POWER_MISC, val); + pmic_reg_write(p, REG_POWER_MISC, val); /* Externally powered */ - val = pmic_reg_read(REG_CHARGE); + pmic_reg_read(p, REG_CHARGE, &val); val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB; - pmic_reg_write(REG_CHARGE, val); + pmic_reg_write(p, REG_CHARGE, val); /* power up the system first */ - pmic_reg_write(REG_POWER_MISC, PWUP); + pmic_reg_write(p, REG_POWER_MISC, PWUP); /* Set core voltage to 1.1V */ - val = pmic_reg_read(REG_SW_0); + pmic_reg_read(p, REG_SW_0, &val); val = (val & ~SWx_VOLT_MASK) | SWx_1_100V; - pmic_reg_write(REG_SW_0, val); + pmic_reg_write(p, REG_SW_0, val); /* Setup VCC (SW2) to 1.25 */ - val = pmic_reg_read(REG_SW_1); + pmic_reg_read(p, REG_SW_1, &val); val = (val & ~SWx_VOLT_MASK) | SWx_1_250V; - pmic_reg_write(REG_SW_1, val); + pmic_reg_write(p, REG_SW_1, val); /* Setup 1V2_DIG1 (SW3) to 1.25 */ - val = pmic_reg_read(REG_SW_2); + pmic_reg_read(p, REG_SW_2, &val); val = (val & ~SWx_VOLT_MASK) | SWx_1_250V; - pmic_reg_write(REG_SW_2, val); + pmic_reg_write(p, REG_SW_2, val); udelay(50); /* Raise the core frequency to 800MHz */ @@ -240,46 +245,46 @@ static void power_init(void) /* Set switchers in Auto in NORMAL mode & STANDBY mode */ /* Setup the switcher mode for SW1 & SW2*/ - val = pmic_reg_read(REG_SW_4); + pmic_reg_read(p, REG_SW_4, &val); val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) | (SWMODE_MASK << SWMODE2_SHIFT))); val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) | (SWMODE_AUTO_AUTO << SWMODE2_SHIFT); - pmic_reg_write(REG_SW_4, val); + pmic_reg_write(p, REG_SW_4, val); /* Setup the switcher mode for SW3 & SW4 */ - val = pmic_reg_read(REG_SW_5); + pmic_reg_read(p, REG_SW_5, &val); val = (val & ~((SWMODE_MASK << SWMODE3_SHIFT) | (SWMODE_MASK << SWMODE4_SHIFT))); val |= (SWMODE_AUTO_AUTO << SWMODE3_SHIFT) | (SWMODE_AUTO_AUTO << SWMODE4_SHIFT); - pmic_reg_write(REG_SW_5, val); + pmic_reg_write(p, REG_SW_5, val); /* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.6V */ - val = pmic_reg_read(REG_SETTING_0); + pmic_reg_read(p, REG_SETTING_0, &val); val &= ~(VCAM_MASK | VGEN3_MASK | VDIG_MASK); val |= VDIG_1_65 | VGEN3_1_8 | VCAM_2_6; - pmic_reg_write(REG_SETTING_0, val); + pmic_reg_write(p, REG_SETTING_0, val); /* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */ - val = pmic_reg_read(REG_SETTING_1); + pmic_reg_read(p, REG_SETTING_1, &val); val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK); val |= VSD_3_15 | VAUDIO_3_0 | VVIDEO_2_775; - pmic_reg_write(REG_SETTING_1, val); + pmic_reg_write(p, REG_SETTING_1, val); /* Configure VGEN3 and VCAM regulators to use external PNP */ val = VGEN3CONFIG | VCAMCONFIG; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); udelay(200); /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG | VVIDEOEN | VAUDIOEN | VSDEN; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); - val = pmic_reg_read(REG_POWER_CTL2); + pmic_reg_read(p, REG_POWER_CTL2, &val); val |= WDIRESET; - pmic_reg_write(REG_POWER_CTL2, val); + pmic_reg_write(p, REG_POWER_CTL2, val); udelay(2500); } diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h index 54f48e446d9..7e4b424de4c 100644 --- a/include/configs/efikamx.h +++ b/include/configs/efikamx.h @@ -124,11 +124,14 @@ #endif /* SPI PMIC */ -#define CONFIG_FSL_PMIC +#define CONFIG_PMIC +#define CONFIG_PMIC_SPI +#define CONFIG_PMIC_FSL #define CONFIG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS (0 | 120 << 8) #define CONFIG_FSL_PMIC_CLK 25000000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC_BITLEN 32 #define CONFIG_RTC_MC13783 #endif -- cgit v1.3.1 From 5213d6e48e1f02beb65dfaf6c0f5ca5cdf742697 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Thu, 6 Oct 2011 21:07:42 +0200 Subject: MX35: mx35pdk: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic --- board/freescale/mx35pdk/mx35pdk.c | 18 ++++++++++++------ include/configs/mx35pdk.h | 5 +++-- 2 files changed, 15 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index 8f9b8573341..84a50b6acf3 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -202,9 +203,10 @@ int board_init(void) static inline int pmic_detect(void) { - int id; + unsigned int id; + struct pmic *p = get_pmic(); - id = pmic_reg_read(REG_IDENTIFICATION); + pmic_reg_read(p, REG_IDENTIFICATION, &id); id = (id >> 6) & 0x7; if (id == 0x7) @@ -225,15 +227,19 @@ int board_late_init(void) { u8 val; u32 pmic_val; + struct pmic *p; + pmic_init(); if (pmic_detect()) { + p = get_pmic(); mxc_request_iomux(MX35_PIN_WATCHDOG_RST, MUX_CONFIG_SION | MUX_CONFIG_ALT1); - pmic_val = pmic_reg_read(REG_SETTING_0); - pmic_reg_write(REG_SETTING_0, pmic_val | VO_1_30V | VO_1_50V); - pmic_val = pmic_reg_read(REG_MODE_0); - pmic_reg_write(REG_MODE_0, pmic_val | VGEN3EN); + pmic_reg_read(p, REG_SETTING_0, &pmic_val); + pmic_reg_write(p, REG_SETTING_0, + pmic_val | VO_1_30V | VO_1_50V); + pmic_reg_read(p, REG_MODE_0, &pmic_val); + pmic_reg_write(p, REG_MODE_0, pmic_val | VGEN3EN); mxc_request_iomux(MX35_PIN_COMPARE, MUX_CONFIG_GPIO); mxc_iomux_set_input(MUX_IN_GPIO1_IN_5, INPUT_CTL_PATH0); diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 670e76dacc1..1707b4d7e2e 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -69,8 +69,9 @@ /* * PMIC Configs */ -#define CONFIG_FSL_PMIC -#define CONFIG_FSL_PMIC_I2C +#define CONFIG_PMIC +#define CONFIG_PMIC_I2C +#define CONFIG_PMIC_FSL #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 /* -- cgit v1.3.1 From 5357265a62699e77ff6b78040d2a66833a48fc08 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sat, 8 Oct 2011 10:59:20 +0200 Subject: MX5: mx51evk: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic --- board/freescale/mx51evk/mx51evk.c | 47 ++++++++++++++++++++++----------------- include/configs/mx51evk.h | 6 ++++- 2 files changed, 31 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 8da1ee8b1aa..73ca513088b 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include @@ -182,34 +183,38 @@ static void power_init(void) { unsigned int val; struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; + struct pmic *p; + + pmic_init(); + p = get_pmic(); /* Write needed to Power Gate 2 register */ - val = pmic_reg_read(REG_POWER_MISC); + pmic_reg_read(p, REG_POWER_MISC, &val); val &= ~PWGT2SPIEN; - pmic_reg_write(REG_POWER_MISC, val); + pmic_reg_write(p, REG_POWER_MISC, val); /* Externally powered */ - val = pmic_reg_read(REG_CHARGE); + pmic_reg_read(p, REG_CHARGE, &val); val |= ICHRG0 | ICHRG1 | ICHRG2 | ICHRG3 | CHGAUTOB; - pmic_reg_write(REG_CHARGE, val); + pmic_reg_write(p, REG_CHARGE, val); /* power up the system first */ - pmic_reg_write(REG_POWER_MISC, PWUP); + pmic_reg_write(p, REG_POWER_MISC, PWUP); /* Set core voltage to 1.1V */ - val = pmic_reg_read(REG_SW_0); + pmic_reg_read(p, REG_SW_0, &val); val = (val & ~SWx_VOLT_MASK) | SWx_1_100V; - pmic_reg_write(REG_SW_0, val); + pmic_reg_write(p, REG_SW_0, val); /* Setup VCC (SW2) to 1.25 */ - val = pmic_reg_read(REG_SW_1); + pmic_reg_read(p, REG_SW_1, &val); val = (val & ~SWx_VOLT_MASK) | SWx_1_250V; - pmic_reg_write(REG_SW_1, val); + pmic_reg_write(p, REG_SW_1, val); /* Setup 1V2_DIG1 (SW3) to 1.25 */ - val = pmic_reg_read(REG_SW_2); + pmic_reg_read(p, REG_SW_2, &val); val = (val & ~SWx_VOLT_MASK) | SWx_1_250V; - pmic_reg_write(REG_SW_2, val); + pmic_reg_write(p, REG_SW_2, val); udelay(50); /* Raise the core frequency to 800MHz */ @@ -217,36 +222,36 @@ static void power_init(void) /* Set switchers in Auto in NORMAL mode & STANDBY mode */ /* Setup the switcher mode for SW1 & SW2*/ - val = pmic_reg_read(REG_SW_4); + pmic_reg_read(p, REG_SW_4, &val); val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) | (SWMODE_MASK << SWMODE2_SHIFT))); val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) | (SWMODE_AUTO_AUTO << SWMODE2_SHIFT); - pmic_reg_write(REG_SW_4, val); + pmic_reg_write(p, REG_SW_4, val); /* Setup the switcher mode for SW3 & SW4 */ - val = pmic_reg_read(REG_SW_5); + pmic_reg_read(p, REG_SW_5, &val); val = (val & ~((SWMODE_MASK << SWMODE3_SHIFT) | (SWMODE_MASK << SWMODE4_SHIFT))); val |= (SWMODE_AUTO_AUTO << SWMODE3_SHIFT) | (SWMODE_AUTO_AUTO << SWMODE4_SHIFT); - pmic_reg_write(REG_SW_5, val); + pmic_reg_write(p, REG_SW_5, val); /* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.6V */ - val = pmic_reg_read(REG_SETTING_0); + pmic_reg_read(p, REG_SETTING_0, &val); val &= ~(VCAM_MASK | VGEN3_MASK | VDIG_MASK); val |= VDIG_1_65 | VGEN3_1_8 | VCAM_2_6; - pmic_reg_write(REG_SETTING_0, val); + pmic_reg_write(p, REG_SETTING_0, val); /* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */ - val = pmic_reg_read(REG_SETTING_1); + pmic_reg_read(p, REG_SETTING_1, &val); val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK); val |= VSD_3_15 | VAUDIO_3_0 | VVIDEO_2_775; - pmic_reg_write(REG_SETTING_1, val); + pmic_reg_write(p, REG_SETTING_1, val); /* Configure VGEN3 and VCAM regulators to use external PNP */ val = VGEN3CONFIG | VCAMCONFIG; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); udelay(200); gpio_direction_output(46, 0); @@ -257,7 +262,7 @@ static void power_init(void) /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG | VVIDEOEN | VAUDIOEN | VSDEN; - pmic_reg_write(REG_MODE_1, val); + pmic_reg_write(p, REG_MODE_1, val); udelay(500); diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 0c108703c0a..0d4ceb3910b 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -70,11 +70,15 @@ #define CONFIG_MXC_SPI -#define CONFIG_FSL_PMIC +/* PMIC Controller */ +#define CONFIG_PMIC +#define CONFIG_PMIC_SPI +#define CONFIG_PMIC_FSL #define CONFIG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC_BITLEN 32 /* * MMC Configs -- cgit v1.3.1 From bba1b6cf15d9571e55f34a4af09c2639fd05b6dc Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sat, 8 Oct 2011 11:00:22 +0200 Subject: MX5: mx53evk: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic CC: Jason Liu Acked-by: Jason Liu --- board/freescale/mx53evk/mx53evk.c | 17 +++++++++++------ include/configs/mx53evk.h | 5 +++-- 2 files changed, 14 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c index fd821c0b1db..eab9c5f7d4d 100644 --- a/board/freescale/mx53evk/mx53evk.c +++ b/board/freescale/mx53evk/mx53evk.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -124,12 +125,16 @@ static void setup_i2c(unsigned int port_number) void power_init(void) { unsigned int val; + struct pmic *p; + + pmic_init(); + p = get_pmic(); /* Set VDDA to 1.25V */ - val = pmic_reg_read(REG_SW_2); + pmic_reg_read(p, REG_SW_2, &val); val &= ~SWX_OUT_MASK; val |= SWX_OUT_1_25; - pmic_reg_write(REG_SW_2, val); + pmic_reg_write(p, REG_SW_2, val); /* * Need increase VCC and VDDA to 1.3V @@ -137,16 +142,16 @@ void power_init(void) */ if (is_soc_rev(CHIP_REV_2_0) == 0) { /* Set VCC to 1.3V for TO2 */ - val = pmic_reg_read(REG_SW_1); + pmic_reg_read(p, REG_SW_1, &val); val &= ~SWX_OUT_MASK; val |= SWX_OUT_1_30; - pmic_reg_write(REG_SW_1, val); + pmic_reg_write(p, REG_SW_1, val); /* Set VDDA to 1.3V for TO2 */ - val = pmic_reg_read(REG_SW_2); + pmic_reg_read(p, REG_SW_2, &val); val &= ~SWX_OUT_MASK; val |= SWX_OUT_1_30; - pmic_reg_write(REG_SW_2, val); + pmic_reg_write(p, REG_SW_2, val); } } diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 20334929612..97ae2f2960a 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -59,8 +59,9 @@ #define CONFIG_SYS_I2C_SLAVE 0xfe /* PMIC Configs */ -#define CONFIG_FSL_PMIC -#define CONFIG_FSL_PMIC_I2C +#define CONFIG_PMIC +#define CONFIG_PMIC_I2C +#define CONFIG_PMIC_FSL #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 /* MMC Configs */ -- cgit v1.3.1 From 2672d5db1d89e94b78c3475d46e16fa23a9d54d8 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sat, 8 Oct 2011 11:01:52 +0200 Subject: MX31: mx31_litekit: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic --- include/configs/imx31_litekit.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 31f05134f83..89e71c069e3 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -72,13 +72,16 @@ #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_FSL_PMIC +/* PMIC Controller */ +#define CONFIG_PMIC +#define CONFIG_PMIC_SPI +#define CONFIG_PMIC_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 1000000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) - -#define CONFIG_RTC_MC13783 1 +#define CONFIG_FSL_PMIC_BITLEN 32 +#define CONFIG_RTC_MC13783 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -- cgit v1.3.1 From d7d6780fd1129a77df32c83017be73721bac528e Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sat, 8 Oct 2011 11:02:53 +0200 Subject: MX31: mx31ads: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic CC: Fabio Estevam --- include/configs/mx31ads.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 457a24a5a31..c9d80ef0733 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -69,12 +69,16 @@ #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_MXC_GPIO -#define CONFIG_FSL_PMIC +/* PMIC Controller */ +#define CONFIG_PMIC +#define CONFIG_PMIC_SPI +#define CONFIG_PMIC_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 1000000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_RTC_MC13783 1 +#define CONFIG_FSL_PMIC_BITLEN 32 +#define CONFIG_RTC_MC13783 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -- cgit v1.3.1 From 877a438a1af9a25b797676944d75786cd97cc460 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sat, 8 Oct 2011 11:04:22 +0200 Subject: MX31: mx31pdk: use new pmic driver Switch to new pmic generic driver. Signed-off-by: Stefano Babic CC: Fabio Estevam --- include/configs/mx31pdk.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 8c5730ac219..b72f30b634b 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -70,11 +70,15 @@ #define CONFIG_DEFAULT_SPI_BUS 1 #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_FSL_PMIC +/* PMIC Controller */ +#define CONFIG_PMIC +#define CONFIG_PMIC_SPI +#define CONFIG_PMIC_FSL #define CONFIG_FSL_PMIC_BUS 1 #define CONFIG_FSL_PMIC_CS 2 #define CONFIG_FSL_PMIC_CLK 1000000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) +#define CONFIG_FSL_PMIC_BITLEN 32 #define CONFIG_RTC_MC13783 /* allow to overwrite serial and ethaddr */ -- cgit v1.3.1 From 2e0c1c7d5cafb92f7bee9c8ac4b69f5bed075c67 Mon Sep 17 00:00:00 2001 From: Jason Cooper <[u-boot@lakedaemon.net]> Date: Mon, 3 Oct 2011 13:49:53 +0530 Subject: dreamplug: initial board support. Copied wholeheartedly from board/Marvell/guruplug and modified to add support for SPI NOR flash. CONFIG_MACH_DREAMPLUG defined in include/configs/dreamplug.h until Linus's kernel.org tree adds it to mach-types.h. Once it trickles down, the definition can be removed from include/configs/dreamplug.h. Signed-off-by: Jason Cooper --- MAINTAINERS | 4 + arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s | 0 board/Marvell/dreamplug/Makefile | 54 +++++++++ board/Marvell/dreamplug/dreamplug.c | 151 ++++++++++++++++++++++++ board/Marvell/dreamplug/dreamplug.h | 42 +++++++ board/Marvell/dreamplug/kwbimage.cfg | 163 ++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/dreamplug.h | 151 ++++++++++++++++++++++++ 8 files changed, 566 insertions(+) create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s create mode 100644 board/Marvell/dreamplug/Makefile create mode 100644 board/Marvell/dreamplug/dreamplug.c create mode 100644 board/Marvell/dreamplug/dreamplug.h create mode 100644 board/Marvell/dreamplug/kwbimage.cfg create mode 100644 include/configs/dreamplug.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index f5168b0fbf2..48a5baefba1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -70,6 +70,10 @@ Conn Clark ESTEEM192E MPC8xx +Jason Cooper + + dreamplug ARM926EJS (Kirkwood SoC) + Joe D'Abbraccio MPC837xERDB MPC837x diff --git a/arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s b/arch/arm/cpu/arm926ejs/kirkwood/asm-offsets.s new file mode 100644 index 00000000000..e69de29bb2d diff --git a/board/Marvell/dreamplug/Makefile b/board/Marvell/dreamplug/Makefile new file mode 100644 index 00000000000..9ee5406a323 --- /dev/null +++ b/board/Marvell/dreamplug/Makefile @@ -0,0 +1,54 @@ +# +# (C) Copyright 2011 +# Jason Cooper +# +# Based on work by: +# Marvell Semiconductor +# Written-by: Siddarth Gore +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := dreamplug.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c new file mode 100644 index 00000000000..13b401361c1 --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.c @@ -0,0 +1,151 @@ +/* + * (C) Copyright 2011 + * Jason Cooper + * + * Based on work by: + * Marvell Semiconductor + * Written-by: Siddarth Gore + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include "dreamplug.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(DREAMPLUG_OE_VAL_LOW, + DREAMPLUG_OE_VAL_HIGH, + DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_SPI_SCn, /* SPI Flash */ + MPP1_SPI_MOSI, + MPP2_SPI_SCK, + MPP3_SPI_MISO, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, /* Serial */ + MPP11_UART0_RXD, + MPP12_SD_CLK, /* SDIO Slot */ + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, /* Gigabit Ethernet */ + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GE1_8, + MPP29_GE1_9, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GE1_14, + MPP35_GE1_15, + MPP36_GPIO, /* 7 external GPIO pins (36 - 45) */ + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_TDM_SPI_SCK, + MPP41_TDM_SPI_MISO, + MPP42_TDM_SPI_MOSI, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, + MPP47_GPIO, /* Bluetooth LED */ + MPP48_GPIO, /* Wifi LED */ + MPP49_GPIO, /* Wifi AP LED */ + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + return 0; +} + +int board_init(void) +{ + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void mv_phy_88e1116_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __func__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1116_MAC_CTRL2_REG, ®); + reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1116_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); + + /* reset the phy */ + miiphy_reset(name, devadr); + + printf("88E1116 Initialized on %s\n", name); +} + +void reset_phy(void) +{ + /* configure and initialize both PHY's */ + mv_phy_88e1116_init("egiga0"); + mv_phy_88e1116_init("egiga1"); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h new file mode 100644 index 00000000000..ad5ffcf7bed --- /dev/null +++ b/board/Marvell/dreamplug/dreamplug.h @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2011 + * Jason Cooper + * + * Based on work by: + * Marvell Semiconductor + * Written-by: Siddarth Gore + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __DREAMPLUG_H +#define __DREAMPLUG_H + +#define DREAMPLUG_OE_LOW (~(0)) +#define DREAMPLUG_OE_HIGH (~(0)) +#define DREAMPLUG_OE_VAL_LOW 0 +#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ + +/* PHY related */ +#define MV88E1116_MAC_CTRL2_REG 21 +#define MV88E1116_PGADR_REG 22 +#define MV88E1116_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1116_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __DREAMPLUG_H */ diff --git a/board/Marvell/dreamplug/kwbimage.cfg b/board/Marvell/dreamplug/kwbimage.cfg new file mode 100644 index 00000000000..ca9cd744f3b --- /dev/null +++ b/board/Marvell/dreamplug/kwbimage.cfg @@ -0,0 +1,163 @@ +# +# (C) Copyright 2011 +# Jason Cooper +# +# Based on work by: +# Marvell Semiconductor +# Written-by: Siddarth Gore +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM spi + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0/1 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b9b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x37543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x000000cc # DDR Address Control +# bit1-0: 01, Cs0width=x8 +# bit3-2: 10, Cs0size=1Gb +# bit5-4: 01, Cs1width=x8 +# bit7-6: 10, Cs1size=1Gb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000E803 # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/boards.cfg b/boards.cfg index d9b434f26ce..1a1b2ba7a03 100644 --- a/boards.cfg +++ b/boards.cfg @@ -138,6 +138,7 @@ portl2 arm arm926ejs km_arm keymile inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:INETSPACE_V2 netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_V2 netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_MAX_V2 +dreamplug arm arm926ejs - Marvell kirkwood guruplug arm arm926ejs - Marvell kirkwood mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h new file mode 100644 index 00000000000..0f2f9a2743f --- /dev/null +++ b/include/configs/dreamplug.h @@ -0,0 +1,151 @@ +/* + * (C) Copyright 2011 + * Jason Cooper + * + * Based on work by: + * Marvell Semiconductor + * Written-by: Siddarth Gore + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_DREAMPLUG_H +#define _CONFIG_DREAMPLUG_H + +/* + * FIXME: This belongs in mach-types.h. However, we only pull mach-types + * from Linus' kernel.org tree. This hasn't been updated primarily due to + * the recent arch/arm reshuffling. So, in the meantime, we'll place it + * here. + */ +#include +#ifdef MACH_TYPE_DREAMPLUG +#error "MACH_TYPE_DREAMPLUG has been defined properly, please remove this." +#else +#define MACH_TYPE_DREAMPLUG 3550 +#endif + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nMarvell-DreamPlug" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_TYPE MACH_TYPE_DREAMPLUG +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_SF +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB +#define CONFIG_CMD_IDE +#define CONFIG_CMD_DATE + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * Environment variables configurations + */ +#ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x10000 /* 64k */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif + +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH 1 +#define CONFIG_HARD_SPI 1 +#define CONFIG_KIRKWOOD_SPI 1 +#define CONFIG_SPI_FLASH_MACRONIX 1 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50 MHz */ +#endif + +/* + * max 4k env size is enough, but in case of nand + * it has to be rounded to sector size + */ +#define CONFIG_ENV_SIZE 0x1000 /* 4k */ +#define CONFIG_ENV_ADDR 0x100000 +#define CONFIG_ENV_OFFSET 0x100000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \ + "${x_bootcmd_ethernet}; setenv ethact egiga1; " \ + "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\ + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ + "bootm 0x6400000;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "x_bootcmd_ethernet=ping 192.168.2.1\0" \ + "x_bootcmd_usb=usb start\0" \ + "x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \ + "x_bootargs=console=ttyS0,115200\0" \ + "x_bootargs_root=root=/dev/sda2 rootdelay=10\0" + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ +#define CONFIG_PHY_BASE_ADR 0 +#endif /* CONFIG_CMD_NET */ + +/* + * SATA Driver configuration + */ +#ifdef CONFIG_MVSATA_IDE +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#endif /*CONFIG_MVSATA_IDE*/ + +/* + * RTC driver configuration + */ +#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_MV +#endif /* CONFIG_CMD_DATE */ + +#define CONFIG_SYS_ALT_MEMTEST + +/* + * display enhanced info about the cpu at boot. + */ +#define CONFIG_DISPLAY_CPUINFO + +#endif /* _CONFIG_DREAMPLUG_H */ -- cgit v1.3.1 From daa4b2f7f5e023dffa272e86b0f271b07f9813b8 Mon Sep 17 00:00:00 2001 From: Ajay Bhargav <[ajay.bhargav@einfochips.com]> Date: Mon, 3 Oct 2011 14:00:57 +0530 Subject: Armada100: Add SPI support for Marvell gplugD This patch add SPI driver support for Marvell gplugD Signed-off-by: Ajay Bhargav --- arch/arm/include/asm/arch-armada100/armada100.h | 19 +++++++++++++++++++ arch/arm/include/asm/arch-armada100/mfp.h | 6 ++++++ board/Marvell/gplugd/gplugd.c | 12 ++++++++++++ include/configs/gplugd.h | 5 +++++ 4 files changed, 42 insertions(+) (limited to 'include') diff --git a/arch/arm/include/asm/arch-armada100/armada100.h b/arch/arm/include/asm/arch-armada100/armada100.h index c449d4e6399..a8181b68db8 100644 --- a/arch/arm/include/asm/arch-armada100/armada100.h +++ b/arch/arm/include/asm/arch-armada100/armada100.h @@ -45,6 +45,10 @@ #define FE_CLK_RST 0x1 #define FE_CLK_ENA 0x8 +/* SSP2 Clock Control */ +#define SSP2_APBCLK 0x01 +#define SSP2_FNCLK 0x02 + /* Register Base Addresses */ #define ARMD1_DRAM_BASE 0xB0000000 #define ARMD1_FEC_BASE 0xC0800000 @@ -175,5 +179,20 @@ struct armd1apb1_registers { u32 ac97; /*0x084*/ }; +/* +* APB2 Clock Reset/Control Registers +* Refer Datasheet Appendix A.11 +*/ +struct armd1apb2_registers { + u32 pad1[0x01C - 0x000]; + u32 ssp1_clkrst; /* 0x01C */ + u32 ssp2_clkrst; /* 0x020 */ + u32 pad2[0x04C - 0x020 - 4]; + u32 ssp3_clkrst; /* 0x04C */ + u32 pad3[0x058 - 0x04C - 4]; + u32 ssp4_clkrst; /* 0x058 */ + u32 ssp5_clkrst; /* 0x05C */ +}; + #endif /* CONFIG_ARMADA100 */ #endif /* _ASM_ARCH_ARMADA100_H */ diff --git a/arch/arm/include/asm/arch-armada100/mfp.h b/arch/arm/include/asm/arch-armada100/mfp.h index da76b58405e..d48251af200 100644 --- a/arch/arm/include/asm/arch-armada100/mfp.h +++ b/arch/arm/include/asm/arch-armada100/mfp.h @@ -83,6 +83,12 @@ #define MFP101_ETH_MDIO (MFP_REG(0x194) | MFP_AF5 | MFP_DRIVE_MEDIUM) #define MFP103_ETH_RXDV (MFP_REG(0x19C) | MFP_AF5 | MFP_DRIVE_MEDIUM) +/* SPI */ +#define MFP107_SSP2_RXD (MFP_REG(0x1AC) | MFP_AF4 | MFP_DRIVE_MEDIUM) +#define MFP108_SSP2_TXD (MFP_REG(0x1B0) | MFP_AF4 | MFP_DRIVE_MEDIUM) +#define MFP110_SSP2_CS (MFP_REG(0x1B8) | MFP_AF0 | MFP_DRIVE_MEDIUM) +#define MFP111_SSP2_CLK (MFP_REG(0x1BC) | MFP_AF4 | MFP_DRIVE_MEDIUM) + /* More macros can be defined here... */ #define MFP_PIN_MAX 117 diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c index b4f7f81583e..42c8389558a 100644 --- a/board/Marvell/gplugd/gplugd.c +++ b/board/Marvell/gplugd/gplugd.c @@ -72,6 +72,12 @@ int board_early_init_f(void) MFP101_ETH_MDIO, MFP103_ETH_RXDV, + /* SSP2 */ + MFP107_SSP2_RXD, + MFP108_SSP2_TXD, + MFP110_SSP2_CS, + MFP111_SSP2_CLK, + MFP_EOC /*End of configuration*/ }; /* configure MFP's */ @@ -81,6 +87,9 @@ int board_early_init_f(void) int board_init(void) { + struct armd1apb2_registers *apb2_regs = + (struct armd1apb2_registers *)ARMD1_APBC2_BASE; + /* arch number of Board */ gd->bd->bi_arch_number = MACH_TYPE_SHEEVAD; /* adress of boot parameters */ @@ -90,6 +99,9 @@ int board_init(void) udelay(10); /* Deassert PHY_RST# */ gpio_set_value(CONFIG_SYS_GPIO_PHY_RST, GPIO_HIGH); + + /* Enable SSP2 clock */ + writel(SSP2_APBCLK | SSP2_FNCLK, &apb2_regs->ssp2_clkrst); return 0; } diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index a9f3b3b3054..6fa724ae452 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -90,6 +90,11 @@ /* GPIO Configuration for PHY */ #define CONFIG_SYS_GPIO_PHY_RST 104 /* GPIO104 */ +/* SPI Support */ +#define CONFIG_ARMADA100_SPI +#define CONFIG_ENV_SPI_CS 110 +#define CONFIG_SYS_SSP_PORT 2 + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros -- cgit v1.3.1 From 2f83cd57b67504f0c254f31862dfcc9baf791a3a Mon Sep 17 00:00:00 2001 From: Ajay Bhargav <[ajay.bhargav@einfochips.com]> Date: Mon, 3 Oct 2011 14:00:58 +0530 Subject: Armada100: Add SPI flash support for Marvell gplugD This patch enables Atmel AT45 SPI flash support for Marvell gplugD Enables SF commands. Signed-off-by: Ajay Bhargav --- include/configs/gplugd.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index 6fa724ae452..35ecdb535d1 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -95,6 +95,10 @@ #define CONFIG_ENV_SPI_CS 110 #define CONFIG_SYS_SSP_PORT 2 +/* Flash Support */ +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_ATMEL + /* * mv-common.h should be defined after CMD configs since it used them * to enable certain macros -- cgit v1.3.1 From b5de038f159541404d89c358a4d77211b715f0f3 Mon Sep 17 00:00:00 2001 From: Ajay Bhargav <[ajay.bhargav@einfochips.com]> Date: Mon, 3 Oct 2011 14:00:58 +0530 Subject: Armada100: Add env storage support for Marvell gplugD This patch adds support for envrionment varaible storage in SPI flash for Marvell gplugD. Signed-off-by: Ajay Bhargav --- include/configs/gplugd.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index 35ecdb535d1..24bf7675d61 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -115,7 +115,13 @@ /* * Environment variables configurations */ -#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ -#define CONFIG_ENV_SIZE 0x20000 /* 64k */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SECT_SIZE 0x4000 +#define CONFIG_ENV_SIZE 0x4000 +#define CONFIG_ENV_OFFSET 0x07C000 + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_EDITENV +#define CONFIG_CMD_SAVEENV #endif /* __CONFIG_GPLUGD_H */ -- cgit v1.3.1 From 5ff8b35412e895287d91172c9ac3b60520d41ddb Mon Sep 17 00:00:00 2001 From: Lei Wen Date: Mon, 24 Oct 2011 16:27:32 +0000 Subject: ARM: orion5x: reduce dependence of including platform file For files like the drivers/serial/serial.c, it must include the platform file, as the CONFIG_SYS_NS16550_COM1 must reference to the definition in the platform definition files. Include the platform definition file in the config file, so that it would decouple the dependence for the driver files. Signed-off-by: Lei Wen --- arch/arm/cpu/arm926ejs/orion5x/cpu.c | 3 ++- arch/arm/cpu/arm926ejs/orion5x/dram.c | 2 +- arch/arm/cpu/arm926ejs/orion5x/timer.c | 2 +- arch/arm/include/asm/arch-orion5x/orion5x.h | 6 ------ common/cmd_ide.c | 6 ------ include/configs/edminiv2.h | 1 + 6 files changed, 5 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/arm926ejs/orion5x/cpu.c b/arch/arm/cpu/arm926ejs/orion5x/cpu.c index 05bd45c3f61..792b11dfc51 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/cpu.c +++ b/arch/arm/cpu/arm926ejs/orion5x/cpu.c @@ -28,8 +28,9 @@ #include #include #include +#include #include -#include +#include #include #define BUFLEN 16 diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index 5cc31a99f14..c0f7ef157fe 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -27,7 +27,7 @@ #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/cpu/arm926ejs/orion5x/timer.c b/arch/arm/cpu/arm926ejs/orion5x/timer.c index 17df68f86a2..e39ecc245b4 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/timer.c +++ b/arch/arm/cpu/arm926ejs/orion5x/timer.c @@ -25,7 +25,7 @@ */ #include -#include +#include #define UBOOT_CNTR 0 /* counter to use for uboot timer */ diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h index 9aeef88f36e..18225b9b496 100644 --- a/arch/arm/include/asm/arch-orion5x/orion5x.h +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h @@ -30,13 +30,7 @@ #ifndef _ASM_ARCH_ORION5X_H #define _ASM_ARCH_ORION5X_H -#ifndef __ASSEMBLY__ -#include -#include -#endif /* __ASSEMBLY__ */ - #if defined(CONFIG_FEROCEON) -#include /* SOC specific definations */ #define ORION5X_REGISTER(x) (ORION5X_REGS_PHY_BASE + x) diff --git a/common/cmd_ide.c b/common/cmd_ide.c index da5189c37e0..d909c549903 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -46,12 +46,6 @@ #include #endif -#ifdef CONFIG_ORION5X -#include -#elif defined CONFIG_KIRKWOOD -#include -#endif - #include #include diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index f8affa80e6b..88d32b27d6a 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -45,6 +45,7 @@ #define CONFIG_88F5182 1 /* SOC Name */ #define CONFIG_MACH_EDMINIV2 1 /* Machine type */ +#include /* * CLKs configurations */ -- cgit v1.3.1 From 8e70691acc1b59219f9cba0667db1c9f81e399fb Mon Sep 17 00:00:00 2001 From: SRICHARAN R Date: Tue, 27 Sep 2011 01:43:18 +0000 Subject: U-Boot/SPL: omap4: Make ddr pre-calculated timings as default. All ddr configurations(geometry/timings) are done automatically by detecting the device connected at run time. Though this is a useful feature, making this as a default setting increases the code size by about 2K bytes. This is quite big, especially in the case of SPL which runs from a smaller SRAM. So do not use this feature as the default setting, instead use the precalculated tables. Signed-off-by: sricharan Signed-off-by: Sandeep Paulraj --- include/configs/omap4_common.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index 228eac5e37f..e7749ace5a5 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -238,6 +238,8 @@ #endif /* Defines for SDRAM init */ +#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS + #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -- cgit v1.3.1 From 3c6e50d7581e12b14da34b4ae646024a11cb580b Mon Sep 17 00:00:00 2001 From: Steve Sakoman Date: Fri, 30 Sep 2011 09:29:11 +0000 Subject: omap: beagle: Use ubifs instead of jffs2 for nand boot Signed-off-by: Steve Sakoman Acked-by: Koen Kooi Signed-off-by: Sandeep Paulraj --- include/configs/omap3_beagle.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index a0264786a19..ebb572e3f05 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -226,8 +226,8 @@ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ "mmcrootfstype=ext3 rootwait\0" \ - "nandroot=/dev/mtdblock4 rw\0" \ - "nandrootfstype=jffs2\0" \ + "nandroot=ubi0:rootfs ubi.mtd=4\0" \ + "nandrootfstype=ubifs\0" \ "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \ "ramrootfstype=ext2\0" \ "mmcargs=setenv bootargs console=${console} " \ -- cgit v1.3.1 From 2d01dd953a269e5fc27e04cb8571e0d8d81c7c4a Mon Sep 17 00:00:00 2001 From: Aneesh V Date: Fri, 21 Oct 2011 12:29:34 -0400 Subject: omap: spl: fix build break due to changes in FAT FAT library now uses malloc() and free(). But SPL doesn't have heap until now. Setup a heap in SDRAM to fix this issue. However this increases SPL footprint beyond the available SRAM budget. So, compile out some fancy features in the SDARM init bring back footprint under control CC: Sandeep Paulraj CC: Wolfgang Denk Signed-off-by: Aneesh V Signed-off-by: Sandeep Paulraj --- arch/arm/cpu/armv7/omap-common/spl.c | 4 ++++ common/Makefile | 1 + include/configs/omap4_common.h | 18 ++++++++++-------- 3 files changed, 15 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c index d0866c03d01..d37ca0ff5a7 100644 --- a/arch/arm/cpu/armv7/omap-common/spl.c +++ b/arch/arm/cpu/armv7/omap-common/spl.c @@ -34,6 +34,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -105,6 +106,9 @@ void board_init_r(gd_t *id, ulong dummy) u32 boot_device; debug(">>spl:board_init_r()\n"); + mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, + CONFIG_SYS_SPL_MALLOC_SIZE); + timer_init(); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); diff --git a/common/Makefile b/common/Makefile index ae795e0d55b..1b672ad96e8 100644 --- a/common/Makefile +++ b/common/Makefile @@ -187,6 +187,7 @@ COBJS-$(CONFIG_USB_KEYBOARD) += usb_kbd.o endif COBJS-y += console.o +COBJS-y += dlmalloc.o COBJS-y += memsize.o COBJS-y += stdio.o diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index e7749ace5a5..f5357695596 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -253,6 +253,16 @@ #define CONFIG_SPL_BSS_START_ADDR 0x80000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ +/* + * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM + * 64 bytes before this address should be set aside for u-boot.img's + * header. That is 0x800FFFC0--0x80100000 should not be used for any + * other needs. + */ +#define CONFIG_SYS_TEXT_BASE 0x80100000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ + #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ @@ -268,12 +278,4 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds" -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. - */ -#define CONFIG_SYS_TEXT_BASE 0x80100000 - #endif /* __CONFIG_OMAP4_COMMON_H */ -- cgit v1.3.1 From ba75a81a7ab8a9be21cfcf4a78306d831465913f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 18 Oct 2011 10:47:22 -0700 Subject: devkit8000: Add malloc space With malloc support being a new requirement for all ARM SPL implementations, define a small area for use on devkit8000. Cc: Frederik Kriewitz Signed-off-by: Tom Rini Signed-off-by: Sandeep Paulraj --- include/configs/devkit8000.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index eed1b0653df..6c51a274750 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -358,4 +358,7 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80108000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 32317a5b7c8792f7186f84c5dbb48937a7168009 Mon Sep 17 00:00:00 2001 From: Manjunath Hadli Date: Fri, 7 Oct 2011 23:33:32 +0000 Subject: dm644X: revert cache disable patch revert commit 913a39e9aa4d935948d41cd727d53f5878414a77 as the disabling of cache need not be done explicitly. Subsequent patches to new cache management framework has fixed it. EMAC issue with cache coherency still exists when cahces are enabled. Signed-off-by: Manjunath Hadli Signed-off-by: Sandeep Paulraj --- include/configs/davinci_dvevm.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 88c6beeb9da..2507d79e4ca 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -60,9 +60,6 @@ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SOC_DM644X -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_L2CACHE_OFF /*====================================================*/ /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ -- cgit v1.3.1 From 83244a3885310249aac377bdc592cb46e9cf4329 Mon Sep 17 00:00:00 2001 From: Manjunath Hadli Date: Fri, 7 Oct 2011 23:34:37 +0000 Subject: dm36x: revert cache disable patch revert commit 98c19aff9524e1d0dd6bf39bf7bde5644f121feb as the disabling of cache need not be done explicitly. Subsequent patches to new cache management framework has fixed it. EMAC issue with cache coherency still exists when cahces are enabled. Signed-off-by: Manjunath Hadli Signed-off-by: Sandeep Paulraj --- include/configs/davinci_dm365evm.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index 323c0b4dfed..5fa2e56c315 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SOC_DM365 -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_L2CACHE_OFF /* Memory Info */ #define CONFIG_NR_DRAM_BANKS 1 -- cgit v1.3.1 From 28375eb6f6a34b0a4584a3c46c1879f8852f69a9 Mon Sep 17 00:00:00 2001 From: Manjunath Hadli Date: Fri, 7 Oct 2011 23:38:39 +0000 Subject: da830: add support for NAND boot mode Add support for enabling NAND boot mode in configuration file and add correspanding pinmux support, nand initialize function in board file. The size required for environment variables not more than 10KB the CONFIG_ENV_SIZE is set to 10KB from (512 << 10). Acked-by: Nick Thompson Signed-off-by: Sudhakar Rajashekhara Signed-off-by: Manjunath Hadli Signed-off-by: Sandeep Paulraj --- board/davinci/da8xxevm/da830evm.c | 63 +++++++++++++++++++++++++++++++++++++++ include/configs/da830evm.h | 4 ++- 2 files changed, 66 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/board/davinci/da8xxevm/da830evm.c b/board/davinci/da8xxevm/da830evm.c index 06506537b29..2021e732429 100644 --- a/board/davinci/da8xxevm/da830evm.c +++ b/board/davinci/da8xxevm/da830evm.c @@ -40,6 +40,8 @@ #include #include #include +#include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -98,6 +100,56 @@ static const struct pinmux_config i2c_pins[] = { { pinmux(8), 2, 4 } }; +#ifdef CONFIG_USE_NAND +/* NAND pin muxer settings */ +const struct pinmux_config aemif_pins[] = { + { pinmux(13), 1, 6 }, + { pinmux(13), 1, 7 }, + { pinmux(14), 1, 0 }, + { pinmux(14), 1, 1 }, + { pinmux(14), 1, 2 }, + { pinmux(14), 1, 3 }, + { pinmux(14), 1, 4 }, + { pinmux(14), 1, 5 }, + { pinmux(14), 1, 6 }, + { pinmux(14), 1, 7 }, + { pinmux(15), 1, 0 }, + { pinmux(15), 1, 1 }, + { pinmux(15), 1, 2 }, + { pinmux(15), 1, 3 }, + { pinmux(15), 1, 4 }, + { pinmux(15), 1, 5 }, + { pinmux(15), 1, 6 }, + { pinmux(15), 1, 7 }, + { pinmux(16), 1, 0 }, + { pinmux(16), 1, 1 }, + { pinmux(16), 1, 2 }, + { pinmux(16), 1, 3 }, + { pinmux(16), 1, 4 }, + { pinmux(16), 1, 5 }, + { pinmux(16), 1, 6 }, + { pinmux(16), 1, 7 }, + { pinmux(17), 1, 0 }, + { pinmux(17), 1, 1 }, + { pinmux(17), 1, 2 }, + { pinmux(17), 1, 3 }, + { pinmux(17), 1, 4 }, + { pinmux(17), 1, 5 }, + { pinmux(17), 1, 6 }, + { pinmux(17), 1, 7 }, + { pinmux(18), 1, 0 }, + { pinmux(18), 1, 1 }, + { pinmux(18), 1, 2 }, + { pinmux(18), 1, 3 }, + { pinmux(18), 1, 4 }, + { pinmux(18), 1, 5 }, + { pinmux(18), 1, 6 }, + { pinmux(18), 1, 7 }, + { pinmux(10), 1, 0 } +}; +#endif + + /* USB0_DRVVBUS pin muxer settings */ static const struct pinmux_config usb_pins[] = { { pinmux(9), 1, 1 } @@ -114,6 +166,7 @@ static const struct pinmux_resource pinmuxes[] = { #endif #ifdef CONFIG_USE_NAND PINMUX_ITEM(emifa_nand_pins), + PINMUX_ITEM(aemif_pins), #endif #if defined(CONFIG_DRIVER_TI_EMAC) PINMUX_ITEM(emac_pins), @@ -184,6 +237,16 @@ int board_init(void) return(0); } + +#ifdef CONFIG_NAND_DAVINCI +int board_nand_init(struct nand_chip *nand) +{ + davinci_nand_init(nand); + + return 0; +} +#endif + #if defined(CONFIG_DRIVER_TI_EMAC) #define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */ diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index c522af97b68..cca75cefe3c 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -105,8 +105,10 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ #define CONFIG_ENV_OFFSET (512 << 10) -#define CONFIG_ENV_SIZE (512 << 10) +#define CONFIG_ENV_SIZE (10 << 10) /* 10KB */ +#define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST +#define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_PAGE_2K -- cgit v1.3.1 From 75b988a2e6fc4750ca734a777f4f1996ff835473 Mon Sep 17 00:00:00 2001 From: Philip Balister Date: Tue, 11 Oct 2011 11:23:21 +0000 Subject: OMAP3: overo : Use ttyO2 instead of ttyS2. Starting with kernel 2.6.37, the serial ports on the OMAP3 are called ttyOX, not ttySX. Signed-off-by: Philip Balister Tested-by: Steve Sakoman Signed-off-by: Sandeep Paulraj --- include/configs/omap3_overo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 2f3743cccee..65732354393 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -155,7 +155,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ - "console=ttyS2,115200n8\0" \ + "console=ttyO2,115200n8\0" \ "mpurate=500\0" \ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ -- cgit v1.3.1 From e6847dba197399e77bced3e690b488afa483444d Mon Sep 17 00:00:00 2001 From: Philip Balister Date: Tue, 11 Oct 2011 11:23:23 +0000 Subject: OMAP3: overo : Add environment variable optargs to bootargs This allows the user can easily add extra kernel arguments. Very helpful for reserving memory for the DSP without rewriting the entire kernel argument line. Signed-off-by: Philip Balister Tested-by: Steve Sakoman Signed-off-by: Sandeep Paulraj --- include/configs/omap3_overo.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 65732354393..afdefd95572 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -157,6 +157,7 @@ "loadaddr=0x82000000\0" \ "console=ttyO2,115200n8\0" \ "mpurate=500\0" \ + "optargs=\0" \ "vram=12M\0" \ "dvimode=1024x768MR-16@60\0" \ "defaultdisplay=dvi\0" \ @@ -166,6 +167,7 @@ "nandroot=/dev/mtdblock4 rw\0" \ "nandrootfstype=jffs2\0" \ "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ "mpurate=${mpurate} " \ "vram=${vram} " \ "omapfb.mode=dvi:${dvimode} " \ @@ -173,6 +175,7 @@ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ "mpurate=${mpurate} " \ "vram=${vram} " \ "omapfb.mode=dvi:${dvimode} " \ -- cgit v1.3.1 From 3b413c5bfa2595483baaefb006cbad1ee4b489fc Mon Sep 17 00:00:00 2001 From: Joe Hershberger Date: Wed, 12 Oct 2011 10:31:45 +0000 Subject: omap4_panda: Build in cmd_gpio support on panda Enable the gpio command Signed-off-by: Joe Hershberger Cc: Joe Hershberger Cc: Sandeep Paulraj Signed-off-by: Sandeep Paulraj --- include/configs/omap4_panda.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 67da70ea055..e9ef2a3782b 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -35,6 +35,9 @@ #include +/* GPIO */ +#define CONFIG_CMD_GPIO + /* ENV related config options */ #define CONFIG_ENV_IS_NOWHERE -- cgit v1.3.1 From ae5c77dd908edaf55025fa3f41095bfb9cb1b973 Mon Sep 17 00:00:00 2001 From: Christian Riesch Date: Thu, 13 Oct 2011 00:52:29 +0000 Subject: da850evm: Move LPSC configuration to board_early_init_f() Since commit f1d2b313c9eb6808d30c16a9eb5251240452a56c the serial port of the da850evm is accessed before the UART2 peripheral of the SoC is powered on in the function board_init() in board/davinci/da8xxevm/da850evm.c. When u-boot is used in conjunction with the UBL (user boot loader, see doc/README.davinci) on this board, the UART2 peripheral is already turned on by UBL at the time u-boot is started. Hence, the wrong initialization sequence is not noticed by most users. However, if UBL is not used, u-boot must power on the peripheral before using it. This patch adds a board_early_init_f() function for the LPSC configuration to the da850evm board configuration. Signed-off-by: Christian Riesch Cc: Sudhakar Rajashekhara Cc: Sandeep Paulraj Cc: Heiko Schocher Cc: Ben Gardiner Signed-off-by: Sandeep Paulraj --- board/davinci/da8xxevm/da850evm.c | 23 ++++++++++++++--------- include/configs/da850evm.h | 1 + 2 files changed, 15 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 46924d349b8..e0a3bbefcf0 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -278,6 +278,20 @@ u32 get_board_rev(void) return rev; } +int board_early_init_f(void) +{ + /* + * Power on required peripherals + * ARM does not have access by default to PSC0 and PSC1 + * assuming here that the DSP bootloader has set the IOPU + * such that PSC access is available to ARM + */ + if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) + return 1; + + return 0; +} + int board_init(void) { #ifdef CONFIG_USE_NOR @@ -310,15 +324,6 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; - /* - * Power on required peripherals - * ARM does not have access by default to PSC0 and PSC1 - * assuming here that the DSP bootloader has set the IOPU - * such that PSC access is available to ARM - */ - if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc))) - return 1; - /* setup the SUSPSRC for ARM to control emulation suspend */ writel(readl(&davinci_syscfg_regs->suspsrc) & ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C | diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index cad56209add..b4e489022b2 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -160,6 +160,7 @@ * U-Boot general configuration */ #define CONFIG_MISC_INIT_R +#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -- cgit v1.3.1 From fb1d6332b5430b90a8fa8ebab709f33a60e9f816 Mon Sep 17 00:00:00 2001 From: Manjunath Hadli Date: Thu, 13 Oct 2011 03:40:55 +0000 Subject: davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM as they are no longer needed with the support for more than 1 PHYs in davinci emac driver. Signed-off-by: Manjunath Hadli Signed-off-by: Sandeep Paulraj --- arch/arm/cpu/arm926ejs/davinci/et1011c.c | 6 ++---- arch/arm/include/asm/arch-davinci/emac_defs.h | 4 ---- drivers/net/davinci_emac.c | 14 +++++++------- include/configs/da830evm.h | 1 - include/configs/da850evm.h | 1 - include/configs/davinci_dm365evm.h | 1 - include/configs/davinci_dm6467evm.h | 1 - include/configs/davinci_dvevm.h | 1 - include/configs/davinci_schmoogie.h | 1 - include/configs/davinci_sffsdr.h | 1 - include/configs/davinci_sonata.h | 1 - include/configs/ea20.h | 1 - include/configs/hawkboard.h | 1 - 13 files changed, 9 insertions(+), 25 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/arm926ejs/davinci/et1011c.c b/arch/arm/cpu/arm926ejs/davinci/et1011c.c index da073457a30..df35e44d138 100644 --- a/arch/arm/cpu/arm926ejs/davinci/et1011c.c +++ b/arch/arm/cpu/arm926ejs/davinci/et1011c.c @@ -39,11 +39,9 @@ int et1011c_get_link_speed(int phy_addr) u_int16_t data; if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) { - davinci_eth_phy_read(EMAC_MDIO_PHY_NUM, - MII_PHY_CONFIG_REG, &data); + davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data); /* Enable 125MHz clock sourced from PHY */ - davinci_eth_phy_write(EMAC_MDIO_PHY_NUM, - MII_PHY_CONFIG_REG, + davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG, data | PHY_SYS_CLK_EN); return (1); } diff --git a/arch/arm/include/asm/arch-davinci/emac_defs.h b/arch/arm/include/asm/arch-davinci/emac_defs.h index 294a9a88ed1..ea52888ff45 100644 --- a/arch/arm/include/asm/arch-davinci/emac_defs.h +++ b/arch/arm/include/asm/arch-davinci/emac_defs.h @@ -84,10 +84,6 @@ #define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */ #endif -/* PHY mask - set only those phy number bits where phy is/can be connected */ -#define EMAC_MDIO_PHY_NUM CONFIG_EMAC_MDIO_PHY_NUM -#define EMAC_MDIO_PHY_MASK (1 << EMAC_MDIO_PHY_NUM) - /* Ethernet Min/Max packet size */ #define EMAC_MIN_ETHERNET_PKT_SIZE 60 #define EMAC_MAX_ETHERNET_PKT_SIZE 1518 diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 4ffd08657e7..7dacb2368d6 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -48,9 +48,9 @@ unsigned int emac_dbg = 0; #define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args) #ifdef DAVINCI_EMAC_GIG_ENABLE -#define emac_gigabit_enable() davinci_eth_gigabit_enable() +#define emac_gigabit_enable(phy_addr) davinci_eth_gigabit_enable(phy_addr) #else -#define emac_gigabit_enable() /* no gigabit to enable */ +#define emac_gigabit_enable(phy_addr) /* no gigabit to enable */ #endif static void davinci_eth_mdio_enable(void); @@ -357,11 +357,11 @@ static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsign } #endif -static void __attribute__((unused)) davinci_eth_gigabit_enable(void) +static void __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr) { u_int16_t data; - if (davinci_eth_phy_read(EMAC_MDIO_PHY_NUM, 0, &data)) { + if (davinci_eth_phy_read(phy_addr, 0, &data)) { if (data & (1 << 6)) { /* speed selection MSB */ /* * Check if link detected is giga-bit @@ -484,7 +484,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) if (index == -1) return(0); - emac_gigabit_enable(); + emac_gigabit_enable(active_phy_addr[index]); /* Start receive process */ writel((u_int32_t)emac_rx_desc, &adap_emac->RX0HDP); @@ -589,7 +589,7 @@ static int davinci_eth_send_packet (struct eth_device *dev, return (ret_status); } - emac_gigabit_enable(); + emac_gigabit_enable(active_phy_addr[index]); /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */ if (length < EMAC_MIN_ETHERNET_PKT_SIZE) { @@ -614,7 +614,7 @@ static int davinci_eth_send_packet (struct eth_device *dev, return (ret_status); } - emac_gigabit_enable(); + emac_gigabit_enable(active_phy_addr[index]); if (readl(&adap_emac->TXINTSTATRAW) & 0x01) { ret_status = length; diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index cca75cefe3c..6ac25d2b9c1 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -87,7 +87,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index b4e489022b2..4c143700ddc 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -121,7 +121,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index 5fa2e56c315..cb6ed24a800 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -57,7 +57,6 @@ /* Network Configuration */ #define CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index d97c0f36c4a..ec1c31c0852 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -84,7 +84,6 @@ extern unsigned int davinci_arm_clk_get(void); /* Network & Ethernet Configuration */ #define CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 2507d79e4ca..c0525173e68 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -102,7 +102,6 @@ /* Network & Ethernet Configuration */ /*==================================*/ #define CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index b6f61ee4bfd..5eaa1988467 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -68,7 +68,6 @@ /* Network & Ethernet Configuration */ /*==================================*/ #define CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index ce2721275b7..0c653915bdf 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -65,7 +65,6 @@ #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ /* Network & Ethernet Configuration */ #define CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 163f1a2103e..74530e8306c 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -101,7 +101,6 @@ /* Network & Ethernet Configuration */ /*==================================*/ #define CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/ea20.h b/include/configs/ea20.h index a2e317825f8..201e6b570b6 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -86,7 +86,6 @@ * Network & Ethernet Configuration */ #ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 0 #define CONFIG_MII #define CONFIG_BOOTP_DEFAULT #define CONFIG_BOOTP_DNS diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 5f88d96679b..638643a2b23 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -83,7 +83,6 @@ /* * Network & Ethernet Configuration */ -#define CONFIG_EMAC_MDIO_PHY_NUM 0x7 #if !defined(CONFIG_NAND_SPL) #define CONFIG_DRIVER_TI_EMAC #endif -- cgit v1.3.1 From 5289e83a8ca8c4a6613d2d019bad330816dbc2d4 Mon Sep 17 00:00:00 2001 From: Chandan Nath Date: Fri, 14 Oct 2011 02:58:26 +0000 Subject: ARM:AM33XX: Add support for TI AM335X EVM This patch adds basic support for booting the board. This patch adds support for the UART necessary to get to the u-boot prompt. Signed-off-by: Chandan Nath Signed-off-by: Sandeep Paulraj --- MAINTAINERS | 4 + arch/arm/cpu/armv7/am33xx/Makefile | 2 +- arch/arm/cpu/armv7/am33xx/board.c | 66 +++++++++ board/ti/am335x/Makefile | 43 ++++++ board/ti/am335x/common_def.h | 24 ++++ board/ti/am335x/evm.c | 48 +++++++ board/ti/am335x/mux.c | 278 +++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + drivers/serial/ns16550.c | 7 +- include/configs/am335x_evm.h | 122 ++++++++++++++++ 10 files changed, 592 insertions(+), 3 deletions(-) create mode 100644 arch/arm/cpu/armv7/am33xx/board.c create mode 100644 board/ti/am335x/Makefile create mode 100644 board/ti/am335x/common_def.h create mode 100644 board/ti/am335x/evm.c create mode 100644 board/ti/am335x/mux.c create mode 100644 include/configs/am335x_evm.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index 48a5baefba1..f2fdb6ed750 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -738,6 +738,10 @@ Nagendra T S am3517_crane ARM ARMV7 (AM35x SoC) +Chandan Nath + + am335x_evm ARM ARMV7 (AM33xx Soc) + Kyungmin Park apollon ARM1136EJS diff --git a/arch/arm/cpu/armv7/am33xx/Makefile b/arch/arm/cpu/armv7/am33xx/Makefile index 7ed667877bf..6beafbbece0 100644 --- a/arch/arm/cpu/armv7/am33xx/Makefile +++ b/arch/arm/cpu/armv7/am33xx/Makefile @@ -22,7 +22,7 @@ COBJS += clock.o COBJS += sys_info.o COBJS += ddr.o COBJS += emif4.o - +COBJS += board.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(COBJS-y) $(SOBJS)) diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c new file mode 100644 index 00000000000..2d6d359e5fe --- /dev/null +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -0,0 +1,66 @@ +/* + * board.c + * + * Common board functions for AM33XX based boards + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; +struct timer_reg *timerreg = (struct timer_reg *)DM_TIMER2_BASE; + +/* + * early system init of muxing and clocks. + */ +void s_init(u32 in_ddr) +{ + /* WDT1 is already running when the bootloader gets control + * Disable it to avoid "random" resets + */ + writel(0xAAAA, &wdtimer->wdtwspr); + while (readl(&wdtimer->wdtwwps) != 0x0) + ; + writel(0x5555, &wdtimer->wdtwspr); + while (readl(&wdtimer->wdtwwps) != 0x0) + ; + + /* Setup the PLLs and the clocks for the peripherals */ +#ifdef CONFIG_SETUP_PLL + pll_init(); +#endif + if (!in_ddr) + config_ddr(); +} + +/* Initialize timer */ +void init_timer(void) +{ + /* Reset the Timer */ + writel(0x2, (&timerreg->tsicrreg)); + + /* Wait until the reset is done */ + while (readl(&timerreg->tiocpcfgreg) & 1) + ; + + /* Start the Timer */ + writel(0x1, (&timerreg->tclrreg)); +} diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile new file mode 100644 index 00000000000..d58b1859f48 --- /dev/null +++ b/board/ti/am335x/Makefile @@ -0,0 +1,43 @@ +# +# Makefile +# +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed "as is" WITHOUT ANY WARRANTY of any +# kind, whether express or implied; without even the implied warranty +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := evm.o mux.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/ti/am335x/common_def.h b/board/ti/am335x/common_def.h new file mode 100644 index 00000000000..1696d6093db --- /dev/null +++ b/board/ti/am335x/common_def.h @@ -0,0 +1,24 @@ +/* + * common_def.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __COMMON_DEF_H__ +#define __COMMON_DEF_H__ + +extern void enable_uart0_pin_mux(void); +extern void configure_evm_pin_mux(unsigned char daughter_board_id, + unsigned short daughter_board_profile, + unsigned char daughter_board_flag); + +#endif/*__COMMON_DEF_H__ */ diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c new file mode 100644 index 00000000000..b4eddd80924 --- /dev/null +++ b/board/ti/am335x/evm.c @@ -0,0 +1,48 @@ +/* + * evm.c + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include "common_def.h" +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_RESET (0x1 << 1) +#define UART_CLK_RUNNING_MASK 0x1 +#define UART_SMART_IDLE_EN (0x1 << 0x3) + +/* + * Basic board specific setup + */ +int init_basic_setup(void) +{ + /* Initialize the Timer */ + init_timer(); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; + + return 0; +} + +int board_init(void) +{ + enable_uart0_pin_mux(); + init_basic_setup(); + + return 0; +} diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c new file mode 100644 index 00000000000..8f2740944b1 --- /dev/null +++ b/board/ti/am335x/mux.c @@ -0,0 +1,278 @@ +/* + * mux.c + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include "common_def.h" +#include +#include + +#define MUX_CFG(value, offset) \ + __raw_writel(value, (CTRL_BASE + offset)); + +/* PAD Control Fields */ +#define SLEWCTRL (0x1 << 6) +#define RXACTIVE (0x1 << 5) +#define PULLUP_EN (0x1 << 4) /* Pull UP Selection */ +#define PULLUDEN (0x0 << 3) /* Pull up enabled */ +#define PULLUDDIS (0x1 << 3) /* Pull up disabled */ +#define MODE(val) val /* used for Readability */ + +/* + * PAD CONTROL OFFSETS + * Field names corresponds to the pad signal name + */ +struct pad_signals { + int gpmc_ad0; + int gpmc_ad1; + int gpmc_ad2; + int gpmc_ad3; + int gpmc_ad4; + int gpmc_ad5; + int gpmc_ad6; + int gpmc_ad7; + int gpmc_ad8; + int gpmc_ad9; + int gpmc_ad10; + int gpmc_ad11; + int gpmc_ad12; + int gpmc_ad13; + int gpmc_ad14; + int gpmc_ad15; + int gpmc_a0; + int gpmc_a1; + int gpmc_a2; + int gpmc_a3; + int gpmc_a4; + int gpmc_a5; + int gpmc_a6; + int gpmc_a7; + int gpmc_a8; + int gpmc_a9; + int gpmc_a10; + int gpmc_a11; + int gpmc_wait0; + int gpmc_wpn; + int gpmc_be1n; + int gpmc_csn0; + int gpmc_csn1; + int gpmc_csn2; + int gpmc_csn3; + int gpmc_clk; + int gpmc_advn_ale; + int gpmc_oen_ren; + int gpmc_wen; + int gpmc_be0n_cle; + int lcd_data0; + int lcd_data1; + int lcd_data2; + int lcd_data3; + int lcd_data4; + int lcd_data5; + int lcd_data6; + int lcd_data7; + int lcd_data8; + int lcd_data9; + int lcd_data10; + int lcd_data11; + int lcd_data12; + int lcd_data13; + int lcd_data14; + int lcd_data15; + int lcd_vsync; + int lcd_hsync; + int lcd_pclk; + int lcd_ac_bias_en; + int mmc0_dat3; + int mmc0_dat2; + int mmc0_dat1; + int mmc0_dat0; + int mmc0_clk; + int mmc0_cmd; + int mii1_col; + int mii1_crs; + int mii1_rxerr; + int mii1_txen; + int mii1_rxdv; + int mii1_txd3; + int mii1_txd2; + int mii1_txd1; + int mii1_txd0; + int mii1_txclk; + int mii1_rxclk; + int mii1_rxd3; + int mii1_rxd2; + int mii1_rxd1; + int mii1_rxd0; + int rmii1_refclk; + int mdio_data; + int mdio_clk; + int spi0_sclk; + int spi0_d0; + int spi0_d1; + int spi0_cs0; + int spi0_cs1; + int ecap0_in_pwm0_out; + int uart0_ctsn; + int uart0_rtsn; + int uart0_rxd; + int uart0_txd; + int uart1_ctsn; + int uart1_rtsn; + int uart1_rxd; + int uart1_txd; + int i2c0_sda; + int i2c0_scl; + int mcasp0_aclkx; + int mcasp0_fsx; + int mcasp0_axr0; + int mcasp0_ahclkr; + int mcasp0_aclkr; + int mcasp0_fsr; + int mcasp0_axr1; + int mcasp0_ahclkx; + int xdma_event_intr0; + int xdma_event_intr1; + int nresetin_out; + int porz; + int nnmi; + int osc0_in; + int osc0_out; + int rsvd1; + int tms; + int tdi; + int tdo; + int tck; + int ntrst; + int emu0; + int emu1; + int osc1_in; + int osc1_out; + int pmic_power_en; + int rtc_porz; + int rsvd2; + int ext_wakeup; + int enz_kaldo_1p8v; + int usb0_dm; + int usb0_dp; + int usb0_ce; + int usb0_id; + int usb0_vbus; + int usb0_drvvbus; + int usb1_dm; + int usb1_dp; + int usb1_ce; + int usb1_id; + int usb1_vbus; + int usb1_drvvbus; + int ddr_resetn; + int ddr_csn0; + int ddr_cke; + int ddr_ck; + int ddr_nck; + int ddr_casn; + int ddr_rasn; + int ddr_wen; + int ddr_ba0; + int ddr_ba1; + int ddr_ba2; + int ddr_a0; + int ddr_a1; + int ddr_a2; + int ddr_a3; + int ddr_a4; + int ddr_a5; + int ddr_a6; + int ddr_a7; + int ddr_a8; + int ddr_a9; + int ddr_a10; + int ddr_a11; + int ddr_a12; + int ddr_a13; + int ddr_a14; + int ddr_a15; + int ddr_odt; + int ddr_d0; + int ddr_d1; + int ddr_d2; + int ddr_d3; + int ddr_d4; + int ddr_d5; + int ddr_d6; + int ddr_d7; + int ddr_d8; + int ddr_d9; + int ddr_d10; + int ddr_d11; + int ddr_d12; + int ddr_d13; + int ddr_d14; + int ddr_d15; + int ddr_dqm0; + int ddr_dqm1; + int ddr_dqs0; + int ddr_dqsn0; + int ddr_dqs1; + int ddr_dqsn1; + int ddr_vref; + int ddr_vtp; + int ddr_strben0; + int ddr_strben1; + int ain7; + int ain6; + int ain5; + int ain4; + int ain3; + int ain2; + int ain1; + int ain0; + int vrefp; + int vrefn; +}; + +struct module_pin_mux { + short reg_offset; + unsigned char val; +}; + +/* Pad control register offset */ +#define PAD_CTRL_BASE 0x800 +#define OFFSET(x) (unsigned int) (&((struct pad_signals *) \ + (PAD_CTRL_BASE))->x) + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +/* + * Configure the pin mux for the module + */ +static void configure_module_pin_mux(struct module_pin_mux *mod_pin_mux) +{ + int i; + + if (!mod_pin_mux) + return; + + for (i = 0; mod_pin_mux[i].reg_offset != -1; i++) + MUX_CFG(mod_pin_mux[i].val, mod_pin_mux[i].reg_offset); +} + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} diff --git a/boards.cfg b/boards.cfg index 1a1b2ba7a03..41621726a7c 100644 --- a/boards.cfg +++ b/boards.cfg @@ -161,6 +161,7 @@ dkb arm arm926ejs - Marvell pantheon integratorap_cm946es arm arm946es integrator armltd - integratorap integratorcp_cm946es arm arm946es integrator armltd - integratorcp ca9x4_ct_vxp arm armv7 vexpress armltd +am335x_evm arm armv7 am335x ti am33xx efikamx arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg efikasb arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/efikamx/imximage_sb.cfg mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 056c25d58f2..0c239553188 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -37,7 +37,8 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) { serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); -#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2) +#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \ + defined(CONFIG_AM33XX) serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ #endif serial_out(UART_LCR_BKSE | UART_LCRVAL, (ulong)&com_port->lcr); @@ -50,7 +51,9 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) serial_out(baud_divisor & 0xff, &com_port->dll); serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); serial_out(UART_LCRVAL, &com_port->lcr); -#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2) +#if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \ + defined(CONFIG_AM33XX) + #if defined(CONFIG_APTIX) /* /13 mode so Aptix 6MHz can hit 115200 */ serial_out(3, &com_port->mdr1); diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h new file mode 100644 index 00000000000..b471c9bbc68 --- /dev/null +++ b/include/configs/am335x_evm.h @@ -0,0 +1,122 @@ +/* + * am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __CONFIG_AM335X_EVM_H +#define __CONFIG_AM335X_EVM_H + +#define CONFIG_AM335X +#define CONFIG_CMD_MEMORY /* for mtest */ +#undef CONFIG_GZIP +#undef CONFIG_ZLIB +#undef CONFIG_SYS_HUSH_PARSER +#undef CONFIG_CMD_NET + +#include +#include + +#define CONFIG_SETUP_PLL +#define CONFIG_AM335X_CONFIG_DDR +#define CONFIG_ENV_SIZE 0x400 +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 * 1024)) +#define CONFIG_SYS_PROMPT "AM335X# " +#define CONFIG_SYS_NO_FLASH +#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM + +#define CONFIG_CMD_ASKENV +#define CONFIG_VERSION_VARIABLE + +/* set to negative value for no autoboot */ +#define CONFIG_BOOTDELAY 3 +#define CONFIG_SYS_AUTOLOAD "no" +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "verify=yes\0" \ + "ramdisk_file=ramdisk.gz\0" \ + +/* Clock Defines */ +#define V_OSCK 24000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK >> 1) + +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for + initial data */ +#define CONFIG_CMD_ECHO + +/* max number of command args */ +#define CONFIG_SYS_MAXARGS 32 + +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 512 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* + * memtest works on 8 MB in DRAM after skipping 32MB from + * start addr of ram disk + */ +#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ + + (8 * 1024 * 1024)) + +#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ +#define CONFIG_SYS_HZ 1000 /* 1ms clock */ + + /* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ +#define PHYS_DRAM_1_SIZE 0x10000000 /*(0x80000000 / 8) 256 MB */ +#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ + +#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ + GENERATED_GBL_DATA_SIZE) + /* Platform/Board specific defs */ +#define CONFIG_SYS_CLK_FREQ 24000000 +#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_HZ 1000 + +/* NS16550 Configuration */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK (48000000) +#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CONFIG_SYS_NS16550_COM4 0x481A6000 /* UART3 on IA BOard */ + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ +4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } + +/* + * select serial console configuration + */ +#define CONFIG_SERIAL1 1 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_CONSOLE_INFO_QUIET + +#define CONFIG_ENV_IS_NOWHERE + +#define CONFIG_SYS_TEXT_BASE 0x402f0400 + +/* Unsupported features */ +#undef CONFIG_USE_IRQ + +#endif /* ! __CONFIG_AM335X_EVM_H */ -- cgit v1.3.1 From cfeba45f505290ec719076dd174727d10045aa2b Mon Sep 17 00:00:00 2001 From: Lei Wen Date: Mon, 3 Oct 2011 20:33:43 +0000 Subject: dkb: make mmc command as default enabled Signed-off-by: Lei Wen --- include/configs/dkb.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/dkb.h b/include/configs/dkb.h index 3d27c5857e7..fb02d923eea 100644 --- a/include/configs/dkb.h +++ b/include/configs/dkb.h @@ -47,6 +47,7 @@ #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ #include #define CONFIG_CMD_I2C +#define CONFIG_CMD_MMC #undef CONFIG_CMD_NET #undef CONFIG_CMD_NFS /* -- cgit v1.3.1 From 37fc0ed268dc5acacd3a83adafa26eb1a84e90af Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 24 Oct 2011 08:50:20 +0000 Subject: ARM: Add Calxeda Highbank platform Add basic support for Calxeda Highbank platform. Only minimal support with serial and SATA are included. Signed-off-by: Jason Hobbs Signed-off-by: Rob Herring Cc: Albert ARIBAUD --- MAINTAINERS | 4 ++ arch/arm/cpu/armv7/highbank/Makefile | 46 +++++++++++++ arch/arm/cpu/armv7/highbank/timer.c | 123 +++++++++++++++++++++++++++++++++++ board/highbank/Makefile | 49 ++++++++++++++ board/highbank/highbank.c | 57 ++++++++++++++++ boards.cfg | 1 + include/configs/highbank.h | 113 ++++++++++++++++++++++++++++++++ 7 files changed, 393 insertions(+) create mode 100644 arch/arm/cpu/armv7/highbank/Makefile create mode 100644 arch/arm/cpu/armv7/highbank/timer.c create mode 100644 board/highbank/Makefile create mode 100644 board/highbank/highbank.c create mode 100644 include/configs/highbank.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index f2fdb6ed750..576fea83099 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -219,6 +219,10 @@ Wolfgang Grandegger IPHASE4539 MPC8260 SCM MPC8260 +Rob Herring + + highbank highbank + Klaus Heydeck KUP4K MPC855 diff --git a/arch/arm/cpu/armv7/highbank/Makefile b/arch/arm/cpu/armv7/highbank/Makefile new file mode 100644 index 00000000000..76faeb0fe10 --- /dev/null +++ b/arch/arm/cpu/armv7/highbank/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).o + +COBJS := timer.o +SOBJS := + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/armv7/highbank/timer.c b/arch/arm/cpu/armv7/highbank/timer.c new file mode 100644 index 00000000000..d8a02888a2a --- /dev/null +++ b/arch/arm/cpu/armv7/highbank/timer.c @@ -0,0 +1,123 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * + * Based on arm926ejs/mx27/timer.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#include +#include +#include /* for size_t */ +#include /* for NULL */ +#include +#include + +#undef SYSTIMER_BASE +#define SYSTIMER_BASE 0xFFF34000 /* Timer 0 and 1 base */ +#define SYSTIMER_RATE 150000000 + +static ulong timestamp; +static ulong lastinc; +static struct systimer *systimer_base = (struct systimer *)SYSTIMER_BASE; + +/* + * Start the timer + */ +int timer_init(void) +{ + /* + * Setup timer0 + */ + writel(SYSTIMER_RELOAD, &systimer_base->timer0load); + writel(SYSTIMER_RELOAD, &systimer_base->timer0value); + writel(SYSTIMER_EN | SYSTIMER_32BIT, &systimer_base->timer0control); + + reset_timer_masked(); + + return 0; + +} + +#define TICK_PER_TIME ((SYSTIMER_RATE + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ) +#define NS_PER_TICK (1000000000 / SYSTIMER_RATE) + +static inline unsigned long long tick_to_time(unsigned long long tick) +{ + do_div(tick, TICK_PER_TIME); + return tick; +} + +static inline unsigned long long time_to_tick(unsigned long long time) +{ + return time * TICK_PER_TIME; +} + +static inline unsigned long long us_to_tick(unsigned long long us) +{ + unsigned long long tick = us << 16; + tick += NS_PER_TICK - 1; + do_div(tick, NS_PER_TICK); + return tick >> 16; +} + +unsigned long long get_ticks(void) +{ + ulong now = ~readl(&systimer_base->timer0value); + + if (now >= lastinc) /* normal mode (non roll) */ + /* move stamp forward with absolut diff ticks */ + timestamp += (now - lastinc); + else /* we have rollover of incrementer */ + timestamp += (0xFFFFFFFF - lastinc) + now; + lastinc = now; + return timestamp; +} + +/* + * Delay x useconds AND preserve advance timstamp value + * assumes timer is ticking at 1 msec + */ +void __udelay(ulong usec) +{ + unsigned long long tmp; + ulong tmo; + + tmo = us_to_tick(usec); + tmp = get_ticks() + tmo; /* get current timestamp */ + + while (get_ticks() < tmp) /* loop till event */ + /*NOP*/; +} + +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +void reset_timer_masked(void) +{ + lastinc = ~readl(&systimer_base->timer0value); + timestamp = 0; +} + +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer_masked(void) +{ + return tick_to_time(get_ticks()); +} diff --git a/board/highbank/Makefile b/board/highbank/Makefile new file mode 100644 index 00000000000..d5b836255c2 --- /dev/null +++ b/board/highbank/Makefile @@ -0,0 +1,49 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := highbank.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c new file mode 100644 index 00000000000..8db8a2bb2c1 --- /dev/null +++ b/board/highbank/highbank.c @@ -0,0 +1,57 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#include +#include +#include + +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Miscellaneous platform dependent initialisations + */ +int board_init(void) +{ + icache_enable(); + + return 0; +} + +int misc_init_r(void) +{ + ahci_init(0xffe08000); + scsi_scan(1); + return 0; +} + +int dram_init(void) +{ + gd->ram_size = SZ_512M; + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +} + +void reset_cpu(ulong addr) +{ +} diff --git a/boards.cfg b/boards.cfg index 41621726a7c..604becfb44d 100644 --- a/boards.cfg +++ b/boards.cfg @@ -161,6 +161,7 @@ dkb arm arm926ejs - Marvell pantheon integratorap_cm946es arm arm946es integrator armltd - integratorap integratorcp_cm946es arm arm946es integrator armltd - integratorcp ca9x4_ct_vxp arm armv7 vexpress armltd +highbank arm armv7 highbank - highbank am335x_evm arm armv7 am335x ti am33xx efikamx arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg efikasb arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/efikamx/imximage_sb.cfg diff --git a/include/configs/highbank.h b/include/configs/highbank.h new file mode 100644 index 00000000000..9c857883530 --- /dev/null +++ b/include/configs/highbank.h @@ -0,0 +1,113 @@ +/* + * Copyright 2010-2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_L2_OFF + +#define CONFIG_SYS_NO_FLASH +#define CFG_HZ 1000 +#define CONFIG_SYS_HZ CFG_HZ + +#define CONFIG_OF_LIBFDT +#define CONFIG_FIT +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (512 * 1024) + +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 150000000 +#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } +#define CONFIG_CONS_INDEX 0 + +#define CONFIG_BAUDRATE 38400 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +#define CONFIG_MISC_INIT_R +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) + +#define CONFIG_DOS_PARTITION + +/* + * Command line configuration. + */ +#include +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +#define CONFIG_CMD_BDI +#define CONFIG_CMD_ELF +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_LOADS +#define CONFIG_CMD_SCSI +#define CONFIG_CMD_EXT2 + +#define CONFIG_BOOTDELAY 2 +/* + * Miscellaneous configurable options + */ +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PROMPT "Highbank #" +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT)+16) + +#define CONFIG_SYS_LOAD_ADDR 0x800000 + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1_SIZE (4089 << 20) +#define CONFIG_SYS_MEMTEST_START 0x100000 +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000) + +/* Room required on the stack for the environment data */ +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_IS_NOWHERE + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_TEXT_BASE 0x00001000 +#define CONFIG_SYS_INIT_SP_ADDR 0x01000000 +#define CONFIG_SKIP_LOWLEVEL_INIT + +#endif -- cgit v1.3.1