From 51916864b31f35853c2c6bf94f4dc89a311ee8f1 Mon Sep 17 00:00:00 2001 From: Nitin Jain Date: Fri, 16 Feb 2018 12:56:17 +0530 Subject: arm64: zynqmp: Add support to load an app at EL1 This patch is adding support to switch to EL1 while loading an EL1 application with u-boot running at EL above EL1 in aarch64 mode. Signed-off-by: Nitin Jain Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- include/command.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/command.h b/include/command.h index 767cabb3df0..56499b8ad5c 100644 --- a/include/command.h +++ b/include/command.h @@ -111,6 +111,8 @@ extern int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc, extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); extern int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); +extern unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, + char * const argv[]); /* * Error codes that commands return to cmd_process(). We use the standard 0 * and 1 for success and failure, but add one more case - failure with a -- cgit v1.3.1 From fce0a6b521aca50f9ef098ccbbbb33efa4a6486e Mon Sep 17 00:00:00 2001 From: Vipul Kumar Date: Thu, 15 Feb 2018 11:24:41 +0530 Subject: arm64: zynqmp: Changed scratch address used by the alternate memory test This patch changed CONFIG_SYS_MEMTEST_SCRATCH address to the accessible DDR address used by alternate memory test. Before this, 0xfffc0000 address was used, which is the OCM address and not enabled in MMU table. So, whenever trying to access 0xfffc0000 address, got Synchronous Abort exception. After changing CONFIG_SYS_MEMTEST_SCRATCH address, alternate memory test is working fine. Signed-off-by: Vipul Kumar Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 4 +++- include/configs/xilinx_zynqmp_mini.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e23b0f2adb7..8c0b5d9c06a 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -21,7 +21,9 @@ #define GICC_BASE 0xF9020000 #define CONFIG_SYS_ALT_MEMTEST -#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 +#ifndef CONFIG_SYS_MEMTEST_SCRATCH +# define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 +#endif #ifndef CONFIG_NR_DRAM_BANKS # define CONFIG_NR_DRAM_BANKS 2 diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 00f4c1c087b..4fbf85a9edc 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -11,6 +11,8 @@ #ifndef __CONFIG_ZYNQMP_MINI_H #define __CONFIG_ZYNQMP_MINI_H +#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 + #include /* Undef unneeded configs */ -- cgit v1.3.1 From 348dbf4368735c9c0a6e0a42ffff46521370dd1f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 2 Mar 2018 08:11:43 +0100 Subject: arm64: zynqmp: Remove ep108 board ZynqMP Emulation board is no longer tested and there is no reason to keep maintaining it. Signed-off-by: Michal Simek --- arch/arm/dts/Makefile | 1 - arch/arm/dts/zynqmp-ep108-clk.dtsi | 172 --------------------------- arch/arm/dts/zynqmp-ep108.dts | 235 ------------------------------------- configs/xilinx_zynqmp_ep_defconfig | 102 ---------------- include/configs/xilinx_zynqmp_ep.h | 24 ---- 5 files changed, 534 deletions(-) delete mode 100644 arch/arm/dts/zynqmp-ep108-clk.dtsi delete mode 100644 arch/arm/dts/zynqmp-ep108.dts delete mode 100644 configs/xilinx_zynqmp_ep_defconfig delete mode 100644 include/configs/xilinx_zynqmp_ep.h (limited to 'include') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7dd1dffae59..e983622fea5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -146,7 +146,6 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \ zynq-zturn-myir.dtb \ zynq-zybo.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += \ - zynqmp-ep108.dtb \ zynqmp-mini-emmc.dtb \ zynqmp-mini-nand.dtb \ zynqmp-zcu102-revA.dtb \ diff --git a/arch/arm/dts/zynqmp-ep108-clk.dtsi b/arch/arm/dts/zynqmp-ep108-clk.dtsi deleted file mode 100644 index 12d9fe14988..00000000000 --- a/arch/arm/dts/zynqmp-ep108-clk.dtsi +++ /dev/null @@ -1,172 +0,0 @@ -/* - * clock specification for Xilinx ZynqMP ep108 development board - * - * (C) Copyright 2015, Xilinx, Inc. - * - * Michal Simek - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/ { - misc_clk: misc_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - u-boot,dm-pre-reloc; - }; - - i2c_clk: i2c_clk { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <111111111>; - }; - - sata_clk: sata_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <75000000>; - }; - - dp_aclk: clock0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <50000000>; - clock-accuracy = <100>; - }; - - clk100: clk100 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - }; - - clk600: clk600 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <600000000>; - }; - - dp_aud_clk: clock1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <22579200>; - clock-accuracy = <100>; - }; -}; - -&can0 { - clocks = <&misc_clk &misc_clk>; -}; - -&can1 { - clocks = <&misc_clk &misc_clk>; -}; - -&fpd_dma_chan1 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan2 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan3 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan4 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan5 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan6 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan7 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan8 { - clocks = <&clk600>, <&clk100>; -}; - -&gem0 { - clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; -}; - -&gpio { - clocks = <&misc_clk>; -}; - -&i2c0 { - clocks = <&i2c_clk>; -}; - -&i2c1 { - clocks = <&i2c_clk>; -}; - -&nand0 { - clocks = <&misc_clk &misc_clk>; -}; - -&qspi { - clocks = <&misc_clk &misc_clk>; -}; - -&sata { - clocks = <&sata_clk>; -}; - -&sdhci0 { - clocks = <&misc_clk>, <&misc_clk>; -}; - -&sdhci1 { - clocks = <&misc_clk>, <&misc_clk>; -}; - -&spi0 { - clocks = <&misc_clk &misc_clk>; -}; - -&spi1 { - clocks = <&misc_clk &misc_clk>; -}; - -&uart0 { - clocks = <&misc_clk &misc_clk>; -}; - -&usb0 { - clocks = <&misc_clk>, <&misc_clk>; -}; - -&usb1 { - clocks = <&misc_clk>, <&misc_clk>; -}; - -&watchdog0 { - clocks= <&misc_clk>; -}; - -&xilinx_drm { - clocks = <&misc_clk>; -}; - -&xlnx_dp { - clocks = <&dp_aclk>, <&dp_aud_clk>; -}; - -&xlnx_dp_snd_codec0 { - clocks = <&dp_aud_clk>; -}; - -&xlnx_dpdma { - clocks = <&misc_clk>; -}; diff --git a/arch/arm/dts/zynqmp-ep108.dts b/arch/arm/dts/zynqmp-ep108.dts deleted file mode 100644 index a16ffdc3f0c..00000000000 --- a/arch/arm/dts/zynqmp-ep108.dts +++ /dev/null @@ -1,235 +0,0 @@ -/* - * dts file for Xilinx ZynqMP ep108 development board - * - * (C) Copyright 2014 - 2015, Xilinx, Inc. - * - * Michal Simek - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/dts-v1/; - -#include "zynqmp.dtsi" -#include "zynqmp-ep108-clk.dtsi" - -/ { - model = "ZynqMP EP108"; - - aliases { - ethernet0 = &gem0; - mmc0 = &sdhci0; - mmc1 = &sdhci1; - serial0 = &uart0; - spi0 = &qspi; - spi1 = &spi0; - spi2 = &spi1; - usb0 = &usb0; - usb1 = &usb1; - }; - - chosen { - bootargs = "earlycon"; - stdout-path = "serial0:115200n8"; - }; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x40000000>; - }; -}; - -&can0 { - status = "okay"; -}; - -&can1 { - status = "okay"; -}; - -&gem0 { - status = "okay"; - phy-handle = <&phy0>; - phy-mode = "rgmii-id"; - phy0: phy@0 { - reg = <0>; - max-speed = <100>; - }; -}; - -&gpio { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - clock-frequency = <400000>; - eeprom@54 { - compatible = "atmel,24c64"; - reg = <0x54>; - }; -}; - -&i2c1 { - status = "okay"; - clock-frequency = <400000>; - eeprom@55 { - compatible = "atmel,24c64"; - reg = <0x55>; - }; -}; - -&nand0 { - status = "okay"; - arasan,has-mdma; - num-cs = <1>; - - partition@0 { /* for testing purpose */ - label = "nand-fsbl-uboot"; - reg = <0x0 0x0 0x400000>; - }; - partition@1 { /* for testing purpose */ - label = "nand-linux"; - reg = <0x0 0x400000 0x1400000>; - }; - partition@2 { /* for testing purpose */ - label = "nand-device-tree"; - reg = <0x0 0x1800000 0x400000>; - }; - partition@3 { /* for testing purpose */ - label = "nand-rootfs"; - reg = <0x0 0x1C00000 0x1400000>; - }; - partition@4 { /* for testing purpose */ - label = "nand-bitstream"; - reg = <0x0 0x3000000 0x400000>; - }; - partition@5 { /* for testing purpose */ - label = "nand-misc"; - reg = <0x0 0x3400000 0xFCC00000>; - }; -}; - -&qspi { - status = "okay"; - flash@0 { - compatible = "m25p80"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x0>; - spi-tx-bus-width = <1>; - spi-rx-bus-width = <4>; - spi-max-frequency = <10000000>; - partition@qspi-fsbl-uboot { /* for testing purpose */ - label = "qspi-fsbl-uboot"; - reg = <0x0 0x100000>; - }; - partition@qspi-linux { /* for testing purpose */ - label = "qspi-linux"; - reg = <0x100000 0x500000>; - }; - partition@qspi-device-tree { /* for testing purpose */ - label = "qspi-device-tree"; - reg = <0x600000 0x20000>; - }; - partition@qspi-rootfs { /* for testing purpose */ - label = "qspi-rootfs"; - reg = <0x620000 0x5E0000>; - }; - }; -}; - -&sata { - status = "okay"; - ceva,broken-gen2; - /* SATA Phy OOB timing settings */ - ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>; - ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>; - ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>; - ceva,p0-retry-params = /bits/ 16 <0x0216 0x7F06>; - ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>; - ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>; - ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>; - ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>; -}; - -&sdhci0 { - status = "okay"; - bus-width = <8>; - xlnx,mio_bank = <2>; -}; - -&sdhci1 { - status = "okay"; - xlnx,mio_bank = <1>; -}; - -&spi0 { - status = "okay"; - num-cs = <1>; - spi0_flash0: spi0_flash0@0 { - compatible = "m25p80"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - reg = <0>; - - spi0_flash0@0 { - label = "spi0_flash0"; - reg = <0x0 0x100000>; - }; - }; -}; - -&spi1 { - status = "okay"; - num-cs = <1>; - spi1_flash0: spi1_flash0@0 { - compatible = "m25p80"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - reg = <0>; - - spi1_flash0@0 { - label = "spi1_flash0"; - reg = <0x0 0x100000>; - }; - }; -}; - -&uart0 { - status = "okay"; -}; - -&usb0 { - status = "okay"; -}; - -&dwc3_0 { - status = "okay"; - dr_mode = "peripheral"; - maximum-speed = "high-speed"; -}; - -&usb1 { - status = "okay"; -}; - -&dwc3_1 { - status = "okay"; - dr_mode = "host"; - maximum-speed = "high-speed"; -}; - -&watchdog0 { - status = "okay"; -}; - -&xlnx_dp { - xlnx,max-pclock-frequency = <200000>; -}; - -&xlnx_dpdma { - xlnx,axi-clock-freq = <200000000>; -}; diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig deleted file mode 100644 index e974fc16ad1..00000000000 --- a/configs/xilinx_zynqmp_ep_defconfig +++ /dev/null @@ -1,102 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep" -CONFIG_ARCH_ZYNQMP=y -CONFIG_SYS_TEXT_BASE=0x8000000 -CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_SPL=y -CONFIG_ZYNQ_SDHCI_MAX_FREQ=52000000 -CONFIG_ZYNQMP_USB=y -CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108" -CONFIG_DEBUG_UART=y -CONFIG_AHCI=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y -CONFIG_SPL_LOAD_FIT=y -# CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL_OS_BOOT=y -CONFIG_SYS_PROMPT="ZynqMP> " -CONFIG_FASTBOOT=y -CONFIG_FASTBOOT_FLASH=y -CONFIG_FASTBOOT_FLASH_MMC_DEV=0 -# CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_XIMG is not set -CONFIG_CMD_THOR_DOWNLOAD=y -# CONFIG_CMD_EDITENV is not set -# CONFIG_CMD_ENV_EXISTS is not set -CONFIG_CMD_CLK=y -CONFIG_CMD_DFU=y -# CONFIG_CMD_FPGA is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND_LOCK_UNLOCK=y -CONFIG_CMD_USB=y -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_TFTPPUT=y -# CONFIG_CMD_NFS is not set -CONFIG_CMD_TIME=y -CONFIG_CMD_TIMER=y -CONFIG_CMD_EXT4_WRITE=y -# CONFIG_SPL_ISO_PARTITION is not set -CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_EMBED=y -CONFIG_ENV_IS_IN_FAT=y -CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPL_DM=y -CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SCSI_AHCI=y -CONFIG_SATA_CEVA=y -CONFIG_DFU_RAM=y -CONFIG_FPGA_XILINX=y -CONFIG_FPGA_ZYNQMPPL=y -CONFIG_DM_GPIO=y -CONFIG_DM_I2C=y -CONFIG_SYS_I2C_CADENCE=y -CONFIG_MISC=y -CONFIG_DM_MMC=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ZYNQ=y -CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000 -CONFIG_NAND=y -CONFIG_NAND_ARASAN=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_BAR=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set -CONFIG_PHY_MARVELL=y -CONFIG_PHY_NATSEMI=y -CONFIG_PHY_REALTEK=y -CONFIG_PHY_TI=y -CONFIG_PHY_VITESSE=y -CONFIG_DM_ETH=y -CONFIG_PHY_GIGE=y -CONFIG_ZYNQ_GEM=y -CONFIG_SCSI=y -CONFIG_DM_SCSI=y -CONFIG_DEBUG_UART_ZYNQ=y -CONFIG_DEBUG_UART_BASE=0xff000000 -CONFIG_DEBUG_UART_CLOCK=25000000 -CONFIG_DEBUG_UART_ANNOUNCE=y -CONFIG_ZYNQ_SERIAL=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_XHCI_ZYNQMP=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Xilinx" -CONFIG_USB_GADGET_VENDOR_NUM=0x03fd -CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 -CONFIG_USB_FUNCTION_THOR=y -# CONFIG_REGEX is not set -CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h deleted file mode 100644 index a26377a4127..00000000000 --- a/include/configs/xilinx_zynqmp_ep.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Configuration for Xilinx ZynqMP emulation platforms - * - * (C) Copyright 2014 - 2015 Xilinx, Inc. - * Michal Simek - * Siva Durga Prasad Paladugu - * - * Based on Configuration for Versatile Express - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_ZYNQMP_EP_H -#define __CONFIG_ZYNQMP_EP_H - -#define CONFIG_ZYNQ_EEPROM -#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ - ZYNQMP_USB1_XHCI_BASEADDR} - -#define COUNTER_FREQUENCY 4000000 - -#include - -#endif /* __CONFIG_ZYNQMP_EP_H */ -- cgit v1.3.1