From 06377c5a1fce4d1e9b7a5dfb62a66c4fe0c076ce Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Thu, 29 Sep 2022 13:11:28 +0300 Subject: spl: spl_legacy: Fix NAND boot on OMAP3 BeagleBoard OMAP3 BeagleBoard NAND boot hangs when spl_load_legacy_img() tries to read the header into 'struct hdr' which is allocated on the stack. As the header has already been read once before by spl_nand.c, we can avoid the extra header allocation and read here by simply passing around the pointer to the header. This fixes NAND boot on OMAP3 BeagleBoard. Signed-off-by: Roger Quadros Reviewed-By: Michael Trimarchi --- include/spl.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/spl.h b/include/spl.h index 0fc3686bbca..303a657bf5c 100644 --- a/include/spl.h +++ b/include/spl.h @@ -353,7 +353,8 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, * spl_load_legacy_img() - Loads a legacy image from a device. * @spl_image: Image description to set up * @load: Structure containing the information required to load data. - * @header: Pointer to image header (including appended image) + * @offset: Pointer to image + * @hdr: Pointer to image header * * Reads an legacy image from the device. Loads u-boot image to * specified load address. @@ -361,7 +362,9 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, */ int spl_load_legacy_img(struct spl_image_info *spl_image, struct spl_boot_device *bootdev, - struct spl_load_info *load, ulong header); + struct spl_load_info *load, ulong offset, + struct legacy_img_hdr *hdr); + /** * spl_load_imx_container() - Loads a imx container image from a device. -- cgit v1.2.3 From 2c120375e949807ce8e3b077d6537e2d8d69a87c Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Thu, 20 Oct 2022 16:30:46 +0300 Subject: dm: memory: Introduce new uclass Introduce UCLASS_MEMORY for future Memory Controller device drivers. Signed-off-by: Roger Quadros Reviewed-by: Simon Glass --- include/dm/uclass-id.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index c2b15881ba7..4b2c3234525 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -77,6 +77,7 @@ enum uclass_id { UCLASS_MASS_STORAGE, /* Mass storage device */ UCLASS_MDIO, /* MDIO bus */ UCLASS_MDIO_MUX, /* MDIO MUX/switch */ + UCLASS_MEMORY, /* Memory Controller device */ UCLASS_MISC, /* Miscellaneous device */ UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ -- cgit v1.2.3 From 9b0b5648d6e4d89aa594022e48894e811c250d5f Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Thu, 20 Oct 2022 16:30:49 +0300 Subject: memory: Add TI GPMC driver The GPMC is a unified memory controller dedicated for interfacing with external memory devices like - Asynchronous SRAM-like memories and ASICs - Asynchronous, synchronous, and page mode burst NOR flash - NAND flash - Pseudo-SRAM devices This driver will take care of setting up the GPMC based on the settings specified in the Device tree and then probe its children. Signed-off-by: Roger Quadros --- include/linux/mtd/omap_gpmc.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/mtd/omap_gpmc.h b/include/linux/mtd/omap_gpmc.h index 864b05e432a..f08e700a1da 100644 --- a/include/linux/mtd/omap_gpmc.h +++ b/include/linux/mtd/omap_gpmc.h @@ -8,6 +8,9 @@ #ifndef __ASM_OMAP_GPMC_H #define __ASM_OMAP_GPMC_H +/* Maximum Number of Chip Selects */ +#define GPMC_CS_NUM 8 + #define GPMC_BUF_EMPTY 0 #define GPMC_BUF_FULL 1 #define GPMC_MAX_SECTORS 8 -- cgit v1.2.3