From fb8cac936615e6e75237ce95ccaa09d8b109cae3 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Wed, 3 Jan 2018 16:11:56 +0100 Subject: mx6: Support SKS-Kinkel sksimx6 Board Board has 1GB RAM and boots from SD Card U-Boot SPL 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54) BT_FUSE_SEL already fused, will do nothing Trying to boot from MMC1 U-Boot 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54 +0100) CPU: Freescale i.MX6DL rev1.2 996 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 40C Reset cause: POR I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0 In: serial Out: serial Err: serial Net: FEC [PRIME] Signed-off-by: Stefano Babic Reviewed-by: Fabio Estevam --- include/configs/sksimx6.h | 101 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 101 insertions(+) create mode 100644 include/configs/sksimx6.h (limited to 'include') diff --git a/include/configs/sksimx6.h b/include/configs/sksimx6.h new file mode 100644 index 00000000000..c635e9f1b5d --- /dev/null +++ b/include/configs/sksimx6.h @@ -0,0 +1,101 @@ +/* + * Copyright (C) Stefano Babic + * + * SPDX-License-Identifier: GPL-2.0+ + */ + + +#ifndef __SKSIMX6_CONFIG_H +#define __SKSIMX6_CONFIG_H + +#include + +#include "mx6_common.h" +#include "imx6_spl.h" + +/* Thermal */ +#define CONFIG_IMX_THERMAL + +/* Serial */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) + +/* Ethernet */ +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 0x01 + +#define CONFIG_MII +#define CONFIG_PHY_MICREL_KSZ9021 + +/* I2C Configs */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_MXC_I2C2 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* Filesystem support */ + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* MMC Configs */ +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +/* Environment organization */ +#define CONFIG_ENV_SIZE (16 * 1024) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ + CONFIG_ENV_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "addcons=setenv bootargs ${bootargs} " \ + "console=${console},${baudrate}\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:" \ + "${netmask}:${hostname}:${netdev}:off\0" \ + "addmisc=setenv bootargs ${bootargs} ${miscargs}\0" \ + "bootcmd=run mmcboot\0" \ + "bootfile=uImage\0" \ + "bootimage=uImage\0" \ + "console=ttymxc0\0" \ + "fdt_addr_r=0x18000000\0" \ + "fdt_file=imx6dl-sks-cts.dtb\0" \ + "fdt_high=0xffffffff\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "miscargs=quiet\0" \ + "mmcargs=setenv bootargs root=${mmcroot} rw rootwait\0" \ + "mmcboot=if run mmcload;then " \ + "run mmcargs addcons addmisc;" \ + "bootm;fi\0" \ + "mmcload=mmc rescan;" \ + "load mmc 0:${mmcpart} ${kernel_addr_r} boot/fitImage\0"\ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk0p1\0" \ + "net_nfs=tftp ${kernel_addr_r} ${board_name}/${bootfile};" \ + "tftp ${fdt_addr_r} ${board_name}/${fdt_file};" \ + "run nfsargs addip addcons addmisc;" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ + "nfsargs=setenv bootargs root=/dev/nfs " \ + "nfsroot=${serverip}:${nfsroot},v3 panic=1\0" + +#endif -- cgit v1.3.1 From 5dfc9d3766ee74f3711747a5fc9fa763ae82747c Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 2 Jan 2018 09:32:08 +0800 Subject: imx: mx6sxsabresd: Enable DM driver Enable I2C/MMC/GPIO/REGUALTOR/PMIC/USB DM drivers. There are some dependency, such as when DM MMC enabled, USB compile error. Also the i.MX I2C MMC DM driver does not support legacy GPIO interface. So enable them all together. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam --- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 369 ++++++++++------------------ configs/mx6sxsabresd_defconfig | 12 + configs/mx6sxsabresd_spl_defconfig | 12 + include/configs/mx6sxsabresd.h | 7 - 4 files changed, 149 insertions(+), 251 deletions(-) (limited to 'include') diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 3ad2140314f..8940f372083 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -26,8 +26,6 @@ #include #include #include "../common/pfuze.h" -#include -#include DECLARE_GLOBAL_DATA_PTR; @@ -39,11 +37,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE) - #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ PAD_CTL_SPEED_HIGH | \ PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST) @@ -54,11 +47,6 @@ DECLARE_GLOBAL_DATA_PTR; #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_SPEED_HIGH | PAD_CTL_SRE_FAST) -#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE) - #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm) @@ -74,44 +62,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), }; -static iomux_v3_cfg_t const usdhc2_pads[] = { - MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -static iomux_v3_cfg_t const usdhc3_pads[] = { - MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA0__USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA1__USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA2__USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA3__USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA4__USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA5__USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA6__USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD3_DATA7__USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - - /* CD pin */ - MX6_PAD_KEY_COL0__GPIO2_IO_10 | MUX_PAD_CTRL(NO_PAD_CTRL), - - /* RST_B, used for power reset cycle */ - MX6_PAD_KEY_COL1__GPIO2_IO_11 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static iomux_v3_cfg_t const usdhc4_pads[] = { - MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DATA0__USDHC4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DATA1__USDHC4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DATA2__USDHC4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DATA3__USDHC4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DATA7__GPIO6_IO_21 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - static iomux_v3_cfg_t const fec1_pads[] = { MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -166,9 +116,11 @@ static int setup_fec(void) ARRAY_SIZE(phy_control_pads)); /* Enable the ENET power, active low */ + gpio_request(IMX_GPIO_NR(2, 6), "enet_rst"); gpio_direction_output(IMX_GPIO_NR(2, 6) , 0); /* Reset AR8031 PHY */ + gpio_request(IMX_GPIO_NR(2, 7), "phy_rst"); gpio_direction_output(IMX_GPIO_NR(2, 7) , 0); mdelay(10); gpio_set_value(IMX_GPIO_NR(2, 7), 1); @@ -188,86 +140,28 @@ int board_eth_init(bd_t *bis) return cpu_eth_init(bis); } -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -/* I2C1 for PMIC */ -static struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC, - .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC, - .gp = IMX_GPIO_NR(1, 0), - }, - .sda = { - .i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC, - .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC, - .gp = IMX_GPIO_NR(1, 1), - }, -}; - int power_init_board(void) { - struct pmic *p; + struct udevice *dev; unsigned int reg; int ret; - p = pfuze_common_init(I2C_PMIC); - if (!p) + dev = pfuze_common_init(); + if (!dev) return -ENODEV; - ret = pfuze_mode_init(p, APS_PFM); + ret = pfuze_mode_init(dev, APS_PFM); if (ret < 0) return ret; /* Enable power of VGEN5 3V3, needed for SD3 */ - pmic_reg_read(p, PFUZE100_VGEN5VOL, ®); + reg = pmic_reg_read(dev, PFUZE100_VGEN5VOL); reg &= ~LDO_VOL_MASK; reg |= (LDOB_3_30V | (1 << LDO_EN)); - pmic_reg_write(p, PFUZE100_VGEN5VOL, reg); - - return 0; -} - -#ifdef CONFIG_USB_EHCI_MX6 -#define USB_OTHERREGS_OFFSET 0x800 -#define UCTRL_PWR_POL (1 << 9) - -static iomux_v3_cfg_t const usb_otg_pads[] = { - /* OGT1 */ - MX6_PAD_GPIO1_IO09__USB_OTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_GPIO1_IO10__ANATOP_OTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL), - /* OTG2 */ - MX6_PAD_GPIO1_IO12__USB_OTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL) -}; - -static void setup_usb(void) -{ - imx_iomux_v3_setup_multiple_pads(usb_otg_pads, - ARRAY_SIZE(usb_otg_pads)); -} - -int board_usb_phy_mode(int port) -{ - if (port == 1) - return USB_INIT_HOST; - else - return usb_phy_mode(port); -} - -int board_ehci_hcd_init(int port) -{ - u32 *usbnc_usb_ctrl; - - if (port > 1) - return -EINVAL; - - usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET + - port * 4); - - /* Set Power polarity */ - setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL); + pmic_reg_write(dev, PFUZE100_VGEN5VOL, reg); return 0; } -#endif int board_phy_config(struct phy_device *phydev) { @@ -296,138 +190,12 @@ int board_early_init_f(void) imx_iomux_v3_setup_multiple_pads(peri_3v3_pads, ARRAY_SIZE(peri_3v3_pads)); - /* Active high for ncp692 */ - gpio_direction_output(IMX_GPIO_NR(4, 16) , 1); - -#ifdef CONFIG_USB_EHCI_MX6 - setup_usb(); -#endif - return 0; } -static struct fsl_esdhc_cfg usdhc_cfg[3] = { - {USDHC2_BASE_ADDR, 0, 4}, - {USDHC3_BASE_ADDR}, - {USDHC4_BASE_ADDR}, -}; - -#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 10) -#define USDHC3_PWR_GPIO IMX_GPIO_NR(2, 11) -#define USDHC4_CD_GPIO IMX_GPIO_NR(6, 21) - int board_mmc_get_env_dev(int devno) { - return devno - 1; -} - -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret = 0; - - switch (cfg->esdhc_base) { - case USDHC2_BASE_ADDR: - ret = 1; /* Assume uSDHC2 is always present */ - break; - case USDHC3_BASE_ADDR: - ret = !gpio_get_value(USDHC3_CD_GPIO); - break; - case USDHC4_BASE_ADDR: - ret = !gpio_get_value(USDHC4_CD_GPIO); - break; - } - - return ret; -} - -int board_mmc_init(bd_t *bis) -{ -#ifndef CONFIG_SPL_BUILD - int i, ret; - - /* - * According to the board_mmc_init() the following map is done: - * (U-Boot device node) (Physical Port) - * mmc0 USDHC2 - * mmc1 USDHC3 - * mmc2 USDHC4 - */ - for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { - switch (i) { - case 0: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - break; - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - gpio_direction_input(USDHC3_CD_GPIO); - gpio_direction_output(USDHC3_PWR_GPIO, 1); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - break; - case 2: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - gpio_direction_input(USDHC4_CD_GPIO); - usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - break; - default: - printf("Warning: you configured more USDHC controllers" - "(%d) than supported by the board\n", i + 1); - return -EINVAL; - } - - ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); - if (ret) { - printf("Warning: failed to initialize mmc dev %d\n", i); - return ret; - } - } - - return 0; -#else - struct src *src_regs = (struct src *)SRC_BASE_ADDR; - u32 val; - u32 port; - - val = readl(&src_regs->sbmr1); - - if ((val & 0xc0) != 0x40) { - printf("Not boot from USDHC!\n"); - return -EINVAL; - } - - port = (val >> 11) & 0x3; - printf("port %d\n", port); - switch (port) { - case 1: - imx_iomux_v3_setup_multiple_pads( - usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; - break; - case 2: - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - gpio_direction_input(USDHC3_CD_GPIO); - gpio_direction_output(USDHC3_PWR_GPIO, 1); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; - break; - case 3: - imx_iomux_v3_setup_multiple_pads( - usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); - gpio_direction_input(USDHC4_CD_GPIO); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; - break; - } - - gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -#endif + return devno; } #ifdef CONFIG_FSL_QSPI @@ -509,11 +277,13 @@ static int setup_lcd(void) imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); /* Reset the LCD */ + gpio_request(IMX_GPIO_NR(3, 27), "lcd_rst"); gpio_direction_output(IMX_GPIO_NR(3, 27) , 0); udelay(500); gpio_direction_output(IMX_GPIO_NR(3, 27) , 1); /* Set Brightness to high */ + gpio_request(IMX_GPIO_NR(6, 4), "lcd_bright"); gpio_direction_output(IMX_GPIO_NR(6, 4) , 1); return 0; @@ -525,9 +295,9 @@ int board_init(void) /* Address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; -#ifdef CONFIG_SYS_I2C_MXC - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); -#endif + /* Active high for ncp692 */ + gpio_request(IMX_GPIO_NR(4, 16), "ncp692_en"); + gpio_direction_output(IMX_GPIO_NR(4, 16), 1); #ifdef CONFIG_FSL_QSPI board_qspi_init(); @@ -566,6 +336,117 @@ int checkboard(void) #include #include +static struct fsl_esdhc_cfg usdhc_cfg[3] = { + {USDHC2_BASE_ADDR, 0, 4}, + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +#define USDHC3_CD_GPIO IMX_GPIO_NR(2, 10) +#define USDHC3_PWR_GPIO IMX_GPIO_NR(2, 11) +#define USDHC4_CD_GPIO IMX_GPIO_NR(6, 21) + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DATA0__USDHC3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DATA1__USDHC3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DATA2__USDHC3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DATA3__USDHC3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DATA4__USDHC3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DATA5__USDHC3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DATA6__USDHC3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DATA7__USDHC3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + + /* CD pin */ + MX6_PAD_KEY_COL0__GPIO2_IO_10 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* RST_B, used for power reset cycle */ + MX6_PAD_KEY_COL1__GPIO2_IO_11 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA0__USDHC4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA1__USDHC4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA2__USDHC4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA3__USDHC4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DATA7__GPIO6_IO_21 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int board_mmc_init(bd_t *bis) +{ + struct src *src_regs = (struct src *)SRC_BASE_ADDR; + u32 val; + u32 port; + + val = readl(&src_regs->sbmr1); + + if ((val & 0xc0) != 0x40) { + printf("Not boot from USDHC!\n"); + return -EINVAL; + } + + port = (val >> 11) & 0x3; + printf("port %d\n", port); + switch (port) { + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR; + break; + case 2: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + gpio_direction_input(USDHC3_CD_GPIO); + gpio_direction_output(USDHC3_PWR_GPIO, 1); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR; + break; + case 3: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + gpio_direction_input(USDHC4_CD_GPIO); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + usdhc_cfg[0].esdhc_base = USDHC4_BASE_ADDR; + break; + } + + gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC2_BASE_ADDR: + ret = 1; /* Assume uSDHC2 is always present */ + break; + case USDHC3_BASE_ADDR: + ret = !gpio_get_value(USDHC3_CD_GPIO); + break; + case USDHC4_BASE_ADDR: + ret = !gpio_get_value(USDHC4_CD_GPIO); + break; + } + + return ret; +} + const struct mx6sx_iomux_ddr_regs mx6_ddr_ioregs = { .dram_dqm0 = 0x00000028, .dram_dqm1 = 0x00000028, diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 9ac5236df08..9a27710a899 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -29,11 +29,23 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_PHYLIB=y CONFIG_PCI=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 6a1423bd0c5..033fc6cf58d 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -38,10 +38,22 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_PCI=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 906e677cd14..b20e436f93e 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -145,19 +145,12 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* I2C Configs */ -#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ #define CONFIG_SYS_I2C_SPEED 100000 -/* PMIC */ -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_PFUZE100 -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 - /* Network */ #define CONFIG_FEC_MXC #define CONFIG_MII -- cgit v1.3.1 From d9523fdd11dacdf7e01216c470ef1a7a4fabf0b8 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 2 Jan 2018 09:32:10 +0800 Subject: imx: mx6sxsabresd: enlarge ENV offset The u-boot-dtb.imx size is about 519KB, so 8 * 64KB conflicts with u-boot-dtb.imx. Enlarge the offset to 14 * 64KB to fix it. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam --- include/configs/mx6sxsabresd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index b20e436f93e..1eaaf013f7a 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -203,7 +203,7 @@ #endif #endif -#define CONFIG_ENV_OFFSET (8 * SZ_64K) +#define CONFIG_ENV_OFFSET (14 * SZ_64K) #define CONFIG_ENV_SIZE SZ_8K #define CONFIG_SYS_FSL_USDHC_NUM 3 -- cgit v1.3.1 From a3cc43551f8f1cab156d02a44999c07a7261fd14 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 3 Jan 2018 08:52:03 +0800 Subject: imx: mx6ull-14x14-evk: enable DM QSPI driver To support QSPI DM driver - Add spi0 alias for qspi node. Which is used for bus number 0. - Modify the n25q256a@0 compatible property to "spi-flash". - Modify spi4 (gpio_spi) node to spi5 - Define DM SPI/QSPI related config to enable QSPI Signed-off-by: Peng Fan --- arch/arm/dts/imx6ull-14x14-evk.dts | 5 +++-- arch/arm/dts/imx6ull.dtsi | 9 +++++---- configs/mx6ull_14x14_evk_defconfig | 6 ++++++ configs/mx6ull_14x14_evk_plugin_defconfig | 6 ++++++ include/configs/mx6ullevk.h | 10 ++++++++++ 5 files changed, 30 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/arch/arm/dts/imx6ull-14x14-evk.dts b/arch/arm/dts/imx6ull-14x14-evk.dts index 375bd4ea319..2a941bff1ce 100644 --- a/arch/arm/dts/imx6ull-14x14-evk.dts +++ b/arch/arm/dts/imx6ull-14x14-evk.dts @@ -67,7 +67,7 @@ }; }; - spi4 { + spi5 { compatible = "spi-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi4>; @@ -455,7 +455,8 @@ flash0: n25q256a@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "micron,n25q256a"; + /* compatible = "micron,n25q256a"; */ + compatible = "spi-flash"; spi-max-frequency = <29000000>; spi-nor,ddr-quad-read-dummy = <6>; reg = <0>; diff --git a/arch/arm/dts/imx6ull.dtsi b/arch/arm/dts/imx6ull.dtsi index 65950e8019d..ea882a7f140 100644 --- a/arch/arm/dts/imx6ull.dtsi +++ b/arch/arm/dts/imx6ull.dtsi @@ -38,10 +38,11 @@ serial5 = &uart6; serial6 = &uart7; serial7 = &uart8; - spi0 = &ecspi1; - spi1 = &ecspi2; - spi2 = &ecspi3; - spi3 = &ecspi4; + spi0 = &qspi; + spi1 = &ecspi1; + spi2 = &ecspi2; + spi3 = &ecspi3; + spi4 = &ecspi4; usbphy0 = &usbphy1; usbphy1 = &usbphy2; }; diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index 4960056fe4d..5305c12fdbc 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -10,6 +10,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y @@ -24,7 +25,12 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index d07be226f55..f1023b2aaec 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -11,6 +11,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y @@ -25,7 +26,12 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_STMICRO=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 8787df49071..6a48742fd0a 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -164,4 +164,14 @@ #define CONFIG_SOFT_SPI +#ifdef CONFIG_FSL_QSPI +#define CONFIG_SYS_FSL_QSPI_AHB +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 40000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define FSL_QSPI_FLASH_NUM 1 +#define FSL_QSPI_FLASH_SIZE SZ_32M +#endif + #endif -- cgit v1.3.1 From dbeaa1d1317bf6494adb43417d2407672fc94ba6 Mon Sep 17 00:00:00 2001 From: Christopher Spinrath Date: Tue, 9 Jan 2018 22:01:35 +0100 Subject: ARM: imx: cm_fx6: export board and soc info to env Like many other i.MX6 based boards, there are multiple variants of the cm-fx6 module featuring different SoC variants. Furthermore, the module can be paired with multiple baseboards. At the same time modern distribution like Fedora require U-Boot to select a proper devicetree which depends on the SoC variant and the baseboard. Thus, export the SoC variant and the actual board to the environment following the conventions of other i.MX6 devices (e.g. the NXP boards) such that the environment can select a devicetree file to load. For now, we only know for sure that the cm-fx6 module and the SB-fx6m baseboard amount to a Utilite Computer variant (depending on the SoC). Further combinations may be added in the future; e.g. CompuLab's evaluation board once someone can verify the identification string stored in its eeprom. Signed-off-by: Christopher Spinrath Reviewed-by: Stefano Babic --- arch/arm/mach-imx/mx6/Kconfig | 1 + board/compulab/cm_fx6/cm_fx6.c | 21 +++++++++++++++++++++ include/configs/cm_fx6.h | 1 + 3 files changed, 23 insertions(+) (limited to 'include') diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index c11c02c87b9..2f3e52d6240 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -130,6 +130,7 @@ config TARGET_CM_FX6 bool "CM-FX6" select SUPPORT_SPL select MX6QDL + select BOARD_LATE_INIT select DM select DM_SERIAL select DM_GPIO diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 620c3f2d0df..673de030714 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -621,6 +621,27 @@ int board_init(void) return 0; } +int board_late_init(void) +{ +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + char baseboard_name[16]; + int err; + + if (is_mx6dq()) + env_set("board_rev", "MX6Q"); + else if (is_mx6dl()) + env_set("board_rev", "MX6DL"); + + err = cl_eeprom_get_product_name((uchar *)baseboard_name, 0); + if (err) + return 0; + + if (!strncmp("SB-FX6m", baseboard_name, 7)) + env_set("board_name", "Utilite"); +#endif + return 0; +} + int checkboard(void) { puts("Board: CM-FX6\n"); diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index ec3e6e6ca52..cb71ea88116 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -67,6 +67,7 @@ #define CONFIG_ENV_OFFSET (768 * 1024) #ifndef CONFIG_SPL_BUILD +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ -- cgit v1.3.1 From edc57f1df8973e296e213819568ac116def0066a Mon Sep 17 00:00:00 2001 From: Christopher Spinrath Date: Tue, 9 Jan 2018 22:01:36 +0100 Subject: ARM: imx: cm_fx6: env: try to determine dtb to use Some distributions like Fedora expect U-Boot to select a proper devicetree. Since there are several variants of the cm-fx6 module featuring different SoC variants and the module can be paired with several baseboards, it is not viable to hardcode a filename. Instead, follow the lead of other i.MX6 based devices and try to determine the devicetree to use with the help of the board name and the SoC variant exported by the board code, before calling the distro bootcommand. For now, only for the Utilite Pro a proper devicetree filename is known but further variants of the Utilite Computer or other devices based on the cm-fx6 module may be added in the future. Signed-off-by: Christopher Spinrath --- configs/cm_fx6_defconfig | 2 +- include/configs/cm_fx6.h | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 33e610ccb42..6b1c0a823c6 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -16,7 +16,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 -CONFIG_BOOTCOMMAND="run distro_bootcmd; run legacy_bootcmd" +CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run legacy_bootcmd" CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80 CONFIG_SPL_I2C_SUPPORT=y diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index cb71ea88116..da870b9baa5 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -76,6 +76,7 @@ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + "fdtfile=undefined\0" \ "stdin=serial,usbkbd\0" \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" \ @@ -153,6 +154,11 @@ "fi;" \ "run setupnandboot;" \ "run nandboot;\0" \ + "findfdt="\ + "if test $board_name = Utilite && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-utilite-pro.dtb; fi; " \ + "if test $fdtfile = undefined; then " \ + "echo WARNING: Could not determine dtb to use; fi; \0" \ BOOTENV #define CONFIG_PREBOOT "usb start;sf probe" -- cgit v1.3.1