From 8f2eb2fb19b79c662b53acdc7f0b3479f859dcae Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:19:36 -0700 Subject: freescale: Drop unused ftpmu010 driver Drop this unused code. Signed-off-by: Simon Glass --- include/faraday/ftpmu010.h | 234 --------------------------------------------- 1 file changed, 234 deletions(-) delete mode 100644 include/faraday/ftpmu010.h (limited to 'include') diff --git a/include/faraday/ftpmu010.h b/include/faraday/ftpmu010.h deleted file mode 100644 index ccb7805375e..00000000000 --- a/include/faraday/ftpmu010.h +++ /dev/null @@ -1,234 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - */ - -/* - * Power Management Unit - */ -#ifndef __FTPMU010_H -#define __FTPMU010_H - -#ifndef __ASSEMBLY__ -struct ftpmu010 { - unsigned int IDNMBR0; /* 0x00 */ - unsigned int reserved0; /* 0x04 */ - unsigned int OSCC; /* 0x08 */ - unsigned int PMODE; /* 0x0C */ - unsigned int PMCR; /* 0x10 */ - unsigned int PED; /* 0x14 */ - unsigned int PEDSR; /* 0x18 */ - unsigned int reserved1; /* 0x1C */ - unsigned int PMSR; /* 0x20 */ - unsigned int PGSR; /* 0x24 */ - unsigned int MFPSR; /* 0x28 */ - unsigned int MISC; /* 0x2C */ - unsigned int PDLLCR0; /* 0x30 */ - unsigned int PDLLCR1; /* 0x34 */ - unsigned int AHBMCLKOFF; /* 0x38 */ - unsigned int APBMCLKOFF; /* 0x3C */ - unsigned int DCSRCR0; /* 0x40 */ - unsigned int DCSRCR1; /* 0x44 */ - unsigned int DCSRCR2; /* 0x48 */ - unsigned int SDRAMHTC; /* 0x4C */ - unsigned int PSPR0; /* 0x50 */ - unsigned int PSPR1; /* 0x54 */ - unsigned int PSPR2; /* 0x58 */ - unsigned int PSPR3; /* 0x5C */ - unsigned int PSPR4; /* 0x60 */ - unsigned int PSPR5; /* 0x64 */ - unsigned int PSPR6; /* 0x68 */ - unsigned int PSPR7; /* 0x6C */ - unsigned int PSPR8; /* 0x70 */ - unsigned int PSPR9; /* 0x74 */ - unsigned int PSPR10; /* 0x78 */ - unsigned int PSPR11; /* 0x7C */ - unsigned int PSPR12; /* 0x80 */ - unsigned int PSPR13; /* 0x84 */ - unsigned int PSPR14; /* 0x88 */ - unsigned int PSPR15; /* 0x8C */ - unsigned int AHBDMA_RACCS; /* 0x90 */ - unsigned int reserved2; /* 0x94 */ - unsigned int reserved3; /* 0x98 */ - unsigned int JSS; /* 0x9C */ - unsigned int CFC_RACC; /* 0xA0 */ - unsigned int SSP1_RACC; /* 0xA4 */ - unsigned int UART1TX_RACC; /* 0xA8 */ - unsigned int UART1RX_RACC; /* 0xAC */ - unsigned int UART2TX_RACC; /* 0xB0 */ - unsigned int UART2RX_RACC; /* 0xB4 */ - unsigned int SDC_RACC; /* 0xB8 */ - unsigned int I2SAC97_RACC; /* 0xBC */ - unsigned int IRDATX_RACC; /* 0xC0 */ - unsigned int reserved4; /* 0xC4 */ - unsigned int USBD_RACC; /* 0xC8 */ - unsigned int IRDARX_RACC; /* 0xCC */ - unsigned int IRDA_RACC; /* 0xD0 */ - unsigned int ED0_RACC; /* 0xD4 */ - unsigned int ED1_RACC; /* 0xD8 */ -}; -#endif /* __ASSEMBLY__ */ - -/* - * ID Number 0 Register - */ -#define FTPMU010_ID_A320A 0x03200000 -#define FTPMU010_ID_A320C 0x03200010 -#define FTPMU010_ID_A320D 0x03200030 - -/* - * OSC Control Register - */ -#define FTPMU010_OSCC_OSCH_TRI (1 << 11) -#define FTPMU010_OSCC_OSCH_STABLE (1 << 9) -#define FTPMU010_OSCC_OSCH_OFF (1 << 8) - -#define FTPMU010_OSCC_OSCL_TRI (1 << 3) -#define FTPMU010_OSCC_OSCL_RTCLSEL (1 << 2) -#define FTPMU010_OSCC_OSCL_STABLE (1 << 1) -#define FTPMU010_OSCC_OSCL_OFF (1 << 0) - -/* - * Power Mode Register - */ -#define FTPMU010_PMODE_DIVAHBCLK_MASK (0x7 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_2 (0x0 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_3 (0x1 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_4 (0x2 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_6 (0x3 << 4) -#define FTPMU010_PMODE_DIVAHBCLK_8 (0x4 << 4) -#define FTPMU010_PMODE_DIVAHBCLK(pmode) (((pmode) >> 4) & 0x7) -#define FTPMU010_PMODE_FCS (1 << 2) -#define FTPMU010_PMODE_TURBO (1 << 1) -#define FTPMU010_PMODE_SLEEP (1 << 0) - -/* - * Power Manager Status Register - */ -#define FTPMU010_PMSR_SMR (1 << 10) - -#define FTPMU010_PMSR_RDH (1 << 2) -#define FTPMU010_PMSR_PH (1 << 1) -#define FTPMU010_PMSR_CKEHLOW (1 << 0) - -/* - * Multi-Function Port Setting Register - */ -#define FTPMU010_MFPSR_DEBUGSEL (1 << 17) -#define FTPMU010_MFPSR_DMA0PINSEL (1 << 16) -#define FTPMU010_MFPSR_DMA1PINSEL (1 << 15) -#define FTPMU010_MFPSR_MODEMPINSEL (1 << 14) -#define FTPMU010_MFPSR_AC97CLKOUTSEL (1 << 13) -#define FTPMU010_MFPSR_PWM1PINSEL (1 << 11) -#define FTPMU010_MFPSR_PWM0PINSEL (1 << 10) -#define FTPMU010_MFPSR_IRDACLKSEL (1 << 9) -#define FTPMU010_MFPSR_UARTCLKSEL (1 << 8) -#define FTPMU010_MFPSR_SSPCLKSEL (1 << 6) -#define FTPMU010_MFPSR_I2SCLKSEL (1 << 5) -#define FTPMU010_MFPSR_AC97CLKSEL (1 << 4) -#define FTPMU010_MFPSR_AC97PINSEL (1 << 3) -#define FTPMU010_MFPSR_TRIAHBDIS (1 << 1) -#define FTPMU010_MFPSR_TRIAHBDBG (1 << 0) - -/* - * PLL/DLL Control Register 0 - * Note: - * 1. FTPMU010_PDLLCR0_HCLKOUTDIS: - * Datasheet indicated it starts at bit #21 which was wrong. - * 2. FTPMU010_PDLLCR0_DLLFRAG: - * Datasheet indicated it has 2 bit which was wrong. - */ -#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) & 0xf) << 20) -#define FTPMU010_PDLLCR0_DLLFRAG(cr0) (1 << 19) -#define FTPMU010_PDLLCR0_DLLSTSEL (1 << 18) -#define FTPMU010_PDLLCR0_DLLSTABLE (1 << 17) -#define FTPMU010_PDLLCR0_DLLDIS (1 << 16) -#define FTPMU010_PDLLCR0_PLL1FRANG(cr0) (((cr0) & 0x3) << 12) -#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) & 0x1ff) << 3) -#define FTPMU010_PDLLCR0_PLL1STSEL (1 << 2) -#define FTPMU010_PDLLCR0_PLL1STABLE (1 << 1) -#define FTPMU010_PDLLCR0_PLL1DIS (1 << 0) - -/* - * SDRAM Signal Hold Time Control Register - */ -#define FTPMU010_SDRAMHTC_RCLK_DLY(x) (((x) & 0xf) << 28) -#define FTPMU010_SDRAMHTC_CTL_WCLK_DLY(x) (((x) & 0xf) << 24) -#define FTPMU010_SDRAMHTC_DAT_WCLK_DLY(x) (((x) & 0xf) << 20) -#define FTPMU010_SDRAMHTC_EBICTRL_DCSR (1 << 18) -#define FTPMU010_SDRAMHTC_EBIDATA_DCSR (1 << 17) -#define FTPMU010_SDRAMHTC_SDRAMCS_DCSR (1 << 16) -#define FTPMU010_SDRAMHTC_SDRAMCTL_DCSR (1 << 15) -#define FTPMU010_SDRAMHTC_CKE_DCSR (1 << 14) -#define FTPMU010_SDRAMHTC_DQM_DCSR (1 << 13) -#define FTPMU010_SDRAMHTC_SDCLK_DCSR (1 << 12) - -#ifndef __ASSEMBLY__ -void ftpmu010_32768osc_enable(void); -void ftpmu010_dlldis_disable(void); -void ftpmu010_mfpsr_diselect_dev(unsigned int dev); -void ftpmu010_mfpsr_select_dev(unsigned int dev); -void ftpmu010_sdram_clk_disable(unsigned int cr0); -void ftpmu010_sdramhtc_set(unsigned int val); -#endif - -#ifdef __ASSEMBLY__ -#define FTPMU010_IDNMBR0 0x00 -#define FTPMU010_reserved0 0x04 -#define FTPMU010_OSCC 0x08 -#define FTPMU010_PMODE 0x0C -#define FTPMU010_PMCR 0x10 -#define FTPMU010_PED 0x14 -#define FTPMU010_PEDSR 0x18 -#define FTPMU010_reserved1 0x1C -#define FTPMU010_PMSR 0x20 -#define FTPMU010_PGSR 0x24 -#define FTPMU010_MFPSR 0x28 -#define FTPMU010_MISC 0x2C -#define FTPMU010_PDLLCR0 0x30 -#define FTPMU010_PDLLCR1 0x34 -#define FTPMU010_AHBMCLKOFF 0x38 -#define FTPMU010_APBMCLKOFF 0x3C -#define FTPMU010_DCSRCR0 0x40 -#define FTPMU010_DCSRCR1 0x44 -#define FTPMU010_DCSRCR2 0x48 -#define FTPMU010_SDRAMHTC 0x4C -#define FTPMU010_PSPR0 0x50 -#define FTPMU010_PSPR1 0x54 -#define FTPMU010_PSPR2 0x58 -#define FTPMU010_PSPR3 0x5C -#define FTPMU010_PSPR4 0x60 -#define FTPMU010_PSPR5 0x64 -#define FTPMU010_PSPR6 0x68 -#define FTPMU010_PSPR7 0x6C -#define FTPMU010_PSPR8 0x70 -#define FTPMU010_PSPR9 0x74 -#define FTPMU010_PSPR10 0x78 -#define FTPMU010_PSPR11 0x7C -#define FTPMU010_PSPR12 0x80 -#define FTPMU010_PSPR13 0x84 -#define FTPMU010_PSPR14 0x88 -#define FTPMU010_PSPR15 0x8C -#define FTPMU010_AHBDMA_RACCS 0x90 -#define FTPMU010_reserved2 0x94 -#define FTPMU010_reserved3 0x98 -#define FTPMU010_JSS 0x9C -#define FTPMU010_CFC_RACC 0xA0 -#define FTPMU010_SSP1_RACC 0xA4 -#define FTPMU010_UART1TX_RACC 0xA8 -#define FTPMU010_UART1RX_RACC 0xAC -#define FTPMU010_UART2TX_RACC 0xB0 -#define FTPMU010_UART2RX_RACC 0xB4 -#define FTPMU010_SDC_RACC 0xB8 -#define FTPMU010_I2SAC97_RACC 0xBC -#define FTPMU010_IRDATX_RACC 0xC0 -#define FTPMU010_reserved4 0xC4 -#define FTPMU010_USBD_RACC 0xC8 -#define FTPMU010_IRDARX_RACC 0xCC -#define FTPMU010_IRDA_RACC 0xD0 -#define FTPMU010_ED0_RACC 0xD4 -#define FTPMU010_ED1_RACC 0xD8 -#endif /* __ASSEMBLY__ */ - -#endif /* __FTPMU010_H */ -- cgit v1.3.1 From 2661c2da6d929cb64f9798a8d8cc03bc86c09b4a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:19:48 -0700 Subject: mtd: Drop unused fsl_upm driver This is not used since this commit: 8d1e3cb1400 powerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS support Drop the driver and Kconfig option. Signed-off-by: Simon Glass Reviewed-By: Michael Trimarchi --- drivers/mtd/nand/raw/Makefile | 1 - drivers/mtd/nand/raw/fsl_upm.c | 187 ----------------------------------------- include/linux/mtd/fsl_upm.h | 44 ---------- 3 files changed, 232 deletions(-) delete mode 100644 drivers/mtd/nand/raw/fsl_upm.c delete mode 100644 include/linux/mtd/fsl_upm.h (limited to 'include') diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 4c59903aa8c..e8764cf358b 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -56,7 +56,6 @@ obj-$(CONFIG_NAND_DENALI) += denali.o obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o -obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c deleted file mode 100644 index 91cc1339537..00000000000 --- a/drivers/mtd/nand/raw/fsl_upm.c +++ /dev/null @@ -1,187 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * FSL UPM NAND driver - * - * Copyright (C) 2007 MontaVista Software, Inc. - * Anton Vorontsov - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset) -{ - clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset); - (void)in_be32(upm->mxmr); -} - -static void fsl_upm_end_pattern(struct fsl_upm *upm) -{ - clrbits_be32(upm->mxmr, MxMR_OP_RUNP); - - while (in_be32(upm->mxmr) & MxMR_OP_RUNP) - eieio(); -} - -static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, - void __iomem *io_addr, u32 mar) -{ - out_be32(upm->mar, mar); - (void)in_be32(upm->mar); - switch (width) { - case 8: - out_8(io_addr, 0x0); - break; - case 16: - out_be16(io_addr, 0x0); - break; - case 32: - out_be32(io_addr, 0x0); - break; - } -} - -static void fun_wait(struct fsl_upm_nand *fun) -{ - if (fun->dev_ready) { - while (!fun->dev_ready(fun->chip_nr)) - debug("unexpected busy state\n"); - } else { - /* - * If the R/B pin is not connected, - * a short delay is necessary. - */ - udelay(1); - } -} - -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 -static void fun_select_chip(struct mtd_info *mtd, int chip_nr) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - if (chip_nr >= 0) { - fun->chip_nr = chip_nr; - chip->IO_ADDR_R = chip->IO_ADDR_W = - fun->upm.io_addr + fun->chip_offset * chip_nr; - } else if (chip_nr == -1) { - chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); - } -} -#endif - -static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - void __iomem *io_addr; - u32 mar; - - if (!(ctrl & fun->last_ctrl)) { - fsl_upm_end_pattern(&fun->upm); - - if (cmd == NAND_CMD_NONE) - return; - - fun->last_ctrl = ctrl & (NAND_ALE | NAND_CLE); - } - - if (ctrl & NAND_CTRL_CHANGE) { - if (ctrl & NAND_ALE) - fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset); - else if (ctrl & NAND_CLE) - fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset); - } - - mar = cmd << (32 - fun->width); - io_addr = fun->upm.io_addr; -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 - if (fun->chip_nr > 0) { - io_addr += fun->chip_offset * fun->chip_nr; - if (fun->upm_mar_chip_offset) - mar |= fun->upm_mar_chip_offset * fun->chip_nr; - } -#endif - fsl_upm_run_pattern(&fun->upm, fun->width, io_addr, mar); - - /* - * Some boards/chips needs this. At least the MPC8360E-RDK - * needs it. Probably weird chip, because I don't see any - * need for this on MPC8555E + Samsung K9F1G08U0A. Usually - * here are 0-2 unexpected busy states per block read. - */ - if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN) - fun_wait(fun); -} - -static u8 upm_nand_read_byte(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - - return in_8(chip->IO_ADDR_R); -} - -static void upm_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) -{ - int i; - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - for (i = 0; i < len; i++) { - out_8(chip->IO_ADDR_W, buf[i]); - if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE) - fun_wait(fun); - } - - if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER) - fun_wait(fun); -} - -static void upm_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) -{ - int i; - struct nand_chip *chip = mtd_to_nand(mtd); - - for (i = 0; i < len; i++) - buf[i] = in_8(chip->IO_ADDR_R); -} - -static int nand_dev_ready(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd_to_nand(mtd); - struct fsl_upm_nand *fun = nand_get_controller_data(chip); - - return fun->dev_ready(fun->chip_nr); -} - -int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun) -{ - if (fun->width != 8 && fun->width != 16 && fun->width != 32) - return -ENOSYS; - - fun->last_ctrl = NAND_CLE; - - nand_set_controller_data(chip, fun); - chip->chip_delay = fun->chip_delay; - chip->ecc.mode = NAND_ECC_SOFT; - chip->cmd_ctrl = fun_cmd_ctrl; -#if CONFIG_SYS_NAND_MAX_CHIPS > 1 - chip->select_chip = fun_select_chip; -#endif - chip->read_byte = upm_nand_read_byte; - chip->read_buf = upm_nand_read_buf; - chip->write_buf = upm_nand_write_buf; - if (fun->dev_ready) - chip->dev_ready = nand_dev_ready; - - return 0; -} diff --git a/include/linux/mtd/fsl_upm.h b/include/linux/mtd/fsl_upm.h deleted file mode 100644 index 9999993543b..00000000000 --- a/include/linux/mtd/fsl_upm.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * FSL UPM NAND driver - * - * Copyright (C) 2007 MontaVista Software, Inc. - * Anton Vorontsov - */ - -#ifndef __LINUX_MTD_NAND_FSL_UPM -#define __LINUX_MTD_NAND_FSL_UPM - -#include - -#define FSL_UPM_WAIT_RUN_PATTERN 0x1 -#define FSL_UPM_WAIT_WRITE_BYTE 0x2 -#define FSL_UPM_WAIT_WRITE_BUFFER 0x4 - -struct fsl_upm { - void __iomem *mdr; - void __iomem *mxmr; - void __iomem *mar; - void __iomem *io_addr; -}; - -struct fsl_upm_nand { - struct fsl_upm upm; - - int width; - int upm_cmd_offset; - int upm_addr_offset; - int upm_mar_chip_offset; - int wait_flags; - int (*dev_ready)(int chip_nr); - int chip_delay; - int chip_offset; - int chip_nr; - - /* no need to fill */ - int last_ctrl; -}; - -extern int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun); - -#endif -- cgit v1.3.1 From 6a138b0be30597a2d94001b96278885702ab931d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:19:49 -0700 Subject: mtd: Drop unused fsmc_nand driver This is not used since this commit: 570c3dcfc15 arm: Remove spear600 boards and the rest of SPEAr support Drop the driver and Kconfig option. Signed-off-by: Simon Glass Reviewed-by: Michael Trimarchi --- drivers/mtd/nand/raw/Makefile | 1 - drivers/mtd/nand/raw/fsmc_nand.c | 470 --------------------------------------- include/linux/mtd/fsmc_nand.h | 84 ------- 3 files changed, 555 deletions(-) delete mode 100644 drivers/mtd/nand/raw/fsmc_nand.c delete mode 100644 include/linux/mtd/fsmc_nand.h (limited to 'include') diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index e8764cf358b..f004eb39f3b 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -56,7 +56,6 @@ obj-$(CONFIG_NAND_DENALI) += denali.o obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o -obj-$(CONFIG_NAND_FSMC) += fsmc_nand.o obj-$(CONFIG_NAND_KB9202) += kb9202_nand.o obj-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o obj-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o diff --git a/drivers/mtd/nand/raw/fsmc_nand.c b/drivers/mtd/nand/raw/fsmc_nand.c deleted file mode 100644 index d795864949c..00000000000 --- a/drivers/mtd/nand/raw/fsmc_nand.c +++ /dev/null @@ -1,470 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2010 - * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. - * - * (C) Copyright 2012 - * Amit Virdi, STMicroelectronics, amit.virdi@st.com. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static u32 fsmc_version; -static struct fsmc_regs *const fsmc_regs_p = (struct fsmc_regs *) - CONFIG_SYS_FSMC_BASE; - -/* - * ECC4 and ECC1 have 13 bytes and 3 bytes of ecc respectively for 512 bytes of - * data. ECC4 can correct up to 8 bits in 512 bytes of data while ECC1 can - * correct 1 bit in 512 bytes - */ - -static struct nand_ecclayout fsmc_ecc4_lp_layout = { - .eccbytes = 104, - .eccpos = { 2, 3, 4, 5, 6, 7, 8, - 9, 10, 11, 12, 13, 14, - 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, - 34, 35, 36, 37, 38, 39, 40, - 41, 42, 43, 44, 45, 46, - 50, 51, 52, 53, 54, 55, 56, - 57, 58, 59, 60, 61, 62, - 66, 67, 68, 69, 70, 71, 72, - 73, 74, 75, 76, 77, 78, - 82, 83, 84, 85, 86, 87, 88, - 89, 90, 91, 92, 93, 94, - 98, 99, 100, 101, 102, 103, 104, - 105, 106, 107, 108, 109, 110, - 114, 115, 116, 117, 118, 119, 120, - 121, 122, 123, 124, 125, 126 - }, - .oobfree = { - {.offset = 15, .length = 3}, - {.offset = 31, .length = 3}, - {.offset = 47, .length = 3}, - {.offset = 63, .length = 3}, - {.offset = 79, .length = 3}, - {.offset = 95, .length = 3}, - {.offset = 111, .length = 3}, - {.offset = 127, .length = 1} - } -}; - -/* - * ECC4 layout for NAND of pagesize 4096 bytes & OOBsize 224 bytes. 13*8 bytes - * of OOB size is reserved for ECC, Byte no. 0 & 1 reserved for bad block & 118 - * bytes are free for use. - */ -static struct nand_ecclayout fsmc_ecc4_224_layout = { - .eccbytes = 104, - .eccpos = { 2, 3, 4, 5, 6, 7, 8, - 9, 10, 11, 12, 13, 14, - 18, 19, 20, 21, 22, 23, 24, - 25, 26, 27, 28, 29, 30, - 34, 35, 36, 37, 38, 39, 40, - 41, 42, 43, 44, 45, 46, - 50, 51, 52, 53, 54, 55, 56, - 57, 58, 59, 60, 61, 62, - 66, 67, 68, 69, 70, 71, 72, - 73, 74, 75, 76, 77, 78, - 82, 83, 84, 85, 86, 87, 88, - 89, 90, 91, 92, 93, 94, - 98, 99, 100, 101, 102, 103, 104, - 105, 106, 107, 108, 109, 110, - 114, 115, 116, 117, 118, 119, 120, - 121, 122, 123, 124, 125, 126 - }, - .oobfree = { - {.offset = 15, .length = 3}, - {.offset = 31, .length = 3}, - {.offset = 47, .length = 3}, - {.offset = 63, .length = 3}, - {.offset = 79, .length = 3}, - {.offset = 95, .length = 3}, - {.offset = 111, .length = 3}, - {.offset = 127, .length = 97} - } -}; - -/* - * ECC placement definitions in oobfree type format - * There are 13 bytes of ecc for every 512 byte block and it has to be read - * consecutively and immediately after the 512 byte data block for hardware to - * generate the error bit offsets in 512 byte data - * Managing the ecc bytes in the following way makes it easier for software to - * read ecc bytes consecutive to data bytes. This way is similar to - * oobfree structure maintained already in u-boot nand driver - */ -static struct fsmc_eccplace fsmc_eccpl_lp = { - .eccplace = { - {.offset = 2, .length = 13}, - {.offset = 18, .length = 13}, - {.offset = 34, .length = 13}, - {.offset = 50, .length = 13}, - {.offset = 66, .length = 13}, - {.offset = 82, .length = 13}, - {.offset = 98, .length = 13}, - {.offset = 114, .length = 13} - } -}; - -static struct nand_ecclayout fsmc_ecc4_sp_layout = { - .eccbytes = 13, - .eccpos = { 0, 1, 2, 3, 6, 7, 8, - 9, 10, 11, 12, 13, 14 - }, - .oobfree = { - {.offset = 15, .length = 1}, - } -}; - -static struct fsmc_eccplace fsmc_eccpl_sp = { - .eccplace = { - {.offset = 0, .length = 4}, - {.offset = 6, .length = 9} - } -}; - -static struct nand_ecclayout fsmc_ecc1_layout = { - .eccbytes = 24, - .eccpos = {2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52, - 66, 67, 68, 82, 83, 84, 98, 99, 100, 114, 115, 116}, - .oobfree = { - {.offset = 8, .length = 8}, - {.offset = 24, .length = 8}, - {.offset = 40, .length = 8}, - {.offset = 56, .length = 8}, - {.offset = 72, .length = 8}, - {.offset = 88, .length = 8}, - {.offset = 104, .length = 8}, - {.offset = 120, .length = 8} - } -}; - -/* Count the number of 0's in buff upto a max of max_bits */ -static int count_written_bits(uint8_t *buff, int size, int max_bits) -{ - int k, written_bits = 0; - - for (k = 0; k < size; k++) { - written_bits += hweight8(~buff[k]); - if (written_bits > max_bits) - break; - } - - return written_bits; -} - -static void fsmc_nand_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl) -{ - struct nand_chip *this = mtd_to_nand(mtd); - ulong IO_ADDR_W; - - if (ctrl & NAND_CTRL_CHANGE) { - IO_ADDR_W = (ulong)this->IO_ADDR_W; - - IO_ADDR_W &= ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE); - if (ctrl & NAND_CLE) - IO_ADDR_W |= CONFIG_SYS_NAND_CLE; - if (ctrl & NAND_ALE) - IO_ADDR_W |= CONFIG_SYS_NAND_ALE; - - if (ctrl & NAND_NCE) { - writel(readl(&fsmc_regs_p->pc) | - FSMC_ENABLE, &fsmc_regs_p->pc); - } else { - writel(readl(&fsmc_regs_p->pc) & - ~FSMC_ENABLE, &fsmc_regs_p->pc); - } - this->IO_ADDR_W = (void *)IO_ADDR_W; - } - - if (cmd != NAND_CMD_NONE) - writeb(cmd, this->IO_ADDR_W); -} - -static int fsmc_bch8_correct_data(struct mtd_info *mtd, u_char *dat, - u_char *read_ecc, u_char *calc_ecc) -{ - /* The calculated ecc is actually the correction index in data */ - u32 err_idx[8]; - u32 num_err, i; - u32 ecc1, ecc2, ecc3, ecc4; - - num_err = (readl(&fsmc_regs_p->sts) >> 10) & 0xF; - - if (likely(num_err == 0)) - return 0; - - if (unlikely(num_err > 8)) { - /* - * This is a temporary erase check. A newly erased page read - * would result in an ecc error because the oob data is also - * erased to FF and the calculated ecc for an FF data is not - * FF..FF. - * This is a workaround to skip performing correction in case - * data is FF..FF - * - * Logic: - * For every page, each bit written as 0 is counted until these - * number of bits are greater than 8 (the maximum correction - * capability of FSMC for each 512 + 13 bytes) - */ - - int bits_ecc = count_written_bits(read_ecc, 13, 8); - int bits_data = count_written_bits(dat, 512, 8); - - if ((bits_ecc + bits_data) <= 8) { - if (bits_data) - memset(dat, 0xff, 512); - return bits_data + bits_ecc; - } - - return -EBADMSG; - } - - ecc1 = readl(&fsmc_regs_p->ecc1); - ecc2 = readl(&fsmc_regs_p->ecc2); - ecc3 = readl(&fsmc_regs_p->ecc3); - ecc4 = readl(&fsmc_regs_p->sts); - - err_idx[0] = (ecc1 >> 0) & 0x1FFF; - err_idx[1] = (ecc1 >> 13) & 0x1FFF; - err_idx[2] = (((ecc2 >> 0) & 0x7F) << 6) | ((ecc1 >> 26) & 0x3F); - err_idx[3] = (ecc2 >> 7) & 0x1FFF; - err_idx[4] = (((ecc3 >> 0) & 0x1) << 12) | ((ecc2 >> 20) & 0xFFF); - err_idx[5] = (ecc3 >> 1) & 0x1FFF; - err_idx[6] = (ecc3 >> 14) & 0x1FFF; - err_idx[7] = (((ecc4 >> 16) & 0xFF) << 5) | ((ecc3 >> 27) & 0x1F); - - i = 0; - while (i < num_err) { - err_idx[i] ^= 3; - - if (err_idx[i] < 512 * 8) - __change_bit(err_idx[i], dat); - - i++; - } - - return num_err; -} - -static int fsmc_read_hwecc(struct mtd_info *mtd, - const u_char *data, u_char *ecc) -{ - u_int ecc_tmp; - int timeout = CONFIG_SYS_HZ; - ulong start; - - switch (fsmc_version) { - case FSMC_VER8: - start = get_timer(0); - while (get_timer(start) < timeout) { - /* - * Busy waiting for ecc computation - * to finish for 512 bytes - */ - if (readl(&fsmc_regs_p->sts) & FSMC_CODE_RDY) - break; - } - - ecc_tmp = readl(&fsmc_regs_p->ecc1); - ecc[0] = (u_char) (ecc_tmp >> 0); - ecc[1] = (u_char) (ecc_tmp >> 8); - ecc[2] = (u_char) (ecc_tmp >> 16); - ecc[3] = (u_char) (ecc_tmp >> 24); - - ecc_tmp = readl(&fsmc_regs_p->ecc2); - ecc[4] = (u_char) (ecc_tmp >> 0); - ecc[5] = (u_char) (ecc_tmp >> 8); - ecc[6] = (u_char) (ecc_tmp >> 16); - ecc[7] = (u_char) (ecc_tmp >> 24); - - ecc_tmp = readl(&fsmc_regs_p->ecc3); - ecc[8] = (u_char) (ecc_tmp >> 0); - ecc[9] = (u_char) (ecc_tmp >> 8); - ecc[10] = (u_char) (ecc_tmp >> 16); - ecc[11] = (u_char) (ecc_tmp >> 24); - - ecc_tmp = readl(&fsmc_regs_p->sts); - ecc[12] = (u_char) (ecc_tmp >> 16); - break; - - default: - ecc_tmp = readl(&fsmc_regs_p->ecc1); - ecc[0] = (u_char) (ecc_tmp >> 0); - ecc[1] = (u_char) (ecc_tmp >> 8); - ecc[2] = (u_char) (ecc_tmp >> 16); - break; - } - - return 0; -} - -void fsmc_enable_hwecc(struct mtd_info *mtd, int mode) -{ - writel(readl(&fsmc_regs_p->pc) & ~FSMC_ECCPLEN_256, - &fsmc_regs_p->pc); - writel(readl(&fsmc_regs_p->pc) & ~FSMC_ECCEN, - &fsmc_regs_p->pc); - writel(readl(&fsmc_regs_p->pc) | FSMC_ECCEN, - &fsmc_regs_p->pc); -} - -/* - * fsmc_read_page_hwecc - * @mtd: mtd info structure - * @chip: nand chip info structure - * @buf: buffer to store read data - * @oob_required: caller expects OOB data read to chip->oob_poi - * @page: page number to read - * - * This routine is needed for fsmc verison 8 as reading from NAND chip has to be - * performed in a strict sequence as follows: - * data(512 byte) -> ecc(13 byte) - * After this read, fsmc hardware generates and reports error data bits(upto a - * max of 8 bits) - */ -static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, - uint8_t *buf, int oob_required, int page) -{ - struct fsmc_eccplace *fsmc_eccpl; - int i, j, s, stat, eccsize = chip->ecc.size; - int eccbytes = chip->ecc.bytes; - int eccsteps = chip->ecc.steps; - uint8_t *p = buf; - uint8_t *ecc_calc = chip->buffers->ecccalc; - uint8_t *ecc_code = chip->buffers->ecccode; - int off, len, group = 0; - uint8_t oob[13] __attribute__ ((aligned (2))); - - /* Differentiate between small and large page ecc place definitions */ - if (mtd->writesize == 512) - fsmc_eccpl = &fsmc_eccpl_sp; - else - fsmc_eccpl = &fsmc_eccpl_lp; - - for (i = 0, s = 0; s < eccsteps; s++, i += eccbytes, p += eccsize) { - - chip->cmdfunc(mtd, NAND_CMD_READ0, s * eccsize, page); - chip->ecc.hwctl(mtd, NAND_ECC_READ); - chip->read_buf(mtd, p, eccsize); - - for (j = 0; j < eccbytes;) { - off = fsmc_eccpl->eccplace[group].offset; - len = fsmc_eccpl->eccplace[group].length; - group++; - - /* - * length is intentionally kept a higher multiple of 2 - * to read at least 13 bytes even in case of 16 bit NAND - * devices - */ - if (chip->options & NAND_BUSWIDTH_16) - len = roundup(len, 2); - chip->cmdfunc(mtd, NAND_CMD_READOOB, off, page); - chip->read_buf(mtd, oob + j, len); - j += len; - } - - memcpy(&ecc_code[i], oob, 13); - chip->ecc.calculate(mtd, p, &ecc_calc[i]); - - stat = chip->ecc.correct(mtd, p, &ecc_code[i], - &ecc_calc[i]); - if (stat < 0) - mtd->ecc_stats.failed++; - else - mtd->ecc_stats.corrected += stat; - } - - return 0; -} - -int fsmc_nand_init(struct nand_chip *nand) -{ - static int chip_nr; - struct mtd_info *mtd; - u32 peripid2 = readl(&fsmc_regs_p->peripid2); - - fsmc_version = (peripid2 >> FSMC_REVISION_SHFT) & - FSMC_REVISION_MSK; - - writel(readl(&fsmc_regs_p->ctrl) | FSMC_WP, &fsmc_regs_p->ctrl); - -#if defined(CONFIG_SYS_FSMC_NAND_16BIT) - writel(FSMC_DEVWID_16 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON, - &fsmc_regs_p->pc); -#elif defined(CONFIG_SYS_FSMC_NAND_8BIT) - writel(FSMC_DEVWID_8 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON, - &fsmc_regs_p->pc); -#else -#error Please define CONFIG_SYS_FSMC_NAND_16BIT or CONFIG_SYS_FSMC_NAND_8BIT -#endif - writel(readl(&fsmc_regs_p->pc) | FSMC_TCLR_1 | FSMC_TAR_1, - &fsmc_regs_p->pc); - writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, - &fsmc_regs_p->comm); - writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, - &fsmc_regs_p->attrib); - - nand->options = 0; -#if defined(CONFIG_SYS_FSMC_NAND_16BIT) - nand->options |= NAND_BUSWIDTH_16; -#endif - nand->ecc.mode = NAND_ECC_HW; - nand->ecc.size = 512; - nand->ecc.calculate = fsmc_read_hwecc; - nand->ecc.hwctl = fsmc_enable_hwecc; - nand->cmd_ctrl = fsmc_nand_hwcontrol; - nand->IO_ADDR_R = nand->IO_ADDR_W = - (void __iomem *)CFG_SYS_NAND_BASE; - nand->badblockbits = 7; - - mtd = nand_to_mtd(nand); - - switch (fsmc_version) { - case FSMC_VER8: - nand->ecc.bytes = 13; - nand->ecc.strength = 8; - nand->ecc.correct = fsmc_bch8_correct_data; - nand->ecc.read_page = fsmc_read_page_hwecc; - if (mtd->writesize == 512) - nand->ecc.layout = &fsmc_ecc4_sp_layout; - else { - if (mtd->oobsize == 224) - nand->ecc.layout = &fsmc_ecc4_224_layout; - else - nand->ecc.layout = &fsmc_ecc4_lp_layout; - } - - break; - default: - nand->ecc.bytes = 3; - nand->ecc.strength = 1; - nand->ecc.layout = &fsmc_ecc1_layout; - nand->ecc.correct = nand_correct_data; - break; - } - - /* Detect NAND chips */ - if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) - return -ENXIO; - - if (nand_scan_tail(mtd)) - return -ENXIO; - - if (nand_register(chip_nr++, mtd)) - return -ENXIO; - - return 0; -} diff --git a/include/linux/mtd/fsmc_nand.h b/include/linux/mtd/fsmc_nand.h deleted file mode 100644 index 1d8a067f17e..00000000000 --- a/include/linux/mtd/fsmc_nand.h +++ /dev/null @@ -1,84 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010 - * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com. - */ - -#ifndef __FSMC_NAND_H__ -#define __FSMC_NAND_H__ - -#include - -struct fsmc_regs { - u32 ctrl; /* 0x00 */ - u8 reserved_1[0x40 - 0x04]; - u32 pc; /* 0x40 */ - u32 sts; /* 0x44 */ - u32 comm; /* 0x48 */ - u32 attrib; /* 0x4c */ - u32 ioata; /* 0x50 */ - u32 ecc1; /* 0x54 */ - u32 ecc2; /* 0x58 */ - u32 ecc3; /* 0x5c */ - u8 reserved_2[0xfe0 - 0x60]; - u32 peripid0; /* 0xfe0 */ - u32 peripid1; /* 0xfe4 */ - u32 peripid2; /* 0xfe8 */ - u32 peripid3; /* 0xfec */ - u32 pcellid0; /* 0xff0 */ - u32 pcellid1; /* 0xff4 */ - u32 pcellid2; /* 0xff8 */ - u32 pcellid3; /* 0xffc */ -}; - -/* ctrl register definitions */ -#define FSMC_WP (1 << 7) - -/* pc register definitions */ -#define FSMC_RESET (1 << 0) -#define FSMC_WAITON (1 << 1) -#define FSMC_ENABLE (1 << 2) -#define FSMC_DEVTYPE_NAND (1 << 3) -#define FSMC_DEVWID_8 (0 << 4) -#define FSMC_DEVWID_16 (1 << 4) -#define FSMC_ECCEN (1 << 6) -#define FSMC_ECCPLEN_512 (0 << 7) -#define FSMC_ECCPLEN_256 (1 << 7) -#define FSMC_TCLR_1 (1 << 9) -#define FSMC_TAR_1 (1 << 13) - -/* sts register definitions */ -#define FSMC_CODE_RDY (1 << 15) - -/* comm register definitions */ -#define FSMC_TSET_0 (0 << 0) -#define FSMC_TWAIT_6 (6 << 8) -#define FSMC_THOLD_4 (4 << 16) -#define FSMC_THIZ_1 (1 << 24) - -/* peripid2 register definitions */ -#define FSMC_REVISION_MSK (0xf) -#define FSMC_REVISION_SHFT (0x4) - -#define FSMC_VER8 0x8 - -/* - * There are 13 bytes of ecc for every 512 byte block and it has to be read - * consecutively and immediately after the 512 byte data block for hardware to - * generate the error bit offsets - * Managing the ecc bytes in the following way is easier. This way is similar to - * oobfree structure maintained already in u-boot nand driver - */ -#define FSMC_MAX_ECCPLACE_ENTRIES 32 - -struct fsmc_nand_eccplace { - u32 offset; - u32 length; -}; - -struct fsmc_eccplace { - struct fsmc_nand_eccplace eccplace[FSMC_MAX_ECCPLACE_ENTRIES]; -}; - -extern int fsmc_nand_init(struct nand_chip *nand); -#endif -- cgit v1.3.1 From 408296aad9d662cfb6d3248fc532ce16477fc713 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:19:56 -0700 Subject: gpio: Drop unused pca9698 driver This is not used. Drop the driver and Kconfig option. Signed-off-by: Simon Glass --- arch/mips/mach-octeon/octeon_fdt.c | 43 +------------ board/gdsys/a38x/hre.c | 1 - drivers/gpio/Makefile | 1 - drivers/gpio/pca9698.c | 127 ------------------------------------- include/pca9698.h | 17 ----- 5 files changed, 1 insertion(+), 188 deletions(-) delete mode 100644 drivers/gpio/pca9698.c delete mode 100644 include/pca9698.h (limited to 'include') diff --git a/arch/mips/mach-octeon/octeon_fdt.c b/arch/mips/mach-octeon/octeon_fdt.c index 0ccfe149dcc..c74fe9d9fb8 100644 --- a/arch/mips/mach-octeon/octeon_fdt.c +++ b/arch/mips/mach-octeon/octeon_fdt.c @@ -30,9 +30,6 @@ #ifdef CONFIG_PCF857X #include #endif -#ifdef CONFIG_PCA9698 -#include -#endif #ifdef CONFIG_PCA9554 #include #endif @@ -59,13 +56,6 @@ static const char * const pca9555_gpio_list[] = { }; #endif -#ifdef CONFIG_PCA9698 -/** List of compatible strings supported by pca9698 driver */ -static const char * const pca9698_gpio_list[] = { - "nxp,pca9505", "pca9505", "nxp,pca9698", "pca9698", NULL, -}; -#endif - #ifdef CONFIG_PCA953X /** List of compatible strings supported by pca953x driver */ static const char * const pca953x_gpio_list[] = { @@ -807,19 +797,6 @@ int octeon_fdt_read_gpio(const void *fdt, int phandle, int pin) } value = (value >> pin) & 1; break; -#endif -#ifdef CONFIG_PCA9698 - case CVMX_GPIO_PIN_PCA9698: - node = fdt_node_offset_by_phandle(fdt, phandle); - if (octeon_fdt_get_i2c_bus_addr(fdt, node, &bus, &addr)) { - printf("%s: Could not get gpio bus and/or address\n", __func__); - return -1; - } - old_bus = i2c_get_bus_num(); - i2c_set_bus_num(bus); - value = pca9698_get_value(addr, pin); - i2c_set_bus_num(old_bus); - break; #endif case CVMX_GPIO_PIN_OCTEON: value = gpio_get_value(pin); @@ -880,18 +857,6 @@ int octeon_fdt_set_gpio(const void *fdt, int phandle, int pin, int val) return -1; } return pcf957x_set_val(bus, addr, 1 << pin, val << pin); -#endif -#ifdef CONFIG_PCA9698 - case CVMX_GPIO_PIN_PCA9698: - if (octeon_fdt_get_i2c_bus_addr(fdt, node, &bus, &addr)) { - printf("%s: Could not get gpio bus and/or address\n", __func__); - return -1; - } - old_bus = i2c_get_bus_num(); - i2c_set_bus_num(bus); - rc = pca9698_set_value(addr, pin, val); - i2c_set_bus_num(old_bus); - return rc; #endif case CVMX_GPIO_PIN_OCTEON: return gpio_set_value(pin, val); @@ -951,13 +916,7 @@ int octeon_fdt_get_gpio_info(int fdt_node, enum octeon_gpio_type *type, *type = GPIO_TYPE_PCA953X; } #endif -#ifdef CONFIG_PCA9698 - if (!octeon_fdt_node_check_compatible(fdt, fdt_node, pca9698_gpio_list)) { - debug("%s: Found PCA9698 compatible GPIO", __func__); - *type = GPIO_TYPE_PCA9698; - } -#endif -#if defined(CONFIG_PCA953X) || defined(CONFIG_PCA9698) || \ +#if defined(CONFIG_PCA953X) || \ defined(CONFIG_PCA9555) || defined(CONFIG_PCA9554) if (!i2c_addr || !i2c_bus) { printf("%s: Error: i2c_addr or i2c_bus is NULL\n", __func__); diff --git a/board/gdsys/a38x/hre.c b/board/gdsys/a38x/hre.c index 2f16a4d3e11..d16233ed78e 100644 --- a/board/gdsys/a38x/hre.c +++ b/board/gdsys/a38x/hre.c @@ -15,7 +15,6 @@ #include #include #include -#include #include "hre.h" diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 889a88dc885..fcd136367ac 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -28,7 +28,6 @@ obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o obj-$(CONFIG_MXS_GPIO) += mxs_gpio.o obj-$(CONFIG_NPCM_GPIO) += npcm_gpio.o obj-$(CONFIG_PCA953X) += pca953x.o -obj-$(CONFIG_PCA9698) += pca9698.o obj-$(CONFIG_ROCKCHIP_GPIO) += rk_gpio.o obj-$(CONFIG_RCAR_GPIO) += gpio-rcar.o obj-$(CONFIG_RZA1_GPIO) += gpio-rza1.o diff --git a/drivers/gpio/pca9698.c b/drivers/gpio/pca9698.c deleted file mode 100644 index 11274c78101..00000000000 --- a/drivers/gpio/pca9698.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2011 - * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc - */ - -/* - * Driver for NXP's pca9698 40 bit I2C gpio expander - */ - -#include -#include -#include -#include -#include - -/* - * The pca9698 registers - */ - -#define PCA9698_REG_INPUT 0x00 -#define PCA9698_REG_OUTPUT 0x08 -#define PCA9698_REG_POLARITY 0x10 -#define PCA9698_REG_CONFIG 0x18 - -#define PCA9698_BUFFER_SIZE 5 -#define PCA9698_GPIO_COUNT 40 - -static int pca9698_read40(u8 addr, u8 offset, u8 *buffer) -{ - u8 command = offset | 0x80; /* autoincrement */ - - return i2c_read(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); -} - -static int pca9698_write40(u8 addr, u8 offset, u8 *buffer) -{ - u8 command = offset | 0x80; /* autoincrement */ - - return i2c_write(addr, command, 1, buffer, PCA9698_BUFFER_SIZE); -} - -static void pca9698_set_bit(unsigned gpio, u8 *buffer, unsigned value) -{ - unsigned byte = gpio / 8; - unsigned bit = gpio % 8; - - if (value) - buffer[byte] |= (1 << bit); - else - buffer[byte] &= ~(1 << bit); -} - -int pca9698_request(unsigned gpio, const char *label) -{ - if (gpio >= PCA9698_GPIO_COUNT) - return -EINVAL; - - return 0; -} - -void pca9698_free(unsigned gpio) -{ -} - -int pca9698_direction_input(u8 addr, unsigned gpio) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, 1); - - return pca9698_write40(addr, PCA9698_REG_CONFIG, data); -} - -int pca9698_direction_output(u8 addr, unsigned gpio, int value) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_set_value(addr, gpio, value); - if (res) - return res; - - res = pca9698_read40(addr, PCA9698_REG_CONFIG, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, 0); - - return pca9698_write40(addr, PCA9698_REG_CONFIG, data); -} - -int pca9698_get_value(u8 addr, unsigned gpio) -{ - unsigned config_byte = gpio / 8; - unsigned config_bit = gpio % 8; - unsigned value; - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_INPUT, data); - if (res) - return -1; - - value = data[config_byte] & (1 << config_bit); - - return !!value; -} - -int pca9698_set_value(u8 addr, unsigned gpio, int value) -{ - u8 data[PCA9698_BUFFER_SIZE]; - int res; - - res = pca9698_read40(addr, PCA9698_REG_OUTPUT, data); - if (res) - return res; - - pca9698_set_bit(gpio, data, value); - - return pca9698_write40(addr, PCA9698_REG_OUTPUT, data); -} diff --git a/include/pca9698.h b/include/pca9698.h deleted file mode 100644 index 48a5f756e28..00000000000 --- a/include/pca9698.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2011 - * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc - */ - -#ifndef __PCA9698_H_ -#define __PCA9698_H_ - -int pca9698_request(unsigned gpio, const char *label); -void pca9698_free(unsigned gpio); -int pca9698_direction_input(u8 addr, unsigned gpio); -int pca9698_direction_output(u8 addr, unsigned gpio, int value); -int pca9698_get_value(u8 addr, unsigned gpio); -int pca9698_set_value(u8 addr, unsigned gpio, int value); - -#endif /* __PCA9698_H_ */ -- cgit v1.3.1 From 5f1aa5cc8aa78c2cf2bf1a2223f8fd0c6bddd25f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:19:59 -0700 Subject: power: Drop unused fg_max17042 driver and fuel gauge code This driver is not used. Drop it and the entire fuel_gauge directory, since there is nothing left. Signed-off-by: Simon Glass --- drivers/power/Makefile | 1 - drivers/power/fuel_gauge/Makefile | 6 - drivers/power/fuel_gauge/fg_max17042.c | 287 --------------------------------- include/power/fg_battery_cell_params.h | 73 --------- 4 files changed, 367 deletions(-) delete mode 100644 drivers/power/fuel_gauge/Makefile delete mode 100644 drivers/power/fuel_gauge/fg_max17042.c delete mode 100644 include/power/fg_battery_cell_params.h (limited to 'include') diff --git a/drivers/power/Makefile b/drivers/power/Makefile index efdae3655ac..93003e97e01 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -5,7 +5,6 @@ obj-$(CONFIG_$(SPL_TPL_)ACPI_PMC) += acpi_pmc/ obj-$(CONFIG_$(SPL_TPL_)POWER_DOMAIN) += domain/ -obj-y += fuel_gauge/ obj-y += mfd/ obj-y += pmic/ obj-y += regulator/ diff --git a/drivers/power/fuel_gauge/Makefile b/drivers/power/fuel_gauge/Makefile deleted file mode 100644 index ca2df947585..00000000000 --- a/drivers/power/fuel_gauge/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2012 Samsung Electronics -# Lukasz Majewski - -obj-$(CONFIG_POWER_FG_MAX17042) += fg_max17042.o diff --git a/drivers/power/fuel_gauge/fg_max17042.c b/drivers/power/fuel_gauge/fg_max17042.c deleted file mode 100644 index a395d587a86..00000000000 --- a/drivers/power/fuel_gauge/fg_max17042.c +++ /dev/null @@ -1,287 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static int fg_write_regs(struct pmic *p, u8 addr, u16 *data, int num) -{ - int ret = 0; - int i; - - for (i = 0; i < num; i++, addr++) { - ret = pmic_reg_write(p, addr, *(data + i)); - if (ret) - return ret; - } - - return 0; -} - -static int fg_read_regs(struct pmic *p, u8 addr, u16 *data, int num) -{ - unsigned int dat; - int ret = 0; - int i; - - for (i = 0; i < num; i++, addr++) { - ret = pmic_reg_read(p, addr, &dat); - if (ret) - return ret; - - *(data + i) = (u16)dat; - } - - return 0; -} - -static int fg_write_and_verify(struct pmic *p, u8 addr, u16 data) -{ - unsigned int val = data; - int ret = 0; - - ret |= pmic_reg_write(p, addr, val); - ret |= pmic_reg_read(p, addr, &val); - - if (ret) - return ret; - - if (((u16) val) == data) - return 0; - - return -1; -} - -static void por_fuelgauge_init(struct pmic *p) -{ - u16 r_data0[16], r_data1[16], r_data2[16]; - u32 rewrite_count = 5; - u32 check_count; - u32 lock_count; - u32 i = 0; - u32 val; - s32 ret = 0; - char *status_msg; - - /* Delay 500 ms */ - mdelay(500); - /* Initilize Configuration */ - pmic_reg_write(p, MAX17042_CONFIG, 0x2310); - -rewrite_model: - check_count = 5; - lock_count = 5; - - if (!rewrite_count--) { - status_msg = "init failed!"; - goto error; - } - - /* Unlock Model Access */ - pmic_reg_write(p, MAX17042_MLOCKReg1, MODEL_UNLOCK1); - pmic_reg_write(p, MAX17042_MLOCKReg2, MODEL_UNLOCK2); - - /* Write/Read/Verify the Custom Model */ - ret = fg_write_regs(p, MAX17042_MODEL1, cell_character0, - ARRAY_SIZE(cell_character0)); - if (ret) - goto rewrite_model; - - ret = fg_write_regs(p, MAX17042_MODEL2, cell_character1, - ARRAY_SIZE(cell_character1)); - if (ret) - goto rewrite_model; - - ret = fg_write_regs(p, MAX17042_MODEL3, cell_character2, - ARRAY_SIZE(cell_character2)); - if (ret) - goto rewrite_model; - -check_model: - if (!check_count--) { - if (rewrite_count) - goto rewrite_model; - else - status_msg = "check failed!"; - - goto error; - } - - ret = fg_read_regs(p, MAX17042_MODEL1, r_data0, ARRAY_SIZE(r_data0)); - if (ret) - goto check_model; - - ret = fg_read_regs(p, MAX17042_MODEL2, r_data1, ARRAY_SIZE(r_data1)); - if (ret) - goto check_model; - - ret = fg_read_regs(p, MAX17042_MODEL3, r_data2, ARRAY_SIZE(r_data2)); - if (ret) - goto check_model; - - for (i = 0; i < 16; i++) { - if ((cell_character0[i] != r_data0[i]) - || (cell_character1[i] != r_data1[i]) - || (cell_character2[i] != r_data2[i])) - goto rewrite_model; - } - -lock_model: - if (!lock_count--) { - if (rewrite_count) - goto rewrite_model; - else - status_msg = "lock failed!"; - - goto error; - } - - /* Lock model access */ - pmic_reg_write(p, MAX17042_MLOCKReg1, MODEL_LOCK1); - pmic_reg_write(p, MAX17042_MLOCKReg2, MODEL_LOCK2); - - /* Verify the model access is locked */ - ret = fg_read_regs(p, MAX17042_MODEL1, r_data0, ARRAY_SIZE(r_data0)); - if (ret) - goto lock_model; - - ret = fg_read_regs(p, MAX17042_MODEL2, r_data1, ARRAY_SIZE(r_data1)); - if (ret) - goto lock_model; - - ret = fg_read_regs(p, MAX17042_MODEL3, r_data2, ARRAY_SIZE(r_data2)); - if (ret) - goto lock_model; - - for (i = 0; i < ARRAY_SIZE(r_data0); i++) { - /* Check if model locked */ - if (r_data0[i] || r_data1[i] || r_data2[i]) - goto lock_model; - } - - /* Write Custom Parameters */ - fg_write_and_verify(p, MAX17042_RCOMP0, RCOMP0); - fg_write_and_verify(p, MAX17042_TEMPCO, TempCo); - - /* Delay at least 350mS */ - mdelay(350); - - /* Initialization Complete */ - pmic_reg_read(p, MAX17042_STATUS, &val); - /* Write and Verify Status with POR bit Cleared */ - fg_write_and_verify(p, MAX17042_STATUS, val & ~MAX17042_POR); - - /* Delay at least 350 ms */ - mdelay(350); - - status_msg = "OK!"; -error: - debug("%s: model init status: %s\n", p->name, status_msg); - return; -} - -static int power_update_battery(struct pmic *p, struct pmic *bat) -{ - struct power_battery *pb = bat->pbat; - unsigned int val; - int ret = 0; - - if (pmic_probe(p)) { - puts("Can't find max17042 fuel gauge\n"); - return -ENODEV; - } - - ret |= pmic_reg_read(p, MAX17042_VFSOC, &val); - pb->bat->state_of_chrg = (val >> 8); - - pmic_reg_read(p, MAX17042_VCELL, &val); - debug("vfsoc: 0x%x\n", val); - pb->bat->voltage_uV = ((val & 0xFFUL) >> 3) + ((val & 0xFF00) >> 3); - pb->bat->voltage_uV = (pb->bat->voltage_uV * 625); - - pmic_reg_read(p, 0x05, &val); - pb->bat->capacity = val >> 2; - - return ret; -} - -static int power_check_battery(struct pmic *p, struct pmic *bat) -{ - struct power_battery *pb = bat->pbat; - unsigned int val; - int ret = 0; - - if (pmic_probe(p)) { - puts("Can't find max17042 fuel gauge\n"); - return -ENODEV; - } - - ret |= pmic_reg_read(p, MAX17042_STATUS, &val); - debug("fg status: 0x%x\n", val); - - if (val & MAX17042_POR) - por_fuelgauge_init(p); - - ret |= pmic_reg_read(p, MAX17042_VERSION, &val); - pb->bat->version = val; - - power_update_battery(p, bat); - debug("fg ver: 0x%x\n", pb->bat->version); - printf("BAT: state_of_charge(SOC):%d%%\n", - pb->bat->state_of_chrg); - - printf(" voltage: %d.%6.6d [V] (expected to be %d [mAh])\n", - pb->bat->voltage_uV / 1000000, - pb->bat->voltage_uV % 1000000, - pb->bat->capacity); - - if (pb->bat->voltage_uV > 3850000) - pb->bat->state = EXT_SOURCE; - else if (pb->bat->voltage_uV < 3600000 || pb->bat->state_of_chrg < 5) - pb->bat->state = CHARGE; - else - pb->bat->state = NORMAL; - - return ret; -} - -static struct power_fg power_fg_ops = { - .fg_battery_check = power_check_battery, - .fg_battery_update = power_update_battery, -}; - -int power_fg_init(unsigned char bus) -{ - static const char name[] = "MAX17042_FG"; - struct pmic *p = pmic_alloc(); - - if (!p) { - printf("%s: POWER allocation error!\n", __func__); - return -ENOMEM; - } - - debug("Board Fuel Gauge init\n"); - - p->name = name; - p->interface = PMIC_I2C; - p->number_of_regs = FG_NUM_OF_REGS; - p->hw.i2c.addr = MAX17042_I2C_ADDR; - p->hw.i2c.tx_num = 2; - p->sensor_byte_order = PMIC_SENSOR_BYTE_ORDER_BIG; - p->bus = bus; - - p->fg = &power_fg_ops; - return 0; -} diff --git a/include/power/fg_battery_cell_params.h b/include/power/fg_battery_cell_params.h deleted file mode 100644 index 500c8ea7174..00000000000 --- a/include/power/fg_battery_cell_params.h +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2012 Samsung Electronics - * Lukasz Majewski - */ - -#ifndef __FG_BATTERY_CELL_PARAMS_H_ -#define __FG_BATTERY_CELL_PARAMS_H_ - -#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TARGET_TRATS) - -/* Cell characteristics - Exynos4 TRATS development board */ -/* Shall be written to addr 0x80h */ -u16 cell_character0[16] = { - 0xA2A0, - 0xB6E0, - 0xB850, - 0xBAD0, - 0xBB20, - 0xBB70, - 0xBBC0, - 0xBC20, - 0xBC80, - 0xBCE0, - 0xBD80, - 0xBE20, - 0xC090, - 0xC420, - 0xC910, - 0xD070 -}; - -/* Shall be written to addr 0x90h */ -u16 cell_character1[16] = { - 0x0090, - 0x1A50, - 0x02F0, - 0x2060, - 0x2060, - 0x2E60, - 0x26A0, - 0x2DB0, - 0x2DB0, - 0x1870, - 0x2A20, - 0x16F0, - 0x08F0, - 0x0D40, - 0x08C0, - 0x08C0 -}; - -/* Shall be written to addr 0xA0h */ -u16 cell_character2[16] = { - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100, - 0x0100 -}; -#endif -#endif /* __FG_BATTERY_CELL_PARAMS_H_ */ -- cgit v1.3.1 From bf448073ea49877ec64763eb491da429f64eee26 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:20:06 -0700 Subject: mtd: Drop unused scf0403_lcd driver This is not used since this commit: 76386d6195a arm: Remove cm_t35 board Drop the driver and Kconfig option. Signed-off-by: Simon Glass --- drivers/video/Makefile | 1 - drivers/video/scf0403_lcd.c | 297 -------------------------------------------- include/scf0403_lcd.h | 10 -- 3 files changed, 308 deletions(-) delete mode 100644 drivers/video/scf0403_lcd.c delete mode 100644 include/scf0403_lcd.h (limited to 'include') diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 1bbf52a1f6a..cdb7d9a54d4 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -36,7 +36,6 @@ obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o obj-$(CONFIG_NXP_TDA19988) += tda19988.o obj-$(CONFIG_OSD) += video_osd-uclass.o obj-$(CONFIG_SANDBOX_OSD) += sandbox_osd.o -obj-$(CONFIG_SCF0403_LCD) += scf0403_lcd.o obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o diff --git a/drivers/video/scf0403_lcd.c b/drivers/video/scf0403_lcd.c deleted file mode 100644 index 54f0f88b4c9..00000000000 --- a/drivers/video/scf0403_lcd.c +++ /dev/null @@ -1,297 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * scf0403.c -- support for DataImage SCF0403 LCD - * - * Copyright (c) 2013 Adapted from Linux driver: - * Copyright (c) 2012 Anders Electronics plc. All Rights Reserved. - * Copyright (c) 2012 CompuLab, Ltd - * Dmitry Lifshitz - * Ilya Ledvich - * Inspired by Alberto Panizzo & - * Marek Vasut work in l4f00242t03.c - * - * U-Boot port: Nikita Kiryanov - */ - -#include -#include -#include -#include -#include - -struct scf0403_cmd { - u16 cmd; - u16 *params; - int count; -}; - -struct scf0403_initseq_entry { - struct scf0403_cmd cmd; - int delay_ms; -}; - -struct scf0403_priv { - struct spi_slave *spi; - unsigned int reset_gpio; - u32 rddid; - struct scf0403_initseq_entry *init_seq; - int seq_size; -}; - -struct scf0403_priv priv; - -#define SCF0403852GGU04_ID 0x000080 - -/* SCF0403526GGU20 model commands parameters */ -static u16 extcmd_params_sn20[] = {0xff, 0x98, 0x06}; -static u16 spiinttype_params_sn20[] = {0x60}; -static u16 bc_params_sn20[] = { - 0x01, 0x10, 0x61, 0x74, 0x01, 0x01, 0x1B, - 0x12, 0x71, 0x00, 0x00, 0x00, 0x01, 0x01, - 0x05, 0x00, 0xFF, 0xF2, 0x01, 0x00, 0x40, -}; -static u16 bd_params_sn20[] = {0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67}; -static u16 be_params_sn20[] = { - 0x01, 0x22, 0x22, 0xBA, 0xDC, 0x26, 0x28, 0x22, 0x22, -}; -static u16 vcom_params_sn20[] = {0x74}; -static u16 vmesur_params_sn20[] = {0x7F, 0x0F, 0x00}; -static u16 powerctl_params_sn20[] = {0x03, 0x0b, 0x00}; -static u16 lvglvolt_params_sn20[] = {0x08}; -static u16 engsetting_params_sn20[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x20}; -static u16 dispfunc_params_sn20[] = {0xa0}; -static u16 dvddvolt_params_sn20[] = {0x74}; -static u16 dispinv_params_sn20[] = {0x00, 0x00, 0x00}; -static u16 panelres_params_sn20[] = {0x82}; -static u16 framerate_params_sn20[] = {0x00, 0x13, 0x13}; -static u16 timing_params_sn20[] = {0x80, 0x05, 0x40, 0x28}; -static u16 powerctl2_params_sn20[] = {0x17, 0x75, 0x79, 0x20}; -static u16 memaccess_params_sn20[] = {0x00}; -static u16 pixfmt_params_sn20[] = {0x66}; -static u16 pgamma_params_sn20[] = { - 0x00, 0x03, 0x0b, 0x0c, 0x0e, 0x08, 0xc5, 0x04, - 0x08, 0x0c, 0x13, 0x11, 0x11, 0x14, 0x0c, 0x10, -}; -static u16 ngamma_params_sn20[] = { - 0x00, 0x0d, 0x11, 0x0c, 0x0c, 0x04, 0x76, 0x03, - 0x08, 0x0b, 0x16, 0x10, 0x0d, 0x16, 0x0a, 0x00, -}; -static u16 tearing_params_sn20[] = {0x00}; - -/* SCF0403852GGU04 model commands parameters */ -static u16 memaccess_params_sn04[] = {0x08}; -static u16 pixfmt_params_sn04[] = {0x66}; -static u16 modectl_params_sn04[] = {0x01}; -static u16 dispfunc_params_sn04[] = {0x22, 0xe2, 0xFF, 0x04}; -static u16 vcom_params_sn04[] = {0x00, 0x6A}; -static u16 pgamma_params_sn04[] = { - 0x00, 0x07, 0x0d, 0x10, 0x13, 0x19, 0x0f, 0x0c, - 0x05, 0x08, 0x06, 0x13, 0x0f, 0x30, 0x20, 0x1f, -}; -static u16 ngamma_params_sn04[] = { - 0x1F, 0x20, 0x30, 0x0F, 0x13, 0x06, 0x08, 0x05, - 0x0C, 0x0F, 0x19, 0x13, 0x10, 0x0D, 0x07, 0x00, -}; -static u16 dispinv_params_sn04[] = {0x02}; - -/* Common commands */ -static struct scf0403_cmd scf0403_cmd_slpout = {0x11, NULL, 0}; -static struct scf0403_cmd scf0403_cmd_dison = {0x29, NULL, 0}; - -/* SCF0403852GGU04 init sequence */ -static struct scf0403_initseq_entry scf0403_initseq_sn04[] = { - {{0x36, memaccess_params_sn04, ARRAY_SIZE(memaccess_params_sn04)}, 0}, - {{0x3A, pixfmt_params_sn04, ARRAY_SIZE(pixfmt_params_sn04)}, 0}, - {{0xB6, dispfunc_params_sn04, ARRAY_SIZE(dispfunc_params_sn04)}, 0}, - {{0xC5, vcom_params_sn04, ARRAY_SIZE(vcom_params_sn04)}, 0}, - {{0xE0, pgamma_params_sn04, ARRAY_SIZE(pgamma_params_sn04)}, 0}, - {{0xE1, ngamma_params_sn04, ARRAY_SIZE(ngamma_params_sn04)}, 20}, - {{0xB0, modectl_params_sn04, ARRAY_SIZE(modectl_params_sn04)}, 0}, - {{0xB4, dispinv_params_sn04, ARRAY_SIZE(dispinv_params_sn04)}, 100}, -}; - -/* SCF0403526GGU20 init sequence */ -static struct scf0403_initseq_entry scf0403_initseq_sn20[] = { - {{0xff, extcmd_params_sn20, ARRAY_SIZE(extcmd_params_sn20)}, 0}, - {{0xba, spiinttype_params_sn20, ARRAY_SIZE(spiinttype_params_sn20)}, 0}, - {{0xbc, bc_params_sn20, ARRAY_SIZE(bc_params_sn20)}, 0}, - {{0xbd, bd_params_sn20, ARRAY_SIZE(bd_params_sn20)}, 0}, - {{0xbe, be_params_sn20, ARRAY_SIZE(be_params_sn20)}, 0}, - {{0xc7, vcom_params_sn20, ARRAY_SIZE(vcom_params_sn20)}, 0}, - {{0xed, vmesur_params_sn20, ARRAY_SIZE(vmesur_params_sn20)}, 0}, - {{0xc0, powerctl_params_sn20, ARRAY_SIZE(powerctl_params_sn20)}, 0}, - {{0xfc, lvglvolt_params_sn20, ARRAY_SIZE(lvglvolt_params_sn20)}, 0}, - {{0xb6, dispfunc_params_sn20, ARRAY_SIZE(dispfunc_params_sn20)}, 0}, - {{0xdf, engsetting_params_sn20, ARRAY_SIZE(engsetting_params_sn20)}, 0}, - {{0xf3, dvddvolt_params_sn20, ARRAY_SIZE(dvddvolt_params_sn20)}, 0}, - {{0xb4, dispinv_params_sn20, ARRAY_SIZE(dispinv_params_sn20)}, 0}, - {{0xf7, panelres_params_sn20, ARRAY_SIZE(panelres_params_sn20)}, 0}, - {{0xb1, framerate_params_sn20, ARRAY_SIZE(framerate_params_sn20)}, 0}, - {{0xf2, timing_params_sn20, ARRAY_SIZE(timing_params_sn20)}, 0}, - {{0xc1, powerctl2_params_sn20, ARRAY_SIZE(powerctl2_params_sn20)}, 0}, - {{0x36, memaccess_params_sn20, ARRAY_SIZE(memaccess_params_sn20)}, 0}, - {{0x3a, pixfmt_params_sn20, ARRAY_SIZE(pixfmt_params_sn20)}, 0}, - {{0xe0, pgamma_params_sn20, ARRAY_SIZE(pgamma_params_sn20)}, 0}, - {{0xe1, ngamma_params_sn20, ARRAY_SIZE(ngamma_params_sn20)}, 0}, - {{0x35, tearing_params_sn20, ARRAY_SIZE(tearing_params_sn20)}, 0}, -}; - -static void scf0403_gpio_reset(unsigned int gpio) -{ - if (!gpio_is_valid(gpio)) - return; - - gpio_set_value(gpio, 1); - mdelay(100); - gpio_set_value(gpio, 0); - mdelay(40); - gpio_set_value(gpio, 1); - mdelay(100); -} - -static int scf0403_spi_read_rddid(struct spi_slave *spi, u32 *rddid) -{ - int error = 0; - u8 ids_buf = 0x00; - u16 dummy_buf = 0x00; - u16 cmd = 0x04; - - error = spi_set_wordlen(spi, 9); - if (error) - return error; - - /* Here 9 bits required to transmit a command */ - error = spi_xfer(spi, 9, &cmd, NULL, SPI_XFER_ONCE); - if (error) - return error; - - /* - * Here 8 + 1 bits required to arrange extra clock cycle - * before the first data bit. - * According to the datasheet - first parameter is the dummy data. - */ - error = spi_xfer(spi, 9, NULL, &dummy_buf, SPI_XFER_ONCE); - if (error) - return error; - - error = spi_set_wordlen(spi, 8); - if (error) - return error; - - /* Read rest of the data */ - error = spi_xfer(spi, 8, NULL, &ids_buf, SPI_XFER_ONCE); - if (error) - return error; - - *rddid = ids_buf; - - return 0; -} - -static int scf0403_spi_transfer(struct spi_slave *spi, struct scf0403_cmd *cmd) -{ - int i, error; - u32 command = cmd->cmd; - u32 msg; - - error = spi_set_wordlen(spi, 9); - if (error) - return error; - - error = spi_xfer(spi, 9, &command, NULL, SPI_XFER_ONCE); - if (error) - return error; - - for (i = 0; i < cmd->count; i++) { - msg = (cmd->params[i] | 0x100); - error = spi_xfer(spi, 9, &msg, NULL, SPI_XFER_ONCE); - if (error) - return error; - } - - return 0; -} - -static void scf0403_lcd_init(struct scf0403_priv *priv) -{ - int i; - - /* reset LCD */ - scf0403_gpio_reset(priv->reset_gpio); - - for (i = 0; i < priv->seq_size; i++) { - if (scf0403_spi_transfer(priv->spi, &priv->init_seq[i].cmd) < 0) - puts("SPI transfer failed\n"); - - mdelay(priv->init_seq[i].delay_ms); - } -} - -static int scf0403_request_reset_gpio(unsigned gpio) -{ - int err = gpio_request(gpio, "lcd reset"); - - if (err) - return err; - - err = gpio_direction_output(gpio, 0); - if (err) - gpio_free(gpio); - - return err; -} - -int scf0403_init(int reset_gpio) -{ - int error; - - if (gpio_is_valid(reset_gpio)) { - error = scf0403_request_reset_gpio(reset_gpio); - if (error) { - printf("Failed requesting reset GPIO%d: %d\n", - reset_gpio, error); - return error; - } - } - - priv.reset_gpio = reset_gpio; - priv.spi = spi_setup_slave(3, 0, 1000000, SPI_MODE_0); - error = spi_claim_bus(priv.spi); - if (error) - goto bus_claim_fail; - - /* reset LCD */ - scf0403_gpio_reset(reset_gpio); - - error = scf0403_spi_read_rddid(priv.spi, &priv.rddid); - if (error) { - puts("IDs read failed\n"); - goto readid_fail; - } - - if (priv.rddid == SCF0403852GGU04_ID) { - priv.init_seq = scf0403_initseq_sn04; - priv.seq_size = ARRAY_SIZE(scf0403_initseq_sn04); - } else { - priv.init_seq = scf0403_initseq_sn20; - priv.seq_size = ARRAY_SIZE(scf0403_initseq_sn20); - } - - scf0403_lcd_init(&priv); - - /* Start operation */ - scf0403_spi_transfer(priv.spi, &scf0403_cmd_dison); - mdelay(100); - scf0403_spi_transfer(priv.spi, &scf0403_cmd_slpout); - spi_release_bus(priv.spi); - - return 0; - -readid_fail: - spi_release_bus(priv.spi); -bus_claim_fail: - if (gpio_is_valid(priv.reset_gpio)) - gpio_free(priv.reset_gpio); - - return error; -} diff --git a/include/scf0403_lcd.h b/include/scf0403_lcd.h deleted file mode 100644 index 07f8c643ba5..00000000000 --- a/include/scf0403_lcd.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2013, Compulab Inc. - */ -#ifndef SCF0403_LCD_H_ -#define SCF0403_LCD_H_ - -int scf0403_init(int reset_gpio); - -#endif -- cgit v1.3.1 From 82803a60b1d31507226d20f4e279dbc8a5cb8e3e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:20:17 -0700 Subject: armada: usb: net: Drop unused USB drivers These are not used. Drop the drivers and Kconfig option. Also drop an old declaration in the netdev.h header. Signed-off-by: Simon Glass --- drivers/usb/host/Makefile | 1 - drivers/usb/host/ehci-armada100.c | 48 ----------------------- drivers/usb/host/utmi-armada100.c | 80 --------------------------------------- include/netdev.h | 1 - 4 files changed, 130 deletions(-) delete mode 100644 drivers/usb/host/ehci-armada100.c delete mode 100644 drivers/usb/host/utmi-armada100.c (limited to 'include') diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index ddc36632069..1f59e910d3b 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -25,7 +25,6 @@ obj-$(CONFIG_USB_OHCI_NPCM) += ohci-npcm.o # echi obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o -obj-$(CONFIG_USB_EHCI_ARMADA100) += ehci-armada100.o utmi-armada100.o obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o obj-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o diff --git a/drivers/usb/host/ehci-armada100.c b/drivers/usb/host/ehci-armada100.c deleted file mode 100644 index 2ce9f27b862..00000000000 --- a/drivers/usb/host/ehci-armada100.c +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2012 - * eInfochips Ltd. - * Written-by: Ajay Bhargav - * - * This driver is based on Kirkwood echi driver - * (C) Copyright 2009 - * Marvell Semiconductor - * Written-by: Prafulla Wadaskar - */ - -#include -#include -#include -#include -#include "ehci.h" -#include -#include -#include - -/* - * EHCI host controller init - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - if (utmi_init() < 0) - return -1; - - *hccr = (struct ehci_hccr *)(ARMD1_USB_HOST_BASE + 0x100); - *hcor = (struct ehci_hcor *)((uint32_t) *hccr - + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - debug("armada100-ehci: init hccr %x and hcor %x hc_length %d\n", - (uint32_t)*hccr, (uint32_t)*hcor, - (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - return 0; -} - -/* - * EHCI host controller stop - */ -int ehci_hcd_stop(int index) -{ - return 0; -} diff --git a/drivers/usb/host/utmi-armada100.c b/drivers/usb/host/utmi-armada100.c deleted file mode 100644 index 5d66e5881f3..00000000000 --- a/drivers/usb/host/utmi-armada100.c +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2012 - * eInfochips Ltd. - * Written-by: Ajay Bhargav - * - * (C) Copyright 2009 - * Marvell Semiconductor - */ - -#include -#include -#include -#include -#include -#include -#include - -static int utmi_phy_init(void) -{ - struct armd1usb_phy_reg *phy_regs = - (struct armd1usb_phy_reg *)UTMI_PHY_BASE; - int timeout; - - setbits_le32(&phy_regs->utmi_ctrl, INPKT_DELAY_SOF | PLL_PWR_UP); - udelay(1000); - setbits_le32(&phy_regs->utmi_ctrl, PHY_PWR_UP); - - clrbits_le32(&phy_regs->utmi_pll, PLL_FBDIV_MASK | PLL_REFDIV_MASK); - setbits_le32(&phy_regs->utmi_pll, N_DIVIDER << PLL_FBDIV | M_DIVIDER); - - setbits_le32(&phy_regs->utmi_tx, PHSEL_VAL << CK60_PHSEL); - - /* Calibrate pll */ - timeout = 10000; - while (--timeout && ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0)) - ; - if (!timeout) - return -1; - - udelay(200); - setbits_le32(&phy_regs->utmi_pll, VCOCAL_START); - udelay(400); - clrbits_le32(&phy_regs->utmi_pll, VCOCAL_START); - - udelay(200); - setbits_le32(&phy_regs->utmi_tx, RCAL_START); - udelay(400); - clrbits_le32(&phy_regs->utmi_tx, RCAL_START); - - timeout = 10000; - while (--timeout && ((readl(&phy_regs->utmi_pll) & PLL_READY) == 0)) - ; - if (!timeout) - return -1; - - return 0; -} - -/* - * Initialize USB host controller's UTMI Physical interface - */ -int utmi_init(void) -{ - struct armd1mpmu_registers *mpmu_regs = - (struct armd1mpmu_registers *)ARMD1_MPMU_BASE; - - struct armd1apmu_registers *apmu_regs = - (struct armd1apmu_registers *)ARMD1_APMU_BASE; - - /* Turn on 26Mhz ref clock for UTMI PLL */ - setbits_le32(&mpmu_regs->acgr, APB2_26M_EN | AP_26M); - - /* USB Clock reset */ - writel(USB_SPH_AXICLK_EN, &apmu_regs->usbcrc); - writel(USB_SPH_AXICLK_EN | USB_SPH_AXI_RST, &apmu_regs->usbcrc); - - /* Initialize UTMI transceiver */ - return utmi_phy_init(); -} diff --git a/include/netdev.h b/include/netdev.h index 2b4e474ed08..2a7f40e5040 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -71,7 +71,6 @@ int skge_initialize(struct bd_info *bis); int smc91111_initialize(u8 dev_num, phys_addr_t base_addr); int smc911x_initialize(u8 dev_num, phys_addr_t base_addr); int uli526x_initialize(struct bd_info *bis); -int armada100_fec_register(unsigned long base_addr); /* Boards with PCI network controllers can call this from their board_eth_init() * function to initialize whatever's on board. -- cgit v1.3.1 From 5eddad039b914a157c96c11c5e8a56473e71fb3a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:20:18 -0700 Subject: usb: Drop unused ehci-faraday driver This is not used. Drop the driver and Kconfig option. Signed-off-by: Simon Glass --- common/usb_hub.c | 6 -- drivers/usb/host/Makefile | 1 - drivers/usb/host/ehci-faraday.c | 144 ---------------------------------------- drivers/usb/host/ehci-hcd.c | 5 -- include/usb/fusbh200.h | 59 ---------------- 5 files changed, 215 deletions(-) delete mode 100644 drivers/usb/host/ehci-faraday.c delete mode 100644 include/usb/fusbh200.h (limited to 'include') diff --git a/common/usb_hub.c b/common/usb_hub.c index f7fd12c0450..85c0822d8b7 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -506,11 +506,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) if (portchange & USB_PORT_STAT_C_ENABLE) { debug("port %d enable change, status %x\n", i + 1, portstatus); usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_ENABLE); - /* - * The following hack causes a ghost device problem - * to Faraday EHCI - */ -#ifndef CONFIG_USB_EHCI_FARADAY /* * EM interference sometimes causes bad shielded USB * devices to be shutdown by the hub, this hack enables @@ -523,7 +518,6 @@ static int usb_scan_port(struct usb_device_scan *usb_scan) i + 1); usb_hub_port_connect_change(dev, i); } -#endif } if (portstatus & USB_PORT_STAT_SUSPEND) { diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 1f59e910d3b..cce78846d98 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_USB_OHCI_NPCM) += ohci-npcm.o obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o obj-$(CONFIG_USB_EHCI_ATMEL) += ehci-atmel.o obj-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o -obj-$(CONFIG_USB_EHCI_FARADAY) += ehci-faraday.o obj-$(CONFIG_USB_EHCI_GENERIC) += ehci-generic.o obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o obj-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c deleted file mode 100644 index 85a35269601..00000000000 --- a/drivers/usb/host/ehci-faraday.c +++ /dev/null @@ -1,144 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Faraday USB 2.0 EHCI Controller - * - * (C) Copyright 2010 Faraday Technology - * Dante Su - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "ehci.h" - -#ifndef CFG_USB_EHCI_BASE_LIST -#define CFG_USB_EHCI_BASE_LIST { CONFIG_USB_EHCI_BASE } -#endif - -union ehci_faraday_regs { - struct fusbh200_regs usb; - struct fotg210_regs otg; -}; - -static inline int ehci_is_fotg2xx(union ehci_faraday_regs *regs) -{ - return !readl(®s->usb.easstr); -} - -void faraday_ehci_set_usbmode(struct ehci_ctrl *ctrl) -{ - /* nothing needs to be done */ -} - -int faraday_ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg) -{ - int spd, ret = PORTSC_PSPD_HS; - union ehci_faraday_regs *regs; - - ret = (void __iomem *)((ulong)ctrl->hcor - 0x10); - if (ehci_is_fotg2xx(regs)) - spd = OTGCSR_SPD(readl(®s->otg.otgcsr)); - else - spd = BMCSR_SPD(readl(®s->usb.bmcsr)); - - switch (spd) { - case 0: /* full speed */ - ret = PORTSC_PSPD_FS; - break; - case 1: /* low speed */ - ret = PORTSC_PSPD_LS; - break; - case 2: /* high speed */ - ret = PORTSC_PSPD_HS; - break; - default: - printf("ehci-faraday: invalid device speed\n"); - break; - } - - return ret; -} - -uint32_t *faraday_ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port) -{ - /* Faraday EHCI has one and only one portsc register */ - if (port) { - /* Printing the message would cause a scan failure! */ - debug("The request port(%d) is not configured\n", port); - return NULL; - } - - /* Faraday EHCI PORTSC register offset is 0x20 from hcor */ - return (uint32_t *)((uint8_t *)ctrl->hcor + 0x20); -} - -static const struct ehci_ops faraday_ehci_ops = { - .set_usb_mode = faraday_ehci_set_usbmode, - .get_port_speed = faraday_ehci_get_port_speed, - .get_portsc_register = faraday_ehci_get_portsc_register, -}; - -/* - * Create the appropriate control structures to manage - * a new EHCI host controller. - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **ret_hccr, struct ehci_hcor **ret_hcor) -{ - struct ehci_hccr *hccr; - struct ehci_hcor *hcor; - union ehci_faraday_regs *regs; - uint32_t base_list[] = CFG_USB_EHCI_BASE_LIST; - - if (index < 0 || index >= ARRAY_SIZE(base_list)) - return -1; - ehci_set_controller_priv(index, NULL, &faraday_ehci_ops); - regs = (void __iomem *)base_list[index]; - hccr = (struct ehci_hccr *)®s->usb.hccr; - hcor = (struct ehci_hcor *)®s->usb.hcor; - - if (ehci_is_fotg2xx(regs)) { - /* A-device bus reset */ - /* ... Power off A-device */ - setbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSDROP); - /* ... Drop vbus and bus traffic */ - clrbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSREQ); - mdelay(1); - /* ... Power on A-device */ - clrbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSDROP); - /* ... Drive vbus and bus traffic */ - setbits_le32(®s->otg.otgcsr, OTGCSR_A_BUSREQ); - mdelay(1); - /* Disable OTG & DEV interrupts, triggered at level-high */ - writel(IMR_IRQLH | IMR_OTG | IMR_DEV, ®s->otg.imr); - /* Clear all interrupt status */ - writel(ISR_HOST | ISR_OTG | ISR_DEV, ®s->otg.isr); - } else { - /* Interrupt=level-high */ - setbits_le32(®s->usb.bmcsr, BMCSR_IRQLH); - /* VBUS on */ - clrbits_le32(®s->usb.bmcsr, BMCSR_VBUS_OFF); - /* Disable all interrupts */ - writel(0x00, ®s->usb.bmier); - writel(0x1f, ®s->usb.bmisr); - } - - *ret_hccr = hccr; - *ret_hcor = hcor; - - return 0; -} - -/* - * Destroy the appropriate control structures corresponding - * the the EHCI host controller. - */ -int ehci_hcd_stop(int index) -{ - return 0; -} diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 9139d61dd0c..9839aa17492 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -705,12 +705,10 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer, dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken); } else { dev->act_len = 0; -#ifndef CONFIG_USB_EHCI_FARADAY debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n", dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts), ehci_readl(&ctrl->hcor->or_portsc[0]), ehci_readl(&ctrl->hcor->or_portsc[1])); -#endif } free(qtd); @@ -1189,9 +1187,6 @@ int usb_lowlevel_init(int index, enum usb_init_type init, void **controller) rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor); if (rc) return rc; -#endif -#ifdef CONFIG_USB_EHCI_FARADAY - tweaks |= EHCI_TWEAK_NO_INIT_CF; #endif rc = ehci_common_init(ctrl, tweaks); if (rc) diff --git a/include/usb/fusbh200.h b/include/usb/fusbh200.h deleted file mode 100644 index 6ae1d848801..00000000000 --- a/include/usb/fusbh200.h +++ /dev/null @@ -1,59 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Faraday USB 2.0 EHCI Controller - * - * (C) Copyright 2010 Faraday Technology - * Dante Su - */ - -#ifndef _FUSBH200_H -#define _FUSBH200_H - -struct fusbh200_regs { - struct { - uint32_t data[4]; - } hccr; /* 0x00 - 0x0f: hccr */ - struct { - uint32_t data[9]; - } hcor; /* 0x10 - 0x33: hcor */ - uint32_t easstr;/* 0x34: EOF&Async. Sched. Sleep Timer Register */ - uint32_t rsvd[2]; - uint32_t bmcsr; /* 0x40: Bus Monitor Control Status Register */ - uint32_t bmisr; /* 0x44: Bus Monitor Interrupt Status Register */ - uint32_t bmier; /* 0x48: Bus Monitor Interrupt Enable Register */ -}; - -/* EOF & Async. Schedule Sleep Timer Register */ -#define EASSTR_RUNNING (1 << 6) /* Put transceiver in running/resume mode */ -#define EASSTR_SUSPEND (0 << 6) /* Put transceiver in suspend mode */ -#define EASSTR_EOF2(x) (((x) & 0x3) << 4) /* EOF 2 Timing */ -#define EASSTR_EOF1(x) (((x) & 0x3) << 2) /* EOF 1 Timing */ -#define EASSTR_ASST(x) (((x) & 0x3) << 0) /* Async. Sched. Sleep Timer */ - -/* Bus Monitor Control Status Register */ -#define BMCSR_SPD_HIGH (2 << 9) /* Speed of the attached device */ -#define BMCSR_SPD_LOW (1 << 9) -#define BMCSR_SPD_FULL (0 << 9) -#define BMCSR_SPD_MASK (3 << 9) -#define BMCSR_SPD_SHIFT 9 -#define BMCSR_SPD(x) ((x >> 9) & 0x03) -#define BMCSR_VBUS (1 << 8) /* VBUS Valid */ -#define BMCSR_VBUS_OFF (1 << 4) /* VBUS Off */ -#define BMCSR_VBUS_ON (0 << 4) /* VBUS On */ -#define BMCSR_IRQLH (1 << 3) /* IRQ triggered at level-high */ -#define BMCSR_IRQLL (0 << 3) /* IRQ triggered at level-low */ -#define BMCSR_HALFSPD (1 << 2) /* Half speed mode for FPGA test */ -#define BMCSR_HFT_LONG (1 << 1) /* HDISCON noise filter = 270 us*/ -#define BMCSR_HFT (0 << 1) /* HDISCON noise filter = 135 us*/ -#define BMCSR_VFT_LONG (1 << 1) /* VBUS noise filter = 472 us*/ -#define BMCSR_VFT (0 << 1) /* VBUS noise filter = 135 us*/ - -/* Bus Monitor Interrupt Status Register */ -/* Bus Monitor Interrupt Enable Register */ -#define BMISR_DMAERR (1 << 4) /* DMA error */ -#define BMISR_DMA (1 << 3) /* DMA complete */ -#define BMISR_DEVRM (1 << 2) /* device removed */ -#define BMISR_OVD (1 << 1) /* over-current detected */ -#define BMISR_VBUSERR (1 << 0) /* VBUS error */ - -#endif -- cgit v1.3.1 From e9b4678bc78e627dac2a1e3ebe2b263b15bf6207 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 1 Feb 2023 13:20:19 -0700 Subject: usb: Drop unused fotg210 gadget This is not used and appears to be associated with the faraday board which has been removed. Drop the driver and Kconfig options. Signed-off-by: Simon Glass --- drivers/usb/gadget/Makefile | 3 +- drivers/usb/gadget/fotg210.c | 964 -------------------------------------- drivers/usb/gadget/gadget_chips.h | 8 - include/usb/fotg210.h | 362 -------------- 4 files changed, 1 insertion(+), 1336 deletions(-) delete mode 100644 drivers/usb/gadget/fotg210.c delete mode 100644 include/usb/fotg210.h (limited to 'include') diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 9c04403da30..b04b6bcd779 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -19,8 +19,7 @@ obj-$(CONFIG_USB_GADGET_ATMEL_USBA) += atmel_usba_udc.o obj-$(CONFIG_USB_GADGET_BCM_UDC_OTG_PHY) += bcm_udc_otg_phy.o obj-$(CONFIG_USB_GADGET_DWC2_OTG) += dwc2_udc_otg.o obj-$(CONFIG_USB_GADGET_DWC2_OTG_PHY) += dwc2_udc_otg_phy.o -obj-$(CONFIG_USB_GADGET_FOTG210) += fotg210.o -obj-$(CONFIG_USB_GADGET_MAX3420) += max3420_udc.o +0obj-$(CONFIG_USB_GADGET_MAX3420) += max3420_udc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_USB_GADGET_DOWNLOAD) += g_dnl.o obj-$(CONFIG_USB_FUNCTION_THOR) += f_thor.o diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c deleted file mode 100644 index af43433d88d..00000000000 --- a/drivers/usb/gadget/fotg210.c +++ /dev/null @@ -1,964 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Faraday USB 2.0 OTG Controller - * - * (C) Copyright 2010 Faraday Technology - * Dante Su - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define CFG_NUM_ENDPOINTS 4 -#define CFG_EP0_MAX_PACKET_SIZE 64 -#define CFG_EPX_MAX_PACKET_SIZE 512 - -#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */ - -struct fotg210_chip; - -struct fotg210_ep { - struct usb_ep ep; - - uint maxpacket; - uint id; - uint stopped; - - struct list_head queue; - struct fotg210_chip *chip; - const struct usb_endpoint_descriptor *desc; -}; - -struct fotg210_request { - struct usb_request req; - struct list_head queue; - struct fotg210_ep *ep; -}; - -struct fotg210_chip { - struct usb_gadget gadget; - struct usb_gadget_driver *driver; - struct fotg210_regs *regs; - uint8_t irq; - uint16_t addr; - int pullup; - enum usb_device_state state; - struct fotg210_ep ep[1 + CFG_NUM_ENDPOINTS]; -}; - -static struct usb_endpoint_descriptor ep0_desc = { - .bLength = sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = USB_DIR_IN, - .bmAttributes = USB_ENDPOINT_XFER_CONTROL, -}; - -static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in) -{ - return (id < 0) ? 0 : ((id & 0x03) + 1); -} - -static inline int ep_to_fifo(struct fotg210_chip *chip, int id) -{ - return (id <= 0) ? -1 : ((id - 1) & 0x03); -} - -static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr) -{ - int ep = ep_addr & USB_ENDPOINT_NUMBER_MASK; - struct fotg210_regs *regs = chip->regs; - - if (ep_addr & USB_DIR_IN) { - /* reset endpoint */ - setbits_le32(®s->iep[ep - 1], IEP_RESET); - mdelay(1); - clrbits_le32(®s->iep[ep - 1], IEP_RESET); - /* clear endpoint stall */ - clrbits_le32(®s->iep[ep - 1], IEP_STALL); - } else { - /* reset endpoint */ - setbits_le32(®s->oep[ep - 1], OEP_RESET); - mdelay(1); - clrbits_le32(®s->oep[ep - 1], OEP_RESET); - /* clear endpoint stall */ - clrbits_le32(®s->oep[ep - 1], OEP_STALL); - } - - return 0; -} - -static int fotg210_reset(struct fotg210_chip *chip) -{ - struct fotg210_regs *regs = chip->regs; - uint32_t i; - - chip->state = USB_STATE_POWERED; - - /* chip enable */ - writel(DEVCTRL_EN, ®s->dev_ctrl); - - /* device address reset */ - chip->addr = 0; - writel(0, ®s->dev_addr); - - /* set idle counter to 7ms */ - writel(7, ®s->idle); - - /* disable all interrupts */ - writel(IMR_MASK, ®s->imr); - writel(GIMR_MASK, ®s->gimr); - writel(GIMR0_MASK, ®s->gimr0); - writel(GIMR1_MASK, ®s->gimr1); - writel(GIMR2_MASK, ®s->gimr2); - - /* clear interrupts */ - writel(ISR_MASK, ®s->isr); - writel(0, ®s->gisr); - writel(0, ®s->gisr0); - writel(0, ®s->gisr1); - writel(0, ®s->gisr2); - - /* chip reset */ - setbits_le32(®s->dev_ctrl, DEVCTRL_RESET); - mdelay(10); - if (readl(®s->dev_ctrl) & DEVCTRL_RESET) { - printf("fotg210: chip reset failed\n"); - return -1; - } - - /* CX FIFO reset */ - setbits_le32(®s->cxfifo, CXFIFO_CXFIFOCLR); - mdelay(10); - if (readl(®s->cxfifo) & CXFIFO_CXFIFOCLR) { - printf("fotg210: ep0 fifo reset failed\n"); - return -1; - } - - /* create static ep-fifo map (EP1 <-> FIFO0, EP2 <-> FIFO1 ...) */ - writel(EPMAP14_DEFAULT, ®s->epmap14); - writel(EPMAP58_DEFAULT, ®s->epmap58); - writel(FIFOMAP_DEFAULT, ®s->fifomap); - writel(0, ®s->fifocfg); - for (i = 0; i < 8; ++i) { - writel(CFG_EPX_MAX_PACKET_SIZE, ®s->iep[i]); - writel(CFG_EPX_MAX_PACKET_SIZE, ®s->oep[i]); - } - - /* FIFO reset */ - for (i = 0; i < 4; ++i) { - writel(FIFOCSR_RESET, ®s->fifocsr[i]); - mdelay(10); - if (readl(®s->fifocsr[i]) & FIFOCSR_RESET) { - printf("fotg210: fifo%d reset failed\n", i); - return -1; - } - } - - /* enable only device interrupt and triggered at level-high */ - writel(IMR_IRQLH | IMR_HOST | IMR_OTG, ®s->imr); - writel(ISR_MASK, ®s->isr); - /* disable EP0 IN/OUT interrupt */ - writel(GIMR0_CXOUT | GIMR0_CXIN, ®s->gimr0); - /* disable EPX IN+SPK+OUT interrupts */ - writel(GIMR1_MASK, ®s->gimr1); - /* disable wakeup+idle+dma+zlp interrupts */ - writel(GIMR2_WAKEUP | GIMR2_IDLE | GIMR2_DMAERR | GIMR2_DMAFIN - | GIMR2_ZLPRX | GIMR2_ZLPTX, ®s->gimr2); - /* enable all group interrupt */ - writel(0, ®s->gimr); - - /* suspend delay = 3 ms */ - writel(3, ®s->idle); - - /* turn-on device interrupts */ - setbits_le32(®s->dev_ctrl, DEVCTRL_GIRQ_EN); - - return 0; -} - -static inline int fotg210_cxwait(struct fotg210_chip *chip, uint32_t mask) -{ - struct fotg210_regs *regs = chip->regs; - int ret = -1; - ulong ts; - - for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { - if ((readl(®s->cxfifo) & mask) != mask) - continue; - ret = 0; - break; - } - - if (ret) - printf("fotg210: cx/ep0 timeout\n"); - - return ret; -} - -static int fotg210_dma(struct fotg210_ep *ep, struct fotg210_request *req) -{ - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - uint32_t tmp, ts; - uint8_t *buf = req->req.buf + req->req.actual; - uint32_t len = req->req.length - req->req.actual; - int fifo = ep_to_fifo(chip, ep->id); - int ret = -EBUSY; - - /* 1. init dma buffer */ - if (len > ep->maxpacket) - len = ep->maxpacket; - - /* 2. wait for dma ready (hardware) */ - for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { - if (!(readl(®s->dma_ctrl) & DMACTRL_START)) { - ret = 0; - break; - } - } - if (ret) { - printf("fotg210: dma busy\n"); - req->req.status = ret; - return ret; - } - - /* 3. DMA target setup */ - if (ep->desc->bEndpointAddress & USB_DIR_IN) - flush_dcache_range((ulong)buf, (ulong)buf + len); - else - invalidate_dcache_range((ulong)buf, (ulong)buf + len); - - writel(virt_to_phys(buf), ®s->dma_addr); - - if (ep->desc->bEndpointAddress & USB_DIR_IN) { - if (ep->id == 0) { - /* Wait until cx/ep0 fifo empty */ - fotg210_cxwait(chip, CXFIFO_CXFIFOE); - udelay(1); - writel(DMAFIFO_CX, ®s->dma_fifo); - } else { - /* Wait until epx fifo empty */ - fotg210_cxwait(chip, CXFIFO_FIFOE(fifo)); - writel(DMAFIFO_FIFO(fifo), ®s->dma_fifo); - } - writel(DMACTRL_LEN(len) | DMACTRL_MEM2FIFO, ®s->dma_ctrl); - } else { - uint32_t blen; - - if (ep->id == 0) { - writel(DMAFIFO_CX, ®s->dma_fifo); - do { - blen = CXFIFO_BYTES(readl(®s->cxfifo)); - } while (blen < len); - } else { - writel(DMAFIFO_FIFO(fifo), ®s->dma_fifo); - blen = FIFOCSR_BYTES(readl(®s->fifocsr[fifo])); - } - len = (len < blen) ? len : blen; - writel(DMACTRL_LEN(len) | DMACTRL_FIFO2MEM, ®s->dma_ctrl); - } - - /* 4. DMA start */ - setbits_le32(®s->dma_ctrl, DMACTRL_START); - - /* 5. DMA wait */ - ret = -EBUSY; - for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) { - tmp = readl(®s->gisr2); - /* DMA complete */ - if (tmp & GISR2_DMAFIN) { - ret = 0; - break; - } - /* DMA error */ - if (tmp & GISR2_DMAERR) { - printf("fotg210: dma error\n"); - break; - } - /* resume, suspend, reset */ - if (tmp & (GISR2_RESUME | GISR2_SUSPEND | GISR2_RESET)) { - printf("fotg210: dma reset by host\n"); - break; - } - } - - /* 7. DMA target reset */ - if (ret) - writel(DMACTRL_ABORT | DMACTRL_CLRFF, ®s->dma_ctrl); - - writel(0, ®s->gisr2); - writel(0, ®s->dma_fifo); - - req->req.status = ret; - if (!ret) - req->req.actual += len; - else - printf("fotg210: ep%d dma error(code=%d)\n", ep->id, ret); - - return len; -} - -/* - * result of setup packet - */ -#define CX_IDLE 0 -#define CX_FINISH 1 -#define CX_STALL 2 - -static void fotg210_setup(struct fotg210_chip *chip) -{ - int id, ret = CX_IDLE; - uint32_t tmp[2]; - struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)tmp; - struct fotg210_regs *regs = chip->regs; - - /* - * If this is the first Cx 8 byte command, - * we can now query USB mode (high/full speed; USB 2.0/USB 1.0) - */ - if (chip->state == USB_STATE_POWERED) { - chip->state = USB_STATE_DEFAULT; - if (readl(®s->otgcsr) & OTGCSR_DEV_B) { - /* Mini-B */ - if (readl(®s->dev_ctrl) & DEVCTRL_HS) { - puts("fotg210: HS\n"); - chip->gadget.speed = USB_SPEED_HIGH; - /* SOF mask timer = 1100 ticks */ - writel(SOFMTR_TMR(1100), ®s->sof_mtr); - } else { - puts("fotg210: FS\n"); - chip->gadget.speed = USB_SPEED_FULL; - /* SOF mask timer = 10000 ticks */ - writel(SOFMTR_TMR(10000), ®s->sof_mtr); - } - } else { - printf("fotg210: mini-A?\n"); - } - } - - /* switch data port to ep0 */ - writel(DMAFIFO_CX, ®s->dma_fifo); - /* fetch 8 bytes setup packet */ - tmp[0] = readl(®s->ep0_data); - tmp[1] = readl(®s->ep0_data); - /* release data port */ - writel(0, ®s->dma_fifo); - - if (req->bRequestType & USB_DIR_IN) - ep0_desc.bEndpointAddress = USB_DIR_IN; - else - ep0_desc.bEndpointAddress = USB_DIR_OUT; - - ret = CX_IDLE; - - if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { - switch (req->bRequest) { - case USB_REQ_SET_CONFIGURATION: - debug("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF); - if (!(req->wValue & 0x00FF)) { - chip->state = USB_STATE_ADDRESS; - writel(chip->addr, ®s->dev_addr); - } else { - chip->state = USB_STATE_CONFIGURED; - writel(chip->addr | DEVADDR_CONF, - ®s->dev_addr); - } - ret = CX_IDLE; - break; - - case USB_REQ_SET_ADDRESS: - debug("fotg210: set_addr(0x%04X)\n", req->wValue); - chip->state = USB_STATE_ADDRESS; - chip->addr = req->wValue & DEVADDR_ADDR_MASK; - ret = CX_FINISH; - writel(chip->addr, ®s->dev_addr); - break; - - case USB_REQ_CLEAR_FEATURE: - debug("fotg210: clr_feature(%d, %d)\n", - req->bRequestType & 0x03, req->wValue); - switch (req->wValue) { - case 0: /* [Endpoint] halt */ - ep_reset(chip, req->wIndex); - ret = CX_FINISH; - break; - case 1: /* [Device] remote wake-up */ - case 2: /* [Device] test mode */ - default: - ret = CX_STALL; - break; - } - break; - - case USB_REQ_SET_FEATURE: - debug("fotg210: set_feature(%d, %d)\n", - req->wValue, req->wIndex & 0xf); - switch (req->wValue) { - case 0: /* Endpoint Halt */ - id = req->wIndex & 0xf; - setbits_le32(®s->iep[id - 1], IEP_STALL); - setbits_le32(®s->oep[id - 1], OEP_STALL); - ret = CX_FINISH; - break; - case 1: /* Remote Wakeup */ - case 2: /* Test Mode */ - default: - ret = CX_STALL; - break; - } - break; - - case USB_REQ_GET_STATUS: - debug("fotg210: get_status\n"); - ret = CX_STALL; - break; - - case USB_REQ_SET_DESCRIPTOR: - debug("fotg210: set_descriptor\n"); - ret = CX_STALL; - break; - - case USB_REQ_SYNCH_FRAME: - debug("fotg210: sync frame\n"); - ret = CX_STALL; - break; - } - } /* if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) */ - - if (ret == CX_IDLE && chip->driver->setup) { - if (chip->driver->setup(&chip->gadget, req) < 0) - ret = CX_STALL; - else - ret = CX_FINISH; - } - - switch (ret) { - case CX_FINISH: - setbits_le32(®s->cxfifo, CXFIFO_CXFIN); - break; - - case CX_STALL: - setbits_le32(®s->cxfifo, CXFIFO_CXSTALL | CXFIFO_CXFIN); - printf("fotg210: cx_stall!\n"); - break; - - case CX_IDLE: - debug("fotg210: cx_idle?\n"); - default: - break; - } -} - -/* - * fifo - FIFO id - * zlp - zero length packet - */ -static void fotg210_recv(struct fotg210_chip *chip, int ep_id) -{ - struct fotg210_regs *regs = chip->regs; - struct fotg210_ep *ep = chip->ep + ep_id; - struct fotg210_request *req; - int len; - - if (ep->stopped || (ep->desc->bEndpointAddress & USB_DIR_IN)) { - printf("fotg210: ep%d recv, invalid!\n", ep->id); - return; - } - - if (list_empty(&ep->queue)) { - printf("fotg210: ep%d recv, drop!\n", ep->id); - return; - } - - req = list_first_entry(&ep->queue, struct fotg210_request, queue); - len = fotg210_dma(ep, req); - if (len < ep->ep.maxpacket || req->req.length <= req->req.actual) { - list_del_init(&req->queue); - if (req->req.complete) - req->req.complete(&ep->ep, &req->req); - } - - if (ep->id > 0 && list_empty(&ep->queue)) { - setbits_le32(®s->gimr1, - GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id))); - } -} - -/* - * USB Gadget Layer - */ -static int fotg210_ep_enable( - struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - int id = ep_to_fifo(chip, ep->id); - int in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0; - - if (!_ep || !desc - || desc->bDescriptorType != USB_DT_ENDPOINT - || le16_to_cpu(desc->wMaxPacketSize) == 0) { - printf("fotg210: bad ep or descriptor\n"); - return -EINVAL; - } - - ep->desc = desc; - ep->stopped = 0; - - if (in) - setbits_le32(®s->fifomap, FIFOMAP(id, FIFOMAP_IN)); - - switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { - case USB_ENDPOINT_XFER_CONTROL: - return -EINVAL; - - case USB_ENDPOINT_XFER_ISOC: - setbits_le32(®s->fifocfg, - FIFOCFG(id, FIFOCFG_EN | FIFOCFG_ISOC)); - break; - - case USB_ENDPOINT_XFER_BULK: - setbits_le32(®s->fifocfg, - FIFOCFG(id, FIFOCFG_EN | FIFOCFG_BULK)); - break; - - case USB_ENDPOINT_XFER_INT: - setbits_le32(®s->fifocfg, - FIFOCFG(id, FIFOCFG_EN | FIFOCFG_INTR)); - break; - } - - return 0; -} - -static int fotg210_ep_disable(struct usb_ep *_ep) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - int id = ep_to_fifo(chip, ep->id); - - ep->desc = NULL; - ep->stopped = 1; - - clrbits_le32(®s->fifocfg, FIFOCFG(id, FIFOCFG_CFG_MASK)); - clrbits_le32(®s->fifomap, FIFOMAP(id, FIFOMAP_DIR_MASK)); - - return 0; -} - -static struct usb_request *fotg210_ep_alloc_request( - struct usb_ep *_ep, gfp_t gfp_flags) -{ - struct fotg210_request *req = malloc(sizeof(*req)); - - if (req) { - memset(req, 0, sizeof(*req)); - INIT_LIST_HEAD(&req->queue); - } - return &req->req; -} - -static void fotg210_ep_free_request( - struct usb_ep *_ep, struct usb_request *_req) -{ - struct fotg210_request *req; - - req = container_of(_req, struct fotg210_request, req); - free(req); -} - -static int fotg210_ep_queue( - struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - struct fotg210_request *req; - - req = container_of(_req, struct fotg210_request, req); - if (!_req || !_req->complete || !_req->buf - || !list_empty(&req->queue)) { - printf("fotg210: invalid request to ep%d\n", ep->id); - return -EINVAL; - } - - if (!chip || chip->state == USB_STATE_SUSPENDED) { - printf("fotg210: request while chip suspended\n"); - return -EINVAL; - } - - req->req.actual = 0; - req->req.status = -EINPROGRESS; - - if (req->req.length == 0) { - req->req.status = 0; - if (req->req.complete) - req->req.complete(&ep->ep, &req->req); - return 0; - } - - if (ep->id == 0) { - do { - int len = fotg210_dma(ep, req); - if (len < ep->ep.maxpacket) - break; - if (ep->desc->bEndpointAddress & USB_DIR_IN) - udelay(100); - } while (req->req.length > req->req.actual); - } else { - if (ep->desc->bEndpointAddress & USB_DIR_IN) { - do { - int len = fotg210_dma(ep, req); - if (len < ep->ep.maxpacket) - break; - } while (req->req.length > req->req.actual); - } else { - list_add_tail(&req->queue, &ep->queue); - clrbits_le32(®s->gimr1, - GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id))); - } - } - - if (ep->id == 0 || (ep->desc->bEndpointAddress & USB_DIR_IN)) { - if (req->req.complete) - req->req.complete(&ep->ep, &req->req); - } - - return 0; -} - -static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_request *req; - - /* make sure it's actually queued on this endpoint */ - list_for_each_entry(req, &ep->queue, queue) { - if (&req->req == _req) - break; - } - if (&req->req != _req) - return -EINVAL; - - /* remove the request */ - list_del_init(&req->queue); - - /* update status & invoke complete callback */ - if (req->req.status == -EINPROGRESS) { - req->req.status = -ECONNRESET; - if (req->req.complete) - req->req.complete(_ep, &req->req); - } - - return 0; -} - -static int fotg210_ep_halt(struct usb_ep *_ep, int halt) -{ - struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep); - struct fotg210_chip *chip = ep->chip; - struct fotg210_regs *regs = chip->regs; - int ret = -1; - - debug("fotg210: ep%d halt=%d\n", ep->id, halt); - - /* Endpoint STALL */ - if (ep->id > 0 && ep->id <= CFG_NUM_ENDPOINTS) { - if (halt) { - /* wait until all ep fifo empty */ - fotg210_cxwait(chip, 0xf00); - /* stall */ - if (ep->desc->bEndpointAddress & USB_DIR_IN) { - setbits_le32(®s->iep[ep->id - 1], - IEP_STALL); - } else { - setbits_le32(®s->oep[ep->id - 1], - OEP_STALL); - } - } else { - if (ep->desc->bEndpointAddress & USB_DIR_IN) { - clrbits_le32(®s->iep[ep->id - 1], - IEP_STALL); - } else { - clrbits_le32(®s->oep[ep->id - 1], - OEP_STALL); - } - } - ret = 0; - } - - return ret; -} - -/* - * activate/deactivate link with host. - */ -static void pullup(struct fotg210_chip *chip, int is_on) -{ - struct fotg210_regs *regs = chip->regs; - - if (is_on) { - if (!chip->pullup) { - chip->state = USB_STATE_POWERED; - chip->pullup = 1; - /* enable the chip */ - setbits_le32(®s->dev_ctrl, DEVCTRL_EN); - /* clear unplug bit (BIT0) */ - clrbits_le32(®s->phy_tmsr, PHYTMSR_UNPLUG); - } - } else { - chip->state = USB_STATE_NOTATTACHED; - chip->pullup = 0; - chip->addr = 0; - writel(chip->addr, ®s->dev_addr); - /* set unplug bit (BIT0) */ - setbits_le32(®s->phy_tmsr, PHYTMSR_UNPLUG); - /* disable the chip */ - clrbits_le32(®s->dev_ctrl, DEVCTRL_EN); - } -} - -static int fotg210_pullup(struct usb_gadget *_gadget, int is_on) -{ - struct fotg210_chip *chip; - - chip = container_of(_gadget, struct fotg210_chip, gadget); - - debug("fotg210: pullup=%d\n", is_on); - - pullup(chip, is_on); - - return 0; -} - -static int fotg210_get_frame(struct usb_gadget *_gadget) -{ - struct fotg210_chip *chip; - struct fotg210_regs *regs; - - chip = container_of(_gadget, struct fotg210_chip, gadget); - regs = chip->regs; - - return SOFFNR_FNR(readl(®s->sof_fnr)); -} - -static struct usb_gadget_ops fotg210_gadget_ops = { - .get_frame = fotg210_get_frame, - .pullup = fotg210_pullup, -}; - -static struct usb_ep_ops fotg210_ep_ops = { - .enable = fotg210_ep_enable, - .disable = fotg210_ep_disable, - .queue = fotg210_ep_queue, - .dequeue = fotg210_ep_dequeue, - .set_halt = fotg210_ep_halt, - .alloc_request = fotg210_ep_alloc_request, - .free_request = fotg210_ep_free_request, -}; - -static struct fotg210_chip controller = { - .regs = (void __iomem *)CONFIG_FOTG210_BASE, - .gadget = { - .name = "fotg210_udc", - .ops = &fotg210_gadget_ops, - .ep0 = &controller.ep[0].ep, - .speed = USB_SPEED_UNKNOWN, - .is_dualspeed = 1, - .is_otg = 0, - .is_a_peripheral = 0, - .b_hnp_enable = 0, - .a_hnp_support = 0, - .a_alt_hnp_support = 0, - }, - .ep[0] = { - .id = 0, - .ep = { - .name = "ep0", - .ops = &fotg210_ep_ops, - }, - .desc = &ep0_desc, - .chip = &controller, - .maxpacket = CFG_EP0_MAX_PACKET_SIZE, - }, - .ep[1] = { - .id = 1, - .ep = { - .name = "ep1", - .ops = &fotg210_ep_ops, - }, - .chip = &controller, - .maxpacket = CFG_EPX_MAX_PACKET_SIZE, - }, - .ep[2] = { - .id = 2, - .ep = { - .name = "ep2", - .ops = &fotg210_ep_ops, - }, - .chip = &controller, - .maxpacket = CFG_EPX_MAX_PACKET_SIZE, - }, - .ep[3] = { - .id = 3, - .ep = { - .name = "ep3", - .ops = &fotg210_ep_ops, - }, - .chip = &controller, - .maxpacket = CFG_EPX_MAX_PACKET_SIZE, - }, - .ep[4] = { - .id = 4, - .ep = { - .name = "ep4", - .ops = &fotg210_ep_ops, - }, - .chip = &controller, - .maxpacket = CFG_EPX_MAX_PACKET_SIZE, - }, -}; - -int usb_gadget_handle_interrupts(int index) -{ - struct fotg210_chip *chip = &controller; - struct fotg210_regs *regs = chip->regs; - uint32_t id, st, isr, gisr; - - isr = readl(®s->isr) & (~readl(®s->imr)); - gisr = readl(®s->gisr) & (~readl(®s->gimr)); - if (!(isr & ISR_DEV) || !gisr) - return 0; - - writel(ISR_DEV, ®s->isr); - - /* CX interrupts */ - if (gisr & GISR_GRP0) { - st = readl(®s->gisr0); - /* - * Write 1 and then 0 works for both W1C & RW. - * - * HW v1.11.0+: It's a W1C register (write 1 clear) - * HW v1.10.0-: It's a R/W register (write 0 clear) - */ - writel(st & GISR0_CXABORT, ®s->gisr0); - writel(0, ®s->gisr0); - - if (st & GISR0_CXERR) - printf("fotg210: cmd error\n"); - - if (st & GISR0_CXABORT) - printf("fotg210: cmd abort\n"); - - if (st & GISR0_CXSETUP) /* setup */ - fotg210_setup(chip); - else if (st & GISR0_CXEND) /* command finish */ - setbits_le32(®s->cxfifo, CXFIFO_CXFIN); - } - - /* FIFO interrupts */ - if (gisr & GISR_GRP1) { - st = readl(®s->gisr1); - for (id = 0; id < 4; ++id) { - if (st & GISR1_RX_FIFO(id)) - fotg210_recv(chip, fifo_to_ep(chip, id, 0)); - } - } - - /* Device Status Interrupts */ - if (gisr & GISR_GRP2) { - st = readl(®s->gisr2); - /* - * Write 1 and then 0 works for both W1C & RW. - * - * HW v1.11.0+: It's a W1C register (write 1 clear) - * HW v1.10.0-: It's a R/W register (write 0 clear) - */ - writel(st, ®s->gisr2); - writel(0, ®s->gisr2); - - if (st & GISR2_RESET) - printf("fotg210: reset by host\n"); - else if (st & GISR2_SUSPEND) - printf("fotg210: suspend/removed\n"); - else if (st & GISR2_RESUME) - printf("fotg210: resume\n"); - - /* Errors */ - if (st & GISR2_ISOCERR) - printf("fotg210: iso error\n"); - if (st & GISR2_ISOCABT) - printf("fotg210: iso abort\n"); - if (st & GISR2_DMAERR) - printf("fotg210: dma error\n"); - } - - return 0; -} - -int usb_gadget_register_driver(struct usb_gadget_driver *driver) -{ - int i, ret = 0; - struct fotg210_chip *chip = &controller; - - if (!driver || !driver->bind || !driver->setup) { - puts("fotg210: bad parameter.\n"); - return -EINVAL; - } - - INIT_LIST_HEAD(&chip->gadget.ep_list); - for (i = 0; i < CFG_NUM_ENDPOINTS + 1; ++i) { - struct fotg210_ep *ep = chip->ep + i; - - ep->ep.maxpacket = ep->maxpacket; - INIT_LIST_HEAD(&ep->queue); - - if (ep->id == 0) { - ep->stopped = 0; - } else { - ep->stopped = 1; - list_add_tail(&ep->ep.ep_list, &chip->gadget.ep_list); - } - } - - if (fotg210_reset(chip)) { - puts("fotg210: reset failed.\n"); - return -EINVAL; - } - - ret = driver->bind(&chip->gadget); - if (ret) { - debug("fotg210: driver->bind() returned %d\n", ret); - return ret; - } - chip->driver = driver; - - return ret; -} - -int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) -{ - struct fotg210_chip *chip = &controller; - - driver->unbind(&chip->gadget); - chip->driver = NULL; - - pullup(chip, 0); - - return 0; -} diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h index abc6dc7f89f..98156c312d2 100644 --- a/drivers/usb/gadget/gadget_chips.h +++ b/drivers/usb/gadget/gadget_chips.h @@ -117,12 +117,6 @@ #define gadget_is_ci(g) 0 #endif -#ifdef CONFIG_USB_GADGET_FOTG210 -#define gadget_is_fotg210(g) (!strcmp("fotg210_udc", (g)->name)) -#else -#define gadget_is_fotg210(g) 0 -#endif - #ifdef CONFIG_USB_DWC3_GADGET #define gadget_is_dwc3(g) (!strcmp("dwc3-gadget", (g)->name)) #else @@ -202,8 +196,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget) return 0x20; else if (gadget_is_ci(gadget)) return 0x21; - else if (gadget_is_fotg210(gadget)) - return 0x22; else if (gadget_is_dwc3(gadget)) return 0x23; else if (gadget_is_cdns3(gadget)) diff --git a/include/usb/fotg210.h b/include/usb/fotg210.h deleted file mode 100644 index 292ce54e0c4..00000000000 --- a/include/usb/fotg210.h +++ /dev/null @@ -1,362 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Faraday USB 2.0 OTG Controller - * - * (C) Copyright 2010 Faraday Technology - * Dante Su - */ - -#ifndef _FOTG210_H -#define _FOTG210_H - -struct fotg210_regs { - /* USB Host Controller */ - struct { - uint32_t data[4]; - } hccr; /* 0x00 - 0x0f: hccr */ - struct { - uint32_t data[9]; - } hcor; /* 0x10 - 0x33: hcor */ - uint32_t rsvd1[3]; - uint32_t miscr; /* 0x40: Miscellaneous Register */ - uint32_t rsvd2[15]; - /* USB OTG Controller */ - uint32_t otgcsr;/* 0x80: OTG Control Status Register */ - uint32_t otgisr;/* 0x84: OTG Interrupt Status Register */ - uint32_t otgier;/* 0x88: OTG Interrupt Enable Register */ - uint32_t rsvd3[13]; - uint32_t isr; /* 0xC0: Global Interrupt Status Register */ - uint32_t imr; /* 0xC4: Global Interrupt Mask Register */ - uint32_t rsvd4[14]; - /* USB Device Controller */ - uint32_t dev_ctrl;/* 0x100: Device Control Register */ - uint32_t dev_addr;/* 0x104: Device Address Register */ - uint32_t dev_test;/* 0x108: Device Test Register */ - uint32_t sof_fnr; /* 0x10c: SOF Frame Number Register */ - uint32_t sof_mtr; /* 0x110: SOF Mask Timer Register */ - uint32_t phy_tmsr;/* 0x114: PHY Test Mode Selector Register */ - uint32_t rsvd5[2]; - uint32_t cxfifo;/* 0x120: CX FIFO Register */ - uint32_t idle; /* 0x124: IDLE Counter Register */ - uint32_t rsvd6[2]; - uint32_t gimr; /* 0x130: Group Interrupt Mask Register */ - uint32_t gimr0; /* 0x134: Group Interrupt Mask Register 0 */ - uint32_t gimr1; /* 0x138: Group Interrupt Mask Register 1 */ - uint32_t gimr2; /* 0x13c: Group Interrupt Mask Register 2 */ - uint32_t gisr; /* 0x140: Group Interrupt Status Register */ - uint32_t gisr0; /* 0x144: Group Interrupt Status Register 0 */ - uint32_t gisr1; /* 0x148: Group Interrupt Status Register 1 */ - uint32_t gisr2; /* 0x14c: Group Interrupt Status Register 2 */ - uint32_t rxzlp; /* 0x150: Receive Zero-Length-Packet Register */ - uint32_t txzlp; /* 0x154: Transfer Zero-Length-Packet Register */ - uint32_t isoeasr;/* 0x158: ISOC Error/Abort Status Register */ - uint32_t rsvd7[1]; - uint32_t iep[8]; /* 0x160 - 0x17f: IN Endpoint Register */ - uint32_t oep[8]; /* 0x180 - 0x19f: OUT Endpoint Register */ - uint32_t epmap14;/* 0x1a0: Endpoint Map Register (EP1 ~ 4) */ - uint32_t epmap58;/* 0x1a4: Endpoint Map Register (EP5 ~ 8) */ - uint32_t fifomap;/* 0x1a8: FIFO Map Register */ - uint32_t fifocfg; /* 0x1ac: FIFO Configuration Register */ - uint32_t fifocsr[4];/* 0x1b0 - 0x1bf: FIFO Control Status Register */ - uint32_t dma_fifo; /* 0x1c0: DMA Target FIFO Register */ - uint32_t rsvd8[1]; - uint32_t dma_ctrl; /* 0x1c8: DMA Control Register */ - uint32_t dma_addr; /* 0x1cc: DMA Address Register */ - uint32_t ep0_data; /* 0x1d0: EP0 Setup Packet PIO Register */ -}; - -/* Miscellaneous Register */ -#define MISCR_SUSPEND (1 << 6) /* Put transceiver in suspend mode */ -#define MISCR_EOF2(x) (((x) & 0x3) << 4) /* EOF 2 Timing */ -#define MISCR_EOF1(x) (((x) & 0x3) << 2) /* EOF 1 Timing */ -#define MISCR_ASST(x) (((x) & 0x3) << 0) /* Async. Sched. Sleep Timer */ - -/* OTG Control Status Register */ -#define OTGCSR_SPD_HIGH (2 << 22) /* Speed of the attached device (host) */ -#define OTGCSR_SPD_LOW (1 << 22) -#define OTGCSR_SPD_FULL (0 << 22) -#define OTGCSR_SPD_MASK (3 << 22) -#define OTGCSR_SPD_SHIFT 22 -#define OTGCSR_SPD(x) (((x) >> 22) & 0x03) -#define OTGCSR_DEV_A (0 << 21) /* Acts as A-device */ -#define OTGCSR_DEV_B (1 << 21) /* Acts as B-device */ -#define OTGCSR_ROLE_H (0 << 20) /* Acts as Host */ -#define OTGCSR_ROLE_D (1 << 20) /* Acts as Device */ -#define OTGCSR_A_VBUS_VLD (1 << 19) /* A-device VBUS Valid */ -#define OTGCSR_A_SESS_VLD (1 << 18) /* A-device Session Valid */ -#define OTGCSR_B_SESS_VLD (1 << 17) /* B-device Session Valid */ -#define OTGCSR_B_SESS_END (1 << 16) /* B-device Session End */ -#define OTGCSR_HFT_LONG (1 << 11) /* HDISCON noise filter = 270 us*/ -#define OTGCSR_HFT (0 << 11) /* HDISCON noise filter = 135 us*/ -#define OTGCSR_VFT_LONG (1 << 10) /* VBUS noise filter = 472 us*/ -#define OTGCSR_VFT (0 << 10) /* VBUS noise filter = 135 us*/ -#define OTGCSR_IDFT_LONG (1 << 9) /* ID noise filter = 4 ms*/ -#define OTGCSR_IDFT (0 << 9) /* ID noise filter = 3 ms*/ -#define OTGCSR_A_SRPR_VBUS (0 << 8) /* A-device: SRP responds to VBUS */ -#define OTGCSR_A_SRPR_DATA (1 << 8) /* A-device: SRP responds to DATA-LINE */ -#define OTGCSR_A_SRP_EN (1 << 7) /* A-device SRP detection enabled */ -#define OTGCSR_A_HNP (1 << 6) /* Set role=A-device with HNP enabled */ -#define OTGCSR_A_BUSDROP (1 << 5) /* A-device drop bus (power-down) */ -#define OTGCSR_A_BUSREQ (1 << 4) /* A-device request bus */ -#define OTGCSR_B_VBUS_DISC (1 << 2) /* B-device discharges VBUS */ -#define OTGCSR_B_HNP (1 << 1) /* B-device enable HNP */ -#define OTGCSR_B_BUSREQ (1 << 0) /* B-device request bus */ - -/* OTG Interrupt Status Register */ -#define OTGISR_APRM (1 << 12) /* Mini-A plug removed */ -#define OTGISR_BPRM (1 << 11) /* Mini-B plug removed */ -#define OTGISR_OVD (1 << 10) /* over-current detected */ -#define OTGISR_IDCHG (1 << 9) /* ID(A/B) changed */ -#define OTGISR_RLCHG (1 << 8) /* Role(Host/Device) changed */ -#define OTGISR_BSESSEND (1 << 6) /* B-device Session End */ -#define OTGISR_AVBUSERR (1 << 5) /* A-device VBUS Error */ -#define OTGISR_ASRP (1 << 4) /* A-device SRP detected */ -#define OTGISR_BSRP (1 << 0) /* B-device SRP complete */ - -/* OTG Interrupt Enable Register */ -#define OTGIER_APRM (1 << 12) /* Mini-A plug removed */ -#define OTGIER_BPRM (1 << 11) /* Mini-B plug removed */ -#define OTGIER_OVD (1 << 10) /* over-current detected */ -#define OTGIER_IDCHG (1 << 9) /* ID(A/B) changed */ -#define OTGIER_RLCHG (1 << 8) /* Role(Host/Device) changed */ -#define OTGIER_BSESSEND (1 << 6) /* B-device Session End */ -#define OTGIER_AVBUSERR (1 << 5) /* A-device VBUS Error */ -#define OTGIER_ASRP (1 << 4) /* A-device SRP detected */ -#define OTGIER_BSRP (1 << 0) /* B-device SRP complete */ - -/* Global Interrupt Status Register (W1C) */ -#define ISR_HOST (1 << 2) /* USB Host interrupt */ -#define ISR_OTG (1 << 1) /* USB OTG interrupt */ -#define ISR_DEV (1 << 0) /* USB Device interrupt */ -#define ISR_MASK 0x07 - -/* Global Interrupt Mask Register */ -#define IMR_IRQLH (1 << 3) /* Interrupt triggered at level-high */ -#define IMR_IRQLL (0 << 3) /* Interrupt triggered at level-low */ -#define IMR_HOST (1 << 2) /* USB Host interrupt */ -#define IMR_OTG (1 << 1) /* USB OTG interrupt */ -#define IMR_DEV (1 << 0) /* USB Device interrupt */ -#define IMR_MASK 0x0f - -/* Device Control Register */ -#define DEVCTRL_FS_FORCED (1 << 9) /* Forced to be Full-Speed Mode */ -#define DEVCTRL_HS (1 << 6) /* High Speed Mode */ -#define DEVCTRL_FS (0 << 6) /* Full Speed Mode */ -#define DEVCTRL_EN (1 << 5) /* Chip Enable */ -#define DEVCTRL_RESET (1 << 4) /* Chip Software Reset */ -#define DEVCTRL_SUSPEND (1 << 3) /* Enter Suspend Mode */ -#define DEVCTRL_GIRQ_EN (1 << 2) /* Global Interrupt Enabled */ -#define DEVCTRL_HALFSPD (1 << 1) /* Half speed mode for FPGA test */ -#define DEVCTRL_RWAKEUP (1 << 0) /* Enable remote wake-up */ - -/* Device Address Register */ -#define DEVADDR_CONF (1 << 7) /* SET_CONFIGURATION has been executed */ -#define DEVADDR_ADDR(x) ((x) & 0x7f) -#define DEVADDR_ADDR_MASK 0x7f - -/* Device Test Register */ -#define DEVTEST_NOSOF (1 << 6) /* Do not generate SOF */ -#define DEVTEST_TST_MODE (1 << 5) /* Enter Test Mode */ -#define DEVTEST_TST_NOTS (1 << 4) /* Do not toggle sequence */ -#define DEVTEST_TST_NOCRC (1 << 3) /* Do not append CRC */ -#define DEVTEST_TST_CLREA (1 << 2) /* Clear External Side Address */ -#define DEVTEST_TST_CXLP (1 << 1) /* EP0 loopback test */ -#define DEVTEST_TST_CLRFF (1 << 0) /* Clear FIFO */ - -/* SOF Frame Number Register */ -#define SOFFNR_UFN(x) (((x) >> 11) & 0x7) /* SOF Micro-Frame Number */ -#define SOFFNR_FNR(x) ((x) & 0x7ff) /* SOF Frame Number */ - -/* SOF Mask Timer Register */ -#define SOFMTR_TMR(x) ((x) & 0xffff) - -/* PHY Test Mode Selector Register */ -#define PHYTMSR_TST_PKT (1 << 4) /* Packet send test */ -#define PHYTMSR_TST_SE0NAK (1 << 3) /* High-Speed quiescent state */ -#define PHYTMSR_TST_KSTA (1 << 2) /* High-Speed K state */ -#define PHYTMSR_TST_JSTA (1 << 1) /* High-Speed J state */ -#define PHYTMSR_UNPLUG (1 << 0) /* Enable soft-detachment */ - -/* CX FIFO Register */ -#define CXFIFO_BYTES(x) (((x) >> 24) & 0x7f) /* CX/EP0 FIFO byte count */ -#define CXFIFO_FIFOE(x) (1 << (((x) & 0x03) + 8)) /* EPx FIFO empty */ -#define CXFIFO_FIFOE_FIFO0 (1 << 8) -#define CXFIFO_FIFOE_FIFO1 (1 << 9) -#define CXFIFO_FIFOE_FIFO2 (1 << 10) -#define CXFIFO_FIFOE_FIFO3 (1 << 11) -#define CXFIFO_FIFOE_MASK (0x0f << 8) -#define CXFIFO_CXFIFOE (1 << 5) /* CX FIFO empty */ -#define CXFIFO_CXFIFOF (1 << 4) /* CX FIFO full */ -#define CXFIFO_CXFIFOCLR (1 << 3) /* CX FIFO clear */ -#define CXFIFO_CXSTALL (1 << 2) /* CX Stall */ -#define CXFIFO_TSTPKTFIN (1 << 1) /* Test packet data transfer finished */ -#define CXFIFO_CXFIN (1 << 0) /* CX data transfer finished */ - -/* IDLE Counter Register */ -#define IDLE_MS(x) ((x) & 0x07) /* PHY suspend delay = x ms */ - -/* Group Interrupt Mask(Disable) Register */ -#define GIMR_GRP2 (1 << 2) /* Disable interrupt group 2 */ -#define GIMR_GRP1 (1 << 1) /* Disable interrupt group 1 */ -#define GIMR_GRP0 (1 << 0) /* Disable interrupt group 0 */ -#define GIMR_MASK 0x07 - -/* Group Interrupt Mask(Disable) Register 0 (CX) */ -#define GIMR0_CXABORT (1 << 5) /* CX command abort interrupt */ -#define GIMR0_CXERR (1 << 4) /* CX command error interrupt */ -#define GIMR0_CXEND (1 << 3) /* CX command end interrupt */ -#define GIMR0_CXOUT (1 << 2) /* EP0-OUT packet interrupt */ -#define GIMR0_CXIN (1 << 1) /* EP0-IN packet interrupt */ -#define GIMR0_CXSETUP (1 << 0) /* EP0-SETUP packet interrupt */ -#define GIMR0_MASK 0x3f - -/* Group Interrupt Mask(Disable) Register 1 (FIFO) */ -#define GIMR1_FIFO_IN(x) (1 << (((x) & 3) + 16)) /* FIFOx IN */ -#define GIMR1_FIFO_TX(x) GIMR1_FIFO_IN(x) -#define GIMR1_FIFO_OUT(x) (1 << (((x) & 3) * 2)) /* FIFOx OUT */ -#define GIMR1_FIFO_SPK(x) (1 << (((x) & 3) * 2 + 1)) /* FIFOx SHORT PACKET */ -#define GIMR1_FIFO_RX(x) (GIMR1_FIFO_OUT(x) | GIMR1_FIFO_SPK(x)) -#define GIMR1_MASK 0xf00ff - -/* Group Interrupt Mask(Disable) Register 2 (Device) */ -#define GIMR2_WAKEUP (1 << 10) /* Device waked up */ -#define GIMR2_IDLE (1 << 9) /* Device idle */ -#define GIMR2_DMAERR (1 << 8) /* DMA error */ -#define GIMR2_DMAFIN (1 << 7) /* DMA finished */ -#define GIMR2_ZLPRX (1 << 6) /* Zero-Length-Packet Rx Interrupt */ -#define GIMR2_ZLPTX (1 << 5) /* Zero-Length-Packet Tx Interrupt */ -#define GIMR2_ISOCABT (1 << 4) /* ISOC Abort Interrupt */ -#define GIMR2_ISOCERR (1 << 3) /* ISOC Error Interrupt */ -#define GIMR2_RESUME (1 << 2) /* Resume state change Interrupt */ -#define GIMR2_SUSPEND (1 << 1) /* Suspend state change Interrupt */ -#define GIMR2_RESET (1 << 0) /* Reset Interrupt */ -#define GIMR2_MASK 0x7ff - -/* Group Interrupt Status Register */ -#define GISR_GRP2 (1 << 2) /* Interrupt group 2 */ -#define GISR_GRP1 (1 << 1) /* Interrupt group 1 */ -#define GISR_GRP0 (1 << 0) /* Interrupt group 0 */ - -/* Group Interrupt Status Register 0 (CX) */ -#define GISR0_CXABORT (1 << 5) /* CX command abort interrupt */ -#define GISR0_CXERR (1 << 4) /* CX command error interrupt */ -#define GISR0_CXEND (1 << 3) /* CX command end interrupt */ -#define GISR0_CXOUT (1 << 2) /* EP0-OUT packet interrupt */ -#define GISR0_CXIN (1 << 1) /* EP0-IN packet interrupt */ -#define GISR0_CXSETUP (1 << 0) /* EP0-SETUP packet interrupt */ - -/* Group Interrupt Status Register 1 (FIFO) */ -#define GISR1_IN_FIFO(x) (1 << (((x) & 0x03) + 16)) /* FIFOx IN */ -#define GISR1_OUT_FIFO(x) (1 << (((x) & 0x03) * 2)) /* FIFOx OUT */ -#define GISR1_SPK_FIFO(x) (1 << (((x) & 0x03) * 2 + 1)) /* FIFOx SPK */ -#define GISR1_RX_FIFO(x) (3 << (((x) & 0x03) * 2)) /* FIFOx OUT/SPK */ - -/* Group Interrupt Status Register 2 (Device) */ -#define GISR2_WAKEUP (1 << 10) /* Device waked up */ -#define GISR2_IDLE (1 << 9) /* Device idle */ -#define GISR2_DMAERR (1 << 8) /* DMA error */ -#define GISR2_DMAFIN (1 << 7) /* DMA finished */ -#define GISR2_ZLPRX (1 << 6) /* Zero-Length-Packet Rx Interrupt */ -#define GISR2_ZLPTX (1 << 5) /* Zero-Length-Packet Tx Interrupt */ -#define GISR2_ISOCABT (1 << 4) /* ISOC Abort Interrupt */ -#define GISR2_ISOCERR (1 << 3) /* ISOC Error Interrupt */ -#define GISR2_RESUME (1 << 2) /* Resume state change Interrupt */ -#define GISR2_SUSPEND (1 << 1) /* Suspend state change Interrupt */ -#define GISR2_RESET (1 << 0) /* Reset Interrupt */ - -/* Receive Zero-Length-Packet Register */ -#define RXZLP_EP(x) (1 << ((x) - 1)) /* EPx ZLP rx interrupt */ - -/* Transfer Zero-Length-Packet Register */ -#define TXZLP_EP(x) (1 << ((x) - 1)) /* EPx ZLP tx interrupt */ - -/* ISOC Error/Abort Status Register */ -#define ISOEASR_EP(x) (0x10001 << ((x) - 1)) /* EPx ISOC Error/Abort */ - -/* IN Endpoint Register */ -#define IEP_SENDZLP (1 << 15) /* Send Zero-Length-Packet */ -#define IEP_TNRHB(x) (((x) & 0x03) << 13) \ - /* Transaction Number for High-Bandwidth EP(ISOC) */ -#define IEP_RESET (1 << 12) /* Reset Toggle Sequence */ -#define IEP_STALL (1 << 11) /* Stall */ -#define IEP_MAXPS(x) ((x) & 0x7ff) /* Max. packet size */ - -/* OUT Endpoint Register */ -#define OEP_RESET (1 << 12) /* Reset Toggle Sequence */ -#define OEP_STALL (1 << 11) /* Stall */ -#define OEP_MAXPS(x) ((x) & 0x7ff) /* Max. packet size */ - -/* Endpoint Map Register (EP1 ~ EP4) */ -#define EPMAP14_SET_IN(ep, fifo) \ - ((fifo) & 3) << (((ep) - 1) << 3 + 0) -#define EPMAP14_SET_OUT(ep, fifo) \ - ((fifo) & 3) << (((ep) - 1) << 3 + 4) -#define EPMAP14_SET(ep, in, out) \ - do { \ - EPMAP14_SET_IN(ep, in); \ - EPMAP14_SET_OUT(ep, out); \ - } while (0) - -#define EPMAP14_DEFAULT 0x33221100 /* EP1->FIFO0, EP2->FIFO1... */ - -/* Endpoint Map Register (EP5 ~ EP8) */ -#define EPMAP58_SET_IN(ep, fifo) \ - ((fifo) & 3) << (((ep) - 5) << 3 + 0) -#define EPMAP58_SET_OUT(ep, fifo) \ - ((fifo) & 3) << (((ep) - 5) << 3 + 4) -#define EPMAP58_SET(ep, in, out) \ - do { \ - EPMAP58_SET_IN(ep, in); \ - EPMAP58_SET_OUT(ep, out); \ - } while (0) - -#define EPMAP58_DEFAULT 0x00000000 /* All EPx->FIFO0 */ - -/* FIFO Map Register */ -#define FIFOMAP_BIDIR (2 << 4) -#define FIFOMAP_IN (1 << 4) -#define FIFOMAP_OUT (0 << 4) -#define FIFOMAP_DIR_MASK 0x30 -#define FIFOMAP_EP(x) ((x) & 0x0f) -#define FIFOMAP_EP_MASK 0x0f -#define FIFOMAP_CFG_MASK 0x3f -#define FIFOMAP_DEFAULT 0x04030201 /* FIFO0->EP1, FIFO1->EP2... */ -#define FIFOMAP(fifo, cfg) (((cfg) & 0x3f) << (((fifo) & 3) << 3)) - -/* FIFO Configuration Register */ -#define FIFOCFG_EN (1 << 5) -#define FIFOCFG_BLKSZ_1024 (1 << 4) -#define FIFOCFG_BLKSZ_512 (0 << 4) -#define FIFOCFG_3BLK (2 << 2) -#define FIFOCFG_2BLK (1 << 2) -#define FIFOCFG_1BLK (0 << 2) -#define FIFOCFG_NBLK_MASK 3 -#define FIFOCFG_NBLK_SHIFT 2 -#define FIFOCFG_INTR (3 << 0) -#define FIFOCFG_BULK (2 << 0) -#define FIFOCFG_ISOC (1 << 0) -#define FIFOCFG_RSVD (0 << 0) /* Reserved */ -#define FIFOCFG_TYPE_MASK 3 -#define FIFOCFG_TYPE_SHIFT 0 -#define FIFOCFG_CFG_MASK 0x3f -#define FIFOCFG(fifo, cfg) (((cfg) & 0x3f) << (((fifo) & 3) << 3)) - -/* FIFO Control Status Register */ -#define FIFOCSR_RESET (1 << 12) /* FIFO Reset */ -#define FIFOCSR_BYTES(x) ((x) & 0x7ff) /* Length(bytes) for OUT-EP/FIFO */ - -/* DMA Target FIFO Register */ -#define DMAFIFO_CX (1 << 4) /* DMA FIFO = CX FIFO */ -#define DMAFIFO_FIFO(x) (1 << ((x) & 0x3)) /* DMA FIFO = FIFOx */ - -/* DMA Control Register */ -#define DMACTRL_LEN(x) (((x) & 0x1ffff) << 8) /* DMA length (Bytes) */ -#define DMACTRL_LEN_SHIFT 8 -#define DMACTRL_CLRFF (1 << 4) /* Clear FIFO upon DMA abort */ -#define DMACTRL_ABORT (1 << 3) /* DMA abort */ -#define DMACTRL_IO2IO (1 << 2) /* IO to IO */ -#define DMACTRL_FIFO2MEM (0 << 1) /* FIFO to Memory */ -#define DMACTRL_MEM2FIFO (1 << 1) /* Memory to FIFO */ -#define DMACTRL_START (1 << 0) /* DMA start */ - -#endif -- cgit v1.3.1