From 0501c997a0aa647ec6995a6e662b677db037ee5c Mon Sep 17 00:00:00 2001 From: Andrii Chepurnyi Date: Tue, 3 Oct 2023 08:58:28 +0000 Subject: board: xen: introduce virtio-blk support Added new xenguest_arm64_virtio_defconfig which enables support for virtio-blk using various types of transport like virtio-pci, vrtio-mmio. Currently supported: up to 2 PCI host bridges and 10 MMIO devices. Note: DT parsing code was partly taken from pci-uclass.c Limitation: All memory regions should be below 4GB address space. Signed-off-by: Andrii Chepurnyi --- include/configs/xenguest_arm64.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index bc268d25dc3..3dce25b60e7 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -14,9 +14,15 @@ #undef CFG_SYS_SDRAM_BASE #undef CFG_EXTRA_ENV_SETTINGS + +#ifdef CONFIG_VIRTIO_BLK +#define CFG_EXTRA_ENV_SETTINGS \ + "virtioboot=virtio scan; ext4load virtio 0 0x90000000 /boot/Image;" \ + "booti 0x90000000 - ${fdtcontroladdr};\0" +#else #define CFG_EXTRA_ENV_SETTINGS \ - "loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \ - "pvblockboot=run loadimage;" \ + "pvblockboot=ext4load pvblock 0 0x90000000 /boot/Image;" \ "booti 0x90000000 - 0x88000000;\0" +#endif #endif /* __XENGUEST_ARM64_H */ -- cgit v1.3.1 From e65f6ba08b4c75f1703d05b9524413da3c052b5e Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 5 Sep 2023 15:48:08 +0200 Subject: event: Rename rest of EVENT_SPY to EVENT_SPY_FULL or EVENT_SPY* Fix up remaining occurances of EVENT_SPY with no suffix. Fixes: 6c4cad7438 ("event: Rename EVENT_SPY to EVENT_SPY_FULL") Signed-off-by: Marek Vasut Reviewed-by: Simon Glass --- common/Kconfig | 4 ++-- include/event.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/common/Kconfig b/common/Kconfig index 5e79b542217..93c96f23b01 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -620,7 +620,7 @@ config EVENT_DYNAMIC bool help Enable this to support adding an event spy at runtime, without adding - it to the EVENT_SPY() linker list. This increases code size slightly + it to the EVENT_SPY*() linker list. This increases code size slightly but provides more flexibility for boards and subsystems that need it. config EVENT_DEBUG @@ -648,7 +648,7 @@ config SPL_EVENT_DYNAMIC depends on SPL_EVENT && EVENT_DYNAMIC help Enable this to support adding an event spy at runtime, without adding - it to the EVENT_SPY() linker list. This increases code size slightly + it to the EVENT_SPY*() linker list. This increases code size slightly but provides more flexibility for boards and subsystems that need it. endif # EVENT diff --git a/include/event.h b/include/event.h index be4cefd6ae8..c5646b713ad 100644 --- a/include/event.h +++ b/include/event.h @@ -282,9 +282,9 @@ static inline const char *event_spy_id(struct evspy_info *spy) * { * return sandbox_early_getopt_check(); * } - * EVENT_SPY(EVT_MISC_INIT_F, sandbox_misc_init_f); + * EVENT_SPY_FULL(EVT_MISC_INIT_F, sandbox_misc_init_f); * - * where EVENT_SPY uses ll_entry_declare() + * where EVENT_SPY_FULL uses ll_entry_declare() * * In this case, LTO decides to drop the sandbox_misc_init_f() function * (which is fine) but then drops the linker-list entry too. This means -- cgit v1.3.1 From 3d5e52bd97f747694fac9259b4d2879a48256a7b Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Sun, 1 Oct 2023 23:52:12 +0100 Subject: ARM: psci: move GIC address override to Kconfig As the code to switch an ARM core from secure to the non-secure state needs to know the base address of the Generic Interrupt Controller (GIC), we read an Arm Cortex defined system register that is supposed to hold that base address. However there are SoCs out there that get this wrong, and this CBAR register either reads as 0 or points to the wrong address. To accommodate those systems, so far we use a macro defined in some platform specific header files, for affected boards. To simplify future extensions, replace that macro with a Kconfig variable that holds this override address, and define a default value for SoCs that need it. Signed-off-by: Andre Przywara Reviewed-by: Sam Edwards --- arch/arm/cpu/armv7/Kconfig | 10 ++++++++++ arch/arm/cpu/armv7/nonsec_virt.S | 4 ++-- arch/arm/cpu/armv7/virt-v7.c | 4 ++-- include/configs/arndale.h | 3 --- 4 files changed, 14 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index ccc2f208677..f015d133cb0 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -58,6 +58,16 @@ config ARMV7_SECURE_MAX_SIZE default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3 default 0x10000 +config ARM_GIC_BASE_ADDRESS + hex + depends on ARMV7_NONSEC + depends on ARCH_EXYNOS5 + default 0x10480000 if ARCH_EXYNOS5 + help + Override the GIC base address if the Arm Cortex defined + CBAR/PERIPHBASE system register holds the wrong value. + Used by the PSCI code to configure the secure side of the GIC. + config ARMV7_VIRT bool "Enable support for hardware virtualization" if EXPERT depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 9004074da2c..bed40fa3d99 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -112,8 +112,8 @@ ENTRY(_do_nonsec_entry) ENDPROC(_do_nonsec_entry) .macro get_cbar_addr addr -#ifdef CFG_ARM_GIC_BASE_ADDRESS - ldr \addr, =CFG_ARM_GIC_BASE_ADDRESS +#ifdef CONFIG_ARM_GIC_BASE_ADDRESS + ldr \addr, =CONFIG_ARM_GIC_BASE_ADDRESS #else mrc p15, 4, \addr, c15, c0, 0 @ read CBAR bfc \addr, #0, #15 @ clear reserved bits diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c index c82b215b6f9..5ffeca13d91 100644 --- a/arch/arm/cpu/armv7/virt-v7.c +++ b/arch/arm/cpu/armv7/virt-v7.c @@ -26,8 +26,8 @@ static unsigned int read_id_pfr1(void) static unsigned long get_gicd_base_address(void) { -#ifdef CFG_ARM_GIC_BASE_ADDRESS - return CFG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET; +#ifdef CONFIG_ARM_GIC_BASE_ADDRESS + return CONFIG_ARM_GIC_BASE_ADDRESS + GIC_DIST_OFFSET; #else unsigned periphbase; diff --git a/include/configs/arndale.h b/include/configs/arndale.h index b56effcd411..fa642564f4b 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -18,7 +18,4 @@ #define CFG_SMP_PEN_ADDR 0x02020000 -/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ -#define CFG_ARM_GIC_BASE_ADDRESS 0x10480000 - #endif /* __CONFIG_H */ -- cgit v1.3.1