From 96ca3147981ab1bdd10426a3d2792e1d99bad321 Mon Sep 17 00:00:00 2001 From: Tony Dinh Date: Thu, 21 Nov 2024 11:02:27 -0800 Subject: arm: kirkwood: Enable bootstd for Sheevaplug board Enable bootstd for Sheevaplug board. Remove JFFS2 support. See JFFS2 Vulnerability[1]. Enable LTO to keep board size within limit. Move default envs to text-base environment [1] https://lore.kernel.org/u-boot/20241114233005.GN3600562@bill-the-cat/T/#m2fc25da1d2c019bc3cd8676991fdd64b8a21aa9b Signed-off-by: Tony Dinh Reviewed-by: Stefan Roese --- include/configs/sheevaplug.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'include') diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 4e0b3c663c7..0a5f23e4c88 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -12,13 +12,4 @@ #include "mv-common.h" -/* - * Environment variables configurations - */ -#define CFG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ - "=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \ - "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \ - "x_bootcmd_usb=usb start\0" \ - "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" - #endif /* _CONFIG_SHEEVAPLUG_H */ -- cgit v1.2.3 From 3eef899b57fd2522a5d975b2957d2f2c0635a652 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 22 Nov 2024 13:30:15 +1300 Subject: arm: mvebu: x240: Use default baudrate table Remove CFG_SYS_BAUDRATE_TABLE as there's no reason not to use the defaults defined via config_fallbacks.h. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- include/configs/x240.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/x240.h b/include/configs/x240.h index 3601df588d5..bc66e4e3c8e 100644 --- a/include/configs/x240.h +++ b/include/configs/x240.h @@ -11,9 +11,6 @@ /* additions for new ARM relocation support */ #define CFG_SYS_SDRAM_BASE 0x200000000 -#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ - 115200, 230400, 460800, 921600 } - /* Default Env vars */ #define BOOT_TARGET_DEVICES(func) \ -- cgit v1.2.3 From 27b24887352bfcc360ccd14c44e4e9a767a9505a Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 22 Nov 2024 13:30:16 +1300 Subject: arm: mvebu: x240: Switch to standard boot Use standard boot instead of the distro boot scripts. Regenerate the board defconfig now that some options are selected automatically. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- include/configs/x240.h | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/x240.h b/include/configs/x240.h index bc66e4e3c8e..05241f33d74 100644 --- a/include/configs/x240.h +++ b/include/configs/x240.h @@ -12,18 +12,13 @@ #define CFG_SYS_SDRAM_BASE 0x200000000 /* Default Env vars */ - -#define BOOT_TARGET_DEVICES(func) \ - func(USB, usb, 0) \ - func(DHCP, dhcp, na) - -#include +#define BOOT_TARGETS "usb dhcp" #define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV \ "kernel_addr_r=0x202000000\0" \ "fdt_addr_r=0x201000000\0" \ "ramdisk_addr_r=0x206000000\0" \ + "boot_targets=" BOOT_TARGETS "\0" \ "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" /* -- cgit v1.2.3 From 1b46176532a514a3f38db5e401ecfde744344c7f Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 22 Nov 2024 13:30:19 +1300 Subject: arm: mvebu: x530: Remove dead comments As things have been moved to Kconfig there are a number of dead comments left over in x530.h. Remove them. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- include/configs/x530.h | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'include') diff --git a/include/configs/x530.h b/include/configs/x530.h index 982b1292873..c7bfd1de17c 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -18,30 +18,14 @@ #define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif -/* - * Serial Port configuration - * The following definitions let you select what serial you want to use - * for your console driver. - */ - /* NAND */ #define BBT_CUSTOM_SCAN #define BBT_CUSTOM_SCAN_PAGE 0 #define BBT_CUSTOM_SCAN_POSITION 2048 -/* SPI NOR flash default params, used by sf commands */ - #define MTDPARTS_MTDOOPS "errlog" -/* Partition support */ - -/* Additional FS support/configuration */ - -/* Environment in SPI NOR flash */ - -/* NAND */ - #include /* Keep device tree and initrd in low memory so the kernel can access them */ -- cgit v1.2.3 From 7446e29db54818324859126739c3477a15d25c36 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Tue, 26 Nov 2024 08:55:53 +1300 Subject: arm: mvebu: Add Allied Telesis x250 board The x250 and SE250 are series of 10G L2+ switches from Allied Telesis. There are a number of them in the range but as far as U-Boot is concerned all the CPU block components are the same so there's only one board defined. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- include/configs/x250.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 include/configs/x250.h (limited to 'include') diff --git a/include/configs/x250.h b/include/configs/x250.h new file mode 100644 index 00000000000..39f523fa6c4 --- /dev/null +++ b/include/configs/x250.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2024 Allied Telesis + */ + +#ifndef __X250_H_ +#define __X250_H_ + +/* + * High Level Configuration Options (easy to change) + */ +#define CFG_SYS_TCLK 250000000 /* 250MHz */ + +/* additions for new ARM relocation support */ +#define CFG_SYS_SDRAM_BASE 0x00000000 + +#define BOOT_TARGETS "usb scsi pxe dhcp" + +#define CFG_EXTRA_ENV_SETTINGS \ + "scriptaddr=0x6d00000\0" \ + "pxefile_addr_r=0x6e00000\0" \ + "fdt_addr_r=0x6f00000\0" \ + "kernel_addr_r=0x7000000\0" \ + "ramdisk_addr_r=0xa000000\0" \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "boot_targets=" BOOT_TARGETS "\0" + +#endif /* __X250_H_ */ -- cgit v1.2.3 From ec3e5fa55d8232f3e5938a2702e20fa432600adf Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 29 Nov 2024 01:13:55 +0100 Subject: ARM: imx: Perform plain boot in altbootcmd on Data Modul i.MX8M Mini/Plus eDM SBC The current A/B switching preparatory altbootcmd is confusing to users, replace it with plain 'run bootcmd' which can be replaced by proper A/B switching altbootcmd when the matching updater is added on top of the platform. By default, keep the boot counter incrementing, but do not do any A/B partition switching. Signed-off-by: Marek Vasut --- include/configs/imx8mm_data_modul_edm_sbc.h | 2 +- include/configs/imx8mp_data_modul_edm_sbc.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index d323f84ac7a..57ecb5e2190 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -34,7 +34,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 #define CFG_EXTRA_ENV_SETTINGS \ - "altbootcmd=setenv devpart 2 && run bootcmd ; reset\0" \ + "altbootcmd=run bootcmd\0" \ "bootlimit=3\0" \ "devtype=mmc\0" \ "devpart=1\0" \ diff --git a/include/configs/imx8mp_data_modul_edm_sbc.h b/include/configs/imx8mp_data_modul_edm_sbc.h index f953847ce05..de5bdd30e18 100644 --- a/include/configs/imx8mp_data_modul_edm_sbc.h +++ b/include/configs/imx8mp_data_modul_edm_sbc.h @@ -24,7 +24,7 @@ #define FEC_QUIRK_ENET_MAC #define CFG_EXTRA_ENV_SETTINGS \ - "altbootcmd=setenv devpart 2 && run bootcmd ; reset\0" \ + "altbootcmd=run bootcmd\0" \ "bootlimit=3\0" \ "devtype=mmc\0" \ "devpart=1\0" \ -- cgit v1.2.3 From 924a5e4e41e99cefabc465c82ffd91374d38a1e7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sun, 1 Dec 2024 07:42:35 -0700 Subject: Revert "global_data: Drop spl_handoff" This breaks chromebook_coral which says: Video: No video mode configured in FSP! This reverts commit 2e9313179a846b581c0fc3f6a49e19f3d343efa8. Signed-off-by: Simon Glass --- include/asm-generic/global_data.h | 6 ++++++ include/handoff.h | 7 ------- 2 files changed, 6 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 26277b93976..789adf2c3f9 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -400,6 +400,12 @@ struct global_data { */ struct bloblist_hdr *bloblist; #endif +#if CONFIG_IS_ENABLED(HANDOFF) + /** + * @spl_handoff: SPL hand-off information + */ + struct spl_handoff *spl_handoff; +#endif #if defined(CONFIG_TRANSLATION_OFFSET) /** * @translation_offset: optional translation offset diff --git a/include/handoff.h b/include/handoff.h index 0072ea832f8..c0ae7b19a75 100644 --- a/include/handoff.h +++ b/include/handoff.h @@ -31,13 +31,6 @@ void handoff_save_dram(struct spl_handoff *ho); void handoff_load_dram_size(struct spl_handoff *ho); void handoff_load_dram_banks(struct spl_handoff *ho); -/** - * handoff_get() - Get the SPL handoff information - * - * Return: Pointer to SPL handoff if received, else NULL - */ -struct spl_handoff *handoff_get(void); - /** * handoff_arch_save() - Save arch-specific info into the handoff area * -- cgit v1.2.3 From c7401fc1d99b88a3a3d16519f07974473908cd46 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Fri, 6 Dec 2024 12:37:09 +0100 Subject: net: disable MBEDTLS in SPL Building SPL fails with MBEDTLS enabled. Currently we don't need it there. Signed-off-by: Heinrich Schuchardt Acked-by: Jerome Forissier --- include/u-boot/md5.h | 6 ++++-- include/u-boot/sha1.h | 5 +++-- include/u-boot/sha256.h | 5 +++-- include/u-boot/sha512.h | 5 +++-- 4 files changed, 13 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h index c98b1a58088..2a52e169051 100644 --- a/include/u-boot/md5.h +++ b/include/u-boot/md5.h @@ -6,7 +6,9 @@ #ifndef _MD5_H #define _MD5_H -#if defined(CONFIG_MBEDTLS_LIB_CRYPTO) +#include + +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) #include #endif #include "compiler.h" @@ -14,7 +16,7 @@ #define MD5_SUM_LEN 16 #define MD5_DEF_CHUNK_SZ 0x10000 -#if defined(CONFIG_MBEDTLS_LIB_CRYPTO) +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) typedef mbedtls_md5_context MD5Context; #else typedef struct MD5Context { diff --git a/include/u-boot/sha1.h b/include/u-boot/sha1.h index 2fca7f1be16..dd66258bbe9 100644 --- a/include/u-boot/sha1.h +++ b/include/u-boot/sha1.h @@ -14,9 +14,10 @@ #ifndef _SHA1_H #define _SHA1_H +#include #include -#if defined(CONFIG_MBEDTLS_LIB_CRYPTO) +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) /* * FIXME: * MbedTLS define the members of "mbedtls_sha256_context" as private, @@ -47,7 +48,7 @@ extern "C" { extern const uint8_t sha1_der_prefix[]; -#if defined(CONFIG_MBEDTLS_LIB_CRYPTO) +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) typedef mbedtls_sha1_context sha1_context; #else /** diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h index b58d5b58d39..44a9b528b48 100644 --- a/include/u-boot/sha256.h +++ b/include/u-boot/sha256.h @@ -1,9 +1,10 @@ #ifndef _SHA256_H #define _SHA256_H +#include #include -#if defined(CONFIG_MBEDTLS_LIB_CRYPTO) +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) /* * FIXME: * MbedTLS define the members of "mbedtls_sha256_context" as private, @@ -27,7 +28,7 @@ extern const uint8_t sha256_der_prefix[]; /* Reset watchdog each time we process this many bytes */ #define CHUNKSZ_SHA256 (64 * 1024) -#if defined(CONFIG_MBEDTLS_LIB_CRYPTO) +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) typedef mbedtls_sha256_context sha256_context; #else typedef struct { diff --git a/include/u-boot/sha512.h b/include/u-boot/sha512.h index 7e10f590a1d..92660d93357 100644 --- a/include/u-boot/sha512.h +++ b/include/u-boot/sha512.h @@ -1,9 +1,10 @@ #ifndef _SHA512_H #define _SHA512_H +#include #include -#if defined(CONFIG_MBEDTLS_LIB_CRYPTO) +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) #include #endif @@ -16,7 +17,7 @@ #define CHUNKSZ_SHA384 (16 * 1024) #define CHUNKSZ_SHA512 (16 * 1024) -#if defined(CONFIG_MBEDTLS_LIB_CRYPTO) +#if CONFIG_IS_ENABLED(MBEDTLS_LIB_CRYPTO) typedef mbedtls_sha512_context sha384_context; typedef mbedtls_sha512_context sha512_context; #else -- cgit v1.2.3 From 215663f5e47db92c6c13107e877a943c3e70aa2a Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Wed, 20 Nov 2024 09:48:28 +0000 Subject: pinctrl: rzg2l: Support 2.5V PVDD for Ethernet interfaces The Ethenet interfaces on the Renesas RZ/G2L SoC family can operate at multiple power supply voltages: 3.3V (default value), 2.5V and 1.8V. rzg2l_pinconf_set() is extended to support the 2.5V setting, with a check to ensure this is only used on Ethernet interfaces as it is not supported on the SD & QSPI interfaces. While we're modifying rzg2l_pinconf_set(), drop the unnecessary default value for pwr_reg as it is set in every branch of the following if condition. Signed-off-by: Paul Barker Reviewed-by: Marek Vasut --- include/renesas/rzg2l-pfc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/renesas/rzg2l-pfc.h b/include/renesas/rzg2l-pfc.h index 2df17ece2a3..d1015b1d2ac 100644 --- a/include/renesas/rzg2l-pfc.h +++ b/include/renesas/rzg2l-pfc.h @@ -77,9 +77,11 @@ #define IEN(n) (0x1800 + (n) * 8) #define PWPR 0x3014 #define SD_CH(n) (0x3000 + (n) * 4) +#define ETH_POC(ch) (0x300c + (ch) * 4) #define QSPI 0x3008 #define PVDD_1800 1 /* I/O domain voltage <= 1.8V */ +#define PVDD_2500 2 /* I/O domain voltage 2.5V */ #define PVDD_3300 0 /* I/O domain voltage >= 3.3V */ #define PWPR_B0WI BIT(7) /* Bit Write Disable */ -- cgit v1.2.3 From bba516a772853595901a7359209bc588d2bffda0 Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Wed, 20 Nov 2024 09:48:29 +0000 Subject: pinctrl: rzg2l: Support Ethernet TXC output enable On the RZ/G2L SoC family, the direction of the Ethernet TXC/TX_CLK signal is selectable to support an Ethernet PHY operating in either MII or RGMII mode. By default, the signal is configured as an input and MII mode is supported. The ETH_MODE register can be modified to configure this signal as an output to support RGMII mode. As this signal is be default an input, and can optionally be switched to an output, it maps neatly onto an `output-enable` property in the device tree. Signed-off-by: Paul Barker Reviewed-by: Marek Vasut --- include/renesas/rzg2l-pfc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/renesas/rzg2l-pfc.h b/include/renesas/rzg2l-pfc.h index d1015b1d2ac..0c94487754d 100644 --- a/include/renesas/rzg2l-pfc.h +++ b/include/renesas/rzg2l-pfc.h @@ -22,6 +22,7 @@ #define PIN_CFG_FILONOFF BIT(10) #define PIN_CFG_FILNUM BIT(11) #define PIN_CFG_FILCLKSEL BIT(12) +#define PIN_CFG_OEN BIT(13) #define RZG2L_MPXED_PIN_FUNCS (PIN_CFG_IOLH_A | \ PIN_CFG_SR | \ @@ -79,6 +80,7 @@ #define SD_CH(n) (0x3000 + (n) * 4) #define ETH_POC(ch) (0x300c + (ch) * 4) #define QSPI 0x3008 +#define ETH_MODE 0x3018 #define PVDD_1800 1 /* I/O domain voltage <= 1.8V */ #define PVDD_2500 2 /* I/O domain voltage 2.5V */ -- cgit v1.2.3