From 9c77cb73c7648b24ea251392148e2bc386b990d3 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 2 Nov 2017 11:51:59 +0100 Subject: arm64: zynqmp: Update device tree for pinmux Added pin control support in device tree for zynqmp. Signed-off-by: Chirag Parekh Signed-off-by: Michal Simek --- include/dt-bindings/pinctrl/pinctrl-zynqmp.h | 30 ++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 include/dt-bindings/pinctrl/pinctrl-zynqmp.h (limited to 'include') diff --git a/include/dt-bindings/pinctrl/pinctrl-zynqmp.h b/include/dt-bindings/pinctrl/pinctrl-zynqmp.h new file mode 100644 index 00000000000..e1b81fe5ef2 --- /dev/null +++ b/include/dt-bindings/pinctrl/pinctrl-zynqmp.h @@ -0,0 +1,30 @@ +/* + * MIO pin configuration defines for Xilinx ZynqMP + * + * Copyright (C) 2017 Xilinx, Inc. + * Author: Chirag Parekh + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef _DT_BINDINGS_PINCTRL_ZYNQMP_H +#define _DT_BINDINGS_PINCTRL_ZYNQMP_H + +/* Bit value for IO standards */ +#define IO_STANDARD_LVCMOS33 0 +#define IO_STANDARD_LVCMOS18 1 + +/* Bit values for Slew Rates */ +#define SLEW_RATE_FAST 0 +#define SLEW_RATE_SLOW 1 + +/* Bit values for Pin inputs */ +#define PIN_INPUT_TYPE_CMOS 0 +#define PIN_INPUT_TYPE_SCHMITT 1 + +#endif /* _DT_BINDINGS_PINCTRL_ZYNQMP_H */ -- cgit v1.2.3