From 9efcb10a09d69d9cf14111dd452bbf54dc0502b4 Mon Sep 17 00:00:00 2001 From: Chia-Wei Wang Date: Tue, 10 Sep 2024 17:39:16 +0800 Subject: riscv: Add AST2700 SoC initial platform support AST2700 SoCs integrates a Ibex 32-bits RISC-V core as the boot MCU for the first stage bootloader execution, namely SPL. This patch implements the preliminary base to successfully run SPL on this RV32-based MCU to the console banner message. Signed-off-by: Chia-Wei Wang Reviewed-by: Leo Yu-Chi Liang --- include/configs/ibex_ast2700.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 include/configs/ibex_ast2700.h (limited to 'include') diff --git a/include/configs/ibex_ast2700.h b/include/configs/ibex_ast2700.h new file mode 100644 index 00000000000..0f6850f7240 --- /dev/null +++ b/include/configs/ibex_ast2700.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) Aspeed Technology Inc. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_SDRAM_BASE 0x80000000 + +#endif /* __CONFIG_H */ -- cgit v1.2.3