From 61298270c56d14f55e26ac17c8b5e110aa13e12c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pawe=C5=82=20Anikiel?= Date: Fri, 17 Jun 2022 12:47:20 +0200 Subject: config: Add Chameleonv3 config MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add defconfig and Kconfig files for Google Chameleon V3 board Signed-off-by: Paweł Anikiel Reviewed-by: Simon Glass --- include/configs/socfpga_chameleonv3.h | 44 +++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 include/configs/socfpga_chameleonv3.h (limited to 'include') diff --git a/include/configs/socfpga_chameleonv3.h b/include/configs/socfpga_chameleonv3.h new file mode 100644 index 00000000000..891b762946b --- /dev/null +++ b/include/configs/socfpga_chameleonv3.h @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2022 Google LLC + */ +#ifndef __SOCFGPA_CHAMELEONV3_H__ +#define __SOCFGPA_CHAMELEONV3_H__ + +#include + +#define CONFIG_SYS_BOOTM_LEN (32 * 1024 * 1024) + +/* + * U-Boot general configurations + */ + +/* Memory configurations */ +#define PHYS_SDRAM_1_SIZE 0x40000000 + +/* + * Serial / UART configurations + */ +#define CONFIG_SYS_NS16550_MEM32 +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=no\0" \ + "bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rw rootwait\0" \ + "distro_bootcmd=bridge enable; run bootcmd_mmc\0" \ + "bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm\0" \ + "bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm\0" + +/* + * L4 OSC1 Timer 0 + */ +/* reload value when timer count to zero */ +#define TIMER_LOAD_VAL 0xFFFFFFFF + +/* SPL memory allocation configuration, this is for FAT implementation */ +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00015000 + +/* The rest of the configuration is shared */ +#include + +#endif /* __SOCFGPA_CHAMELEONV3_H__ */ -- cgit v1.2.3