From 8eeb19be753da220819b0b3a95a746508455d149 Mon Sep 17 00:00:00 2001 From: Benoît Thébaudeau Date: Tue, 13 Nov 2012 09:55:30 +0000 Subject: mx31: Move EHCI definitions to ehci-fsl.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau Cc: Marek Vasut Cc: Stefano Babic --- include/usb/ehci-fsl.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'include') diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h index 28693020ece..4dee5b0bab1 100644 --- a/include/usb/ehci-fsl.h +++ b/include/usb/ehci-fsl.h @@ -246,9 +246,31 @@ struct usb_ehci { /* * For MXC SOCs */ + +/* values for portsc field */ +#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23) +#define MXC_EHCI_FORCE_FS (1 << 24) +#define MXC_EHCI_UTMI_8BIT (0 << 28) +#define MXC_EHCI_UTMI_16BIT (1 << 28) +#define MXC_EHCI_SERIAL (1 << 29) +#define MXC_EHCI_MODE_UTMI (0 << 30) +#define MXC_EHCI_MODE_PHILIPS (1 << 30) +#define MXC_EHCI_MODE_ULPI (2 << 30) +#define MXC_EHCI_MODE_SERIAL (3 << 30) + +/* values for flags field */ +#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0) +#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0) +#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0) +#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0) +#define MXC_EHCI_INTERFACE_MASK (0xf) + #define MXC_EHCI_POWER_PINS_ENABLED (1 << 5) #define MXC_EHCI_TTL_ENABLED (1 << 6) + #define MXC_EHCI_INTERNAL_PHY (1 << 7) +#define MXC_EHCI_IPPUE_DOWN (1 << 8) +#define MXC_EHCI_IPPUE_UP (1 << 9) /* Board-specific initialization */ int board_ehci_hcd_init(int port); -- cgit v1.3.1 From 31ac2d0c6af61b16ab8c3c6cefe61f53a06219d7 Mon Sep 17 00:00:00 2001 From: Benoît Thébaudeau Date: Tue, 13 Nov 2012 09:57:27 +0000 Subject: ehci-mxc: Make EHCI power/oc polarities configurable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make EHCI power and overcurrent polarities configurable. If not set, these new configurartions keep the default register values so that existing board files do not have to be changed. Signed-off-by: Benoît Thébaudeau Cc: Marek Vasut Cc: Stefano Babic --- drivers/usb/host/ehci-mx5.c | 56 +++++++++++++++++++++++++++++++++++++++++++++ include/usb/ehci-fsl.h | 10 ++++---- 2 files changed, 62 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index 6f7fe80a54f..7e60c3c3bf2 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -46,29 +46,43 @@ #define MXC_OTG_UCTRL_OWIE_BIT (1 << 27) /* OTG power mask */ #define MXC_OTG_UCTRL_OPM_BIT (1 << 24) +/* OTG power pin polarity */ +#define MXC_OTG_UCTRL_O_PWR_POL_BIT (1 << 24) /* Host1 ULPI interrupt enable */ #define MXC_H1_UCTRL_H1UIE_BIT (1 << 12) /* HOST1 wakeup intr enable */ #define MXC_H1_UCTRL_H1WIE_BIT (1 << 11) /* HOST1 power mask */ #define MXC_H1_UCTRL_H1PM_BIT (1 << 8) +/* HOST1 power pin polarity */ +#define MXC_H1_UCTRL_H1_PWR_POL_BIT (1 << 8) /* USB_PHY_CTRL_FUNC */ +/* OTG Polarity of Overcurrent */ +#define MXC_OTG_PHYCTRL_OC_POL_BIT (1 << 9) /* OTG Disable Overcurrent Event */ #define MXC_OTG_PHYCTRL_OC_DIS_BIT (1 << 8) +/* UH1 Polarity of Overcurrent */ +#define MXC_H1_OC_POL_BIT (1 << 6) /* UH1 Disable Overcurrent Event */ #define MXC_H1_OC_DIS_BIT (1 << 5) +/* OTG Power Pin Polarity */ +#define MXC_OTG_PHYCTRL_PWR_POL_BIT (1 << 3) /* USBH2CTRL */ +#define MXC_H2_UCTRL_H2_OC_POL_BIT (1 << 31) #define MXC_H2_UCTRL_H2_OC_DIS_BIT (1 << 30) #define MXC_H2_UCTRL_H2UIE_BIT (1 << 8) #define MXC_H2_UCTRL_H2WIE_BIT (1 << 7) #define MXC_H2_UCTRL_H2PM_BIT (1 << 4) +#define MXC_H2_UCTRL_H2_PWR_POL_BIT (1 << 4) /* USBH3CTRL */ +#define MXC_H3_UCTRL_H3_OC_POL_BIT (1 << 31) #define MXC_H3_UCTRL_H3_OC_DIS_BIT (1 << 30) #define MXC_H3_UCTRL_H3UIE_BIT (1 << 8) #define MXC_H3_UCTRL_H3WIE_BIT (1 << 7) +#define MXC_H3_UCTRL_H3_PWR_POL_BIT (1 << 4) /* USB_CTRL_1 */ #define MXC_USB_CTRL_UH1_EXT_CLK_EN (1 << 25) @@ -158,12 +172,22 @@ int mxc_set_usbcontrol(int port, unsigned int flags) if (flags & MXC_EHCI_INTERNAL_PHY) { v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); + if (flags & MXC_EHCI_OC_PIN_ACTIVE_LOW) + v |= MXC_OTG_PHYCTRL_OC_POL_BIT; + else + v &= ~MXC_OTG_PHYCTRL_OC_POL_BIT; if (flags & MXC_EHCI_POWER_PINS_ENABLED) /* OC/USBPWR is used */ v &= ~MXC_OTG_PHYCTRL_OC_DIS_BIT; else /* OC/USBPWR is not used */ v |= MXC_OTG_PHYCTRL_OC_DIS_BIT; +#ifdef CONFIG_MX51 + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MXC_OTG_PHYCTRL_PWR_POL_BIT; + else + v &= ~MXC_OTG_PHYCTRL_PWR_POL_BIT; +#endif __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); @@ -173,6 +197,12 @@ int mxc_set_usbcontrol(int port, unsigned int flags) v &= ~MXC_OTG_UCTRL_OPM_BIT; else v |= MXC_OTG_UCTRL_OPM_BIT; +#endif +#ifdef CONFIG_MX53 + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MXC_OTG_UCTRL_O_PWR_POL_BIT; + else + v &= ~MXC_OTG_UCTRL_O_PWR_POL_BIT; #endif __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET); } @@ -192,10 +222,20 @@ int mxc_set_usbcontrol(int port, unsigned int flags) v &= ~MXC_H1_UCTRL_H1PM_BIT; /* H1 power mask unused */ else v |= MXC_H1_UCTRL_H1PM_BIT; /* H1 power mask used */ +#endif +#ifdef CONFIG_MX53 + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MXC_H1_UCTRL_H1_PWR_POL_BIT; + else + v &= ~MXC_H1_UCTRL_H1_PWR_POL_BIT; #endif __raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET); v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET); + if (flags & MXC_EHCI_OC_PIN_ACTIVE_LOW) + v |= MXC_H1_OC_POL_BIT; + else + v &= ~MXC_H1_OC_POL_BIT; if (flags & MXC_EHCI_POWER_PINS_ENABLED) v &= ~MXC_H1_OC_DIS_BIT; /* OC is used */ else @@ -212,20 +252,36 @@ int mxc_set_usbcontrol(int port, unsigned int flags) v |= MXC_H2_UCTRL_H2PM_BIT; /* H2 power mask used */ #endif #ifdef CONFIG_MX53 + if (flags & MXC_EHCI_OC_PIN_ACTIVE_LOW) + v |= MXC_H2_UCTRL_H2_OC_POL_BIT; + else + v &= ~MXC_H2_UCTRL_H2_OC_POL_BIT; if (flags & MXC_EHCI_POWER_PINS_ENABLED) v &= ~MXC_H2_UCTRL_H2_OC_DIS_BIT; /* OC is used */ else v |= MXC_H2_UCTRL_H2_OC_DIS_BIT; /* OC is not used */ + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MXC_H2_UCTRL_H2_PWR_POL_BIT; + else + v &= ~MXC_H2_UCTRL_H2_PWR_POL_BIT; #endif __raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET); break; #ifdef CONFIG_MX53 case 3: /* Host 3 ULPI */ v = __raw_readl(usbother_base + MXC_USBH3CTRL_OFFSET); + if (flags & MXC_EHCI_OC_PIN_ACTIVE_LOW) + v |= MXC_H3_UCTRL_H3_OC_POL_BIT; + else + v &= ~MXC_H3_UCTRL_H3_OC_POL_BIT; if (flags & MXC_EHCI_POWER_PINS_ENABLED) v &= ~MXC_H3_UCTRL_H3_OC_DIS_BIT; /* OC is used */ else v |= MXC_H3_UCTRL_H3_OC_DIS_BIT; /* OC is not used */ + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MXC_H3_UCTRL_H3_PWR_POL_BIT; + else + v &= ~MXC_H3_UCTRL_H3_PWR_POL_BIT; __raw_writel(v, usbother_base + MXC_USBH3CTRL_OFFSET); break; #endif diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h index 4dee5b0bab1..a1438d6f94f 100644 --- a/include/usb/ehci-fsl.h +++ b/include/usb/ehci-fsl.h @@ -266,11 +266,13 @@ struct usb_ehci { #define MXC_EHCI_INTERFACE_MASK (0xf) #define MXC_EHCI_POWER_PINS_ENABLED (1 << 5) -#define MXC_EHCI_TTL_ENABLED (1 << 6) +#define MXC_EHCI_PWR_PIN_ACTIVE_HIGH (1 << 6) +#define MXC_EHCI_OC_PIN_ACTIVE_LOW (1 << 7) +#define MXC_EHCI_TTL_ENABLED (1 << 8) -#define MXC_EHCI_INTERNAL_PHY (1 << 7) -#define MXC_EHCI_IPPUE_DOWN (1 << 8) -#define MXC_EHCI_IPPUE_UP (1 << 9) +#define MXC_EHCI_INTERNAL_PHY (1 << 9) +#define MXC_EHCI_IPPUE_DOWN (1 << 10) +#define MXC_EHCI_IPPUE_UP (1 << 11) /* Board-specific initialization */ int board_ehci_hcd_init(int port); -- cgit v1.3.1 From 9fa3d093d626b25c64c695e29d381dd2ae7bf8cc Mon Sep 17 00:00:00 2001 From: Benoît Thébaudeau Date: Tue, 13 Nov 2012 09:57:48 +0000 Subject: ehci-mxc: Make i.MX25 EHCI configurable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use EHCI MXC configuration options for i.MX25. Signed-off-by: Benoît Thébaudeau Cc: Marek Vasut Cc: Stefano Babic Cc: Matthias Weisser --- drivers/usb/host/ehci-mxc.c | 72 ++++++++++++++++++++++++++++++++++++++++----- include/configs/zmx25.h | 6 ++-- 2 files changed, 67 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index e21f2c54ac9..846aa3b7c9b 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c @@ -28,10 +28,21 @@ #define USBCTRL_OTGBASE_OFFSET 0x600 -#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1<<6) -#define MX25_USB_CTRL_HSTD_BIT (1<<5) -#define MX25_USB_CTRL_USBTE_BIT (1<<4) -#define MX25_USB_CTRL_OCPOL_OTG_BIT (1<<3) +#define MX25_OTG_SIC_SHIFT 29 +#define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT) +#define MX25_OTG_PM_BIT (1 << 24) +#define MX25_OTG_PP_BIT (1 << 11) +#define MX25_OTG_OCPOL_BIT (1 << 3) + +#define MX25_H1_SIC_SHIFT 21 +#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT) +#define MX25_H1_PP_BIT (1 << 18) +#define MX25_H1_PM_BIT (1 << 8) +#define MX25_H1_IPPUE_UP_BIT (1 << 7) +#define MX25_H1_IPPUE_DOWN_BIT (1 << 6) +#define MX25_H1_TLL_BIT (1 << 5) +#define MX25_H1_USBTE_BIT (1 << 4) +#define MX25_H1_OCPOL_BIT (1 << 2) #define MX31_OTG_SIC_SHIFT 29 #define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT) @@ -51,12 +62,57 @@ static int mxc_set_usbcontrol(int port, unsigned int flags) { unsigned int v; -#if defined(CONFIG_MX25) - v = MX25_USB_CTRL_IP_PUE_DOWN_BIT | MX25_USB_CTRL_HSTD_BIT | - MX25_USB_CTRL_USBTE_BIT | MX25_USB_CTRL_OCPOL_OTG_BIT; -#elif defined(CONFIG_MX31) v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET); +#if defined(CONFIG_MX25) + switch (port) { + case 0: /* OTG port */ + v &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PM_BIT | MX25_OTG_PP_BIT | + MX25_OTG_OCPOL_BIT); + v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT; + + if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) + v |= MX25_OTG_PM_BIT; + + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MX25_OTG_PP_BIT; + + if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW)) + v |= MX25_OTG_OCPOL_BIT; + + break; + case 1: /* H1 port */ + v &= ~(MX25_H1_SIC_MASK | MX25_H1_PM_BIT | MX25_H1_PP_BIT | + MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT | + MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT | + MX25_H1_IPPUE_UP_BIT); + v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT; + + if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) + v |= MX25_H1_PM_BIT; + + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + v |= MX25_H1_PP_BIT; + + if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW)) + v |= MX25_H1_OCPOL_BIT; + + if (!(flags & MXC_EHCI_TTL_ENABLED)) + v |= MX25_H1_TLL_BIT; + + if (flags & MXC_EHCI_INTERNAL_PHY) + v |= MX25_H1_USBTE_BIT; + + if (flags & MXC_EHCI_IPPUE_DOWN) + v |= MX25_H1_IPPUE_DOWN_BIT; + if (flags & MXC_EHCI_IPPUE_UP) + v |= MX25_H1_IPPUE_UP_BIT; + + break; + default: + return -EINVAL; + } +#elif defined(CONFIG_MX31) switch (port) { case 0: /* OTG port */ v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT); diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index 447683a4905..e9216d9b64b 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -109,9 +109,9 @@ #define CONFIG_USB_EHCI /* Enable EHCI USB support */ #define CONFIG_USB_EHCI_MXC #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_MXC_USB_PORT 2 -#define CONFIG_MXC_USB_PORTSC 0xC0000000 -#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL +#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN) #define CONFIG_EHCI_IS_TDI #define CONFIG_USB_STORAGE #define CONFIG_DOS_PARTITION -- cgit v1.3.1 From 961a762838d55dc9bae8fa7ea57bc3c51a9c7b57 Mon Sep 17 00:00:00 2001 From: Benoît Thébaudeau Date: Tue, 13 Nov 2012 09:58:25 +0000 Subject: mx35pdk: Add support for OTG MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for the OTG port on the mx35pdk Personality board. Signed-off-by: Benoît Thébaudeau Tested-by: Stefano Babic Cc: Stefano Babic Cc: Marek Vasut --- board/freescale/mx35pdk/lowlevel_init.S | 4 ++++ board/freescale/mx35pdk/mx35pdk.c | 21 +++++++++++++++++++++ include/configs/mx35pdk.h | 14 ++++++++++++++ 3 files changed, 39 insertions(+) (limited to 'include') diff --git a/board/freescale/mx35pdk/lowlevel_init.S b/board/freescale/mx35pdk/lowlevel_init.S index 75bb9586196..da8b6f3a4e2 100644 --- a/board/freescale/mx35pdk/lowlevel_init.S +++ b/board/freescale/mx35pdk/lowlevel_init.S @@ -94,6 +94,10 @@ orr r1, r1, #0x00000C00 orr r1, r1, #0x00000003 str r1, [r0, #CLKCTL_CGR1] + + ldr r1, [r0, #CLKCTL_CGR2] + orr r1, r1, #0x00C00000 + str r1, [r0, #CLKCTL_CGR2] .endm .macro setup_sdram diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index a12531fb892..4d8f2f5eea3 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -98,6 +98,26 @@ static void setup_iomux_spi(void) mxc_request_iomux(MX35_PIN_CSPI1_SCLK, MUX_CONFIG_SION); } +static void setup_iomux_usbotg(void) +{ + int in_pad, out_pad; + + /* Set up pins for USBOTG. */ + mxc_request_iomux(MX35_PIN_USBOTG_PWR, + MUX_CONFIG_SION | MUX_CONFIG_FUNC); + mxc_request_iomux(MX35_PIN_USBOTG_OC, + MUX_CONFIG_SION | MUX_CONFIG_FUNC); + + in_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_SCHMITZ | PAD_CTL_PKE_ENABLE | + PAD_CTL_PUE_PUD | PAD_CTL_100K_PD | PAD_CTL_ODE_CMOS | + PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + out_pad = PAD_CTL_DRV_3_3V | PAD_CTL_HYS_CMOS | PAD_CTL_PKE_NONE | + PAD_CTL_ODE_CMOS | PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW; + + mxc_iomux_set_pad(MX35_PIN_USBOTG_PWR, out_pad); + mxc_iomux_set_pad(MX35_PIN_USBOTG_OC, in_pad); +} + static void setup_iomux_fec(void) { int pad; @@ -189,6 +209,7 @@ int board_early_init_f(void) __raw_writel(readl(&ccm->rcsr) | MXC_CCM_RCSR_NFC_FMS, &ccm->rcsr); setup_iomux_i2c(); + setup_iomux_usbotg(); setup_iomux_fec(); setup_iomux_spi(); diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index d89db7af153..00171a7cec5 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -112,6 +112,8 @@ #define CONFIG_NET_RETRY_COUNT 100 #define CONFIG_CMD_DATE +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE #define CONFIG_CMD_MMC #define CONFIG_DOS_PARTITION #define CONFIG_EFI_PARTITION @@ -244,6 +246,18 @@ #define CONFIG_MXC_NAND_HWECC #define CONFIG_SYS_NAND_LARGEPAGE +/* EHCI driver */ +#define CONFIG_USB_EHCI +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_EHCI_MXC +#define CONFIG_MXC_USB_PORT 0 +#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ + MXC_EHCI_POWER_PINS_ENABLED | \ + MXC_EHCI_OC_PIN_ACTIVE_LOW) +#define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) + /* mmc driver */ #define CONFIG_MMC #define CONFIG_GENERIC_MMC -- cgit v1.3.1 From 2785694381bcd114441c44c63362fb54a251230f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 16 Nov 2012 05:09:03 +0000 Subject: mx28evk: Configure CONFIG_BOOTDELAY to one second One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam --- include/configs/mx28evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 2916c710e41..8b89b25f74d 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -238,7 +238,7 @@ */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_BOOTFILE "uImage" #define CONFIG_LOADADDR 0x42000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -- cgit v1.3.1 From fbae0d108e4ee726df83130300d0305051d23caf Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 16 Nov 2012 05:09:04 +0000 Subject: mx53loco: Configure CONFIG_BOOTDELAY to one second One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam --- include/configs/mx53loco.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index a62ea785990..37f9d69e260 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -108,7 +108,7 @@ #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_ETHPRIME "FEC0" -- cgit v1.3.1 From eb141bd36ca33e09eb86cdbc83bbe1b157c19aae Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 16 Nov 2012 05:09:05 +0000 Subject: mx6qsabrelite: Configure CONFIG_BOOTDELAY to one second One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam Acked-by: Jason Liu --- include/configs/mx6qsabrelite.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index 318f857cf83..759275a03ac 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -144,7 +144,7 @@ #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_PREBOOT "" -- cgit v1.3.1 From 072f26b1da7d25626c460f89d5e358e74d29008e Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 16 Nov 2012 05:09:06 +0000 Subject: mx6qsabre_common: Configure CONFIG_BOOTDELAY to one second One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam Acked-by: Jason Liu --- include/configs/mx6qsabre_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx6qsabre_common.h b/include/configs/mx6qsabre_common.h index 50f3b018736..b8621b8e1cd 100644 --- a/include/configs/mx6qsabre_common.h +++ b/include/configs/mx6qsabre_common.h @@ -76,7 +76,7 @@ #define CONFIG_CMD_BOOTZ #undef CONFIG_CMD_IMLS -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_LOADADDR 0x10800000 #define CONFIG_SYS_TEXT_BASE 0x17800000 -- cgit v1.3.1 From bf5c6fbbf7f58084dc9a89c4bb31f909450f6e00 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 16 Nov 2012 05:09:07 +0000 Subject: mx51evk: Configure CONFIG_BOOTDELAY to one second One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam --- include/configs/mx51evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 89feaed7dd7..e8c6618ea92 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -149,7 +149,7 @@ #define CONFIG_CMD_DATE -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_ETHPRIME "FEC0" -- cgit v1.3.1 From d941e6b63e0dd3653b81841f7cf8238cccec8f56 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 16 Nov 2012 05:09:08 +0000 Subject: mx25pdk: Configure CONFIG_BOOTDELAY to one second One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam --- include/configs/mx25pdk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index a4bd8b0aed6..b5338a00090 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -130,7 +130,7 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_NET -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -- cgit v1.3.1 From 562e6c62b6754d95fd4696a74289a8292f779645 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 16 Nov 2012 05:09:09 +0000 Subject: mx31pdk: Configure CONFIG_BOOTDELAY to one second One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam --- include/configs/mx31pdk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 223b5b0bb92..6572676970c 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -106,7 +106,7 @@ #define CONFIG_BOARD_LATE_INIT -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ -- cgit v1.3.1 From ec7503bb0ec4c0df199129d0958413fb9d44baf0 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 16 Nov 2012 05:09:10 +0000 Subject: mx35pdk: Configure CONFIG_BOOTDELAY to one second One second is enough time for users to react in case they want to stop the booting process. Signed-off-by: Fabio Estevam --- include/configs/mx35pdk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 00171a7cec5..1c2f5993d8c 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -120,7 +120,7 @@ #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 1 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ -- cgit v1.3.1 From 39e8576164c3bef9d6cb9ad4567c09fc6a87b5fd Mon Sep 17 00:00:00 2001 From: Benoît Thébaudeau Date: Mon, 5 Nov 2012 10:07:04 +0000 Subject: mx5: Mark lowlevel_init board-specific code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mx5 lowlevel_init.S contains board-specific code based on the reference design. Let's keep it since it avoids creating new lowlevel_init files and it may be used by many boards. But add a config to make it optional in order not to cause issues on boards not following this part of the reference design. Signed-off-by: Benoît Thébaudeau Cc: Stefano Babic Cc: Matt Sealey Acked-by: Stefano Babic --- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 2 +- doc/README.imx5 | 5 +++++ include/configs/mx51_efikamx.h | 1 + include/configs/mx51evk.h | 1 + include/configs/vision2.h | 1 + 5 files changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S index 29ec95797ba..6d9396a9767 100644 --- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S +++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S @@ -396,7 +396,7 @@ ENTRY(lowlevel_init) mov r10, lr mov r4, #0 /* Fix R4 to 0 */ -#if defined(CONFIG_MX51) +#if defined(CONFIG_SYS_MAIN_PWR_ON) ldr r0, =GPIO1_BASE_ADDR ldr r1, [r0, #0x0] orr r1, r1, #1 << 23 diff --git a/doc/README.imx5 b/doc/README.imx5 index f7eab7d4b2e..e08941e2ae3 100644 --- a/doc/README.imx5 +++ b/doc/README.imx5 @@ -15,3 +15,8 @@ i.MX5x SoCs. mode), which causes the effect of this failure to be much lower (in terms of frequency deviation), avoiding system failure, or at least decreasing the likelihood of system failure. + +1.2 CONFIG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup. + This option should be enabled for boards having a SYS_ON_OFF_CTL signal + connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the + reference designs. diff --git a/include/configs/mx51_efikamx.h b/include/configs/mx51_efikamx.h index ffe771f2dcb..a056566efcd 100644 --- a/include/configs/mx51_efikamx.h +++ b/include/configs/mx51_efikamx.h @@ -261,5 +261,6 @@ #define CONFIG_SYS_DDR_CLKSEL 0 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35145 +#define CONFIG_SYS_MAIN_PWR_ON #endif diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index e8c6618ea92..4e823553349 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -235,6 +235,7 @@ #define CONFIG_SYS_DDR_CLKSEL 0 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 +#define CONFIG_SYS_MAIN_PWR_ON /*----------------------------------------------------------------------- * FLASH and environment organization diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 848df88e7df..13c570299fe 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -196,6 +196,7 @@ /* 166 MHz DDR RAM */ #define CONFIG_SYS_DDR_CLKSEL 0 #define CONFIG_SYS_CLKTL_CBCDR 0x19239100 +#define CONFIG_SYS_MAIN_PWR_ON #define CONFIG_SYS_NO_FLASH -- cgit v1.3.1