From f8d3d4d14aabee4e8959524629f72d62b6706ec0 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Thu, 13 Aug 2020 14:56:19 +0530 Subject: configs: j721e_evm.h: Add U-Boot image address for HyperFlash boot Add memory mapped address location of U-Boot images in HyperFlash boot mode. Signed-off-by: Vignesh Raghavendra --- include/configs/j721e_evm.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index c8a76037ff0..a5708933789 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -23,8 +23,10 @@ #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \ CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE) +#define CONFIG_SYS_UBOOT_BASE 0x50280000 /* Image load address in RAM for DFU boot*/ #else +#define CONFIG_SYS_UBOOT_BASE 0x50080000 /* * Maximum size in memory allocated to the SPL BSS. Keep it as tight as * possible (to allow the build to go through), as this directly affects -- cgit v1.2.3 From 3c195299a8601aef15bd24572791f02340ed690a Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Mon, 17 Aug 2020 16:57:35 -0500 Subject: configs: j721e_evm: Add Main R5FSS1 Core1 to default rproc boot list The default rproc list currently used by A72 U-Boot to boot various remote processors include the Main R5FSS0 (Split-mode) Core1, Main R5FSS1 (LockStep mode) Core0 and the three DSPs. The Main R5FSS1 cluster is configured for Split mode by default in the dts now, so add the Main R5FSS1 Core1 (rproc #5) to the default rproc boot list. This core is now booted after the Main R5FSS1 Core0 and before the DSPs. The order of the rprocs to boot can always be changed at runtime if desired by overwriting the 'rproc_fw_binaries' environment variable at U-boot prompt. Note that the R5FSS Core1 cannot be booted before its associated Core0. Signed-off-by: Suman Anna --- include/configs/j721e_evm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index a5708933789..2eaa0585014 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -117,6 +117,7 @@ #define DEFAULT_RPROCS "" \ "3 /lib/firmware/j7-main-r5f0_1-fw " \ "4 /lib/firmware/j7-main-r5f1_0-fw " \ + "5 /lib/firmware/j7-main-r5f1_1-fw " \ "6 /lib/firmware/j7-c66_0-fw " \ "7 /lib/firmware/j7-c66_1-fw " \ "8 /lib/firmware/j7-c71_0-fw " -- cgit v1.2.3 From a9e5caf59661180424fbc4ad4736c77549bd5354 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Mon, 17 Aug 2020 16:57:36 -0500 Subject: env: ti: j721e-evm: Limit scope of rproc env variables used by R5 SPL The commit 316c927135d6 ("include: configs: j721e_evm: Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0") added four different new env variables 'addr_mainr5f0_0load', 'name_mainr5f0_0fw', 'addr_mcur5f0_0load' and 'name_mcur5f0_0fw' to the generic environment, but these are only needed and used in R5 SPL for early-booting the MCU R5FSS0 and Main R5FSS0 Core0 on J721E SoCs. These are not really needed for A72 U-Boot, so limit the scope of these variables only to R5 SPL. While at this, also fix the loadaddr variable values to include the hex prefix like with other such env variables. Cc: Keerthy Signed-off-by: Suman Anna --- include/configs/j721e_evm.h | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 2eaa0585014..15c34e19bf8 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -83,16 +83,23 @@ "uuid_disk=${uuid_gpt_disk};" \ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" +#ifdef CONFIG_SYS_K3_SPL_ATF +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ + "addr_mainr5f0_0load=0x88000000\0" \ + "name_mainr5f0_0fw=/lib/firmware/j7-main-r5f0_0-fw\0" \ + "addr_mcur5f0_0load=0x89000000\0" \ + "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0" +#else +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC "" +#endif /* CONFIG_SYS_K3_SPL_ATF */ + /* U-Boot MMC-specific configuration */ #define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \ "boot=mmc\0" \ "mmcdev=1\0" \ "bootpart=1:2\0" \ "bootdir=/boot\0" \ - "addr_mainr5f0_0load=88000000\0" \ - "name_mainr5f0_0fw=/lib/firmware/j7-main-r5f0_0-fw\0" \ - "addr_mcur5f0_0load=89000000\0" \ - "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0" \ + EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ "rd_spec=-\0" \ "init_mmc=run args_all args_mmc\0" \ "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \ -- cgit v1.2.3 From c091bb049973ae73cb8d63b1bb4cf04047cd27da Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Mon, 17 Aug 2020 18:15:12 -0500 Subject: env: ti: j721e-evm: Update rproc_fw_binaries env variable for J7200 The J7200 SoCs have different number of remote processors, but reuse the same environment settings as the J721E SoCs. The current env variable rproc_fw_binaries is geared towards J721E SoCs and is incorrect for J7200 SoCs. Please see the logic originally added in commit 0b4ab9c9a754 ("env: ti: j721e-evm: Add support to boot rprocs including R5Fs and DSPs"). Fix this by defining the DEFAULT_RPROCS macro appropriately using the corresponding TARGET_EVM Kconfig symbol. This macro is used by the 'rproc_fw_binaries' env variable in the common remoteproc env header file k3_rproc.h. The list of R5F cores to be started before loading and booting the Linux kernel are as follows, and mainly comprises of the Main R5FSS0 cores in this order: Main R5FSS0 (Split) Core0 : 2 /lib/firmware/j7200-main-r5f0_0-fw Main R5FSS0 (Split) Core1 : 3 /lib/firmware/j7200-main-r5f0_1-fw The MCU R5FSS0 is in LockStep mode and is expected to be booted by R5 SPL, so it is not included in the list. The order of rprocs to boot cannot be really modified as only the Main R5FSS0 cores are involved and Core0 has to be booted first always before the corresponding Core1. Signed-off-by: Suman Anna --- include/configs/j721e_evm.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 15c34e19bf8..9988c43641a 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -2,7 +2,7 @@ /* * Configuration header file for K3 J721E EVM * - * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/ * Lokesh Vutla */ @@ -118,9 +118,14 @@ "${bootdir}/${name_fit}\0" \ "partitions=" PARTS_DEFAULT +/* Set the default list of remote processors to boot */ +#if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) #ifdef DEFAULT_RPROCS #undef DEFAULT_RPROCS #endif +#endif + +#ifdef CONFIG_TARGET_J721E_A72_EVM #define DEFAULT_RPROCS "" \ "3 /lib/firmware/j7-main-r5f0_1-fw " \ "4 /lib/firmware/j7-main-r5f1_0-fw " \ @@ -128,6 +133,13 @@ "6 /lib/firmware/j7-c66_0-fw " \ "7 /lib/firmware/j7-c66_1-fw " \ "8 /lib/firmware/j7-c71_0-fw " +#endif /* CONFIG_TARGET_J721E_A72_EVM */ + +#ifdef CONFIG_TARGET_J7200_A72_EVM +#define DEFAULT_RPROCS "" \ + "2 /lib/firmware/j7200-main-r5f0_0-fw " \ + "3 /lib/firmware/j7200-main-r5f0_1-fw " +#endif /* CONFIG_TARGET_J7200_A72_EVM */ /* set default dfu_bufsiz to 128KB (sector size of OSPI) */ #define EXTRA_ENV_DFUARGS \ -- cgit v1.2.3 From 615d10f736e850c073a17b2f64fd08c7f5b32fe2 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Tue, 18 Aug 2020 14:09:43 -0500 Subject: env: ti: j721e-evm: Update R5 SPL rproc env variables for J7200 The R5 SPL on J7200 SoCs will be limited to booting just the MCU R5FSS0 R5F core in LockStep-mode at present, so add the two required environment variables 'addr_mcur5f0_0load' and 'name_mcur5f0_0fw' that are needed by the R5 SPL early-boot logic. The firmware name used is also different from that on J721E SoCs. Signed-off-by: Suman Anna --- include/configs/j721e_evm.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 9988c43641a..1b47e18b2f9 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -84,11 +84,17 @@ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" #ifdef CONFIG_SYS_K3_SPL_ATF +#if defined(CONFIG_TARGET_J721E_R5_EVM) #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ "addr_mainr5f0_0load=0x88000000\0" \ "name_mainr5f0_0fw=/lib/firmware/j7-main-r5f0_0-fw\0" \ "addr_mcur5f0_0load=0x89000000\0" \ "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0" +#elif defined(CONFIG_TARGET_J7200_R5_EVM) +#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \ + "addr_mcur5f0_0load=0x89000000\0" \ + "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0" +#endif /* CONFIG_TARGET_J721E_R5_EVM */ #else #define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC "" #endif /* CONFIG_SYS_K3_SPL_ATF */ -- cgit v1.2.3 From 42b7aebe4ab47d7d981572d15d9bba999007b2ac Mon Sep 17 00:00:00 2001 From: "Matwey V. Kornilov" Date: Mon, 24 Aug 2020 21:00:32 +0300 Subject: ti: Use devtype=mmc instead of setenv devtype mmc If devtype variable is setted via setenv, then the following devtype=X style is ignored. Currently, many u-boot commands use devtype variable in the latter manner: mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi Use devtype=mmc instead of setenv devtype mmc to avoid bugs with booting from another devtype. Signed-off-by: Matwey V. Kornilov --- include/environment/ti/mmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/environment/ti/mmc.h b/include/environment/ti/mmc.h index 1c8e49a8b3d..b86c8dc7a4f 100644 --- a/include/environment/ti/mmc.h +++ b/include/environment/ti/mmc.h @@ -57,7 +57,7 @@ "fi;\0" \ "mmcboot=mmc dev ${mmcdev}; " \ "devnum=${mmcdev}; " \ - "setenv devtype mmc; " \ + "devtype=mmc; " \ "if mmc rescan; then " \ "echo SD/MMC found on device ${mmcdev};" \ "if run loadimage; then " \ -- cgit v1.2.3 From 8c444c184c36dfa314a2a500349785f58c8a8d24 Mon Sep 17 00:00:00 2001 From: "Matwey V. Kornilov" Date: Mon, 24 Aug 2020 21:00:33 +0300 Subject: am335x_evm: Allow booting from usb-storage device Signed-off-by: Matwey V. Kornilov --- include/configs/am335x_evm.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 9c4ef369c5c..103c0461374 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -66,6 +66,12 @@ #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \ #devtypel #instance " " +#if CONFIG_IS_ENABLED(CMD_USB) +# define BOOT_TARGET_USB(func) func(USB, usb, 0) +#else +# define BOOT_TARGET_USB(func) +#endif + #if CONFIG_IS_ENABLED(CMD_PXE) # define BOOT_TARGET_PXE(func) func(PXE, pxe, na) #else @@ -84,6 +90,7 @@ func(MMC, mmc, 1) \ func(LEGACY_MMC, legacy_mmc, 1) \ func(NAND, nand, 0) \ + BOOT_TARGET_USB(func) \ BOOT_TARGET_PXE(func) \ BOOT_TARGET_DHCP(func) -- cgit v1.2.3 From 41cf3cb39ddbb8a0b892781388e1054653d33ed1 Mon Sep 17 00:00:00 2001 From: Faiz Abbas Date: Mon, 14 Sep 2020 12:11:15 +0530 Subject: arm: mach-omap2: am33xx: Add device structure for spi Add platform data and a device structure for the spi device present on am335x-icev2. This requires moving all omap3_spi platform data structures and symbols to an omap3_spi.h so that the board file can access them. Signed-off-by: Faiz Abbas --- include/configs/am335x_evm.h | 2 -- include/omap3_spi.h | 78 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+), 2 deletions(-) create mode 100644 include/omap3_spi.h (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 103c0461374..5af90d932d5 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -287,8 +287,6 @@ #define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #endif -/* SPI flash. */ - /* Network. */ /* Enable Atheros phy driver */ diff --git a/include/omap3_spi.h b/include/omap3_spi.h new file mode 100644 index 00000000000..cae37705830 --- /dev/null +++ b/include/omap3_spi.h @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __OMAP3_SPI_H_ +#define __OMAP3_SPI_H_ + +/* per-register bitmasks */ +#define OMAP3_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3) +#define OMAP3_MCSPI_SYSCONFIG_ENAWAKEUP BIT(2) +#define OMAP3_MCSPI_SYSCONFIG_AUTOIDLE BIT(0) +#define OMAP3_MCSPI_SYSCONFIG_SOFTRESET BIT(1) + +#define OMAP3_MCSPI_SYSSTATUS_RESETDONE BIT(0) + +#define OMAP3_MCSPI_MODULCTRL_SINGLE BIT(0) +#define OMAP3_MCSPI_MODULCTRL_MS BIT(2) +#define OMAP3_MCSPI_MODULCTRL_STEST BIT(3) + +#define OMAP3_MCSPI_CHCONF_PHA BIT(0) +#define OMAP3_MCSPI_CHCONF_POL BIT(1) +#define OMAP3_MCSPI_CHCONF_CLKD_MASK GENMASK(5, 2) +#define OMAP3_MCSPI_CHCONF_EPOL BIT(6) +#define OMAP3_MCSPI_CHCONF_WL_MASK GENMASK(11, 7) +#define OMAP3_MCSPI_CHCONF_TRM_RX_ONLY BIT(12) +#define OMAP3_MCSPI_CHCONF_TRM_TX_ONLY BIT(13) +#define OMAP3_MCSPI_CHCONF_TRM_MASK GENMASK(13, 12) +#define OMAP3_MCSPI_CHCONF_DMAW BIT(14) +#define OMAP3_MCSPI_CHCONF_DMAR BIT(15) +#define OMAP3_MCSPI_CHCONF_DPE0 BIT(16) +#define OMAP3_MCSPI_CHCONF_DPE1 BIT(17) +#define OMAP3_MCSPI_CHCONF_IS BIT(18) +#define OMAP3_MCSPI_CHCONF_TURBO BIT(19) +#define OMAP3_MCSPI_CHCONF_FORCE BIT(20) + +#define OMAP3_MCSPI_CHSTAT_RXS BIT(0) +#define OMAP3_MCSPI_CHSTAT_TXS BIT(1) +#define OMAP3_MCSPI_CHSTAT_EOT BIT(2) + +#define OMAP3_MCSPI_CHCTRL_EN BIT(0) +#define OMAP3_MCSPI_CHCTRL_DIS (0 << 0) + +#define OMAP3_MCSPI_WAKEUPENABLE_WKEN BIT(0) +#define MCSPI_PINDIR_D0_IN_D1_OUT 0 +#define MCSPI_PINDIR_D0_OUT_D1_IN 1 + +#define OMAP3_MCSPI_MAX_FREQ 48000000 +#define SPI_WAIT_TIMEOUT 10 + +#define OMAP4_MCSPI_REG_OFFSET 0x100 + +/* OMAP3 McSPI registers */ +struct mcspi_channel { + unsigned int chconf; /* 0x2C, 0x40, 0x54, 0x68 */ + unsigned int chstat; /* 0x30, 0x44, 0x58, 0x6C */ + unsigned int chctrl; /* 0x34, 0x48, 0x5C, 0x70 */ + unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ + unsigned int rx; /* 0x3C, 0x50, 0x64, 0x78 */ +}; + +struct mcspi { + unsigned char res1[0x10]; + unsigned int sysconfig; /* 0x10 */ + unsigned int sysstatus; /* 0x14 */ + unsigned int irqstatus; /* 0x18 */ + unsigned int irqenable; /* 0x1C */ + unsigned int wakeupenable; /* 0x20 */ + unsigned int syst; /* 0x24 */ + unsigned int modulctrl; /* 0x28 */ + struct mcspi_channel channel[4]; + /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */ + /* channel1: 0x40 - 0x50, bus 0 & 1 */ + /* channel2: 0x54 - 0x64, bus 0 & 1 */ + /* channel3: 0x68 - 0x78, bus 0 */ +}; + +struct omap3_spi_plat { + struct mcspi *regs; + unsigned int pin_dir:1; +}; +#endif -- cgit v1.2.3