From 7e6ee7ad27de5216db1baef76f38c3429c8f4a2a Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Wed, 19 Nov 2008 16:32:36 +0100 Subject: UBI: Add basic UBI support to U-Boot (Part 6/8) This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park Signed-off-by: Stefan Roese --- include/exports.h | 1 + include/jffs2/load_kernel.h | 5 + include/linux/crc32.h | 27 +++++ include/linux/mtd/partitions.h | 84 ++++++++++++++++ include/linux/types.h | 24 +++++ include/ubi_uboot.h | 217 +++++++++++++++++++++++++++++++++++++++++ 6 files changed, 358 insertions(+) create mode 100644 include/linux/crc32.h create mode 100644 include/linux/mtd/partitions.h create mode 100644 include/ubi_uboot.h (limited to 'include') diff --git a/include/exports.h b/include/exports.h index 6377875bc9a..0620e9eb896 100644 --- a/include/exports.h +++ b/include/exports.h @@ -25,6 +25,7 @@ char *getenv (char *name); int setenv (char *varname, char *varvalue); long simple_strtol(const char *cp,char **endp,unsigned int base); int strcmp(const char * cs,const char * ct); +int ustrtoul(const char *cp, char **endp, unsigned int base); #ifdef CONFIG_HAS_UID void forceenv (char *varname, char *varvalue); #endif diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h index 551fd0c442a..e9b7d6e7c9d 100644 --- a/include/jffs2/load_kernel.h +++ b/include/jffs2/load_kernel.h @@ -73,4 +73,9 @@ struct mtdids { #define putLabeledWord(x, y) printf("%s %08x\n", x, (unsigned int)y) #define led_blink(x, y, z, a) +/* common/cmd_jffs2.c */ +extern int mtdparts_init(void); +extern int find_dev_and_part(const char *id, struct mtd_device **dev, + u8 *part_num, struct part_info **part); + #endif /* load_kernel_h */ diff --git a/include/linux/crc32.h b/include/linux/crc32.h new file mode 100644 index 00000000000..e1331571e1c --- /dev/null +++ b/include/linux/crc32.h @@ -0,0 +1,27 @@ +/* + * crc32.h + * See linux/lib/crc32.c for license and changes + */ +#ifndef _LINUX_CRC32_H +#define _LINUX_CRC32_H + +#include +//#include + +extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); +//extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); + +#define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)data, length) + +/* + * Helpers for hash table generation of ethernet nics: + * + * Ethernet sends the least significant bit of a byte first, thus crc32_le + * is used. The output of crc32_le is bit reversed [most significant bit + * is in bit nr 0], thus it must be reversed before use. Except for + * nics that bit swap the result internally... + */ +//#define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) +//#define ether_crc_le(length, data) crc32_le(~0, data, length) + +#endif /* _LINUX_CRC32_H */ diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h new file mode 100644 index 00000000000..b41e5f564cb --- /dev/null +++ b/include/linux/mtd/partitions.h @@ -0,0 +1,84 @@ +/* + * MTD partitioning layer definitions + * + * (C) 2000 Nicolas Pitre + * + * This code is GPL + * + * $Id: partitions.h,v 1.17 2005/11/07 11:14:55 gleixner Exp $ + */ + +#ifndef MTD_PARTITIONS_H +#define MTD_PARTITIONS_H + +#include + + +/* + * Partition definition structure: + * + * An array of struct partition is passed along with a MTD object to + * add_mtd_partitions() to create them. + * + * For each partition, these fields are available: + * name: string that will be used to label the partition's MTD device. + * size: the partition size; if defined as MTDPART_SIZ_FULL, the partition + * will extend to the end of the master MTD device. + * offset: absolute starting position within the master MTD device; if + * defined as MTDPART_OFS_APPEND, the partition will start where the + * previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block. + * mask_flags: contains flags that have to be masked (removed) from the + * master MTD flag set for the corresponding MTD partition. + * For example, to force a read-only partition, simply adding + * MTD_WRITEABLE to the mask_flags will do the trick. + * + * Note: writeable partitions require their size and offset be + * erasesize aligned (e.g. use MTDPART_OFS_NEXTBLK). + */ + +struct mtd_partition { + char *name; /* identifier string */ + u_int32_t size; /* partition size */ + u_int32_t offset; /* offset within the master MTD space */ + u_int32_t mask_flags; /* master MTD flags to mask out for this partition */ + struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only)*/ + struct mtd_info **mtdp; /* pointer to store the MTD object */ +}; + +#define MTDPART_OFS_NXTBLK (-2) +#define MTDPART_OFS_APPEND (-1) +#define MTDPART_SIZ_FULL (0) + + +int add_mtd_partitions(struct mtd_info *, const struct mtd_partition *, int); +int del_mtd_partitions(struct mtd_info *); + +#if 0 +/* + * Functions dealing with the various ways of partitioning the space + */ + +struct mtd_part_parser { + struct list_head list; + struct module *owner; + const char *name; + int (*parse_fn)(struct mtd_info *, struct mtd_partition **, unsigned long); +}; + +extern int register_mtd_parser(struct mtd_part_parser *parser); +extern int deregister_mtd_parser(struct mtd_part_parser *parser); +extern int parse_mtd_partitions(struct mtd_info *master, const char **types, + struct mtd_partition **pparts, unsigned long origin); + +#define put_partition_parser(p) do { module_put((p)->owner); } while(0) + +struct device; +struct device_node; + +int __devinit of_mtd_parse_partitions(struct device *dev, + struct mtd_info *mtd, + struct device_node *node, + struct mtd_partition **pparts); +#endif + +#endif diff --git a/include/linux/types.h b/include/linux/types.h index df4808fcdf4..1b0b4a44c45 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -119,6 +119,30 @@ typedef __s64 int64_t; * Below are truly Linux-specific types that should never collide with * any application/library that wants linux/types.h. */ +#ifdef __CHECKER__ +#define __bitwise__ __attribute__((bitwise)) +#else +#define __bitwise__ +#endif +#ifdef __CHECK_ENDIAN__ +#define __bitwise __bitwise__ +#else +#define __bitwise +#endif + +typedef __u16 __bitwise __le16; +typedef __u16 __bitwise __be16; +typedef __u32 __bitwise __le32; +typedef __u32 __bitwise __be32; +#if defined(__GNUC__) +typedef __u64 __bitwise __le64; +typedef __u64 __bitwise __be64; +#endif +typedef __u16 __bitwise __sum16; +typedef __u32 __bitwise __wsum; + + +typedef unsigned __bitwise__ gfp_t; struct ustat { __kernel_daddr_t f_tfree; diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h new file mode 100644 index 00000000000..295f2c0ffc8 --- /dev/null +++ b/include/ubi_uboot.h @@ -0,0 +1,217 @@ +/* + * Header file for UBI support for U-Boot + * + * Adaptation from kernel to U-Boot + * + * Copyright (C) 2005-2007 Samsung Electronics + * Kyungmin Park + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __UBOOT_UBI_H +#define __UBOOT_UBI_H + +#include +#include +#include +#include +#include + +#ifdef CONFIG_CMD_ONENAND +#include +#endif + +#include + +#define DPRINTK(format, args...) \ +do { \ + printf("%s[%d]: " format "\n", __func__, __LINE__, ##args); \ +} while (0) + +/* configurable */ +#define CONFIG_MTD_UBI_WL_THRESHOLD 4096 +#define CONFIG_MTD_UBI_BEB_RESERVE 1 +#define UBI_IO_DEBUG 0 + +/* debug options (Linux: drivers/mtd/ubi/Kconfig.debug) */ +#undef CONFIG_MTD_UBI_DEBUG +#undef CONFIG_MTD_UBI_DEBUG_PARANOID +#undef CONFIG_MTD_UBI_DEBUG_MSG +#undef CONFIG_MTD_UBI_DEBUG_MSG_EBA +#undef CONFIG_MTD_UBI_DEBUG_MSG_WL +#undef CONFIG_MTD_UBI_DEBUG_MSG_IO +#undef CONFIG_MTD_UBI_DEBUG_MSG_BLD +#define CONFIG_MTD_UBI_DEBUG_DISABLE_BGT + +/* compiler options */ +#define uninitialized_var(x) x = x + +/* build.c */ +#define get_device(...) +#define put_device(...) +#define ubi_sysfs_init(...) 0 +#define ubi_sysfs_close(...) do { } while (0) +static inline int is_power_of_2(unsigned long n) +{ + return (n != 0 && ((n & (n - 1)) == 0)); +} + +/* FIXME */ +#define MKDEV(...) 0 +#define MAJOR(dev) 0 +#define MINOR(dev) 0 + +#define alloc_chrdev_region(...) 0 +#define unregister_chrdev_region(...) + +#define class_create(...) __builtin_return_address(0) +#define class_create_file(...) 0 +#define class_remove_file(...) +#define class_destroy(...) +#define misc_register(...) 0 +#define misc_deregister(...) + +/* vmt.c */ +#define device_register(...) 0 +#define volume_sysfs_init(...) 0 +#define volume_sysfs_close(...) do { } while (0) + +/* kapi.c */ + +/* eba.c */ + +/* io.c */ +#define init_waitqueue_head(...) do { } while (0) +#define wait_event_interruptible(...) 0 +#define wake_up_interruptible(...) do { } while (0) +#define print_hex_dump(...) do { } while (0) +#define dump_stack(...) do { } while (0) + +/* wl.c */ +#define task_pid_nr(x) 0 +#define set_freezable(...) do { } while (0) +#define try_to_freeze(...) 0 +#define set_current_state(...) do { } while (0) +#define kthread_should_stop(...) 0 +#define schedule() do { } while (0) + +/* upd.c */ +static inline unsigned long copy_from_user(void *dest, const void *src, + unsigned long count) +{ + memcpy((void *)dest, (void *)src, count); + return 0; +} + +/* common */ +typedef int spinlock_t; +typedef int wait_queue_head_t; +#define spin_lock_init(...) +#define spin_lock(...) +#define spin_unlock(...) + +#define mutex_init(...) +#define mutex_lock(...) +#define mutex_unlock(...) + +#define init_rwsem(...) do { } while (0) +#define down_read(...) do { } while (0) +#define down_write(...) do { } while (0) +#define down_write_trylock(...) 0 +#define up_read(...) do { } while (0) +#define up_write(...) do { } while (0) + +struct kmem_cache { int i; }; +#define kmem_cache_create(...) 1 +#define kmem_cache_alloc(obj, gfp) malloc(sizeof(struct ubi_wl_entry)) +#define kmem_cache_free(obj, size) free(size) +#define kmem_cache_destroy(...) + +#define cond_resched() do { } while (0) +#define yield() do { } while (0) + +#define KERN_WARNING +#define KERN_ERR +#define KERN_NOTICE +#define KERN_DEBUG + +#define GFP_KERNEL 0 +#define GFP_NOFS 1 + +#define __user +#define __init +#define __exit + +#define kthread_create(...) __builtin_return_address(0) +#define kthread_stop(...) do { } while (0) +#define wake_up_process(...) do { } while (0) + +#define BUS_ID_SIZE 20 + +struct rw_semaphore { int i; }; +struct device { + struct device *parent; + struct class *class; + char bus_id[BUS_ID_SIZE]; /* position on parent bus */ + dev_t devt; /* dev_t, creates the sysfs "dev" */ + void (*release)(struct device *dev); +}; +struct mutex { int i; }; +struct kernel_param { int i; }; + +struct cdev { + int owner; + dev_t dev; +}; +#define cdev_init(...) do { } while (0) +#define cdev_add(...) 0 +#define cdev_del(...) do { } while (0) + +#define MAX_ERRNO 4095 +#define IS_ERR_VALUE(x) ((x) >= (unsigned long)-MAX_ERRNO) + +static inline void *ERR_PTR(long error) +{ + return (void *) error; +} + +static inline long PTR_ERR(const void *ptr) +{ + return (long) ptr; +} + +static inline long IS_ERR(const void *ptr) +{ + return IS_ERR_VALUE((unsigned long)ptr); +} + +/* Force a compilation error if condition is true */ +#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) + +/* module */ +#define THIS_MODULE 0 +#define try_module_get(...) 0 +#define module_put(...) do { } while (0) +#define module_init(...) +#define module_exit(...) +#define EXPORT_SYMBOL(...) +#define EXPORT_SYMBOL_GPL(...) +#define module_param_call(...) +#define MODULE_PARM_DESC(...) +#define MODULE_VERSION(...) +#define MODULE_DESCRIPTION(...) +#define MODULE_AUTHOR(...) +#define MODULE_LICENSE(...) + +#include "../drivers/mtd/ubi/ubi.h" + +/* functions */ +extern int ubi_mtd_param_parse(const char *val, struct kernel_param *kp); +extern int ubi_init(void); + +extern struct ubi_device *ubi_devices[]; + +#endif -- cgit v1.3.1 From 47ae6693f54f80455ae32c2e0d995e0e4bdc15b9 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Wed, 19 Nov 2008 16:36:36 +0100 Subject: UBI: Add basic UBI support to U-Boot (Part 7/8) This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park Signed-off-by: Stefan Roese --- include/linux/mtd/ubi.h | 186 +++++++++++++++++++++++++++++++++ include/mtd/ubi-user.h | 268 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 454 insertions(+) create mode 100644 include/linux/mtd/ubi.h create mode 100644 include/mtd/ubi-user.h (limited to 'include') diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h new file mode 100644 index 00000000000..a017891acf8 --- /dev/null +++ b/include/linux/mtd/ubi.h @@ -0,0 +1,186 @@ +/* + * Copyright (c) International Business Machines Corp., 2006 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + * the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Author: Artem Bityutskiy (Битюцкий Артём) + */ + +#ifndef __LINUX_UBI_H__ +#define __LINUX_UBI_H__ + +//#include +#include +#include + +/* + * enum ubi_open_mode - UBI volume open mode constants. + * + * UBI_READONLY: read-only mode + * UBI_READWRITE: read-write mode + * UBI_EXCLUSIVE: exclusive mode + */ +enum { + UBI_READONLY = 1, + UBI_READWRITE, + UBI_EXCLUSIVE +}; + +/** + * struct ubi_volume_info - UBI volume description data structure. + * @vol_id: volume ID + * @ubi_num: UBI device number this volume belongs to + * @size: how many physical eraseblocks are reserved for this volume + * @used_bytes: how many bytes of data this volume contains + * @used_ebs: how many physical eraseblocks of this volume actually contain any + * data + * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) + * @corrupted: non-zero if the volume is corrupted (static volumes only) + * @upd_marker: non-zero if the volume has update marker set + * @alignment: volume alignment + * @usable_leb_size: how many bytes are available in logical eraseblocks of + * this volume + * @name_len: volume name length + * @name: volume name + * @cdev: UBI volume character device major and minor numbers + * + * The @corrupted flag is only relevant to static volumes and is always zero + * for dynamic ones. This is because UBI does not care about dynamic volume + * data protection and only cares about protecting static volume data. + * + * The @upd_marker flag is set if the volume update operation was interrupted. + * Before touching the volume data during the update operation, UBI first sets + * the update marker flag for this volume. If the volume update operation was + * further interrupted, the update marker indicates this. If the update marker + * is set, the contents of the volume is certainly damaged and a new volume + * update operation has to be started. + * + * To put it differently, @corrupted and @upd_marker fields have different + * semantics: + * o the @corrupted flag means that this static volume is corrupted for some + * reasons, but not because an interrupted volume update + * o the @upd_marker field means that the volume is damaged because of an + * interrupted update operation. + * + * I.e., the @corrupted flag is never set if the @upd_marker flag is set. + * + * The @used_bytes and @used_ebs fields are only really needed for static + * volumes and contain the number of bytes stored in this static volume and how + * many eraseblock this data occupies. In case of dynamic volumes, the + * @used_bytes field is equivalent to @size*@usable_leb_size, and the @used_ebs + * field is equivalent to @size. + * + * In general, logical eraseblock size is a property of the UBI device, not + * of the UBI volume. Indeed, the logical eraseblock size depends on the + * physical eraseblock size and on how much bytes UBI headers consume. But + * because of the volume alignment (@alignment), the usable size of logical + * eraseblocks if a volume may be less. The following equation is true: + * @usable_leb_size = LEB size - (LEB size mod @alignment), + * where LEB size is the logical eraseblock size defined by the UBI device. + * + * The alignment is multiple to the minimal flash input/output unit size or %1 + * if all the available space is used. + * + * To put this differently, alignment may be considered is a way to change + * volume logical eraseblock sizes. + */ +struct ubi_volume_info { + int ubi_num; + int vol_id; + int size; + long long used_bytes; + int used_ebs; + int vol_type; + int corrupted; + int upd_marker; + int alignment; + int usable_leb_size; + int name_len; + const char *name; + dev_t cdev; +}; + +/** + * struct ubi_device_info - UBI device description data structure. + * @ubi_num: ubi device number + * @leb_size: logical eraseblock size on this UBI device + * @min_io_size: minimal I/O unit size + * @ro_mode: if this device is in read-only mode + * @cdev: UBI character device major and minor numbers + * + * Note, @leb_size is the logical eraseblock size offered by the UBI device. + * Volumes of this UBI device may have smaller logical eraseblock size if their + * alignment is not equivalent to %1. + */ +struct ubi_device_info { + int ubi_num; + int leb_size; + int min_io_size; + int ro_mode; + dev_t cdev; +}; + +/* UBI descriptor given to users when they open UBI volumes */ +struct ubi_volume_desc; + +int ubi_get_device_info(int ubi_num, struct ubi_device_info *di); +void ubi_get_volume_info(struct ubi_volume_desc *desc, + struct ubi_volume_info *vi); +struct ubi_volume_desc *ubi_open_volume(int ubi_num, int vol_id, int mode); +struct ubi_volume_desc *ubi_open_volume_nm(int ubi_num, const char *name, + int mode); +void ubi_close_volume(struct ubi_volume_desc *desc); +int ubi_leb_read(struct ubi_volume_desc *desc, int lnum, char *buf, int offset, + int len, int check); +int ubi_leb_write(struct ubi_volume_desc *desc, int lnum, const void *buf, + int offset, int len, int dtype); +int ubi_leb_change(struct ubi_volume_desc *desc, int lnum, const void *buf, + int len, int dtype); +int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum); +int ubi_leb_unmap(struct ubi_volume_desc *desc, int lnum); +int ubi_leb_map(struct ubi_volume_desc *desc, int lnum, int dtype); +int ubi_is_mapped(struct ubi_volume_desc *desc, int lnum); + +/* + * This function is the same as the 'ubi_leb_read()' function, but it does not + * provide the checking capability. + */ +static inline int ubi_read(struct ubi_volume_desc *desc, int lnum, char *buf, + int offset, int len) +{ + return ubi_leb_read(desc, lnum, buf, offset, len, 0); +} + +/* + * This function is the same as the 'ubi_leb_write()' functions, but it does + * not have the data type argument. + */ +static inline int ubi_write(struct ubi_volume_desc *desc, int lnum, + const void *buf, int offset, int len) +{ + return ubi_leb_write(desc, lnum, buf, offset, len, UBI_UNKNOWN); +} + +/* + * This function is the same as the 'ubi_leb_change()' functions, but it does + * not have the data type argument. + */ +static inline int ubi_change(struct ubi_volume_desc *desc, int lnum, + const void *buf, int len) +{ + return ubi_leb_change(desc, lnum, buf, len, UBI_UNKNOWN); +} + +#endif /* !__LINUX_UBI_H__ */ diff --git a/include/mtd/ubi-user.h b/include/mtd/ubi-user.h new file mode 100644 index 00000000000..a7421f130cc --- /dev/null +++ b/include/mtd/ubi-user.h @@ -0,0 +1,268 @@ +/* + * Copyright (c) International Business Machines Corp., 2006 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + * the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * Author: Artem Bityutskiy (Битюцкий Артём) + */ + +#ifndef __UBI_USER_H__ +#define __UBI_USER_H__ + +/* + * UBI device creation (the same as MTD device attachment) + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * MTD devices may be attached using %UBI_IOCATT ioctl command of the UBI + * control device. The caller has to properly fill and pass + * &struct ubi_attach_req object - UBI will attach the MTD device specified in + * the request and return the newly created UBI device number as the ioctl + * return value. + * + * UBI device deletion (the same as MTD device detachment) + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * An UBI device maybe deleted with %UBI_IOCDET ioctl command of the UBI + * control device. + * + * UBI volume creation + * ~~~~~~~~~~~~~~~~~~~ + * + * UBI volumes are created via the %UBI_IOCMKVOL IOCTL command of UBI character + * device. A &struct ubi_mkvol_req object has to be properly filled and a + * pointer to it has to be passed to the IOCTL. + * + * UBI volume deletion + * ~~~~~~~~~~~~~~~~~~~ + * + * To delete a volume, the %UBI_IOCRMVOL IOCTL command of the UBI character + * device should be used. A pointer to the 32-bit volume ID hast to be passed + * to the IOCTL. + * + * UBI volume re-size + * ~~~~~~~~~~~~~~~~~~ + * + * To re-size a volume, the %UBI_IOCRSVOL IOCTL command of the UBI character + * device should be used. A &struct ubi_rsvol_req object has to be properly + * filled and a pointer to it has to be passed to the IOCTL. + * + * UBI volume update + * ~~~~~~~~~~~~~~~~~ + * + * Volume update should be done via the %UBI_IOCVOLUP IOCTL command of the + * corresponding UBI volume character device. A pointer to a 64-bit update + * size should be passed to the IOCTL. After this, UBI expects user to write + * this number of bytes to the volume character device. The update is finished + * when the claimed number of bytes is passed. So, the volume update sequence + * is something like: + * + * fd = open("/dev/my_volume"); + * ioctl(fd, UBI_IOCVOLUP, &image_size); + * write(fd, buf, image_size); + * close(fd); + * + * Atomic eraseblock change + * ~~~~~~~~~~~~~~~~~~~~~~~~ + * + * Atomic eraseblock change operation is done via the %UBI_IOCEBCH IOCTL + * command of the corresponding UBI volume character device. A pointer to + * &struct ubi_leb_change_req has to be passed to the IOCTL. Then the user is + * expected to write the requested amount of bytes. This is similar to the + * "volume update" IOCTL. + */ + +/* + * When a new UBI volume or UBI device is created, users may either specify the + * volume/device number they want to create or to let UBI automatically assign + * the number using these constants. + */ +#define UBI_VOL_NUM_AUTO (-1) +#define UBI_DEV_NUM_AUTO (-1) + +/* Maximum volume name length */ +#define UBI_MAX_VOLUME_NAME 127 + +/* IOCTL commands of UBI character devices */ + +#define UBI_IOC_MAGIC 'o' + +/* Create an UBI volume */ +#define UBI_IOCMKVOL _IOW(UBI_IOC_MAGIC, 0, struct ubi_mkvol_req) +/* Remove an UBI volume */ +#define UBI_IOCRMVOL _IOW(UBI_IOC_MAGIC, 1, int32_t) +/* Re-size an UBI volume */ +#define UBI_IOCRSVOL _IOW(UBI_IOC_MAGIC, 2, struct ubi_rsvol_req) + +/* IOCTL commands of the UBI control character device */ + +#define UBI_CTRL_IOC_MAGIC 'o' + +/* Attach an MTD device */ +#define UBI_IOCATT _IOW(UBI_CTRL_IOC_MAGIC, 64, struct ubi_attach_req) +/* Detach an MTD device */ +#define UBI_IOCDET _IOW(UBI_CTRL_IOC_MAGIC, 65, int32_t) + +/* IOCTL commands of UBI volume character devices */ + +#define UBI_VOL_IOC_MAGIC 'O' + +/* Start UBI volume update */ +#define UBI_IOCVOLUP _IOW(UBI_VOL_IOC_MAGIC, 0, int64_t) +/* An eraseblock erasure command, used for debugging, disabled by default */ +#define UBI_IOCEBER _IOW(UBI_VOL_IOC_MAGIC, 1, int32_t) +/* An atomic eraseblock change command */ +#define UBI_IOCEBCH _IOW(UBI_VOL_IOC_MAGIC, 2, int32_t) + +/* Maximum MTD device name length supported by UBI */ +#define MAX_UBI_MTD_NAME_LEN 127 + +/* + * UBI data type hint constants. + * + * UBI_LONGTERM: long-term data + * UBI_SHORTTERM: short-term data + * UBI_UNKNOWN: data persistence is unknown + * + * These constants are used when data is written to UBI volumes in order to + * help the UBI wear-leveling unit to find more appropriate physical + * eraseblocks. + */ +enum { + UBI_LONGTERM = 1, + UBI_SHORTTERM = 2, + UBI_UNKNOWN = 3, +}; + +/* + * UBI volume type constants. + * + * @UBI_DYNAMIC_VOLUME: dynamic volume + * @UBI_STATIC_VOLUME: static volume + */ +enum { + UBI_DYNAMIC_VOLUME = 3, + UBI_STATIC_VOLUME = 4, +}; + +/** + * struct ubi_attach_req - attach MTD device request. + * @ubi_num: UBI device number to create + * @mtd_num: MTD device number to attach + * @vid_hdr_offset: VID header offset (use defaults if %0) + * @padding: reserved for future, not used, has to be zeroed + * + * This data structure is used to specify MTD device UBI has to attach and the + * parameters it has to use. The number which should be assigned to the new UBI + * device is passed in @ubi_num. UBI may automatically assign the number if + * @UBI_DEV_NUM_AUTO is passed. In this case, the device number is returned in + * @ubi_num. + * + * Most applications should pass %0 in @vid_hdr_offset to make UBI use default + * offset of the VID header within physical eraseblocks. The default offset is + * the next min. I/O unit after the EC header. For example, it will be offset + * 512 in case of a 512 bytes page NAND flash with no sub-page support. Or + * it will be 512 in case of a 2KiB page NAND flash with 4 512-byte sub-pages. + * + * But in rare cases, if this optimizes things, the VID header may be placed to + * a different offset. For example, the boot-loader might do things faster if the + * VID header sits at the end of the first 2KiB NAND page with 4 sub-pages. As + * the boot-loader would not normally need to read EC headers (unless it needs + * UBI in RW mode), it might be faster to calculate ECC. This is weird example, + * but it real-life example. So, in this example, @vid_hdr_offer would be + * 2KiB-64 bytes = 1984. Note, that this position is not even 512-bytes + * aligned, which is OK, as UBI is clever enough to realize this is 4th sub-page + * of the first page and add needed padding. + */ +struct ubi_attach_req { + int32_t ubi_num; + int32_t mtd_num; + int32_t vid_hdr_offset; + uint8_t padding[12]; +}; + +/** + * struct ubi_mkvol_req - volume description data structure used in + * volume creation requests. + * @vol_id: volume number + * @alignment: volume alignment + * @bytes: volume size in bytes + * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) + * @padding1: reserved for future, not used, has to be zeroed + * @name_len: volume name length + * @padding2: reserved for future, not used, has to be zeroed + * @name: volume name + * + * This structure is used by user-space programs when creating new volumes. The + * @used_bytes field is only necessary when creating static volumes. + * + * The @alignment field specifies the required alignment of the volume logical + * eraseblock. This means, that the size of logical eraseblocks will be aligned + * to this number, i.e., + * (UBI device logical eraseblock size) mod (@alignment) = 0. + * + * To put it differently, the logical eraseblock of this volume may be slightly + * shortened in order to make it properly aligned. The alignment has to be + * multiple of the flash minimal input/output unit, or %1 to utilize the entire + * available space of logical eraseblocks. + * + * The @alignment field may be useful, for example, when one wants to maintain + * a block device on top of an UBI volume. In this case, it is desirable to fit + * an integer number of blocks in logical eraseblocks of this UBI volume. With + * alignment it is possible to update this volume using plane UBI volume image + * BLOBs, without caring about how to properly align them. + */ +struct ubi_mkvol_req { + int32_t vol_id; + int32_t alignment; + int64_t bytes; + int8_t vol_type; + int8_t padding1; + int16_t name_len; + int8_t padding2[4]; + char name[UBI_MAX_VOLUME_NAME + 1]; +} __attribute__ ((packed)); + +/** + * struct ubi_rsvol_req - a data structure used in volume re-size requests. + * @vol_id: ID of the volume to re-size + * @bytes: new size of the volume in bytes + * + * Re-sizing is possible for both dynamic and static volumes. But while dynamic + * volumes may be re-sized arbitrarily, static volumes cannot be made to be + * smaller then the number of bytes they bear. To arbitrarily shrink a static + * volume, it must be wiped out first (by means of volume update operation with + * zero number of bytes). + */ +struct ubi_rsvol_req { + int64_t bytes; + int32_t vol_id; +} __attribute__ ((packed)); + +/** + * struct ubi_leb_change_req - a data structure used in atomic logical + * eraseblock change requests. + * @lnum: logical eraseblock number to change + * @bytes: how many bytes will be written to the logical eraseblock + * @dtype: data type (%UBI_LONGTERM, %UBI_SHORTTERM, %UBI_UNKNOWN) + * @padding: reserved for future, not used, has to be zeroed + */ +struct ubi_leb_change_req { + int32_t lnum; + int32_t bytes; + uint8_t dtype; + uint8_t padding[7]; +} __attribute__ ((packed)); + +#endif /* __UBI_USER_H__ */ -- cgit v1.3.1 From 58be3a1056d88c6d05f3e914389282807e69923a Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Wed, 19 Nov 2008 16:38:24 +0100 Subject: UBI: Add basic UBI support to U-Boot (Part 8/8) This patch adds basic UBI (Unsorted Block Image) support to U-Boot. It's based on the Linux UBI version and basically has a "OS" translation wrapper that defines most Linux specific calls (spin_lock() etc.) into no-ops. Some source code parts have been uncommented by "#ifdef UBI_LINUX". This makes it easier to compare this version with the Linux version and simplifies future UBI ports/bug-fixes from the Linux version. Signed-off-by: Kyungmin Park Signed-off-by: Stefan Roese --- Makefile | 1 + include/linux/mtd/ubi-header.h | 360 ----------------------------------------- include/linux/mtd/ubi-user.h | 161 ------------------ 3 files changed, 1 insertion(+), 521 deletions(-) delete mode 100644 include/linux/mtd/ubi-header.h delete mode 100644 include/linux/mtd/ubi-user.h (limited to 'include') diff --git a/Makefile b/Makefile index fd521b6b56a..befb6081a82 100644 --- a/Makefile +++ b/Makefile @@ -230,6 +230,7 @@ LIBS += drivers/mtd/libmtd.a LIBS += drivers/mtd/nand/libnand.a LIBS += drivers/mtd/nand_legacy/libnand_legacy.a LIBS += drivers/mtd/onenand/libonenand.a +LIBS += drivers/mtd/ubi/libubi.a LIBS += drivers/mtd/spi/libspi_flash.a LIBS += drivers/net/libnet.a LIBS += drivers/net/phy/libphy.a diff --git a/include/linux/mtd/ubi-header.h b/include/linux/mtd/ubi-header.h deleted file mode 100644 index fa479c71aa3..00000000000 --- a/include/linux/mtd/ubi-header.h +++ /dev/null @@ -1,360 +0,0 @@ -/* - * Copyright (c) International Business Machines Corp., 2006 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - * the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Authors: Artem Bityutskiy (Битюцкий Артём) - * Thomas Gleixner - * Frank Haverkamp - * Oliver Lohmann - * Andreas Arnez - */ - -/* - * This file defines the layout of UBI headers and all the other UBI on-flash - * data structures. May be included by user-space. - */ - -#ifndef __UBI_HEADER_H__ -#define __UBI_HEADER_H__ - -#include - -/* The version of UBI images supported by this implementation */ -#define UBI_VERSION 1 - -/* The highest erase counter value supported by this implementation */ -#define UBI_MAX_ERASECOUNTER 0x7FFFFFFF - -/* The initial CRC32 value used when calculating CRC checksums */ -#define UBI_CRC32_INIT 0xFFFFFFFFU - -/* Erase counter header magic number (ASCII "UBI#") */ -#define UBI_EC_HDR_MAGIC 0x55424923 -/* Volume identifier header magic number (ASCII "UBI!") */ -#define UBI_VID_HDR_MAGIC 0x55424921 - -/* - * Volume type constants used in the volume identifier header. - * - * @UBI_VID_DYNAMIC: dynamic volume - * @UBI_VID_STATIC: static volume - */ -enum { - UBI_VID_DYNAMIC = 1, - UBI_VID_STATIC = 2 -}; - -/* - * Compatibility constants used by internal volumes. - * - * @UBI_COMPAT_DELETE: delete this internal volume before anything is written - * to the flash - * @UBI_COMPAT_RO: attach this device in read-only mode - * @UBI_COMPAT_PRESERVE: preserve this internal volume - do not touch its - * physical eraseblocks, don't allow the wear-leveling unit to move them - * @UBI_COMPAT_REJECT: reject this UBI image - */ -enum { - UBI_COMPAT_DELETE = 1, - UBI_COMPAT_RO = 2, - UBI_COMPAT_PRESERVE = 4, - UBI_COMPAT_REJECT = 5 -}; - -/* - * ubi16_t/ubi32_t/ubi64_t - 16, 32, and 64-bit integers used in UBI on-flash - * data structures. - */ -typedef struct { - uint16_t int16; -} __attribute__ ((packed)) ubi16_t; - -typedef struct { - uint32_t int32; -} __attribute__ ((packed)) ubi32_t; - -typedef struct { - uint64_t int64; -} __attribute__ ((packed)) ubi64_t; - -/* - * In this implementation of UBI uses the big-endian format for on-flash - * integers. The below are the corresponding conversion macros. - */ -#define cpu_to_ubi16(x) ((ubi16_t){__cpu_to_be16(x)}) -#define ubi16_to_cpu(x) ((uint16_t)__be16_to_cpu((x).int16)) - -#define cpu_to_ubi32(x) ((ubi32_t){__cpu_to_be32(x)}) -#define ubi32_to_cpu(x) ((uint32_t)__be32_to_cpu((x).int32)) - -#define cpu_to_ubi64(x) ((ubi64_t){__cpu_to_be64(x)}) -#define ubi64_to_cpu(x) ((uint64_t)__be64_to_cpu((x).int64)) - -/* Sizes of UBI headers */ -#define UBI_EC_HDR_SIZE sizeof(struct ubi_ec_hdr) -#define UBI_VID_HDR_SIZE sizeof(struct ubi_vid_hdr) - -/* Sizes of UBI headers without the ending CRC */ -#define UBI_EC_HDR_SIZE_CRC (UBI_EC_HDR_SIZE - sizeof(ubi32_t)) -#define UBI_VID_HDR_SIZE_CRC (UBI_VID_HDR_SIZE - sizeof(ubi32_t)) - -/** - * struct ubi_ec_hdr - UBI erase counter header. - * @magic: erase counter header magic number (%UBI_EC_HDR_MAGIC) - * @version: version of UBI implementation which is supposed to accept this - * UBI image - * @padding1: reserved for future, zeroes - * @ec: the erase counter - * @vid_hdr_offset: where the VID header starts - * @data_offset: where the user data start - * @padding2: reserved for future, zeroes - * @hdr_crc: erase counter header CRC checksum - * - * The erase counter header takes 64 bytes and has a plenty of unused space for - * future usage. The unused fields are zeroed. The @version field is used to - * indicate the version of UBI implementation which is supposed to be able to - * work with this UBI image. If @version is greater then the current UBI - * version, the image is rejected. This may be useful in future if something - * is changed radically. This field is duplicated in the volume identifier - * header. - * - * The @vid_hdr_offset and @data_offset fields contain the offset of the the - * volume identifier header and user data, relative to the beginning of the - * physical eraseblock. These values have to be the same for all physical - * eraseblocks. - */ -struct ubi_ec_hdr { - ubi32_t magic; - uint8_t version; - uint8_t padding1[3]; - ubi64_t ec; /* Warning: the current limit is 31-bit anyway! */ - ubi32_t vid_hdr_offset; - ubi32_t data_offset; - uint8_t padding2[36]; - ubi32_t hdr_crc; -} __attribute__ ((packed)); - -/** - * struct ubi_vid_hdr - on-flash UBI volume identifier header. - * @magic: volume identifier header magic number (%UBI_VID_HDR_MAGIC) - * @version: UBI implementation version which is supposed to accept this UBI - * image (%UBI_VERSION) - * @vol_type: volume type (%UBI_VID_DYNAMIC or %UBI_VID_STATIC) - * @copy_flag: if this logical eraseblock was copied from another physical - * eraseblock (for wear-leveling reasons) - * @compat: compatibility of this volume (%0, %UBI_COMPAT_DELETE, - * %UBI_COMPAT_IGNORE, %UBI_COMPAT_PRESERVE, or %UBI_COMPAT_REJECT) - * @vol_id: ID of this volume - * @lnum: logical eraseblock number - * @leb_ver: version of this logical eraseblock (IMPORTANT: obsolete, to be - * removed, kept only for not breaking older UBI users) - * @data_size: how many bytes of data this logical eraseblock contains - * @used_ebs: total number of used logical eraseblocks in this volume - * @data_pad: how many bytes at the end of this physical eraseblock are not - * used - * @data_crc: CRC checksum of the data stored in this logical eraseblock - * @padding1: reserved for future, zeroes - * @sqnum: sequence number - * @padding2: reserved for future, zeroes - * @hdr_crc: volume identifier header CRC checksum - * - * The @sqnum is the value of the global sequence counter at the time when this - * VID header was created. The global sequence counter is incremented each time - * UBI writes a new VID header to the flash, i.e. when it maps a logical - * eraseblock to a new physical eraseblock. The global sequence counter is an - * unsigned 64-bit integer and we assume it never overflows. The @sqnum - * (sequence number) is used to distinguish between older and newer versions of - * logical eraseblocks. - * - * There are 2 situations when there may be more then one physical eraseblock - * corresponding to the same logical eraseblock, i.e., having the same @vol_id - * and @lnum values in the volume identifier header. Suppose we have a logical - * eraseblock L and it is mapped to the physical eraseblock P. - * - * 1. Because UBI may erase physical eraseblocks asynchronously, the following - * situation is possible: L is asynchronously erased, so P is scheduled for - * erasure, then L is written to,i.e. mapped to another physical eraseblock P1, - * so P1 is written to, then an unclean reboot happens. Result - there are 2 - * physical eraseblocks P and P1 corresponding to the same logical eraseblock - * L. But P1 has greater sequence number, so UBI picks P1 when it attaches the - * flash. - * - * 2. From time to time UBI moves logical eraseblocks to other physical - * eraseblocks for wear-leveling reasons. If, for example, UBI moves L from P - * to P1, and an unclean reboot happens before P is physically erased, there - * are two physical eraseblocks P and P1 corresponding to L and UBI has to - * select one of them when the flash is attached. The @sqnum field says which - * PEB is the original (obviously P will have lower @sqnum) and the copy. But - * it is not enough to select the physical eraseblock with the higher sequence - * number, because the unclean reboot could have happen in the middle of the - * copying process, so the data in P is corrupted. It is also not enough to - * just select the physical eraseblock with lower sequence number, because the - * data there may be old (consider a case if more data was added to P1 after - * the copying). Moreover, the unclean reboot may happen when the erasure of P - * was just started, so it result in unstable P, which is "mostly" OK, but - * still has unstable bits. - * - * UBI uses the @copy_flag field to indicate that this logical eraseblock is a - * copy. UBI also calculates data CRC when the data is moved and stores it at - * the @data_crc field of the copy (P1). So when UBI needs to pick one physical - * eraseblock of two (P or P1), the @copy_flag of the newer one (P1) is - * examined. If it is cleared, the situation* is simple and the newer one is - * picked. If it is set, the data CRC of the copy (P1) is examined. If the CRC - * checksum is correct, this physical eraseblock is selected (P1). Otherwise - * the older one (P) is selected. - * - * Note, there is an obsolete @leb_ver field which was used instead of @sqnum - * in the past. But it is not used anymore and we keep it in order to be able - * to deal with old UBI images. It will be removed at some point. - * - * There are 2 sorts of volumes in UBI: user volumes and internal volumes. - * Internal volumes are not seen from outside and are used for various internal - * UBI purposes. In this implementation there is only one internal volume - the - * layout volume. Internal volumes are the main mechanism of UBI extensions. - * For example, in future one may introduce a journal internal volume. Internal - * volumes have their own reserved range of IDs. - * - * The @compat field is only used for internal volumes and contains the "degree - * of their compatibility". It is always zero for user volumes. This field - * provides a mechanism to introduce UBI extensions and to be still compatible - * with older UBI binaries. For example, if someone introduced a journal in - * future, he would probably use %UBI_COMPAT_DELETE compatibility for the - * journal volume. And in this case, older UBI binaries, which know nothing - * about the journal volume, would just delete this volume and work perfectly - * fine. This is similar to what Ext2fs does when it is fed by an Ext3fs image - * - it just ignores the Ext3fs journal. - * - * The @data_crc field contains the CRC checksum of the contents of the logical - * eraseblock if this is a static volume. In case of dynamic volumes, it does - * not contain the CRC checksum as a rule. The only exception is when the - * data of the physical eraseblock was moved by the wear-leveling unit, then - * the wear-leveling unit calculates the data CRC and stores it in the - * @data_crc field. And of course, the @copy_flag is %in this case. - * - * The @data_size field is used only for static volumes because UBI has to know - * how many bytes of data are stored in this eraseblock. For dynamic volumes, - * this field usually contains zero. The only exception is when the data of the - * physical eraseblock was moved to another physical eraseblock for - * wear-leveling reasons. In this case, UBI calculates CRC checksum of the - * contents and uses both @data_crc and @data_size fields. In this case, the - * @data_size field contains data size. - * - * The @used_ebs field is used only for static volumes and indicates how many - * eraseblocks the data of the volume takes. For dynamic volumes this field is - * not used and always contains zero. - * - * The @data_pad is calculated when volumes are created using the alignment - * parameter. So, effectively, the @data_pad field reduces the size of logical - * eraseblocks of this volume. This is very handy when one uses block-oriented - * software (say, cramfs) on top of the UBI volume. - */ -struct ubi_vid_hdr { - ubi32_t magic; - uint8_t version; - uint8_t vol_type; - uint8_t copy_flag; - uint8_t compat; - ubi32_t vol_id; - ubi32_t lnum; - ubi32_t leb_ver; /* obsolete, to be removed, don't use */ - ubi32_t data_size; - ubi32_t used_ebs; - ubi32_t data_pad; - ubi32_t data_crc; - uint8_t padding1[4]; - ubi64_t sqnum; - uint8_t padding2[12]; - ubi32_t hdr_crc; -} __attribute__ ((packed)); - -/* Internal UBI volumes count */ -#define UBI_INT_VOL_COUNT 1 - -/* - * Starting ID of internal volumes. There is reserved room for 4096 internal - * volumes. - */ -#define UBI_INTERNAL_VOL_START (0x7FFFFFFF - 4096) - -/* The layout volume contains the volume table */ - -#define UBI_LAYOUT_VOL_ID UBI_INTERNAL_VOL_START -#define UBI_LAYOUT_VOLUME_EBS 2 -#define UBI_LAYOUT_VOLUME_NAME "layout volume" -#define UBI_LAYOUT_VOLUME_COMPAT UBI_COMPAT_REJECT - -/* The maximum number of volumes per one UBI device */ -#define UBI_MAX_VOLUMES 128 - -/* The maximum volume name length */ -#define UBI_VOL_NAME_MAX 127 - -/* Size of the volume table record */ -#define UBI_VTBL_RECORD_SIZE sizeof(struct ubi_vtbl_record) - -/* Size of the volume table record without the ending CRC */ -#define UBI_VTBL_RECORD_SIZE_CRC (UBI_VTBL_RECORD_SIZE - sizeof(ubi32_t)) - -/** - * struct ubi_vtbl_record - a record in the volume table. - * @reserved_pebs: how many physical eraseblocks are reserved for this volume - * @alignment: volume alignment - * @data_pad: how many bytes are unused at the end of the each physical - * eraseblock to satisfy the requested alignment - * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) - * @upd_marker: if volume update was started but not finished - * @name_len: volume name length - * @name: the volume name - * @padding2: reserved, zeroes - * @crc: a CRC32 checksum of the record - * - * The volume table records are stored in the volume table, which is stored in - * the layout volume. The layout volume consists of 2 logical eraseblock, each - * of which contains a copy of the volume table (i.e., the volume table is - * duplicated). The volume table is an array of &struct ubi_vtbl_record - * objects indexed by the volume ID. - * - * If the size of the logical eraseblock is large enough to fit - * %UBI_MAX_VOLUMES records, the volume table contains %UBI_MAX_VOLUMES - * records. Otherwise, it contains as many records as it can fit (i.e., size of - * logical eraseblock divided by sizeof(struct ubi_vtbl_record)). - * - * The @upd_marker flag is used to implement volume update. It is set to %1 - * before update and set to %0 after the update. So if the update operation was - * interrupted, UBI knows that the volume is corrupted. - * - * The @alignment field is specified when the volume is created and cannot be - * later changed. It may be useful, for example, when a block-oriented file - * system works on top of UBI. The @data_pad field is calculated using the - * logical eraseblock size and @alignment. The alignment must be multiple to the - * minimal flash I/O unit. If @alignment is 1, all the available space of - * the physical eraseblocks is used. - * - * Empty records contain all zeroes and the CRC checksum of those zeroes. - */ -struct ubi_vtbl_record { - ubi32_t reserved_pebs; - ubi32_t alignment; - ubi32_t data_pad; - uint8_t vol_type; - uint8_t upd_marker; - ubi16_t name_len; - uint8_t name[UBI_VOL_NAME_MAX+1]; - uint8_t padding2[24]; - ubi32_t crc; -} __attribute__ ((packed)); - -#endif /* !__UBI_HEADER_H__ */ diff --git a/include/linux/mtd/ubi-user.h b/include/linux/mtd/ubi-user.h deleted file mode 100644 index fe06ded0e6b..00000000000 --- a/include/linux/mtd/ubi-user.h +++ /dev/null @@ -1,161 +0,0 @@ -/* - * Copyright (c) International Business Machines Corp., 2006 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - * the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Author: Artem Bityutskiy (Битюцкий Артём) - */ - -#ifndef __UBI_USER_H__ -#define __UBI_USER_H__ - -/* - * UBI volume creation - * ~~~~~~~~~~~~~~~~~~~ - * - * UBI volumes are created via the %UBI_IOCMKVOL IOCTL command of UBI character - * device. A &struct ubi_mkvol_req object has to be properly filled and a - * pointer to it has to be passed to the IOCTL. - * - * UBI volume deletion - * ~~~~~~~~~~~~~~~~~~~ - * - * To delete a volume, the %UBI_IOCRMVOL IOCTL command of the UBI character - * device should be used. A pointer to the 32-bit volume ID hast to be passed - * to the IOCTL. - * - * UBI volume re-size - * ~~~~~~~~~~~~~~~~~~ - * - * To re-size a volume, the %UBI_IOCRSVOL IOCTL command of the UBI character - * device should be used. A &struct ubi_rsvol_req object has to be properly - * filled and a pointer to it has to be passed to the IOCTL. - * - * UBI volume update - * ~~~~~~~~~~~~~~~~~ - * - * Volume update should be done via the %UBI_IOCVOLUP IOCTL command of the - * corresponding UBI volume character device. A pointer to a 64-bit update - * size should be passed to the IOCTL. After then, UBI expects user to write - * this number of bytes to the volume character device. The update is finished - * when the claimed number of bytes is passed. So, the volume update sequence - * is something like: - * - * fd = open("/dev/my_volume"); - * ioctl(fd, UBI_IOCVOLUP, &image_size); - * write(fd, buf, image_size); - * close(fd); - */ - -/* - * When a new volume is created, users may either specify the volume number they - * want to create or to let UBI automatically assign a volume number using this - * constant. - */ -#define UBI_VOL_NUM_AUTO (-1) - -/* Maximum volume name length */ -#define UBI_MAX_VOLUME_NAME 127 - -/* IOCTL commands of UBI character devices */ - -#define UBI_IOC_MAGIC 'o' - -/* Create an UBI volume */ -#define UBI_IOCMKVOL _IOW(UBI_IOC_MAGIC, 0, struct ubi_mkvol_req) -/* Remove an UBI volume */ -#define UBI_IOCRMVOL _IOW(UBI_IOC_MAGIC, 1, int32_t) -/* Re-size an UBI volume */ -#define UBI_IOCRSVOL _IOW(UBI_IOC_MAGIC, 2, struct ubi_rsvol_req) - -/* IOCTL commands of UBI volume character devices */ - -#define UBI_VOL_IOC_MAGIC 'O' - -/* Start UBI volume update */ -#define UBI_IOCVOLUP _IOW(UBI_VOL_IOC_MAGIC, 0, int64_t) -/* An eraseblock erasure command, used for debugging, disabled by default */ -#define UBI_IOCEBER _IOW(UBI_VOL_IOC_MAGIC, 1, int32_t) - -/* - * UBI volume type constants. - * - * @UBI_DYNAMIC_VOLUME: dynamic volume - * @UBI_STATIC_VOLUME: static volume - */ -enum { - UBI_DYNAMIC_VOLUME = 3, - UBI_STATIC_VOLUME = 4 -}; - -/** - * struct ubi_mkvol_req - volume description data structure used in - * volume creation requests. - * @vol_id: volume number - * @alignment: volume alignment - * @bytes: volume size in bytes - * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) - * @padding1: reserved for future, not used - * @name_len: volume name length - * @padding2: reserved for future, not used - * @name: volume name - * - * This structure is used by userspace programs when creating new volumes. The - * @used_bytes field is only necessary when creating static volumes. - * - * The @alignment field specifies the required alignment of the volume logical - * eraseblock. This means, that the size of logical eraseblocks will be aligned - * to this number, i.e., - * (UBI device logical eraseblock size) mod (@alignment) = 0. - * - * To put it differently, the logical eraseblock of this volume may be slightly - * shortened in order to make it properly aligned. The alignment has to be - * multiple of the flash minimal input/output unit, or %1 to utilize the entire - * available space of logical eraseblocks. - * - * The @alignment field may be useful, for example, when one wants to maintain - * a block device on top of an UBI volume. In this case, it is desirable to fit - * an integer number of blocks in logical eraseblocks of this UBI volume. With - * alignment it is possible to update this volume using plane UBI volume image - * BLOBs, without caring about how to properly align them. - */ -struct ubi_mkvol_req { - int32_t vol_id; - int32_t alignment; - int64_t bytes; - int8_t vol_type; - int8_t padding1; - int16_t name_len; - int8_t padding2[4]; - char name[UBI_MAX_VOLUME_NAME+1]; -} __attribute__ ((packed)); - -/** - * struct ubi_rsvol_req - a data structure used in volume re-size requests. - * @vol_id: ID of the volume to re-size - * @bytes: new size of the volume in bytes - * - * Re-sizing is possible for both dynamic and static volumes. But while dynamic - * volumes may be re-sized arbitrarily, static volumes cannot be made to be - * smaller then the number of bytes they bear. To arbitrarily shrink a static - * volume, it must be wiped out first (by means of volume update operation with - * zero number of bytes). - */ -struct ubi_rsvol_req { - int64_t bytes; - int32_t vol_id; -} __attribute__ ((packed)); - -#endif /* __UBI_USER_H__ */ -- cgit v1.3.1 From 8000b086b33a5a81f3f390f37e178db7956dc08b Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Fri, 24 Oct 2008 14:55:33 +0200 Subject: ARM: Add Apollon UBI support To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI macro. Signed-off-by: Kyungmin Park Signed-off-by: Stefan Roese --- board/apollon/Makefile | 3 +- include/configs/apollon.h | 74 ++++++++++++++++++++++++++++++++++++----------- 2 files changed, 59 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/board/apollon/Makefile b/board/apollon/Makefile index 9bac9a6c0ab..f20de3c9381 100644 --- a/board/apollon/Makefile +++ b/board/apollon/Makefile @@ -25,9 +25,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := apollon.o mem.o sys_info.o +COBJS-y := apollon.o mem.o sys_info.o SOBJS := lowlevel_init.o +COBJS := $(COBJS-y) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/include/configs/apollon.h b/include/configs/apollon.h index d71ed44fcdf..dff47fc6a6c 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -53,6 +53,9 @@ #define CONFIG_SYS_USE_NOR 1 #endif +/* uncommnet if you want to use UBI */ +#define CONFIG_SYS_USE_UBI + #include /* get chip and board defs */ #define V_SCLK 12000000 @@ -73,8 +76,9 @@ * Size of malloc() pool */ #define CONFIG_ENV_SIZE SZ_128K /* Total Size of Environment Sector */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_128K) -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M) +/* bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* * Hardware drivers @@ -116,6 +120,13 @@ #define CONFIG_CMD_DIAG #define CONFIG_CMD_ONENAND +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS +#endif + #undef CONFIG_CMD_AUTOSCRIPT #ifndef CONFIG_SYS_USE_NOR @@ -133,24 +144,39 @@ #define CONFIG_BOOTFILE "uImage" #define CONFIG_ETHADDR 00:0E:99:00:24:20 -#ifdef CONFIG_APOLLON_PLUS -# define CONFIG_BOOTARGS "root=/dev/nfs rw mem=64M console=ttyS0,115200n8 ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2" +#ifdef CONFIG_APOLLON_PLUS +#define CONFIG_SYS_MEM "mem=64M" +#else +#define CONFIG_SYS_MEM "mem=128" +#endif + +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_SYS_UBI "ubi.mtd=4" #else -# define CONFIG_BOOTARGS "root=/dev/nfs rw mem=128M console=ttyS0,115200n8 ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2" +#define CONFIG_SYS_UBI "" #endif +#define CONFIG_BOOTARGS "root=/dev/nfs rw " CONFIG_SYS_MEM \ + " console=ttyS0,115200n8" \ + " ip=192.168.116.25:192.168.116.1:192.168.116.1:255.255.255.0:" \ + "apollon:eth0:off nfsroot=/tftpboot/nfsroot profile=2 " \ + CONFIG_SYS_UBI + #define CONFIG_EXTRA_ENV_SETTINGS \ "Image=tftp 0x80008000 Image; go 0x80008000\0" \ "zImage=tftp 0x80180000 zImage; go 0x80180000\0" \ "uImage=tftp 0x80180000 uImage; bootm 0x80180000\0" \ "uboot=tftp 0x80008000 u-boot.bin; go 0x80008000\0" \ - "xloader=tftp 0x80180000 x-load.bin; cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \ + "xloader=tftp 0x80180000 x-load.bin; " \ + " cp.w 0x80180000 0x00000400 0x1000; go 0x00000400\0" \ "syncmode50=mw.w 0x1e442 0xc0c4; mw 0x6800a060 0xe30d1201\0" \ "syncmode=mw.w 0x1e442 0xe0f4; mw 0x6800a060 0xe30d1201\0" \ "norboot=cp32 0x18040000 0x80008000 0x200000; go 0x80008000\0" \ - "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0"\ + "oneboot=onenand read 0x80008000 0x40000 0x200000; go 0x80008000\0" \ "onesyncboot=run syncmode oneboot\0" \ - "updateb=tftp 0x80180000 u-boot-onenand.bin; onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \ + "updateb=tftp 0x80180000 u-boot-onenand.bin; " \ + " onenand erase 0x0 0x20000; onenand write 0x80180000 0x0 0x20000\0" \ + "ubi=setenv bootargs ${bootargs} ubi.mtd=4 ${mtdparts}; run uImage\0" \ "bootcmd=run uboot\0" /* @@ -164,14 +190,15 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) /* memtest works on */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START (OMAP2420_SDRC_CS0) #define CONFIG_SYS_MEMTEST_END (OMAP2420_SDRC_CS0+SZ_31M) #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ - -#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* default load address */ +/* default load address */ +#define CONFIG_SYS_LOAD_ADDR (OMAP2420_SDRC_CS0) /* The 2420 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) * or by 32KHz clk, or from external sig. This rate is divided by a local @@ -211,13 +238,15 @@ # define CONFIG_SYS_MAX_FLASH_BANKS 1 # define CONFIG_SYS_MAX_FLASH_SECT 1024 /*----------------------------------------------------------------------- - * CFI FLASH driver setup */ -# define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ +/* Flash memory is CFI compliant */ +# define CONFIG_SYS_FLASH_CFI 1 # define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ -/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ /* Use buffered writes (~10x faster) */ -# define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w sector protection*/ +/* Use buffered writes (~10x faster) */ +/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 */ +/* Use h/w sector protection*/ +# define CONFIG_SYS_FLASH_PROTECTION 1 #else /* !CONFIG_SYS_USE_NOR */ # define CONFIG_SYS_NO_FLASH 1 @@ -228,4 +257,15 @@ #define CONFIG_ENV_IS_IN_ONENAND 1 #define CONFIG_ENV_ADDR 0x00020000 +#ifdef CONFIG_SYS_USE_UBI +#define CONFIG_JFFS2_CMDLINE +#define MTDIDS_DEFAULT "onenand0=onenand" +#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(bootloader)," \ + "128k(params)," \ + "2m(kernel)," \ + "16m(rootfs)," \ + "32m(fs)," \ + "-(ubifs)" +#endif + #endif /* __CONFIG_H */ -- cgit v1.3.1 From ad229a44e162af0f65e57e4e3dc133d5f0364ecb Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Fri, 7 Nov 2008 13:55:14 +0100 Subject: AT91: Use AT91_CPU_CLOCK in displays Introduce AT91_CPU_CLOCK and use it for displaying the CPU speed in the LCD driver. Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the corresponding board clocks. Signed-off-by: Stelian Pop --- board/atmel/at91cap9adk/at91cap9adk.c | 2 +- board/atmel/at91sam9261ek/at91sam9261ek.c | 2 +- board/atmel/at91sam9263ek/at91sam9263ek.c | 2 +- board/atmel/at91sam9rlek/at91sam9rlek.c | 2 +- include/configs/at91cap9adk.h | 7 ++++--- include/configs/at91sam9260ek.h | 8 +++++--- include/configs/at91sam9261ek.h | 7 ++++--- include/configs/at91sam9263ek.h | 7 ++++--- include/configs/at91sam9rlek.h | 7 ++++--- 9 files changed, 25 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index af145cc7c0c..f7d68b705e3 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -342,7 +342,7 @@ void lcd_show_board_info(void) lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", AT91_CPU_NAME, - strmhz(temp, AT91_MAIN_CLOCK)); + strmhz(temp, AT91_CPU_CLOCK)); dram_size = 0; for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 185d6e1307d..14f236da23b 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -225,7 +225,7 @@ void lcd_show_board_info(void) lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", AT91_CPU_NAME, - strmhz(temp, AT91_MAIN_CLOCK)); + strmhz(temp, AT91_CPU_CLOCK)); dram_size = 0; for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 4feed9a52f3..ebd464976c7 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -276,7 +276,7 @@ void lcd_show_board_info(void) lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", AT91_CPU_NAME, - strmhz(temp, AT91_MAIN_CLOCK)); + strmhz(temp, AT91_CPU_CLOCK)); dram_size = 0; for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index 992dd4cd2c9..b6fef9d6f5f 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -197,7 +197,7 @@ void lcd_show_board_info(void) lcd_printf ("at91support@atmel.com\n"); lcd_printf ("%s CPU at %s MHz\n", AT91_CPU_NAME, - strmhz(temp, AT91_MAIN_CLOCK)); + strmhz(temp, AT91_CPU_CLOCK)); dram_size = 0; for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 30a7cb41f9b..667e0496b60 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -29,9 +29,10 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91CAP9" -#define AT91_MAIN_CLOCK 200000000 /* from 12 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index be9a8eb51e3..81c8d39b24d 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -28,9 +28,11 @@ #define __CONFIG_H /* ARM asynchronous clock */ -#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */ -#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_CPU_NAME "AT91SAM9260" +#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index add31c95a97..efe35a4b762 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -29,9 +29,10 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9261" -#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */ -#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 555cb7f2ea0..ef5b666311f 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -29,9 +29,10 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9263" -#define AT91_MAIN_CLOCK 199919000 /* from 16.367 MHz crystal */ -#define AT91_MASTER_CLOCK 99959500 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 648d60ef1d3..35dac47ba1c 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -29,9 +29,10 @@ /* ARM asynchronous clock */ #define AT91_CPU_NAME "AT91SAM9RL" -#define AT91_MAIN_CLOCK 200000000 /* from 12.000 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */ -#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ +#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ -- cgit v1.3.1 From 3e0cda071a67cb5709e3fa4faf6b31a731859acc Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Sun, 9 Nov 2008 00:14:46 +0100 Subject: AT91: Enable PLLB for USB At least some (old ?) versions of the AT91Bootstrap do not set up the PLLB correctly to 48 MHz in order to make USB host function correctly. This patch sets up the PLLB to the same values Linux uses, and makes USB work ok on the following CPUs: - AT91CAP9 - AT91SAM9260 - AT91SAM9263 This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all the relevant AT91CAP9/AT91SAM9 atmel boards. Signed-off-by: Stelian Pop Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- cpu/arm926ejs/at91/usb.c | 18 ++++++++++++++++++ include/configs/afeb9260.h | 1 + include/configs/at91cap9adk.h | 3 +++ include/configs/at91sam9260ek.h | 2 ++ include/configs/at91sam9261ek.h | 1 + include/configs/at91sam9263ek.h | 2 ++ 6 files changed, 27 insertions(+) (limited to 'include') diff --git a/cpu/arm926ejs/at91/usb.c b/cpu/arm926ejs/at91/usb.c index 7cb082db1be..2f5c337474e 100644 --- a/cpu/arm926ejs/at91/usb.c +++ b/cpu/arm926ejs/at91/usb.c @@ -31,6 +31,15 @@ int usb_cpu_init(void) { + +#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ + defined(CONFIG_AT91SAM9263) + /* Enable PLLB */ + at91_sys_write(AT91_CKGR_PLLBR, CFG_AT91_PLLB); + while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) + ; +#endif + /* Enable USB host clock. */ at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP); #ifdef CONFIG_AT91SAM9261 @@ -51,6 +60,15 @@ int usb_cpu_stop(void) #else at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP); #endif + +#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ + defined(CONFIG_AT91SAM9263) + /* Disable PLLB */ + at91_sys_write(AT91_CKGR_PLLBR, 0); + while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0) + ; +#endif + return 0; } diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 755952fe21d..f077ad90f41 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -29,6 +29,7 @@ /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ +#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 667e0496b60..aeb06ac64b6 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -137,6 +138,8 @@ #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 81c8d39b24d..fbc470fbe0a 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -123,6 +124,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index efe35a4b762..bd668235d38 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -137,6 +137,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index ef5b666311f..a2b09ca9f7c 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -32,6 +32,7 @@ #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ +#define CFG_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -143,6 +144,7 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_STORAGE 1 +#define CONFIG_CMD_FAT 1 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -- cgit v1.3.1 From 711e2b2af820d21d9931d4cf8057d3894600fd54 Mon Sep 17 00:00:00 2001 From: "Steven A. Falco" Date: Thu, 20 Nov 2008 14:37:57 -0500 Subject: ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.h The definitions of bits in SDR_CFG are incorrect, and not used within U-Boot. Therefore, they can be removed. The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, and are unused, so they can be removed too. A definition for SDR0_DDRCFG is added. Signed-off-by: Steven A. Falco Signed-off-by: Stefan Roese --- include/ppc440.h | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/ppc440.h b/include/ppc440.h index ea0ac86d088..4d2157a8f2e 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -169,18 +169,9 @@ #define sdr_ecid1 0x0081 #define sdr_ecid2 0x0082 #define sdr_jtag 0x00c0 -#if !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) -#define sdr_ddrdl 0x00e0 -#else -#define sdr_cfg 0x00e0 -#define SDR_CFG_LT2_MASK 0x01000000 /* Leakage test 2*/ -#define SDR_CFG_64_32BITS_MASK 0x01000000 /* Switch DDR 64 bits or 32 bits */ -#define SDR_CFG_32BITS 0x00000000 /* 32 bits */ -#define SDR_CFG_64BITS 0x01000000 /* 64 bits */ -#define SDR_CFG_MC_V2518_MASK 0x02000000 /* Low VDD2518 (2.5 or 1.8V) */ -#define SDR_CFG_MC_V25 0x00000000 /* 2.5 V */ -#define SDR_CFG_MC_V18 0x02000000 /* 1.8 V */ -#endif /* !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX) */ +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#define SDR0_DDRCFG 0x00e0 +#endif /* defined(CONFIG_440EPX) || defined(CONFIG_440GRX) */ #define sdr_ebc 0x0100 #define sdr_uart0 0x0120 /* UART0 Config */ #define sdr_uart1 0x0121 /* UART1 Config */ -- cgit v1.3.1 From b14ca4b61a681f75f3125676e09d7ce6af66e927 Mon Sep 17 00:00:00 2001 From: Dave Mitchell Date: Thu, 20 Nov 2008 14:00:49 -0600 Subject: ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and L2 cache DCRs from ppc440.h to this new header. Also converted these DCR defines from lowercase to uppercase and modified referencing modules to use them. Signed-off-by: Dave Mitchell Signed-off-by: Stefan Roese --- board/amcc/luan/luan.c | 23 ++++++------- cpu/ppc4xx/start.S | 41 ++++++++++++----------- include/asm-ppc/ppc4xx-isram.h | 75 ++++++++++++++++++++++++++++++++++++++++++ include/ppc440.h | 39 ---------------------- 4 files changed, 108 insertions(+), 70 deletions(-) create mode 100644 include/asm-ppc/ppc4xx-isram.h (limited to 'include') diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c index b28ebf98e97..de3e3d8b925 100644 --- a/board/amcc/luan/luan.c +++ b/board/amcc/luan/luan.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include "epld.h" @@ -255,7 +256,7 @@ static int on_off( const char *s ) ************************************************************************/ static void l2cache_disable(void) { - mtdcr( l2_cache_cfg, 0 ); + mtdcr( L2_CACHE_CFG, 0 ); } @@ -265,24 +266,24 @@ static void l2cache_disable(void) ************************************************************************/ static void l2cache_enable(void) /* see p258 7.4.1 Enabling L2 Cache */ { - mtdcr( l2_cache_cfg, 0x80000000 ); /* enable L2_MODE L2_CFG[L2M] */ + mtdcr( L2_CACHE_CFG, 0x80000000 ); /* enable L2_MODE L2_CFG[L2M] */ - mtdcr( l2_cache_addr, 0 ); /* set L2_ADDR with all zeros */ + mtdcr( L2_CACHE_ADDR, 0 ); /* set L2_ADDR with all zeros */ - mtdcr( l2_cache_cmd, 0x80000000 ); /* issue HCLEAR command via L2_CMD */ + mtdcr( L2_CACHE_CMD, 0x80000000 ); /* issue HCLEAR command via L2_CMD */ - while (!(mfdcr( l2_cache_stat ) & 0x80000000 )) ;; /* poll L2_SR for completion */ + while (!(mfdcr( L2_CACHE_STAT ) & 0x80000000 )) ;; /* poll L2_SR for completion */ - mtdcr( l2_cache_cmd, 0x10000000 ); /* clear cache errors L2_CMD[CCP] */ + mtdcr( L2_CACHE_CMD, 0x10000000 ); /* clear cache errors L2_CMD[CCP] */ - mtdcr( l2_cache_cmd, 0x08000000 ); /* clear tag errors L2_CMD[CTE] */ + mtdcr( L2_CACHE_CMD, 0x08000000 ); /* clear tag errors L2_CMD[CTE] */ - mtdcr( l2_cache_snp0, 0 ); /* snoop registers */ - mtdcr( l2_cache_snp1, 0 ); + mtdcr( L2_CACHE_SNP0, 0 ); /* snoop registers */ + mtdcr( L2_CACHE_SNP1, 0 ); __asm__ volatile ("sync"); /* msync */ - mtdcr( l2_cache_cfg, 0xe0000000 ); /* inst and data use L2 */ + mtdcr( L2_CACHE_CFG, 0xe0000000 ); /* inst and data use L2 */ __asm__ volatile ("sync"); } @@ -294,7 +295,7 @@ static void l2cache_enable(void) /* see p258 7.4.1 Enabling L2 Cache */ ************************************************************************/ static int l2cache_status(void) { - return (mfdcr( l2_cache_cfg ) & 0x60000000) != 0; + return (mfdcr( L2_CACHE_CFG ) & 0x60000000) != 0; } diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 84d7a2889fb..db34e84d3ef 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -72,6 +72,7 @@ #include #include +#include #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -679,65 +680,65 @@ _start: defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ defined(CONFIG_460SX) - mtdcr l2_cache_cfg,r0 /* Ensure L2 Cache is off */ + mtdcr L2_CACHE_CFG,r0 /* Ensure L2 Cache is off */ #endif lis r2,0x7fff ori r2,r2,0xffff - mfdcr r1,isram0_dpc + mfdcr r1,ISRAM0_DPC and r1,r1,r2 /* Disable parity check */ - mtdcr isram0_dpc,r1 - mfdcr r1,isram0_pmeg + mtdcr ISRAM0_DPC,r1 + mfdcr r1,ISRAM0_PMEG and r1,r1,r2 /* Disable pwr mgmt */ - mtdcr isram0_pmeg,r1 + mtdcr ISRAM0_PMEG,r1 lis r1,0x8000 /* BAS = 8000_0000 */ #if defined(CONFIG_440GX) || defined(CONFIG_440SP) ori r1,r1,0x0980 /* first 64k */ - mtdcr isram0_sb0cr,r1 + mtdcr ISRAM0_SB0CR,r1 lis r1,0x8001 ori r1,r1,0x0980 /* second 64k */ - mtdcr isram0_sb1cr,r1 + mtdcr ISRAM0_SB1CR,r1 lis r1, 0x8002 ori r1,r1, 0x0980 /* third 64k */ - mtdcr isram0_sb2cr,r1 + mtdcr ISRAM0_SB2CR,r1 lis r1, 0x8003 ori r1,r1, 0x0980 /* fourth 64k */ - mtdcr isram0_sb3cr,r1 + mtdcr ISRAM0_SB3CR,r1 #elif defined(CONFIG_440SPE) lis r1,0x0000 /* BAS = 0000_0000 */ ori r1,r1,0x0984 /* first 64k */ - mtdcr isram0_sb0cr,r1 + mtdcr ISRAM0_SB0CR,r1 lis r1,0x0001 ori r1,r1,0x0984 /* second 64k */ - mtdcr isram0_sb1cr,r1 + mtdcr ISRAM0_SB1CR,r1 lis r1, 0x0002 ori r1,r1, 0x0984 /* third 64k */ - mtdcr isram0_sb2cr,r1 + mtdcr ISRAM0_SB2CR,r1 lis r1, 0x0003 ori r1,r1, 0x0984 /* fourth 64k */ - mtdcr isram0_sb3cr,r1 + mtdcr ISRAM0_SB3CR,r1 #elif defined(CONFIG_460EX) || defined(CONFIG_460GT) lis r1,0x4000 /* BAS = 8000_0000 */ ori r1,r1,0x4580 /* 16k */ - mtdcr isram0_sb0cr,r1 + mtdcr ISRAM0_SB0CR,r1 #elif defined(CONFIG_460SX) lis r1,0x0000 /* BAS = 0000_0000 */ ori r1,r1,0x0B84 /* first 128k */ - mtdcr isram0_sb0cr,r1 + mtdcr ISRAM0_SB0CR,r1 lis r1,0x0001 ori r1,r1,0x0B84 /* second 128k */ - mtdcr isram0_sb1cr,r1 + mtdcr ISRAM0_SB1CR,r1 lis r1, 0x0002 ori r1,r1, 0x0B84 /* third 128k */ - mtdcr isram0_sb2cr,r1 + mtdcr ISRAM0_SB2CR,r1 lis r1, 0x0003 ori r1,r1, 0x0B84 /* fourth 128k */ - mtdcr isram0_sb3cr,r1 + mtdcr ISRAM0_SB3CR,r1 #elif defined(CONFIG_440GP) ori r1,r1,0x0380 /* 8k rw */ - mtdcr isram0_sb0cr,r1 - mtdcr isram0_sb1cr,r0 /* Disable bank 1 */ + mtdcr ISRAM0_SB0CR,r1 + mtdcr ISRAM0_SB1CR,r0 /* Disable bank 1 */ #endif #endif /* #if !defined(CONFIG_440EP) && !defined(CONFIG_440GR) */ diff --git a/include/asm-ppc/ppc4xx-isram.h b/include/asm-ppc/ppc4xx-isram.h new file mode 100644 index 00000000000..d6d17ac961b --- /dev/null +++ b/include/asm-ppc/ppc4xx-isram.h @@ -0,0 +1,75 @@ + +/* + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _PPC4xx_ISRAM_H_ +#define _PPC4xx_ISRAM_H_ + +/* + * Internal SRAM + */ +#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) +#define ISRAM0_DCR_BASE 0x380 +#else +#define ISRAM0_DCR_BASE 0x020 +#endif +#define ISRAM0_SB0CR (ISRAM0_DCR_BASE+0x00) /* SRAM bank config 0*/ +#define ISRAM0_SB1CR (ISRAM0_DCR_BASE+0x01) /* SRAM bank config 1*/ +#define ISRAM0_SB2CR (ISRAM0_DCR_BASE+0x02) /* SRAM bank config 2*/ +#define ISRAM0_SB3CR (ISRAM0_DCR_BASE+0x03) /* SRAM bank config 3*/ +#define ISRAM0_BEAR (ISRAM0_DCR_BASE+0x04) /* SRAM bus error addr reg */ +#define ISRAM0_BESR0 (ISRAM0_DCR_BASE+0x05) /* SRAM bus error status reg 0 */ +#define ISRAM0_BESR1 (ISRAM0_DCR_BASE+0x06) /* SRAM bus error status reg 1 */ +#define ISRAM0_PMEG (ISRAM0_DCR_BASE+0x07) /* SRAM power management */ +#define ISRAM0_CID (ISRAM0_DCR_BASE+0x08) /* SRAM bus core id reg */ +#define ISRAM0_REVID (ISRAM0_DCR_BASE+0x09) /* SRAM bus revision id reg */ +#define ISRAM0_DPC (ISRAM0_DCR_BASE+0x0a) /* SRAM data parity check reg */ + +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) +#define ISRAM1_DCR_BASE 0x0B0 +#define ISRAM1_SB0CR (ISRAM1_DCR_BASE+0x00) /* SRAM1 bank config 0*/ +#define ISRAM1_BEAR (ISRAM1_DCR_BASE+0x04) /* SRAM1 bus error addr reg */ +#define ISRAM1_BESR0 (ISRAM1_DCR_BASE+0x05) /* SRAM1 bus error status reg 0 */ +#define ISRAM1_BESR1 (ISRAM1_DCR_BASE+0x06) /* SRAM1 bus error status reg 1 */ +#define ISRAM1_PMEG (ISRAM1_DCR_BASE+0x07) /* SRAM1 power management */ +#define ISRAM1_CID (ISRAM1_DCR_BASE+0x08) /* SRAM1 bus core id reg */ +#define ISRAM1_REVID (ISRAM1_DCR_BASE+0x09) /* SRAM1 bus revision id reg */ +#define ISRAM1_DPC (ISRAM1_DCR_BASE+0x0a) /* SRAM1 data parity check reg */ +#endif /* CONFIG_460EX || CONFIG_460GT */ + +/* + * L2 Cache + */ +#if defined (CONFIG_440GX) || \ + defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ + defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ + defined(CONFIG_460SX) +#define L2_CACHE_BASE 0x030 +#define L2_CACHE_CFG (L2_CACHE_BASE+0x00) /* L2 Cache Config */ +#define L2_CACHE_CMD (L2_CACHE_BASE+0x01) /* L2 Cache Command */ +#define L2_CACHE_ADDR (L2_CACHE_BASE+0x02) /* L2 Cache Address */ +#define L2_CACHE_DATA (L2_CACHE_BASE+0x03) /* L2 Cache Data */ +#define L2_CACHE_STAT (L2_CACHE_BASE+0x04) /* L2 Cache Status */ +#define L2_CACHE_CVER (L2_CACHE_BASE+0x05) /* L2 Cache Revision ID */ +#define L2_CACHE_SNP0 (L2_CACHE_BASE+0x06) /* L2 Cache Snoop reg 0 */ +#define L2_CACHE_SNP1 (L2_CACHE_BASE+0x07) /* L2 Cache Snoop reg 1 */ +#endif /* CONFIG_440GX */ + +#endif /* _PPC4xx_ISRAM_H_ */ diff --git a/include/ppc440.h b/include/ppc440.h index 4d2157a8f2e..01f6eaf35e6 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -607,45 +607,6 @@ #endif /* 440EP || 440GR || 440EPX || 440GRX */ -/*----------------------------------------------------------------------------- - | L2 Cache - +----------------------------------------------------------------------------*/ -#if defined (CONFIG_440GX) || \ - defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ - defined(CONFIG_460SX) -#define L2_CACHE_BASE 0x030 -#define l2_cache_cfg (L2_CACHE_BASE+0x00) /* L2 Cache Config */ -#define l2_cache_cmd (L2_CACHE_BASE+0x01) /* L2 Cache Command */ -#define l2_cache_addr (L2_CACHE_BASE+0x02) /* L2 Cache Address */ -#define l2_cache_data (L2_CACHE_BASE+0x03) /* L2 Cache Data */ -#define l2_cache_stat (L2_CACHE_BASE+0x04) /* L2 Cache Status */ -#define l2_cache_cver (L2_CACHE_BASE+0x05) /* L2 Cache Revision ID */ -#define l2_cache_snp0 (L2_CACHE_BASE+0x06) /* L2 Cache Snoop reg 0 */ -#define l2_cache_snp1 (L2_CACHE_BASE+0x07) /* L2 Cache Snoop reg 1 */ - -#endif /* CONFIG_440GX */ - -/*----------------------------------------------------------------------------- - | Internal SRAM - +----------------------------------------------------------------------------*/ -#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) -#define ISRAM0_DCR_BASE 0x380 -#else -#define ISRAM0_DCR_BASE 0x020 -#endif -#define isram0_sb0cr (ISRAM0_DCR_BASE+0x00) /* SRAM bank config 0*/ -#define isram0_sb1cr (ISRAM0_DCR_BASE+0x01) /* SRAM bank config 1*/ -#define isram0_sb2cr (ISRAM0_DCR_BASE+0x02) /* SRAM bank config 2*/ -#define isram0_sb3cr (ISRAM0_DCR_BASE+0x03) /* SRAM bank config 3*/ -#define isram0_bear (ISRAM0_DCR_BASE+0x04) /* SRAM bus error addr reg */ -#define isram0_besr0 (ISRAM0_DCR_BASE+0x05) /* SRAM bus error status reg 0 */ -#define isram0_besr1 (ISRAM0_DCR_BASE+0x06) /* SRAM bus error status reg 1 */ -#define isram0_pmeg (ISRAM0_DCR_BASE+0x07) /* SRAM power management */ -#define isram0_cid (ISRAM0_DCR_BASE+0x08) /* SRAM bus core id reg */ -#define isram0_revid (ISRAM0_DCR_BASE+0x09) /* SRAM bus revision id reg */ -#define isram0_dpc (ISRAM0_DCR_BASE+0x0a) /* SRAM data parity check reg */ - #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) -- cgit v1.3.1 From ddf45cc758d394591fb9bcdcbe96530f733f2bce Mon Sep 17 00:00:00 2001 From: Dave Mitchell Date: Thu, 20 Nov 2008 14:09:50 -0600 Subject: ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization Expanded OCM TLB to allow access to 64K OCM as well as 256K of internal SRAM. Adjusted internal SRAM initialization to match updated user manual recommendation. OCM & ISRAM are now mapped as follows: physical virtual size ISRAM 0x4_0000_0000 0xE300_0000 256k OCM 0x4_0004_0000 0xE304_0000 64k A single TLB was used for this mapping. Signed-off-by: Dave Mitchell Signed-off-by: Stefan Roese --- board/amcc/canyonlands/init.S | 2 +- cpu/ppc4xx/start.S | 27 ++++++++++++++++++++------- include/configs/canyonlands.h | 2 +- 3 files changed, 22 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S index 51b46d71071..0b667968acc 100644 --- a/board/amcc/canyonlands/init.S +++ b/board/amcc/canyonlands/init.S @@ -89,7 +89,7 @@ tlbtab: #endif /* TLB-entry for OCM */ - tlbentry(CONFIG_SYS_OCM_BASE, SZ_16K, 0x00040000, 4, AC_R|AC_W|AC_X|SA_I) + tlbentry(CONFIG_SYS_OCM_BASE, SZ_1M, 0x00000000, 4, AC_R|AC_W|AC_X|SA_I) /* TLB-entry for Local Configuration registers => peripherals */ tlbentry(CONFIG_SYS_LOCAL_CONF_REGS, SZ_16M, CONFIG_SYS_LOCAL_CONF_REGS, 4, AC_R|AC_W|AC_X|SA_G|SA_I) diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index db34e84d3ef..e68cf9b6db1 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -678,9 +678,12 @@ _start: /* not all PPC's have internal SRAM usable as L2-cache */ #if defined(CONFIG_440GX) || \ defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ defined(CONFIG_460SX) mtdcr L2_CACHE_CFG,r0 /* Ensure L2 Cache is off */ +#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) + lis r1, 0x0000 + ori r1,r1,0x0008 /* Set L2_CACHE_CFG[RDBW]=1 */ + mtdcr L2_CACHE_CFG,r1 #endif lis r2,0x7fff @@ -705,8 +708,8 @@ _start: lis r1, 0x8003 ori r1,r1, 0x0980 /* fourth 64k */ mtdcr ISRAM0_SB3CR,r1 -#elif defined(CONFIG_440SPE) - lis r1,0x0000 /* BAS = 0000_0000 */ +#elif defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT) + lis r1,0x0000 /* BAS = X_0000_0000 */ ori r1,r1,0x0984 /* first 64k */ mtdcr ISRAM0_SB0CR,r1 lis r1,0x0001 @@ -718,10 +721,20 @@ _start: lis r1, 0x0003 ori r1,r1, 0x0984 /* fourth 64k */ mtdcr ISRAM0_SB3CR,r1 -#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) - lis r1,0x4000 /* BAS = 8000_0000 */ - ori r1,r1,0x4580 /* 16k */ - mtdcr ISRAM0_SB0CR,r1 +#if defined(CONFIG_460EX) || defined(CONFIG_460GT) + lis r2,0x7fff + ori r2,r2,0xffff + mfdcr r1,ISRAM1_DPC + and r1,r1,r2 /* Disable parity check */ + mtdcr ISRAM1_DPC,r1 + mfdcr r1,ISRAM1_PMEG + and r1,r1,r2 /* Disable pwr mgmt */ + mtdcr ISRAM1_PMEG,r1 + + lis r1,0x0004 /* BAS = 4_0004_0000 */ + ori r1,r1,0x0984 /* 64k */ + mtdcr ISRAM1_SB0CR,r1 +#endif #elif defined(CONFIG_460SX) lis r1,0x0000 /* BAS = 0000_0000 */ ori r1,r1,0x0B84 /* first 128k */ diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index f8e880181b7..faf630496db 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -102,7 +102,7 @@ #define CONFIG_SYS_FLASH_BASE_PHYS (((u64)CONFIG_SYS_FLASH_BASE_PHYS_H << 32) | \ (u64)CONFIG_SYS_FLASH_BASE_PHYS_L) -#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 16k */ +#define CONFIG_SYS_OCM_BASE 0xE3000000 /* OCM: 64k */ #define CONFIG_SYS_SRAM_BASE 0xE8000000 /* SRAM: 256k */ #define CONFIG_SYS_LOCAL_CONF_REGS 0xEF000000 -- cgit v1.3.1 From 1a6a00dcc5bdfc6e9b4b00f39c1f583a7f96fc7f Mon Sep 17 00:00:00 2001 From: Yuri Tikhonov Date: Fri, 14 Nov 2008 16:19:19 +0300 Subject: ppc4xx: katmai: Change default config This patch enables support for EXT2, and increases the CONFIG_SYS_BOOTMAPSZ size for the default configuration of the katmai boards to use them as the RAID-reference AMCC setups. EXT2 enabling allows one to boot kernels from the EXT2 formatted Compact Flash cards. CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the Linux kernels, which use PAGE_SIZE of 256KB. Otherwise, the memory area with DTB file (which is placed at the end of the bootmap area) will turn out to be overlapped with the BSS segment of the 256KB kernel, and zeroed in early_init() of Linux. Actually, increasing of the bootmap size could be done via setting of the bootm_size U-Boot variable, but it looks like the current U-Boot implementation have some bootm_size- related functionality lost. In many places through the U-Boot code the CONFIG_SYS_BOOTMAPSZ definition is used directly (instead of trying to read the corresponding value from the environment). The same is truth for the boot_jump_linux() function in lib_ppc/bootm.c, where U-Boot transfers control to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size) value to the booting kernel. Signed-off-by: Yuri Tikhonov Signed-off-by: Ilya Yanok Signed-off-by: Stefan Roese --- include/configs/katmai.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 58694cca4b1..ea6cf0d23fc 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -53,6 +53,13 @@ #define CONFIG_HOSTNAME katmai #include "amcc-common.h" +/* + * For booting 256K-paged Linux we should have 16MB of memory + * for Linux initial memory map + */ +#undef CONFIG_SYS_BOOTMAPSZ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ #undef CONFIG_SHOW_BOOT_PROGRESS @@ -189,6 +196,7 @@ /* * Commands additional to the ones defined in amcc-common.h */ +#define CONFIG_CMD_EXT2 #define CONFIG_CMD_DATE #define CONFIG_CMD_PCI #define CONFIG_CMD_SDRAM -- cgit v1.3.1 From ebc9784ce6528385bb8d2558e783622d4bbf20f8 Mon Sep 17 00:00:00 2001 From: Piotr Ziecik Date: Thu, 20 Nov 2008 15:17:38 +0100 Subject: cfi_flash: Export flash_sector_size() function. Export flash_sector_size() function from drivers/mtd/cfi_flash.c, so that it can be used in the upcoming cfi-mtd driver. Signed-off-by: Piotr Ziecik Signed-off-by: Stefan Roese --- drivers/mtd/cfi_flash.c | 2 -- include/flash.h | 3 +++ 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index f10d5fea18f..37af62742e0 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -175,8 +175,6 @@ flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #endif -typedef unsigned long flash_sect_t; - /* CFI standard query structure */ struct cfi_qry { u8 qry[3]; diff --git a/include/flash.h b/include/flash.h index a6e91b5e69f..8a00c2f8998 100644 --- a/include/flash.h +++ b/include/flash.h @@ -58,6 +58,8 @@ typedef struct { #endif } flash_info_t; +typedef unsigned long flash_sect_t; + /* * Values for the width of the port */ @@ -92,6 +94,7 @@ extern int flash_erase (flash_info_t *, int, int); extern int flash_sect_erase (ulong addr_first, ulong addr_last); extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last); extern int flash_sect_roundb (ulong *addr); +extern unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect); /* common/flash.c */ extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info); -- cgit v1.3.1 From 6ea808efdf9aa5d9067fbfac32acde8539129ed2 Mon Sep 17 00:00:00 2001 From: Piotr Ziecik Date: Mon, 17 Nov 2008 15:49:32 +0100 Subject: cfi_flash: Add interface for flash verbosity control Add interface for flash verbosity control. It allows to disable output from low-level flash API. It is useful when calling these low-level functions from context other than flash commands (for example the MTD/CFI interface implmentation). Signed-off-by: Piotr Ziecik Signed-off-by: Stefan Roese --- drivers/mtd/cfi_flash.c | 33 ++++++++++++++++++++++----------- include/flash.h | 1 + 2 files changed, 23 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 37af62742e0..b8422e15f36 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -158,6 +158,7 @@ typedef union { #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; +static uint flash_verbose = 1; /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT @@ -1070,7 +1071,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) if (prot) { printf ("- Warning: %d protected sectors will not be erased!\n", prot); - } else { + } else if (flash_verbose) { putc ('\n'); } @@ -1117,11 +1118,14 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) if (flash_full_status_check (info, sect, info->erase_blk_tout, "erase")) { rcode = 1; - } else + } else if (flash_verbose) putc ('.'); } } - puts (" done\n"); + + if (flash_verbose) + puts (" done\n"); + return rcode; } @@ -1233,14 +1237,16 @@ void flash_print_info (flash_info_t * info) */ #ifdef CONFIG_FLASH_SHOW_PROGRESS #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \ - dots -= dots_sub; \ - if ((scale > 0) && (dots <= 0)) { \ - if ((digit % 5) == 0) \ - printf ("%d", digit / 5); \ - else \ - putc ('.'); \ - digit--; \ - dots += scale; \ + if (flash_verbose) { \ + dots -= dots_sub; \ + if ((scale > 0) && (dots <= 0)) { \ + if ((digit % 5) == 0) \ + printf ("%d", digit / 5); \ + else \ + putc ('.'); \ + digit--; \ + dots += scale; \ + } \ } #else #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) @@ -1958,6 +1964,11 @@ ulong flash_get_size (ulong base, int banknum) return (info->size); } +void flash_set_verbose(uint v) +{ + flash_verbose = v; +} + /*----------------------------------------------------------------------- */ unsigned long flash_init (void) diff --git a/include/flash.h b/include/flash.h index 8a00c2f8998..05fa57240be 100644 --- a/include/flash.h +++ b/include/flash.h @@ -95,6 +95,7 @@ extern int flash_sect_erase (ulong addr_first, ulong addr_last); extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last); extern int flash_sect_roundb (ulong *addr); extern unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect); +extern void flash_set_verbose(uint); /* common/flash.c */ extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info); -- cgit v1.3.1 From 91809ed51d8327a8dbbf29aa98a091154c282171 Mon Sep 17 00:00:00 2001 From: Piotr Ziecik Date: Mon, 17 Nov 2008 15:57:58 +0100 Subject: cfi-mtd: Add cfi-mtd driver. Add cfi-mtd driver, which exports CFI flash to MTD layer. This allows CFI flash devices to be used from MTD layer. Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD option. Initialization is done by calling cfi_mtd_init() from flash_init(). Signed-off-by: Piotr Ziecik Signed-off-by: Stefan Roese --- README | 5 ++ drivers/mtd/Makefile | 1 + drivers/mtd/cfi_flash.c | 5 ++ drivers/mtd/cfi_mtd.c | 202 ++++++++++++++++++++++++++++++++++++++++++++++++ include/flash.h | 8 ++ 5 files changed, 221 insertions(+) create mode 100644 drivers/mtd/cfi_mtd.c (limited to 'include') diff --git a/README b/README index 9455fa76077..861ea838e32 100644 --- a/README +++ b/README @@ -2157,6 +2157,11 @@ Configuration Settings: This option also enables the building of the cfi_flash driver in the drivers directory +- CONFIG_FLASH_CFI_MTD + This option enables the building of the cfi_mtd driver + in the drivers directory. The driver exports CFI flash + to the MTD layer. + - CONFIG_SYS_FLASH_USE_BUFFER_WRITE Use buffered writes to flash. diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index 6538f7a1586..47687d0e042 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -27,6 +27,7 @@ LIB := $(obj)libmtd.a COBJS-$(CONFIG_HAS_DATAFLASH) += at45.o COBJS-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o +COBJS-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o COBJS-$(CONFIG_HAS_DATAFLASH) += dataflash.o COBJS-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o COBJS-$(CONFIG_MW_EEPROM) += mw_eeprom.o diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index b8422e15f36..e8afe9985c8 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -2087,5 +2087,10 @@ unsigned long flash_init (void) flash_get_info(apl[i].start)); } #endif + +#ifdef CONFIG_FLASH_CFI_MTD + cfi_mtd_init(); +#endif + return (size); } diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c new file mode 100644 index 00000000000..cf82d927886 --- /dev/null +++ b/drivers/mtd/cfi_mtd.c @@ -0,0 +1,202 @@ +/* + * (C) Copyright 2008 Semihalf + * + * Written by: Piotr Ziecik + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include +#include + +#include +#include + +extern flash_info_t flash_info[]; + +static struct mtd_info cfi_mtd_info[CONFIG_SYS_MAX_FLASH_BANKS]; + +static int cfi_mtd_erase(struct mtd_info *mtd, struct erase_info *instr) +{ + flash_info_t *fi = mtd->priv; + size_t a_start = fi->start[0] + instr->addr; + size_t a_end = a_start + instr->len; + int s_first = -1; + int s_last = -1; + int error, sect; + + for (sect = 0; sect < fi->sector_count - 1; sect++) { + if (a_start == fi->start[sect]) + s_first = sect; + + if (a_end == fi->start[sect + 1]) { + s_last = sect; + break; + } + } + + if (s_first >= 0 && s_first <= s_last) { + instr->state = MTD_ERASING; + + flash_set_verbose(0); + error = flash_erase(fi, s_first, s_last); + flash_set_verbose(1); + + if (error) { + instr->state = MTD_ERASE_FAILED; + return -EIO; + } + + instr->state = MTD_ERASE_DONE; + mtd_erase_callback(instr); + return 0; + } + + return -EINVAL; +} + +static int cfi_mtd_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u_char *buf) +{ + flash_info_t *fi = mtd->priv; + u_char *f = (u_char*)(fi->start[0]) + from; + + memcpy(buf, f, len); + *retlen = len; + + return 0; +} + +static int cfi_mtd_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) +{ + flash_info_t *fi = mtd->priv; + u_long t = fi->start[0] + to; + int error; + + flash_set_verbose(0); + error = write_buff(fi, (u_char*)buf, t, len); + flash_set_verbose(1); + + if (!error) { + *retlen = len; + return 0; + } + + return -EIO; +} + +static void cfi_mtd_sync(struct mtd_info *mtd) +{ + /* + * This function should wait until all pending operations + * finish. However this driver is fully synchronous, so + * this function returns immediately + */ +} + +static int cfi_mtd_lock(struct mtd_info *mtd, loff_t ofs, size_t len) +{ + flash_info_t *fi = mtd->priv; + + flash_set_verbose(0); + flash_protect(FLAG_PROTECT_SET, fi->start[0] + ofs, + fi->start[0] + ofs + len - 1, fi); + flash_set_verbose(1); + + return 0; +} + +static int cfi_mtd_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) +{ + flash_info_t *fi = mtd->priv; + + flash_set_verbose(0); + flash_protect(FLAG_PROTECT_CLEAR, fi->start[0] + ofs, + fi->start[0] + ofs + len - 1, fi); + flash_set_verbose(1); + + return 0; +} + +static int cfi_mtd_set_erasesize(struct mtd_info *mtd, flash_info_t *fi) +{ + int sect_size = 0; + int sect; + + for (sect = 0; sect < fi->sector_count; sect++) { + if (!sect_size) { + sect_size = flash_sector_size(fi, sect); + continue; + } + + if (sect_size != flash_sector_size(fi, sect)) { + sect_size = 0; + break; + } + } + + if (!sect_size) { + puts("cfi-mtd: devices with multiple sector sizes are" + "not supported\n"); + return -EINVAL; + } + + mtd->erasesize = sect_size; + + return 0; +} + +int cfi_mtd_init(void) +{ + struct mtd_info *mtd; + flash_info_t *fi; + int error, i; + + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { + fi = &flash_info[i]; + mtd = &cfi_mtd_info[i]; + + memset(mtd, 0, sizeof(struct mtd_info)); + + error = cfi_mtd_set_erasesize(mtd, fi); + if (error) + continue; + + mtd->name = CFI_MTD_DEV_NAME; + mtd->type = MTD_NORFLASH; + mtd->flags = MTD_CAP_NORFLASH; + mtd->size = fi->size; + mtd->writesize = 1; + + mtd->erase = cfi_mtd_erase; + mtd->read = cfi_mtd_read; + mtd->write = cfi_mtd_write; + mtd->sync = cfi_mtd_sync; + mtd->lock = cfi_mtd_lock; + mtd->unlock = cfi_mtd_unlock; + mtd->priv = fi; + + if (add_mtd_device(mtd)) + return -ENOMEM; + } + + return 0; +} diff --git a/include/flash.h b/include/flash.h index 05fa57240be..6e2981c5aef 100644 --- a/include/flash.h +++ b/include/flash.h @@ -86,6 +86,9 @@ typedef unsigned long flash_sect_t; /* convert between bit value and numeric value */ #define CFI_FLASH_SHIFT_WIDTH 3 + +/* cfi-mtd device name */ +#define CFI_MTD_DEV_NAME "cfi-mtd" /* Prototypes */ extern unsigned long flash_init (void); @@ -103,6 +106,11 @@ extern int flash_write (char *, ulong, ulong); extern flash_info_t *addr2info (ulong); extern int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt); +/* drivers/mtd/cfi_mtd.c */ +#ifdef CONFIG_FLASH_CFI_MTD +extern int cfi_mtd_init(void); +#endif + /* board/?/flash.c */ #if defined(CONFIG_SYS_FLASH_PROTECTION) extern int flash_real_protect(flash_info_t *info, long sector, int prot); -- cgit v1.3.1 From 8052352f20b33bef8f9872fc983eac73d4693c38 Mon Sep 17 00:00:00 2001 From: Jens Scharsig Date: Tue, 18 Nov 2008 10:48:46 +0100 Subject: at91rm9200: fix broken boot from nor flash This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if CONFIG_AT91RM9200 is defined and nor preloader is used. Signed-off-by: Jens Scharsig --- cpu/arm920t/start.S | 5 +---- include/configs/at91rm9200dk.h | 2 ++ include/configs/cmc_pu2.h | 2 ++ include/configs/csb637.h | 2 ++ include/configs/kb9202.h | 2 ++ include/configs/mp2usb.h | 2 ++ 6 files changed, 11 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index 17977c26b1e..f99d129f85e 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -24,7 +24,6 @@ * MA 02111-1307 USA */ - #include #include #include @@ -178,8 +177,6 @@ copyex: bl cpu_init_crit #endif -#ifndef CONFIG_AT91RM9200 - #ifndef CONFIG_SKIP_RELOCATE_UBOOT relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ @@ -198,7 +195,7 @@ copy_loop: cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop #endif /* CONFIG_SKIP_RELOCATE_UBOOT */ -#endif + /* Set up the stack */ stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 633a0530001..5c239d7bf74 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -72,6 +72,8 @@ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#else +#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* * Size of malloc() pool diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h index 527921e8fce..cdd308d8b91 100644 --- a/include/configs/cmc_pu2.h +++ b/include/configs/cmc_pu2.h @@ -71,6 +71,8 @@ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#else +#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* diff --git a/include/configs/csb637.h b/include/configs/csb637.h index 38fd25cb668..682db447dd8 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -72,6 +72,8 @@ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#else +#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* * Size of malloc() pool diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h index 55cda329ee9..1ce8c6974ad 100644 --- a/include/configs/kb9202.h +++ b/include/configs/kb9202.h @@ -51,6 +51,8 @@ #define CONFIG_INITRD_TAG 1 #define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_SKIP_RELOCATE_UBOOT /* undef this for direct boot from */ + /* NOR flash without preloader */ #define CONFIG_SYS_LONGHELP diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index 2ffeae608b3..cbbdb0c77ed 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -76,6 +76,8 @@ #define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ #define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#else +#define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ /* -- cgit v1.3.1 From 24eea623d4974a169026a975ba12fb23d48154b1 Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Mon, 24 Nov 2008 15:11:10 +0100 Subject: ppc4xx: Remove unused features This patch disables some unused features from the PCI405 configuration to keep U-Boot image size below 192k. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- include/configs/PCI405.h | 57 ++++++------------------------------------------ 1 file changed, 7 insertions(+), 50 deletions(-) (limited to 'include') diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index 0393366b5c0..d0a37d7bc5f 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -60,39 +60,24 @@ #define CONFIG_PREBOOT /* enable preboot variable */ -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -#define CONFIG_PPC4xx_EMAC -#define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_PHY_ADDR 0 /* PHY address */ - -#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - /* * Command line configuration. */ #include +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_ITEST +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + #define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ #define CONFIG_CMD_ELF -#define CONFIG_CMD_DATE #define CONFIG_CMD_I2C #define CONFIG_CMD_BSP #define CONFIG_CMD_EEPROM - #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */ @@ -102,7 +87,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ @@ -166,15 +150,9 @@ #define CONFIG_SYS_PCI_PTM1MS 0xff000001 /* 16MB, enable hard-wired to 1 */ #define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */ -#if 0 /* test-only */ -#define CONFIG_SYS_PCI_PTM2LA 0xffc00000 /* point to flash */ -#define CONFIG_SYS_PCI_PTM2MS 0xffc00001 /* 4MB, enable */ -#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */ -#else #define CONFIG_SYS_PCI_PTM2LA 0xef600000 /* point to internal regs */ #define CONFIG_SYS_PCI_PTM2MS 0xffe00001 /* 2MB, enable */ #define CONFIG_SYS_PCI_PTM2PCI 0x00000000 /* Host: use this pci address */ -#endif /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -215,22 +193,10 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ -#if 0 /* Use NVRAM for environment variables */ -/*----------------------------------------------------------------------- - * NVRAM organization - */ -#define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */ -#define CONFIG_ENV_SIZE 0x0ff8 /* Size of Environment vars */ -#define CONFIG_ENV_ADDR \ - (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-(CONFIG_ENV_SIZE+8)) /* Env */ - -#else /* Use EEPROM for environment variables */ - #define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CONFIG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CONFIG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars*/ /* total size of a CAT24WC08 is 1024 bytes */ -#endif #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0200000 /* NVRAM base address */ #define CONFIG_SYS_NVRAM_SIZE (32*1024) /* NVRAM size */ @@ -327,14 +293,6 @@ /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in data cache) */ -#if 0 /* test-only */ -#define CONFIG_SYS_INIT_DCACHE_CS 7 /* use cs # 7 for data cache memory */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* use data cache */ -#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#else /* use on chip memory ( OCM ) for temperary stack until sdram is tested */ #define CONFIG_SYS_TEMP_STACK_OCM 1 /* On Chip Memory location */ @@ -346,7 +304,6 @@ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#endif /* * Internal Definitions -- cgit v1.3.1 From de39f8c19d7c12017248c49d432dcb81db68f724 Mon Sep 17 00:00:00 2001 From: Michael Trimarchi Date: Wed, 26 Nov 2008 17:41:34 +0100 Subject: USB style patch, 80 chars strict MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit USB Code style patch Signed-off-by: Michael Trimarchi Signed-off-by: Remy Böhmer --- common/cmd_usb.c | 595 +++++++++++++++++++++++++++++-------------------------- common/usb.c | 40 ++-- include/usb.h | 222 ++++++++++++--------- 3 files changed, 465 insertions(+), 392 deletions(-) (limited to 'include') diff --git a/common/cmd_usb.c b/common/cmd_usb.c index 99e551f9772..8a8dca9c92b 100644 --- a/common/cmd_usb.c +++ b/common/cmd_usb.c @@ -36,178 +36,210 @@ static int usb_stor_curr_dev = -1; /* current device */ #endif /* some display routines (info command) */ -char * usb_get_class_desc(unsigned char dclass) +char *usb_get_class_desc(unsigned char dclass) { - switch(dclass) { - case USB_CLASS_PER_INTERFACE: - return("See Interface"); - case USB_CLASS_AUDIO: - return("Audio"); - case USB_CLASS_COMM: - return("Communication"); - case USB_CLASS_HID: - return("Human Interface"); - case USB_CLASS_PRINTER: - return("Printer"); - case USB_CLASS_MASS_STORAGE: - return("Mass Storage"); - case USB_CLASS_HUB: - return("Hub"); - case USB_CLASS_DATA: - return("CDC Data"); - case USB_CLASS_VENDOR_SPEC: - return("Vendor specific"); - default : - return(""); + switch (dclass) { + case USB_CLASS_PER_INTERFACE: + return "See Interface"; + case USB_CLASS_AUDIO: + return "Audio"; + case USB_CLASS_COMM: + return "Communication"; + case USB_CLASS_HID: + return "Human Interface"; + case USB_CLASS_PRINTER: + return "Printer"; + case USB_CLASS_MASS_STORAGE: + return "Mass Storage"; + case USB_CLASS_HUB: + return "Hub"; + case USB_CLASS_DATA: + return "CDC Data"; + case USB_CLASS_VENDOR_SPEC: + return "Vendor specific"; + default: + return ""; } } -void usb_display_class_sub(unsigned char dclass,unsigned char subclass,unsigned char proto) +void usb_display_class_sub(unsigned char dclass, unsigned char subclass, + unsigned char proto) { - switch(dclass) { - case USB_CLASS_PER_INTERFACE: - printf("See Interface"); + switch (dclass) { + case USB_CLASS_PER_INTERFACE: + printf("See Interface"); + break; + case USB_CLASS_HID: + printf("Human Interface, Subclass: "); + switch (subclass) { + case USB_SUB_HID_NONE: + printf("None"); break; - case USB_CLASS_HID: - printf("Human Interface, Subclass: "); - switch(subclass) { - case USB_SUB_HID_NONE: - printf("None"); - break; - case USB_SUB_HID_BOOT: - printf("Boot "); - switch(proto) { - case USB_PROT_HID_NONE: - printf("None"); - break; - case USB_PROT_HID_KEYBOARD: - printf("Keyboard"); - break; - case USB_PROT_HID_MOUSE: - printf("Mouse"); - break; - default: - printf("reserved"); - } - break; - default: - printf("reserved"); + case USB_SUB_HID_BOOT: + printf("Boot "); + switch (proto) { + case USB_PROT_HID_NONE: + printf("None"); + break; + case USB_PROT_HID_KEYBOARD: + printf("Keyboard"); + break; + case USB_PROT_HID_MOUSE: + printf("Mouse"); + break; + default: + printf("reserved"); + break; } break; - case USB_CLASS_MASS_STORAGE: - printf("Mass Storage, "); - switch(subclass) { - case US_SC_RBC: - printf("RBC "); - break; - case US_SC_8020: - printf("SFF-8020i (ATAPI)"); - break; - case US_SC_QIC: - printf("QIC-157 (Tape)"); - break; - case US_SC_UFI: - printf("UFI"); - break; - case US_SC_8070: - printf("SFF-8070"); - break; - case US_SC_SCSI: - printf("Transp. SCSI"); - break; - default: - printf("reserved"); - break; - } - printf(", "); - switch(proto) { - case US_PR_CB: - printf("Command/Bulk"); - break; - case US_PR_CBI: - printf("Command/Bulk/Int"); - break; - case US_PR_BULK: - printf("Bulk only"); - break; - default: - printf("reserved"); - } + default: + printf("reserved"); + break; + } + break; + case USB_CLASS_MASS_STORAGE: + printf("Mass Storage, "); + switch (subclass) { + case US_SC_RBC: + printf("RBC "); + break; + case US_SC_8020: + printf("SFF-8020i (ATAPI)"); + break; + case US_SC_QIC: + printf("QIC-157 (Tape)"); + break; + case US_SC_UFI: + printf("UFI"); + break; + case US_SC_8070: + printf("SFF-8070"); + break; + case US_SC_SCSI: + printf("Transp. SCSI"); + break; + default: + printf("reserved"); + break; + } + printf(", "); + switch (proto) { + case US_PR_CB: + printf("Command/Bulk"); + break; + case US_PR_CBI: + printf("Command/Bulk/Int"); + break; + case US_PR_BULK: + printf("Bulk only"); break; default: - printf("%s",usb_get_class_desc(dclass)); + printf("reserved"); + break; + } + break; + default: + printf("%s", usb_get_class_desc(dclass)); + break; } } -void usb_display_string(struct usb_device *dev,int index) +void usb_display_string(struct usb_device *dev, int index) { char buffer[256]; - if (index!=0) { - if (usb_string(dev,index,&buffer[0],256)>0); - printf("String: \"%s\"",buffer); + if (index != 0) { + if (usb_string(dev, index, &buffer[0], 256) > 0) + printf("String: \"%s\"", buffer); } } void usb_display_desc(struct usb_device *dev) { - if (dev->descriptor.bDescriptorType==USB_DT_DEVICE) { - printf("%d: %s, USB Revision %x.%x\n",dev->devnum,usb_get_class_desc(dev->config.if_desc[0].bInterfaceClass), - (dev->descriptor.bcdUSB>>8) & 0xff,dev->descriptor.bcdUSB & 0xff); - if (strlen(dev->mf) || strlen(dev->prod) || strlen(dev->serial)) - printf(" - %s %s %s\n",dev->mf,dev->prod,dev->serial); + if (dev->descriptor.bDescriptorType == USB_DT_DEVICE) { + printf("%d: %s, USB Revision %x.%x\n", dev->devnum, + usb_get_class_desc(dev->config.if_desc[0].bInterfaceClass), + (dev->descriptor.bcdUSB>>8) & 0xff, + dev->descriptor.bcdUSB & 0xff); + + if (strlen(dev->mf) || strlen(dev->prod) || + strlen(dev->serial)) + printf(" - %s %s %s\n", dev->mf, dev->prod, + dev->serial); if (dev->descriptor.bDeviceClass) { printf(" - Class: "); - usb_display_class_sub(dev->descriptor.bDeviceClass,dev->descriptor.bDeviceSubClass,dev->descriptor.bDeviceProtocol); + usb_display_class_sub(dev->descriptor.bDeviceClass, + dev->descriptor.bDeviceSubClass, + dev->descriptor.bDeviceProtocol); printf("\n"); + } else { + printf(" - Class: (from Interface) %s\n", + usb_get_class_desc( + dev->config.if_desc[0].bInterfaceClass)); } - else { - printf(" - Class: (from Interface) %s\n",usb_get_class_desc(dev->config.if_desc[0].bInterfaceClass)); - } - printf(" - PacketSize: %d Configurations: %d\n",dev->descriptor.bMaxPacketSize0,dev->descriptor.bNumConfigurations); - printf(" - Vendor: 0x%04x Product 0x%04x Version %d.%d\n",dev->descriptor.idVendor,dev->descriptor.idProduct,(dev->descriptor.bcdDevice>>8) & 0xff,dev->descriptor.bcdDevice & 0xff); + printf(" - PacketSize: %d Configurations: %d\n", + dev->descriptor.bMaxPacketSize0, + dev->descriptor.bNumConfigurations); + printf(" - Vendor: 0x%04x Product 0x%04x Version %d.%d\n", + dev->descriptor.idVendor, dev->descriptor.idProduct, + (dev->descriptor.bcdDevice>>8) & 0xff, + dev->descriptor.bcdDevice & 0xff); } } -void usb_display_conf_desc(struct usb_config_descriptor *config,struct usb_device *dev) +void usb_display_conf_desc(struct usb_config_descriptor *config, + struct usb_device *dev) { - printf(" Configuration: %d\n",config->bConfigurationValue); - printf(" - Interfaces: %d %s%s%dmA\n",config->bNumInterfaces,(config->bmAttributes & 0x40) ? "Self Powered " : "Bus Powered ", - (config->bmAttributes & 0x20) ? "Remote Wakeup " : "",config->MaxPower*2); + printf(" Configuration: %d\n", config->bConfigurationValue); + printf(" - Interfaces: %d %s%s%dmA\n", config->bNumInterfaces, + (config->bmAttributes & 0x40) ? "Self Powered " : "Bus Powered ", + (config->bmAttributes & 0x20) ? "Remote Wakeup " : "", + config->MaxPower*2); if (config->iConfiguration) { printf(" - "); - usb_display_string(dev,config->iConfiguration); + usb_display_string(dev, config->iConfiguration); printf("\n"); } } -void usb_display_if_desc(struct usb_interface_descriptor *ifdesc,struct usb_device *dev) +void usb_display_if_desc(struct usb_interface_descriptor *ifdesc, + struct usb_device *dev) { - printf(" Interface: %d\n",ifdesc->bInterfaceNumber); - printf(" - Alternate Setting %d, Endpoints: %d\n",ifdesc->bAlternateSetting,ifdesc->bNumEndpoints); + printf(" Interface: %d\n", ifdesc->bInterfaceNumber); + printf(" - Alternate Setting %d, Endpoints: %d\n", + ifdesc->bAlternateSetting, ifdesc->bNumEndpoints); printf(" - Class "); - usb_display_class_sub(ifdesc->bInterfaceClass,ifdesc->bInterfaceSubClass,ifdesc->bInterfaceProtocol); + usb_display_class_sub(ifdesc->bInterfaceClass, + ifdesc->bInterfaceSubClass, ifdesc->bInterfaceProtocol); printf("\n"); if (ifdesc->iInterface) { printf(" - "); - usb_display_string(dev,ifdesc->iInterface); + usb_display_string(dev, ifdesc->iInterface); printf("\n"); } } void usb_display_ep_desc(struct usb_endpoint_descriptor *epdesc) { - printf(" - Endpoint %d %s ",epdesc->bEndpointAddress & 0xf,(epdesc->bEndpointAddress & 0x80) ? "In" : "Out"); - switch((epdesc->bmAttributes & 0x03)) - { - case 0: printf("Control"); break; - case 1: printf("Isochronous"); break; - case 2: printf("Bulk"); break; - case 3: printf("Interrupt"); break; + printf(" - Endpoint %d %s ", epdesc->bEndpointAddress & 0xf, + (epdesc->bEndpointAddress & 0x80) ? "In" : "Out"); + switch ((epdesc->bmAttributes & 0x03)) { + case 0: + printf("Control"); + break; + case 1: + printf("Isochronous"); + break; + case 2: + printf("Bulk"); + break; + case 3: + printf("Interrupt"); + break; } - printf(" MaxPacket %d",epdesc->wMaxPacketSize); - if ((epdesc->bmAttributes & 0x03)==0x3) - printf(" Interval %dms",epdesc->bInterval); + printf(" MaxPacket %d", epdesc->wMaxPacketSize); + if ((epdesc->bmAttributes & 0x03) == 0x3) + printf(" Interval %dms", epdesc->bInterval); printf("\n"); } @@ -217,15 +249,15 @@ void usb_display_config(struct usb_device *dev) struct usb_config_descriptor *config; struct usb_interface_descriptor *ifdesc; struct usb_endpoint_descriptor *epdesc; - int i,ii; - - config= &dev->config; - usb_display_conf_desc(config,dev); - for(i=0;ino_of_if;i++) { - ifdesc= &config->if_desc[i]; - usb_display_if_desc(ifdesc,dev); - for(ii=0;iino_of_ep;ii++) { - epdesc= &ifdesc->ep_desc[ii]; + int i, ii; + + config = &dev->config; + usb_display_conf_desc(config, dev); + for (i = 0; i < config->no_of_if; i++) { + ifdesc = &config->if_desc[i]; + usb_display_if_desc(ifdesc, dev); + for (ii = 0; ii < ifdesc->no_of_ep; ii++) { + epdesc = &ifdesc->ep_desc[ii]; usb_display_ep_desc(epdesc); } } @@ -233,31 +265,33 @@ void usb_display_config(struct usb_device *dev) } /* shows the device tree recursively */ -void usb_show_tree_graph(struct usb_device *dev,char *pre) +void usb_show_tree_graph(struct usb_device *dev, char *pre) { - int i,index; - int has_child,last_child,port; + int i, index; + int has_child, last_child, port; - index=strlen(pre); - printf(" %s",pre); + index = strlen(pre); + printf(" %s", pre); /* check if the device has connected children */ - has_child=0; - for(i=0;imaxchild;i++) { - if (dev->children[i]!=NULL) - has_child=1; + has_child = 0; + for (i = 0; i < dev->maxchild; i++) { + if (dev->children[i] != NULL) + has_child = 1; } /* check if we are the last one */ - last_child=1; - if (dev->parent!=NULL) { - for(i=0;iparent->maxchild;i++) { + last_child = 1; + if (dev->parent != NULL) { + for (i = 0; i < dev->parent->maxchild; i++) { /* search for children */ - if (dev->parent->children[i]==dev) { - /* found our pointer, see if we have a little sister */ - port=i; - while(i++parent->maxchild) { - if (dev->parent->children[i]!=NULL) { + if (dev->parent->children[i] == dev) { + /* found our pointer, see if we have a + * little sister + */ + port = i; + while (i++ < dev->parent->maxchild) { + if (dev->parent->children[i] != NULL) { /* found a sister */ - last_child=0; + last_child = 0; break; } /* if */ } /* while */ @@ -265,28 +299,27 @@ void usb_show_tree_graph(struct usb_device *dev,char *pre) } /* for all children of the parent */ printf("\b+-"); /* correct last child */ - if (last_child) { - pre[index-1]=' '; - } + if (last_child) + pre[index-1] = ' '; } /* if not root hub */ else printf(" "); - printf("%d ",dev->devnum); - pre[index++]=' '; - pre[index++]= has_child ? '|' : ' '; - pre[index]=0; - printf(" %s (%s, %dmA)\n",usb_get_class_desc(dev->config.if_desc[0].bInterfaceClass), - dev->slow ? "1.5MBit/s" : "12MBit/s",dev->config.MaxPower * 2); - if (strlen(dev->mf) || - strlen(dev->prod) || - strlen(dev->serial)) - printf(" %s %s %s %s\n",pre,dev->mf,dev->prod,dev->serial); - printf(" %s\n",pre); - if (dev->maxchild>0) { - for(i=0;imaxchild;i++) { - if (dev->children[i]!=NULL) { - usb_show_tree_graph(dev->children[i],pre); - pre[index]=0; + printf("%d ", dev->devnum); + pre[index++] = ' '; + pre[index++] = has_child ? '|' : ' '; + pre[index] = 0; + printf(" %s (%s, %dmA)\n", usb_get_class_desc( + dev->config.if_desc[0].bInterfaceClass), + dev->slow ? "1.5MBit/s" : "12MBit/s", + dev->config.MaxPower * 2); + if (strlen(dev->mf) || strlen(dev->prod) || strlen(dev->serial)) + printf(" %s %s %s %s\n", pre, dev->mf, dev->prod, dev->serial); + printf(" %s\n", pre); + if (dev->maxchild > 0) { + for (i = 0; i < dev->maxchild; i++) { + if (dev->children[i] != NULL) { + usb_show_tree_graph(dev->children[i], pre); + pre[index] = 0; } } } @@ -297,8 +330,8 @@ void usb_show_tree(struct usb_device *dev) { char preamble[32]; - memset(preamble,0,32); - usb_show_tree_graph(dev,&preamble[0]); + memset(preamble, 0, 32); + usb_show_tree_graph(dev, &preamble[0]); } @@ -306,11 +339,11 @@ void usb_show_tree(struct usb_device *dev) * usb boot command intepreter. Derived from diskboot */ #ifdef CONFIG_USB_STORAGE -int do_usbboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_usbboot(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { char *boot_device = NULL; char *ep; - int dev, part=1, rcode; + int dev, part = 1, rcode; ulong addr, cnt; disk_partition_t info; image_header_t *hdr; @@ -322,95 +355,98 @@ int do_usbboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) switch (argc) { case 1: addr = CONFIG_SYS_LOAD_ADDR; - boot_device = getenv ("bootdevice"); + boot_device = getenv("bootdevice"); break; case 2: addr = simple_strtoul(argv[1], NULL, 16); - boot_device = getenv ("bootdevice"); + boot_device = getenv("bootdevice"); break; case 3: addr = simple_strtoul(argv[1], NULL, 16); boot_device = argv[2]; break; default: - printf ("Usage:\n%s\n", cmdtp->usage); + printf("Usage:\n%s\n", cmdtp->usage); return 1; } if (!boot_device) { - puts ("\n** No boot device **\n"); + puts("\n** No boot device **\n"); return 1; } dev = simple_strtoul(boot_device, &ep, 16); - stor_dev=usb_stor_get_dev(dev); + stor_dev = usb_stor_get_dev(dev); if (stor_dev->type == DEV_TYPE_UNKNOWN) { - printf ("\n** Device %d not available\n", dev); + printf("\n** Device %d not available\n", dev); return 1; } - if (stor_dev->block_read==NULL) { + if (stor_dev->block_read == NULL) { printf("storage device not initialized. Use usb scan\n"); return 1; } if (*ep) { if (*ep != ':') { - puts ("\n** Invalid boot device, use `dev[:part]' **\n"); + puts("\n** Invalid boot device, use `dev[:part]' **\n"); return 1; } part = simple_strtoul(++ep, NULL, 16); } - if (get_partition_info (stor_dev, part, &info)) { + if (get_partition_info(stor_dev, part, &info)) { /* try to boot raw .... */ - strncpy((char *)&info.type[0], BOOT_PART_TYPE, sizeof(BOOT_PART_TYPE)); + strncpy((char *)&info.type[0], BOOT_PART_TYPE, + sizeof(BOOT_PART_TYPE)); strncpy((char *)&info.name[0], "Raw", 4); - info.start=0; - info.blksz=0x200; - info.size=2880; + info.start = 0; + info.blksz = 0x200; + info.size = 2880; printf("error reading partinfo...try to boot raw\n"); } - if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) && - (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) { - printf ("\n** Invalid partition type \"%.32s\"" + if ((strncmp((char *)info.type, BOOT_PART_TYPE, + sizeof(info.type)) != 0) && + (strncmp((char *)info.type, BOOT_PART_COMP, + sizeof(info.type)) != 0)) { + printf("\n** Invalid partition type \"%.32s\"" " (expect \"" BOOT_PART_TYPE "\")\n", info.type); return 1; } - printf ("\nLoading from USB device %d, partition %d: " + printf("\nLoading from USB device %d, partition %d: " "Name: %.32s Type: %.32s\n", dev, part, info.name, info.type); - debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n", + debug("First Block: %ld, # of blocks: %ld, Block Size: %ld\n", info.start, info.size, info.blksz); if (stor_dev->block_read(dev, info.start, 1, (ulong *)addr) != 1) { - printf ("** Read error on %d:%d\n", dev, part); + printf("** Read error on %d:%d\n", dev, part); return 1; } - switch (genimg_get_format ((void *)addr)) { + switch (genimg_get_format((void *)addr)) { case IMAGE_FORMAT_LEGACY: hdr = (image_header_t *)addr; - if (!image_check_hcrc (hdr)) { - puts ("\n** Bad Header Checksum **\n"); + if (!image_check_hcrc(hdr)) { + puts("\n** Bad Header Checksum **\n"); return 1; } - image_print_contents (hdr); + image_print_contents(hdr); - cnt = image_get_image_size (hdr); + cnt = image_get_image_size(hdr); break; #if defined(CONFIG_FIT) case IMAGE_FORMAT_FIT: fit_hdr = (const void *)addr; - puts ("Fit image detected...\n"); + puts("Fit image detected...\n"); - cnt = fit_get_size (fit_hdr); + cnt = fit_get_size(fit_hdr); break; #endif default: - puts ("** Unknown image type\n"); + puts("** Unknown image type\n"); return 1; } @@ -418,36 +454,38 @@ int do_usbboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) cnt /= info.blksz; cnt -= 1; - if (stor_dev->block_read (dev, info.start+1, cnt, + if (stor_dev->block_read(dev, info.start+1, cnt, (ulong *)(addr+info.blksz)) != cnt) { - printf ("\n** Read error on %d:%d\n", dev, part); + printf("\n** Read error on %d:%d\n", dev, part); return 1; } #if defined(CONFIG_FIT) - /* This cannot be done earlier, we need complete FIT image in RAM first */ - if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) { - if (!fit_check_format (fit_hdr)) { - puts ("** Bad FIT image format\n"); + /* This cannot be done earlier, we need complete FIT image in RAM + * first + */ + if (genimg_get_format((void *)addr) == IMAGE_FORMAT_FIT) { + if (!fit_check_format(fit_hdr)) { + puts("** Bad FIT image format\n"); return 1; } - fit_print_contents (fit_hdr); + fit_print_contents(fit_hdr); } #endif /* Loading ok, update default load address */ load_addr = addr; - flush_cache (addr, (cnt+1)*info.blksz); + flush_cache(addr, (cnt+1)*info.blksz); /* Check if we should attempt an auto-start */ - if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) { + if (((ep = getenv("autostart")) != NULL) && (strcmp(ep, "yes") == 0)) { char *local_args[2]; - extern int do_bootm (cmd_tbl_t *, int, int, char *[]); + extern int do_bootm(cmd_tbl_t *, int, int, char *[]); local_args[0] = argv[0]; local_args[1] = NULL; - printf ("Automatic boot of image at addr 0x%08lX ...\n", addr); - rcode=do_bootm (cmdtp, 0, 1, local_args); + printf("Automatic boot of image at addr 0x%08lX ...\n", addr); + rcode = do_bootm(cmdtp, 0, 1, local_args); return rcode; } return 0; @@ -455,10 +493,10 @@ int do_usbboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #endif /* CONFIG_USB_STORAGE */ -/********************************************************************************* +/****************************************************************************** * usb command intepreter */ -int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { int i; @@ -469,7 +507,7 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #endif if ((strncmp(argv[1], "reset", 5) == 0) || - (strncmp(argv[1], "start", 5) == 0)){ + (strncmp(argv[1], "start", 5) == 0)) { usb_stop(); printf("(Re)start USB...\n"); i = usb_init(); @@ -480,16 +518,17 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) #endif return 0; } - if (strncmp(argv[1],"stop",4) == 0) { + if (strncmp(argv[1], "stop", 4) == 0) { #ifdef CONFIG_USB_KEYBOARD - if (argc==2) { - if (usb_kbd_deregister()!=0) { - printf("USB not stopped: usbkbd still using USB\n"); + if (argc == 2) { + if (usb_kbd_deregister() != 0) { + printf("USB not stopped: usbkbd still" + " using USB\n"); return 1; } - } - else { /* forced stop, switch console in to serial */ - console_assign(stdin,"serial"); + } else { + /* forced stop, switch console in to serial */ + console_assign(stdin, "serial"); usb_kbd_deregister(); } #endif @@ -501,40 +540,38 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf("USB is stopped. Please issue 'usb start' first.\n"); return 1; } - if (strncmp(argv[1],"tree",4) == 0) { + if (strncmp(argv[1], "tree", 4) == 0) { printf("\nDevice Tree:\n"); usb_show_tree(usb_get_dev_index(0)); return 0; } - if (strncmp(argv[1],"inf",3) == 0) { + if (strncmp(argv[1], "inf", 3) == 0) { int d; - if (argc==2) { - for(d=0;ddevnum==i) + if (dev->devnum == i) break; } - if (dev==NULL) { + if (dev == NULL) { printf("*** NO Device avaiable ***\n"); return 0; - } - else { + } else { usb_display_desc(dev); usb_display_config(dev); } @@ -543,36 +580,36 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } #ifdef CONFIG_USB_STORAGE if (strncmp(argv[1], "scan", 4) == 0) { - printf(" NOTE: this command is obsolete and will be phased out\n"); - printf(" please use 'usb storage' for USB storage devices information\n\n"); + printf(" NOTE: this command is obsolete and will be" + " phased out\n"); + printf(" please use 'usb storage' for USB storage devices" + " information\n\n"); usb_stor_info(); return 0; } - if (strncmp(argv[1], "stor", 4) == 0) { + if (strncmp(argv[1], "stor", 4) == 0) return usb_stor_info(); - } - if (strncmp(argv[1],"part",4) == 0) { + if (strncmp(argv[1], "part", 4) == 0) { int devno, ok = 0; - if (argc==2) { - for (devno=0; devnotype!=DEV_TYPE_UNKNOWN) { + if (argc == 2) { + for (devno = 0; devno < USB_MAX_STOR_DEV; ++devno) { + stor_dev = usb_stor_get_dev(devno); + if (stor_dev->type != DEV_TYPE_UNKNOWN) { ok++; if (devno) printf("\n"); - printf("print_part of %x\n",devno); + printf("print_part of %x\n", devno); print_part(stor_dev); } } - } - else { - devno=simple_strtoul(argv[2], NULL, 16); - stor_dev=usb_stor_get_dev(devno); - if (stor_dev->type!=DEV_TYPE_UNKNOWN) { + } else { + devno = simple_strtoul(argv[2], NULL, 16); + stor_dev = usb_stor_get_dev(devno); + if (stor_dev->type != DEV_TYPE_UNKNOWN) { ok++; - printf("print_part of %x\n",devno); + printf("print_part of %x\n", devno); print_part(stor_dev); } } @@ -582,22 +619,24 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } return 0; } - if (strcmp(argv[1],"read") == 0) { - if (usb_stor_curr_dev<0) { + if (strcmp(argv[1], "read") == 0) { + if (usb_stor_curr_dev < 0) { printf("no current device selected\n"); return 1; } - if (argc==5) { + if (argc == 5) { unsigned long addr = simple_strtoul(argv[2], NULL, 16); unsigned long blk = simple_strtoul(argv[3], NULL, 16); unsigned long cnt = simple_strtoul(argv[4], NULL, 16); unsigned long n; - printf ("\nUSB read: device %d block # %ld, count %ld ... ", - usb_stor_curr_dev, blk, cnt); - stor_dev=usb_stor_get_dev(usb_stor_curr_dev); - n = stor_dev->block_read(usb_stor_curr_dev, blk, cnt, (ulong *)addr); - printf ("%ld blocks read: %s\n",n,(n==cnt) ? "OK" : "ERROR"); - if (n==cnt) + printf("\nUSB read: device %d block # %ld, count %ld" + " ... ", usb_stor_curr_dev, blk, cnt); + stor_dev = usb_stor_get_dev(usb_stor_curr_dev); + n = stor_dev->block_read(usb_stor_curr_dev, blk, cnt, + (ulong *)addr); + printf("%ld blocks read: %s\n", n, + (n == cnt) ? "OK" : "ERROR"); + if (n == cnt) return 0; return 1; } @@ -605,34 +644,31 @@ int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if (strncmp(argv[1], "dev", 3) == 0) { if (argc == 3) { int dev = (int)simple_strtoul(argv[2], NULL, 10); - printf ("\nUSB device %d: ", dev); + printf("\nUSB device %d: ", dev); if (dev >= USB_MAX_STOR_DEV) { printf("unknown device\n"); return 1; } - printf ("\n Device %d: ", dev); - stor_dev=usb_stor_get_dev(dev); + printf("\n Device %d: ", dev); + stor_dev = usb_stor_get_dev(dev); dev_print(stor_dev); - if (stor_dev->type == DEV_TYPE_UNKNOWN) { + if (stor_dev->type == DEV_TYPE_UNKNOWN) return 1; - } usb_stor_curr_dev = dev; printf("... is now current device\n"); return 0; - } - else { - printf ("\nUSB device %d: ", usb_stor_curr_dev); - stor_dev=usb_stor_get_dev(usb_stor_curr_dev); + } else { + printf("\nUSB device %d: ", usb_stor_curr_dev); + stor_dev = usb_stor_get_dev(usb_stor_curr_dev); dev_print(stor_dev); - if (stor_dev->type == DEV_TYPE_UNKNOWN) { + if (stor_dev->type == DEV_TYPE_UNKNOWN) return 1; - } return 0; } return 0; } #endif /* CONFIG_USB_STORAGE */ - printf ("Usage:\n%s\n", cmdtp->usage); + printf("Usage:\n%s\n", cmdtp->usage); return 1; } @@ -646,7 +682,8 @@ U_BOOT_CMD( "usb info [dev] - show available USB devices\n" "usb storage - show details of USB storage devices\n" "usb dev [dev] - show or set current USB storage device\n" - "usb part [dev] - print partition table of one or all USB storage devices\n" + "usb part [dev] - print partition table of one or all USB storage" + " devices\n" "usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n" " to memory address `addr'\n" ); diff --git a/common/usb.c b/common/usb.c index 7ab5df670bf..ee181528c88 100644 --- a/common/usb.c +++ b/common/usb.c @@ -58,7 +58,7 @@ #undef USB_DEBUG #ifdef USB_DEBUG -#define USB_PRINTF(fmt, args...) printf (fmt , ##args) +#define USB_PRINTF(fmt, args...) printf(fmt , ##args) #else #define USB_PRINTF(fmt, args...) #endif @@ -87,11 +87,12 @@ static int hub_port_reset(struct usb_device *dev, int port, * wait_ms */ -void __inline__ wait_ms(unsigned long ms) +inline void wait_ms(unsigned long ms) { while (ms-- > 0) udelay(1000); } + /*************************************************************************** * Init USB Device */ @@ -245,9 +246,9 @@ int usb_maxpacket(struct usb_device *dev, unsigned long pipe) { /* direction is out -> use emaxpacket out */ if ((pipe & USB_DIR_IN) == 0) - return(dev->epmaxpacketout[((pipe>>15) & 0xf)]); + return dev->epmaxpacketout[((pipe>>15) & 0xf)]; else - return(dev->epmaxpacketin[((pipe>>15) & 0xf)]); + return dev->epmaxpacketin[((pipe>>15) & 0xf)]; } /* The routine usb_set_maxpacket_ep() is extracted from the loop of routine @@ -269,7 +270,7 @@ usb_set_maxpacket_ep(struct usb_device *dev, struct usb_endpoint_descriptor *ep) USB_ENDPOINT_XFER_CONTROL) { /* Control => bidirectional */ dev->epmaxpacketout[b] = ep->wMaxPacketSize; - dev->epmaxpacketin [b] = ep->wMaxPacketSize; + dev->epmaxpacketin[b] = ep->wMaxPacketSize; USB_PRINTF("##Control EP epmaxpacketout/in[%d] = %d\n", b, dev->epmaxpacketin[b]); } else { @@ -779,13 +780,13 @@ int usb_new_device(struct usb_device *dev) * invalid header while reading 8 bytes as device descriptor. */ dev->descriptor.bMaxPacketSize0 = 8; /* Start off at 8 bytes */ dev->maxpacketsize = PACKET_SIZE_8; - dev->epmaxpacketin [0] = 8; + dev->epmaxpacketin[0] = 8; dev->epmaxpacketout[0] = 8; err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, &dev->descriptor, 8); if (err < 8) { printf("\n USB device not responding, " \ - "giving up (status=%lX)\n",dev->status); + "giving up (status=%lX)\n", dev->status); return 1; } #else @@ -793,7 +794,8 @@ int usb_new_device(struct usb_device *dev) * reset of the device (Linux uses the same sequence) * Some equipment is said to work only with such init sequence; this * patch is based on the work by Alan Stern: - * http://sourceforge.net/mailarchive/forum.php?thread_id=5729457&forum_id=5398 + * http://sourceforge.net/mailarchive/forum.php? + * thread_id=5729457&forum_id=5398 */ struct usb_device_descriptor *desc; int port = -1; @@ -809,7 +811,7 @@ int usb_new_device(struct usb_device *dev) dev->descriptor.bMaxPacketSize0 = 64; /* Start off at 64 bytes */ /* Default to 64 byte max packet size */ dev->maxpacketsize = PACKET_SIZE_64; - dev->epmaxpacketin [0] = 64; + dev->epmaxpacketin[0] = 64; dev->epmaxpacketout[0] = 64; err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, desc, 64); @@ -844,13 +846,21 @@ int usb_new_device(struct usb_device *dev) } #endif - dev->epmaxpacketin [0] = dev->descriptor.bMaxPacketSize0; + dev->epmaxpacketin[0] = dev->descriptor.bMaxPacketSize0; dev->epmaxpacketout[0] = dev->descriptor.bMaxPacketSize0; switch (dev->descriptor.bMaxPacketSize0) { - case 8: dev->maxpacketsize = PACKET_SIZE_8; break; - case 16: dev->maxpacketsize = PACKET_SIZE_16; break; - case 32: dev->maxpacketsize = PACKET_SIZE_32; break; - case 64: dev->maxpacketsize = PACKET_SIZE_64; break; + case 8: + dev->maxpacketsize = PACKET_SIZE_8; + break; + case 16: + dev->maxpacketsize = PACKET_SIZE_16; + break; + case 32: + dev->maxpacketsize = PACKET_SIZE_32; + break; + case 64: + dev->maxpacketsize = PACKET_SIZE_64; + break; } dev->devnum = addr; @@ -947,7 +957,7 @@ void usb_scan_devices(void) #undef USB_HUB_DEBUG #ifdef USB_HUB_DEBUG -#define USB_HUB_PRINTF(fmt, args...) printf (fmt , ##args) +#define USB_HUB_PRINTF(fmt, args...) printf(fmt , ##args) #else #define USB_HUB_PRINTF(fmt, args...) #endif diff --git a/include/usb.h b/include/usb.h index 9a2e72c9d01..84a77b2f8ba 100644 --- a/include/usb.h +++ b/include/usb.h @@ -43,89 +43,88 @@ /* String descriptor */ struct usb_string_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned short wData[1]; + unsigned char bLength; + unsigned char bDescriptorType; + unsigned short wData[1]; } __attribute__ ((packed)); /* device request (setup) */ struct devrequest { - unsigned char requesttype; - unsigned char request; - unsigned short value; - unsigned short index; - unsigned short length; + unsigned char requesttype; + unsigned char request; + unsigned short value; + unsigned short index; + unsigned short length; } __attribute__ ((packed)); - /* All standard descriptors have these 2 fields in common */ struct usb_descriptor_header { - unsigned char bLength; - unsigned char bDescriptorType; + unsigned char bLength; + unsigned char bDescriptorType; } __attribute__ ((packed)); /* Device descriptor */ struct usb_device_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned short bcdUSB; - unsigned char bDeviceClass; - unsigned char bDeviceSubClass; - unsigned char bDeviceProtocol; - unsigned char bMaxPacketSize0; - unsigned short idVendor; - unsigned short idProduct; - unsigned short bcdDevice; - unsigned char iManufacturer; - unsigned char iProduct; - unsigned char iSerialNumber; - unsigned char bNumConfigurations; + unsigned char bLength; + unsigned char bDescriptorType; + unsigned short bcdUSB; + unsigned char bDeviceClass; + unsigned char bDeviceSubClass; + unsigned char bDeviceProtocol; + unsigned char bMaxPacketSize0; + unsigned short idVendor; + unsigned short idProduct; + unsigned short bcdDevice; + unsigned char iManufacturer; + unsigned char iProduct; + unsigned char iSerialNumber; + unsigned char bNumConfigurations; } __attribute__ ((packed)); - /* Endpoint descriptor */ struct usb_endpoint_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned char bEndpointAddress; - unsigned char bmAttributes; - unsigned short wMaxPacketSize; - unsigned char bInterval; - unsigned char bRefresh; - unsigned char bSynchAddress; - + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bEndpointAddress; + unsigned char bmAttributes; + unsigned short wMaxPacketSize; + unsigned char bInterval; + unsigned char bRefresh; + unsigned char bSynchAddress; } __attribute__ ((packed)); + /* Interface descriptor */ struct usb_interface_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned char bInterfaceNumber; - unsigned char bAlternateSetting; - unsigned char bNumEndpoints; - unsigned char bInterfaceClass; - unsigned char bInterfaceSubClass; - unsigned char bInterfaceProtocol; - unsigned char iInterface; - - unsigned char no_of_ep; - unsigned char num_altsetting; - unsigned char act_altsetting; + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bInterfaceNumber; + unsigned char bAlternateSetting; + unsigned char bNumEndpoints; + unsigned char bInterfaceClass; + unsigned char bInterfaceSubClass; + unsigned char bInterfaceProtocol; + unsigned char iInterface; + + unsigned char no_of_ep; + unsigned char num_altsetting; + unsigned char act_altsetting; + struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; } __attribute__ ((packed)); /* Configuration descriptor information.. */ struct usb_config_descriptor { - unsigned char bLength; - unsigned char bDescriptorType; - unsigned short wTotalLength; - unsigned char bNumInterfaces; - unsigned char bConfigurationValue; - unsigned char iConfiguration; - unsigned char bmAttributes; - unsigned char MaxPower; - - unsigned char no_of_if; /* number of interfaces */ + unsigned char bLength; + unsigned char bDescriptorType; + unsigned short wTotalLength; + unsigned char bNumInterfaces; + unsigned char bConfigurationValue; + unsigned char iConfiguration; + unsigned char bmAttributes; + unsigned char MaxPower; + + unsigned char no_of_if; /* number of interfaces */ struct usb_interface_descriptor if_desc[USB_MAXINTERFACES]; } __attribute__ ((packed)); @@ -138,19 +137,20 @@ enum { }; struct usb_device { - int devnum; /* Device number on USB bus */ - int slow; /* Slow device? */ - char mf[32]; /* manufacturer */ - char prod[32]; /* product */ - char serial[32]; /* serial number */ + int devnum; /* Device number on USB bus */ + int slow; /* Slow device? */ + char mf[32]; /* manufacturer */ + char prod[32]; /* product */ + char serial[32]; /* serial number */ /* Maximum packet size; one of: PACKET_SIZE_* */ int maxpacketsize; /* one bit for each endpoint ([0] = IN, [1] = OUT) */ unsigned int toggle[2]; - /* endpoint halts; one bit per endpoint # & direction; */ + /* endpoint halts; one bit per endpoint # & direction; + * [0] = IN, [1] = OUT + */ unsigned int halted[2]; - /* [0] = IN, [1] = OUT */ int epmaxpacketin[16]; /* INput endpoint specific maximums */ int epmaxpacketout[16]; /* OUTput endpoint specific maximums */ @@ -180,21 +180,22 @@ struct usb_device { */ #if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \ - defined(CONFIG_USB_OHCI_NEW) || defined (CONFIG_USB_SL811HS) || \ + defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_SL811HS) || \ defined(CONFIG_USB_ISP116X_HCD) || defined(CONFIG_USB_R8A66597_HCD) int usb_lowlevel_init(void); int usb_lowlevel_stop(void); -int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len); +int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, + void *buffer, int transfer_len); int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, - int transfer_len,struct devrequest *setup); + int transfer_len, struct devrequest *setup); int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len, int interval); void usb_event_poll(void); /* Defines */ -#define USB_UHCI_VEND_ID 0x8086 -#define USB_UHCI_DEV_ID 0x7112 +#define USB_UHCI_VEND_ID 0x8086 +#define USB_UHCI_DEV_ID 0x7112 #else #error USB Lowlevel not defined @@ -221,8 +222,9 @@ int usb_stop(void); /* stop the USB Controller */ int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol); -int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id); -struct usb_device * usb_get_dev_index(int index); +int usb_set_idle(struct usb_device *dev, int ifnum, int duration, + int report_id); +struct usb_device *usb_get_dev_index(int index); int usb_control_msg(struct usb_device *dev, unsigned int pipe, unsigned char request, unsigned char requesttype, unsigned short value, unsigned short index, @@ -230,14 +232,17 @@ int usb_control_msg(struct usb_device *dev, unsigned int pipe, int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout); int usb_submit_int_msg(struct usb_device *dev, unsigned long pipe, - void *buffer,int transfer_len, int interval); + void *buffer, int transfer_len, int interval); void usb_disable_asynch(int disable); -int usb_maxpacket(struct usb_device *dev,unsigned long pipe); -void __inline__ wait_ms(unsigned long ms); -int usb_get_configuration_no(struct usb_device *dev,unsigned char *buffer,int cfgno); -int usb_get_report(struct usb_device *dev, int ifnum, unsigned char type, unsigned char id, void *buf, int size); +int usb_maxpacket(struct usb_device *dev, unsigned long pipe); +inline void wait_ms(unsigned long ms); +int usb_get_configuration_no(struct usb_device *dev, unsigned char *buffer, + int cfgno); +int usb_get_report(struct usb_device *dev, int ifnum, unsigned char type, + unsigned char id, void *buf, int size); int usb_get_class_descriptor(struct usb_device *dev, int ifnum, - unsigned char type, unsigned char id, void *buf, int size); + unsigned char type, unsigned char id, void *buf, + int size); int usb_clear_halt(struct usb_device *dev, int pipe); int usb_string(struct usb_device *dev, int index, char *buf, size_t size); int usb_set_interface(struct usb_device *dev, int interface, int alternate); @@ -247,7 +252,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); #define __swap_16(x) \ ({ unsigned short x_ = (unsigned short)x; \ (unsigned short)( \ - ((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8) ); \ + ((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8)); \ }) #define __swap_32(x) \ ({ unsigned long x_ = (unsigned long)x; \ @@ -255,7 +260,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); ((x_ & 0x000000FFUL) << 24) | \ ((x_ & 0x0000FF00UL) << 8) | \ ((x_ & 0x00FF0000UL) >> 8) | \ - ((x_ & 0xFF000000UL) >> 24) ); \ + ((x_ & 0xFF000000UL) >> 24)); \ }) #ifdef LITTLEENDIAN @@ -286,12 +291,14 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); * unsigned int. The encoding is: * * - max size: bits 0-1 (00 = 8, 01 = 16, 10 = 32, 11 = 64) - * - direction: bit 7 (0 = Host-to-Device [Out], 1 = Device-to-Host [In]) + * - direction: bit 7 (0 = Host-to-Device [Out], + * (1 = Device-to-Host [In]) * - device: bits 8-14 * - endpoint: bits 15-18 * - Data0/1: bit 19 * - speed: bit 26 (0 = Full, 1 = Low Speed) - * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, 10 = control, 11 = bulk) + * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, + * 10 = control, 11 = bulk) * * Why? Because it's arbitrary, and whatever encoding we select is really * up to us. This one happens to share a lot of bit positions with the UHCI @@ -300,24 +307,42 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); */ /* Create various pipes... */ #define create_pipe(dev,endpoint) \ - (((dev)->devnum << 8) | (endpoint << 15) | ((dev)->slow << 26) | (dev)->maxpacketsize) -#define default_pipe(dev) ((dev)->slow <<26) - -#define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint)) -#define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | create_pipe(dev,endpoint)) -#define usb_rcvisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | create_pipe(dev,endpoint)) -#define usb_rcvbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_sndintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | create_pipe(dev,endpoint)) -#define usb_rcvintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | create_pipe(dev,endpoint) | USB_DIR_IN) -#define usb_snddefctrl(dev) ((PIPE_CONTROL << 30) | default_pipe(dev)) -#define usb_rcvdefctrl(dev) ((PIPE_CONTROL << 30) | default_pipe(dev) | USB_DIR_IN) + (((dev)->devnum << 8) | (endpoint << 15) | \ + ((dev)->slow << 26) | (dev)->maxpacketsize) +#define default_pipe(dev) ((dev)->slow << 26) + +#define usb_sndctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \ + create_pipe(dev, endpoint)) +#define usb_rcvctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \ + create_pipe(dev, endpoint) | \ + USB_DIR_IN) +#define usb_sndisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \ + create_pipe(dev, endpoint)) +#define usb_rcvisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \ + create_pipe(dev, endpoint) | \ + USB_DIR_IN) +#define usb_sndbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \ + create_pipe(dev, endpoint)) +#define usb_rcvbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \ + create_pipe(dev, endpoint) | \ + USB_DIR_IN) +#define usb_sndintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \ + create_pipe(dev, endpoint)) +#define usb_rcvintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \ + create_pipe(dev, endpoint) | \ + USB_DIR_IN) +#define usb_snddefctrl(dev) ((PIPE_CONTROL << 30) | \ + default_pipe(dev)) +#define usb_rcvdefctrl(dev) ((PIPE_CONTROL << 30) | \ + default_pipe(dev) | \ + USB_DIR_IN) /* The D0/D1 toggle bits */ #define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> ep) & 1) #define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << ep)) -#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << ep)) | ((bit) << ep)) +#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = \ + ((dev)->toggle[out] & \ + ~(1 << ep)) | ((bit) << ep)) /* Endpoint halt control/status */ #define usb_endpoint_out(ep_dir) (((ep_dir >> 7) & 1) ^ 1) @@ -325,7 +350,8 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate); #define usb_endpoint_running(dev, ep, out) ((dev)->halted[out] &= ~(1 << (ep))) #define usb_endpoint_halted(dev, ep, out) ((dev)->halted[out] & (1 << (ep))) -#define usb_packetid(pipe) (((pipe) & USB_DIR_IN) ? USB_PID_IN : USB_PID_OUT) +#define usb_packetid(pipe) (((pipe) & USB_DIR_IN) ? USB_PID_IN : \ + USB_PID_OUT) #define usb_pipeout(pipe) ((((pipe) >> 7) & 1) ^ 1) #define usb_pipein(pipe) (((pipe) >> 7) & 1) @@ -365,7 +391,7 @@ struct usb_hub_descriptor { unsigned char bHubContrCurrent; unsigned char DeviceRemovable[(USB_MAXCHILDREN+1+7)/8]; unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8]; - /* DeviceRemovable and PortPwrCtrlMask want to be variable-length + /* DeviceRemovable and PortPwrCtrlMask want to be variable-length bitmaps that hold max 255 entries. (bit0 is ignored) */ } __attribute__ ((packed)); -- cgit v1.3.1 From f698738e46cb461e28c2d58228bb34a2fcf5a475 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 20 Nov 2008 14:02:56 -0600 Subject: 86xx: Fix non-64-bit compilation problems. Introducing 64-bit (36-bit) support for the MPC8641HPCN failed to accomodate the other two 86xx boards. Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH} CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L} with nominal 32-bit values. Signed-off-by: Jon Loeliger Acked-by: Becky Bruce --- include/configs/MPC8610HPCD.h | 14 ++++++++++++++ include/configs/sbc8641d.h | 14 ++++++++++++++ 2 files changed, 28 insertions(+) (limited to 'include') diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index f2fe4a6cf98..56850271cbd 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -81,6 +81,9 @@ #define CONFIG_SYS_CCSRBAR 0xe0000000 /* relocated CCSRBAR */ #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 + #define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000) @@ -388,6 +391,17 @@ #define CONFIG_SYS_IBAT3L (CONFIG_SYS_CCSRBAR | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT3U CONFIG_SYS_DBAT3U +#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR) +#define CONFIG_SYS_CCSR_DEFAULT_DBATL (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATL_PP_RW | BATL_CACHEINHIBIT \ + | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_CCSR_DEFAULT_DBATU (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_CCSR_DEFAULT_IBATL (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_CCSR_DEFAULT_IBATU CONFIG_SYS_CCSR_DEFAULT_DBATU +#endif + /* * BAT4 32M Cache-inhibited, guarded * 0xe200_0000 1M PCI-Express 2 I/O diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 45d81792e06..fa978272596 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -104,6 +104,9 @@ #define CONFIG_SYS_CCSRBAR 0xf8000000 /* relocated CCSRBAR */ #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 + #define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR+0x8000) #define CONFIG_SYS_PCI2_ADDR (CONFIG_SYS_CCSRBAR+0x9000) @@ -433,6 +436,17 @@ #define CONFIG_SYS_IBAT3L (CONFIG_SYS_CCSRBAR | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT3U CONFIG_SYS_DBAT3U +#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR) +#define CONFIG_SYS_CCSR_DEFAULT_DBATL (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATL_PP_RW | BATL_CACHEINHIBIT \ + | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_CCSR_DEFAULT_DBATU (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATU_BL_1M | BATU_VS | BATU_VP) +#define CONFIG_SYS_CCSR_DEFAULT_IBATL (CONFIG_SYS_CCSRBAR_DEFAULT \ + | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_CCSR_DEFAULT_IBATU CONFIG_SYS_CCSR_DEFAULT_DBATU +#endif + /* * BAT4 32M Cache-inhibited, guarded * 0xe200_0000 16M PCI-Express 1 I/O -- cgit v1.3.1 From 801a194616d95e6fc426a176d9615ccbf9876c7f Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 20 Nov 2008 12:01:02 -0600 Subject: Removed unused CONFIG_L1_INIT_RAM symbol. Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger --- include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349ITX.h | 1 - include/configs/MPC8536DS.h | 2 -- include/configs/MPC8540ADS.h | 1 - include/configs/MPC8540EVAL.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 2 -- include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8572DS.h | 2 -- include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/PM854.h | 1 - include/configs/PM856.h | 1 - include/configs/SBC8540.h | 1 - include/configs/TQM834x.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/sbc8349.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8560.h | 1 - include/configs/sbc8641d.h | 1 - include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - 27 files changed, 30 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bbdc211c06b..8e82aac7b7a 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -193,7 +193,6 @@ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR|0x00000801) /* Port-size=8bit, MSEL=GPCM */ #define CONFIG_SYS_OR1_PRELIM 0xFFFFE8F0 /* length 32K */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index f633f24bd59..14cbc457159 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -266,7 +266,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index fff888abc67..f3eee23aa19 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -231,8 +231,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ #define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0 -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 79a52d9d1d7..0b8fe6ad68a 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -258,7 +258,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 46a141a2c07..21cf965ab38 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 7ada8a222b9..eaa737b88e2 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -281,7 +281,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index cdbbea60d66..ff24fa50eb0 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -207,8 +207,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER) -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 083afba9a30..62955909e7c 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -303,7 +303,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f9419ccd0f9..40b40ed3af2 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -279,7 +279,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index f67d4896360..2b5b2c10646 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -254,7 +254,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ab3e6d69482..9e16bb451fc 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -265,7 +265,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR5_PRELIM 0xf8010801 #define CONFIG_SYS_OR5_PRELIM 0xffff69f7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index c3693b85659..9f01f9aaa8f 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -248,8 +248,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); | PIXIS_VCFGEN1_TSEC3SER \ | PIXIS_VCFGEN1_TSEC4SER) -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 56850271cbd..27517e5b1fb 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -209,7 +209,6 @@ #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 69b4c4410d7..cd9889495d9 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -268,7 +268,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index bc2d8253b0f..4ecf8068ecf 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -130,7 +130,6 @@ #define CONFIG_SYS_MONITOR_BASE TEXT_BASE #undef CONFIG_SYS_RAMBOOT -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/PM854.h b/include/configs/PM854.h index c3a7f816f92..1cc80ad2146 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index b3bcf23c5cd..698ad2d9111 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 48c9339802b..2853fba0652 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -186,7 +186,6 @@ #define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) /* the size of CS5 needs to be >= 16M for TLB and LAW setups */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 2961a1b2a0f..796030d0607 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -171,7 +171,6 @@ extern int tqm834x_num_flash_banks; #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 2d4048a9283..300f49079df 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -234,7 +234,6 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_CCSRBAR \ + 0x04010000) /* Initial RAM address */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 174149b616a..0603e3c8a4b 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -162,7 +162,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index aefd30a1ede..5ce4dac5e59 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -280,7 +280,6 @@ | CONFIG_SYS_LBC_LSDMR_RFEN \ ) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 43012754d28..e1d3a52b5e4 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -180,7 +180,6 @@ #define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) /* the size of CS5 needs to be >= 16M for TLB and LAW setups */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index fa978272596..00129457582 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -244,7 +244,6 @@ #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c67db8f25d9..e89b5a3fb0e 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -167,7 +167,6 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End used area in RAM */ diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 2188e5401b3..a0f2ed0daf1 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -151,7 +151,6 @@ #define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 #define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index b0bd0508bb7..f0990c6799b 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 #define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ -- cgit v1.3.1 From 4a129a57d923f7c15aa1f567028a80a32d66a100 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 30 Nov 2008 19:36:53 +0100 Subject: at91rm9200dk: Fix typo Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- include/configs/at91rm9200dk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 5c239d7bf74..746f0ef102e 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -1,7 +1,7 @@ /* * Rick Bronson * - * Configuation settings for the AT91RM9200DK board. + * Configuration settings for the AT91RM9200DK board. * * See file CREDITS for list of people who contributed to this * project. -- cgit v1.3.1 From 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Tue, 28 Oct 2008 17:53:38 +0800 Subject: 85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu Acked-by: Andy Fleming --- board/atum8548/atum8548.c | 10 ---------- board/freescale/mpc8536ds/mpc8536ds.c | 10 ---------- board/freescale/mpc8544ds/mpc8544ds.c | 10 ---------- board/freescale/mpc8548cds/mpc8548cds.c | 11 ----------- board/freescale/mpc8568mds/mpc8568mds.c | 12 ------------ board/freescale/mpc8572ds/mpc8572ds.c | 10 ---------- board/sbc8548/sbc8548.c | 10 ---------- include/configs/MPC8536DS.h | 2 +- include/configs/MPC8544DS.h | 2 +- include/configs/MPC8548CDS.h | 2 +- include/configs/MPC8568MDS.h | 2 +- include/configs/MPC8572DS.h | 1 + 12 files changed, 5 insertions(+), 77 deletions(-) (limited to 'include') diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 226ef57eeec..6ef663eeb0f 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -37,10 +37,6 @@ #include #include -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - long int fixed_sdram(void); int board_early_init_f (void) @@ -117,12 +113,6 @@ initdram(int board_type) dram_size = fixed_sdram (); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 6fed4eaf2a5..2538483378d 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -41,10 +41,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - phys_size_t fixed_sdram(void); int checkboard (void) @@ -73,12 +69,6 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 545d869fcc9..14581abdd8a 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -38,10 +38,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - int checkboard (void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -77,12 +73,6 @@ initdram(int board_type) dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index af5ff42e319..86986057c27 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -38,10 +38,6 @@ #include "../common/eeprom.h" #include "../common/via.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - DECLARE_GLOBAL_DATA_PTR; void local_bus_init(void); @@ -118,13 +114,6 @@ initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif - /* * SDRAM Initialization */ diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index 688d8c390f6..bc93be80fcb 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -99,11 +99,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ }; - -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - void local_bus_init(void); void sdram_init(void); @@ -170,13 +165,6 @@ initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif - /* * SDRAM Initialization */ diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 3a78c98d14d..242af863bd8 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -38,10 +38,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - long int fixed_sdram(void); int checkboard (void) @@ -69,12 +65,6 @@ phys_size_t initdram(int board_type) dram_size = fixed_sdram(); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 9548ac637de..cfb9ce5144f 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -36,10 +36,6 @@ #include #include -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - DECLARE_GLOBAL_DATA_PTR; void local_bus_init(void); @@ -114,12 +110,6 @@ initdram(int board_type) dram_size = fixed_sdram (); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif /* * SDRAM Initialization */ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index fff888abc67..7c94c81a5d5 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -99,7 +99,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_DDR_SPD #undef CONFIG_DDR_DLL -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index cdbbea60d66..a2d12aefd49 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -97,7 +97,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_DDR_SPD -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 083afba9a30..df26f101aaf 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -100,7 +100,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ab3e6d69482..60e6041f0eb 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -92,7 +92,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_DDR_SPD #define CONFIG_DDR_DLL /* possible DLL fix needed */ -#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index c3693b85659..ed25c996848 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -99,6 +99,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_DDR_SPD #undef CONFIG_DDR_DLL +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -- cgit v1.3.1 From 5a105a333dab6a23e92d763ce76d6f31d57f45df Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 20 Nov 2008 15:36:48 -0600 Subject: Removed unused CONFIG_L1_INIT_RAM symbol. Prevent further viral propogation of the unused symbol CONFIG_L1_INIT_RAM by just removing it. Signed-off-by: Jon Loeliger Acked-by: Andy Fleming --- include/configs/MPC8349EMDS.h | 1 - include/configs/MPC8349ITX.h | 1 - include/configs/MPC8536DS.h | 2 -- include/configs/MPC8540ADS.h | 1 - include/configs/MPC8540EVAL.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 2 -- include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8572DS.h | 2 -- include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/PM854.h | 1 - include/configs/PM856.h | 1 - include/configs/SBC8540.h | 1 - include/configs/TQM834x.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/sbc8349.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8560.h | 1 - include/configs/sbc8641d.h | 1 - include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - 27 files changed, 30 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bbdc211c06b..8e82aac7b7a 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -193,7 +193,6 @@ #define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_BCSR|0x00000801) /* Port-size=8bit, MSEL=GPCM */ #define CONFIG_SYS_OR1_PRELIM 0xFFFFE8F0 /* length 32K */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index f633f24bd59..14cbc457159 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -266,7 +266,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 7c94c81a5d5..5a99d5fe799 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -231,8 +231,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ #define CONFIG_SYS_PIXIS_VBOOT_MASK 0xc0 -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 79a52d9d1d7..0b8fe6ad68a 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -258,7 +258,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 46a141a2c07..21cf965ab38 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 7ada8a222b9..eaa737b88e2 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -281,7 +281,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index a2d12aefd49..b31c2bb371f 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -207,8 +207,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VCFGEN1_MASK (PIXIS_VCFGEN1_TSEC1SER|PIXIS_VCFGEN1_TSEC3SER) -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index df26f101aaf..7a7e5a14570 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -303,7 +303,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index f9419ccd0f9..40b40ed3af2 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -279,7 +279,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR3_PRELIM 0xf8000801 #define CONFIG_SYS_OR3_PRELIM 0xfff00ff7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index f67d4896360..2b5b2c10646 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -254,7 +254,6 @@ #define CONFIG_SYS_OR4_PRELIM 0xffffe1f1 #define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 60e6041f0eb..8bdec65b7cd 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -265,7 +265,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR5_PRELIM 0xf8010801 #define CONFIG_SYS_OR5_PRELIM 0xffff69f7 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index ed25c996848..f17639a7c69 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -249,8 +249,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); | PIXIS_VCFGEN1_TSEC3SER \ | PIXIS_VCFGEN1_TSEC4SER) -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index f2fe4a6cf98..7d57c1c6607 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -206,7 +206,6 @@ #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 69b4c4410d7..cd9889495d9 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -268,7 +268,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index bc2d8253b0f..4ecf8068ecf 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -130,7 +130,6 @@ #define CONFIG_SYS_MONITOR_BASE TEXT_BASE #undef CONFIG_SYS_RAMBOOT -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/PM854.h b/include/configs/PM854.h index c3a7f816f92..1cc80ad2146 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -161,7 +161,6 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index b3bcf23c5cd..698ad2d9111 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 48c9339802b..2853fba0652 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -186,7 +186,6 @@ #define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) /* the size of CS5 needs to be >= 16M for TLB and LAW setups */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 2961a1b2a0f..796030d0607 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -171,7 +171,6 @@ extern int tqm834x_num_flash_banks; #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 2d4048a9283..300f49079df 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -234,7 +234,6 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_CCSRBAR \ + 0x04010000) /* Initial RAM address */ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 174149b616a..0603e3c8a4b 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -162,7 +162,6 @@ #undef CONFIG_SYS_RAMBOOT #endif -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x1000 /* End of used area in RAM*/ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index aefd30a1ede..5ce4dac5e59 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -280,7 +280,6 @@ | CONFIG_SYS_LBC_LSDMR_RFEN \ ) -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 43012754d28..e1d3a52b5e4 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -180,7 +180,6 @@ #define CONFIG_SYS_BCSR ((CONFIG_SYS_BR5_PRELIM & 0xff000000)|0x00400000) /* the size of CS5 needs to be >= 16M for TLB and LAW setups */ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 45d81792e06..752a9058d5b 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -241,7 +241,6 @@ #undef CONFIG_CLOCKS_IN_MHZ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #ifndef CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c67db8f25d9..e89b5a3fb0e 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -167,7 +167,6 @@ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End used area in RAM */ diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 2188e5401b3..a0f2ed0daf1 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -151,7 +151,6 @@ #define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 #define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index b0bd0508bb7..f0990c6799b 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -164,7 +164,6 @@ #define CONFIG_SYS_LBC_LSDMR_4 0x1861b723 #define CONFIG_SYS_LBC_LSDMR_5 0x4061b723 -#define CONFIG_L1_INIT_RAM #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End of used area in RAM */ -- cgit v1.3.1 From 9427ccde0355a2ebf47454e8e1be59f5b9864e08 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 1 Dec 2008 13:47:12 -0600 Subject: 85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser Signed-off-by: Andy Fleming --- board/freescale/mpc8548cds/mpc8548cds.c | 2 +- board/sbc8548/sbc8548.c | 2 +- board/tqc/tqm85xx/tqm85xx.c | 2 +- cpu/mpc85xx/pci.c | 2 +- include/asm-ppc/immap_85xx.h | 3 +-- 5 files changed, 5 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index ba6bff585c1..c562fc9d955 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -332,7 +332,7 @@ pci_init_board(void) first_free_busno=hose->last_busno+1; printf ("PCI on bus %02x - %02x\n",hose->first_busno,hose->last_busno); #ifdef CONFIG_PCIX_CHECK - if (!(gur->pordevsr & PORDEVSR_PCI)) { + if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { /* PCI-X init */ if (CONFIG_SYS_CLK_FREQ < 66000000) printf("PCI-X will only work at 66 MHz\n"); diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 017f6b35cf6..8c073cb4bb2 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -412,7 +412,7 @@ pci_init_board(void) first_free_busno=hose->last_busno+1; printf ("PCI on bus %02x - %02x\n",hose->first_busno,hose->last_busno); #ifdef CONFIG_PCIX_CHECK - if (!(gur->pordevsr & PORDEVSR_PCI)) { + if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { /* PCI-X init */ if (CONFIG_SYS_CLK_FREQ < 66000000) printf("PCI-X will only work at 66 MHz\n"); diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index 3a828edc1ad..73f1d01bdf2 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -610,7 +610,7 @@ static inline void init_pci1(void) first_free_busno = hose->last_busno + 1; #ifdef CONFIG_PCIX_CHECK - if (!(gur->pordevsr & PORDEVSR_PCI)) { + if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { ushort reg16 = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E; diff --git a/cpu/mpc85xx/pci.c b/cpu/mpc85xx/pci.c index 112f18c2b8b..787c6eb74c4 100644 --- a/cpu/mpc85xx/pci.c +++ b/cpu/mpc85xx/pci.c @@ -70,7 +70,7 @@ pci_mpc85xx_init(struct pci_controller *board_hose) */ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff); - if (!(gur->pordevsr & PORDEVSR_PCI)) { + if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { /* PCI-X init */ if (CONFIG_SYS_CLK_FREQ < 66000000) printf("PCI-X will only work at 66 MHz\n"); diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 75b451d2019..e5046bef321 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1569,6 +1569,7 @@ typedef struct ccsr_gur { #define MPC85xx_PORDEVSR_SGMII3_DIS 0x08000000 #define MPC85xx_PORDEVSR_SGMII4_DIS 0x04000000 #define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000 +#define MPC85xx_PORDEVSR_PCI1 0x00800000 #define MPC85xx_PORDEVSR_IO_SEL 0x00780000 #define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000 #define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000 @@ -1647,8 +1648,6 @@ typedef struct ccsr_gur { char res15[61648]; /* 0xe0f30 to 0xefffff */ } ccsr_gur_t; -#define PORDEVSR_PCI (0x00800000) /* PCI Mode */ - #define CONFIG_SYS_MPC85xx_GUTS_OFFSET (0xE0000) #define CONFIG_SYS_MPC85xx_GUTS_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET) #define CONFIG_SYS_MPC85xx_ECM_OFFSET (0x0000) -- cgit v1.3.1 From ea154a1781135d822eedee7567cc156089eae93c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 24 Nov 2008 10:25:14 -0600 Subject: FSL: Moved BR_PHYS_ADDR for localbus to common header The BR_PHYS_ADDR macro is useful on all machines that have local bus which is pretty much all 83xx/85xx/86xx chips. Additionally most 85xx & 86xx will need it if they want to support 36-bit physical addresses. Signed-off-by: Kumar Gala Acked-by: Andy Fleming --- include/asm-ppc/fsl_lbc.h | 8 ++++++++ include/configs/MPC8641HPCN.h | 9 --------- 2 files changed, 8 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index cac7bf6bf58..51fc5c13b0b 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -69,6 +69,14 @@ #define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_ATOM | BR_V) #endif +/* Convert an address into the right format for the BR registers */ +#ifdef CONFIG_PHYS_64BIT +#define BR_PHYS_ADDR(x) ((unsigned long)((x & 0x0ffff8000ULL) | \ + ((x & 0x300000000ULL) >> 19))) +#else +#define BR_PHYS_ADDR(x) (x & 0xffff8000) +#endif + /* OR - Option Registers */ #define OR0 0x5004 /* Register offset to immr */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index cd9889495d9..5a832961c2d 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -186,17 +186,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_BASE_PHYS (CONFIG_SYS_FLASH_BASE \ | CONFIG_SYS_PHYS_ADDR_HIGH) - #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} -/* Convert an address into the right format for the BR registers */ -#ifdef CONFIG_PHYS_64BIT -#define BR_PHYS_ADDR(x) ((unsigned long)((x & 0x0ffff8000ULL) | \ - ((x & 0x300000000ULL) >> 19))) -#else -#define BR_PHYS_ADDR(x) (x & 0xffff8000) -#endif - #define CONFIG_SYS_BR0_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \ | 0x00001001) /* port size 16bit */ #define CONFIG_SYS_OR0_PRELIM 0xff806ff7 /* 8MB Boot Flash area*/ -- cgit v1.3.1 From dc889e865356497d3e495570118c2245ebce2631 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Fri, 28 Nov 2008 20:16:58 +0800 Subject: 85xx: fix the wrong DDR settings for MPC8572DS The default DDR freq is 400MHz or 800M data rate, the old settings is pure wrong for the default case. Signed-off-by: Dave Liu Acked-by: Andy Fleming --- include/configs/MPC8572DS.h | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index f17639a7c69..9a66ca81028 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -115,22 +115,22 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define SPD_EEPROM_ADDRESS2 0x52 /* CTLR 1 DIMM 0 */ /* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 256 /* DDR is 256MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000001F -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80010102 /* Enable, no interleaving */ -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 -#define CONFIG_SYS_DDR_TIMING_0 0x00260802 -#define CONFIG_SYS_DDR_TIMING_1 0x3935d322 -#define CONFIG_SYS_DDR_TIMING_2 0x14904cc8 -#define CONFIG_SYS_DDR_MODE_1 0x00480432 +#define CONFIG_SYS_SDRAM_SIZE 512 /* DDR is 512MB */ +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000001F +#define CONFIG_SYS_DDR_CS0_CONFIG 0x80010202 /* Enable, no interleaving */ +#define CONFIG_SYS_DDR_TIMING_3 0x00020000 +#define CONFIG_SYS_DDR_TIMING_0 0x00260802 +#define CONFIG_SYS_DDR_TIMING_1 0x626b2634 +#define CONFIG_SYS_DDR_TIMING_2 0x062874cf +#define CONFIG_SYS_DDR_MODE_1 0x00440462 #define CONFIG_SYS_DDR_MODE_2 0x00000000 -#define CONFIG_SYS_DDR_INTERVAL 0x06180100 +#define CONFIG_SYS_DDR_INTERVAL 0x0c300100 #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef -#define CONFIG_SYS_DDR_CLK_CTRL 0x03800000 -#define CONFIG_SYS_DDR_OCD_CTRL 0x00000000 +#define CONFIG_SYS_DDR_CLK_CTRL 0x00800000 +#define CONFIG_SYS_DDR_OCD_CTRL 0x00000000 #define CONFIG_SYS_DDR_OCD_STATUS 0x00000000 -#define CONFIG_SYS_DDR_CONTROL 0xC3008000 /* Type = DDR2 */ -#define CONFIG_SYS_DDR_CONTROL2 0x04400010 +#define CONFIG_SYS_DDR_CONTROL 0xc3000008 /* Type = DDR2 */ +#define CONFIG_SYS_DDR_CONTROL2 0x24400000 #define CONFIG_SYS_DDR_ERR_INT_EN 0x0000000d #define CONFIG_SYS_DDR_ERR_DIS 0x00000000 -- cgit v1.3.1 From 3c2c2f427905040c1513d0c51d637689cba48346 Mon Sep 17 00:00:00 2001 From: Remy Bohmer Date: Thu, 27 Nov 2008 22:30:27 +0100 Subject: Remove non-ascii characters from fat code This code contains some non-ascii characters in comment lines and code. Most editors do not display those characters properly and editing those files results always in diffs at these places which are usually not required to be changed at all. This is error prone. So, remove those weird characters and replace them by normal C-style equivalents for which the proper defines were already in the header. Signed-off-by: Remy Bohmer --- fs/fat/fat.c | 4 ++-- include/fat.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 2f0bd8c14d2..06eabc36291 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -184,7 +184,7 @@ static void get_name (dir_entry *dirent, char *s_name) if (*s_name == DELETED_FLAG) *s_name = '\0'; else if (*s_name == aRING) - *s_name = ''; + *s_name = DELETED_FLAG; downcase (s_name); } @@ -489,7 +489,7 @@ get_vfatname(fsdata *mydata, int curclust, __u8 *cluster, l_name[idx] = '\0'; if (*l_name == DELETED_FLAG) *l_name = '\0'; - else if (*l_name == aRING) *l_name = ''; + else if (*l_name == aRING) *l_name = DELETED_FLAG; downcase(l_name); /* Return the real directory entry */ diff --git a/include/fat.h b/include/fat.h index 59de3fbec55..c8b94936209 100644 --- a/include/fat.h +++ b/include/fat.h @@ -67,7 +67,7 @@ #define ATTR_VFAT (ATTR_RO | ATTR_HIDDEN | ATTR_SYS | ATTR_VOLUME) #define DELETED_FLAG ((char)0xe5) /* Marks deleted files when in name[0] */ -#define aRING 0x05 /* Used to represent '' in name[0] */ +#define aRING 0x05 /* Used as special character in name[0] */ /* Indicates that the entry is the last long entry in a set of long * dir entries -- cgit v1.3.1 From 23afaba65ec5206757e589ef334a8b38168c045f Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Tue, 2 Dec 2008 10:31:04 +0100 Subject: net: tsec: Fix Marvell 88E1121R phy init This patch tries to ensure that phy interrupt pin won't be asserted after booting. We experienced following issues with current 88E1121R phy init: Marvell 88E1121R phy can be hardware-configured to share MDC/MDIO and interrupt pins for both ports P0 and P1 (e.g. as configured on socrates board). Port 0 interrupt pin will be shared by both ports in such configuration. After booting Linux and configuring eth0 interface, port 0 phy interrupts are enabled. After rebooting without proper eth0 interface shutdown port 0 phy interrupts remain enabled so any change on port 0 (link status, etc.) cause assertion of the interrupt. Now booting Linux and configuring eth1 interface will cause permanent phy interrupt storm as the registered phy 1 interrupt handler doesn't acknowledge phy 0 interrupts. This of course should be fixed in Linux driver too. Signed-off-by: Anatolij Gustschin Acked-by: Andy Fleming Signed-off-by: Ben Warren --- drivers/net/tsec.c | 3 +++ include/tsec.h | 4 ++++ 2 files changed, 7 insertions(+) (limited to 'include') diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index d7da0819d10..fbc9a6dd05b 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -1196,6 +1196,9 @@ struct phy_info phy_info_M88E1121R = { {MIIM_88E1121_PHY_LED_CTRL, miim_read, &mii_88E1121_set_led}, {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init}, + /* Disable IRQs and de-assert interrupt */ + {MIIM_88E1121_PHY_IRQ_EN, 0, NULL}, + {MIIM_88E1121_PHY_IRQ_STATUS, miim_read, NULL}, {miim_end,} }, (struct phy_cmd[]){ /* startup */ diff --git a/include/tsec.h b/include/tsec.h index d2951f6d33b..7b52e06ab00 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -226,6 +226,10 @@ #define MIIM_88E1121_PHY_LED_PAGE 3 #define MIIM_88E1121_PHY_LED_DEF 0x0030 +/* 88E1121 PHY IRQ Enable/Status Register */ +#define MIIM_88E1121_PHY_IRQ_EN 18 +#define MIIM_88E1121_PHY_IRQ_STATUS 19 + #define MIIM_88E1121_PHY_PAGE 22 /* 88E1145 Extended PHY Specific Control Register */ -- cgit v1.3.1 From e0c07b868cab405ab4b5335a0247899bfc5ea0b6 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 1 Dec 2008 16:26:20 -0600 Subject: net: Define IP flag field values These defines were pulled from the "Add simple IP/UDP fragmentation support" patch from Frank Haverkamp . Signed-off-by: Peter Tyser Signed-off-by: Ben Warren --- include/net.h | 6 ++++++ net/net.c | 6 +++--- 2 files changed, 9 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/net.h b/include/net.h index a5a256bcd08..d2d394f0da8 100644 --- a/include/net.h +++ b/include/net.h @@ -200,6 +200,12 @@ typedef struct { ushort udp_xsum; /* Checksum */ } IP_t; +#define IP_OFFS 0x1fff /* ip offset *= 8 */ +#define IP_FLAGS 0xe000 /* first 3 bits */ +#define IP_FLAGS_RES 0x8000 /* reserved */ +#define IP_FLAGS_DFRAG 0x4000 /* don't fragments */ +#define IP_FLAGS_MFRAG 0x2000 /* more fragments */ + #define IP_HDR_SIZE_NO_UDP (sizeof (IP_t) - 8) #define IP_HDR_SIZE (sizeof (IP_t)) diff --git a/net/net.c b/net/net.c index 77e83b5bd0a..cf1f4fa1f29 100644 --- a/net/net.c +++ b/net/net.c @@ -735,7 +735,7 @@ int PingSend(void) ip->ip_tos = 0; ip->ip_len = htons(IP_HDR_SIZE_NO_UDP + 8); ip->ip_id = htons(NetIPID++); - ip->ip_off = htons(0x4000); /* No fragmentation */ + ip->ip_off = htons(IP_FLAGS_DFRAG); /* Don't fragment */ ip->ip_ttl = 255; ip->ip_p = 0x01; /* ICMP */ ip->ip_sum = 0; @@ -1399,7 +1399,7 @@ NetReceive(volatile uchar * inpkt, int len) if ((ip->ip_hl_v & 0xf0) != 0x40) { return; } - if (ip->ip_off & htons(0x1fff)) { /* Can't deal w/ fragments */ + if (ip->ip_off & htons(IP_OFFS)) { /* Can't deal w/ fragments */ return; } /* can't deal with headers > 20 bytes */ @@ -1698,7 +1698,7 @@ NetSetIP(volatile uchar * xip, IPaddr_t dest, int dport, int sport, int len) ip->ip_tos = 0; ip->ip_len = htons(IP_HDR_SIZE + len); ip->ip_id = htons(NetIPID++); - ip->ip_off = htons(0x4000); /* No fragmentation */ + ip->ip_off = htons(IP_FLAGS_DFRAG); /* Don't fragment */ ip->ip_ttl = 255; ip->ip_p = 17; /* UDP */ ip->ip_sum = 0; -- cgit v1.3.1 From 89a7a87f084c657f8e32b513a77b50eca07e17ec Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Sat, 6 Dec 2008 13:11:14 +0100 Subject: at91: Choose environment variables location within make config target This patch adds the possiblity to choose the media where the environment will be located. This allow to choose this fundamental configuration without editing config files. Documentation file added. Signed-off-by: Nicolas Ferre Acked-by: Stelian Pop Acked-by: Jean-Christophe PLAGNIOL-VILLARD --- Makefile | 54 +++++++++++++++++++++++-- doc/README.at91 | 88 +++++++++++++++++++++++++++++++++++++++++ include/configs/at91sam9260ek.h | 4 -- include/configs/at91sam9261ek.h | 19 +++++++-- include/configs/at91sam9263ek.h | 3 -- include/configs/at91sam9rlek.h | 3 -- 6 files changed, 153 insertions(+), 18 deletions(-) create mode 100644 doc/README.at91 (limited to 'include') diff --git a/Makefile b/Makefile index befb6081a82..2ac8141f9c1 100644 --- a/Makefile +++ b/Makefile @@ -2582,17 +2582,63 @@ afeb9260_config: unconfig at91cap9adk_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs at91cap9adk atmel at91 +at91sam9260ek_nandflash_config \ +at91sam9260ek_dataflash_cs0_config \ +at91sam9260ek_dataflash_cs1_config \ at91sam9260ek_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9260ek atmel at91 + @if [ "$(findstring _nandflash,$@)" ] ; then \ + echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in NAND FLASH" ; \ + elif [ "$(findstring dataflash_cs0,$@)" ] ; then \ + echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \ + else \ + echo "#define CONFIG_SYS_USE_DATAFLASH_CS1 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in SPI DATAFLASH CS1" ; \ + fi; + @$(MKCONFIG) -a at91sam9260ek arm arm926ejs at91sam9260ek atmel at91 +at91sam9261ek_nandflash_config \ +at91sam9261ek_dataflash_cs0_config \ +at91sam9261ek_dataflash_cs3_config \ at91sam9261ek_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9261ek atmel at91 + @if [ "$(findstring _nandflash,$@)" ] ; then \ + echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in NAND FLASH" ; \ + elif [ "$(findstring dataflash_cs3,$@)" ] ; then \ + echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \ + else \ + echo "#define CONFIG_SYS_USE_DATAFLASH_CS0 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \ + fi; + @$(MKCONFIG) -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91 +at91sam9263ek_nandflash_config \ +at91sam9263ek_dataflash_config \ +at91sam9263ek_dataflash_cs0_config \ at91sam9263ek_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9263ek atmel at91 + @if [ "$(findstring _nandflash,$@)" ] ; then \ + echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in NAND FLASH" ; \ + else \ + echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \ + fi; + @$(MKCONFIG) -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91 +at91sam9rlek_nandflash_config \ +at91sam9rlek_dataflash_config \ +at91sam9rlek_dataflash_cs0_config \ at91sam9rlek_config : unconfig - @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9rlek atmel at91 + @if [ "$(findstring _nandflash,$@)" ] ; then \ + echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in NAND FLASH" ; \ + else \ + echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \ + $(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \ + fi; + @$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91 ######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. diff --git a/doc/README.at91 b/doc/README.at91 new file mode 100644 index 00000000000..838769a9084 --- /dev/null +++ b/doc/README.at91 @@ -0,0 +1,88 @@ +Atmel AT91 Evaluation kits + +http://atmel.com/dyn/products/tools.asp?family_id=605#1443 + +------------------------------------------------------------------------------ +AT91SAM9260EK +------------------------------------------------------------------------------ + +Memory map + 0x20000000 - 23FFFFFF SDRAM (64 MB) + 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J13) + 0xD0000000 - Dxxxxxxx Soldered Atmel Dataflash + +Environment variables + + U-Boot environment variables can be stored at different places: + - Dataflash on SPI chip select 1 (default) + - Dataflash on SPI chip select 0 (dataflash card) + - Nand flash. + + You can choose your storage location at config step (here for at91sam9260ek) : + make at91sam9260ek_config - use data flash (spi cs1) (default) + make at91sam9260ek_nandflash_config - use nand flash + make at91sam9260ek_dataflash_cs0_config - use data flash (spi cs0) + make at91sam9260ek_dataflash_cs1_config - use data flash (spi cs1) + + +------------------------------------------------------------------------------ +AT91SAM9261EK +------------------------------------------------------------------------------ + +Memory map + 0x20000000 - 23FFFFFF SDRAM (64 MB) + 0xC0000000 - Cxxxxxxx Soldered Atmel Dataflash + 0xD0000000 - Dxxxxxxx Atmel Dataflash card (J22) + +Environment variables + + U-Boot environment variables can be stored at different places: + - Dataflash on SPI chip select 0 (default) + - Dataflash on SPI chip select 3 (dataflash card) + - Nand flash. + + You can choose your storage location at config step (here for at91sam9260ek) : + make at91sam9261ek_config - use data flash (spi cs0) (default) + make at91sam9261ek_nandflash_config - use nand flash + make at91sam9261ek_dataflash_cs0_config - use data flash (spi cs0) + make at91sam9261ek_dataflash_cs3_config - use data flash (spi cs3) + + +------------------------------------------------------------------------------ +AT91SAM9263EK +------------------------------------------------------------------------------ + +Memory map + 0x20000000 - 23FFFFFF SDRAM (64 MB) + 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J9) + +Environment variables + + U-Boot environment variables can be stored at different places: + - Dataflash on SPI chip select 0 (dataflash card) + - Nand flash. + + You can choose your storage location at config step (here for at91sam9260ek) : + make at91sam9263ek_config - use data flash (spi cs0) (default) + make at91sam9263ek_nandflash_config - use nand flash + make at91sam9263ek_dataflash_cs0_config - use data flash (spi cs0) + + +------------------------------------------------------------------------------ +AT91SAM9RLEK +------------------------------------------------------------------------------ + +Memory map + 0x20000000 - 23FFFFFF SDRAM (64 MB) + 0xC0000000 - Cxxxxxxx Soldered Atmel Dataflash + +Environment variables + + U-Boot environment variables can be stored at different places: + - Dataflash on SPI chip select 0 + - Nand flash. + + You can choose your storage location at config step (here for at91sam9260ek) : + make at91sam9263ek_config - use data flash (spi cs0) (default) + make at91sam9263ek_nandflash_config - use nand flash + make at91sam9263ek_dataflash_cs0_config - use data flash (spi cs0) diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index fbc470fbe0a..2df8d549156 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -131,10 +131,6 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END 0x23e00000 -#undef CONFIG_SYS_USE_DATAFLASH_CS0 -#define CONFIG_SYS_USE_DATAFLASH_CS1 1 -#undef CONFIG_SYS_USE_NANDFLASH - #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index bd668235d38..0016b4fbfb7 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -144,15 +144,12 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END 0x23e00000 -#define CONFIG_SYS_USE_DATAFLASH_CS0 1 -#undef CONFIG_SYS_USE_NANDFLASH - #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ #define CONFIG_ENV_IS_IN_DATAFLASH 1 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) -#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_OFFSET 0x4200 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x4200 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm" @@ -161,6 +158,20 @@ "mtdparts=at91_nand:-(root) " \ "rw rootfstype=jffs2" +#elif CONFIG_SYS_USE_DATAFLASH_CS3 + +/* bootstrap + u-boot + env + linux in dataflash on CS3 */ +#define CONFIG_ENV_IS_IN_DATAFLASH 1 +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400) +#define CONFIG_ENV_OFFSET 0x4200 +#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x4200 +#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm" +#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ + "root=/dev/mtdblock0 " \ + "mtdparts=at91_nand:-(root) " \ + "rw rootfstype=jffs2" + #else /* CONFIG_SYS_USE_NANDFLASH */ /* bootstrap + u-boot + env + linux in nandflash */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index a2b09ca9f7c..fc7c94126e6 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -151,9 +151,6 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END 0x23e00000 -#define CONFIG_SYS_USE_DATAFLASH 1 -#undef CONFIG_SYS_USE_NANDFLASH - #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 35dac47ba1c..35fefc42131 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -118,9 +118,6 @@ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END 0x23e00000 -#define CONFIG_SYS_USE_DATAFLASH 1 -#undef CONFIG_SYS_USE_NANDFLASH - #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -- cgit v1.3.1 From 561858ee7d0274c3e89dc98d4d0698cb6fcf6fd9 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 3 Nov 2008 09:30:59 -0600 Subject: Update U-Boot's build timestamp on every compile Use the GNU 'date' command to auto-generate a new U-Boot timestamp on every compile. Signed-off-by: Peter Tyser --- Makefile | 17 +++++++++++------ board/bmw/bmw.c | 4 ++-- board/eXalion/eXalion.c | 3 ++- board/lwmon/lwmon.c | 3 ++- board/mousse/mousse.c | 3 ++- board/netstar/eeprom.c | 3 ++- board/sandburst/karef/karef.c | 6 ++++-- board/sandburst/metrobox/metrobox.c | 6 ++++-- board/tqc/tqm8xx/tqm8xx.c | 3 ++- board/trab/trab_fkt.c | 3 ++- board/voiceblue/eeprom.c | 3 ++- cpu/74xx_7xx/start.S | 3 ++- cpu/leon2/start.S | 3 ++- cpu/leon3/start.S | 3 ++- cpu/mcf5227x/start.S | 3 ++- cpu/mcf523x/start.S | 3 ++- cpu/mcf52x2/start.S | 3 ++- cpu/mcf532x/start.S | 3 ++- cpu/mcf5445x/start.S | 3 ++- cpu/mcf547x_8x/start.S | 3 ++- cpu/mpc512x/start.S | 3 ++- cpu/mpc5xx/start.S | 3 ++- cpu/mpc5xxx/start.S | 3 ++- cpu/mpc8220/start.S | 3 ++- cpu/mpc824x/start.S | 3 ++- cpu/mpc8260/start.S | 3 ++- cpu/mpc83xx/start.S | 3 ++- cpu/mpc85xx/start.S | 3 ++- cpu/mpc86xx/start.S | 3 ++- cpu/mpc8xx/start.S | 3 ++- cpu/mpc8xx/video.c | 6 +++++- cpu/nios/start.S | 3 ++- cpu/nios2/start.S | 3 ++- cpu/ppc4xx/start.S | 3 ++- include/.gitignore | 1 + include/configs/NETPHONE.h | 2 +- include/configs/NETTA.h | 2 +- include/configs/NETTA2.h | 2 +- include/timestamp.h | 30 ++++++++++++++++++++++++++++++ lib_arm/board.c | 3 ++- lib_avr32/board.c | 3 ++- lib_blackfin/board.c | 3 ++- lib_i386/board.c | 3 ++- lib_microblaze/board.c | 3 ++- lib_mips/board.c | 3 ++- lib_sh/board.c | 3 ++- net/net.c | 3 +++ 47 files changed, 135 insertions(+), 52 deletions(-) create mode 100644 include/timestamp.h (limited to 'include') diff --git a/Makefile b/Makefile index 4eff1b5d2a2..11fc3b76a46 100644 --- a/Makefile +++ b/Makefile @@ -30,6 +30,7 @@ U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) else U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL)$(EXTRAVERSION) endif +TIMESTAMP_FILE = $(obj)include/timestamp_autogenerated.h VERSION_FILE = $(obj)include/version_autogenerated.h HOSTARCH := $(shell uname -m | \ @@ -261,7 +262,7 @@ LIBS += api/libapi.a LIBS += post/libpost.a LIBS := $(addprefix $(obj),$(LIBS)) -.PHONY : $(LIBS) $(VERSION_FILE) +.PHONY : $(LIBS) $(TIMESTAMP_FILE) $(VERSION_FILE) LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).a LIBBOARD := $(addprefix $(obj),$(LIBBOARD)) @@ -353,13 +354,13 @@ $(SUBDIRS): depend $(obj)include/autoconf.mk $(LDSCRIPT): depend $(obj)include/autoconf.mk $(MAKE) -C $(dir $@) $(notdir $@) -$(NAND_SPL): $(VERSION_FILE) $(obj)include/autoconf.mk +$(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C nand_spl/board/$(BOARDDIR) all $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin -$(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk +$(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk $(MAKE) -C onenand_ipl/board/$(BOARDDIR) all $(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk @@ -372,6 +373,10 @@ $(VERSION_FILE): ) > $@.tmp @cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@ +$(TIMESTAMP_FILE): + @date +'#define U_BOOT_DATE "%b %d %C%y"' > $@ + @date +'#define U_BOOT_TIME "%T"' >> $@ + gdbtools: $(MAKE) -C tools/gdb all || exit 1 @@ -381,7 +386,7 @@ updater: env: $(MAKE) -C tools/env all MTD_VERSION=${MTD_VERSION} || exit 1 -depend dep: $(VERSION_FILE) +depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done TAG_SUBDIRS += include @@ -462,7 +467,7 @@ sinclude $(obj)include/autoconf.mk.dep else # !config.mk all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \ $(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \ -$(SUBDIRS) $(VERSION_FILE) gdbtools updater env depend \ +$(SUBDIRS) $(TIMESTAMP_FILE) $(VERSION_FILE) gdbtools updater env depend \ dep tags ctags etags cscope $(obj)System.map: @echo "System not configured - see README" >&2 @ exit 1 @@ -3274,7 +3279,7 @@ clean: @rm -f $(obj)include/bmp_logo.h @rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map} @rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map} - @rm -f $(obj)api_examples/demo $(VERSION_FILE) + @rm -f $(obj)api_examples/demo $(TIMESTAMP_FILE) $(VERSION_FILE) @find $(OBJTREE) -type f \ \( -name 'core' -o -name '*.bak' -o -name '*~' \ -o -name '*.o' -o -name '*.a' \) -print \ diff --git a/board/bmw/bmw.c b/board/bmw/bmw.c index b629c38272d..41ce14f653d 100644 --- a/board/bmw/bmw.c +++ b/board/bmw/bmw.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include @@ -45,7 +45,7 @@ int checkboard(void) char buf[32]; puts ("Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)\n"); - printf("Built: %s at %s\n", __DATE__ , __TIME__ ); + printf("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME); /* printf("MPLD: Revision %d\n", SYS_REVID_GET()); */ printf("Local Bus at %s MHz\n", strmhz(buf, busfreq)); return 0; diff --git a/board/eXalion/eXalion.c b/board/eXalion/eXalion.c index 34538c4a18a..c17498f0649 100644 --- a/board/eXalion/eXalion.c +++ b/board/eXalion/eXalion.c @@ -31,6 +31,7 @@ #include #include #include +#include #include "piix_pci.h" #include "eXalion.h" @@ -40,7 +41,7 @@ int checkboard (void) char buf[32]; printf ("Board: eXalion MPC824x - CHRP (MAP B)\n"); - printf ("Built: %s at %s\n", __DATE__, __TIME__); + printf ("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME); printf ("Local Bus: %s MHz\n", strmhz (buf, busfreq)); return 0; diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c index d062466c0f6..878752c6691 100644 --- a/board/lwmon/lwmon.c +++ b/board/lwmon/lwmon.c @@ -762,12 +762,13 @@ static uchar *key_match (uchar *kbd_data) #ifdef CONFIG_LCD_INFO #include #include +#include void lcd_show_board_info(void) { char temp[32]; - lcd_printf ("%s (%s - %s)\n", U_BOOT_VERSION, __DATE__, __TIME__); + lcd_printf ("%s (%s - %s)\n", U_BOOT_VERSION, U_BOOT_DATE, U_BOOT_TIME); lcd_printf ("(C) 2008 DENX Software Engineering GmbH\n"); lcd_printf (" Wolfgang DENK, wd@denx.de\n"); #ifdef CONFIG_LCD_INFO_BELOW_LOGO diff --git a/board/mousse/mousse.c b/board/mousse/mousse.c index 6a12b576e0a..bd8d1c6f053 100644 --- a/board/mousse/mousse.c +++ b/board/mousse/mousse.c @@ -30,6 +30,7 @@ #include #include #include +#include #include "mousse.h" #include "m48t59y.h" @@ -42,7 +43,7 @@ int checkboard (void) char buf[32]; puts ("Board: MOUSSE MPC8240/KAHLUA - CHRP (MAP B)\n"); - printf ("Built: %s at %s\n", __DATE__, __TIME__); + printf ("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME); printf ("MPLD: Revision %d\n", SYS_REVID_GET ()); printf ("Local Bus: %s MHz\n", strmhz (buf, busfreq)); diff --git a/board/netstar/eeprom.c b/board/netstar/eeprom.c index 0de594b65f2..5806128cf1a 100644 --- a/board/netstar/eeprom.c +++ b/board/netstar/eeprom.c @@ -26,6 +26,7 @@ #include #include +#include #include "../drivers/net/smc91111.h" #define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE @@ -173,7 +174,7 @@ int eeprom(int argc, char *argv[]) /* Print help message */ if (argv[1][1] == 'h') { printf("VoiceBlue EEPROM writer\n"); - printf("Built: %s at %s\n", __DATE__ , __TIME__ ); + printf("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME); printf("Usage:\n\t [] [<...>]\n"); return 0; } diff --git a/board/sandburst/karef/karef.c b/board/sandburst/karef/karef.c index 7909d34058c..8d97a9c3577 100644 --- a/board/sandburst/karef/karef.c +++ b/board/sandburst/karef/karef.c @@ -26,6 +26,7 @@ #include #include "karef.h" #include "karef_version.h" +#include #include #include #include @@ -299,7 +300,7 @@ int checkboard (void) "Serial Number: %d\n", sernum); printf ("%s\n", KAREF_U_BOOT_REL_STR); - printf ("Built %s %s by %s\n", __DATE__, __TIME__, BUILDUSER); + printf ("Built %s %s by %s\n", U_BOOT_DATE, U_BOOT_TIME, BUILDUSER); if (sbcommon_get_master()) { printf("Slot 0 - Master\nSlave board"); if (sbcommon_secondary_present()) @@ -366,7 +367,8 @@ int misc_init_r (void) setenv("ubrelver", KAREF_U_BOOT_REL_STR); memset(envstr, 0, 255); - sprintf (envstr, "Built %s %s by %s", __DATE__, __TIME__, BUILDUSER); + sprintf (envstr, "Built %s %s by %s", + U_BOOT_DATE, U_BOOT_TIME, BUILDUSER); setenv("bldstr", envstr); saveenv(); diff --git a/board/sandburst/metrobox/metrobox.c b/board/sandburst/metrobox/metrobox.c index c3c44593a80..19302dc61e0 100644 --- a/board/sandburst/metrobox/metrobox.c +++ b/board/sandburst/metrobox/metrobox.c @@ -25,6 +25,7 @@ #include #include "metrobox.h" #include "metrobox_version.h" +#include #include #include #include @@ -270,7 +271,7 @@ int checkboard (void) printf ("Board: Sandburst Corporation MetroBox Serial Number: %d\n", sernum); printf ("%s\n", METROBOX_U_BOOT_REL_STR); - printf ("Built %s %s by %s\n", __DATE__, __TIME__, BUILDUSER); + printf ("Built %s %s by %s\n", U_BOOT_DATE, U_BOOT_TIME, BUILDUSER); if (sbcommon_get_master()) { printf("Slot 0 - Master\nSlave board"); if (sbcommon_secondary_present()) @@ -335,7 +336,8 @@ int misc_init_r (void) setenv("ubrelver", METROBOX_U_BOOT_REL_STR); memset(envstr, 0, 255); - sprintf (envstr, "Built %s %s by %s", __DATE__, __TIME__, BUILDUSER); + sprintf (envstr, "Built %s %s by %s", + U_BOOT_DATE, U_BOOT_TIME, BUILDUSER); setenv("bldstr", envstr); saveenv(); diff --git a/board/tqc/tqm8xx/tqm8xx.c b/board/tqc/tqm8xx/tqm8xx.c index d8a19a4ce0f..e065d69dd46 100644 --- a/board/tqc/tqm8xx/tqm8xx.c +++ b/board/tqc/tqm8xx/tqm8xx.c @@ -571,12 +571,13 @@ void ide_led (uchar led, uchar status) #ifdef CONFIG_LCD_INFO #include #include +#include void lcd_show_board_info(void) { char temp[32]; - lcd_printf ("%s (%s - %s)\n", U_BOOT_VERSION, __DATE__, __TIME__); + lcd_printf ("%s (%s - %s)\n", U_BOOT_VERSION, U_BOOT_DATE, U_BOOT_TIME); lcd_printf ("(C) 2008 DENX Software Engineering GmbH\n"); lcd_printf (" Wolfgang DENK, wd@denx.de\n"); #ifdef CONFIG_LCD_INFO_BELOW_LOGO diff --git a/board/trab/trab_fkt.c b/board/trab/trab_fkt.c index 7273ef97b65..93b9490e1ce 100644 --- a/board/trab/trab_fkt.c +++ b/board/trab/trab_fkt.c @@ -25,6 +25,7 @@ #include #include +#include #include #include "tsc2000.h" #include "rs485.h" @@ -296,7 +297,7 @@ int trab_fkt (int argc, char *argv[]) int do_info (void) { printf ("Stand-alone application for TRAB board function test\n"); - printf ("Built: %s at %s\n", __DATE__ , __TIME__ ); + printf ("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME); return 0; } diff --git a/board/voiceblue/eeprom.c b/board/voiceblue/eeprom.c index d8ea6e5731c..f01597ad105 100644 --- a/board/voiceblue/eeprom.c +++ b/board/voiceblue/eeprom.c @@ -26,6 +26,7 @@ #include #include +#include #include "../drivers/net/smc91111.h" #define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE @@ -169,7 +170,7 @@ int eeprom(int argc, char *argv[]) /* Print help message */ if (argv[1][1] == 'h') { printf("VoiceBlue EEPROM writer\n"); - printf("Built: %s at %s\n", __DATE__ , __TIME__ ); + printf("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME); printf("Usage:\n\t [] [<...>]\n"); return 0; } diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S index b5484e37455..792cd308566 100644 --- a/cpu/74xx_7xx/start.S +++ b/cpu/74xx_7xx/start.S @@ -34,6 +34,7 @@ */ #include #include <74xx_7xx.h> +#include #include #include @@ -87,7 +88,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/leon2/start.S b/cpu/leon2/start.S index 9b5d83ea50f..b1f1eb5f3ce 100644 --- a/cpu/leon2/start.S +++ b/cpu/leon2/start.S @@ -27,6 +27,7 @@ #include #include #include +#include #include /* Entry for traps which jump to a programmer-specified trap handler. */ @@ -199,7 +200,7 @@ _trap_table: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .section ".text" diff --git a/cpu/leon3/start.S b/cpu/leon3/start.S index 7afe10e5f28..bd634bd0c2d 100644 --- a/cpu/leon3/start.S +++ b/cpu/leon3/start.S @@ -27,6 +27,7 @@ #include #include #include +#include #include /* Entry for traps which jump to a programmer-specified trap handler. */ @@ -200,7 +201,7 @@ _trap_table: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .section ".text" diff --git a/cpu/mcf5227x/start.S b/cpu/mcf5227x/start.S index 93872507b13..0c9c89c4021 100644 --- a/cpu/mcf5227x/start.S +++ b/cpu/mcf5227x/start.S @@ -22,6 +22,7 @@ */ #include +#include #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -591,6 +592,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf523x/start.S b/cpu/mcf523x/start.S index b70b83b3375..d44da37ec72 100644 --- a/cpu/mcf523x/start.S +++ b/cpu/mcf523x/start.S @@ -22,6 +22,7 @@ */ #include +#include #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -336,6 +337,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index da45bcbbf70..ba6b8843e42 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -22,6 +22,7 @@ */ #include +#include #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -474,6 +475,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 8fa605a6442..a46c47adcaa 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -25,6 +25,7 @@ */ #include +#include #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -342,6 +343,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf5445x/start.S b/cpu/mcf5445x/start.S index 61e43fff35a..d5a7f937f20 100644 --- a/cpu/mcf5445x/start.S +++ b/cpu/mcf5445x/start.S @@ -22,6 +22,7 @@ */ #include +#include #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -627,6 +628,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mcf547x_8x/start.S b/cpu/mcf547x_8x/start.S index 41fc694ac31..94ef14bf3d2 100644 --- a/cpu/mcf547x_8x/start.S +++ b/cpu/mcf547x_8x/start.S @@ -22,6 +22,7 @@ */ #include +#include #include "version.h" #ifndef CONFIG_IDENT_STRING @@ -357,6 +358,6 @@ dcache_status: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S index 26f3c5237e1..360682dafcf 100644 --- a/cpu/mpc512x/start.S +++ b/cpu/mpc512x/start.S @@ -31,6 +31,7 @@ #include #include +#include #include #define CONFIG_521X 1 /* needed for Linux kernel header files*/ @@ -85,7 +86,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii " ", CONFIG_IDENT_STRING, "\0" /* diff --git a/cpu/mpc5xx/start.S b/cpu/mpc5xx/start.S index f2ffe84c2d9..106935cb636 100644 --- a/cpu/mpc5xx/start.S +++ b/cpu/mpc5xx/start.S @@ -32,6 +32,7 @@ #include #include +#include #include #define CONFIG_5xx 1 /* needed for Linux kernel header files */ @@ -80,7 +81,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S index defe77d75f2..6b1162aa5ee 100644 --- a/cpu/mpc5xxx/start.S +++ b/cpu/mpc5xxx/start.S @@ -27,6 +27,7 @@ */ #include #include +#include #include #define CONFIG_MPC5xxx 1 /* needed for Linux kernel header files */ @@ -78,7 +79,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" /* diff --git a/cpu/mpc8220/start.S b/cpu/mpc8220/start.S index 373be2c7458..3abc619269f 100644 --- a/cpu/mpc8220/start.S +++ b/cpu/mpc8220/start.S @@ -27,6 +27,7 @@ */ #include #include +#include #include #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -77,7 +78,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" /* diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S index b5d7eb109af..39325cda5b8 100644 --- a/cpu/mpc824x/start.S +++ b/cpu/mpc824x/start.S @@ -39,6 +39,7 @@ */ #include #include +#include #include #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -90,7 +91,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S index da0c5161fbb..379f2fb1753 100644 --- a/cpu/mpc8260/start.S +++ b/cpu/mpc8260/start.S @@ -27,6 +27,7 @@ */ #include #include +#include #include #define CONFIG_8260 1 /* needed for Linux kernel header files */ @@ -85,7 +86,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" /* diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S index cd566b2d747..792b2c8b2a5 100644 --- a/cpu/mpc83xx/start.S +++ b/cpu/mpc83xx/start.S @@ -29,6 +29,7 @@ #include #include +#include #include #define CONFIG_83XX 1 /* needed for Linux kernel header files*/ @@ -105,7 +106,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii " ", CONFIG_IDENT_STRING, "\0" diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 651ff1c02c9..8fa0ff7a8a5 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -30,6 +30,7 @@ #include #include +#include #include #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -274,7 +275,7 @@ _start: .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" .align 4 diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index efd654ce76d..6645cb8825a 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -32,6 +32,7 @@ */ #include #include +#include #include #include @@ -76,7 +77,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S index 7b75660de12..45c902e7c68 100644 --- a/cpu/mpc8xx/start.S +++ b/cpu/mpc8xx/start.S @@ -39,6 +39,7 @@ */ #include #include +#include #include #define CONFIG_8xx 1 /* needed for Linux kernel header files */ @@ -87,7 +88,7 @@ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c index 2e6a22a94bc..54796449c4b 100644 --- a/cpu/mpc8xx/video.c +++ b/cpu/mpc8xx/video.c @@ -32,7 +32,10 @@ #include #include #include +#ifdef VIDEO_INFO #include +#include +#endif #include #include #include @@ -1174,7 +1177,8 @@ static void *video_logo (void) easylogo_plot (VIDEO_LOGO_ADDR, screen, width, 0, 0); #ifdef VIDEO_INFO - sprintf (info, "%s (%s - %s) ", U_BOOT_VERSION, __DATE__, __TIME__); + sprintf (info, "%s (%s - %s) ", + U_BOOT_VERSION, U_BOOT_DATE, U_BOOT_TIME); video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y, info); sprintf (info, "(C) 2002 DENX Software Engineering"); diff --git a/cpu/nios/start.S b/cpu/nios/start.S index 5d15e8d1dd7..3578a04d51e 100644 --- a/cpu/nios/start.S +++ b/cpu/nios/start.S @@ -23,6 +23,7 @@ #include +#include #include #if !defined(CONFIG_IDENT_STRING) @@ -233,5 +234,5 @@ dly_clks: version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" diff --git a/cpu/nios2/start.S b/cpu/nios2/start.S index ea414356619..31cd5b004a0 100644 --- a/cpu/nios2/start.S +++ b/cpu/nios2/start.S @@ -23,6 +23,7 @@ #include +#include #include /************************************************************************* @@ -212,5 +213,5 @@ dly_clks: version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index e68cf9b6db1..4b5349eadd0 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -63,6 +63,7 @@ */ #include #include +#include #include #define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */ @@ -510,7 +511,7 @@ rsttlb: tlbwe r0,r1,0x0000 /* Invalidate all entries (V=0)*/ .globl version_string version_string: .ascii U_BOOT_VERSION - .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")" .ascii CONFIG_IDENT_STRING, "\0" . = EXC_OFF_SYS_RESET diff --git a/include/.gitignore b/include/.gitignore index ef7dd5fc8a2..44814120229 100644 --- a/include/.gitignore +++ b/include/.gitignore @@ -5,4 +5,5 @@ /bmp_logo.h /config.h /config.mk +/timestamp_autogenerated.h /version_autogenerated.h diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index a147aff4071..34de94797c1 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -799,7 +799,7 @@ typedef unsigned int led_id_t; #define CONFIG_CDP_DEVICE_ID_PREFIX "NP" /* netphone */ #define CONFIG_CDP_PORT_ID "eth%d" #define CONFIG_CDP_CAPABILITIES 0x00000010 -#define CONFIG_CDP_VERSION "u-boot" " " __DATE__ " " __TIME__ +#define CONFIG_CDP_VERSION "u-boot" " " U_BOOT_DATE " " U_BOOT_TIME #define CONFIG_CDP_PLATFORM "Intracom NetPhone" #define CONFIG_CDP_TRIGGER 0x20020001 #define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 63810b3305f..004b3c8a415 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -775,7 +775,7 @@ #define CONFIG_CDP_DEVICE_ID_PREFIX "NT" /* netta */ #define CONFIG_CDP_PORT_ID "eth%d" #define CONFIG_CDP_CAPABILITIES 0x00000010 -#define CONFIG_CDP_VERSION "u-boot 1.0" " " __DATE__ " " __TIME__ +#define CONFIG_CDP_VERSION "u-boot 1.0" " " U_BOOT_DATE " " U_BOOT_TIME #define CONFIG_CDP_PLATFORM "Intracom NetTA" #define CONFIG_CDP_TRIGGER 0x20020001 #define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */ diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index 61c5547c55c..70995faed17 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -750,7 +750,7 @@ typedef unsigned int led_id_t; #define CONFIG_CDP_DEVICE_ID_PREFIX "NT" /* netta2 */ #define CONFIG_CDP_PORT_ID "eth%d" #define CONFIG_CDP_CAPABILITIES 0x00000010 -#define CONFIG_CDP_VERSION "u-boot" " " __DATE__ " " __TIME__ +#define CONFIG_CDP_VERSION "u-boot" " " U_BOOT_DATE " " U_BOOT_TIME #define CONFIG_CDP_PLATFORM "Intracom NetTA2" #define CONFIG_CDP_TRIGGER 0x20020001 #define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */ diff --git a/include/timestamp.h b/include/timestamp.h new file mode 100644 index 00000000000..b2f4cf4d7b4 --- /dev/null +++ b/include/timestamp.h @@ -0,0 +1,30 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __TIMESTAMP_H__ +#define __TIMESTAMP_H__ + +#ifndef DO_DEPS_ONLY +#include "timestamp_autogenerated.h" +#endif + +#endif /* __TIMESTAMP_H__ */ diff --git a/lib_arm/board.c b/lib_arm/board.c index 4ba1f5ee781..2358bebdbde 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -42,6 +42,7 @@ #include #include #include +#include #include #include #include @@ -69,7 +70,7 @@ extern void dataflash_print_info(void); #endif const char version_string[] = - U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")"CONFIG_IDENT_STRING; + U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"CONFIG_IDENT_STRING; #ifdef CONFIG_DRIVER_CS8900 extern void cs8900_get_enetaddr (uchar * addr); diff --git a/lib_avr32/board.c b/lib_avr32/board.c index 8771de90c37..2a98bd41f6d 100644 --- a/lib_avr32/board.c +++ b/lib_avr32/board.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -36,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR; const char version_string[] = - U_BOOT_VERSION " (" __DATE__ " - " __TIME__ ") " CONFIG_IDENT_STRING; + U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME") " CONFIG_IDENT_STRING; unsigned long monitor_flash_len; diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c index e184fd2f2bd..fde4bbe0ff9 100644 --- a/lib_blackfin/board.c +++ b/lib_blackfin/board.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -32,7 +33,7 @@ int post_flag; DECLARE_GLOBAL_DATA_PTR; -const char version_string[] = U_BOOT_VERSION " (" __DATE__ " - " __TIME__ ")"; +const char version_string[] = U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME")"; __attribute__((always_inline)) static inline void serial_early_puts(const char *s) diff --git a/lib_i386/board.c b/lib_i386/board.c index 659f9a243ab..1734f86cdf5 100644 --- a/lib_i386/board.c +++ b/lib_i386/board.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -70,7 +71,7 @@ ulong i386boot_bios_size = (ulong)&_i386boot_bios_size; /* size of BIOS const char version_string[] = - U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")"; + U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"; /* diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c index cd619185b48..250972cb692 100644 --- a/lib_microblaze/board.c +++ b/lib_microblaze/board.c @@ -27,12 +27,13 @@ #include #include #include +#include #include #include DECLARE_GLOBAL_DATA_PTR; -const char version_string[] = U_BOOT_VERSION " (" __DATE__ " - " __TIME__ ")"; +const char version_string[] = U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME")"; #ifdef CONFIG_SYS_GPIO_0 extern int gpio_init (void); diff --git a/lib_mips/board.c b/lib_mips/board.c index 77e1cc8e3c3..9c997f1908f 100644 --- a/lib_mips/board.c +++ b/lib_mips/board.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -53,7 +54,7 @@ extern ulong uboot_end; ulong monitor_flash_len; const char version_string[] = - U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")"; + U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"; static char *failed = "*** failed ***\n"; diff --git a/lib_sh/board.c b/lib_sh/board.c index b6be22ed8cf..d4cc85cad14 100644 --- a/lib_sh/board.c +++ b/lib_sh/board.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -33,7 +34,7 @@ extern int board_init(void); extern int dram_init(void); extern int timer_init(void); -const char version_string[] = U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")"; +const char version_string[] = U_BOOT_VERSION" ("U_BOOT_DATE" - "U_BOOT_TIME")"; unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN; diff --git a/net/net.c b/net/net.c index 77e83b5bd0a..e9754e47b8f 100644 --- a/net/net.c +++ b/net/net.c @@ -89,6 +89,9 @@ #if defined(CONFIG_CMD_SNTP) #include "sntp.h" #endif +#if defined(CONFIG_CDP_VERSION) +#include +#endif #if defined(CONFIG_CMD_NET) -- cgit v1.3.1 From e9084b23d16102f44ace24379a1c0c352497ef80 Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Mon, 3 Nov 2008 22:14:36 +0100 Subject: Add vxworks.h to handle CONFIG_SYS_VXWORKS parameters Signed-off-by: Niklaus Giger --- include/vxworks.h | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 include/vxworks.h (limited to 'include') diff --git a/include/vxworks.h b/include/vxworks.h new file mode 100644 index 00000000000..548e8e851e8 --- /dev/null +++ b/include/vxworks.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2008 + * Niklaus Giger, niklaus.giger@member.fsf.org + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _VXWORKS_H_ +#define _VXWORKS_H_ + +int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + +/* + * Use bootaddr to find the location in memory that VxWorks + * will look for the bootline string. The default value for + * PowerPC is LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET which + * defaults to 0x4200 + */ +#ifndef CONFIG_SYS_VXWORKS_BOOT_ADDR +#define CONFIG_SYS_VXWORKS_BOOT_ADDR 0x4200 +#endif + +#ifndef CONFIG_SYS_VXWORKS_BOOT_DEVICE +#if defined(CONFIG_4xx) +#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "emac(0,0)" +#elif defined(CONFIG_IOP480) +#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "dc(0,0)" +#else +#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "eth(0,0)" +#endif +#endif + +#ifndef CONFIG_SYS_VXWORKS_SERVERNAME +#define CONFIG_SYS_VXWORKS_SERVERNAME srv +#endif + +#endif -- cgit v1.3.1 From b03150b52e3c491a86a3cc0945274f0e8f9872e7 Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Mon, 3 Nov 2008 22:16:18 +0100 Subject: Use new CONFIG_SYS_VXWORKS parameters for Netstal boards Signed-off-by: Niklaus Giger --- include/configs/netstal-common.h | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/include/configs/netstal-common.h b/include/configs/netstal-common.h index 0a757943e8b..4d5c1ab3435 100644 --- a/include/configs/netstal-common.h +++ b/include/configs/netstal-common.h @@ -202,8 +202,9 @@ #define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_SYS_TFTP_LOADADDR 0x01000000 - +#define CONFIG_SYS_TFTP_LOADADDR 0x01000000 +#define CONFIG_SYS_VXWORKS_ADD_PARAMS "u=dpu pw=netstal8752" +#define CONFIG_SYS_VXWORKS_SERVERNAME "c" /* * General common environment variables shared by all boards produced by Netstal Maschinen */ @@ -223,19 +224,17 @@ "fdt_addr_r=800000\0" \ "hostname=" xstr(CONFIG_HOSTNAME) "\0" \ "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ - "load=tftp 200000 " xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ - "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \ - "era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \ - "cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize};" \ - "setenv filesize\0" \ - "upd=run load update\0" \ - "vx_rom=" xstr(CONFIG_HOSTNAME) "/" \ - xstr(CONFIG_HOSTNAME) "_vx_rom\0" \ - "vx=tftp " xstr(CONFIG_SYS_TFTP_LOADADDR) " ${vx_rom};run vxargs;" \ - "bootvx\0" \ - "vxargs=setenv bootargs emac(0,0)c:${vx_rom} e=${ipaddr}" \ - " h=${serverip} u=dpu pw=netstal8752 " \ - "tn=" xstr(CONFIG_HOSTNAME) " f=0x3008\0" \ + "uload=tftp " xstr(CONFIG_SYS_TFTP_LOADADDR) " " \ + xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ + "vx_rom=" xstr(CONFIG_HOSTNAME) "/" \ + xstr(CONFIG_HOSTNAME) "_vx_rom\0" \ + "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;"\ + "era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \ + "cp.b ${fileaddr} "xstr(CONFIG_SYS_MONITOR_BASE) \ + " ${filesize}; setenv filesize\0" \ + "upd=run uload update\0" \ + "vx=setenv bootfile ${vx_rom}; tftp " \ + xstr(CONFIG_SYS_TFTP_LOADADDR) "; bootvx\0" \ CONFIG_NETSTAL_DEF_ENV_ROOTPATH /* -- cgit v1.3.1 From 16a28ef219c27423a1ef502f19070c4d375079b8 Mon Sep 17 00:00:00 2001 From: Gary Jennejohn Date: Thu, 6 Nov 2008 15:04:23 +0100 Subject: IOMUX: Add console multiplexing support. Modifications to support console multiplexing. This is controlled using CONFIG_SYS_CONSOLE_MUX in the board configuration file. This allows a user to specify multiple console devices in the environment with a command like this: setenv stdin serial,nc. As a result, the user can enter text on both the serial and netconsole interfaces. All devices - stdin, stdout and stderr - can be set in this manner. 1) common/iomux.c and include/iomux.h contain the environment setting implementation. 2) doc/README.iomux contains a somewhat more detailed description. 3) The implementation in (1) is called from common/cmd_nvedit.c to handle setenv and from common/console.c to handle initialization of input/output devices at boot time. 4) common/console.c also contains the code needed to poll multiple console devices for input and send output to all devices registered for output. 5) include/common.h includes iomux.h and common/Makefile generates iomux.o when CONFIG_SYS_CONSOLE_MUX is set. Signed-off-by: Gary Jennejohn --- common/Makefile | 1 + common/cmd_nvedit.c | 6 ++ common/console.c | 156 +++++++++++++++++++++++++++++++++++++++++++++- common/iomux.c | 175 ++++++++++++++++++++++++++++++++++++++++++++++++++++ doc/README.iomux | 106 +++++++++++++++++++++++++++++++ include/common.h | 7 +++ include/iomux.h | 48 ++++++++++++++ 7 files changed, 498 insertions(+), 1 deletion(-) create mode 100644 common/iomux.c create mode 100644 doc/README.iomux create mode 100644 include/iomux.h (limited to 'include') diff --git a/common/Makefile b/common/Makefile index 596fef3b0b4..93e39630796 100644 --- a/common/Makefile +++ b/common/Makefile @@ -142,6 +142,7 @@ COBJS-$(CONFIG_VFD) += cmd_vfd.o # others COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o COBJS-$(CONFIG_CMD_DOC) += docecc.o +COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o COBJS-y += flash.o COBJS-y += kgdb.o COBJS-$(CONFIG_LCD) += lcd.o diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index d280cb02c47..85025daec7a 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -213,6 +213,11 @@ int _do_setenv (int flag, int argc, char *argv[]) return 1; } +#ifdef CONFIG_CONSOLE_MUX + i = iomux_doenv(console, argv[2]); + if (i) + return i; +#else /* Try assigning specified device */ if (console_assign (console, argv[2]) < 0) return 1; @@ -221,6 +226,7 @@ int _do_setenv (int flag, int argc, char *argv[]) if (serial_assign (argv[2]) < 0) return 1; #endif +#endif /* CONFIG_CONSOLE_MUX */ } /* diff --git a/common/console.c b/common/console.c index 6f0846f5ee5..89aeab69e52 100644 --- a/common/console.c +++ b/common/console.c @@ -93,6 +93,76 @@ static int console_setfile (int file, device_t * dev) return error; } +#if defined(CONFIG_CONSOLE_MUX) +/** Console I/O multiplexing *******************************************/ + +static device_t *tstcdev; +device_t **console_devices[MAX_FILES]; +int cd_count[MAX_FILES]; + +/* + * This depends on tstc() always being called before getc(). + * This is guaranteed to be true because this routine is called + * only from fgetc() which assures it. + * No attempt is made to demultiplex multiple input sources. + */ +static int iomux_getc(void) +{ + unsigned char ret; + + /* This is never called with testcdev == NULL */ + ret = tstcdev->getc(); + tstcdev = NULL; + return ret; +} + +static int iomux_tstc(int file) +{ + int i, ret; + device_t *dev; + + disable_ctrlc(1); + for (i = 0; i < cd_count[file]; i++) { + dev = console_devices[file][i]; + if (dev->tstc != NULL) { + ret = dev->tstc(); + if (ret > 0) { + tstcdev = dev; + disable_ctrlc(0); + return ret; + } + } + } + disable_ctrlc(0); + + return 0; +} + +static void iomux_putc(int file, const char c) +{ + int i; + device_t *dev; + + for (i = 0; i < cd_count[file]; i++) { + dev = console_devices[file][i]; + if (dev->putc != NULL) + dev->putc(c); + } +} + +static void iomux_puts(int file, const char *s) +{ + int i; + device_t *dev; + + for (i = 0; i < cd_count[file]; i++) { + dev = console_devices[file][i]; + if (dev->puts != NULL) + dev->puts(s); + } +} +#endif /* defined(CONFIG_CONSOLE_MUX) */ + /** U-Boot INITIAL CONSOLE-NOT COMPATIBLE FUNCTIONS *************************/ void serial_printf (const char *fmt, ...) @@ -114,8 +184,31 @@ void serial_printf (const char *fmt, ...) int fgetc (int file) { - if (file < MAX_FILES) + if (file < MAX_FILES) { +#if defined(CONFIG_CONSOLE_MUX) + /* + * Effectively poll for input wherever it may be available. + */ + for (;;) { + /* + * Upper layer may have already called tstc() so + * check for that first. + */ + if (tstcdev != NULL) + return iomux_getc(); + iomux_tstc(file); +#ifdef CONFIG_WATCHDOG + /* + * If the watchdog must be rate-limited then it should + * already be handled in board-specific code. + */ + udelay(1); +#endif + } +#else return stdio_devices[file]->getc (); +#endif + } return -1; } @@ -123,7 +216,11 @@ int fgetc (int file) int ftstc (int file) { if (file < MAX_FILES) +#if defined(CONFIG_CONSOLE_MUX) + return iomux_tstc(file); +#else return stdio_devices[file]->tstc (); +#endif return -1; } @@ -131,13 +228,21 @@ int ftstc (int file) void fputc (int file, const char c) { if (file < MAX_FILES) +#if defined(CONFIG_CONSOLE_MUX) + iomux_putc(file, c); +#else stdio_devices[file]->putc (c); +#endif } void fputs (int file, const char *s) { if (file < MAX_FILES) +#if defined(CONFIG_CONSOLE_MUX) + iomux_puts(file, s); +#else stdio_devices[file]->puts (s); +#endif } void fprintf (int file, const char *fmt, ...) @@ -407,6 +512,9 @@ int console_init_r (void) #ifdef CONFIG_SYS_CONSOLE_ENV_OVERWRITE int i; #endif /* CONFIG_SYS_CONSOLE_ENV_OVERWRITE */ +#ifdef CONFIG_CONSOLE_MUX + int iomux_err = 0; +#endif /* set default handlers at first */ gd->jt[XF_getc] = serial_getc; @@ -425,6 +533,14 @@ int console_init_r (void) inputdev = search_device (DEV_FLAGS_INPUT, stdinname); outputdev = search_device (DEV_FLAGS_OUTPUT, stdoutname); errdev = search_device (DEV_FLAGS_OUTPUT, stderrname); +#ifdef CONFIG_CONSOLE_MUX + iomux_err = iomux_doenv(stdin, stdinname); + iomux_err += iomux_doenv(stdout, stdoutname); + iomux_err += iomux_doenv(stderr, stderrname); + if (!iomux_err) + /* Successful, so skip all the code below. */ + goto done; +#endif } /* if the devices are overwritten or not found, use default device */ if (inputdev == NULL) { @@ -438,15 +554,34 @@ int console_init_r (void) } /* Initializes output console first */ if (outputdev != NULL) { +#ifdef CONFIG_CONSOLE_MUX + /* need to set a console if not done above. */ + iomux_doenv(stdout, outputdev->name); +#else console_setfile (stdout, outputdev); +#endif } if (errdev != NULL) { +#ifdef CONFIG_CONSOLE_MUX + /* need to set a console if not done above. */ + iomux_doenv(stderr, errdev->name); +#else console_setfile (stderr, errdev); +#endif } if (inputdev != NULL) { +#ifdef CONFIG_CONSOLE_MUX + /* need to set a console if not done above. */ + iomux_doenv(stdin, inputdev->name); +#else console_setfile (stdin, inputdev); +#endif } +#ifdef CONFIG_CONSOLE_MUX +done: +#endif + gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */ #ifndef CONFIG_SYS_CONSOLE_INFO_QUIET @@ -455,21 +590,33 @@ int console_init_r (void) if (stdio_devices[stdin] == NULL) { puts ("No input devices available!\n"); } else { +#ifdef CONFIG_CONSOLE_MUX + iomux_printdevs(stdin); +#else printf ("%s\n", stdio_devices[stdin]->name); +#endif } puts ("Out: "); if (stdio_devices[stdout] == NULL) { puts ("No output devices available!\n"); } else { +#ifdef CONFIG_CONSOLE_MUX + iomux_printdevs(stdout); +#else printf ("%s\n", stdio_devices[stdout]->name); +#endif } puts ("Err: "); if (stdio_devices[stderr] == NULL) { puts ("No error devices available!\n"); } else { +#ifdef CONFIG_CONSOLE_MUX + iomux_printdevs(stderr); +#else printf ("%s\n", stdio_devices[stderr]->name); +#endif } #endif /* CONFIG_SYS_CONSOLE_INFO_QUIET */ @@ -524,11 +671,18 @@ int console_init_r (void) if (outputdev != NULL) { console_setfile (stdout, outputdev); console_setfile (stderr, outputdev); +#ifdef CONFIG_CONSOLE_MUX + console_devices[stdout][0] = outputdev; + console_devices[stderr][0] = outputdev; +#endif } /* Initializes input console */ if (inputdev != NULL) { console_setfile (stdin, inputdev); +#ifdef CONFIG_CONSOLE_MUX + console_devices[stdin][0] = inputdev; +#endif } gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */ diff --git a/common/iomux.c b/common/iomux.c new file mode 100644 index 00000000000..bdcc853ff07 --- /dev/null +++ b/common/iomux.c @@ -0,0 +1,175 @@ +/* + * (C) Copyright 2008 + * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +#ifdef CONFIG_CONSOLE_MUX +void iomux_printdevs(const int console) +{ + int i; + device_t *dev; + + for (i = 0; i < cd_count[console]; i++) { + dev = console_devices[console][i]; + printf("%s ", dev->name); + } + printf("\n"); +} + +/* This tries to preserve the old list if an error occurs. */ +int iomux_doenv(const int console, const char *arg) +{ + char *console_args, *temp, **start; + int i, j, k, io_flag, cs_idx, repeat; + device_t *dev; + device_t **cons_set; + + console_args = strdup(arg); + if (console_args == NULL) + return 1; + /* + * Check whether a comma separated list of devices was + * entered and count how many devices were entered. + * The array start[] has pointers to the beginning of + * each device name (up to MAX_CONSARGS devices). + * + * Have to do this twice - once to count the number of + * commas and then again to populate start. + */ + i = 0; + temp = console_args; + for (;;) { + temp = strchr(temp, ','); + if (temp != NULL) { + i++; + temp++; + continue; + } + /* There's always one entry more than the number of commas. */ + i++; + break; + } + start = (char **)malloc(i * sizeof(char *)); + if (start == NULL) { + free(console_args); + return 1; + } + i = 0; + start[0] = console_args; + for (;;) { + temp = strchr(start[i++], ','); + if (temp == NULL) + break; + *temp = '\0'; + start[i] = temp + 1; + } + cons_set = (device_t **)calloc(i, sizeof(device_t *)); + if (cons_set == NULL) { + free(start); + free(console_args); + return 1; + } + + switch (console) { + case stdin: + io_flag = DEV_FLAGS_INPUT; + break; + case stdout: + case stderr: + io_flag = DEV_FLAGS_OUTPUT; + break; + default: + free(start); + free(console_args); + free(cons_set); + return 1; + } + + cs_idx = 0; + for (j = 0; j < i; j++) { + /* + * Check whether the device exists and is valid. + * console_assign() also calls search_device(), + * but I need the pointer to the device. + */ + dev = search_device(io_flag, start[j]); + if (dev == NULL) + continue; + /* + * Prevent multiple entries for a device. + */ + repeat = 0; + for (k = 0; k < cs_idx; k++) { + if (dev == cons_set[k]) { + repeat++; + break; + } + } + if (repeat) + continue; + /* + * Try assigning the specified device. + * This could screw up the console settings for apps. + */ + if (console_assign(console, start[j]) < 0) + continue; +#ifdef CONFIG_SERIAL_MULTI + /* + * This was taken from common/cmd_nvedit.c. + * This will never work because serial_assign() returns + * 1 upon error, not -1. + * This would almost always return an error anyway because + * serial_assign() expects the name of a serial device, like + * serial_smc, but the user generally only wants to set serial. + */ + if (serial_assign(start[j]) < 0) + continue; +#endif + cons_set[cs_idx++] = dev; + } + free(console_args); + free(start); + /* failed to set any console */ + if (cs_idx == 0) { + free(cons_set); + return 1; + } else { + /* Works even if console_devices[console] is NULL. */ + console_devices[console] = + (device_t **)realloc(console_devices[console], + cs_idx * sizeof(device_t *)); + if (console_devices[console] == NULL) { + free(cons_set); + return 1; + } + memcpy(console_devices[console], cons_set, cs_idx * + sizeof(device_t *)); + + cd_count[console] = cs_idx; + } + free(cons_set); + return 0; +} +#endif /* CONFIG_CONSOLE_MUX */ diff --git a/doc/README.iomux b/doc/README.iomux new file mode 100644 index 00000000000..5b82a866726 --- /dev/null +++ b/doc/README.iomux @@ -0,0 +1,106 @@ +/* + * (C) Copyright 2008 + * Gary Jennejohn, DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +U-Boot console multiplexing +=========================== + +HOW CONSOLE MULTIPLEXING WORKS +------------------------------ + +This functionality is controlled with CONFIG_CONSOLE_MUX in the board +configuration file. + +Two new files, common/iomux.c and include/iomux.h, contain the heart +(iomux_doenv()) of the environment setting implementation. + +iomux_doenv() is called in common/cmd_nvedit.c to handle setenv and in +common/console.c in console_init_r() during bootup to initialize +stdio_devices[]. + +A user can use a comma-separated list of devices to set stdin, stdout +and stderr. For example: "setenv stdin serial,nc". NOTE: No spaces +are allowed around the comma(s)! + +The length of the list is limited by malloc(), since the array used +is allocated and freed dynamically. + +It should be possible to specify any device which console_assign() +finds acceptable, but the code has only been tested with serial and +nc. + +iomux_doenv() prevents multiple use of the same device, e.g. "setenv +stdin nc,nc,serial" will discard the second nc. iomux_doenv() is +not able to modify the environment, however, so that "pri stdin" still +shows "nc,nc,serial". + +The major change in common/console.c was to modify fgetc() to call +the iomux_tstc() routine in a for-loop. iomux_tstc() in turn calls +the tstc() routine for every registered device, but exits immediately +when one of them returns true. fgetc() then calls iomux_getc(), +which calls the corresponding getc() routine. fgetc() hangs in +the for-loop until iomux_tstc() returns true and the input can be +retrieved. + +Thus, a user can type into any device registered for stdin. No effort +has been made to demulitplex simultaneous input from multiple stdin +devices. + +fputc() and fputs() have been modified to call iomux_putc() and +iomux_puts() respectively, which call the corresponding output +routines for every registered device. + +Thus, a user can see the ouput for any device registered for stdout +or stderr on all devices registered for stdout or stderr. As an +example, if stdin=serial,nc and stdout=serial,nc then all output +for serial, e.g. echos of input on serial, will appear on serial and nc. + +Just as with the old console code, this statement is still true: +If not defined in the environment, the first input device is assigned +to the 'stdin' file, the first output one to 'stdout' and 'stderr'. + +If CONFIG_SYS_CONSOLE_IS_IN_ENV is defined then multiple input/output +devices can be set at boot time if defined in the environment. + +CAVEATS +------- + +Note that common/iomux.c calls console_assign() for every registered +device as it is discovered. This means that the environment settings +for application consoles will be set to the last device in the list. + +On a slow machine, such as MPC852T clocked at 66MHz, the overhead associated +with calling tstc() and then getc() means that copy&paste will normally not +work, even when stdin=stdout=stderr=serial. +On a faster machine, such as a sequoia, cut&paste of longer (about 80 +characters) lines works fine when serial is the only device used. + +Using nc as a stdin device results in even more overhead because nc_tstc() +is quite slow. Even on a sequoia cut&paste does not work on the serial +interface when nc is added to stdin, although there is no character loss using +the ethernet interface for input. In this test case stdin=serial,nc and +stdout=serial. + +In addition, the overhead associated with sending to two devices, when one of +them is nc, also causes problems. Even on a sequoia cut&paste does not work +on the serial interface (stdin=serial) when nc is added to stdout (stdout= +serial,nc). diff --git a/include/common.h b/include/common.h index df64bf0f419..5968036a05e 100644 --- a/include/common.h +++ b/include/common.h @@ -678,6 +678,13 @@ void fputc(int file, const char c); int ftstc(int file); int fgetc(int file); +/* + * CONSOLE multiplexing. + */ +#ifdef CONFIG_CONSOLE_MUX +#include +#endif + int pcmcia_init (void); #ifdef CONFIG_STATUS_LED diff --git a/include/iomux.h b/include/iomux.h new file mode 100644 index 00000000000..257c1f76127 --- /dev/null +++ b/include/iomux.h @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2008 + * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + *This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _IO_MUX_H +#define _IO_MUX_H + +#include + +/* + * Stuff required to support console multiplexing. + */ + +/* + * Pointers to devices used for each file type. Defined in console.c + * but storage is allocated in iomux.c. + */ +extern device_t **console_devices[MAX_FILES]; +/* + * The count of devices assigned to each FILE. Defined in console.c + * and populated in iomux.c. + */ +extern int cd_count[MAX_FILES]; + +int iomux_doenv(const int, const char *); +void iomux_printdevs(const int); +device_t *search_device(int, char *); + +#endif /* _IO_MUX_H */ -- cgit v1.3.1 From 268405fa7c44156c5192a70779920c70906af8d6 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 9 Dec 2008 00:24:30 +0100 Subject: vxworks.h: Fix build problem introduced by commits 29a4c24d/e9084b23 Signed-off-by: Wolfgang Denk --- include/vxworks.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/vxworks.h b/include/vxworks.h index 548e8e851e8..1633904bd85 100644 --- a/include/vxworks.h +++ b/include/vxworks.h @@ -47,7 +47,7 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); #endif #ifndef CONFIG_SYS_VXWORKS_SERVERNAME -#define CONFIG_SYS_VXWORKS_SERVERNAME srv +#define CONFIG_SYS_VXWORKS_SERVERNAME "srv" #endif #endif -- cgit v1.3.1 From 2ee951ba2ac9874d2a93d52e7a187d3184be937e Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 27 Nov 2008 14:07:09 +0100 Subject: UBI: Enable re-initializing of the "ubi part" command With this patch now, the user can call "ubi part" multiple times to re-connect the UBI device to another MTD partition. Signed-off-by: Stefan Roese --- common/cmd_ubi.c | 11 +++++++++++ drivers/mtd/ubi/build.c | 1 + include/ubi_uboot.h | 1 + 3 files changed, 13 insertions(+) (limited to 'include') diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c index 84467658783..495d71ec0a1 100644 --- a/common/cmd_ubi.c +++ b/common/cmd_ubi.c @@ -31,6 +31,7 @@ /* Private own data */ static struct ubi_device *ubi; static char buffer[80]; +static int ubi_initialized; struct selected_dev { char dev_name[32]; /* NAND/OneNAND etc */ @@ -428,6 +429,8 @@ static int ubi_dev_scan(struct mtd_info *info, char *ubidev) return err; } + ubi_initialized = 1; + return 0; } @@ -463,6 +466,14 @@ static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) /* todo: get dev number for NAND... */ ubi_dev.nr = 0; + /* + * Call ubi_exit() before re-initializing the UBI subsystem + */ + if (ubi_initialized) { + ubi_exit(); + del_mtd_partitions(ubi_dev.mtd_info); + } + /* * Check for nand|onenand selection */ diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index 17cabb2ae99..bdf75c98a16 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -1059,6 +1059,7 @@ void __exit ubi_exit(void) misc_deregister(&ubi_ctrl_cdev); class_remove_file(ubi_class, &ubi_version); class_destroy(ubi_class); + mtd_devs = 0; } module_exit(ubi_exit); diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 295f2c0ffc8..095dfc1b206 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -211,6 +211,7 @@ static inline long IS_ERR(const void *ptr) /* functions */ extern int ubi_mtd_param_parse(const char *val, struct kernel_param *kp); extern int ubi_init(void); +extern void ubi_exit(void); extern struct ubi_device *ubi_devices[]; -- cgit v1.3.1 From dedacc18a8c2b3951581eb721fa055a4e0ac4845 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 7 Dec 2008 09:45:35 +0100 Subject: usbtty/omap: update to current API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Remy Böhmer --- drivers/serial/usbtty.c | 6 ++---- drivers/serial/usbtty.h | 31 +++++++++++++++++++++---------- drivers/usb/usbdcore_omap1510.c | 4 +++- include/usbdcore_omap1510.h | 6 +++--- 4 files changed, 29 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index e738c562714..7eba470e496 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -22,16 +22,14 @@ */ #include - +#include #include #include #include "usbtty.h" #include "usb_cdc_acm.h" #include "usbdescriptors.h" -#include /* If defined, override Linux identifiers with - * vendor specific ones */ -#if 0 +#ifdef DEBUG #define TTYDBG(fmt,args...)\ serial_printf("[%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args) #else diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h index 71c47bc5d98..ecefde54920 100644 --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -24,11 +24,11 @@ #ifndef __USB_TTY_H__ #define __USB_TTY_H__ -#include "usbdcore.h" +#include #if defined(CONFIG_PPC) -#include "usbdcore_mpc8xx.h" +#include #elif defined(CONFIG_ARM) -#include "usbdcore_omap1510.h" +#include #endif #include @@ -36,14 +36,25 @@ /* If no VendorID/ProductID is defined in config.h, pretend to be Linux * DO NOT Reuse this Vendor/Product setup with protocol incompatible devices */ -#define CONFIG_USBD_VENDORID 0x0525 /* Linux/NetChip */ -#define CONFIG_USBD_PRODUCTID_GSERIAL 0xa4a6 /* gserial */ -#define CONFIG_USBD_PRODUCTID_CDCACM 0xa4a7 /* CDC ACM */ -#define CONFIG_USBD_MANUFACTURER "Das U-Boot" -#define CONFIG_USBD_PRODUCT_NAME U_BOOT_VERSION - +#ifndef CONFIG_USBD_VENDORID +#define CONFIG_USBD_VENDORID 0x0525 /* Linux/NetChip */ +#endif +#ifndef CONFIG_USBD_PRODUCTID_GSERIAL +#define CONFIG_USBD_PRODUCTID_GSERIAL 0xa4a6 /* gserial */ +#endif +#ifndef CONFIG_USBD_PRODUCTID_CDCACM +#define CONFIG_USBD_PRODUCTID_CDCACM 0xa4a7 /* CDC ACM */ +#endif +#ifndef CONFIG_USBD_MANUFACTURER +#define CONFIG_USBD_MANUFACTURER "Das U-Boot" +#endif +#ifndef CONFIG_USBD_PRODUCT_NAME +#define CONFIG_USBD_PRODUCT_NAME U_BOOT_VERSION +#endif -#define CONFIG_USBD_CONFIGURATION_STR "TTY via USB" +#ifndef CONFIG_USBD_CONFIGURATION_STR +#define CONFIG_USBD_CONFIGURATION_STR "TTY via USB" +#endif #define CONFIG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT #define CONFIG_USBD_SERIAL_OUT_PKTSIZE UDC_OUT_PACKET_SIZE diff --git a/drivers/usb/usbdcore_omap1510.c b/drivers/usb/usbdcore_omap1510.c index cb9dc442e7b..6b7b61b3216 100644 --- a/drivers/usb/usbdcore_omap1510.c +++ b/drivers/usb/usbdcore_omap1510.c @@ -1061,7 +1061,7 @@ void omap1510_udc_noniso_irq (void) */ /* Called to start packet transmission. */ -void udc_endpoint_write (struct usb_endpoint_instance *endpoint) +int udc_endpoint_write (struct usb_endpoint_instance *endpoint) { unsigned short epnum = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK; @@ -1078,6 +1078,8 @@ void udc_endpoint_write (struct usb_endpoint_instance *endpoint) /* deselect the endpoint FIFO */ outw (UDC_EP_Dir | epnum, UDC_EP_NUM); } + + return 0; } /* Start to initialize h/w stuff */ diff --git a/include/usbdcore_omap1510.h b/include/usbdcore_omap1510.h index 526fcd920db..ece0e95b61d 100644 --- a/include/usbdcore_omap1510.h +++ b/include/usbdcore_omap1510.h @@ -168,8 +168,8 @@ #define UDC_IN_ENDPOINT 1 #define UDC_IN_PACKET_SIZE 64 #define UDC_INT_ENDPOINT 5 -#define UDC_INT_PKTSIZE 16 -#define UDC_BULK_PKTSIZE 16 +#define UDC_INT_PACKET_SIZE 16 +#define UDC_BULK_PACKET_SIZE 16 void udc_irq (void); /* Flow control */ @@ -177,7 +177,7 @@ void udc_set_nak(int epid); void udc_unset_nak (int epid); /* Higher level functions for abstracting away from specific device */ -void udc_endpoint_write(struct usb_endpoint_instance *endpoint); +int udc_endpoint_write(struct usb_endpoint_instance *endpoint); int udc_init (void); -- cgit v1.3.1 From d2776827315c3d469b8cb4cec14d58877798daa2 Mon Sep 17 00:00:00 2001 From: Stefan Althoefer Date: Sun, 7 Dec 2008 19:39:11 +0100 Subject: USB: descriptor handling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi, I found a bug when working with the u-boot USB subsystem on IXP425 processor (big endian Xscale aka ARMv5). I recognized that the second usb_endpoint_descriptor of the attached memory stick was corrupted. The reason for this are the packed structures below (either u-boot and u-boot-usb): -------------- /* Endpoint descriptor */ struct usb_endpoint_descriptor { unsigned char bLength; unsigned char bDescriptorType; unsigned char bEndpointAddress; unsigned char bmAttributes; unsigned short wMaxPacketSize; unsigned char bInterval; unsigned char bRefresh; unsigned char bSynchAddress; } __attribute__ ((packed)); /* Interface descriptor */ struct usb_interface_descriptor { unsigned char bLength; unsigned char bDescriptorType; unsigned char bInterfaceNumber; unsigned char bAlternateSetting; unsigned char bNumEndpoints; unsigned char bInterfaceClass; unsigned char bInterfaceSubClass; unsigned char bInterfaceProtocol; unsigned char iInterface; unsigned char no_of_ep; unsigned char num_altsetting; unsigned char act_altsetting; struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; } __attribute__ ((packed)); ------------ As usb_endpoint_descriptor is only 7byte in length, the start of all odd ep_desc[] structures is not word aligned. This makes wMaxPacketSize of these structures also not word aligned. ARMv5 Architecture however does not support non-aligned multibyte data type (see A2.8 of ARM Architecture Reference Manual). Signed-off-by: Stefan Althoefer Signed-off-by: Remy Böhmer --- include/usb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/usb.h b/include/usb.h index 84a77b2f8ba..510df95d628 100644 --- a/include/usb.h +++ b/include/usb.h @@ -91,7 +91,7 @@ struct usb_endpoint_descriptor { unsigned char bInterval; unsigned char bRefresh; unsigned char bSynchAddress; -} __attribute__ ((packed)); +} __attribute__ ((packed)) __attribute__ ((aligned(2))); /* Interface descriptor */ struct usb_interface_descriptor { -- cgit v1.3.1 From e0b5532579eda8b4629f1b4f6e49c3cc60f52237 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Thu, 13 Nov 2008 19:49:32 +0300 Subject: jffs2: add sector_size field to part_info structure This patch adds sector_size field to part_info structure (used by new JFFS2 code). Signed-off-by: Ilya Yanok --- common/cmd_jffs2.c | 20 +++++++++++++++++--- include/jffs2/load_kernel.h | 1 + 2 files changed, 18 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index c2caade8457..7866c808dd4 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -339,11 +339,15 @@ static int part_validate_nor(struct mtdids *id, struct part_info *part) extern flash_info_t flash_info[]; flash_info_t *flash; int offset_aligned; - u32 end_offset; + u32 end_offset, sector_size = 0; int i; flash = &flash_info[id->num]; + /* size of last sector */ + part->sector_size = flash->size - + (flash->start[flash->sector_count-1] - flash->start[0]); + offset_aligned = 0; for (i = 0; i < flash->sector_count; i++) { if ((flash->start[i] - flash->start[0]) == part->offset) { @@ -358,12 +362,18 @@ static int part_validate_nor(struct mtdids *id, struct part_info *part) } end_offset = part->offset + part->size; + offset_aligned = 0; for (i = 0; i < flash->sector_count; i++) { + if (i) { + sector_size = flash->start[i] - flash->start[i-1]; + if (part->sector_size < sector_size) + part->sector_size = sector_size; + } if ((flash->start[i] - flash->start[0]) == end_offset) - return 0; + offset_aligned = 1; } - if (flash->size == end_offset) + if (offset_aligned || flash->size == end_offset) return 0; printf("%s%d: partition (%s) size alignment incorrect\n", @@ -389,6 +399,8 @@ static int part_validate_nand(struct mtdids *id, struct part_info *part) nand = &nand_info[id->num]; + part->sector_size = nand->erasesize; + if ((unsigned long)(part->offset) % nand->erasesize) { printf("%s%d: partition (%s) start offset alignment incorrect\n", MTD_DEV_TYPE(id->type), id->num, part->name); @@ -424,6 +436,8 @@ static int part_validate_onenand(struct mtdids *id, struct part_info *part) mtd = &onenand_mtd; + part->sector_size = mtd->erasesize; + if ((unsigned long)(part->offset) % mtd->erasesize) { printf("%s%d: partition (%s) start offset" "alignment incorrect\n", diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h index e9b7d6e7c9d..8b2720e951a 100644 --- a/include/jffs2/load_kernel.h +++ b/include/jffs2/load_kernel.h @@ -50,6 +50,7 @@ struct part_info { u32 offset; /* offset within device */ void *jffs2_priv; /* used internaly by jffs2 */ u32 mask_flags; /* kernel MTD mask flags */ + u32 sector_size; /* size of sector */ struct mtd_device *dev; /* parent device */ }; -- cgit v1.3.1 From 9b7076229ec6a958bd835ab70745f7676297ce82 Mon Sep 17 00:00:00 2001 From: Ilya Yanok Date: Thu, 13 Nov 2008 19:49:35 +0300 Subject: jffs2: summary support This patch adds support for reading fs information from summary node instead of scanning full eraseblock. Signed-off-by: Ilya Yanok --- fs/jffs2/jffs2_1pass.c | 187 ++++++++++++++++++++++++++++++++++++++++++++++++- fs/jffs2/summary.h | 163 ++++++++++++++++++++++++++++++++++++++++++ include/jffs2/jffs2.h | 19 +++++ 3 files changed, 368 insertions(+), 1 deletion(-) create mode 100644 fs/jffs2/summary.h (limited to 'include') diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 73d3ddc9e13..4e49a056694 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -138,6 +138,8 @@ # define DEBUGF(fmt,args...) #endif +#include "summary.h" + /* keeps pointer to currentlu processed partition */ static struct part_info *current_part; @@ -1214,6 +1216,132 @@ jffs2_1pass_rescan_needed(struct part_info *part) return 0; } +#define dbg_summary(...) do {} while (0); +/* Process the stored summary information - helper function for + * jffs2_sum_scan_sumnode() + */ + +static int jffs2_sum_process_sum_data(struct part_info *part, uint32_t offset, + struct jffs2_raw_summary *summary, + struct b_lists *pL) +{ + void *sp; + int i; + + sp = summary->sum; + + for (i = 0; i < summary->sum_num; i++) { + dbg_summary("processing summary index %d\n", i); + + switch (((struct jffs2_sum_unknown_flash *)sp)->nodetype) { + case JFFS2_NODETYPE_INODE: { + struct jffs2_sum_inode_flash *spi; + spi = sp; + + dbg_summary("Inode at 0x%08x-0x%08x\n", + offset + spi->offset, + offset + spi->offset + spi->totlen); + + if (insert_node(&pL->frag, (u32) part->offset + + offset + spi->offset) == NULL) + return -1; + + sp += JFFS2_SUMMARY_INODE_SIZE; + + break; + } + + case JFFS2_NODETYPE_DIRENT: { + struct jffs2_sum_dirent_flash *spd; + spd = sp; + + dbg_summary("Dirent at 0x%08x-0x%08x\n", + offset + spd->offset, + offset + spd->offset + spd->totlen); + + if (insert_node(&pL->dir, (u32) part->offset + + offset + spd->offset) == NULL) + return -1; + + sp += JFFS2_SUMMARY_DIRENT_SIZE(spd->nsize); + + break; + } + default : { + uint16_t nodetype = + ((struct jffs2_sum_unknown_flash *) + sp)->nodetype; + printf("Unsupported node type %x found in " + "summary!\n", nodetype); + break; + } + } + } + return 0; +} + +/* Process the summary node - called from jffs2_scan_eraseblock() */ +int jffs2_sum_scan_sumnode(struct part_info *part, uint32_t offset, + struct jffs2_raw_summary *summary, uint32_t sumsize, + struct b_lists *pL) +{ + struct jffs2_unknown_node crcnode; + int ret, ofs; + uint32_t crc; + + ofs = part->sector_size - sumsize; + + dbg_summary("summary found for 0x%08x at 0x%08x (0x%x bytes)\n", + offset, offset + ofs, sumsize); + + /* OK, now check for node validity and CRC */ + crcnode.magic = JFFS2_MAGIC_BITMASK; + crcnode.nodetype = JFFS2_NODETYPE_SUMMARY; + crcnode.totlen = summary->totlen; + crc = crc32_no_comp(0, (uchar *)&crcnode, sizeof(crcnode)-4); + + if (summary->hdr_crc != crc) { + dbg_summary("Summary node header is corrupt (bad CRC or " + "no summary at all)\n"); + goto crc_err; + } + + if (summary->totlen != sumsize) { + dbg_summary("Summary node is corrupt (wrong erasesize?)\n"); + goto crc_err; + } + + crc = crc32_no_comp(0, (uchar *)summary, + sizeof(struct jffs2_raw_summary)-8); + + if (summary->node_crc != crc) { + dbg_summary("Summary node is corrupt (bad CRC)\n"); + goto crc_err; + } + + crc = crc32_no_comp(0, (uchar *)summary->sum, + sumsize - sizeof(struct jffs2_raw_summary)); + + if (summary->sum_crc != crc) { + dbg_summary("Summary node data is corrupt (bad CRC)\n"); + goto crc_err; + } + + if (summary->cln_mkr) + dbg_summary("Summary : CLEANMARKER node \n"); + + ret = jffs2_sum_process_sum_data(part, offset, summary, pL); + if (ret) + return ret; /* real error */ + + return 1; + +crc_err: + putstr("Summary node crc error, skipping summary information.\n"); + + return 0; +} + #ifdef DEBUG_FRAGMENTS static void dump_fragments(struct b_lists *pL) @@ -1321,10 +1449,65 @@ jffs2_1pass_build_lists(struct part_info * part) for (i = 0; i < nr_sectors; i++) { uint32_t sector_ofs = i * part->sector_size; uint32_t buf_ofs = sector_ofs; - uint32_t buf_len = EMPTY_SCAN_SIZE(part->sector_size); + uint32_t buf_len; uint32_t ofs, prevofs; + struct jffs2_sum_marker *sm; + void *sumptr = NULL; + uint32_t sumlen; + int ret; WATCHDOG_RESET(); + + buf_len = sizeof(*sm); + + /* Read as much as we want into the _end_ of the preallocated + * buffer + */ + get_fl_mem(part->offset + sector_ofs + part->sector_size - + buf_len, buf_len, buf + buf_size - buf_len); + + sm = (void *)buf + buf_size - sizeof(*sm); + if (sm->magic == JFFS2_SUM_MAGIC) { + sumlen = part->sector_size - sm->offset; + sumptr = buf + buf_size - sumlen; + + /* Now, make sure the summary itself is available */ + if (sumlen > buf_size) { + /* Need to kmalloc for this. */ + sumptr = malloc(sumlen); + if (!sumptr) { + putstr("Can't get memory for summary " + "node!\n"); + return 0; + } + memcpy(sumptr + sumlen - buf_len, buf + + buf_size - buf_len, buf_len); + } + if (buf_len < sumlen) { + /* Need to read more so that the entire summary + * node is present + */ + get_fl_mem(part->offset + sector_ofs + + part->sector_size - sumlen, + sumlen - buf_len, sumptr); + } + } + + if (sumptr) { + ret = jffs2_sum_scan_sumnode(part, sector_ofs, sumptr, + sumlen, pL); + + if (buf_size && sumlen > buf_size) + free(sumptr); + if (ret < 0) + return 0; + if (ret) + continue; + + } + + buf_len = EMPTY_SCAN_SIZE(part->sector_size); + get_fl_mem((u32)part->offset + buf_ofs, buf_len, buf); /* We temporarily use 'ofs' as a pointer into the buffer/jeb */ @@ -1477,6 +1660,8 @@ jffs2_1pass_build_lists(struct part_info * part) node->totlen, sizeof(struct jffs2_unknown_node)); break; + case JFFS2_NODETYPE_SUMMARY: + break; default: printf("Unknown node type: %x len %d offset 0x%x\n", node->nodetype, diff --git a/fs/jffs2/summary.h b/fs/jffs2/summary.h new file mode 100644 index 00000000000..834933cd158 --- /dev/null +++ b/fs/jffs2/summary.h @@ -0,0 +1,163 @@ +/* + * JFFS2 -- Journalling Flash File System, Version 2. + * + * Copyright © 2004 Ferenc Havasi , + * Zoltan Sogor , + * Patrik Kluba , + * University of Szeged, Hungary + * + * For licensing information, see the file 'LICENCE' in this directory. + * + */ + +#ifndef JFFS2_SUMMARY_H +#define JFFS2_SUMMARY_H + +#define BLK_STATE_ALLFF 0 +#define BLK_STATE_CLEAN 1 +#define BLK_STATE_PARTDIRTY 2 +#define BLK_STATE_CLEANMARKER 3 +#define BLK_STATE_ALLDIRTY 4 +#define BLK_STATE_BADBLOCK 5 + +#define JFFS2_SUMMARY_NOSUM_SIZE 0xffffffff +#define JFFS2_SUMMARY_INODE_SIZE (sizeof(struct jffs2_sum_inode_flash)) +#define JFFS2_SUMMARY_DIRENT_SIZE(x) (sizeof(struct jffs2_sum_dirent_flash) + (x)) +#define JFFS2_SUMMARY_XATTR_SIZE (sizeof(struct jffs2_sum_xattr_flash)) +#define JFFS2_SUMMARY_XREF_SIZE (sizeof(struct jffs2_sum_xref_flash)) + +/* Summary structures used on flash */ + +struct jffs2_sum_unknown_flash +{ + __u16 nodetype; /* node type */ +}; + +struct jffs2_sum_inode_flash +{ + __u16 nodetype; /* node type */ + __u32 inode; /* inode number */ + __u32 version; /* inode version */ + __u32 offset; /* offset on jeb */ + __u32 totlen; /* record length */ +} __attribute__((packed)); + +struct jffs2_sum_dirent_flash +{ + __u16 nodetype; /* == JFFS_NODETYPE_DIRENT */ + __u32 totlen; /* record length */ + __u32 offset; /* offset on jeb */ + __u32 pino; /* parent inode */ + __u32 version; /* dirent version */ + __u32 ino; /* == zero for unlink */ + uint8_t nsize; /* dirent name size */ + uint8_t type; /* dirent type */ + uint8_t name[0]; /* dirent name */ +} __attribute__((packed)); + +struct jffs2_sum_xattr_flash +{ + __u16 nodetype; /* == JFFS2_NODETYPE_XATR */ + __u32 xid; /* xattr identifier */ + __u32 version; /* version number */ + __u32 offset; /* offset on jeb */ + __u32 totlen; /* node length */ +} __attribute__((packed)); + +struct jffs2_sum_xref_flash +{ + __u16 nodetype; /* == JFFS2_NODETYPE_XREF */ + __u32 offset; /* offset on jeb */ +} __attribute__((packed)); + +union jffs2_sum_flash +{ + struct jffs2_sum_unknown_flash u; + struct jffs2_sum_inode_flash i; + struct jffs2_sum_dirent_flash d; + struct jffs2_sum_xattr_flash x; + struct jffs2_sum_xref_flash r; +}; + +/* Summary structures used in the memory */ + +struct jffs2_sum_unknown_mem +{ + union jffs2_sum_mem *next; + __u16 nodetype; /* node type */ +}; + +struct jffs2_sum_inode_mem +{ + union jffs2_sum_mem *next; + __u16 nodetype; /* node type */ + __u32 inode; /* inode number */ + __u32 version; /* inode version */ + __u32 offset; /* offset on jeb */ + __u32 totlen; /* record length */ +} __attribute__((packed)); + +struct jffs2_sum_dirent_mem +{ + union jffs2_sum_mem *next; + __u16 nodetype; /* == JFFS_NODETYPE_DIRENT */ + __u32 totlen; /* record length */ + __u32 offset; /* ofset on jeb */ + __u32 pino; /* parent inode */ + __u32 version; /* dirent version */ + __u32 ino; /* == zero for unlink */ + uint8_t nsize; /* dirent name size */ + uint8_t type; /* dirent type */ + uint8_t name[0]; /* dirent name */ +} __attribute__((packed)); + +struct jffs2_sum_xattr_mem +{ + union jffs2_sum_mem *next; + __u16 nodetype; + __u32 xid; + __u32 version; + __u32 offset; + __u32 totlen; +} __attribute__((packed)); + +struct jffs2_sum_xref_mem +{ + union jffs2_sum_mem *next; + __u16 nodetype; + __u32 offset; +} __attribute__((packed)); + +union jffs2_sum_mem +{ + struct jffs2_sum_unknown_mem u; + struct jffs2_sum_inode_mem i; + struct jffs2_sum_dirent_mem d; + struct jffs2_sum_xattr_mem x; + struct jffs2_sum_xref_mem r; +}; + +/* Summary related information stored in superblock */ + +struct jffs2_summary +{ + uint32_t sum_size; /* collected summary information for nextblock */ + uint32_t sum_num; + uint32_t sum_padded; + union jffs2_sum_mem *sum_list_head; + union jffs2_sum_mem *sum_list_tail; + + __u32 *sum_buf; /* buffer for writing out summary */ +}; + +/* Summary marker is stored at the end of every sumarized erase block */ + +struct jffs2_sum_marker +{ + __u32 offset; /* offset of the summary node in the jeb */ + __u32 magic; /* == JFFS2_SUM_MAGIC */ +}; + +#define JFFS2_SUMMARY_FRAME_SIZE (sizeof(struct jffs2_raw_summary) + sizeof(struct jffs2_sum_marker)) + +#endif /* JFFS2_SUMMARY_H */ diff --git a/include/jffs2/jffs2.h b/include/jffs2/jffs2.h index d142cd1bce7..ed96babf610 100644 --- a/include/jffs2/jffs2.h +++ b/include/jffs2/jffs2.h @@ -50,6 +50,9 @@ #define JFFS2_EMPTY_BITMASK 0xffff #define JFFS2_DIRTY_BITMASK 0x0000 +/* Summary node MAGIC marker */ +#define JFFS2_SUM_MAGIC 0x02851885 + /* We only allow a single char for length, and 0xFF is empty flash so we don't want it confused with a real length. Hence max 254. */ @@ -89,6 +92,7 @@ #define JFFS2_NODETYPE_INODE (JFFS2_FEATURE_INCOMPAT | JFFS2_NODE_ACCURATE | 2) #define JFFS2_NODETYPE_CLEANMARKER (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 3) #define JFFS2_NODETYPE_PADDING (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 4) +#define JFFS2_NODETYPE_SUMMARY (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 6) /* Maybe later... */ /*#define JFFS2_NODETYPE_CHECKPOINT (JFFS2_FEATURE_RWCOMPAT_DELETE | JFFS2_NODE_ACCURATE | 3) */ @@ -166,9 +170,24 @@ struct jffs2_raw_inode /* __u8 data[dsize]; */ } __attribute__((packed)); +struct jffs2_raw_summary +{ + __u16 magic; + __u16 nodetype; /* = JFFS2_NODETYPE_SUMMARY */ + __u32 totlen; + __u32 hdr_crc; + __u32 sum_num; /* number of sum entries*/ + __u32 cln_mkr; /* clean marker size, 0 = no cleanmarker */ + __u32 padded; /* sum of the size of padding nodes */ + __u32 sum_crc; /* summary information crc */ + __u32 node_crc; /* node crc */ + __u32 sum[0]; /* inode summary info */ +}; + union jffs2_node_union { struct jffs2_raw_inode i; struct jffs2_raw_dirent d; + struct jffs2_raw_summary s; struct jffs2_unknown_node u; } __attribute__((packed)); -- cgit v1.3.1 From 1fc2b165c51d6f40c8d505f1b3eaefdb6599b17b Mon Sep 17 00:00:00 2001 From: Graeme Russ Date: Sat, 22 Nov 2008 08:43:29 +1100 Subject: Moved sc520 PCI definitions to stand-alone file Signed Off By: Graeme Russ --- include/asm-i386/ic/pci.h | 49 +++++++++++++++++++++++++++++++++++++++++++++ include/asm-i386/ic/sc520.h | 22 -------------------- 2 files changed, 49 insertions(+), 22 deletions(-) create mode 100644 include/asm-i386/ic/pci.h (limited to 'include') diff --git a/include/asm-i386/ic/pci.h b/include/asm-i386/ic/pci.h new file mode 100644 index 00000000000..bcccdbef82e --- /dev/null +++ b/include/asm-i386/ic/pci.h @@ -0,0 +1,49 @@ +/* + * (C) Copyright 2002 + * Daniel Engstrm, Omicron Ceti AB . + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_IC_SC520_PCI_H_ +#define _ASM_IC_SC520_PCI_H_ 1 + +/* pin number used for PCI interrupt mappings */ +#define SC520_PCI_INTA 0 +#define SC520_PCI_INTB 1 +#define SC520_PCI_INTC 2 +#define SC520_PCI_INTD 3 +#define SC520_PCI_GPIRQ0 4 +#define SC520_PCI_GPIRQ1 5 +#define SC520_PCI_GPIRQ2 6 +#define SC520_PCI_GPIRQ3 7 +#define SC520_PCI_GPIRQ4 8 +#define SC520_PCI_GPIRQ5 9 +#define SC520_PCI_GPIRQ6 10 +#define SC520_PCI_GPIRQ7 11 +#define SC520_PCI_GPIRQ8 12 +#define SC520_PCI_GPIRQ9 13 +#define SC520_PCI_GPIRQ10 14 + +extern int sc520_pci_ints[]; + +void pci_sc520_init(struct pci_controller *hose); +int pci_sc520_set_irq(int pci_pin, int irq); + +#endif diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h index 0f7e7a551e8..bf395166512 100644 --- a/include/asm-i386/ic/sc520.h +++ b/include/asm-i386/ic/sc520.h @@ -282,24 +282,6 @@ #define SC520_IRQ14 9 #define SC520_IRQ15 10 - -/* pin number used for PCI interrupt mappings */ -#define SC520_PCI_INTA 0 -#define SC520_PCI_INTB 1 -#define SC520_PCI_INTC 2 -#define SC520_PCI_INTD 3 -#define SC520_PCI_GPIRQ0 4 -#define SC520_PCI_GPIRQ1 5 -#define SC520_PCI_GPIRQ2 6 -#define SC520_PCI_GPIRQ3 7 -#define SC520_PCI_GPIRQ4 8 -#define SC520_PCI_GPIRQ5 9 -#define SC520_PCI_GPIRQ6 10 -#define SC520_PCI_GPIRQ7 11 -#define SC520_PCI_GPIRQ8 12 -#define SC520_PCI_GPIRQ9 13 -#define SC520_PCI_GPIRQ10 14 - /* utility functions */ void write_mmcr_byte(u16 mmcr, u8 data); void write_mmcr_word(u16 mmcr, u16 data); @@ -308,11 +290,7 @@ u8 read_mmcr_byte(u16 mmcr); u16 read_mmcr_word(u16 mmcr); u32 read_mmcr_long(u16 mmcr); -extern int sc520_pci_ints[]; - void init_sc520(void); unsigned long init_sc520_dram(void); -void pci_sc520_init(struct pci_controller *hose); -int pci_sc520_set_irq(int pci_pin, int irq); #endif -- cgit v1.3.1 From 97a24a78ee6f34b89b821cb70eda1cf34aa11d97 Mon Sep 17 00:00:00 2001 From: Jerry Van Baren Date: Mon, 24 Nov 2008 08:15:02 -0500 Subject: libfdt: Fix redefined uintptr_t warning for USE_HOSTCC Compiling U-Boot in an old OS environment (RedHat-7.3 :-) gives the following warnings from FDT: include/libfdt_env.h:50: warning: redefinition of 'uintptr_t' /usr/include/stdint.h:129: warning: 'uintptr_t' previously declared here Fix: Protect the definition of uintptr_t when compiling on the host system. Signed-off-by: Gerald Van Baren --- include/libfdt_env.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/libfdt_env.h b/include/libfdt_env.h index 355ebf27b2b..ea474a56b12 100644 --- a/include/libfdt_env.h +++ b/include/libfdt_env.h @@ -47,6 +47,7 @@ extern struct fdt_header *working_fdt; /* Pointer to the working fdt */ #define cpu_to_fdt64(x) (x) #endif +#ifndef USE_HOSTCC /* * Types for `void *' pointers. * @@ -58,5 +59,6 @@ typedef unsigned long int uintptr_t; #else typedef unsigned int uintptr_t; #endif +#endif /* not USE_HOSTCC */ #endif /* _LIBFDT_ENV_H */ -- cgit v1.3.1 From e7d591e823a991513833af7030468409e25a3b13 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Nov 2008 11:43:00 +0100 Subject: microblaze: Fix ml401 uart16550 setting Signed-off-by: Michal Simek --- include/configs/ml401.h | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 63d07ffd2eb..b31c4b53c9b 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -37,17 +37,20 @@ #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550 +#elif XILINX_UART16550_BASEADDR +#define CONFIG_SYS_NS16550 1 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 +#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR +#define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } -#endif + +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} +#else +#error Undefined uart #endif /* setting reset address */ -- cgit v1.3.1 From 99ba6f353582720defff6e6e6761dc455a207d31 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Nov 2008 18:25:41 +0100 Subject: microblaze: Remove CONFIG_LIBFDT due to error in common files --- include/configs/ml401.h | 1 - include/configs/xupv2p.h | 1 - 2 files changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/ml401.h b/include/configs/ml401.h index b31c4b53c9b..c802dcb6a2a 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -277,6 +277,5 @@ "1m(romfs),1m(cramfs),-(jffs2)\0" #define CONFIG_CMDLINE_EDITING -#define CONFIG_OF_LIBFDT 1 #endif /* __CONFIG_H */ diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 6a9270306da..ed844bf9933 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -222,6 +222,5 @@ #endif #define CONFIG_CMDLINE_EDITING -#define CONFIG_OF_LIBFDT 1 /* flat device tree */ #endif /* __CONFIG_H */ -- cgit v1.3.1 From 8fab49ea911fe925392fa5afcc9bc7373a3d0cee Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 25 Nov 2008 11:42:20 +0100 Subject: microblaze: Remove XUPV2P board --- Microblaze platforms use generic settings and to have many platforms is confusing that's why I decided to remove this platform from U-BOOT. ml401 tree is sufficient for covering all Microblaze platforms. This change will go through microblaze custodian tree. --- MAINTAINERS | 1 - MAKEALL | 1 - Makefile | 5 - board/xilinx/xupv2p/Makefile | 50 --------- board/xilinx/xupv2p/config.mk | 32 ------ board/xilinx/xupv2p/u-boot.lds | 68 ------------ board/xilinx/xupv2p/xparameters.h | 58 ---------- board/xilinx/xupv2p/xupv2p.c | 49 --------- include/configs/xupv2p.h | 226 -------------------------------------- 9 files changed, 490 deletions(-) delete mode 100644 board/xilinx/xupv2p/Makefile delete mode 100644 board/xilinx/xupv2p/config.mk delete mode 100644 board/xilinx/xupv2p/u-boot.lds delete mode 100644 board/xilinx/xupv2p/xparameters.h delete mode 100644 board/xilinx/xupv2p/xupv2p.c delete mode 100644 include/configs/xupv2p.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index 127604b0f70..f04879555a3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -704,7 +704,6 @@ Yasushi Shoji Michal Simek ML401 MicroBlaze - XUPV2P MicroBlaze ######################################################################### # Coldfire Systems: # diff --git a/MAKEALL b/MAKEALL index a16549c10db..cc49a98080c 100755 --- a/MAKEALL +++ b/MAKEALL @@ -698,7 +698,6 @@ LIST_nios2=" \ LIST_microblaze=" \ ml401 \ suzaku \ - xupv2p \ " ######################################################################### diff --git a/Makefile b/Makefile index f8fe29cf5ee..ca91f05a954 100644 --- a/Makefile +++ b/Makefile @@ -3153,11 +3153,6 @@ suzaku_config: unconfig @echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h @$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno -xupv2p_config: unconfig - @mkdir -p $(obj)include - @echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h - @$(MKCONFIG) -a $(@:_config=) microblaze microblaze xupv2p xilinx - #======================================================================== # Blackfin #======================================================================== diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile deleted file mode 100644 index 10b47b2ae54..00000000000 --- a/board/xilinx/xupv2p/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).a - -COBJS = $(BOARD).o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(OBJS) $(SOBJS) - $(AR) $(ARFLAGS) $@ $^ - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk deleted file mode 100644 index c07b0b35b18..00000000000 --- a/board/xilinx/xupv2p/config.mk +++ /dev/null @@ -1,32 +0,0 @@ -# -# (C) Copyright 2007 Michal Simek -# -# Michal SIMEK -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# -# CAUTION: This file is automatically generated by libgen. -# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 -# - -TEXT_BASE = 0x38000000 - -PLATFORM_CPPFLAGS += -mno-xl-soft-mul -PLATFORM_CPPFLAGS += -mno-xl-soft-div -PLATFORM_CPPFLAGS += -mxl-barrel-shift diff --git a/board/xilinx/xupv2p/u-boot.lds b/board/xilinx/xupv2p/u-boot.lds deleted file mode 100644 index b38f6487725..00000000000 --- a/board/xilinx/xupv2p/u-boot.lds +++ /dev/null @@ -1,68 +0,0 @@ -/* - * (C) Copyright 2004 Atmark Techno, Inc. - * - * Yasushi SHOJI - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(microblaze) -ENTRY(_start) - -SECTIONS -{ - .text ALIGN(0x4): - { - __text_start = .; - cpu/microblaze/start.o (.text) - *(.text) - __text_end = .; - } - - .rodata ALIGN(0x4): - { - __rodata_start = .; - *(.rodata) - __rodata_end = .; - } - - .data ALIGN(0x4): - { - __data_start = .; - *(.data) - __data_end = .; - } - - .u_boot_cmd ALIGN(0x4): - { - . = .; - __u_boot_cmd_start = .; - *(.u_boot_cmd) - __u_boot_cmd_end = .; - } - - .bss ALIGN(0x4): - { - __bss_start = .; - *(.bss) - . = ALIGN(4); - __bss_end = .; - } - __end = . ; -} diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h deleted file mode 100644 index 9e5ebdabc11..00000000000 --- a/board/xilinx/xupv2p/xparameters.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * CAUTION: This file is automatically generated by libgen. - * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4 - */ - -/* System Clock Frequency */ -#define XILINX_CLOCK_FREQ 100000000 - -/* Interrupt controller is opb_intc_0 */ -#define XILINX_INTC_BASEADDR 0x41200000 -#define XILINX_INTC_NUM_INTR_INPUTS 11 - -/* Timer pheriphery is opb_timer_1 */ -#define XILINX_TIMER_BASEADDR 0x41c00000 -#define XILINX_TIMER_IRQ 1 - -/* Uart pheriphery is RS232_Uart_1 */ -#define XILINX_UARTLITE_BASEADDR 0x40600000 -#define XILINX_UARTLITE_BAUDRATE 115200 - -/* GPIO is LEDs_4Bit*/ -#define XILINX_GPIO_BASEADDR 0x40000000 - -/* FLASH doesn't exist none */ - -/* Main Memory is DDR_256MB_32MX64_rank1_row13_col10_cl2_5 */ -#define XILINX_RAM_START 0x30000000 -#define XILINX_RAM_SIZE 0x10000000 - -/* Sysace Controller is SysACE_CompactFlash */ -#define XILINX_SYSACE_BASEADDR 0x41800000 -#define XILINX_SYSACE_HIGHADDR 0x4180ffff -#define XILINX_SYSACE_MEM_WIDTH 16 - -/* Ethernet controller is Ethernet_MAC */ -#define XILINX_EMACLITE_BASEADDR 0x40C00000 diff --git a/board/xilinx/xupv2p/xupv2p.c b/board/xilinx/xupv2p/xupv2p.c deleted file mode 100644 index b1a76c0c514..00000000000 --- a/board/xilinx/xupv2p/xupv2p.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * (C) Copyright 2007 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* This is a board specific file. It's OK to include board specific - * header files */ - -#include -#include - -void do_reset (void) -{ -#ifdef CONFIG_SYS_GPIO_0 - *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = - ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR))); -#endif -#ifdef CONFIG_SYS_RESET_ADDRESS - puts ("Reseting board\n"); - asm ("bra r0"); -#endif -} - -int gpio_init (void) -{ -#ifdef CONFIG_SYS_GPIO_0 - *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0x0; -#endif - return 0; -} diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h deleted file mode 100644 index ed844bf9933..00000000000 --- a/include/configs/xupv2p.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * (C) Copyright 2007-2008 Michal Simek - * - * Michal SIMEK - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include "../board/xilinx/xupv2p/xparameters.h" - -#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ -#define CONFIG_XUPV2P 1 - -/* uart */ -#ifdef XILINX_UARTLITE_BASEADDR -#define CONFIG_XILINX_UARTLITE -#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR -#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } -#endif -#endif - -/* - * setting reset address - * - * TEXT_BASE is set to place, where the U-BOOT run in RAM, but - * if you want to store U-BOOT in flash, set CONFIG_SYS_RESET_ADDRESS - * to FLASH memory and after loading bitstream jump to FLASH. - * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze - * jump to CONFIG_SYS_RESET_ADDRESS where is the original U-BOOT code. - */ -/* #define CONFIG_SYS_RESET_ADDRESS 0x36000000 */ - -/* ethernet */ -#ifdef XILINX_EMAC_BASEADDR -#define CONFIG_XILINX_EMAC 1 -#define CONFIG_SYS_ENET -#else -#ifdef XILINX_EMACLITE_BASEADDR -#define CONFIG_XILINX_EMACLITE 1 -#define CONFIG_SYS_ENET -#endif -#endif -#undef ET_DEBUG - -/* gpio */ -#ifdef XILINX_GPIO_BASEADDR -#define CONFIG_SYS_GPIO_0 1 -#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif - -/* interrupt controller */ -#ifdef XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0 1 -#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR -#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS -#endif - -/* timer */ -#ifdef XILINX_TIMER_BASEADDR -#if (XILINX_TIMER_IRQ != -1) -#define CONFIG_SYS_TIMER_0 1 -#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR -#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ -#define FREQUENCE XILINX_CLOCK_FREQ -#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) -#endif -#else -#ifdef XILINX_CLOCK_FREQ -#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ -#else -#error BAD CLOCK FREQ -#endif -#endif -/* - * memory layout - Example - * TEXT_BASE = 0x3600_0000; - * CONFIG_SYS_SRAM_BASE = 0x3000_0000; - * CONFIG_SYS_SRAM_SIZE = 0x1000_0000; - * - * CONFIG_SYS_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000 - * CONFIG_SYS_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000 - * CONFIG_SYS_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000 - * - * 0x3000_0000 CONFIG_SYS_SDRAM_BASE - * FREE - * 0x3600_0000 TEXT_BASE - * U-BOOT code - * 0x3602_0000 - * FREE - * - * STACK - * 0x3FF7_F000 CONFIG_SYS_MALLOC_BASE - * MALLOC_AREA 256kB Alloc - * 0x3FFB_F000 CONFIG_SYS_MONITOR_BASE - * MONITOR_CODE 256kB Env - * 0x3FFF_F000 CONFIG_SYS_GBL_DATA_OFFSET - * GLOBAL_DATA 4kB bd, gd - * 0x4000_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - */ - -/* ddr sdram - main memory */ -#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START -#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) - -/* global pointer */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) /* start of global data */ - -/* monitor code */ -#define SIZE 0x40000 -#define CONFIG_SYS_MONITOR_LEN SIZE -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_SYS_MALLOC_LEN SIZE -#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) - -/* stack */ -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE - -#define CONFIG_SYS_NO_FLASH 1 -#define CONFIG_ENV_IS_NOWHERE 1 -#define CONFIG_ENV_SIZE 0x1000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* - * Command line configuration. - */ -#include - -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_IMLS - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_IRQ - -#ifndef CONFIG_SYS_ENET - #undef CONFIG_CMD_NET -#else - #define CONFIG_CMD_PING -#endif - -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT "U-Boot-mONStR> " -#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */ - -#define CONFIG_BOOTDELAY 30 -#define CONFIG_BOOTARGS "root=romfs" -#define CONFIG_HOSTNAME "xupv2p" -#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" -#define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.5 -#define CONFIG_GATEWAYIP 192.168.0.1 -#define CONFIG_ETHADDR 00:E0:0C:00:00:FD - -/* architecture dependent code */ -#define CONFIG_SYS_USR_EXCEP /* user exception */ -#define CONFIG_SYS_HZ 1000 - -#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \ - "base 0;" \ - "echo" - -/* system ace */ -#ifdef XILINX_SYSACE_BASEADDR -#define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -#define SYSTEMACE_CONFIG_FPGA -#define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -#define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -#define CONFIG_DOS_PARTITION -#endif - -#define CONFIG_CMDLINE_EDITING - -#endif /* __CONFIG_H */ -- cgit v1.3.1 From 8c92af7b2fbd60ae87379477f93c7ec9441b7452 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 9 Dec 2008 20:08:01 +0100 Subject: ppc4xx: Remove some features from ALPR to fit into 256k again Signed-off-by: Stefan Roese --- include/configs/alpr.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 6e9f5e5a530..7ce820518e1 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -235,18 +235,15 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG #define CONFIG_CMD_EEPROM -#define CONFIG_CMD_ELF #define CONFIG_CMD_FPGA #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII #define CONFIG_CMD_NAND #define CONFIG_CMD_NET -#define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_REGINFO - +#undef CONFIG_CMD_NFS #undef CONFIG_WATCHDOG /* watchdog disabled */ -- cgit v1.3.1 From 1951f847f0a851853871b613ad7cf21a5242226c Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Wed, 10 Dec 2008 14:41:25 +0100 Subject: ppc4xx: Update TEXT_BASE for CPCI405 boards This patch fixes building U-Boot for CPCI405 boards. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- Makefile | 5 +---- board/esd/cpci405/config.mk | 6 +----- include/configs/CPCI405.h | 6 +++--- 3 files changed, 5 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/Makefile b/Makefile index f8fe29cf5ee..2f07657f5df 100644 --- a/Makefile +++ b/Makefile @@ -1261,14 +1261,11 @@ CMS700_config: unconfig CPCI2DP_config: unconfig @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd -CPCI405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci405 esd - +CPCI405_config \ CPCI4052_config \ CPCI405DT_config \ CPCI405AB_config: unconfig @mkdir -p $(obj)board/esd/cpci405 - @echo "TEXT_BASE = 0xFFFC0000" > $(obj)board/esd/cpci405/config.tmp @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci405 esd CPCIISER4_config: unconfig diff --git a/board/esd/cpci405/config.mk b/board/esd/cpci405/config.mk index 6cfb8912ddd..1bdf5e4fcf3 100644 --- a/board/esd/cpci405/config.mk +++ b/board/esd/cpci405/config.mk @@ -21,8 +21,4 @@ # MA 02111-1307 USA # -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - -ifndef TEXT_BASE -TEXT_BASE = 0xFFFD0000 -endif +TEXT_BASE = 0xFFFC0000 diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 1a2bc1c2e72..89ba139af78 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -196,9 +196,9 @@ * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_FLASH_BASE 0xFFFD0000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ +#define CONFIG_SYS_FLASH_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (~(TEXT_BASE) + 1) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ /* -- cgit v1.3.1 From 5783758fd260a02f44566ad8f29f899565cd0403 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 17 Nov 2008 16:52:09 +0900 Subject: sh: Update ms7722se board config Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/configs/ms7722se.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index 9997c9b0178..52020047d9e 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -31,10 +31,13 @@ #define CONFIG_MS7722SE 1 #define CONFIG_CMD_FLASH +#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NET +#define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_DFL #define CONFIG_CMD_SDRAM +#define CONFIG_CMD_MEMORY #define CONFIG_CMD_ENV #define CONFIG_BAUDRATE 115200 -- cgit v1.3.1 From c54b9a42d8f5ab5b2a039b3a2e6fde8b427745e5 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 25 Nov 2008 11:05:19 +0900 Subject: sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT SH4 is different a value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT every CPU. This patch corrects these values. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/asm-sh/cpu_sh4.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h index b6cc6cfbd97..d2dbfcd143e 100644 --- a/include/asm-sh/cpu_sh4.h +++ b/include/asm-sh/cpu_sh4.h @@ -26,8 +26,15 @@ #define CCR_CACHE_ICI 0x00000800 #define CACHE_OC_ADDRESS_ARRAY 0xf4000000 + +#if defined (CONFIG_CPU_SH7750) || \ + defined(CONFIG_CPU_SH7751) #define CACHE_OC_WAY_SHIFT 14 #define CACHE_OC_NUM_ENTRIES 512 +#else +#define CACHE_OC_WAY_SHIFT 13 +#define CACHE_OC_NUM_ENTRIES 256 +#endif #define CACHE_OC_ENTRY_SHIFT 5 #if defined (CONFIG_CPU_SH7750) || \ -- cgit v1.3.1 From cd6734510a9ff0f41c4a73567d4080ea0033d2c1 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Mon, 24 Nov 2008 13:33:51 +0100 Subject: Fix FIT and FDT support to have CONFIG_OF_LIBFDT and CONFIG_FIT independent FDT support is used for both FIT style images and for architectures that can pass a fdt blob to an OS (ppc, m68k, sparc). For other architectures and boards which do not pass a fdt blob to an OS but want to use the new uImage format, we just need FIT support. Now we can have the 4 following configurations : 1) FIT only CONFIG_FIT 2) fdt blob only CONFIG_OF_LIBFDT 3) both CONFIG_OF_LIBFDT & CONFIG_FIT 4) none none Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- common/image.c | 2 ++ include/image.h | 4 ---- libfdt/Makefile | 8 ++++++-- 3 files changed, 8 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/common/image.c b/common/image.c index 866edf619df..daa68bc2dde 100644 --- a/common/image.c +++ b/common/image.c @@ -1071,6 +1071,7 @@ int boot_ramdisk_high (struct lmb *lmb, ulong rd_data, ulong rd_len, error: return -1; } +#endif /* defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SPARC) */ #ifdef CONFIG_OF_LIBFDT static void fdt_error (const char *msg) @@ -1575,6 +1576,7 @@ error: } #endif /* CONFIG_OF_LIBFDT */ +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) /** * boot_get_cmdline - allocate and initialize kernel cmdline * @lmb: pointer to lmb handle, will be used for memory mgmt diff --git a/include/image.h b/include/image.h index 54335559af3..4609200b854 100644 --- a/include/image.h +++ b/include/image.h @@ -50,10 +50,6 @@ #endif /* USE_HOSTCC */ -#if defined(CONFIG_FIT) && !defined(CONFIG_OF_LIBFDT) -#error "CONFIG_OF_LIBFDT not enabled, required by CONFIG_FIT!" -#endif - #include #if defined(CONFIG_FIT) diff --git a/libfdt/Makefile b/libfdt/Makefile index ca2ad76c887..d6e283045f6 100644 --- a/libfdt/Makefile +++ b/libfdt/Makefile @@ -27,9 +27,13 @@ LIB = $(obj)libfdt.a SOBJS = -COBJS-$(CONFIG_OF_LIBFDT) += fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_sw.o fdt_wip.o +COBJS-libfdt += fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_sw.o fdt_wip.o -COBJS := $(COBJS-y) +COBJS-$(CONFIG_OF_LIBFDT) += $(COBJS-libfdt) +COBJS-$(CONFIG_FIT) += $(COBJS-libfdt) + + +COBJS := $(sort $(COBJS-y)) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -- cgit v1.3.1 From 3aed3aa2c128ce9fb39ca3f4e9385a7499e93dbf Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sun, 14 Dec 2008 10:29:39 +0100 Subject: Fix new found CFG_ Also fix some minor typos. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Wolfgang Denk --- board/esd/pmc440/cmd_pmc440.c | 2 +- board/xilinx/ppc405-generic/u-boot-ram.lds | 2 +- board/xilinx/ppc405-generic/u-boot-rom.lds | 2 +- cpu/arm926ejs/at91/usb.c | 2 +- cpu/mpc86xx/release.S | 2 +- include/configs/PMC440.h | 8 ++++---- include/configs/afeb9260.h | 4 ++-- include/configs/at91cap9adk.h | 2 +- include/configs/at91sam9260ek.h | 2 +- include/configs/at91sam9263ek.h | 2 +- 10 files changed, 14 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/board/esd/pmc440/cmd_pmc440.c b/board/esd/pmc440/cmd_pmc440.c index 3f0dca087cb..16c9c7eea2e 100644 --- a/board/esd/pmc440/cmd_pmc440.c +++ b/board/esd/pmc440/cmd_pmc440.c @@ -364,7 +364,7 @@ int do_painit(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) base -= LOGBUFF_LEN + LOGBUFF_OVERHEAD; #endif /* - * gd->bd->bi_memsize == physical ram size - CFG_MEM_TOP_HIDE + * gd->bd->bi_memsize == physical ram size - CONFIG_SYS_MEM_TOP_HIDE */ param = base - (pram << 10); printf("PARAM: @%08x\n", param); diff --git a/board/xilinx/ppc405-generic/u-boot-ram.lds b/board/xilinx/ppc405-generic/u-boot-ram.lds index 0004d610007..6bbd3bd4724 100644 --- a/board/xilinx/ppc405-generic/u-boot-ram.lds +++ b/board/xilinx/ppc405-generic/u-boot-ram.lds @@ -127,7 +127,7 @@ SECTIONS *(COMMON) } - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified."); + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified."); _end = . ; PROVIDE (end = .); diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds index d2bac9f1d7f..d0940065593 100644 --- a/board/xilinx/ppc405-generic/u-boot-rom.lds +++ b/board/xilinx/ppc405-generic/u-boot-rom.lds @@ -137,7 +137,7 @@ SECTIONS *(COMMON) } - ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified."); + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified."); _end = . ; PROVIDE (end = .); diff --git a/cpu/arm926ejs/at91/usb.c b/cpu/arm926ejs/at91/usb.c index 2f5c337474e..a15ab1693c9 100644 --- a/cpu/arm926ejs/at91/usb.c +++ b/cpu/arm926ejs/at91/usb.c @@ -35,7 +35,7 @@ int usb_cpu_init(void) #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ defined(CONFIG_AT91SAM9263) /* Enable PLLB */ - at91_sys_write(AT91_CKGR_PLLBR, CFG_AT91_PLLB); + at91_sys_write(AT91_CKGR_PLLBR, CONFIG_SYS_AT91_PLLB); while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) ; #endif diff --git a/cpu/mpc86xx/release.S b/cpu/mpc86xx/release.S index b524e5016e8..95efbb4f803 100644 --- a/cpu/mpc86xx/release.S +++ b/cpu/mpc86xx/release.S @@ -125,7 +125,7 @@ invl2: mtspr HID0, r5 /* enable + invalidate */ mtspr HID0, r3 /* enable */ sync -#ifdef CFG_L2 +#ifdef CONFIG_SYS_L2 sync lis r3, L2_ENABLE@h ori r3, r3, L2_ENABLE@l diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 7219bb8ae18..d0e3cda6c18 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -219,8 +219,8 @@ #if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL) #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ #endif -#define CFG_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ - /* 440EPx errata CHIP 11 */ +#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10) /* don't use last 4kbytes */ + /* 440EPx errata CHIP 11 */ /*----------------------------------------------------------------------- * I2C @@ -490,8 +490,8 @@ #endif /* Memory Bank 1 (RESET) initialization */ -#define CFG_EBC_PB1AP 0x7f817200 //0x03017200 -#define CFG_EBC_PB1CR (CFG_RESET_BASE | 0x1c000) +#define CONFIG_SYS_EBC_PB1AP 0x7f817200 //0x03017200 +#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000) /* Memory Bank 4 (FPGA / 32Bit) initialization */ #define CONFIG_SYS_EBC_PB4AP 0x03840f40 /* BME=0,TWT=7,CSN=1,TH=7,RE=1,SOR=0,BEM=1 */ diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index f077ad90f41..90e553d74e3 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -29,7 +29,7 @@ /* ARM asynchronous clock */ #define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */ -#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ +#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ @@ -150,7 +150,7 @@ #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CFG_LONGHELP 1 +#define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 #define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index aeb06ac64b6..363df67b572 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -32,7 +32,7 @@ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ +#define CONFUG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 2df8d549156..15389296f25 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -32,7 +32,7 @@ #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ +#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index fc7c94126e6..d9ebc87aeac 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -32,7 +32,7 @@ #define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CFG_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ +#define CONFIG_SYS_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ -- cgit v1.3.1 From ba490b7761c62b549c222a9723e532dc801a3899 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 1 Dec 2008 16:22:45 -0600 Subject: Remove unused CONFIG_ADDR_STREAMING defines Signed-off-by: Peter Tyser --- include/configs/ATUM8548.h | 1 - include/configs/MPC8536DS.h | 1 - include/configs/MPC8540ADS.h | 1 - include/configs/MPC8540EVAL.h | 1 - include/configs/MPC8541CDS.h | 1 - include/configs/MPC8544DS.h | 1 - include/configs/MPC8548CDS.h | 1 - include/configs/MPC8555CDS.h | 1 - include/configs/MPC8560ADS.h | 1 - include/configs/MPC8568MDS.h | 1 - include/configs/MPC8572DS.h | 1 - include/configs/PM854.h | 1 - include/configs/PM856.h | 1 - include/configs/SBC8540.h | 1 - include/configs/TQM85xx.h | 1 - include/configs/sbc8548.h | 1 - include/configs/sbc8560.h | 1 - include/configs/socrates.h | 1 - include/configs/stxgp3.h | 1 - include/configs/stxssa.h | 1 - 20 files changed, 20 deletions(-) (limited to 'include') diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h index 1b745265dcb..7ee05e56587 100644 --- a/include/configs/ATUM8548.h +++ b/include/configs/ATUM8548.h @@ -67,7 +67,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 5a99d5fe799..532c3df7730 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -70,7 +70,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_ENABLE_36BIT_PHYS 1 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 0b8fe6ad68a..f22b7529dda 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -79,7 +79,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h index 21cf965ab38..5ac1916cbd7 100644 --- a/include/configs/MPC8540EVAL.h +++ b/include/configs/MPC8540EVAL.h @@ -62,7 +62,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index eaa737b88e2..399189c598e 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index b31c2bb371f..9b1b34cc8bc 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -66,7 +66,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 7a7e5a14570..e1bd45ef1b0 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -69,7 +69,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 40b40ed3af2..c92f82d48c9 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -63,7 +63,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ #define CONFIG_SYS_MEMTEST_END 0x00400000 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 2b5b2c10646..bf4bd2c1a00 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -73,7 +73,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 8bdec65b7cd..da1f4542281 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -61,7 +61,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ /* * Only possible on E500 Version 2 or newer cores. diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 9a66ca81028..37c3f4200be 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -71,7 +71,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_ENABLE_36BIT_PHYS 1 diff --git a/include/configs/PM854.h b/include/configs/PM854.h index 1cc80ad2146..41e290d0b13 100644 --- a/include/configs/PM854.h +++ b/include/configs/PM854.h @@ -71,7 +71,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/PM856.h b/include/configs/PM856.h index 698ad2d9111..6b4e2dd42d4 100644 --- a/include/configs/PM856.h +++ b/include/configs/PM856.h @@ -72,7 +72,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 2853fba0652..34196319c5a 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -75,7 +75,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 300f49079df..6d205a7a142 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -106,7 +106,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 5ce4dac5e59..528c810900b 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -59,7 +59,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */ /* diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index e1d3a52b5e4..d4e9d7479ab 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -69,7 +69,6 @@ /* below can be toggled for performance analysis. otherwise use default */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #undef CONFIG_BTB /* toggle branch predition */ -#undef CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index e89b5a3fb0e..cbf04e3f2d2 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -82,7 +82,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index a0f2ed0daf1..ae6f45aeecd 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -64,7 +64,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index f0990c6799b..c312f1af9dd 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -64,7 +64,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_ADDR_STREAMING /* toggle addr streaming */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */ -- cgit v1.3.1 From 65e43a10631537dcb92c302d36301a12308216c3 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sat, 13 Dec 2008 17:20:27 -0600 Subject: Introduce virt_to_phys() virt_to_phys() returns the physical address given a virtual. In most cases this will be just the input value as the vast majority of systems run in a 1:1 mode. However in systems that are not running this way it should report the physical address or ~0 if no mapping exists for the given virtual address. Signed-off-by: Kumar Gala --- include/asm-arm/io.h | 5 +++++ include/asm-avr32/io.h | 5 +++++ include/asm-blackfin/io.h | 5 +++++ include/asm-i386/io.h | 5 +++++ include/asm-m68k/io.h | 5 +++++ include/asm-microblaze/io.h | 5 +++++ include/asm-mips/io.h | 2 +- include/asm-nios/io.h | 5 +++++ include/asm-nios2/io.h | 5 +++++ include/asm-ppc/io.h | 5 +++++ include/asm-sh/io.h | 5 +++++ include/asm-sparc/io.h | 5 +++++ 12 files changed, 56 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index f4ae3070036..fec3a7eace5 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -57,6 +57,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + /* * Generic virtual read/write. Note that we don't support half-word * read/writes. We define __arch_*[bl] here, and leave __arch_*w diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h index 06e52b137f5..d22cd356112 100644 --- a/include/asm-avr32/io.h +++ b/include/asm-avr32/io.h @@ -125,4 +125,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long len) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __ASM_AVR32_IO_H */ diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h index da58914987c..68064949834 100644 --- a/include/asm-blackfin/io.h +++ b/include/asm-blackfin/io.h @@ -64,6 +64,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + /* * These are for ISA/PCI shared memory _only_ and should never be used * on any other type of memory, including Zorro memory. They are meant to diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h index 2c57140fb39..9b757d489e3 100644 --- a/include/asm-i386/io.h +++ b/include/asm-i386/io.h @@ -229,4 +229,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h index 1fccc129232..50ea08751f1 100644 --- a/include/asm-m68k/io.h +++ b/include/asm-m68k/io.h @@ -251,4 +251,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __ASM_M68K_IO_H__ */ diff --git a/include/asm-microblaze/io.h b/include/asm-microblaze/io.h index 8804724bff2..7e190d15c60 100644 --- a/include/asm-microblaze/io.h +++ b/include/asm-microblaze/io.h @@ -155,4 +155,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __MICROBLAZE_IO_H__ */ diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 3a0f33f204d..031186d037f 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -118,7 +118,7 @@ static inline void set_io_port_base(unsigned long base) * Change virtual addresses to physical addresses and vv. * These are trivial on the 1:1 Linux/MIPS mapping */ -extern inline unsigned long virt_to_phys(volatile void * address) +extern inline phys_addr_t virt_to_phys(void * address) { return CPHYSADDR(address); } diff --git a/include/asm-nios/io.h b/include/asm-nios/io.h index 8b788068b3d..899682cc40d 100644 --- a/include/asm-nios/io.h +++ b/include/asm-nios/io.h @@ -133,4 +133,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __ASM_NIOS_IO_H_ */ diff --git a/include/asm-nios2/io.h b/include/asm-nios2/io.h index 2f1ec26bd16..01d11efecea 100644 --- a/include/asm-nios2/io.h +++ b/include/asm-nios2/io.h @@ -53,6 +53,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + extern unsigned char inb (unsigned char *port); extern unsigned short inw (unsigned short *port); extern unsigned inl (unsigned port); diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index c3496818f04..c00de452d6d 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -298,4 +298,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index adc3f81ed67..ca598a60f38 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -261,5 +261,10 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif /* __KERNEL__ */ #endif /* __ASM_SH_IO_H */ diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h index 5f8d05cc36d..0c5d86cb3a9 100644 --- a/include/asm-sparc/io.h +++ b/include/asm-sparc/io.h @@ -90,4 +90,9 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) } +static inline phys_addr_t virt_to_phys(void * vaddr) +{ + return (phys_addr_t)(vaddr); +} + #endif -- cgit v1.3.1 From 63240ba88cd6a220057a0f28e5bf97f5b17ac84b Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sat, 13 Dec 2008 17:20:28 -0600 Subject: Introduce addr_map library Add a library that helps in translating between virtual and physical addresses. This library can be useful as a simple means to implement map_physmem() and virt_to_phys() for platforms that need functionality beyond the simple 1:1 mapping. Signed-off-by: Kumar Gala --- include/addr_map.h | 29 ++++++++++++++++++ lib_generic/Makefile | 1 + lib_generic/addr_map.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 111 insertions(+) create mode 100644 include/addr_map.h create mode 100644 lib_generic/addr_map.c (limited to 'include') diff --git a/include/addr_map.h b/include/addr_map.h new file mode 100644 index 00000000000..d55f5f64e10 --- /dev/null +++ b/include/addr_map.h @@ -0,0 +1,29 @@ +#ifndef __ADDR_MAP_H +#define __ADDR_MAP_H + +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +extern phys_addr_t addrmap_virt_to_phys(void *vaddr); +extern unsigned long addrmap_phys_to_virt(phys_addr_t paddr); +extern void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, + phys_size_t size, int idx); + +#endif diff --git a/lib_generic/Makefile b/lib_generic/Makefile index d62c39bef76..3f040226e0e 100644 --- a/lib_generic/Makefile +++ b/lib_generic/Makefile @@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)libgeneric.a +COBJS-$(CONFIG_ADDR_MAP) += addr_map.o COBJS-y += bzlib.o COBJS-y += bzlib_crctable.o COBJS-y += bzlib_decompress.o diff --git a/lib_generic/addr_map.c b/lib_generic/addr_map.c new file mode 100644 index 00000000000..ff8532cf152 --- /dev/null +++ b/lib_generic/addr_map.c @@ -0,0 +1,81 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +static struct { + phys_addr_t paddr; + phys_size_t size; + unsigned long vaddr; +} address_map[CONFIG_SYS_NUM_ADDR_MAP]; + +phys_addr_t addrmap_virt_to_phys(void * vaddr) +{ + int i; + + for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++) { + u64 base, upper, addr; + + if (address_map[i].size == 0) + continue; + + addr = (u64)((u32)vaddr); + base = (u64)(address_map[i].vaddr); + upper = (u64)(address_map[i].size) + base - 1; + + if (addr >= base && addr <= upper) { + return addr - address_map[i].vaddr + address_map[i].paddr; + } + } + + return (phys_addr_t)(~0); +} + +unsigned long addrmap_phys_to_virt(phys_addr_t paddr) +{ + int i; + + for (i = 0; i < CONFIG_SYS_NUM_ADDR_MAP; i++) { + u64 base, upper, addr; + + if (address_map[i].size == 0) + continue; + + addr = (u64)paddr; + base = (u64)(address_map[i].paddr); + upper = (u64)(address_map[i].size) + base - 1; + + if (addr >= base && addr <= upper) { + return paddr - address_map[i].paddr + address_map[i].vaddr; + } + } + + return (unsigned long)(~0); +} + +void addrmap_set_entry(unsigned long vaddr, phys_addr_t paddr, + phys_size_t size, int idx) +{ + if (idx > CONFIG_SYS_NUM_ADDR_MAP) + return; + + address_map[idx].vaddr = vaddr; + address_map[idx].paddr = paddr; + address_map[idx].size = size; +} -- cgit v1.3.1 From ecf5f077c8e77454f532eaac3e3afb7cfc48c62d Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Wed, 3 Dec 2008 11:28:30 -0600 Subject: i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functions All implementations of the functions i2c_reg_read() and i2c_reg_write() are identical. We can save space and simplify the code by converting these functions into inlines and putting them in i2c.h. Signed-off-by: Timur Tabi Acked-By: Jean-Christophe PLAGNIOL-VILLARD --- cpu/arm920t/at91rm9200/i2c.c | 14 ---------- cpu/arm926ejs/davinci/i2c.c | 17 ------------ cpu/blackfin/i2c.c | 16 ----------- cpu/mpc512x/i2c.c | 17 ------------ cpu/mpc5xxx/i2c.c | 16 ----------- cpu/mpc8220/i2c.c | 16 ----------- cpu/mpc824x/drivers/i2c/i2c.c | 14 ---------- cpu/mpc8260/i2c.c | 16 ----------- cpu/mpc8xx/i2c.c | 33 ----------------------- cpu/ppc4xx/i2c.c | 20 -------------- cpu/pxa/i2c.c | 15 ----------- drivers/i2c/fsl_i2c.c | 16 ----------- drivers/i2c/soft_i2c.c | 19 ------------- include/i2c.h | 62 +++++++++++++++++++++++++++++++++++++++++-- 14 files changed, 60 insertions(+), 231 deletions(-) (limited to 'include') diff --git a/cpu/arm920t/at91rm9200/i2c.c b/cpu/arm920t/at91rm9200/i2c.c index b68c5dd8263..9fd72d3977b 100644 --- a/cpu/arm920t/at91rm9200/i2c.c +++ b/cpu/arm920t/at91rm9200/i2c.c @@ -189,20 +189,6 @@ i2c_init(int speed, int slaveaddr) return; } -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - unsigned char buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return(buf); -} - -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - int i2c_set_bus_speed(unsigned int speed) { return -1; diff --git a/cpu/arm926ejs/davinci/i2c.c b/cpu/arm926ejs/davinci/i2c.c index d220a4c728e..3ba20ef1869 100644 --- a/cpu/arm926ejs/davinci/i2c.c +++ b/cpu/arm926ejs/davinci/i2c.c @@ -331,21 +331,4 @@ int i2c_write(u_int8_t chip, u_int32_t addr, int alen, u_int8_t *buf, int len) return(0); } - -u_int8_t i2c_reg_read(u_int8_t chip, u_int8_t reg) -{ - u_int8_t tmp; - - i2c_read(chip, reg, 1, &tmp, 1); - return(tmp); -} - - -void i2c_reg_write(u_int8_t chip, u_int8_t reg, u_int8_t val) -{ - u_int8_t tmp; - - i2c_write(chip, reg, 1, &tmp, 1); -} - #endif /* CONFIG_DRIVER_DAVINCI_I2C */ diff --git a/cpu/blackfin/i2c.c b/cpu/blackfin/i2c.c index 60f03d47a15..2a3e2238c36 100644 --- a/cpu/blackfin/i2c.c +++ b/cpu/blackfin/i2c.c @@ -425,20 +425,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) } -uchar i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - PRINTD("i2c_reg_read: chip=0x%02x, reg=0x%02x\n", chip, reg); - i2c_read(chip, reg, 0, &buf, 1); - return (buf); -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - PRINTD("i2c_reg_write: chip=0x%02x, reg=0x%02x, val=0x%02x\n", chip, - reg, val); - i2c_write(chip, reg, 0, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc512x/i2c.c b/cpu/mpc512x/i2c.c index 77a6f0dc48f..4f6bc864048 100644 --- a/cpu/mpc512x/i2c.c +++ b/cpu/mpc512x/i2c.c @@ -382,23 +382,6 @@ Done: return ret; } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - i2c_read (chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write (uchar chip, uchar reg, uchar val) -{ - i2c_write (chip, reg, 1, &val, 1); - - return; -} - - int i2c_set_bus_num (unsigned int bus) { if (bus >= I2C_BUS_CNT) { diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c index 4d16bbe7741..7d76274ad33 100644 --- a/cpu/mpc5xxx/i2c.c +++ b/cpu/mpc5xxx/i2c.c @@ -380,20 +380,4 @@ Done: return ret; } -uchar i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - i2c_read(chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - i2c_write(chip, reg, 1, &val, 1); - - return; -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc8220/i2c.c b/cpu/mpc8220/i2c.c index d67936dc31c..76ecdf11e21 100644 --- a/cpu/mpc8220/i2c.c +++ b/cpu/mpc8220/i2c.c @@ -387,20 +387,4 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buf, int len) return ret; } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - i2c_read (chip, reg, 1, &buf, 1); - - return buf; -} - -void i2c_reg_write (uchar chip, uchar reg, uchar val) -{ - i2c_write (chip, reg, 1, &val, 1); - - return; -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc824x/drivers/i2c/i2c.c b/cpu/mpc824x/drivers/i2c/i2c.c index 854345e146e..637ae4c1b10 100644 --- a/cpu/mpc824x/drivers/i2c/i2c.c +++ b/cpu/mpc824x/drivers/i2c/i2c.c @@ -267,18 +267,4 @@ int i2c_probe (uchar chip) return i2c_read (chip, 0, 1, (uchar *) &tmp, 1); } -uchar i2c_reg_read (uchar i2c_addr, uchar reg) -{ - uchar buf[1]; - - i2c_read (i2c_addr, reg, 1, buf, 1); - - return (buf[0]); -} - -void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write (i2c_addr, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c index c12463994fd..35cf8f14346 100644 --- a/cpu/mpc8260/i2c.c +++ b/cpu/mpc8260/i2c.c @@ -753,22 +753,6 @@ i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return 0; } -uchar -i2c_reg_read(uchar chip, uchar reg) -{ - uchar buf; - - i2c_read(chip, reg, 1, &buf, 1); - - return (buf); -} - -void -i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - i2c_write(chip, reg, 1, &val, 1); -} - #if defined(CONFIG_I2C_MULTI_BUS) /* * Functions for multiple I2C bus handling diff --git a/cpu/mpc8xx/i2c.c b/cpu/mpc8xx/i2c.c index 29c7c71bbc4..338cababe89 100644 --- a/cpu/mpc8xx/i2c.c +++ b/cpu/mpc8xx/i2c.c @@ -42,19 +42,6 @@ DECLARE_GLOBAL_DATA_PTR; /* define to enable debug messages */ #undef DEBUG_I2C -/*----------------------------------------------------------------------- - * Set default values - */ -#ifndef CONFIG_SYS_I2C_SPEED -#define CONFIG_SYS_I2C_SPEED 50000 -#endif - -#ifndef CONFIG_SYS_I2C_SLAVE -#define CONFIG_SYS_I2C_SLAVE 0xFE -#endif -/*----------------------------------------------------------------------- - */ - /* tx/rx timeout (we need the i2c early, so we don't use get_timer()) */ #define TOUT_LOOP 1000000 @@ -717,24 +704,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return 0; } -uchar -i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return (buf); -} - -void -i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - - i2c_write(i2c_addr, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c index 9073ee240bb..9d416ca5e8f 100644 --- a/cpu/ppc4xx/i2c.c +++ b/cpu/ppc4xx/i2c.c @@ -419,26 +419,6 @@ int i2c_write(uchar chip, uint addr, int alen, uchar * buffer, int len) return (i2c_transfer(0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0); } -/*----------------------------------------------------------------------- - * Read a register - */ -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return (buf); -} - -/*----------------------------------------------------------------------- - * Write a register - */ -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - #if defined(CONFIG_I2C_MULTI_BUS) /* * Functions for multiple I2C bus handling diff --git a/cpu/pxa/i2c.c b/cpu/pxa/i2c.c index 08042be1c11..6b72ba13a09 100644 --- a/cpu/pxa/i2c.c +++ b/cpu/pxa/i2c.c @@ -455,19 +455,4 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) } -uchar i2c_reg_read (uchar chip, uchar reg) -{ - uchar buf; - - PRINTD(("i2c_reg_read(chip=0x%02x, reg=0x%02x)\n",chip,reg)); - i2c_read(chip, reg, 1, &buf, 1); - return (buf); -} - -void i2c_reg_write(uchar chip, uchar reg, uchar val) -{ - PRINTD(("i2c_reg_write(chip=0x%02x, reg=0x%02x, val=0x%02x)\n",chip,reg,val)); - i2c_write(chip, reg, 1, &val, 1); -} - #endif /* CONFIG_HARD_I2C */ diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 3b5c06ba65f..ce646fd7ed1 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -367,22 +367,6 @@ i2c_probe(uchar chip) return i2c_read(chip, 0, 0, NULL, 0); } -uchar -i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf[1]; - - i2c_read(i2c_addr, reg, 1, buf, 1); - - return buf[0]; -} - -void -i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - int i2c_set_bus_num(unsigned int bus) { #ifdef CONFIG_SYS_I2C2_OFFSET diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index d2a51426e99..f12dedf89a9 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -435,22 +435,3 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) return(failures); } -/*----------------------------------------------------------------------- - * Read a register - */ -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return(buf); -} - -/*----------------------------------------------------------------------- - * Write a register - */ -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} diff --git a/include/i2c.h b/include/i2c.h index 8d6f867422c..fad2d571616 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -76,6 +76,20 @@ # define I2C_SOFT_DECLARATIONS # endif #endif + +#ifdef CONFIG_8xx +/* Set default values for the I2C bus speed and slave address on 8xx. In the + * future, we'll define these in all 8xx board config files. + */ +#ifndef CONFIG_SYS_I2C_SPEED +#define CONFIG_SYS_I2C_SPEED 50000 +#endif + +#ifndef CONFIG_SYS_I2C_SLAVE +#define CONFIG_SYS_I2C_SLAVE 0xFE +#endif +#endif + /* * Initialization, must be called once on start up, may be called * repeatedly to change the speed and slave addresses. @@ -132,8 +146,52 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); /* * Utility routines to read/write registers. */ -uchar i2c_reg_read (uchar chip, uchar reg); -void i2c_reg_write(uchar chip, uchar reg, uchar val); +static inline u8 i2c_reg_read(u8 addr, u8 reg) +{ + u8 buf; + +#ifdef CONFIG_8xx + /* MPC8xx needs this. Maybe one day we can get rid of it. */ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif + +#ifdef DEBUG + printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg); +#endif + +#ifdef CONFIG_BLACKFIN + /* This ifdef will become unneccessary in a future version of the + * blackfin I2C driver. + */ + i2c_read(addr, reg, 0, &buf, 1); +#else + i2c_read(addr, reg, 1, &buf, 1); +#endif + + return buf; +} + +static inline void i2c_reg_write(u8 addr, u8 reg, u8 val) +{ +#ifdef CONFIG_8xx + /* MPC8xx needs this. Maybe one day we can get rid of it. */ + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +#endif + +#ifdef DEBUG + printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n", + __func__, addr, reg, val); +#endif + +#ifdef CONFIG_BLACKFIN + /* This ifdef will become unneccessary in a future version of the + * blackfin I2C driver. + */ + i2c_write(addr, reg, 0, &val, 1); +#else + i2c_write(addr, reg, 1, &val, 1); +#endif +} /* * Functions for setting the current I2C bus and its speed -- cgit v1.3.1 From 455ae7e87f67c44e6aea68865c83acadd3fcd36c Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 16 Dec 2008 01:02:17 +0100 Subject: Coding style cleanup, update CHANGELOG. Signed-off-by: Wolfgang Denk --- CHANGELOG | 2668 ++++++++++++++++++++++++++++++++++++++++ board/afeb9260/partition.c | 1 - common/cmd_ubi.c | 2 +- cpu/mcf52x2/cpu_init.c | 2 +- cpu/mpc86xx/start.S | 2 - cpu/ppc4xx/cpu.c | 1 - cpu/ppc4xx/start.S | 2 +- drivers/i2c/soft_i2c.c | 1 - drivers/mtd/ubi/crc32.c | 2 +- drivers/mtd/ubi/io.c | 2 +- drivers/mtd/ubi/vmt.c | 2 +- include/configs/PMC440.h | 2 +- include/configs/afeb9260.h | 1 - include/linux/crc32.h | 8 +- include/linux/mtd/partitions.h | 6 +- include/linux/mtd/ubi.h | 2 +- include/ubi_uboot.h | 2 +- 17 files changed, 2684 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/CHANGELOG b/CHANGELOG index 59269788741..0c9c0479c83 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,2671 @@ +commit 84bc72d90c505fec3ef4b693995407a0bd4064e5 +Author: Mike Frysinger +Date: Thu Dec 11 18:39:08 2008 -0500 + + spi/stmicro: fix debug() display of cmd + + The stmicro_wait_ready() func tries to show the actual opcode that was sent + to the device, but instead it displays the array pointer. Fix it to pull + out the opcode from the start of the array. + + Signed-off-by: Mike Frysinger + +commit 5b3375ac8c36c29c87abb132fede0509eb21e5c9 +Author: Mike Frysinger +Date: Thu Dec 11 06:23:37 2008 -0500 + + env_sf: support embedded environments + + If both CONFIG_ENV_SECT_SIZE and CONFIG_ENV_SIZE are defined, and the sect + size is larger than the env size, then it means the env is embedded in a + block. So we have to save/restore the part of the sector which is not the + environment. Previously, saving the environment in SPI flash in this + setup would probably brick the board as the rest of the sector tends to + contain actual U-Boot data/code. + + Signed-off-by: Mike Frysinger + Acked-by: Haavard Skinnemoen + +commit ecf5f077c8e77454f532eaac3e3afb7cfc48c62d +Author: Timur Tabi +Date: Wed Dec 3 11:28:30 2008 -0600 + + i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functions + + All implementations of the functions i2c_reg_read() and + i2c_reg_write() are identical. We can save space and simplify the + code by converting these functions into inlines and putting them in + i2c.h. + + Signed-off-by: Timur Tabi + Acked-By: Jean-Christophe PLAGNIOL-VILLARD + +commit e39cd81c44740d7355d277ed3d38536cbe1e003d +Author: Dave Liu +Date: Fri Dec 5 15:36:14 2008 +0800 + + lib_ppc: rework the flush_cache + + - It is possible to miss flush/invalidate the last + cache line, we fix it at here. + - add the volatile and memory clobber. + + They are pointed by Scott Wood. + + Signed-off-by: Dave Liu + +commit 63240ba88cd6a220057a0f28e5bf97f5b17ac84b +Author: Kumar Gala +Date: Sat Dec 13 17:20:28 2008 -0600 + + Introduce addr_map library + + Add a library that helps in translating between virtual and physical + addresses. This library can be useful as a simple means to implement + map_physmem() and virt_to_phys() for platforms that need functionality + beyond the simple 1:1 mapping. + + Signed-off-by: Kumar Gala + +commit 65e43a10631537dcb92c302d36301a12308216c3 +Author: Kumar Gala +Date: Sat Dec 13 17:20:27 2008 -0600 + + Introduce virt_to_phys() + + virt_to_phys() returns the physical address given a virtual. In most + cases this will be just the input value as the vast majority of + systems run in a 1:1 mode. + + However in systems that are not running this way it should report the + physical address or ~0 if no mapping exists for the given virtual + address. + + Signed-off-by: Kumar Gala + +commit 45845301af3de8675c1f7bbc815c6de35452605a +Author: Yuri Tikhonov +Date: Sun Dec 7 22:12:50 2008 +0100 + + POST Make: fix the sub-dir dependencies missing. + + Signed-off-by: Yuri Tikhonov + +commit 22525779cb51f1bbe4e96fea7b778de1935a5a69 +Author: Martin Michlmayr +Date: Wed Aug 6 14:44:05 2008 +0300 + + Fix a typo in fw_env.config + + Reported-by: Martin Michlmayr + Signed-off-by: Wolfgang Denk + +commit ba490b7761c62b549c222a9723e532dc801a3899 +Author: Peter Tyser +Date: Mon Dec 1 16:22:45 2008 -0600 + + Remove unused CONFIG_ADDR_STREAMING defines + + Signed-off-by: Peter Tyser + +commit d16da93430520d3e46c1ab52eedacf36ab7a2311 +Author: Peter Tyser +Date: Mon Nov 24 11:54:47 2008 -0600 + + cmd_mem: Remove unused variable + + Signed-off-by: Peter Tyser + +commit 3aed3aa2c128ce9fb39ca3f4e9385a7499e93dbf +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Dec 14 10:29:39 2008 +0100 + + Fix new found CFG_ + + Also fix some minor typos. + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Wolfgang Denk + +commit 0e0c862efe7279e9609db74d758cd1b84c6c7209 +Author: Sergei Poselenov +Date: Fri Sep 19 12:07:34 2008 +0200 + + Remove compiler warning: target CPU does not support interworking + + This warning is issued by modern ARM-EABI GCC on non-thumb targets. + + Signed-off-by: Vladimir Panfilov + Signed-off-by: Sergei Poselenov + +commit cd6734510a9ff0f41c4a73567d4080ea0033d2c1 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Mon Nov 24 13:33:51 2008 +0100 + + Fix FIT and FDT support to have CONFIG_OF_LIBFDT and CONFIG_FIT independent + + FDT support is used for both FIT style images and for architectures + that can pass a fdt blob to an OS (ppc, m68k, sparc). + + For other architectures and boards which do not pass a fdt blob to an + OS but want to use the new uImage format, we just need FIT support. + + Now we can have the 4 following configurations : + + 1) FIT only CONFIG_FIT + 2) fdt blob only CONFIG_OF_LIBFDT + 3) both CONFIG_OF_LIBFDT & CONFIG_FIT + 4) none none + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 19ef4f7a6ef3b725aa9fe4b4f5fb676a84160172 +Author: Matthias Fuchs +Date: Wed Dec 10 15:13:32 2008 +0100 + + ppc4xx: Disable EEPROM write access on PMC440 boards + + This patch disables EEPROM wrtie access by default on PMC440 board. + + Signed-off-by: Matthias Fuchs + +commit 5b67a1439a73ba6c34007d9ff60a2c6aa90265df +Author: Matthias Fuchs +Date: Wed Dec 10 15:12:56 2008 +0100 + + ppc4xx: Fix Ethernet PHY LED configuration on PMC440 boards + + Signed-off-by: Matthias Fuchs + +commit 71fa0714fe5134bc8718c38d5261d267e88582ba +Author: Stefan Roese +Date: Tue Nov 18 16:36:12 2008 +0100 + + MIPS: Flush data cache upon relocation + + This patch now adds a flush to the data cache upon relocation. The + current implementation is missing this. Only a comment states that it + should be done. So let's really do it now. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit 44174343688dba32571a34550dba08971c65fef1 +Author: Stefan Roese +Date: Tue Nov 18 16:36:22 2008 +0100 + + MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT + + This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This + enables support for boards where the lowlevel initialization is + already done when U-Boot runs (e.g. via OnChip ROM). + + This will be used in the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit db08ecaa6eb8176904b3bae103a85ee8f735dc40 +Author: Stefan Roese +Date: Wed Nov 12 13:18:02 2008 +0100 + + MIPS: Add board_early_init_f() to init_sequence + + This patch adds the board_early_init_f() call to the MIPS init + sequence. A weak dummy implementation is also added which can be + overridden by a board specific version. + + This will be used by the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit 9d23fc584c4b7b8bb9ecbee48920b1b04b08fa1b +Author: Stefan Roese +Date: Wed Nov 12 13:18:19 2008 +0100 + + MIPS: Add onenand_init() to board.c and move nand_init() + + This patch adds a call to onenand_init() for OneNAND support and moves + the nand_init() call to an earlier place, so that the environment can + be used from NAND and OneNAND. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit d8bbc51c7ba9b737a20984333d19fe28a3526431 +Author: Nobuhiro Iwamatsu +Date: Tue Dec 9 11:32:46 2008 +0900 + + sh: Update sh2/sh2a timer + + Renesas SH2/SH2A timer broken. + This patch fix timer function. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit a319f1496210117b73198e3d889ffffaf6825d00 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Dec 5 07:27:37 2008 +0100 + + sh: r2dplus fix register access + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 4d4a96055f6917335a89dbdf2e5556fa5ac329f6 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 2 07:40:03 2008 +0100 + + sh: r2dplus/lowlevel_init: coding style fix + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit c54b9a42d8f5ab5b2a039b3a2e6fde8b427745e5 +Author: Nobuhiro Iwamatsu +Date: Tue Nov 25 11:05:19 2008 +0900 + + sh: Changed value of CACHE_OC_NUM_ENTRIES and CACHE_OC_WAY_SHIFT + + SH4 is different a value of CACHE_OC_NUM_ENTRIES and + CACHE_OC_WAY_SHIFT every CPU. + This patch corrects these values. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit e9d5f35497885b3c65d494d09a525d443dcccd3b +Author: Nobuhiro Iwamatsu +Date: Thu Nov 20 16:44:42 2008 +0900 + + sh: Update sh timer function + + Change to write/readX function and fix timer problem. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit b81786cff476c41e332eaeb679158f6527cd67d4 +Author: Nobuhiro Iwamatsu +Date: Tue Nov 4 11:58:58 2008 +0900 + + sh: Migo-R: Update BSC value + + A value of BSC CS4 was wrong, Fixed it. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 5783758fd260a02f44566ad8f29f899565cd0403 +Author: Nobuhiro Iwamatsu +Date: Mon Nov 17 16:52:09 2008 +0900 + + sh: Update ms7722se board config + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 15e2697c9f7fb2ba672a1a70f07cd6d9d4e92b51 +Author: Nobuhiro Iwamatsu +Date: Mon Nov 17 16:53:09 2008 +0900 + + sh: Update SuperH serial driver + + The address of SCFSR register is wrong at SH7720/SH7721. + This patch fix this. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Nobuhiro Iwamatsu + +commit 9a1d3557dcd47365c12eeab584b822e57d994352 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Nov 11 22:20:15 2008 +0100 + + sh: fix rsk7203 and MigoR out of tree build + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 1951f847f0a851853871b613ad7cf21a5242226c +Author: Matthias Fuchs +Date: Wed Dec 10 14:41:25 2008 +0100 + + ppc4xx: Update TEXT_BASE for CPCI405 boards + + This patch fixes building U-Boot for CPCI405 boards. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 8c92af7b2fbd60ae87379477f93c7ec9441b7452 +Author: Stefan Roese +Date: Tue Dec 9 20:08:01 2008 +0100 + + ppc4xx: Remove some features from ALPR to fit into 256k again + + Signed-off-by: Stefan Roese + +commit 3b089e4f889a2902449d55e081c886ae607cae89 +Author: Stefan Roese +Date: Wed Dec 10 10:32:59 2008 +0100 + + UBI: Set ubi_dev.type back to DEV_TYPE_NONE upon failing initialization + + With this patch we set the type back to NONE upon failing UBI partition + initialization. Otherwise further calls to the UBI subsystem would try + to really access the non-existing UBI partition. + + Thanks to Michael Lawnick for pointing this out. + + Signed-off-by: Stefan Roese + +commit 817329351639a8895cd9b87b33aeff043f3d5a44 +Author: Stefan Roese +Date: Wed Dec 10 10:28:33 2008 +0100 + + UBI: Return -ENOMEM upon failing malloc + + Return with correct error code (-ENOMEM) from ubi_attach_mtd_dev() upon + failing malloc(). + + Signed-off-by: Stefan Roese + +commit 2145188bea2df8f2b47a87ec3071b55027e8d0ae +Author: Ben Warren +Date: Tue Dec 9 23:34:15 2008 -0800 + + Fix compile error in building MBX860T. + + Signed-off-by: Ben Warren + +commit 8fab49ea911fe925392fa5afcc9bc7373a3d0cee +Author: Michal Simek +Date: Tue Nov 25 11:42:20 2008 +0100 + + microblaze: Remove XUPV2P board + + --- + + Microblaze platforms use generic settings and to have + many platforms is confusing that's why I decided to remove this + platform from U-BOOT. ml401 tree is sufficient for covering + all Microblaze platforms. + + This change will go through microblaze custodian tree. + +commit 99ba6f353582720defff6e6e6761dc455a207d31 +Author: Michal Simek +Date: Mon Nov 24 18:25:41 2008 +0100 + + microblaze: Remove CONFIG_LIBFDT due to error in common files + +commit e7d591e823a991513833af7030468409e25a3b13 +Author: Michal Simek +Date: Mon Nov 24 11:43:00 2008 +0100 + + microblaze: Fix ml401 uart16550 setting + + Signed-off-by: Michal Simek + +commit c85ff0553a8cfbcca51c15b947e1ed55d3810a39 +Author: Michal Simek +Date: Mon Nov 24 11:38:22 2008 +0100 + + microblaze: Set up relocation is done + +commit bcb6dd9187d4b23c748704767bd12d20c829e996 +Author: Mike Frysinger +Date: Tue Dec 9 23:20:31 2008 -0500 + + tools/netconsole: new script for working with netconsole over UDP + + While the doc/README.NetConsole does have a snippet for people to + create their own netcat script, it's a lot easier to make a simple + dedicated script and tell people to use it. + + Also spruce it up a bit to make it user friendly. + + Signed-off-by: Mike Frysinger + +commit 8c5170a7d088601d5f30d85093388dab1f1e8ec0 +Author: Sonic Zhang +Date: Tue Dec 9 23:20:18 2008 -0500 + + fs/fat: handle FAT on SATA + + The FAT file system driver should also handle FAT on SATA devices. + + Signed-off-by: Sonic Zhang + Signed-off-by: Mike Frysinger + +commit 97a24a78ee6f34b89b821cb70eda1cf34aa11d97 +Author: Jerry Van Baren +Date: Mon Nov 24 08:15:02 2008 -0500 + + libfdt: Fix redefined uintptr_t warning for USE_HOSTCC + + Compiling U-Boot in an old OS environment (RedHat-7.3 :-) gives the + following warnings from FDT: + + include/libfdt_env.h:50: warning: redefinition of 'uintptr_t' + /usr/include/stdint.h:129: warning: 'uintptr_t' previously declared here + + Fix: Protect the definition of uintptr_t when compiling on the host + system. + + Signed-off-by: Gerald Van Baren + +commit 1fc2b165c51d6f40c8d505f1b3eaefdb6599b17b +Author: Graeme Russ +Date: Sat Nov 22 08:43:29 2008 +1100 + + Moved sc520 PCI definitions to stand-alone file + + Signed Off By: Graeme Russ + +commit 1f5070c0c18fa5684bfce09c8abdf10c04ed48fa +Author: Graeme Russ +Date: Sat Nov 22 08:43:21 2008 +1100 + + Fixed path to sc520 SSI include file + + Signed Off By: Graeme Russ + +commit d4f70da544c33db3e4fce6473dea4ecca4322545 +Author: Graeme Russ +Date: Fri Nov 21 06:28:05 2008 +1100 + + Fixed build error due to #define of _LINUX_STRING_H_ in 82559_eeprom.c + + Signed-off-by: Graeme Russ + +commit c034075a713b60e654c64e88e87da29440f31bb4 +Author: Stefan Roese +Date: Wed Nov 12 13:30:10 2008 +0100 + + serial: Add vcth UART driver + + This patch adds the UART driver for the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + +commit 142a80ffc3b537a9c45acd2444a42a77f147c602 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:36 2008 +0300 + + jffs2: cache data_crc results + + As we moved data_crc() invocation from jffs2_1pass_build_lists() to + jffs2_1pass_read_inode() data_crc is going to be calculated on each + inode access. This patch adds caching of data_crc() results. There + is no significant improvement in speed (because of flash access + caching added in previous patch I think, crc in RAM is really fast) + but this patch impacts memory usage -- every b_node structure uses + 12 bytes instead of 8. + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 9b7076229ec6a958bd835ab70745f7676297ce82 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:35 2008 +0300 + + jffs2: summary support + + This patch adds support for reading fs information from summary + node instead of scanning full eraseblock. + + Signed-off-by: Ilya Yanok + +commit 70741004dc28946cd82c7af6789c4ddb3fc94526 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:34 2008 +0300 + + jffs2: add buffer to cache flash accesses + + With this patch JFFS2 code allocates memory buffer of max_totlen size + (size of the largest node, calculated during scan time) and uses it to + store entire node. Speeds up loading. If malloc fails we use old ways + to do things. + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 8a36d31f72411144ac0412ee7e1880e801acd754 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:33 2008 +0300 + + jffs2: rewrite jffs2 scanning code based on Linux one + + Rewrites jffs2_1pass_build_lists() function in style of Linux's + jffs2_scan_medium() and jffs2_scan_eraseblock(). + This includes: + - Caching flash acceses + - Smart dealing with free space + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit e0b5532579eda8b4629f1b4f6e49c3cc60f52237 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:32 2008 +0300 + + jffs2: add sector_size field to part_info structure + + This patch adds sector_size field to part_info structure (used + by new JFFS2 code). + + Signed-off-by: Ilya Yanok + +commit f73846956778a7dfee83403ef9747aff77198848 +Author: Ilya Yanok +Date: Thu Nov 13 19:49:31 2008 +0300 + + jffs2: fix searching for latest version in jffs2_1pass_list_inodes() + + We need to update i_version inside cycle to find really latest version + inside jffs2_1pass_list_inodes(). With that fixed we can use isize inside + dump_inode() instead of calling expensive jffs2_1pass_read_inode(). + + Signed-off-by: Alexey Neyman + Signed-off-by: Ilya Yanok + +commit 1113cb764b3da256ef8a1f9539f4efbe221ff3c4 +Author: Wolfgang Denk +Date: Tue Dec 9 23:13:51 2008 +0100 + + evb64260: fix "cast to pointer from integer of different size" warnings + + Signed-off-by: Wolfgang Denk + +commit d2776827315c3d469b8cb4cec14d58877798daa2 +Author: Stefan Althoefer +Date: Sun Dec 7 19:39:11 2008 +0100 + + USB: descriptor handling + + Hi, + + I found a bug when working with the u-boot USB subsystem on IXP425 processor + (big endian Xscale aka ARMv5). + I recognized that the second usb_endpoint_descriptor of the attached memory + stick was corrupted. + + The reason for this are the packed structures below (either u-boot and + u-boot-usb): + + -------------- + /* Endpoint descriptor */ + struct usb_endpoint_descriptor { + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bEndpointAddress; + unsigned char bmAttributes; + unsigned short wMaxPacketSize; + unsigned char bInterval; + unsigned char bRefresh; + unsigned char bSynchAddress; + + } __attribute__ ((packed)); + /* Interface descriptor */ + struct usb_interface_descriptor { + unsigned char bLength; + unsigned char bDescriptorType; + unsigned char bInterfaceNumber; + unsigned char bAlternateSetting; + unsigned char bNumEndpoints; + unsigned char bInterfaceClass; + unsigned char bInterfaceSubClass; + unsigned char bInterfaceProtocol; + unsigned char iInterface; + + unsigned char no_of_ep; + unsigned char num_altsetting; + unsigned char act_altsetting; + struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; + } __attribute__ ((packed)); + ------------ + + As usb_endpoint_descriptor is only 7byte in length, the start of all + odd ep_desc[] structures is not word aligned. This makes wMaxPacketSize + of these structures also not word aligned. + + ARMv5 Architecture however does not support non-aligned multibyte + data type (see A2.8 of ARM Architecture Reference Manual). + + Signed-off-by: Stefan Althoefer + Signed-off-by: Remy Böhmer + +commit 4c253fdb2a175ea3472c38a1455a16faa58e81f0 +Author: Kumar Gala +Date: Tue Dec 9 10:27:33 2008 -0600 + + drivers/fsl_pci_init: Fix compile warning + + fsl_pci_init.c: In function 'fsl_pci_setup_inbound_windows': + fsl_pci_init.c:122: warning: comparison is always true due to limited range of data type + + The check only makes sense if we are CONFIG_PHYS_64BIT + + Signed-off-by: Kumar Gala + +commit dedacc18a8c2b3951581eb721fa055a4e0ac4845 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Dec 7 09:45:35 2008 +0100 + + usbtty/omap: update to current API + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Remy Böhmer + +commit ee2e9ba917a62cc2e3a484bb79c8da0e01cb93ed +Author: Anatolij Gustschin +Date: Tue Dec 9 17:52:05 2008 +0100 + + video: fix FADS823 and RRvision compiling issues + + Since commit 561858ee building for FADS823 and RRvision + doesn't work. Let's include version.h and timestamp.h + unconditionally to fix the problem. + + Signed-off-by: Anatolij Gustschin + +commit 2d2e05727fe4013f807ffa814dff0e75259a1db4 +Author: Stefan Roese +Date: Tue Dec 2 10:53:47 2008 +0100 + + UBI: Fix size parsing in "ubi create" + + Signed-off-by: Stefan Roese + +commit 2ee951ba2ac9874d2a93d52e7a187d3184be937e +Author: Stefan Roese +Date: Thu Nov 27 14:07:09 2008 +0100 + + UBI: Enable re-initializing of the "ubi part" command + + With this patch now, the user can call "ubi part" multiple times to + re-connect the UBI device to another MTD partition. + + Signed-off-by: Stefan Roese + +commit 9def12cae33d2d3ea2dd56b197fd3dfb3ad60bf4 +Author: Stefan Roese +Date: Thu Nov 27 14:05:15 2008 +0100 + + MTD: Fix problem based on non-working relocation (list head mtd_partitions) + + Don't use LIST_HEAD() but initialize the struct via INIT_LIST_HEAD() upon + first call of add_mtd_partitions(). Otherwise this won't work on platforms + where the relocation is broken (like MIPS or PPC). + + Signed-off-by: Stefan Roese + +commit 5e3ab68e9acf9edf304b8aa32ad7e005483a2c47 +Author: Trent Piepho +Date: Wed Nov 12 17:29:48 2008 -0800 + + Section name should be ".data", not "data" + + Signed-off-by: Trent Piepho + Signed-off-by: Wolfgang Denk + +commit 7fa6a2f3b66579dea8bc1a9177646e1141731b15 +Author: Wolfgang Denk +Date: Tue Dec 9 00:39:08 2008 +0100 + + MAKEALL: Automatically use parallel builds + + Add logic to the MAKEALL script to determine the number of CPU cores + on the system, and run a parallel build if there is more than one. + Usually this significantrly accelerates builds. + + Allow to manually adjust the number of parallel make jobs by using + the "BUILD_NCPUS" environment variable. + + Signed-off-by: Wolfgang Denk + +commit 268405fa7c44156c5192a70779920c70906af8d6 +Author: Wolfgang Denk +Date: Tue Dec 9 00:24:30 2008 +0100 + + vxworks.h: Fix build problem introduced by commits 29a4c24d/e9084b23 + + Signed-off-by: Wolfgang Denk + +commit 153176a9414120ca1736f3cc4951623d6e14e6af +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Nov 11 06:08:59 2008 +0100 + + avr32/bootm: remove unused variable 'ret' + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Acked-by: Haavard Skinnemoen + +commit 434c51a5e62f608a2a78ed5398ac43a1c77cc183 +Author: Peter Tyser +Date: Wed Nov 12 13:06:48 2008 -0600 + + Remove unneeded CONFIG_SHELL references + + Make should be using the bash shell by default which makes + CONFIG_SHELL unnecessary + + Signed-off-by: Peter Tyser + +commit cf7a7b99794bac936899819b95539be1dbd71708 +Author: Peter Tyser +Date: Wed Nov 12 12:33:20 2008 -0600 + + Use bash for default GNU Make shell application + + Some Make script commands rely on bash-specific features like brace + expansion, so default to bash for the SHELL variable with a fallback + to the standard sh shell + + Signed-off-by: Peter Tyser + +commit 4b530018764934ad5689196e9aa5714a6f4d1a6c +Author: Heiko Schocher +Date: Wed Nov 12 09:50:45 2008 +0100 + + jffs2: rename devices_init () in common/jffs2.c + + rename devices_init () in common/jffs2.c to + jffs2_devices_init (), because there is also a + devices_init () in common/devices.c. + + Signed-off-by: Heiko Schocher + +commit af5eb847a10f1037590001355d88bab3fe7be48b +Author: Daniel Hellstrom +Date: Mon Nov 10 12:46:20 2008 +0000 + + SPARC: Fixed compiler error introduced by commit c160a9544743 + + This patch fixes a build error for the SPARC platform. It was + introduced by commit c160a9544743e80e8889edb2275538e7764ce334. + + Signed-off-by: Daniel Hellstrom + +commit 4c60259899aa00f59db0d936b8807f9a26411c0f +Author: Gary Jennejohn +Date: Sun Nov 9 12:50:59 2008 +0100 + + mgsuvd add the board-specific part of the HDLC driver + + Signed-off-by: Gary Jennejohn + +commit 534a4359666af48bd69a3743d8a8c2bdb1d3ec70 +Author: Gary Jennejohn +Date: Sun Nov 9 12:45:03 2008 +0100 + + mgcoge add the board-specific part of the HDLC driver + + Signed-off-by: Gary Jennejohn + +commit 135f5534538bb8ea4f38a7030da12187d22ef7e0 +Author: Gary Jennejohn +Date: Sun Nov 9 12:36:15 2008 +0100 + + keymile add the common parts of the HDLC driver + + This implements the ICN protocol used across the backplane and is + needed by all the keymile boards. + + Signed-off-by: Gary Jennejohn + +commit 1cb82a9207a550557399eabc7fe47f21bbd9ddf8 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Nov 7 22:46:22 2008 +0100 + + drivers/bios_emulator: Move conditional compilation to Makefile + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit bcdf1d2cf6b24fb905fd7da80da4b3c65a7995b5 +Author: Richard Retanubun +Date: Thu Nov 6 14:01:51 2008 -0500 + + common/cmd_ide.c: Corrected endian order printing for compact flash serial number. + + Corrected endian order printing for compact flash serial number. + + Signed-off-by: Richard Retanubun + +commit 16a28ef219c27423a1ef502f19070c4d375079b8 +Author: Gary Jennejohn +Date: Thu Nov 6 15:04:23 2008 +0100 + + IOMUX: Add console multiplexing support. + + Modifications to support console multiplexing. This is controlled using + CONFIG_SYS_CONSOLE_MUX in the board configuration file. + + This allows a user to specify multiple console devices in the environment + with a command like this: setenv stdin serial,nc. As a result, the user can + enter text on both the serial and netconsole interfaces. + + All devices - stdin, stdout and stderr - can be set in this manner. + + 1) common/iomux.c and include/iomux.h contain the environment setting + implementation. + 2) doc/README.iomux contains a somewhat more detailed description. + 3) The implementation in (1) is called from common/cmd_nvedit.c to + handle setenv and from common/console.c to handle initialization of + input/output devices at boot time. + 4) common/console.c also contains the code needed to poll multiple console + devices for input and send output to all devices registered for output. + 5) include/common.h includes iomux.h and common/Makefile generates iomux.o + when CONFIG_SYS_CONSOLE_MUX is set. + + Signed-off-by: Gary Jennejohn + +commit 774ce72026f74ac9641bcbbc588b20f2e13f7ab8 +Author: Mike Frysinger +Date: Tue Nov 4 16:03:46 2008 -0500 + + strings: use puts() rather than printf() + + When running `strings` on really long strings, the stack tends to get + smashed due to printf(). Switch to puts() instead since we're only passing + the data through. + + Signed-off-by: Mike Frysinger + +commit b03150b52e3c491a86a3cc0945274f0e8f9872e7 +Author: Niklaus Giger +Date: Mon Nov 3 22:16:18 2008 +0100 + + Use new CONFIG_SYS_VXWORKS parameters for Netstal boards + + Signed-off-by: Niklaus Giger + +commit 29a4c24de99d8cb4ac32991c04cab87ed94ca1f9 +Author: Niklaus Giger +Date: Mon Nov 3 22:15:34 2008 +0100 + + cmd_elf.c: Cleanup bootvx and handle new CONFIG_SYS_VXWORKS parameters + + - fix size too small by one in sprintf + - changed old (pre 2004) device name ibmEmac to emac + - boot device may be overriden in board config + - servername may be defined in board config + - additional parameters may be defined in board config + - fixed some line wrappings + - replaced redundant MAX define by max + + Signed-off-by: Niklaus Giger + +commit e9084b23d16102f44ace24379a1c0c352497ef80 +Author: Niklaus Giger +Date: Mon Nov 3 22:14:36 2008 +0100 + + Add vxworks.h to handle CONFIG_SYS_VXWORKS parameters + + Signed-off-by: Niklaus Giger + +commit 0b2f4ecad473d785959c7976f20d2a00bd0ee01f +Author: Niklaus Giger +Date: Mon Nov 3 22:13:47 2008 +0100 + + README: Document CONFIG_SYS parameters for vxworks + + Signed-off-by: Niklaus Giger + +commit ace514837cac656e29c37a19569cb8ea83071126 +Author: Peter Tyser +Date: Fri Oct 31 11:12:38 2008 -0500 + + lcd: Let the board code show board-specific info cleanup + + remove unneeded version.h from lcd.c + + Signed-off-by: Peter Tyser + Signed-off-by: Wolfgang Denk + +commit 561858ee7d0274c3e89dc98d4d0698cb6fcf6fd9 +Author: Peter Tyser +Date: Mon Nov 3 09:30:59 2008 -0600 + + Update U-Boot's build timestamp on every compile + + Use the GNU 'date' command to auto-generate a new U-Boot + timestamp on every compile. + + Signed-off-by: Peter Tyser + +commit 83ad179e2f0f625b88adb8ef5696709e46fb9077 +Author: Remy Bohmer +Date: Thu Dec 4 22:25:57 2008 +0100 + + Remove redundant armv4 flag from arm926ejs compile flags + + Currently the arm926ejs tree has the armv4 option set during compilation. + This flag does not belong here because a arm926 CPU is always a armv5 CPU. + + Signed-off-by: Remy Bohmer + +commit 89a7a87f084c657f8e32b513a77b50eca07e17ec +Author: Nicolas Ferre +Date: Sat Dec 6 13:11:14 2008 +0100 + + at91: Choose environment variables location within make config target + + This patch adds the possiblity to choose the media where the environment will + be located. This allow to choose this fundamental configuration without editing + config files. + + Documentation file added. + + Signed-off-by: Nicolas Ferre + Acked-by: Stelian Pop + Acked-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1450c4a6682378567030414a9f1198c39b7730c7 +Author: Anatolij Gustschin +Date: Mon Nov 3 15:30:34 2008 +0100 + + lwmon, tqm8xx: Fix build errors + + Commit 6b59e03e0237a40a2305ea385defdfd92000978b + lcd: Let the board code show board-specific info + + introduced some bugs which prevent U-Boot building + for lwmon board if CONFIG_LCD_INFO_BELOW_LOGO will + be defined in the board configuration. + + Also "LCD enabled" building for TQM823L doesn't work + since this commit. + + This patch fixes above-mentioned issues. + + Signed-off-by: Anatolij Gustschin + +commit bfa0af6b22ff25b0719a8910f9b6d1f975aa6fb0 +Author: Mike Frysinger +Date: Sun Nov 2 01:18:18 2008 -0400 + + ignore .gdb_history files + + When using gdb, history files will often get generated. So ignore them. + + Signed-off-by: Mike Frysinger + +commit c8aa7dfc18f7cc90d0aea6c7becbb67dfc5bba4b +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 31 12:26:55 2008 +0100 + + FPGA: move fpga drivers to drivers/fpga + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 6a86bb6c25376f0358478219fa28d7c84dd01ed0 +Author: Peter Tyser +Date: Mon Dec 1 16:29:38 2008 -0600 + + net: Fix TftpStart() ip:filename bug + + The TftpStart() function modifies the 'BootFile' + string when 'BootFile' contains both an IP address + and filename (eg 1.2.3.4:/path/file). This causes + subsequent calls to TftpStart to incorrectly parse + the TFTP filename and server IP address to use. + For example: + + => tftp 0x100000 10.52.0.62:/home/ptyser/non_existant + Speed: 100, half duplex + Using eTSEC1 device + TFTP from server 10.52.0.62; our IP address is 10.52.253.79 + ^^^^^^^^^^ CORRECT + Filename '/home/ptyser/non_existant'. + ^^^^^^^^^^^^^^^^^^^^^^^^^ CORRECT + Load address: 0x100000 + Loading: * + TFTP error: 'File not found' (1) + Starting again + + eTSEC2: No link. + Speed: 100, half duplex + Using eTSEC1 device + TFTP from server 10.52.0.33; our IP address is 10.52.253.79 + ^^^^^^^^^^ WRONG + Filename '10.52.0.62'. + ^^^^^^^^^^ WRONG + Load address: 0x100000 + Loading: * + TFTP error: 'File not found' (1) + Starting again + + TftpStart() was modified to not modify the 'BootFile' string. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit d32c5be50bf0600bfdc54223ef341ee9c63db445 +Author: Peter Tyser +Date: Mon Dec 1 16:26:21 2008 -0600 + + net: Add additional IP fragmentation check + + Ignore IP packets which have the "more fragments" flag bit + set. This flag indicates the IP packet is fragmented and + must be ignored by U-Boot. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit e0c07b868cab405ab4b5335a0247899bfc5ea0b6 +Author: Peter Tyser +Date: Mon Dec 1 16:26:20 2008 -0600 + + net: Define IP flag field values + + These defines were pulled from the "Add simple + IP/UDP fragmentation support" patch from Frank + Haverkamp . + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit 23afaba65ec5206757e589ef334a8b38168c045f +Author: Anatolij Gustschin +Date: Tue Dec 2 10:31:04 2008 +0100 + + net: tsec: Fix Marvell 88E1121R phy init + + This patch tries to ensure that phy interrupt pin + won't be asserted after booting. We experienced + following issues with current 88E1121R phy init: + + Marvell 88E1121R phy can be hardware-configured + to share MDC/MDIO and interrupt pins for both ports + P0 and P1 (e.g. as configured on socrates board). + Port 0 interrupt pin will be shared by both ports + in such configuration. After booting Linux and + configuring eth0 interface, port 0 phy interrupts + are enabled. After rebooting without proper eth0 + interface shutdown port 0 phy interrupts remain + enabled so any change on port 0 (link status, etc.) + cause assertion of the interrupt. Now booting Linux + and configuring eth1 interface will cause permanent + phy interrupt storm as the registered phy 1 interrupt + handler doesn't acknowledge phy 0 interrupts. This + of course should be fixed in Linux driver too. + + Signed-off-by: Anatolij Gustschin + Acked-by: Andy Fleming + Signed-off-by: Ben Warren + +commit 2e4970d8109d690adcf615d9e3cac7b5b2e8eaed +Author: Peter Tyser +Date: Tue Dec 2 12:59:51 2008 -0600 + + net: Fix download command parsing + + When CONFIG_SYS_HUSH_PARSER is defined network download + commands with 1 argument in the format 'tftp "/path/file"' + do not work as expected. The hush command parser strips + the quotes from "/path/file" which causes the network + commands to interpret "/path/file" as an address + instead of the intended filename. + + The previous check for a leading quote in netboot_common() + was replaced with a check which ensures only valid + numbers are treated as addresses. + + Signed-off-by: Peter Tyser + Signed-off-by: Ben Warren + +commit 3c2c2f427905040c1513d0c51d637689cba48346 +Author: Remy Bohmer +Date: Thu Nov 27 22:30:27 2008 +0100 + + Remove non-ascii characters from fat code + + This code contains some non-ascii characters in comment lines and code. + Most editors do not display those characters properly and editing those + files results always in diffs at these places which are usually not required + to be changed at all. This is error prone. + + So, remove those weird characters and replace them by normal C-style + equivalents for which the proper defines were already in the header. + + Signed-off-by: Remy Bohmer + +commit dc889e865356497d3e495570118c2245ebce2631 +Author: Dave Liu +Date: Fri Nov 28 20:16:58 2008 +0800 + + 85xx: fix the wrong DDR settings for MPC8572DS + + The default DDR freq is 400MHz or 800M data rate, + the old settings is pure wrong for the default case. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 9df59533f77de2829b4b66e5b7620e04edaa391c +Author: Kumar Gala +Date: Mon Nov 24 10:29:26 2008 -0600 + + 85xx: init gd as early as possible + + Moved up the initialization of GD so C code like set_tlb() can use + gd->flags to determine if we've relocated or not in the future. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit aed461af81012a398a205e9be67ab37667491838 +Author: Kumar Gala +Date: Mon Nov 24 10:29:25 2008 -0600 + + 85xx: Fix relocation of CCSRBAR + + If the virtual address for CCSRBAR is the same after relocation but + the physical address is changing we'd end up having two TLB entries with + the same VA. Instead we new us the new CCSRBAR virt address + 4k as a + temp virt address to access the old CCSRBAR to relocate it. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit ea154a1781135d822eedee7567cc156089eae93c +Author: Kumar Gala +Date: Mon Nov 24 10:25:14 2008 -0600 + + FSL: Moved BR_PHYS_ADDR for localbus to common header + + The BR_PHYS_ADDR macro is useful on all machines that have local bus + which is pretty much all 83xx/85xx/86xx chips. + + Additionally most 85xx & 86xx will need it if they want to support + 36-bit physical addresses. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 9427ccde0355a2ebf47454e8e1be59f5b9864e08 +Author: Peter Tyser +Date: Mon Dec 1 13:47:12 2008 -0600 + + 85xx: Add PORDEVSR_PCI1 define + + Add define used to determine if PCI1 interface is in PCI or PCIX mode. + + Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 + + Signed-off-by: Peter Tyser + Signed-off-by: Andy Fleming + +commit 35db1c6d34b57ae15e99cf03c8e8f8a6148d74f3 +Author: Becky Bruce +Date: Fri Nov 21 19:24:22 2008 -0600 + + drivers/fsl_pci_init: Fix inbound window mapping bug + + The current code will cause the creation of a 4GB window + starting at 0 if we have more than 4GB of RAM installed, + which overlaps with PCI_MEM space and causes pci_bus_to_phys() + to return erroneous information. Limit the size to 4GB - 1; + which causes the code to create one 2GB and one 1GB window + instead. + + Signed-off-by: Becky Bruce + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 5a105a333dab6a23e92d763ce76d6f31d57f45df +Author: Jon Loeliger +Date: Thu Nov 20 15:36:48 2008 -0600 + + Removed unused CONFIG_L1_INIT_RAM symbol. + + Prevent further viral propogation of the unused + symbol CONFIG_L1_INIT_RAM by just removing it. + + Signed-off-by: Jon Loeliger + Acked-by: Andy Fleming + +commit 7008d26a40a76f90cae5824c812cfed449fb97b8 +Author: Ed Swarthout +Date: Wed Oct 29 09:21:44 2008 -0500 + + fsl ddr skip interleaving if not supported. + + Removed while(1) hang if memctl_intlv_ctl is set wrong. + Remove embedded tabs from strings. + + Signed-off-by: Ed Swarthout + Acked-by: Kumar Gala + Acked-by: Andy Fleming + +commit dd332e18d082de75eca3fc2c7c778f5d4571a096 +Author: Anatolij Gustschin +Date: Thu Nov 13 18:08:57 2008 +0100 + + 85xx: socrates: fix DDR SDRAM tlb entry configuration + + since commit be0bd8234b9777ecd63c4c686f72af070d886517 + tlb entry for socrates DDR SDRAM will be reconfigured + by setup_ddr_tlbs() from initdram() causing an + inconsistency with previously configured DDR SDRAM tlb + entry from tlb_table: + + socrates>l2cam 7 9 + IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS + 7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX + 8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX + 9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX + + This patch makes the presence of the DDR SDRAM tlb entry in + the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this + inconsistency. + + Signed-off-by: Anatolij Gustschin + Acked-by: Andy Fleming + +commit a2cd50ed6ef0ac6b127b3d6db756979a8336718d +Author: Peter Tyser +Date: Tue Nov 11 10:17:10 2008 -0600 + + 85xx: Add CPU 2 errata workaround to all 8548 boards + + All mpc8548-based boards should implement the suggested workaround + to CPU 2 errata. Without the workaround, its possible for the + 8548's core to hang while executing a msync or mbar 0 instruction + and a snoopable transaction from an I/O master tagged to make + quick forward progress is present. + + Signed-off-by: Peter Tyser + Acked-by: Andy Fleming + +commit e57f0fa1333cdf3ca36110aac2900712a5f82976 +Author: Dave Liu +Date: Tue Oct 28 17:53:45 2008 +0800 + + 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM case + + we need TLB entry for DDR at !SPD case. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 +Author: Dave Liu +Date: Tue Oct 28 17:53:38 2008 +0800 + + 85xx: remove the unused ddr_enable_ecc in the board file + + The DDR controller of 8548/8544/8568/8572/8536 processors + have the ECC data init feature, and the new DDR code is + using the feature, and we don't need the way with DMA to + init memory any more. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 4a129a57d923f7c15aa1f567028a80a32d66a100 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Nov 30 19:36:53 2008 +0100 + + at91rm9200dk: Fix typo + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit ed3b18e05c9a8ffa5fb643da9bcec7452e5d5e01 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Nov 30 19:36:50 2008 +0100 + + AT91: remove non supported board AT91RM9200DF macro + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit bd876772ee04095e5dd943d97515a1f14bad4b1c +Author: Ilko Iliev +Date: Tue Dec 2 17:27:54 2008 +0100 + + mtd/dataflash.c: fix a problem with the last partition + + This patch fix the problem that only the [NB_DATAFLASH_AREA - 1] dataflash + partition can be defined to use the area to the end of dataflash size. + Now it is possible to have only one dataflash partition from 0 to the end + of of dataflash size. + + Signed-off-by: Ilko Iliev + +commit 03f797793b124dccaae145b977d15d6cb9e74504 +Author: Ilko Iliev +Date: Tue Dec 2 17:20:17 2008 +0100 + + fix some coding style violations. + + This patch fix some coding style violations. + + Signed-off-by: Ilko Iliev + +commit 5e46b1e54112f4b7fd5185665e571510132c12a7 +Author: Stefan Roese +Date: Thu Nov 27 14:11:37 2008 +0100 + + OneNAND: Add missing mtd info struct before calling onenand_erase() + + Without this patch "saveenv" crashes when MTD partitions are enabled (e.g. + for use in UBI) via CONFIG_MTD_PARTITIONS. + + Signed-off-by: Stefan Roese + Signed-off-by: Scott Wood + +commit 29382d4064fbaff5daacff4c3209370fa5713966 +Author: Becky Bruce +Date: Thu Nov 20 16:43:52 2008 -0600 + + mpc8641: Fix error in README + + I made some updates to the code that didn't make it into the + README - fix this + + Signed-off-by: Becky Bruce + +commit 801a194616d95e6fc426a176d9615ccbf9876c7f +Author: Jon Loeliger +Date: Thu Nov 20 12:01:02 2008 -0600 + + Removed unused CONFIG_L1_INIT_RAM symbol. + + Prevent further viral propogation of the unused + symbol CONFIG_L1_INIT_RAM by just removing it. + + Signed-off-by: Jon Loeliger + +commit f698738e46cb461e28c2d58228bb34a2fcf5a475 +Author: Jon Loeliger +Date: Thu Nov 20 14:02:56 2008 -0600 + + 86xx: Fix non-64-bit compilation problems. + + Introducing 64-bit (36-bit) support for the MPC8641HPCN + failed to accomodate the other two 86xx boards. + Introduce definitions for CONFIG_SYS_CCSRBAR_PHYS_{LOW,HIGH} + CONFIG_SYS_CCSR_DEFAULT_DBAT{U,L} and CONFIG_SYS_CCSR_DEFAULT_IBAT{U,L} + with nominal 32-bit values. + + Signed-off-by: Jon Loeliger + Acked-by: Becky Bruce + +commit bebfc6ef3ec994c8e18783269b1d8d41f8e38afd +Author: Michael Trimarchi +Date: Wed Nov 26 17:40:37 2008 +0100 + + Remove obsolete command (apply afte USB style patch, 80 chars strict) + + Remove USB obsolete commmand + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit de39f8c19d7c12017248c49d432dcb81db68f724 +Author: Michael Trimarchi +Date: Wed Nov 26 17:41:34 2008 +0100 + + USB style patch, 80 chars strict + + USB Code style patch + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit d10c5a87cb8affbb4d35a311370316d4383d598e +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Nov 7 22:46:21 2008 +0100 + + drivers/usb: Move conditional compilation to Makefile + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Remy Böhmer + +commit 2077e348c2a84901022ad95311b47b70361e6daa +Author: Scott Wood +Date: Tue Nov 25 10:47:02 2008 -0600 + + NAND: Fix misplaced return statement in nand_{read,write}_skip_bad(). + + This caused the operation to be needlessly repeated if there were + no bad blocks and no errors. + + Signed-off-by: Valeriy Glushkov + Signed-off-by: Scott Wood + +commit 89295028e7d8f7a524f485328279d72fdb102385 +Author: Michal Simek +Date: Mon Nov 24 12:09:50 2008 +0100 + + ppc4xx: ml300 remove Xilinx BSP from ml300 folder + + This BSP should be outside u-boot source tree. + The second reason is that xilinx ppc405 was moved to generic platform. + + Signed-off-by: Michal Simek + Signed-off-by: Stefan Roese + +commit 24eea623d4974a169026a975ba12fb23d48154b1 +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:10 2008 +0100 + + ppc4xx: Remove unused features + + This patch disables some unused features from the PCI405 configuration + to keep U-Boot image size below 192k. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 0c2385c3bb51f5d3911fce1ec4720db86b534c2b +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:09 2008 +0100 + + ppc4xx: Use correct io accessors for PCI405 + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 348c849d86a6f0785752b9bc497a34658713d1d1 +Author: Matthias Fuchs +Date: Mon Nov 24 15:11:08 2008 +0100 + + ppc4xx: Remove unused code from PCI405 code + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 58c696eed839af894e0265064669c402dc28b371 +Author: Wolfgang Denk +Date: Mon Nov 24 21:50:59 2008 +0100 + + AT91RM9200DK: fix broken boot from NOR flash + + Signed-off-by: Wolfgang Denk + +commit 8052352f20b33bef8f9872fc983eac73d4693c38 +Author: Jens Scharsig +Date: Tue Nov 18 10:48:46 2008 +0100 + + at91rm9200: fix broken boot from nor flash + + This patch fix the broken boot from NOR Flash on AT91RM9200 boards, if + CONFIG_AT91RM9200 is defined and nor preloader is used. + + Signed-off-by: Jens Scharsig + +commit 25ea652e907516a283b38237e83712a918f125d7 +Author: Piotr Ziecik +Date: Mon Nov 17 15:58:00 2008 +0100 + + UBI: Add proof-of-concept CFI flash support + + With this patch UBI can be used on CFI flash chips. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit e6a7edbc1778d27431ac663b40a71dafa5d20578 +Author: Piotr Ziecik +Date: Mon Nov 17 15:57:59 2008 +0100 + + mtd: Remove a printf() from add_mtd_device(). + + Remove a printf() from add_mtd_device(), which produces spurious output. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 91809ed51d8327a8dbbf29aa98a091154c282171 +Author: Piotr Ziecik +Date: Mon Nov 17 15:57:58 2008 +0100 + + cfi-mtd: Add cfi-mtd driver. + + Add cfi-mtd driver, which exports CFI flash to MTD layer. + This allows CFI flash devices to be used from MTD layer. + + Building of the new driver is controlled by CONFIG_FLASH_CFI_MTD + option. Initialization is done by calling cfi_mtd_init() from + flash_init(). + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 6ea808efdf9aa5d9067fbfac32acde8539129ed2 +Author: Piotr Ziecik +Date: Mon Nov 17 15:49:32 2008 +0100 + + cfi_flash: Add interface for flash verbosity control + + Add interface for flash verbosity control. It allows + to disable output from low-level flash API. It is useful + when calling these low-level functions from context other + than flash commands (for example the MTD/CFI interface + implmentation). + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit ebc9784ce6528385bb8d2558e783622d4bbf20f8 +Author: Piotr Ziecik +Date: Thu Nov 20 15:17:38 2008 +0100 + + cfi_flash: Export flash_sector_size() function. + + Export flash_sector_size() function from drivers/mtd/cfi_flash.c, + so that it can be used in the upcoming cfi-mtd driver. + + Signed-off-by: Piotr Ziecik + Signed-off-by: Stefan Roese + +commit 45aa5a7f4d5bcb79927ddfc896c1d7c4326e235d +Author: Stefan Roese +Date: Mon Nov 17 14:45:22 2008 +0100 + + cfi_flash: Make all flash access functions weak + + This patch defines all flash access functions as weak so that + they can be overridden by board specific versions. + + This will be used by the upcoming VCTH board support where the NOR + FLASH unfortunately can't be accessed memory-mapped. Special + accessor functions are needed here. + + To enable this weak functions you need to define + CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS in your board config header. + Otherwise the "old" default functions will be used resulting + in smaller code. + + Signed-off-by: Stefan Roese + Acked-by: Haavard Skinnemoen + +commit a5c4067017631d903e1afa6ad615f0ce19fea517 +Author: Stefan Roese +Date: Mon Nov 24 08:31:16 2008 +0100 + + UBI: Change parsing of size in commands to default to hex + + Currently the size parameters of the UBI commands (e.g. "ubi write") are + decoded as decimal instead of hex as default. This patch now interprets + all these values consistantly as hex, as all other standard U-Boot commands + do. + + Signed-off-by: Stefan Roese + +commit de01c76c3ccc4e6c5989228eed58e955a3a1a968 +Author: Stefan Roese +Date: Fri Nov 21 13:06:06 2008 +0100 + + ppc4xx: ML2 shouldn't include the 4xx EMAC driver + + Signed-off-by: Stefan Roese + +commit 1a6a00dcc5bdfc6e9b4b00f39c1f583a7f96fc7f +Author: Yuri Tikhonov +Date: Fri Nov 14 16:19:19 2008 +0300 + + ppc4xx: katmai: Change default config + + This patch enables support for EXT2, and increases the + CONFIG_SYS_BOOTMAPSZ size for the default configuration + of the katmai boards to use them as the RAID-reference + AMCC setups. + + EXT2 enabling allows one to boot kernels from the EXT2 + formatted Compact Flash cards. + + CONFIG_SYS_BOOTMAPSZ increasing allows one to boot the + Linux kernels, which use PAGE_SIZE of 256KB. Otherwise, + the memory area with DTB file (which is placed at the + end of the bootmap area) will turn out to be overlapped + with the BSS segment of the 256KB kernel, and zeroed + in early_init() of Linux. + + Actually, increasing of the bootmap size could be done + via setting of the bootm_size U-Boot variable, but it looks + like the current U-Boot implementation have some bootm_size- + related functionality lost. In many places through the U-Boot + code the CONFIG_SYS_BOOTMAPSZ definition is used directly + (instead of trying to read the corresponding value from the + environment). The same is truth for the boot_jump_linux() + function in lib_ppc/bootm.c, where U-Boot transfers control + to Linux passing the CONFIG_SYS_BOOTMAPSZ (not bootm_size) + value to the booting kernel. + + Signed-off-by: Yuri Tikhonov + Signed-off-by: Ilya Yanok + Signed-off-by: Stefan Roese + +commit ddf45cc758d394591fb9bcdcbe96530f733f2bce +Author: Dave Mitchell +Date: Thu Nov 20 14:09:50 2008 -0600 + + ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization + + Expanded OCM TLB to allow access to 64K OCM as well as 256K of + internal SRAM. + + Adjusted internal SRAM initialization to match updated user + manual recommendation. + + OCM & ISRAM are now mapped as follows: + physical virtual size + ISRAM 0x4_0000_0000 0xE300_0000 256k + OCM 0x4_0004_0000 0xE304_0000 64k + + A single TLB was used for this mapping. + + Signed-off-by: Dave Mitchell + Signed-off-by: Stefan Roese + +commit b14ca4b61a681f75f3125676e09d7ce6af66e927 +Author: Dave Mitchell +Date: Thu Nov 20 14:00:49 2008 -0600 + + ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs + + Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and + L2 cache DCRs from ppc440.h to this new header. + + Also converted these DCR defines from lowercase to uppercase and + modified referencing modules to use them. + + Signed-off-by: Dave Mitchell + Signed-off-by: Stefan Roese + +commit 711e2b2af820d21d9931d4cf8057d3894600fd54 +Author: Steven A. Falco +Date: Thu Nov 20 14:37:57 2008 -0500 + + ppc4xx: Delete unused definitions for SDR0_DDRCFG from ppc4xx.h + + The definitions of bits in SDR_CFG are incorrect, and not used within + U-Boot. Therefore, they can be removed. + + The naming of the sdr_ddrdl/sdr_cfg registers do not follow conventions, + and are unused, so they can be removed too. + + A definition for SDR0_DDRCFG is added. + + Signed-off-by: Steven A. Falco + Signed-off-by: Stefan Roese + +commit e23c7c95a96eb0f068efe5c532215a10a1512a95 +Author: Dirk Behme +Date: Mon Nov 10 20:15:25 2008 +0100 + + ARM: OMAP: Convert IO macros + + Convert IO macros to readx/writex. + + Signed-off-by: Dirk Behme + +commit 263b749e2e25473a48776d317bd2a7e2ddcdd212 +Author: Ilko Iliev +Date: Sun Nov 9 15:53:14 2008 +0100 + + lib_arm: do_bootm_linux() - correct a small mistake + + This patch corrects a small bug in the "if" condition: + the parameter "flag" is 0 and the "if" condition is always true. + The result is - the boom command doesn't start the kernel. + Affected targets: all arm based. + + Signed-off-by: Ilko Iliev + +commit 3e0cda071a67cb5709e3fa4faf6b31a731859acc +Author: Stelian Pop +Date: Sun Nov 9 00:14:46 2008 +0100 + + AT91: Enable PLLB for USB + + At least some (old ?) versions of the AT91Bootstrap do not set up the + PLLB correctly to 48 MHz in order to make USB host function correctly. + + This patch sets up the PLLB to the same values Linux uses, and makes USB + work ok on the following CPUs: + - AT91CAP9 + - AT91SAM9260 + - AT91SAM9263 + + This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all + the relevant AT91CAP9/AT91SAM9 atmel boards. + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit ad229a44e162af0f65e57e4e3dc133d5f0364ecb +Author: Stelian Pop +Date: Fri Nov 7 13:55:14 2008 +0100 + + AT91: Use AT91_CPU_CLOCK in displays + + Introduce AT91_CPU_CLOCK and use it for displaying the CPU + speed in the LCD driver. + + Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the + corresponding board clocks. + + Signed-off-by: Stelian Pop + +commit 25fb4eaaeab3f8866020818f4729d990dcc91cf0 +Author: Stefan Roese +Date: Thu Nov 20 11:46:20 2008 +0100 + + ppc4xx: Clear all potentially pending exceptions in MCSR + + This is needed on Canyonlands which still has an exception pending + while running relocate_code(). This leads to a failure after trap_init() + is moved to the top of board_init_r(). + + Signed-off-by: Stefan Roese + +commit facdad5f2602e899a01746916beddbf9e856b5ee +Author: Heiko Schocher +Date: Wed Nov 19 10:10:30 2008 +0100 + + powerpc: 83xx: add missing TIMING_CFG1_CASLAT_* defines + + Signed-off-by: Heiko Schocher + Signed-off-by: Kim Phillips + +commit 2f2a5c3714d17f4ead18b713128b7226e0e822f4 +Author: Howard Gregory +Date: Tue Nov 4 14:55:33 2008 +0800 + + mpc83xx: Improve the performance of DDR memory + + modify the CAS timings. my understanding is that these + settings decrease various wait times in the DDR interface. + Because these wait times are in clock cycles, and the DDR + clock on the 8315 RDB runs slower than on some other 83xx + platforms, we can dial down these values without a problem, + thereby decreasing the latency of memory a little. + + Signed-off-by: Howard Gregory + Signed-off-by: Dave Liu + Signed-off-by: Kim Phillips + +commit 8000b086b33a5a81f3f390f37e178db7956dc08b +Author: Kyungmin Park +Date: Fri Oct 24 14:55:33 2008 +0200 + + ARM: Add Apollon UBI support + + To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI + macro. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 694a0b3f1c0accd0de94b89555155d69f8022824 +Author: Kyungmin Park +Date: Wed Nov 19 11:47:05 2008 +0100 + + UBI: Add UBI command support + + This patch adds these UBI commands: + + ubi part [nand|onenand] [part] - Show or set current partition + ubi info [l[ayout]] -Display volume and UBI layout information + ubi create[vol] volume [size] [type] - Create volume name with size + ubi write[vol] address volume size - Write volume from address with size + ubi read[vol] address volume [size] - Read volume to address with size + ubi remove[vol] volume - Remove volume + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 58be3a1056d88c6d05f3e914389282807e69923a +Author: Kyungmin Park +Date: Wed Nov 19 16:38:24 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 8/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 47ae6693f54f80455ae32c2e0d995e0e4bdc15b9 +Author: Kyungmin Park +Date: Wed Nov 19 16:36:36 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 7/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 7e6ee7ad27de5216db1baef76f38c3429c8f4a2a +Author: Kyungmin Park +Date: Wed Nov 19 16:32:36 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 6/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit c91a719daa331b5856109313371e4ece5ec06d96 +Author: Kyungmin Park +Date: Wed Nov 19 16:28:06 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 5/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit f412fefa079c6aa9a9763f6869bf787ea6bf6e1b +Author: Kyungmin Park +Date: Wed Nov 19 16:27:23 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 4/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 2d262c4853cb5b6ddce1a28a9641f2de3688d7ea +Author: Kyungmin Park +Date: Wed Nov 19 16:26:54 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 3/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 961df83361aff9a14f226214224eb8a06e05ba24 +Author: Kyungmin Park +Date: Wed Nov 19 16:25:44 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 2/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit f399d4a281713d5ef2d764f05d545fe61e3bd569 +Author: Kyungmin Park +Date: Wed Nov 19 16:23:06 2008 +0100 + + UBI: Add basic UBI support to U-Boot (Part 1/8) + + This patch adds basic UBI (Unsorted Block Image) support to U-Boot. + It's based on the Linux UBI version and basically has a "OS" + translation wrapper that defines most Linux specific calls + (spin_lock() etc.) into no-ops. Some source code parts have been + uncommented by "#ifdef UBI_LINUX". This makes it easier to compare + this version with the Linux version and simplifies future UBI + ports/bug-fixes from the Linux version. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit e29c22f5abe6e0f4baa6251efed6074cdfc3db79 +Author: Kyungmin Park +Date: Wed Nov 19 16:20:36 2008 +0100 + + MTD: Add MTD paritioning infrastructure + + This MTD part infrastructure will be used by the upcoming + UBI support. + + Signed-off-by: Kyungmin Park + Signed-off-by: Stefan Roese + +commit 9b827cf1720acda2473afa516956eab6f7cca9a1 +Author: Selvamuthukumar +Date: Thu Oct 16 22:54:03 2008 +0530 + + Align end of bss by 4 bytes + + Most of the bss initialization loop increments 4 bytes + at a time. And the loop end is checked for an 'equal' + condition. Make the bss end address aligned by 4, so + that the loop will end as expected. + + Signed-off-by: Selvamuthukumar + Signed-off-by: Wolfgang Denk + +commit 3f510db522d160179dff3ddcce9b18f6241c2c24 +Author: Becky Bruce +Date: Mon Nov 10 19:45:35 2008 -0600 + + mpc8641: fix address-cells default in old .dts detection + + address-cells defaults to 2, not 1; so in the unlikely + event that it isn't specified, this patch is required + for correct operation. + + Signed-off-by: Becky Bruce + +commit d025aa4b20a0618a2bada0132a9a0a4afb717f1a +Author: Becky Bruce +Date: Fri Oct 31 17:14:39 2008 -0500 + + lib_ppc: Move trap_init to occur earlier + + Doing trap_init immediately once we're running from RAM + means we're no longer dependent on the physical location of + the flash on non-BookE platforms. Before trap_init, those + platforms switch to real mode and go to 0xfff00100 on exception. + After the switch, they go to 0x00000100 This makes it easier to + move the flash location. + + Signed-off-by: Becky Bruce + +commit d52082b12c6e545705a19433a2f4142526536189 +Author: Becky Bruce +Date: Fri Nov 7 13:46:19 2008 -0600 + + mpc8641: Try to detect old .dts files + + Since we've changed the memory map of the board, be nice and + add some checking to try to catch out-of-date .dts files. We do + this by checking the CCSRBAR location in the .dts and comparing + it to the CCSRBAR location in u-boot. If they don't match, a + warning msg is printed. This isn't foolproof, but it's simple and + will catch most of the cases where an out-of-date .dts is present, + including all of the cases where a new u-boot is used with an old + standard MPC8641 .dts file as supplied with Linux. + + Signed-off-by: Becky Bruce + +commit 8db0400a27839f91c047dcb83f4a0f09e054a180 +Author: Becky Bruce +Date: Thu Nov 6 13:04:09 2008 -0600 + + toplevel Makefile: Add MPC8641HPCN_36BIT target + + This will enable CONFIG_PHYS_36BIT for MPC8641HPCN. + + Signed-off-by: Becky Bruce + +commit 3111d32c494e8251b90917447796a7206b757e1e +Author: Becky Bruce +Date: Thu Nov 6 17:37:35 2008 -0600 + + mpc8641: Support 36-bit physical addressing + + This patch creates a memory map with all the devices + in 36-bit physical space, in addition to the 32-bit map. + The CCSR relocation is moved (again, sorry) to + allow for the physical address to be 36 bits - this + requires translation to be enabled. With 36-bit physical + addressing enabled, we are no longer running with VA=PA + translations. This means we have to distinguish between + the two in the config file. The existing region name is + used to indicate the virtual address, and a _PHYS variety + is created to represent the physical address. + + Large physical addressing is not enabled by default. + Set CONFIG_PHYS_64BIT in the config file to turn this on. + + Signed-off-by: Becky Bruce + +commit c759a01a0022de9378a3a761f49786f87684c916 +Author: Becky Bruce +Date: Thu Nov 6 17:36:04 2008 -0600 + + mpc8641: Change 32-bit memory map + + The memory map on the 8641hpcn is modified to look more like + the 85xx boards; this is a step towards a more standardized + layout going forward. As part of this change, we now relocate + the flash. + + The regions for some of the mappings were far larger than they + needed to be. I have reduced the mappings to match the + actual sizes supported by the hardware. + + In addition I have removed the comments at the head + of the BAT blocks in the config file, rather than updating + them. These get horribly out of date, and it's a simple + matter to look at the defines to see what they are set to + since everything is right here in the same file. + + Documentation has been changed to reflect the new map, as this + change is user visible, and affects the OS which runs post-uboot. + + Signed-off-by: Becky Bruce + +commit bf9a8c34309ed9276258295db9e9212aabb2531a +Author: Becky Bruce +Date: Wed Nov 5 14:55:35 2008 -0600 + + mpc86xx: Change early FLASH mapping to 1M at CONFIG_MONITOR_BASE_EARLY + + We define CONFIG_MONITOR_BASE_EARLY to define the initial location + of the bootpage in flash. Use this to create an early mapping + definition for the FLASH, and change the early_bats code to use this. + + This change facilitates the relocation of the flash since the early + mappings are no longer tied to the final location of the flash. + + Signed-off-by: Becky Bruce + +commit c1e1cf69547b138173f87a7f81c42a5d8dbfde3d +Author: Becky Bruce +Date: Wed Nov 5 14:55:34 2008 -0600 + + mpc86xx: Use SRR0/1/rfi to enable address translation, not blr + + Using a mtmsr/blr means that you have to be executing at the + same virtual address once you enable translation. This is + unnecessarily restrictive, and is not really how this is + usually done. Change it to use the more common mtspr SRR0/SRR1 + and rfi method. + + Signed-off-by: Becky Bruce + +commit 6bf98b1362f0cb237620355ed3e6762fff82388d +Author: Becky Bruce +Date: Wed Nov 5 14:55:33 2008 -0600 + + mpc8641: make DIAG_ADDR == FLASH_BASE + + Currently, that's what it is, but it's hardcoded. + + Signed-off-by: Becky Bruce + +commit 170deacb1ddc39164bdb68f3963e0c0456a5369b +Author: Becky Bruce +Date: Wed Nov 5 14:55:32 2008 -0600 + + mpc8641: Drop imaginary second flash bank, map 8MB + + There's a lot of setup and foo for the second flash + bank. The problem is, this board doesn't actually have one. + Clean this up. Also, the flash is 8M in size. Get rid + of the confusing aliased overmapping, and just map 8M. + + Signed-off-by: Becky Bruce + +commit 0f2d66027bfc60dc7eea2f096af8891988c5abe4 +Author: Becky Bruce +Date: Wed Nov 5 14:55:31 2008 -0600 + + mpc8641: only define CONFIG_ENV_SIZE once + + It's currently defined twice inside in an if/else block, but + both halves set the same value. Move the define outside + the if. + + Signed-off-by: Becky Bruce + +commit 24bfb48c35fed6ad1f047e3e4a27df302482cd93 +Author: Becky Bruce +Date: Wed Nov 5 14:55:30 2008 -0600 + + mpc86xx: Move setup_bats into cpu_init_f + + In order to later allow for a physical relocation of the + flash, setup_bats, which sets up the final BAT mapping + for the board, needs to happen *after* init_laws(). + Otherwise, there will be no window programmed for the flash + at the new physical location at the point when we change + the mmu translation. + + Signed-off-by: Becky Bruce + +commit 05df3e5a638be8c5b0899eae1766bbe8e4b92c17 +Author: Becky Bruce +Date: Wed Nov 5 14:55:29 2008 -0600 + + mpc8641: Remove extra "0" from BR2 define + + Signed-off-by: Becky Bruce + +commit edf3fe7d39a1ee07353128af5221422ce9ccfad6 +Author: Richard Retanubun +Date: Thu Oct 23 09:08:18 2008 -0400 + + drivers/qe/uec_phy.c: Added PHY-less (fixed PHY) driver. + + Copied over the fixed PHY driver as used in pp4xx/4xx_enet.c. + This adds support for PHY-less MAC connections to the UEC. + + Signed-off-by: Richard Retanubun + Signed-off-by: Ben Warren + +commit 54bdcc9fb6670afde9c26dcf364f582879bf21d6 +Author: TsiChung Liew +Date: Thu Oct 23 16:27:24 2008 +0000 + + ColdFire: Add mii driver in drivers/net + + All CF platforms' mii.c are consolidated into one + + Signed-off-by: TsiChung Liew + Signed-off-by: Ben Warren + +commit 25a859066b3af1070eb69f12022113c0a91bd813 +Author: Ben Warren +Date: Mon Oct 27 23:53:17 2008 -0700 + + Moved initialization of PPC4xx EMAC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 4d03a4e20e58552cb96d61a0e8b56cdb6cc60126 +Author: Ben Warren +Date: Sun Nov 9 21:29:23 2008 -0800 + + Moved PPC4xx EMAC driver to drivers/net + + Also changed path in all linker scripts that reference this driver + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 96e21f86e8266ed40759e5495ee461265d7f6d28 +Author: Ben Warren +Date: Mon Oct 27 23:50:15 2008 -0700 + + Changed PPC4xx EMAC driver to require CONFIG_PPC4xx_EMAC + + All in-tree IBM/AMCC PPC4xx boards using the EMAC get this new CONFIG + + Signed-off-by: Ben Warren + Acked-by: Stefan Roese + +commit 9eb79bd8856bcab896ed5e1f1bca159807a124dd +Author: Ben Warren +Date: Thu Oct 23 22:02:49 2008 -0700 + + Moved initialization of MPC8XX SCC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit a9bec96d6359ac9f90a852962bf3040cad9e0256 +Author: Ben Warren +Date: Wed Oct 22 23:47:51 2008 -0700 + + Moved initialization of MPC8220 FEC to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 0e8454e990385a58f708c2fc26d31ac041c7a6c5 +Author: Ben Warren +Date: Wed Oct 22 23:32:48 2008 -0700 + + Moved initialization of QE Ethernet controller to cpu_eth_init() + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 3456a148276d5494b53ee40242efb6462d163504 +Author: Ben Warren +Date: Wed Oct 22 23:20:29 2008 -0700 + + Moved initialization of FCC Ethernet controller to cpu_eth_init + + Affected boards: + Several MPC8xx boards + Several MPC8260/MPC8272 boards + Several MPC85xx boards + + Removed initialization of the driver from net/eth.c + + Signed-off-by: Ben Warren + +commit 62e15b497f5c6334c059512678c8db7940ae4c61 +Author: Ben Warren +Date: Thu Oct 30 22:15:35 2008 -0700 + + Fix typo in cpu/mpc85xx/cpu.c + + CONFIG_MPC85xx_FEC -> CONFIG_MPC85XX_FEC + + Signed-off-by: Ben Warren + +commit 5dfb3ee3f54e2382a08d72906f0e79ecf944f6e3 +Author: Shinya Kuribayashi +Date: Sun Oct 19 12:08:50 2008 +0900 + + net: Move initialization of Au1x00 SoC ethernet MAC to cpu_eth_init + + This patch will move au1x00_eth_initialize from net/eth.c to cpu_eth_init + as a part of ongoing eth_initialize cleanup work. The function ret value + is also fixed as it should be negative on fail. + + Signed-off-by: Shinya Kuribayashi + Signed-off-by: Ben Warren + +commit cc94074ecac1885d18ddb683eb934b3c0268aa5b +Author: Ben Warren +Date: Fri Sep 5 01:55:22 2008 -0400 + + Moved initialization of IXP4XX_NPE Ethernet controller to cpu_eth_init() + + Also, removed the driver initialization from net/eth.c + + Signed-off-by: Ben Warren + +commit f2a7806fc23e82d30c8548911369e0c530607354 +Author: Clive Stubbings +Date: Mon Oct 27 15:05:00 2008 +0000 + + xilinx_emaclite buffer overrun + + Patch to fix buffer allocation size and alignment. Buffer needs to be u32 aligned and + PKTSIZE_ALIGN bytes long. + + Acked-by: Michal Simek + + Signed-off-by: Ben Warren + +commit 0115b1953718a2969f6469d3d5da51ba11e12d42 +Author: richardretanubun +Date: Fri Sep 26 08:59:12 2008 -0400 + + NET: QE: UEC: Make uec_miiphy_read() and uec_miiphy_write() use the devname arg. + + The current uec_miiphy_read and uec_miiphy_write hardcode access devlist[0] + This patch makes these function use the devname argument that is passed in to + allow access to the phy registers of other devices in devlist[]. + + Signed-of-by: Richard Retanubun + + Signed-off-by: Ben Warren + +commit 44dcb7332033db8de2810f2fffcae3084f15c8d4 +Author: richardretanubun +Date: Mon Oct 6 15:31:43 2008 -0400 + + Adds two more ethernet interface to 83xx + + Fixed compiler warning "declared but unused" eth5_uec_info and eth6_uec_info. + Signed-off-by: Richard Retanubun + Signed-off-by: Ben Warren + +commit d8003fa03733901b73d6c4667b4d80fc8eb1ddd3 +Author: Stelian Pop +Date: Fri Nov 7 13:54:31 2008 +0100 + + AT91: Replace AT91_BASE_EMAC by the board specific values. + + AT91_BASE_EMAC is never used outside the board specific files, + so replace its usage by the board specific AT91xxx_BASE_EMAC. + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit c91e17affa175ce06afa89b04752301eb4a61666 +Author: Stelian Pop +Date: Fri Nov 7 12:09:21 2008 +0100 + + AT91: Replace (undefined) AT91_ID_US* by the board specific values. + + AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined. + Since they are never used outside the board specific files, they can + be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 / + AT91xxx_ID_US2. + + Bug spotted by Jesus Alvarez . + + Signed-off-by: Stelian Pop + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 28962f5a2de81bc0eed1c0b08c6bfaa1cc134ea2 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Nov 1 10:47:59 2008 +0100 + + Makefile/at91sam9: move some at91sam9 to the correct subsection for arm926ejs + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1079432e04ccf71aa3684181186182cd63512f19 +Author: Sergey Lapin +Date: Fri Oct 31 12:28:43 2008 +0100 + + Custom AFEB9260 board support + + This patch provides support for AFEB9260 board, a product of + OpenSource hardware and software. Some commertial projects + are made with this design. A board is basically AT91SAM9260-EK + with some modifications and different peripherals and different + parts used. Main purpose of this project is to gain experience in + hardware design. + More info: http://groups.google.com/group/arm9fpga-evolution-board + (In Russian only, sorry). + Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb + + Signed-off-by: Sergey Lapin + +commit 26eecd24f97130e56e9c2c2af0e714e05bce6e00 +Author: Tomohiro Masubuchi +Date: Tue Oct 21 13:17:16 2008 +0900 + + Change to use "do_div" macro + + Signed-off-by: Tomohiro Masubuchi + +commit e352495318d8056a00faa21b633b3e4374bfbf52 +Author: Roman Mashak +Date: Wed Oct 22 16:00:26 2008 -0400 + + ARM926EJ-S: relocate OMAP specific 'cpuinfo.c' into OMAP directory + + OMAP identification is implemented in 'cpuinfo.c' and located in ARM926EJ-S directory. + It makes sense to place this file in OMAP specific subdirectory, i.e. cpu/arm926ejs/omap + + Signed-off-by: Roman Mashak + +commit 248b2c367210c06dbd5fbdecf27e97fbe9d05fdb +Author: Roman Mashak +Date: Tue Oct 21 03:01:41 2008 -0700 + + ARM/Versatile port: Removed unused functions + + Removal of never used functions. + + Signed-off-by: Roman Mashak + +commit 1266df887781c779deaf6d05eea2ef90a470cb34 +Author: Becky Bruce +Date: Mon Nov 3 15:44:01 2008 -0600 + + powerpc: change 86xx SMP boot method + + We put the bootpg for the secondary cpus into memory and use + BPTR to get to it. This is a step towards converting to the + ePAPR boot methodology. Also, the code is written to + deal properly with more than 4GB of RAM. + + Signed-off-by: Becky Bruce + +commit b5431560682d8f318fbc49db87cfe13ab41d2ee4 +Author: Becky Bruce +Date: Fri Oct 31 17:13:49 2008 -0500 + + 8641HPCN: Config file cleanup + + There are several items in the config file that were hardcoded + but that should really be based on other config options, since + the regions are contiguous and depend on being so. This cleans + that up a bit. Also, add BR_PHYS_ADDR() macro to convert + addresses into the proper format for BR registers. + + Signed-off-by: Becky Bruce + +commit 4c77de3f144ca088c3867bd6240718c10f5a9d69 +Author: Becky Bruce +Date: Fri Oct 31 17:13:32 2008 -0500 + + 86xx: Make dram_size a phys_size_t + + It's currently a long and should be phys_size_t. + + Signed-off-by: Becky Bruce + +commit 104992fc541302a6bac74448e01e7fdad20abca0 +Author: Becky Bruce +Date: Sun Nov 2 18:19:32 2008 -0600 + + powerpc 86xx: Handle CCSR relocation earlier + + Currently, the CCSR gets relocated while translation is + enabled, meaning we need 2 BAT translations to get to both the + old location and the new location. Also, the DEFAULT + CCSR location has a dependency on the BAT that maps the + FLASH region. Moving the relocation removes this unnecessary + dependency. This makes it easier and more intutive to + modify the board's memory map. + + Swap BATs 3 and 4 on 8610 so that all 86xx boards use the same + BAT for CCSR space. + + Signed-off-by: Becky Bruce + +commit af5d100e8d5cd49d69d52d20f1181eb06ddb4ddf +Author: Becky Bruce +Date: Fri Oct 31 17:14:14 2008 -0500 + + mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI build + + You can't actually have both, and with some coming changes to + change the memory map for the board and support 36-bit physical, + we need the extra BAT that is being consumed by having both. + + I also make non-PCI configs build cleanly, for the sake of sanity. + + Signed-off-by: Becky Bruce + +commit 98693b85d42ff438375dc6d6dcadc70eb7b050bb +Author: Becky Bruce +Date: Fri Oct 31 17:14:00 2008 -0500 + + mpc8641: Stop supporting non-PCI_PNP configs + + We don't actually ever do this, remove the code so we + can stop maintaining it. + + Signed-off-by: Becky Bruce + +commit e4f69d1bd21a12049744989d2dd6b5199c9b8f23 +Author: TsiChung Liew +Date: Fri Oct 24 12:59:12 2008 +0000 + + ColdFire: Fix M5329EVB and M5373EVB nand issue + + Fix compilation issue caused by a few mismatches. + Provide proper nand chip select enable/disable in + nand_hwcontrol() rather than in board_nand_init() + just enable once. Remove redundant local nand driver + functions - nand_read_byte(), nand_write_byte() and + nand_dev_ready() to use common nand driver. + + Signed-off-by: TsiChung Liew + +commit 1b2708442224a551a0b865b52710306333888932 +Author: TsiChung Liew +Date: Wed Oct 22 11:55:30 2008 +0000 + + ColdFire: Fix compilation error + + The error was caused by the change for strmhz() in cpu.c. + A few of them were one extra close parenthesis. + + Signed-off-by: TsiChung Liew + +commit 536e7dac16769954915a484e682a2efb28699133 +Author: TsiChung Liew +Date: Wed Oct 22 11:38:21 2008 +0000 + + ColdFire: Add MCF5301x CPU and M53017EVB support + + Signed-off-by: TsiChung Liew + +commit a21d0c2cc9add8894d971ab791f4032f077db817 +Author: TsiChung Liew +Date: Tue Oct 21 15:37:02 2008 +0000 + + ColdFire: Add SBF support for M52277EVB + + Add serial boot support + + Signed-off-by: TsiChung Liew + +commit b202816c61042c183fe67d097a5893b0f2dafba0 +Author: TsiChung Liew +Date: Tue Oct 21 14:19:26 2008 +0000 + + ColdFire: Use CFI driver for M5272C3 + + Signed-off-by: TsiChung Liew + +commit f3962d3f574e5a1cffacd4e9bc48713060a2a314 +Author: TsiChung Liew +Date: Tue Oct 21 13:47:54 2008 +0000 + + ColdFire: Relocate FEC's GPIO and mii functions protocols + + Place FEC pin assignments in cpu_init.c from platform's + mii.c + + Signed-off-by: TsiChung Liew + +commit 6e80f5aa09f8d41bac50b38dc7488ecd22107802 +Author: TsiChung Liew +Date: Tue Oct 21 12:15:44 2008 +0000 + + ColdFire: Remove platforms mii.c file + + Will use mcfmii.c driver in drivers/net rather than + keep creating new mii.c for each future platform. + Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB, + M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB, + M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's + mii.c + + Signed-off-by: TsiChung Liew + +commit 012522fef3b382469125beb46a315ab4dee02fb0 +Author: TsiChung Liew +Date: Tue Oct 21 10:03:07 2008 +0000 + + ColdFire: Modules header files cleanup + + Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG, + MDHA, SKHA, INTC, and FlexBus structures and + definitions in immap_5xxx.h to more unify modules + header files. Append DSPI support for m547x_8x. + SSI cleanup. Remove USB Host structure from immap_539.h. + Apply changes to use FlexBus structures in mcf52x2's + cpu_init.c and platform configuration files. + + Signed-off-by: TsiChung Liew + +commit ac2331aee99ad36be0fcfed8c49922e3c61b576d +Author: TsiChung Liew +Date: Tue Oct 21 08:52:36 2008 +0000 + + ColdFire: Remove linker file + + Each different build for M54455EVB and M5235EVB will + create a u-boot.lds linker file. It is redundant to + keep the u-boot.lds + + Signed-off-by: TsiChung Liew + +commit 0829323073c505556ed5f5073f91adb504584d45 +Author: Peter Tyser +Date: Fri Oct 31 11:26:44 2008 -0500 + + ppc: Fix compile warnings when !CONFIG_OF_LIBFDT + + Signed-off-by: Peter Tyser + +commit a80b21d5127583171d6e9bc7f722947641898012 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Oct 31 12:12:12 2008 +0100 + + common/Makefile: create others group for non core, environment and command files + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 60c68d9c1c6d18ce02c862a05718fd94f97c13d0 +Author: Wolfgang Denk +Date: Fri Oct 31 01:13:37 2008 +0100 + + TQM8260: use CFI flash driver instead of custom driver. + + Signed-off-by: Wolfgang Denk + +commit 20d04774f4ef3f6e38974636e0e36ae0f0b5501f +Author: Andy Fleming +Date: Thu Oct 30 17:35:30 2008 -0500 + + Consolidate MAX/MIN definitions + + There were several, now there is one (two if you count the lower-case + versions). + + Signed-off-by: Andy Fleming + +commit 298e476c66fd88d0bc4f0371118652d2b5de4e8a +Author: Heiko Schocher +Date: Thu Oct 30 09:23:09 2008 +0100 + + mgsuvd: remove unused defines in config file. + + Signed-off-by: Heiko Schocher + +commit 3cbd823116ea8b7c654e275a8c2fca87cd1f5dc5 +Author: Wolfgang Denk +Date: Sun Nov 2 16:14:22 2008 +0100 + + Coding Style cleanup, update CHANGELOG + + Signed-off-by: Wolfgang Denk + commit a47f957ab523019992fdef857af01bd71c58a4da Author: Alessandro Rubini Date: Fri Oct 31 22:33:21 2008 +0100 diff --git a/board/afeb9260/partition.c b/board/afeb9260/partition.c index 0b5dc5e06f6..be08f295f6f 100644 --- a/board/afeb9260/partition.c +++ b/board/afeb9260/partition.c @@ -34,4 +34,3 @@ dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, {0x00008400, 0x00041FFF, FLAG_PROTECT_CLEAR, 0, "U-Boot"}, }; - diff --git a/common/cmd_ubi.c b/common/cmd_ubi.c index 4c358924e44..5c31f7b49f0 100644 --- a/common/cmd_ubi.c +++ b/common/cmd_ubi.c @@ -601,7 +601,7 @@ static int do_ubi(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) U_BOOT_CMD(ubi, 6, 1, do_ubi, "ubi - ubi commands\n", - "part [nand|nor|onenand] [part]" + "part [nand|nor|onenand] [part]" " - Show or set current partition\n" "ubi info [l[ayout]]" " - Display volume and ubi layout information\n" diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index 18308c8a7ab..66f9164d562 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -131,7 +131,7 @@ void cpu_init_f(void) mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */ mbar2_writeByte(MCFSIM_SPURVEC, 0x00); - /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */ + /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */ /* FlexBus Chipselect */ init_fbcs(); diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 6645cb8825a..63cc8dbcda9 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -982,5 +982,3 @@ unlock_ram_in_cache: blr #endif #endif - - diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 1f0b56cb76a..d09c4c21538 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -706,4 +706,3 @@ int cpu_eth_init(bd_t *bis) #endif return 0; } - diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 4b5349eadd0..f2b8908b90b 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -727,7 +727,7 @@ _start: ori r2,r2,0xffff mfdcr r1,ISRAM1_DPC and r1,r1,r2 /* Disable parity check */ - mtdcr ISRAM1_DPC,r1 + mtdcr ISRAM1_DPC,r1 mfdcr r1,ISRAM1_PMEG and r1,r1,r2 /* Disable pwr mgmt */ mtdcr ISRAM1_PMEG,r1 diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index f12dedf89a9..a27de5a7ec7 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -434,4 +434,3 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) send_stop(); return(failures); } - diff --git a/drivers/mtd/ubi/crc32.c b/drivers/mtd/ubi/crc32.c index 5273ca3e051..a7e26b04560 100644 --- a/drivers/mtd/ubi/crc32.c +++ b/drivers/mtd/ubi/crc32.c @@ -97,7 +97,7 @@ u32 crc32_le(u32 crc, unsigned char const *p, size_t len) # else # define DO_CRC(x) crc = tab[ ((crc >> 24) ^ (x)) & 255] ^ (crc<<8) # endif - //printf("Crc32_le crc=%x\n",crc); + /* printf("Crc32_le crc=%x\n",crc); */ crc = __cpu_to_le32(crc); /* Align it */ if((((long)b)&3 && len)){ diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c index 2d44f232a53..8423894000b 100644 --- a/drivers/mtd/ubi/io.c +++ b/drivers/mtd/ubi/io.c @@ -186,7 +186,7 @@ retry: if (read != len && err == -EBADMSG) { ubi_assert(0); printk("%s[%d] not here\n", __func__, __LINE__); -// err = -EIO; +/* err = -EIO; */ } } else { ubi_assert(len == read); diff --git a/drivers/mtd/ubi/vmt.c b/drivers/mtd/ubi/vmt.c index a87a2f3673a..061da649e13 100644 --- a/drivers/mtd/ubi/vmt.c +++ b/drivers/mtd/ubi/vmt.c @@ -260,7 +260,7 @@ int ubi_create_volume(struct ubi_device *ubi, struct ubi_mkvol_req *req) goto out_unlock; } - /* Calculate how many eraseblocks are requested */ + /* Calculate how many eraseblocks are requested */ vol->usable_leb_size = ubi->leb_size - ubi->leb_size % req->alignment; bytes = req->bytes; if (do_div(bytes, vol->usable_leb_size)) diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index d0e3cda6c18..f9f10021bc2 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -490,7 +490,7 @@ #endif /* Memory Bank 1 (RESET) initialization */ -#define CONFIG_SYS_EBC_PB1AP 0x7f817200 //0x03017200 +#define CONFIG_SYS_EBC_PB1AP 0x7f817200 /* 0x03017200 */ #define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_RESET_BASE | 0x1c000) /* Memory Bank 4 (FPGA / 32Bit) initialization */ diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 90e553d74e3..d63a1a07fb1 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -167,4 +167,3 @@ #endif #endif - diff --git a/include/linux/crc32.h b/include/linux/crc32.h index e1331571e1c..ac4aed1c77a 100644 --- a/include/linux/crc32.h +++ b/include/linux/crc32.h @@ -6,10 +6,10 @@ #define _LINUX_CRC32_H #include -//#include +/* #include */ extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); -//extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); +/* extern u32 crc32_be(u32 crc, unsigned char const *p, size_t len); */ #define crc32(seed, data, length) crc32_le(seed, (unsigned char const *)data, length) @@ -21,7 +21,7 @@ extern u32 crc32_le(u32 crc, unsigned char const *p, size_t len); * is in bit nr 0], thus it must be reversed before use. Except for * nics that bit swap the result internally... */ -//#define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) -//#define ether_crc_le(length, data) crc32_le(~0, data, length) +/* #define ether_crc(length, data) bitrev32(crc32_le(~0, data, length)) */ +/* #define ether_crc_le(length, data) crc32_le(~0, data, length) */ #endif /* _LINUX_CRC32_H */ diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h index b41e5f564cb..10166757bc1 100644 --- a/include/linux/mtd/partitions.h +++ b/include/linux/mtd/partitions.h @@ -76,9 +76,9 @@ struct device; struct device_node; int __devinit of_mtd_parse_partitions(struct device *dev, - struct mtd_info *mtd, - struct device_node *node, - struct mtd_partition **pparts); + struct mtd_info *mtd, + struct device_node *node, + struct mtd_partition **pparts); #endif #endif diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h index a017891acf8..4b3e06ce5e1 100644 --- a/include/linux/mtd/ubi.h +++ b/include/linux/mtd/ubi.h @@ -21,7 +21,7 @@ #ifndef __LINUX_UBI_H__ #define __LINUX_UBI_H__ -//#include +/* #include */ #include #include diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 095dfc1b206..b4152192a2d 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -56,7 +56,7 @@ do { \ #define ubi_sysfs_close(...) do { } while (0) static inline int is_power_of_2(unsigned long n) { - return (n != 0 && ((n & (n - 1)) == 0)); + return (n != 0 && ((n & (n - 1)) == 0)); } /* FIXME */ -- cgit v1.3.1 From b1ffecec37b57a59c139042267faac458e5324e9 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 3 Dec 2008 23:04:37 -0600 Subject: powerpc: fix io.h build warning with CONFIG_PHYS_64BIT Casting a pointer to a phys_addr_t when it's an unsigned long long on a 32-bit system without first casting to a non-pointer type generates a compiler warning. Fix this. Signed-off-by: Becky Bruce --- include/asm-ppc/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index c00de452d6d..64cb746b107 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -300,7 +300,7 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) static inline phys_addr_t virt_to_phys(void * vaddr) { - return (phys_addr_t)(vaddr); + return (phys_addr_t)((unsigned long)vaddr); } #endif -- cgit v1.3.1 From 9e2a79b4c585ad31138fb90b68fd0234d64a8da8 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 16 Dec 2008 23:13:46 +0100 Subject: include/configs/at91cap9adk.h: fix typo. Signed-off-by: Wolfgang Denk --- include/configs/at91cap9adk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 363df67b572..b2baf1b3489 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -32,7 +32,7 @@ #define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define AT91_MASTER_CLOCK 100000000 /* peripheral */ #define AT91_CPU_CLOCK 200000000 /* cpu */ -#define CONFUG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ +#define CONFIG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ -- cgit v1.3.1 From 13095b2f07dacb1f863772266c1789d47a523a8a Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 16 Dec 2008 22:10:30 +0100 Subject: MIPS: qemu_mips: move env storage just after u-boot Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Shinya Kuribayashi --- include/configs/qemu-mips.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index f028d1ac63a..844446205b9 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -150,7 +150,7 @@ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 #define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) /* Address and size of Primary Environment Sector */ #define CONFIG_ENV_SIZE 0x8000 -- cgit v1.3.1 From e92739d34e2d6b6aca93b2598248210710897ce8 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Wed, 17 Dec 2008 16:36:21 -0600 Subject: Add support for PCA953x I2C gpio devices Initial support for NXP's 4 and 8 bit I2C gpio expanders (eg pca9537, pca9557, etc). The CONFIG_PCA953X define enables support for the devices while the CONFIG_CMD_PCA953X define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO define enables an 'info' sub-command which provides summary information for the given pca953x device. Signed-off-by: Peter Tyser --- Makefile | 2 + README | 9 ++ drivers/gpio/Makefile | 47 ++++++++++ drivers/gpio/pca953x.c | 227 +++++++++++++++++++++++++++++++++++++++++++++++++ include/pca953x.h | 39 +++++++++ 5 files changed, 324 insertions(+) create mode 100644 drivers/gpio/Makefile create mode 100644 drivers/gpio/pca953x.c create mode 100644 include/pca953x.h (limited to 'include') diff --git a/Makefile b/Makefile index 4df48129b8c..0fc64902f1c 100644 --- a/Makefile +++ b/Makefile @@ -228,6 +228,7 @@ LIBS += drivers/bios_emulator/libatibiosemu.a LIBS += drivers/block/libblock.a LIBS += drivers/dma/libdma.a LIBS += drivers/fpga/libfpga.a +LIBS += drivers/gpio/libgpio.a LIBS += drivers/hwmon/libhwmon.a LIBS += drivers/i2c/libi2c.a LIBS += drivers/input/libinput.a @@ -407,6 +408,7 @@ TAG_SUBDIRS += disk TAG_SUBDIRS += common TAG_SUBDIRS += drivers/bios_emulator TAG_SUBDIRS += drivers/block +TAG_SUBDIRS += drivers/gpio TAG_SUBDIRS += drivers/hwmon TAG_SUBDIRS += drivers/i2c TAG_SUBDIRS += drivers/input diff --git a/README b/README index 2a553c274c3..eb86ebaf110 100644 --- a/README +++ b/README @@ -621,6 +621,8 @@ The following options need to be configured: CONFIG_CMD_MII * MII utility commands CONFIG_CMD_NAND * NAND support CONFIG_CMD_NET bootp, tftpboot, rarpboot + CONFIG_CMD_PCA953X * PCA953x I2C gpio commands + CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command CONFIG_CMD_PCI * pciinfo CONFIG_CMD_PCMCIA * PCMCIA support CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network @@ -698,6 +700,13 @@ The following options need to be configured: Note that if the RTC uses I2C, then the I2C interface must also be configured. See I2C Support, below. +- GPIO Support: + CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO + CONFIG_PCA953X_INFO - enable pca953x info command + + Note that if the GPIO device uses I2C, then the I2C interface + must also be configured. See I2C Support, below. + - Timestamp Support: When CONFIG_TIMESTAMP is selected, the timestamp diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile new file mode 100644 index 00000000000..dd618ed71c7 --- /dev/null +++ b/drivers/gpio/Makefile @@ -0,0 +1,47 @@ +# +# Copyright 2000-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libgpio.a + +COBJS-$(CONFIG_PCA953X) += pca953x.o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################## diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c new file mode 100644 index 00000000000..390d99ad3d6 --- /dev/null +++ b/drivers/gpio/pca953x.c @@ -0,0 +1,227 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Driver for NXP's 4 and 8 bit I2C gpio expanders (eg pca9537, pca9557, etc) + * TODO: support additional devices with more than 8-bits GPIO + */ + +#include +#include +#include + +/* Default to an address that hopefully won't corrupt other i2c devices */ +#ifndef CONFIG_SYS_I2C_PCA953X_ADDR +#define CONFIG_SYS_I2C_PCA953X_ADDR (~0) +#endif + +enum { + PCA953X_CMD_INFO, + PCA953X_CMD_DEVICE, + PCA953X_CMD_OUTPUT, + PCA953X_CMD_INPUT, + PCA953X_CMD_INVERT, +}; + +/* + * Modify masked bits in register + */ +static int pca953x_reg_write(uint8_t chip, uint addr, uint mask, uint data) +{ + uint8_t val; + + if (i2c_read(chip, addr, 1, &val, 1)) + return -1; + + val &= ~mask; + val |= data; + + return i2c_write(chip, addr, 1, &val, 1); +} + +/* + * Set output value of IO pins in 'mask' to corresponding value in 'data' + * 0 = low, 1 = high + */ +int pca953x_set_val(uint8_t chip, uint mask, uint data) +{ + return pca953x_reg_write(chip, PCA953X_OUT, mask, data); +} + +/* + * Set read polarity of IO pins in 'mask' to corresponding value in 'data' + * 0 = read pin value, 1 = read inverted pin value + */ +int pca953x_set_pol(uint8_t chip, uint mask, uint data) +{ + return pca953x_reg_write(chip, PCA953X_POL, mask, data); +} + +/* + * Set direction of IO pins in 'mask' to corresponding value in 'data' + * 0 = output, 1 = input + */ +int pca953x_set_dir(uint8_t chip, uint mask, uint data) +{ + return pca953x_reg_write(chip, PCA953X_CONF, mask, data); +} + +/* + * Read current logic level of all IO pins + */ +int pca953x_get_val(uint8_t chip) +{ + uint8_t val; + + if (i2c_read(chip, 0, 1, &val, 1)) + return -1; + + return (int)val; +} + +#ifdef CONFIG_CMD_PCA953X +#ifdef CONFIG_CMD_PCA953X_INFO +/* + * Display pca953x information + */ +static int pca953x_info(uint8_t chip) +{ + int i; + uint8_t data; + + printf("pca953x@ 0x%x:\n\n", chip); + printf("gpio pins: 76543210\n"); + printf("-------------------\n"); + + if (i2c_read(chip, PCA953X_CONF, 1, &data, 1)) + return -1; + printf("conf: "); + for (i = 7; i >= 0; i--) + printf("%c", data & (1 << i) ? 'i' : 'o'); + printf("\n"); + + if (i2c_read(chip, PCA953X_POL, 1, &data, 1)) + return -1; + printf("invert: "); + for (i = 7; i >= 0; i--) + printf("%c", data & (1 << i) ? '1' : '0'); + printf("\n"); + + if (i2c_read(chip, PCA953X_IN, 1, &data, 1)) + return -1; + printf("input: "); + for (i = 7; i >= 0; i--) + printf("%c", data & (1 << i) ? '1' : '0'); + printf("\n"); + + if (i2c_read(chip, PCA953X_OUT, 1, &data, 1)) + return -1; + printf("output: "); + for (i = 7; i >= 0; i--) + printf("%c", data & (1 << i) ? '1' : '0'); + printf("\n"); + + return 0; +} +#endif /* CONFIG_CMD_PCA953X_INFO */ + +cmd_tbl_t cmd_pca953x[] = { + U_BOOT_CMD_MKENT(device, 3, 0, (void *)PCA953X_CMD_DEVICE, "", ""), + U_BOOT_CMD_MKENT(output, 4, 0, (void *)PCA953X_CMD_OUTPUT, "", ""), + U_BOOT_CMD_MKENT(input, 3, 0, (void *)PCA953X_CMD_INPUT, "", ""), + U_BOOT_CMD_MKENT(invert, 4, 0, (void *)PCA953X_CMD_INVERT, "", ""), +#ifdef CONFIG_CMD_PCA953X_INFO + U_BOOT_CMD_MKENT(info, 2, 0, (void *)PCA953X_CMD_INFO, "", ""), +#endif +}; + +int do_pca953x(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + static uint8_t chip = CONFIG_SYS_I2C_PCA953X_ADDR; + int val; + ulong ul_arg2 = 0; + ulong ul_arg3 = 0; + cmd_tbl_t *c; + + c = find_cmd_tbl(argv[1], cmd_pca953x, ARRAY_SIZE(cmd_pca953x)); + + /* All commands but "device" require 'maxargs' arguments */ + if (!c || !((argc == (c->maxargs)) || + (((int)c->cmd == PCA953X_CMD_DEVICE) && + (argc == (c->maxargs - 1))))) { + printf("Usage:\n%s\n", cmdtp->usage); + return 1; + } + + /* arg2 used as chip number or pin number */ + if (argc > 2) + ul_arg2 = simple_strtoul(argv[2], NULL, 16); + + /* arg3 used as pin or invert value */ + if (argc > 3) + ul_arg3 = simple_strtoul(argv[3], NULL, 16) & 0x1; + + switch ((int)c->cmd) { +#ifdef CONFIG_CMD_PCA953X_INFO + case PCA953X_CMD_INFO: + return pca953x_info(chip); +#endif + case PCA953X_CMD_DEVICE: + if (argc == 3) + chip = (uint8_t)ul_arg2; + printf("Current device address: 0x%x\n", chip); + return 0; + case PCA953X_CMD_INPUT: + pca953x_set_dir(chip, (1 << ul_arg2), + PCA953X_DIR_IN << ul_arg2); + val = (pca953x_get_val(chip) & (1 << ul_arg2)) != 0; + + printf("chip 0x%02x, pin 0x%lx = %d\n", chip, ul_arg2, val); + return val; + case PCA953X_CMD_OUTPUT: + pca953x_set_dir(chip, (1 << ul_arg2), + (PCA953X_DIR_OUT << ul_arg2)); + return pca953x_set_val(chip, (1 << ul_arg2), + (ul_arg3 << ul_arg2)); + case PCA953X_CMD_INVERT: + return pca953x_set_pol(chip, (1 << ul_arg2), + (ul_arg3 << ul_arg2)); + default: + /* We should never get here */ + return 1; + } +} + +U_BOOT_CMD( + pca953x, 5, 1, do_pca953x, + "pca953x - pca953x gpio access\n", + "device [dev]\n" + " - show or set current device address\n" +#ifdef CONFIG_CMD_PCA953X_INFO + "pca953x info\n" + " - display info for current chip\n" +#endif + "pca953x output pin 0|1\n" + " - set pin as output and drive low or high\n" + "pca953x invert pin 0|1\n" + " - disable/enable polarity inversion for reads\n" + "pca953x intput pin\n" + " - set pin as input and read value\n" +); + +#endif /* CONFIG_CMD_PCA953X */ diff --git a/include/pca953x.h b/include/pca953x.h new file mode 100644 index 00000000000..6c2b58c563d --- /dev/null +++ b/include/pca953x.h @@ -0,0 +1,39 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __PCA953X_H_ +#define __PCA953X_H_ + +#define PCA953X_IN 0x00 +#define PCA953X_OUT 0x01 +#define PCA953X_POL 0x02 +#define PCA953X_CONF 0x03 + +#define PCA953X_OUT_LOW 0 +#define PCA953X_OUT_HIGH 1 +#define PCA953X_POL_NORMAL 0 +#define PCA953X_POL_INVERT 1 +#define PCA953X_DIR_OUT 0 +#define PCA953X_DIR_IN 1 + +int pca953x_set_val(u8 chip, uint mask, uint data); +int pca953x_set_pol(u8 chip, uint mask, uint data); +int pca953x_set_dir(u8 chip, uint mask, uint data); +int pca953x_get_val(u8 chip); + +#endif /* __PCA953X_H_ */ -- cgit v1.3.1 From ccf0fdd02b97323f8caae18d06cc9daeac2f192f Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Wed, 17 Dec 2008 16:36:23 -0600 Subject: XPedite5370 board support Initial support for Extreme Engineering Solutions XPedite5370 - a MPC8572-based 3U VPX single board computer with a PMC/XMC site. Signed-off-by: Peter Tyser --- MAINTAINERS | 3 + MAKEALL | 1 + Makefile | 3 + board/xes/common/Makefile | 56 ++++ board/xes/common/fsl_8572_clk.c | 51 ++++ board/xes/common/fsl_85xx_ddr.c | 93 ++++++ board/xes/common/fsl_85xx_pci.c | 265 ++++++++++++++++ board/xes/xpedite5370/Makefile | 45 +++ board/xes/xpedite5370/config.mk | 35 +++ board/xes/xpedite5370/ddr.c | 270 +++++++++++++++++ board/xes/xpedite5370/law.c | 54 ++++ board/xes/xpedite5370/tlb.c | 94 ++++++ board/xes/xpedite5370/u-boot.lds | 145 +++++++++ board/xes/xpedite5370/xpedite5370.c | 128 ++++++++ include/configs/XPEDITE5370.h | 589 ++++++++++++++++++++++++++++++++++++ 15 files changed, 1832 insertions(+) create mode 100644 board/xes/common/Makefile create mode 100644 board/xes/common/fsl_8572_clk.c create mode 100644 board/xes/common/fsl_85xx_ddr.c create mode 100644 board/xes/common/fsl_85xx_pci.c create mode 100644 board/xes/xpedite5370/Makefile create mode 100644 board/xes/xpedite5370/config.mk create mode 100644 board/xes/xpedite5370/ddr.c create mode 100644 board/xes/xpedite5370/law.c create mode 100644 board/xes/xpedite5370/tlb.c create mode 100644 board/xes/xpedite5370/u-boot.lds create mode 100644 board/xes/xpedite5370/xpedite5370.c create mode 100644 include/configs/XPEDITE5370.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index f04879555a3..be10eb49a0c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -411,6 +411,9 @@ Rune Torgersen MPC8266ADS MPC8266 +Peter Tyser + + XPEDITE5370 MPC8572 David Updegraff diff --git a/MAKEALL b/MAKEALL index cc49a98080c..a136bad7a8a 100755 --- a/MAKEALL +++ b/MAKEALL @@ -385,6 +385,7 @@ LIST_85xx=" \ TQM8548 \ TQM8555 \ TQM8560 \ + XPEDITE5370 \ " ######################################################################### diff --git a/Makefile b/Makefile index 0fc64902f1c..752a370669f 100644 --- a/Makefile +++ b/Makefile @@ -2463,6 +2463,9 @@ TQM8560_config: unconfig echo "#define CONFIG_BOARDNAME \"TQM$${CTYPE}\"">>$(obj)include/config.h; @$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx tqc +XPEDITE5370_config: unconfig + @$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5370 xes + ######################################################################### ## MPC86xx Systems ######################################################################### diff --git a/board/xes/common/Makefile b/board/xes/common/Makefile new file mode 100644 index 00000000000..c5cd6331ef7 --- /dev/null +++ b/board/xes/common/Makefile @@ -0,0 +1,56 @@ +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)board/$(VENDOR)/common) +endif + +LIB = $(obj)lib$(VENDOR).a + +COBJS-$(CONFIG_MPC8572) += fsl_8572_clk.o +COBJS-$(CONFIG_MPC85xx) += fsl_85xx_ddr.o +COBJS-$(CONFIG_FSL_PCI_INIT) += fsl_85xx_pci.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/xes/common/fsl_8572_clk.c b/board/xes/common/fsl_8572_clk.c new file mode 100644 index 00000000000..f5df2dae847 --- /dev/null +++ b/board/xes/common/fsl_8572_clk.c @@ -0,0 +1,51 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +/* + * Return SYSCLK input frequency - 50 MHz or 66 MHz depending on POR config + */ +unsigned long get_board_sys_clk(ulong dummy) +{ + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 gpporcr = gur->gpporcr; + + if (gpporcr & 0x10000) + return 66666666; + else + return 50000000; +} + +/* + * Return DDR input clock - synchronous with SYSCLK or 66 MHz + */ +unsigned long get_board_ddr_clk(ulong dummy) +{ + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; + + if (ddr_ratio == 0x7) + return get_board_sys_clk(dummy); + + return 66666666; +} diff --git a/board/xes/common/fsl_85xx_ddr.c b/board/xes/common/fsl_85xx_ddr.c new file mode 100644 index 00000000000..30b47670197 --- /dev/null +++ b/board/xes/common/fsl_85xx_ddr.c @@ -0,0 +1,93 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) +extern void ddr_enable_ecc(unsigned int dram_size); +#endif + +phys_size_t initdram(int board_type) +{ + phys_size_t dram_size = fsl_ddr_sdram(); + + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + + dram_size *= 0x100000; + +#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) + /* Initialize and enable DDR ECC */ + ddr_enable_ecc(dram_size); +#endif + + return dram_size; +} + +#if defined(CONFIG_DDR_ECC) || (CONFIG_NUM_DDR_CONTROLLERS > 1) +void board_add_ram_info(int use_default) +{ +#if (CONFIG_NUM_DDR_CONTROLLERS > 1) + volatile ccsr_ddr_t *ddr1 = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); +#endif + + puts(" ("); + +#if (CONFIG_NUM_DDR_CONTROLLERS > 1) + /* Print interleaving information */ + if (ddr1->cs0_config & 0x20000000) { + switch ((ddr1->cs0_config >> 24) & 0xf) { + case 0: + puts("cache line"); + break; + case 1: + puts("page"); + break; + case 2: + puts("bank"); + break; + case 3: + puts("super-bank"); + break; + default: + puts("invalid"); + break; + } + } else { + puts("no"); + } + + puts(" interleaving"); +#endif + +#if (CONFIG_NUM_DDR_CONTROLLERS > 1) && defined(CONFIG_DDR_ECC) + puts(", "); +#endif + +#if defined(CONFIG_DDR_ECC) + puts("ECC enabled"); +#endif + + puts(")"); +} +#endif /* CONFIG_DDR_ECC || CONFIG_NUM_DDR_CONTROLLERS > 1 */ diff --git a/board/xes/common/fsl_85xx_pci.c b/board/xes/common/fsl_85xx_pci.c new file mode 100644 index 00000000000..b8e363ec965 --- /dev/null +++ b/board/xes/common/fsl_85xx_pci.c @@ -0,0 +1,265 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2007-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include + +extern int fsl_pci_setup_inbound_windows(struct pci_region *r); +extern void fsl_pci_init(struct pci_controller *hose); + +int first_free_busno = 0; + +#ifdef CONFIG_PCIE1 +static struct pci_controller pcie1_hose; +#endif +#ifdef CONFIG_PCIE2 +static struct pci_controller pcie2_hose; +#endif +#ifdef CONFIG_PCIE3 +static struct pci_controller pcie3_hose; +#endif + +/* Correlate host/agent POR bits to usable info. Table 4-14 */ +struct host_agent_cfg_t { + uchar pcie_root[3]; + uchar rio_host; +} host_agent_cfg[8] = { + {{0, 0, 0}, 0}, + {{0, 1, 1}, 1}, + {{1, 0, 1}, 0}, + {{1, 1, 0}, 1}, + {{0, 0, 1}, 0}, + {{0, 1, 0}, 1}, + {{1, 0, 0}, 0}, + {{1, 1, 1}, 1} +}; + +/* Correlate port width POR bits to usable info. Table 4-15 */ +struct io_port_cfg_t { + uchar pcie_width[3]; + uchar rio_width; +} io_port_cfg[16] = { + {{0, 0, 0}, 0}, + {{0, 0, 0}, 0}, + {{4, 0, 0}, 0}, + {{4, 4, 0}, 0}, + {{0, 0, 0}, 0}, + {{0, 0, 0}, 0}, + {{0, 0, 0}, 4}, + {{4, 2, 2}, 0}, + {{0, 0, 0}, 0}, + {{0, 0, 0}, 0}, + {{0, 0, 0}, 0}, + {{4, 0, 0}, 4}, + {{4, 0, 0}, 4}, + {{0, 0, 0}, 4}, + {{0, 0, 0}, 4}, + {{8, 0, 0}, 0}, +}; + +void pci_init_board(void) +{ + struct pci_controller *hose; + volatile ccsr_fsl_pci_t *pci; + int width; + int host; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + uint devdisr = gur->devdisr; + uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; + uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16; + struct pci_region *r; + + debug(" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n", + devdisr, io_sel, host_agent); + +#ifdef CONFIG_PCIE1 + pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; + hose = &pcie1_hose; + host = host_agent_cfg[host_agent].pcie_root[0]; + width = io_port_cfg[io_sel].pcie_width[0]; + r = hose->regions; + + if (width && !(devdisr & MPC85xx_DEVDISR_PCIE)) { + printf("\n PCIE1 connected as %s (x%d)", + host ? "Root Complex" : "End Point", width); + if (pci->pme_msg_det) { + pci->pme_msg_det = 0xffffffff; + debug(" with errors. Clearing. Now 0x%08x", + pci->pme_msg_det); + } + printf("\n"); + + /* inbound */ + r += fsl_pci_setup_inbound_windows(r); + + /* outbound memory */ + pci_set_region(r++, + CONFIG_SYS_PCIE1_MEM_BASE, + CONFIG_SYS_PCIE1_MEM_PHYS, + CONFIG_SYS_PCIE1_MEM_SIZE, + PCI_REGION_MEM); + + /* outbound io */ + pci_set_region(r++, + CONFIG_SYS_PCIE1_IO_BASE, + CONFIG_SYS_PCIE1_IO_PHYS, + CONFIG_SYS_PCIE1_IO_SIZE, + PCI_REGION_IO); + + hose->region_count = r - hose->regions; + + hose->first_busno = first_free_busno; + pci_setup_indirect(hose, (int)&pci->cfg_addr, + (int) &pci->cfg_data); + + fsl_pci_init(hose); + + first_free_busno = hose->last_busno+1; + printf(" PCIE1 on bus %02x - %02x\n", + hose->first_busno, hose->last_busno); + } +#else + gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */ +#endif /* CONFIG_PCIE1 */ + +#ifdef CONFIG_PCIE2 + pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; + hose = &pcie2_hose; + host = host_agent_cfg[host_agent].pcie_root[1]; + width = io_port_cfg[io_sel].pcie_width[1]; + r = hose->regions; + + if (width && !(devdisr & MPC85xx_DEVDISR_PCIE2)) { + printf("\n PCIE2 connected as %s (x%d)", + host ? "Root Complex" : "End Point", width); + if (pci->pme_msg_det) { + pci->pme_msg_det = 0xffffffff; + debug(" with errors. Clearing. Now 0x%08x", + pci->pme_msg_det); + } + printf("\n"); + + /* inbound */ + r += fsl_pci_setup_inbound_windows(r); + + /* outbound memory */ + pci_set_region(r++, + CONFIG_SYS_PCIE2_MEM_BASE, + CONFIG_SYS_PCIE2_MEM_PHYS, + CONFIG_SYS_PCIE2_MEM_SIZE, + PCI_REGION_MEM); + + /* outbound io */ + pci_set_region(r++, + CONFIG_SYS_PCIE2_IO_BASE, + CONFIG_SYS_PCIE2_IO_PHYS, + CONFIG_SYS_PCIE2_IO_SIZE, + PCI_REGION_IO); + + hose->region_count = r - hose->regions; + + hose->first_busno = first_free_busno; + pci_setup_indirect(hose, (int)&pci->cfg_addr, + (int)&pci->cfg_data); + + fsl_pci_init(hose); + first_free_busno = hose->last_busno+1; + printf(" PCIE2 on bus %02x - %02x\n", + hose->first_busno, hose->last_busno); + + } +#else + gur->devdisr |= MPC85xx_DEVDISR_PCIE2; /* disable */ +#endif /* CONFIG_PCIE2 */ + +#ifdef CONFIG_PCIE3 + pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; + hose = &pcie3_hose; + host = host_agent_cfg[host_agent].pcie_root[2]; + width = io_port_cfg[io_sel].pcie_width[2]; + r = hose->regions; + + if (width && !(devdisr & MPC85xx_DEVDISR_PCIE3)) { + printf("\n PCIE3 connected as %s (x%d)", + host ? "Root Complex" : "End Point", width); + if (pci->pme_msg_det) { + pci->pme_msg_det = 0xffffffff; + debug(" with errors. Clearing. Now 0x%08x", + pci->pme_msg_det); + } + printf("\n"); + + /* inbound */ + r += fsl_pci_setup_inbound_windows(r); + + /* outbound memory */ + pci_set_region(r++, + CONFIG_SYS_PCIE3_MEM_BASE, + CONFIG_SYS_PCIE3_MEM_PHYS, + CONFIG_SYS_PCIE3_MEM_SIZE, + PCI_REGION_MEM); + + /* outbound io */ + pci_set_region(r++, + CONFIG_SYS_PCIE3_IO_BASE, + CONFIG_SYS_PCIE3_IO_PHYS, + CONFIG_SYS_PCIE3_IO_SIZE, + PCI_REGION_IO); + + hose->region_count = r - hose->regions; + + hose->first_busno = first_free_busno; + pci_setup_indirect(hose, (int)&pci->cfg_addr, + (int)&pci->cfg_data); + + fsl_pci_init(hose); + first_free_busno = hose->last_busno+1; + printf(" PCIE3 on bus %02x - %02x\n", + hose->first_busno, hose->last_busno); + } +#else + gur->devdisr |= MPC85xx_DEVDISR_PCIE3; /* disable */ +#endif /* CONFIG_PCIE3 */ +} + +#if defined(CONFIG_OF_BOARD_SETUP) +extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, + struct pci_controller *hose); + +void ft_board_pci_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_PCIE1 + ft_fsl_pci_setup(blob, "pci2", &pcie1_hose); +#endif +#ifdef CONFIG_PCIE2 + ft_fsl_pci_setup(blob, "pci1", &pcie2_hose); +#endif +#ifdef CONFIG_PCIE3 + ft_fsl_pci_setup(blob, "pci0", &pcie3_hose); +#endif +} +#endif /* CONFIG_OF_BOARD_SETUP */ diff --git a/board/xes/xpedite5370/Makefile b/board/xes/xpedite5370/Makefile new file mode 100644 index 00000000000..919397c40d5 --- /dev/null +++ b/board/xes/xpedite5370/Makefile @@ -0,0 +1,45 @@ +# +# Copyright 2008 Extreme Engineering Solutions, Inc. +# Copyright 2007 Freescale Semiconductor, Inc. +# (C) Copyright 2001-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += $(BOARD).o +COBJS-y += ddr.o +COBJS-y += law.o +COBJS-y += tlb.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) $(SOBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/xes/xpedite5370/config.mk b/board/xes/xpedite5370/config.mk new file mode 100644 index 00000000000..39469b22c86 --- /dev/null +++ b/board/xes/xpedite5370/config.mk @@ -0,0 +1,35 @@ +# +# Copyright 2008 Extreme Engineering Solutions, Inc. +# Copyright 2007-2008 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# xpedite5370 board +# +ifndef TEXT_BASE +TEXT_BASE = 0xfff80000 +endif + +PLATFORM_RELFLAGS += -mrelocatable + +PLATFORM_CPPFLAGS += -DCONFIG_E500=1 +PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 +PLATFORM_CPPFLAGS += -DCONFIG_MPC8572=1 diff --git a/board/xes/xpedite5370/ddr.c b/board/xes/xpedite5370/ddr.c new file mode 100644 index 00000000000..4d3f255d705 --- /dev/null +++ b/board/xes/xpedite5370/ddr.c @@ -0,0 +1,270 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +#include +#include + +static void get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address) +{ + i2c_read(i2c_address, SPD_EEPROM_OFFSET, 2, (uchar *)spd, + sizeof(ddr2_spd_eeprom_t)); +} + +unsigned int fsl_ddr_get_mem_data_rate(void) +{ + return get_ddr_freq(0); +} + +void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd, + unsigned int ctrl_num) +{ + unsigned int i; + unsigned int i2c_address = 0; + + for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { + if (ctrl_num == 0) + i2c_address = SPD_EEPROM_ADDRESS1; + if (ctrl_num == 1) + i2c_address = SPD_EEPROM_ADDRESS2; + get_spd(&(ctrl_dimms_spd[i]), i2c_address); + } +} + +/* + * There are four board-specific SDRAM timing parameters which must be + * calculated based on the particular PCB artwork. These are: + * 1.) CPO (Read Capture Delay) + * - TIMING_CFG_2 register + * Source: Calculation based on board trace lengths and + * chip-specific internal delays. + * 2.) WR_DATA_DELAY (Write Command to Data Strobe Delay) + * - TIMING_CFG_2 register + * Source: Calculation based on board trace lengths. + * Unless clock and DQ lanes are very different + * lengths (>2"), this should be set to the nominal value + * of 1/2 clock delay. + * 3.) CLK_ADJUST (Clock and Addr/Cmd alignment control) + * - DDR_SDRAM_CLK_CNTL register + * Source: Signal Integrity Simulations + * 4.) 2T Timing on Addr/Ctl + * - TIMING_CFG_2 register + * Source: Signal Integrity Simulations + * Usually only needed with heavy load/very high speed (>DDR2-800) + * + * ====== XPedite5370 DDR2-600 read delay calculations ====== + * + * See Freescale's App Note AN2583 as refrence. This document also + * contains the chip-specific delays for 8548E, 8572, etc. + * + * For MPC8572E + * Minimum chip delay (Ch 0): 1.372ns + * Maximum chip delay (Ch 0): 2.914ns + * Minimum chip delay (Ch 1): 1.220ns + * Maximum chip delay (Ch 1): 2.595ns + * + * CLK adjust = 5 (from simulations) = 5/8* 3.33ns = 2080ps + * + * Minimum delay calc (Ch 0): + * clock prop - dram skew + min dqs prop delay + clk_adjust + min chip dly + * 2.3" * 180 - 400ps + 1.9" * 180 + 2080ps + 1372ps + * = 3808ps + * = 3.808ns + * + * Maximum delay calc (Ch 0): + * clock prop + dram skew + max dqs prop delay + clk_adjust + max chip dly + * 2.3" * 180 + 400ps + 2.4" * 180 + 2080ps + 2914ps + * = 6240ps + * = 6.240ns + * + * Minimum delay calc (Ch 1): + * clock prop - dram skew + min dqs prop delay + clk_adjust + min chip dly + * 1.46" * 180- 400ps + 0.7" * 180 + 2080ps + 1220ps + * = 3288ps + * = 3.288ns + * + * Maximum delay calc (Ch 1): + * clock prop + dram skew + max dqs prop delay + clk_adjust + min chip dly + * 1.46" * 180+ 400ps + 1.1" * 180 + 2080ps + 2595ps + * = 5536ps + * = 5.536ns + * + * Ch.0: 3.808ns to 6.240ns additional delay needed (pick 5ns as target) + * This is 1.5 clock cycles, pick CPO = READ_LAT + 3/2 (0x8) + * Ch.1: 3.288ns to 5.536ns additional delay needed (pick 4.4ns as target) + * This is 1.32 clock cycles, pick CPO = READ_LAT + 5/4 (0x7) + * + * + * ====== XPedite5370 DDR2-800 read delay calculations ====== + * + * See Freescale's App Note AN2583 as refrence. This document also + * contains the chip-specific delays for 8548E, 8572, etc. + * + * For MPC8572E + * Minimum chip delay (Ch 0): 1.372ns + * Maximum chip delay (Ch 0): 2.914ns + * Minimum chip delay (Ch 1): 1.220ns + * Maximum chip delay (Ch 1): 2.595ns + * + * CLK adjust = 5 (from simulations) = 5/8* 2.5ns = 1563ps + * + * Minimum delay calc (Ch 0): + * clock prop - dram skew + min dqs prop delay + clk_adjust + min chip dly + * 2.3" * 180 - 350ps + 1.9" * 180 + 1563ps + 1372ps + * = 3341ps + * = 3.341ns + * + * Maximum delay calc (Ch 0): + * clock prop + dram skew + max dqs prop delay + clk_adjust + max chip dly + * 2.3" * 180 + 350ps + 2.4" * 180 + 1563ps + 2914ps + * = 5673ps + * = 5.673ns + * + * Minimum delay calc (Ch 1): + * clock prop - dram skew + min dqs prop delay + clk_adjust + min chip dly + * 1.46" * 180- 350ps + 0.7" * 180 + 1563ps + 1220ps + * = 2822ps + * = 2.822ns + * + * Maximum delay calc (Ch 1): + * clock prop + dram skew + max dqs prop delay + clk_adjust + min chip dly + * 1.46" * 180+ 350ps + 1.1" * 180 + 1563ps + 2595ps + * = 4968ps + * = 4.968ns + * + * Ch.0: 3.341ns to 5.673ns additional delay needed (pick 4.5ns as target) + * This is 1.8 clock cycles, pick CPO = READ_LAT + 7/4 (0x9) + * Ch.1: 2.822ns to 4.968ns additional delay needed (pick 3.9ns as target) + * This is 1.56 clock cycles, pick CPO = READ_LAT + 3/2 (0x8) + * + * Write latency (WR_DATA_DELAY) is calculated by doing the following: + * + * The DDR SDRAM specification requires DQS be received no sooner than + * 75% of an SDRAM clock period—and no later than 125% of a clock + * period—from the capturing clock edge of the command/address at the + * SDRAM. + * + * Based on the above tracelengths, the following are calculated: + * Ch. 0 8572 to DRAM propagation (DQ lanes) : 1.9" * 180 = 0.342ns + * Ch. 0 8572 to DRAM propagation (CLKs) : 2.3" * 180 = 0.414ns + * Ch. 1 8572 to DRAM propagation (DQ lanes) : 0.7" * 180 = 0.126ns + * Ch. 1 8572 to DRAM propagation (CLKs ) : 1.47" * 180 = 0.264ns + * + * Difference in arrival time CLK vs. DQS: + * Ch. 0 0.072ns + * Ch. 1 0.138ns + * + * Both of these values are much less than 25% of the clock + * period at DDR2-600 or DDR2-800, so no additional delay is needed over + * the 1/2 cycle which normally aligns the first DQS transition + * exactly WL (CAS latency minus one cycle) after the CAS strobe. + * See Figure 9-53 in MPC8572E manual: "1/2 delay" in Freescale's + * terminology corresponds to exactly one clock period delay after + * the CAS strobe. (due to the fact that the "delay" is referenced + * from the *falling* edge of the CLK, just after the rising edge + * which the CAS strobe is latched on. + */ + +typedef struct board_memctl_options { + uint16_t datarate_mhz_low; + uint16_t datarate_mhz_high; + uint8_t clk_adjust; + uint8_t cpo_override; + uint8_t write_data_delay; +} board_memctl_options_t; + +static struct board_memctl_options bopts_ctrl[][2] = { + { + /* Controller 0 */ + { + /* DDR2 600/667 */ + .datarate_mhz_low = 500, + .datarate_mhz_high = 750, + .clk_adjust = 5, + .cpo_override = 8, + .write_data_delay = 2, + }, + { + /* DDR2 800 */ + .datarate_mhz_low = 750, + .datarate_mhz_high = 850, + .clk_adjust = 5, + .cpo_override = 9, + .write_data_delay = 2, + }, + }, + { + /* Controller 1 */ + { + /* DDR2 600/667 */ + .datarate_mhz_low = 500, + .datarate_mhz_high = 750, + .clk_adjust = 5, + .cpo_override = 7, + .write_data_delay = 2, + }, + { + /* DDR2 800 */ + .datarate_mhz_low = 750, + .datarate_mhz_high = 850, + .clk_adjust = 5, + .cpo_override = 8, + .write_data_delay = 2, + }, + }, +}; + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + struct board_memctl_options *bopts = bopts_ctrl[ctrl_num]; + sys_info_t sysinfo; + int i; + unsigned int datarate; + + get_sys_info(&sysinfo); + datarate = sysinfo.freqDDRBus / 1000 / 1000; + + for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) { + if ((bopts[i].datarate_mhz_low <= datarate) && + (bopts[i].datarate_mhz_high >= datarate)) { + debug("controller %d:\n", ctrl_num); + debug(" clk_adjust = %d\n", bopts[i].clk_adjust); + debug(" cpo = %d\n", bopts[i].cpo_override); + debug(" write_data_delay = %d\n", + bopts[i].write_data_delay); + popts->clk_adjust = bopts[i].clk_adjust; + popts->cpo_override = bopts[i].cpo_override; + popts->write_data_delay = bopts[i].write_data_delay; + } + } + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; +} diff --git a/board/xes/xpedite5370/law.c b/board/xes/xpedite5370/law.c new file mode 100644 index 00000000000..daee676c426 --- /dev/null +++ b/board/xes/xpedite5370/law.c @@ -0,0 +1,54 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +/* + * Notes: + * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. + * If flash is 8M at default position (last 8M), no LAW needed. + */ + +struct law_entry law_table[] = { + SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC), +#ifdef CONFIG_SYS_PCIE1_MEM_PHYS + SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_1G, LAW_TRGT_IF_PCIE_1), + SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1), +#endif +#ifdef CONFIG_SYS_PCIE2_MEM_PHYS + SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), + SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_2), +#endif +#ifdef CONFIG_SYS_PCIE3_MEM_PHYS + SET_LAW(CONFIG_SYS_PCIE3_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_3), + SET_LAW(CONFIG_SYS_PCIE3_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_3), +#endif +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/xes/xpedite5370/tlb.c b/board/xes/xpedite5370/tlb.c new file mode 100644 index 00000000000..caafa3011bb --- /dev/null +++ b/board/xes/xpedite5370/tlb.c @@ -0,0 +1,94 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +struct fsl_e_tlb_entry tlb_table[] = { + /* TLB 0 - for temp stack in cache */ + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + + /* W**G* - NOR flashes */ + /* This will be changed to *I*G* after relocation to RAM. */ + SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE2, CONFIG_SYS_FLASH_BASE2, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G, + 0, 0, BOOKE_PAGESZ_256M, 1), + + /* *I*G* - CCSRBAR */ + SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 1, BOOKE_PAGESZ_1M, 1), + + /* *I*G* - NAND flash */ + SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 2, BOOKE_PAGESZ_1M, 1), + +#ifdef CONFIG_PCIE1 + /* *I*G* - PCIe */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_PHYS, CONFIG_SYS_PCIE1_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 3, BOOKE_PAGESZ_1G, 1), +#endif + +#ifdef CONFIG_PCIE2 + /* *I*G* - PCIe */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE2_MEM_PHYS, CONFIG_SYS_PCIE2_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), +#endif + +#ifdef CONFIG_PCIE3 + /* *I*G* - PCIe */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_PHYS, CONFIG_SYS_PCIE3_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_256M, 1), +#endif + +#if defined(CONFIG_PCIE1) || defined(CONFIG_PCIE2) || defined(CONFIG_PCIE3) + /* *I*G* - PCIe */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 6, BOOKE_PAGESZ_64M, 1), +#endif + +}; + +int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/board/xes/xpedite5370/u-boot.lds b/board/xes/xpedite5370/u-boot.lds new file mode 100644 index 00000000000..cb399120d4a --- /dev/null +++ b/board/xes/xpedite5370/u-boot.lds @@ -0,0 +1,145 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2007-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +PHDRS +{ + text PT_LOAD; + bss PT_LOAD; +} + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + *(.text) + *(.got1) + } :text + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } :text + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } :text = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } :text = 0xffff + + . = ADDR(.text) + 0x80000; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } :bss + + . = ALIGN(4); + _end = . ; + PROVIDE (end = .); +} diff --git a/board/xes/xpedite5370/xpedite5370.c b/board/xes/xpedite5370/xpedite5370.c new file mode 100644 index 00000000000..487509527fe --- /dev/null +++ b/board/xes/xpedite5370/xpedite5370.c @@ -0,0 +1,128 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +extern void ft_board_pci_setup(void *blob, bd_t *bd); + +int checkboard(void) +{ + char *s; + + printf("Board: X-ES %s 3U VPX SBC\n", CONFIG_SYS_BOARD_NAME); + printf(" "); + s = getenv("board_rev"); + if (s) + printf("Rev %s, ", s); + s = getenv("serial#"); + if (s) + printf("Serial# %s, ", s); + s = getenv("board_cfg"); + if (s) + printf("Cfg %s", s); + printf("\n"); + + return 0; +} + +static void flash_cs_fixup(void) +{ + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + int flash_sel; + + /* + * Print boot dev and swap flash flash chip selects if booted from 2nd + * flash. Swapping chip selects presents user with a common memory + * map regardless of which flash was booted from. + */ + flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & + CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS)); + printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1); + + if (flash_sel) { + lbc->br0 = CONFIG_SYS_BR1_PRELIM; + lbc->or0 = CONFIG_SYS_OR1_PRELIM; + + lbc->br1 = CONFIG_SYS_BR0_PRELIM; + lbc->or1 = CONFIG_SYS_OR0_PRELIM; + } +} + +int board_early_init_r(void) +{ + /* Initialize PCA9557 devices */ + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0); + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); + + /* + * Remap NOR flash region to caching-inhibited + * so that flash can be erased/programmed properly. + */ + + /* Flush d-cache and invalidate i-cache of any FLASH data */ + flush_dcache(); + invalidate_icache(); + + /* Invalidate existing TLB entry for NOR flash */ + disable_tlb(0); + set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000), + (CONFIG_SYS_FLASH_BASE2 & 0xf0000000), + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_256M, 1); + + flash_cs_fixup(); + + return 0; +} + +#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_PCI + ft_board_pci_setup(blob, bd); +#endif + ft_cpu_setup(blob, bd); +} +#endif + +#ifdef CONFIG_MP +extern void cpu_mp_lmb_reserve(struct lmb *lmb); + +void board_lmb_reserve(struct lmb *lmb) +{ + cpu_mp_lmb_reserve(lmb); +} +#endif diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h new file mode 100644 index 00000000000..3bc0fe8f676 --- /dev/null +++ b/include/configs/XPEDITE5370.h @@ -0,0 +1,589 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2007-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * xpedite5370 board configuration file + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_BOOKE 1 /* BOOKE */ +#define CONFIG_E500 1 /* BOOKE e500 family */ +#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ +#define CONFIG_MPC8572 1 +#define CONFIG_XPEDITE5370 1 +#define CONFIG_SYS_BOARD_NAME "XPedite5370" +#define CONFIG_NUM_CPUS 2 /* 2 Cores */ +#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */ + +#define CONFIG_PCI 1 /* Enable PCI/PCIE */ +#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ +#define CONFIG_PCIE1 1 /* PCIE controler 1 */ +#define CONFIG_PCIE2 1 /* PCIE controler 2 */ +#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ +#define CONFIG_FSL_PCIE_RESET 1 /* need PCIe reset errata */ +#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ + +/* + * DDR config + */ +#define CONFIG_FSL_DDR2 +#undef CONFIG_FSL_DDR_INTERACTIVE +#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ +#define CONFIG_DDR_SPD +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#define SPD_EEPROM_ADDRESS1 0x54 /* Both channels use the */ +#define SPD_EEPROM_ADDRESS2 0x54 /* same SPD data */ +#define SPD_EEPROM_OFFSET 0x200 /* OFFSET of SPD in EEPROM */ +#define CONFIG_NUM_DDR_CONTROLLERS 2 +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 1 +#define CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_VERY_BIG_RAM + +#ifndef __ASSEMBLY__ +extern unsigned long get_board_sys_clk(unsigned long dummy); +extern unsigned long get_board_ddr_clk(unsigned long dummy); +#endif + +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) /* sysclk for MPC85xx */ +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /* ddrclk for MPC85xx */ + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_BTB /* toggle branch predition */ +#define CONFIG_ENABLE_36BIT_PHYS 1 + +/* + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + */ +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */ +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ +#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR + 0xa000) +#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR + 0x9000) + +/* + * Diagnostics + */ +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x20000000 + +/* + * Memory map + * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable + * 0x8000_0000 0xbfff_ffff PCIe1 Mem 1G non-cacheable + * 0xc000_0000 0xcfff_ffff PCIe2 Mem 256M non-cacheable + * 0xe000_0000 0xe7ff_ffff SRAM/SSRAM/L1 Cache 128M non-cacheable + * 0xe800_0000 0xe87f_ffff PCIe1 IO 8M non-cacheable + * 0xe880_0000 0xe8ff_ffff PCIe2 IO 8M non-cacheable + * 0xef00_0000 0xef0f_ffff CCSR/IMMR 1M non-cacheable + * 0xef80_0000 0xef8f_ffff NAND Flash 1M non-cacheable + * 0xf000_0000 0xf7ff_ffff NOR Flash 2 128M non-cacheable + * 0xf800_0000 0xffff_ffff NOR Flash 1 128M non-cacheable + */ + +#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_4 | LCRR_EADC_3) + +/* + * NAND flash configuration + */ +#define CONFIG_SYS_NAND_BASE 0xef800000 +#define CONFIG_SYS_NAND_BASE2 0xef840000 /* Unused at this time */ + +/* + * NOR flash configuration + */ +#define CONFIG_SYS_FLASH_BASE 0xf8000000 +#define CONFIG_SYS_FLASH_BASE2 0xf0000000 +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2} +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ + {0xf7f40000, 0xc0000} } +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ + +/* + * Chip select configuration + */ +/* NOR Flash 0 on CS0 */ +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR0_PRELIM (OR_AM_128MB | \ + OR_GPCM_CSNT | \ + OR_GPCM_XACS | \ + OR_GPCM_ACS_DIV2 | \ + OR_GPCM_SCY_8 | \ + OR_GPCM_TRLX | \ + OR_GPCM_EHTR | \ + OR_GPCM_EAD) + +/* NOR Flash 1 on CS1 */ +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM + +/* NAND flash on CS2 */ +#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ + (2< " + +/* + * Pass open firmware flat tree + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + +#define CONFIG_SYS_64BIT_VSPRINTF 1 +#define CONFIG_SYS_64BIT_STRTOUL 1 + +/* + * I2C + */ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE + +/* PEX8518 slave I2C interface */ +#define CONFIG_SYS_I2C_PEX8518_ADDR 0x70 + +/* I2C DS1631 temperature sensor */ +#define CONFIG_SYS_I2C_DS1621_ADDR 0x48 +#define CONFIG_DTT_DS1621 +#define CONFIG_DTT_SENSORS { 0 } + +/* I2C EEPROM - AT24C128B */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */ + +/* I2C RTC */ +#define CONFIG_RTC_M41T11 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_M41T11_BASE_YEAR 2000 + +/* GPIO/EEPROM/SRAM */ +#define CONFIG_DS4510 +#define CONFIG_SYS_I2C_DS4510_ADDR 0x51 + +/* GPIO */ +#define CONFIG_PCA953X +#define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18 +#define CONFIG_SYS_I2C_PCA953X_ADDR1 0x1c +#define CONFIG_SYS_I2C_PCA953X_ADDR2 0x1e +#define CONFIG_SYS_I2C_PCA953X_ADDR3 0x1f +#define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0 + +/* + * PU = pulled high, PD = pulled low + * I = input, O = output, IO = input/output + */ +/* PCA9557 @ 0x18*/ +#define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01 /* PU; UART0 enable (1: enabled) */ +#define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02 /* PU; UART0 serial mode select */ +#define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04 /* PU; UART1 enable (1: enabled) */ +#define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08 /* PU; UART1 serial mode select */ +#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10 /* PU; Boot flash CS select */ +#define CONFIG_SYS_PCA953X_NVM_WP 0x20 /* PU; Set to 0 to enable NVM writing */ +#define CONFIG_SYS_PCA953X_C0_VCORE_VID2 0x40 /* VID2 of ISL6262 */ +#define CONFIG_SYS_PCA953X_C0_VCORE_VID3 0x80 /* VID3 of ISL6262 */ + +/* PCA9557 @ 0x1c*/ +#define CONFIG_SYS_PCA953X_XMC0_ROOT0 0x01 /* PU; Low if XMC is RC */ +#define CONFIG_SYS_PCA953X_XMC0_MVMR0 0x02 /* XMC EEPROM write protect */ +#define CONFIG_SYS_PCA953X_XMC0_WAKE 0x04 /* PU; XMC wake */ +#define CONFIG_SYS_PCA953X_XMC0_BIST 0x08 /* PU; XMC built in self test */ +#define CONFIG_SYS_PCA953X_XMC_PRESENT 0x10 /* PU; Low if XMC module installed */ +#define CONFIG_SYS_PCA953X_PMC_PRESENT 0x20 /* PU; Low if PMC module installed */ +#define CONFIG_SYS_PCA953X_PMC0_MONARCH 0x40 /* PMC monarch mode enable */ +#define CONFIG_SYS_PCA953X_PMC0_EREADY 0x80 /* PU; PMC PCI eready */ + +/* PCA9557 @ 0x1e*/ +#define CONFIG_SYS_PCA953X_P0_GA0 0x01 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GA1 0x02 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GA2 0x04 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GA3 0x08 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GA4 0x10 /* PU; VPX Geographical address */ +#define CONFIG_SYS_PCA953X_P0_GAP 0x20 /* PU; tied to VPX P0.GAP */ +#define CONFIG_SYS_PCA953X_P1_SYSEN 0x80 /* PU; Pulled high; tied to VPX P1.SYSCON */ + +/* PCA9557 @ 0x1f */ +#define CONFIG_SYS_PCA953X_GPIO_VPX0 0x01 /* PU */ +#define CONFIG_SYS_PCA953X_GPIO_VPX1 0x02 /* PU */ +#define CONFIG_SYS_PCA953X_GPIO_VPX2 0x04 /* PU */ +#define CONFIG_SYS_PCA953X_GPIO_VPX3 0x08 /* PU */ +#define CONFIG_SYS_PCA953X_VPX_FRU_WRCTL 0x10 /* PD; I2C master source for FRU SEEPROM */ + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ +/* PCIE1 - VPX P1 */ +#define CONFIG_SYS_PCIE1_MEM_BASE 0x80000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BASE +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x40000000 /* 1G */ +#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */ + +/* PCIE2 - PEX8518 */ +#define CONFIG_SYS_PCIE2_MEM_BASE 0xc0000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BASE +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE2_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE2_IO_PHYS 0xe8800000 +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000 /* 8M */ + +/* + * Networking options + */ +#define CONFIG_TSEC_ENET /* tsec ethernet support */ +#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ +#define CONFIG_NET_MULTI 1 +#define CONFIG_TSEC_TBI +#define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ +#define CONFIG_ETHPRIME "eTSEC2" + +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC1_PHY_ADDR 1 +#define TSEC1_PHYIDX 0 +#define CONFIG_HAS_ETH0 + +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "eTSEC2" +#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC2_PHY_ADDR 2 +#define TSEC2_PHYIDX 0 +#define CONFIG_HAS_ETH1 + +/* + * Command configuration. + */ +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DS4510 +#define CONFIG_CMD_DS4510_INFO +#define CONFIG_CMD_DTT +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCA953X +#define CONFIG_CMD_PCA953X_INFO +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ +#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ +#define CONFIG_PANIC_HANG /* do not reset board on panic */ +#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_FIT 1 +#define CONFIG_FIT_VERBOSE 1 +#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ + +/* + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Environment Configuration + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */ +#define CONFIG_ENV_SIZE 0x8000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024)) + +/* + * Flash memory map: + * fff80000 - ffffffff Pri U-Boot (512 KB) + * fff40000 - fff7ffff Pri U-Boot Environment (256 KB) + * fff00000 - fff3ffff Pri FDT (256KB) + * fef00000 - ffefffff Pri OS image (16MB) + * f8000000 - feefffff Pri OS Use/Filesystem (111MB) + * + * f7f80000 - f7ffffff Sec U-Boot (512 KB) + * f7f40000 - f7f7ffff Sec U-Boot Environment (256 KB) + * f7f00000 - f7f3ffff Sec FDT (256KB) + * f6f00000 - f7efffff Sec OS image (16MB) + * f0000000 - f6efffff Sec OS Use/Filesystem (111MB) + */ +#define CONFIG_UBOOT1_ENV_ADDR MK_STR(0xfff80000) +#define CONFIG_UBOOT2_ENV_ADDR MK_STR(0xf7f80000) +#define CONFIG_FDT1_ENV_ADDR MK_STR(0xfff00000) +#define CONFIG_FDT2_ENV_ADDR MK_STR(0xf7f00000) +#define CONFIG_OS1_ENV_ADDR MK_STR(0xfef00000) +#define CONFIG_OS2_ENV_ADDR MK_STR(0xf6f00000) + +#define CONFIG_PROG_UBOOT1 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_UBOOT2 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_BOOT_OS_NET \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "if test -n $fdtaddr; then " \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "bootm $osaddr - $fdtaddr; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi; " \ + "else; " \ + "bootm $osaddr; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS1 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS2 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT1 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT2 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=yes\0" \ + "download_cmd=tftp\0" \ + "console_args=console=ttyS0,115200\0" \ + "root_args=root=/dev/nfs rw\0" \ + "misc_args=ip=on\0" \ + "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \ + "bootfile=/home/user/file\0" \ + "osfile=/home/user/uImage-XPedite5370\0" \ + "fdtfile=/home/user/xpedite5370.dtb\0" \ + "ubootfile=/home/user/u-boot.bin\0" \ + "fdtaddr=c00000\0" \ + "osaddr=0x1000000\0" \ + "loadaddr=0x1000000\0" \ + "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ + "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \ + "prog_os1="CONFIG_PROG_OS1"\0" \ + "prog_os2="CONFIG_PROG_OS2"\0" \ + "prog_fdt1="CONFIG_PROG_FDT1"\0" \ + "prog_fdt2="CONFIG_PROG_FDT2"\0" \ + "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \ + "bootcmd_flash1=run set_bootargs; " \ + "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\ + "bootcmd_flash2=run set_bootargs; " \ + "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\ + "bootcmd=run bootcmd_flash1\0" +#endif /* __CONFIG_H */ -- cgit v1.3.1 From ecf5b98c7a6a2e2256dfddd48fab26678dcd6b90 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 16 Dec 2008 14:59:20 -0600 Subject: 85xx: Add support to populate addr map based on TLB settings Signed-off-by: Kumar Gala --- cpu/mpc85xx/tlb.c | 34 ++++++++++++++++++++++++++++++++++ include/asm-ppc/mmu.h | 3 +++ lib_ppc/board.c | 8 ++++++++ 3 files changed, 45 insertions(+) (limited to 'include') diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index a2d16ae2fa1..5b5f7914f2c 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -26,6 +26,11 @@ #include #include #include +#ifdef CONFIG_ADDR_MAP +#include +#endif + +DECLARE_GLOBAL_DATA_PTR; void set_tlb(u8 tlb, u32 epn, u64 rpn, u8 perms, u8 wimge, @@ -47,6 +52,11 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn, mtspr(MAS7, _mas7); #endif asm volatile("isync;msync;tlbwe;isync"); + +#ifdef CONFIG_ADDR_MAP + if ((tlb == 1) && (gd->flags & GD_FLG_RELOC)) + addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), esel); +#endif } void disable_tlb(u8 esel) @@ -67,6 +77,11 @@ void disable_tlb(u8 esel) mtspr(MAS7, _mas7); #endif asm volatile("isync;msync;tlbwe;isync"); + +#ifdef CONFIG_ADDR_MAP + if (gd->flags & GD_FLG_RELOC) + addrmap_set_entry(0, 0, 0, esel); +#endif } void invalidate_tlb(u8 tlb) @@ -91,6 +106,25 @@ void init_tlbs(void) return ; } +#ifdef CONFIG_ADDR_MAP +void init_addr_map(void) +{ + int i; + + for (i = 0; i < num_tlb_entries; i++) { + if (tlb_table[i].tlb == 0) + continue; + + addrmap_set_entry(tlb_table[i].epn, + tlb_table[i].rpn, + (1UL << ((tlb_table[i].tsize * 2) + 10)), + tlb_table[i].esel); + } + + return ; +} +#endif + unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg) { unsigned int tlb_size; diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 8975e6c90a8..6d942d083a0 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -431,6 +431,9 @@ extern void set_tlb(u8 tlb, u32 epn, u64 rpn, extern void disable_tlb(u8 esel); extern void invalidate_tlb(u8 tlb); extern void init_tlbs(void); +#ifdef CONFIG_ADDR_MAP +extern void init_addr_map(void); +#endif extern unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg); #define SET_TLB_ENTRY(_tlb, _epn, _rpn, _perms, _wimge, _ts, _esel, _sz, _iprot) \ diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 289a32a6441..61c29b563d0 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -75,6 +75,10 @@ #include #endif +#ifdef CONFIG_ADDR_MAP +#include +#endif + #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE extern int update_flash_size (int flash_size); #endif @@ -694,6 +698,10 @@ void board_init_r (gd_t *id, ulong dest_addr) */ trap_init (dest_addr); +#if defined(CONFIG_ADDR_MAP) && defined(CONFIG_E500) + init_addr_map(); +#endif + #if defined(CONFIG_BOARD_EARLY_INIT_R) board_early_init_r (); #endif -- cgit v1.3.1 From 77c8115b1f1871811633eae77a5a700fac1f0e50 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 16 Dec 2008 14:59:21 -0600 Subject: ppc: Use addrmap in virt_to_phys and map_physmem. If we have addr map support enabled use the mapping functions to implement virt_to_phys() and map_physmem(). Signed-off-by: Kumar Gala --- include/asm-ppc/io.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 64cb746b107..4ddad26e818 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -10,6 +10,10 @@ #include #include +#ifdef CONFIG_ADDR_MAP +#include +#endif + #define SIO_CONFIG_RA 0x398 #define SIO_CONFIG_RD 0x399 @@ -287,7 +291,11 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val) static inline void * map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) { +#ifdef CONFIG_ADDR_MAP + return (void *)(addrmap_phys_to_virt(paddr)); +#else return (void *)((unsigned long)paddr); +#endif } /* @@ -300,7 +308,11 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags) static inline phys_addr_t virt_to_phys(void * vaddr) { +#ifdef CONFIG_ADDR_MAP + return addrmap_virt_to_phys(vaddr); +#else return (phys_addr_t)((unsigned long)vaddr); +#endif } #endif -- cgit v1.3.1 From a5d212a263c58cc746481bf1fc878510533ce7d6 Mon Sep 17 00:00:00 2001 From: Trent Piepho Date: Wed, 3 Dec 2008 15:16:34 -0800 Subject: mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho Acked-by: Kumar Gala Acked-by: Jon Loeliger --- board/freescale/mpc8540ads/mpc8540ads.c | 2 +- board/freescale/mpc8541cds/mpc8541cds.c | 2 +- board/freescale/mpc8548cds/mpc8548cds.c | 2 +- board/freescale/mpc8555cds/mpc8555cds.c | 2 +- board/freescale/mpc8560ads/mpc8560ads.c | 2 +- board/freescale/mpc8568mds/mpc8568mds.c | 2 +- board/mpc8540eval/mpc8540eval.c | 2 +- board/pm854/pm854.c | 2 +- board/pm856/pm856.c | 2 +- board/sbc8548/sbc8548.c | 2 +- board/socrates/socrates.c | 2 +- board/tqc/tqm85xx/tqm85xx.c | 2 +- cpu/mpc85xx/cpu.c | 2 +- cpu/mpc86xx/cpu.c | 2 +- include/asm-ppc/fsl_lbc.h | 5 ++++- 15 files changed, 18 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c index a0b6fbd1216..9e3f67768cf 100644 --- a/board/freescale/mpc8540ads/mpc8540ads.c +++ b/board/freescale/mpc8540ads/mpc8540ads.c @@ -133,7 +133,7 @@ local_bus_init(void) */ get_sys_info(&sysinfo); - clkdiv = lbc->lcrr & 0x0f; + clkdiv = lbc->lcrr & LCRR_CLKDIV; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; if (lbc_hz < 66) { diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c index 7e40c5c80a0..e6025c8a567 100644 --- a/board/freescale/mpc8541cds/mpc8541cds.c +++ b/board/freescale/mpc8541cds/mpc8541cds.c @@ -308,7 +308,7 @@ local_bus_init(void) */ get_sys_info(&sysinfo); - clkdiv = lbc->lcrr & 0x0f; + clkdiv = lbc->lcrr & LCRR_CLKDIV; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; if (lbc_hz < 66) { diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index c562fc9d955..90e89bc7192 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -125,7 +125,7 @@ local_bus_init(void) sys_info_t sysinfo; get_sys_info(&sysinfo); - clkdiv = (lbc->lcrr & 0x0f) * 2; + clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; gur->lbiuiplldcr1 = 0x00078080; diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c index 33685c19f39..53d5a936af3 100644 --- a/board/freescale/mpc8555cds/mpc8555cds.c +++ b/board/freescale/mpc8555cds/mpc8555cds.c @@ -308,7 +308,7 @@ local_bus_init(void) */ get_sys_info(&sysinfo); - clkdiv = lbc->lcrr & 0x0f; + clkdiv = lbc->lcrr & LCRR_CLKDIV; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; if (lbc_hz < 66) { diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c index 37308189d20..ac7778e25c7 100644 --- a/board/freescale/mpc8560ads/mpc8560ads.c +++ b/board/freescale/mpc8560ads/mpc8560ads.c @@ -337,7 +337,7 @@ local_bus_init(void) */ get_sys_info(&sysinfo); - clkdiv = lbc->lcrr & 0x0f; + clkdiv = lbc->lcrr & LCRR_CLKDIV; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; if (lbc_hz < 66) { diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index bc93be80fcb..7a23b338a59 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -188,7 +188,7 @@ local_bus_init(void) sys_info_t sysinfo; get_sys_info(&sysinfo); - clkdiv = (lbc->lcrr & 0x0f) * 2; + clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; gur->lbiuiplldcr1 = 0x00078080; diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c index fa0a3368666..bf270f4ce64 100644 --- a/board/mpc8540eval/mpc8540eval.c +++ b/board/mpc8540eval/mpc8540eval.c @@ -101,7 +101,7 @@ phys_size_t initdram (int board_type) #if !defined(CONFIG_RAM_AS_FLASH) /* LocalBus is not emulating flash */ get_sys_info(&sysinfo); /* if localbus freq is less than 66MHz,we use bypass mode,otherwise use DLL */ - if(sysinfo.freqSystemBus/(CONFIG_SYS_LBC_LCRR & 0x0f) < 66000000) { + if(sysinfo.freqSystemBus/(CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV) < 66000000) { lbc->lcrr = (CONFIG_SYS_LBC_LCRR & 0x0fffffff)| 0x80000000; } else { lbc->lcrr = CONFIG_SYS_LBC_LCRR & 0x7fffffff; diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c index fed0ed43187..5353d738b4c 100644 --- a/board/pm854/pm854.c +++ b/board/pm854/pm854.c @@ -150,7 +150,7 @@ local_bus_init(void) */ get_sys_info(&sysinfo); - clkdiv = lbc->lcrr & 0x0f; + clkdiv = lbc->lcrr & LCRR_CLKDIV; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; if (lbc_hz < 66) { diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c index 932f1121e85..b14a3d34b1f 100644 --- a/board/pm856/pm856.c +++ b/board/pm856/pm856.c @@ -306,7 +306,7 @@ local_bus_init(void) */ get_sys_info(&sysinfo); - clkdiv = lbc->lcrr & 0x0f; + clkdiv = lbc->lcrr & LCRR_CLKDIV; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; if (lbc_hz < 66) { diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 8c073cb4bb2..519b0f749d3 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -126,7 +126,7 @@ local_bus_init(void) sys_info_t sysinfo; get_sys_info(&sysinfo); - clkdiv = (lbc->lcrr & 0x0f) * 2; + clkdiv = (lbc->lcrr & LCRR_CLKDIV) * 2; lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; gur->lbiuiplldcr1 = 0x00078080; diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index d83dc7d6a3f..df9696e69a3 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -156,7 +156,7 @@ void local_bus_init (void) uint lcrr = CONFIG_SYS_LBC_LCRR; get_sys_info (&sysinfo); - clkdiv = lbc->lcrr & 0x0f; + clkdiv = lbc->lcrr & LCRR_CLKDIV; lbc_mhz = sysinfo.freqSystemBus / 1000000 / clkdiv; /* Disable PLL bypass for Local Bus Clock >= 66 MHz */ diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index 73f1d01bdf2..cda8208eec2 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -361,7 +361,7 @@ uint get_lbc_clock (void) { volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); sys_info_t sys_info; - ulong clkdiv = lbc->lcrr & 0x0f; + ulong clkdiv = lbc->lcrr & LCRR_CLKDIV; get_sys_info (&sys_info); diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 943602f923e..59a9ac8d923 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -174,7 +174,7 @@ int checkcpu (void) lcrr = lbc->lcrr; } #endif - clkdiv = lcrr & 0x0f; + clkdiv = lcrr & LCRR_CLKDIV; if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) { #if defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \ defined(CONFIG_MPC8572) || defined(CONFIG_MPC8536) diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index 4cace984d91..0ff76e3f7ed 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -110,7 +110,7 @@ checkcpu(void) lcrr = lbc->lcrr; } #endif - clkdiv = lcrr & 0x0f; + clkdiv = lcrr & LCRR_CLKDIV; if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) { printf("LBC:%4lu MHz\n", sysinfo.freqSystemBus / 1000000 / clkdiv); diff --git a/include/asm-ppc/fsl_lbc.h b/include/asm-ppc/fsl_lbc.h index 51fc5c13b0b..e492c62a8bc 100644 --- a/include/asm-ppc/fsl_lbc.h +++ b/include/asm-ppc/fsl_lbc.h @@ -300,7 +300,10 @@ #define LCRR_EADC_2 0x00020000 #define LCRR_EADC_3 0x00030000 #define LCRR_EADC_4 0x00000000 -#define LCRR_CLKDIV 0x0000000F +/* CLKDIV is five bits only on 8536, 8572, and 8610, so far, but the fifth bit + * should always be zero on older parts that have a four bit CLKDIV. + */ +#define LCRR_CLKDIV 0x0000001F #define LCRR_CLKDIV_SHIFT 0 #define LCRR_CLKDIV_2 0x00000002 #define LCRR_CLKDIV_4 0x00000004 -- cgit v1.3.1 From bd93105fa171184a71ca8b22be03dc2705cfbd3f Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Thu, 11 Dec 2008 15:47:49 -0500 Subject: sbc8548: don't enable the 3rd and 4th eTSEC These interfaces don't have usable connectors on the board, so don't bother enumerating or configuring them. Signed-off-by: Paul Gortmaker --- include/configs/sbc8548.h | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 528c810900b..254d91f9528 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -399,25 +399,16 @@ #define CONFIG_TSEC1_NAME "eTSEC0" #define CONFIG_TSEC2 1 #define CONFIG_TSEC2_NAME "eTSEC1" -#define CONFIG_TSEC3 1 -#define CONFIG_TSEC3_NAME "eTSEC2" -#define CONFIG_TSEC4 -#define CONFIG_TSEC4_NAME "eTSEC3" #undef CONFIG_MPC85XX_FEC #define TSEC1_PHY_ADDR 0 #define TSEC2_PHY_ADDR 1 -#define TSEC3_PHY_ADDR 2 -#define TSEC4_PHY_ADDR 3 #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 -#define TSEC3_PHYIDX 0 -#define TSEC4_PHYIDX 0 + #define TSEC1_FLAGS TSEC_GIGABIT #define TSEC2_FLAGS TSEC_GIGABIT -#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) /* Options are: eTSEC[0-3] */ #define CONFIG_ETHPRIME "eTSEC0" @@ -507,10 +498,6 @@ #define CONFIG_ETHADDR 02:E0:0C:00:00:FD #define CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 02:E0:0C:00:01:FD -#define CONFIG_HAS_ETH2 -#define CONFIG_ETH2ADDR 02:E0:0C:00:02:FD -#define CONFIG_HAS_ETH3 -#define CONFIG_ETH3ADDR 02:E0:0C:00:03:FD #endif #define CONFIG_IPADDR 192.168.0.55 -- cgit v1.3.1 From ad22f9273c6f24fbfa917e867680e9688e0c59c5 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Thu, 11 Dec 2008 15:47:51 -0500 Subject: sbc8548: enable command line editing by default. Lets make things a bit more user friendly. It isn't 1985 anymore. Signed-off-by: Paul Gortmaker --- include/configs/sbc8548.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 254d91f9528..8a7b0da4d0f 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -455,6 +455,7 @@ /* * Miscellaneous configurable options */ +#define CONFIG_CMDLINE_EDITING /* undef to save memory */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -- cgit v1.3.1 From 58da8890d5fbd074746037722a423de9ac408616 Mon Sep 17 00:00:00 2001 From: Paul Gortmaker Date: Thu, 11 Dec 2008 15:47:50 -0500 Subject: sbc8548: use proper PHY address The values given for the PHY address were wrong, so the code read no valid PHY ID, and fell through to the generic PHY support, which would work on 1000M but would not auto negotiate down to 100M or 10M. Signed-off-by: Paul Gortmaker --- include/configs/sbc8548.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 8a7b0da4d0f..8141a46dc07 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -401,8 +401,8 @@ #define CONFIG_TSEC2_NAME "eTSEC1" #undef CONFIG_MPC85XX_FEC -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 +#define TSEC1_PHY_ADDR 0x19 +#define TSEC2_PHY_ADDR 0x1a #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 -- cgit v1.3.1 From ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28 Mon Sep 17 00:00:00 2001 From: Trent Piepho Date: Wed, 3 Dec 2008 15:16:37 -0800 Subject: mpc8[56]xx: Put localbus clock in sysinfo and gd Currently MPC85xx and MPC86xx boards just calculate the localbus frequency and print it out, but don't save it. This changes where its calculated and stored to be more consistent with the CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock. The localbus frequency is added to sysinfo and calculated when sysinfo is set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are. get_clocks() copies the frequency into the global data, as the other frequencies are, into a new field that is only enabled for MPC85xx and MPC86xx. checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency from sysinfo, like the other frequencies, instead of calculating it on the spot. Signed-off-by: Trent Piepho Acked-by: Kumar Gala Acked-by: Jon Loeliger --- cpu/mpc85xx/cpu.c | 31 +++++-------------------------- cpu/mpc85xx/speed.c | 27 +++++++++++++++++++++++++++ cpu/mpc86xx/cpu.c | 22 ++++------------------ cpu/mpc86xx/speed.c | 19 +++++++++++++++++++ include/asm-ppc/global_data.h | 3 +++ include/e500.h | 1 + include/mpc86xx.h | 1 + 7 files changed, 60 insertions(+), 44 deletions(-) (limited to 'include') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 89800b88448..15ba7f1c5ed 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -77,8 +77,6 @@ struct cpu_type *identify_cpu(u32 ver) int checkcpu (void) { sys_info_t sysinfo; - uint lcrr; /* local bus clock ratio register */ - uint clkdiv; /* clock divider portion of lcrr */ uint pvr, svr; uint fam; uint ver; @@ -165,30 +163,11 @@ int checkcpu (void) break; } -#if defined(CONFIG_SYS_LBC_LCRR) - lcrr = CONFIG_SYS_LBC_LCRR; -#else - { - volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); - - lcrr = lbc->lcrr; - } -#endif - clkdiv = lcrr & LCRR_CLKDIV; - if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) { -#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \ - !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560) - /* - * Yes, the entire PQ38 family use the same - * bit-representation for twice the clock divider values. - */ - clkdiv *= 2; -#endif - printf("LBC:%-4s MHz\n", - strmhz(buf1, sysinfo.freqSystemBus / clkdiv)); - } else { - printf("LBC: unknown (lcrr: 0x%08x)\n", lcrr); - } + if (sysinfo.freqLocalBus > LCRR_CLKDIV) + printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus)); + else + printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n", + sysinfo.freqLocalBus); #ifdef CONFIG_CPM2 printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus)); diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index 1e0f4838bf8..0d55228b641 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -28,6 +28,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -37,6 +38,7 @@ void get_sys_info (sys_info_t * sysInfo) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); uint plat_ratio,e500_ratio,half_freqSystemBus; + uint lcrr_div; plat_ratio = (gur->porpllsr) & 0x0000003e; plat_ratio >>= 1; @@ -60,6 +62,30 @@ void get_sys_info (sys_info_t * sysInfo) sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ; } #endif + +#if defined(CONFIG_SYS_LBC_LCRR) + /* We will program LCRR to this value later */ + lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; +#else + { + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + lcrr_div = in_be32(&lbc->lcrr) & LCRR_CLKDIV; + } +#endif + if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { +#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \ + !defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560) + /* + * Yes, the entire PQ38 family use the same + * bit-representation for twice the clock divider values. + */ + lcrr_div *= 2; +#endif + sysInfo->freqLocalBus = sysInfo->freqSystemBus / lcrr_div; + } else { + /* In case anyone cares what the unknown value is */ + sysInfo->freqLocalBus = lcrr_div; + } } @@ -82,6 +108,7 @@ int get_clocks (void) gd->cpu_clk = sys_info.freqProcessor; gd->bus_clk = sys_info.freqSystemBus; gd->mem_clk = sys_info.freqDDRBus; + gd->lbc_clk = sys_info.freqLocalBus; /* * The base clock for I2C depends on the actual SOC. Unfortunately, diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index a179fb3d01f..35680238d2e 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -39,8 +39,6 @@ checkcpu(void) uint pvr, svr; uint ver; uint major, minor; - uint lcrr; /* local bus clock ratio register */ - uint clkdiv; /* clock divider portion of lcrr */ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; @@ -100,23 +98,11 @@ checkcpu(void) printf("MPX:%4lu MHz, ", sysinfo.freqSystemBus / 1000000); printf("DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000); -#if defined(CONFIG_SYS_LBC_LCRR) - lcrr = CONFIG_SYS_LBC_LCRR; -#else - { - volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; - volatile ccsr_lbc_t *lbc = &immap->im_lbc; - - lcrr = lbc->lcrr; - } -#endif - clkdiv = lcrr & LCRR_CLKDIV; - if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) { - clkdiv *= 2; - printf("LBC:%4lu MHz\n", - sysinfo.freqSystemBus / 1000000 / clkdiv); + if (sysinfo.freqLocalBus > LCRR_CLKDIV) { + printf("LBC:%4lu MHz\n", sysinfo.freqLocalBus / 1000000); } else { - printf(" LBC: unknown (lcrr: 0x%08x)\n", lcrr); + printf("LBC: unknown (LCRR[CLKDIV] = 0x%02x)\n", + sysinfo.freqLocalBus); } puts(" L2: "); diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c index 415ac9db890..64a3479d7e5 100644 --- a/cpu/mpc86xx/speed.c +++ b/cpu/mpc86xx/speed.c @@ -28,6 +28,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -39,6 +40,7 @@ void get_sys_info(sys_info_t *sysInfo) volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_gur_t *gur = &immap->im_gur; uint plat_ratio, e600_ratio; + uint lcrr_div; plat_ratio = (gur->porpllsr) & 0x0000003e; plat_ratio >>= 1; @@ -90,6 +92,22 @@ void get_sys_info(sys_info_t *sysInfo) sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus; break; } + +#if defined(CONFIG_SYS_LBC_LCRR) + /* We will program LCRR to this value later */ + lcrr_div = CONFIG_SYS_LBC_LCRR & LCRR_CLKDIV; +#else + { + volatile ccsr_lbc_t *lbc = &immap->im_lbc; + lcrr_div = in_be32(&lbc->lcrr) & LCRR_CLKDIV; + } +#endif + if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) { + sysInfo->freqLocalBus = sysInfo->freqSystemBus / (lcrr_div * 2); + } else { + /* In case anyone cares what the unknown value is */ + sysInfo->freqLocalBus = lcrr_div; + } } @@ -105,6 +123,7 @@ int get_clocks(void) get_sys_info(&sys_info); gd->cpu_clk = sys_info.freqProcessor; gd->bus_clk = sys_info.freqSystemBus; + gd->lbc_clk = sys_info.freqLocalBus; /* * The base clock for I2C depends on the actual SOC. Unfortunately, diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index aade097fa4e..2bb50b47f51 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -89,6 +89,9 @@ typedef struct global_data { #if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8536) u32 sdhc_clk; #endif +#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) + u32 lbc_clk; +#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ #if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) u32 i2c1_clk; u32 i2c2_clk; diff --git a/include/e500.h b/include/e500.h index 1971eee291a..9d3c8417c01 100644 --- a/include/e500.h +++ b/include/e500.h @@ -13,6 +13,7 @@ typedef struct unsigned long freqProcessor; unsigned long freqSystemBus; unsigned long freqDDRBus; + unsigned long freqLocalBus; } MPC85xx_SYS_INFO; #endif /* _ASMLANGUAGE */ diff --git a/include/mpc86xx.h b/include/mpc86xx.h index f119d5bb15f..a6fdea352fd 100644 --- a/include/mpc86xx.h +++ b/include/mpc86xx.h @@ -84,6 +84,7 @@ typedef struct { unsigned long freqProcessor; unsigned long freqSystemBus; + unsigned long freqLocalBus; } MPC86xx_SYS_INFO; #define l1icache_enable icache_enable -- cgit v1.3.1 From fea91edee8ae0295e3c30b1ff544df51f4d668e1 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 2 Dec 2008 21:58:04 +0100 Subject: usb_kbd: fix usb_kbd_deregister when DEVICE_DEREGISTER not enable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Remy Böhmer --- common/usb_kbd.c | 4 ++++ include/devices.h | 2 ++ 2 files changed, 6 insertions(+) (limited to 'include') diff --git a/common/usb_kbd.c b/common/usb_kbd.c index cf145609557..89e6ee7e5d1 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -211,7 +211,11 @@ int drv_usb_kbd_init(void) /* deregistering the keyboard */ int usb_kbd_deregister(void) { +#ifdef CONFIG_SYS_DEVICE_DEREGISTER return device_deregister(DEVNAME); +#else + return 1; +#endif } /************************************************************************** diff --git a/include/devices.h b/include/devices.h index 6b78d588894..20ddfc43427 100644 --- a/include/devices.h +++ b/include/devices.h @@ -91,7 +91,9 @@ extern char *stdio_names[MAX_FILES]; */ int device_register (device_t * dev); int devices_init (void); +#ifdef CONFIG_SYS_DEVICE_DEREGISTER int device_deregister(char *devname); +#endif struct list_head* device_get_list(void); device_t* device_get_by_name(char* name); device_t* device_clone(device_t *dev); -- cgit v1.3.1 From 1f03cbfae221b24ba1341a0a3f62ff01c5c874df Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Tue, 23 Dec 2008 16:32:00 -0600 Subject: XPedite5200 board support cleanup Signed-off-by: Peter Tyser --- board/xes/common/actl_nand.c | 65 +++++ board/xes/common/fsl_85xx_pci.c | 6 +- board/xes/xpedite5200/Makefile | 55 ++++ board/xes/xpedite5200/config.mk | 34 +++ board/xes/xpedite5200/ddr.c | 91 ++++++ board/xes/xpedite5200/law.c | 51 ++++ board/xes/xpedite5200/tlb.c | 85 ++++++ board/xes/xpedite5200/u-boot.lds | 145 ++++++++++ board/xes/xpedite5200/xpedite5200.c | 125 +++++++++ include/configs/XPEDITE5200.h | 546 ++++++++++++++++++++++++++++++++++++ 10 files changed, 1200 insertions(+), 3 deletions(-) create mode 100644 board/xes/common/actl_nand.c create mode 100644 board/xes/xpedite5200/Makefile create mode 100644 board/xes/xpedite5200/config.mk create mode 100644 board/xes/xpedite5200/ddr.c create mode 100644 board/xes/xpedite5200/law.c create mode 100644 board/xes/xpedite5200/tlb.c create mode 100644 board/xes/xpedite5200/u-boot.lds create mode 100644 board/xes/xpedite5200/xpedite5200.c create mode 100644 include/configs/XPEDITE5200.h (limited to 'include') diff --git a/board/xes/common/actl_nand.c b/board/xes/common/actl_nand.c new file mode 100644 index 00000000000..465aeb0991e --- /dev/null +++ b/board/xes/common/actl_nand.c @@ -0,0 +1,65 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This driver support NAND devices which have address lines + * connected as ALE and CLE inputs. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +/* + * Hardware specific access to control-lines + */ +static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W; + + if (ctrl & NAND_CTRL_CHANGE) { + IO_ADDR_W = (ulong)this->IO_ADDR_W; + + IO_ADDR_W &= ~(CONFIG_SYS_NAND_ACTL_CLE | + CONFIG_SYS_NAND_ACTL_ALE | + CONFIG_SYS_NAND_ACTL_NCE); + if (ctrl & NAND_CLE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_CLE; + if (ctrl & NAND_ALE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_ALE; + if (ctrl & NAND_NCE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_NCE; + + this->IO_ADDR_W = (void *)IO_ADDR_W; + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->ecc.mode = NAND_ECC_SOFT; + nand->cmd_ctrl = nand_addr_hwcontrol; + nand->chip_delay = CONFIG_SYS_NAND_ACTL_DELAY; + + return 0; +} diff --git a/board/xes/common/fsl_85xx_pci.c b/board/xes/common/fsl_85xx_pci.c index 56f34479582..cd65a7341e6 100644 --- a/board/xes/common/fsl_85xx_pci.c +++ b/board/xes/common/fsl_85xx_pci.c @@ -179,7 +179,7 @@ void pci_init_board(void) fsl_pci_init(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCI1 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } else { @@ -289,7 +289,7 @@ void pci_init_board(void) if (!host) fsl_pci_config_unlock(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCIE2 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } @@ -343,7 +343,7 @@ void pci_init_board(void) if (!host) fsl_pci_config_unlock(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCIE3 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } diff --git a/board/xes/xpedite5200/Makefile b/board/xes/xpedite5200/Makefile new file mode 100644 index 00000000000..02fe8fcd2d3 --- /dev/null +++ b/board/xes/xpedite5200/Makefile @@ -0,0 +1,55 @@ +# +# Copyright 2008 Extreme Engineering Solutions, Inc. +# Copyright 2004 Freescale Semiconductor. +# (C) Copyright 2001-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += $(BOARD).o +COBJS-y += ddr.o +COBJS-y += law.o +COBJS-y += tlb.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) $(SOBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/xes/xpedite5200/config.mk b/board/xes/xpedite5200/config.mk new file mode 100644 index 00000000000..be5a5c32c02 --- /dev/null +++ b/board/xes/xpedite5200/config.mk @@ -0,0 +1,34 @@ +# +# Copyright 2008 Extreme Engineering Solutions, Inc. +# Copyright 2004, 2007 Freescale Semiconductor. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# xpedite5200 board +# +ifndef TEXT_BASE +TEXT_BASE = 0xfff80000 +endif + +PLATFORM_CPPFLAGS += -DCONFIG_E500=1 +PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 +PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1 +PLATFORM_CPPFLAGS += -mrelocatable diff --git a/board/xes/xpedite5200/ddr.c b/board/xes/xpedite5200/ddr.c new file mode 100644 index 00000000000..c5616d546b8 --- /dev/null +++ b/board/xes/xpedite5200/ddr.c @@ -0,0 +1,91 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +static void +get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address) +{ + i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t)); + + /* We use soldered memory, but use an SPD EEPROM to describe it. + * The SPD has an unspecified dimm type, but the DDR2 initialization + * code requires a specific type to be specified. This sets the type + * as a standard unregistered SO-DIMM. */ + if (spd->dimm_type == 0) { + spd->dimm_type = 0x4; + ((uchar *)spd)[63] += 0x4; + } +} + +unsigned int fsl_ddr_get_mem_data_rate(void) +{ + return get_ddr_freq(0); +} + +void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd, + unsigned int ctrl_num) +{ + unsigned int i; + + if (ctrl_num) { + printf("%s: invalid ctrl_num = %d\n", __func__, ctrl_num); + return; + } + + for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) + get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS); +} + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + /* + * Factors to consider for clock adjust: + * - number of chips on bus + * - position of slot + * - DDR1 vs. DDR2? + * - ??? + * + * This needs to be determined on a board-by-board basis. + * 0110 3/4 cycle late + * 0111 7/8 cycle late + */ + popts->clk_adjust = 7; + + /* + * Factors to consider for CPO: + * - frequency + * - ddr1 vs. ddr2 + */ + popts->cpo_override = 9; + + /* + * Factors to consider for write data delay: + * - number of DIMMs + * + * 1 = 1/4 clock delay + * 2 = 1/2 clock delay + * 3 = 3/4 clock delay + * 4 = 1 clock delay + * 5 = 5/4 clock delay + * 6 = 3/2 clock delay + */ + popts->write_data_delay = 3; + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 0; +} diff --git a/board/xes/xpedite5200/law.c b/board/xes/xpedite5200/law.c new file mode 100644 index 00000000000..386f9c5873c --- /dev/null +++ b/board/xes/xpedite5200/law.c @@ -0,0 +1,51 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +/* + * Notes: + * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. + * If flash is 8M at default position (last 8M), no LAW needed. + */ + +struct law_entry law_table[] = { + /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ + SET_LAW(CONFIG_SYS_FLASH_BASE2, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CONFIG_SYS_NAND_BASE, LAW_SIZE_1M, LAW_TRGT_IF_LBC), +#if CONFIG_SYS_PCI1_MEM_PHYS + SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_1G, LAW_TRGT_IF_PCI_1), + SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAWAR_SIZE_8M, LAW_TRGT_IF_PCI_1), +#endif +#if CONFIG_SYS_PCI2_MEM_PHYS + SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_2), + SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI_2), +#endif +}; + +int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/xes/xpedite5200/tlb.c b/board/xes/xpedite5200/tlb.c new file mode 100644 index 00000000000..bd7bff820b6 --- /dev/null +++ b/board/xes/xpedite5200/tlb.c @@ -0,0 +1,85 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +struct fsl_e_tlb_entry tlb_table[] = { + /* TLB 0 - for temp stack in cache */ + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024, + MAS3_SX|MAS3_SW|MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + + /* W**G* - NOR flashes */ + /* This will be changed to *I*G* after relocation to RAM. */ + SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE2, CONFIG_SYS_FLASH_BASE2, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G, + 0, 0, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 1, BOOKE_PAGESZ_1M, 1), + + /* *I*G* - NAND flash */ + SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 2, BOOKE_PAGESZ_1M, 1), + +#if CONFIG_PCI1 + /* *I*G* - PCI MEM */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 3, BOOKE_PAGESZ_1G, 1), +#endif + +#if CONFIG_PCI2 + /* *I*G* - PCI MEM */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCI2_MEM_PHYS, CONFIG_SYS_PCI2_MEM_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), +#endif + +#if defined(CONFIG_PCI1) || defined(CONFIG_PCI2) + /* *I*G* - PCI IO */ + SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 5, BOOKE_PAGESZ_16M, 1), +#endif +}; + +int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/board/xes/xpedite5200/u-boot.lds b/board/xes/xpedite5200/u-boot.lds new file mode 100644 index 00000000000..bd952d20faa --- /dev/null +++ b/board/xes/xpedite5200/u-boot.lds @@ -0,0 +1,145 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2004, 2007-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +PHDRS +{ + text PT_LOAD; + bss PT_LOAD; +} + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + *(.text) + *(.got1) + } :text + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } :text + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + .bootpg ADDR(.text) + 0x7f000 : + { + cpu/mpc85xx/start.o (.bootpg) + } :text = 0xffff + + .resetvec ADDR(.text) + 0x7fffc : + { + *(.resetvec) + } :text = 0xffff + + . = ADDR(.text) + 0x80000; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } :bss + + . = ALIGN(4); + _end = . ; + PROVIDE (end = .); +} diff --git a/board/xes/xpedite5200/xpedite5200.c b/board/xes/xpedite5200/xpedite5200.c new file mode 100644 index 00000000000..e266d1dd833 --- /dev/null +++ b/board/xes/xpedite5200/xpedite5200.c @@ -0,0 +1,125 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2004, 2007 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +extern void ft_board_pci_setup(void *blob, bd_t *bd); + +int checkboard(void) +{ + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR); + + char *s; + + printf("Board: X-ES %s PMC\n", CONFIG_SYS_BOARD_NAME); + printf(" "); + s = getenv("board_rev"); + if (s) + printf("Rev %s, ", s); + s = getenv("serial#"); + if (s) + printf("Serial# %s, ", s); + s = getenv("board_cfg"); + if (s) + printf("Cfg %s", s); + printf("\n"); + + lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */ + lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */ + ecm->eedr = 0xffffffff; /* Clear ecm errors */ + ecm->eeer = 0xffffffff; /* Enable ecm errors */ + + return 0; +} + +static void flash_cs_fixup(void) +{ + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); + int flash_sel; + + /* + * Print boot dev and swap flash flash chip selects if booted from 2nd + * flash. Swapping chip selects presents user with a common memory + * map regardless of which flash was booted from. + */ + flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & + CONFIG_SYS_PCA953X_FLASH_PASS_CS)); + printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1); + + if (flash_sel) { + lbc->br0 = CONFIG_SYS_BR1_PRELIM; + lbc->or0 = CONFIG_SYS_OR1_PRELIM; + + lbc->br1 = CONFIG_SYS_BR0_PRELIM; + lbc->or1 = CONFIG_SYS_OR0_PRELIM; + } +} + +int board_early_init_r(void) +{ + /* Initialize PCA9557 devices */ + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0); + + /* + * Remap NOR flash region to caching-inhibited + * so that flash can be erased/programmed properly. + */ + + /* Flush d-cache and invalidate i-cache of any FLASH data */ + flush_dcache(); + invalidate_icache(); + + /* Invalidate existing TLB entry for NOR flash */ + disable_tlb(0); + set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000), + (CONFIG_SYS_FLASH_BASE2 & 0xf0000000), + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 0, BOOKE_PAGESZ_256M, 1); + + flash_cs_fixup(); + + return 0; +} + +#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_PCI + ft_board_pci_setup(blob, bd); +#endif + ft_cpu_setup(blob, bd); +} +#endif diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h new file mode 100644 index 00000000000..1df6855ccaf --- /dev/null +++ b/include/configs/XPEDITE5200.h @@ -0,0 +1,546 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * Copyright 2004-2008 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * xpedite5200 board configuration file + */ +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * High Level Configuration Options + */ +#define CONFIG_BOOKE 1 /* BOOKE */ +#define CONFIG_E500 1 /* BOOKE e500 family */ +#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */ +#define CONFIG_MPC8548 1 +#define CONFIG_XPEDITE5200 1 +#define CONFIG_SYS_BOARD_NAME "XPedite5200" +#define CONFIG_BOARD_EARLY_INIT_R /* Call board_pre_init */ +#define CONFIG_RELOC_FIXUP_WORKS /* Fully relocate to SDRAM */ + +#define CONFIG_PCI 1 /* Enable PCI/PCIE */ +#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ +#define CONFIG_PCI1 1 /* PCI controller 1 */ +#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ +#define CONFIG_FSL_LAW 1 /* Use common FSL init code */ + +/* + * DDR config + */ +#define CONFIG_FSL_DDR2 +#undef CONFIG_FSL_DDR_INTERACTIVE +#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ +#define CONFIG_DDR_SPD +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#define SPD_EEPROM_ADDRESS 0x54 +#define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 2 +#define CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_VERY_BIG_RAM + +#define CONFIG_SYS_CLK_FREQ 66666666 + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_L2_CACHE /* toggle L2 cache */ +#define CONFIG_BTB /* toggle branch predition */ +#define CONFIG_ENABLE_36BIT_PHYS 1 + +/* + * Base addresses -- Note these are effective addresses where the + * actual resources get mapped (not physical addresses) + */ +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#define CONFIG_SYS_CCSRBAR 0xef000000 /* relocated CCSRBAR */ +#define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ +#define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_PCI1_ADDR (CONFIG_SYS_CCSRBAR + 0x8000) + +/* + * Diagnostics + */ +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x20000000 + +/* + * Memory map + * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable + * 0x8000_0000 0xbfff_ffff PCI1 Mem 1G non-cacheable + * 0xe000_0000 0xe7ff_ffff SRAM/SSRAM/L1 Cache 128M non-cacheable + * 0xe800_0000 0xe87f_ffff PCI1 IO 8M non-cacheable + * 0xef00_0000 0xef0f_ffff CCSR/IMMR 1M non-cacheable + * 0xef80_0000 0xef8f_ffff NAND Flash 1M non-cacheable + * 0xf800_0000 0xfbff_ffff NOR Flash 2 64M non-cacheable + * 0xfc00_0000 0xffff_ffff NOR Flash 1 64M non-cacheable + */ + +#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_4 | LCRR_EADC_3) + +/* + * NAND flash configuration + */ +#define CONFIG_SYS_NAND_BASE 0xef800000 +#define CONFIG_SYS_NAND_BASE2 0xef840000 /* Unused at this time */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_NAND_ACTL +#define CONFIG_SYS_NAND_ACTL_CLE (1 << 3) /* ADDR3 is CLE */ +#define CONFIG_SYS_NAND_ACTL_ALE (1 << 4) /* ADDR4 is ALE */ +#define CONFIG_SYS_NAND_ACTL_NCE (0) /* NCE not controlled by ADDR */ +#define CONFIG_SYS_NAND_ACTL_DELAY 25 + +/* + * NOR flash configuration + */ +#define CONFIG_SYS_FLASH_BASE 0xfc000000 +#define CONFIG_SYS_FLASH_BASE2 0xf8000000 +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2} +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ + {0xfbf40000, 0xc0000} } +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ + +/* + * Chip select configuration + */ +/* NOR Flash 0 on CS0 */ +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR0_PRELIM (OR_AM_64MB | \ + OR_GPCM_ACS_DIV4 | \ + OR_GPCM_SCY_8) + +/* NOR Flash 1 on CS1 */ +#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \ + BR_PS_16 | \ + BR_V) +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM + +/* NAND flash on CS2 */ +#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \ + BR_PS_8 | \ + BR_V) + +/* NAND flash on CS2 */ +#define CONFIG_SYS_OR2_PRELIM (OR_AM_256KB | \ + OR_GPCM_BCTLD | \ + OR_GPCM_CSNT | \ + OR_GPCM_ACS_DIV4 | \ + OR_GPCM_SCY_4 | \ + OR_GPCM_TRLX | \ + OR_GPCM_EHTR) + +/* NAND flash on CS3 */ +#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_NAND_BASE2 | \ + BR_PS_8 | \ + BR_V) +#define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_OR2_PRELIM + +/* + * Use L1 as initial stack + */ +#define CONFIG_SYS_INIT_RAM_LOCK 1 +#define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000 +#define CONFIG_SYS_INIT_RAM_END 0x4000 + +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} +#define CONFIG_BAUDRATE 115200 +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ + +/* + * Use the HUSH parser + */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* + * Pass open firmware flat tree + */ +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_STDOUT_VIA_ALIAS 1 + +#define CONFIG_SYS_64BIT_VSPRINTF 1 +#define CONFIG_SYS_64BIT_STRTOUL 1 + +/* + * I2C + */ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C2_OFFSET 0x3100 +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE + +/* I2C EEPROM */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */ + +/* I2C RTC */ +#define CONFIG_RTC_M41T11 1 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_M41T11_BASE_YEAR 2000 + +/* GPIO */ +#define CONFIG_PCA953X +#define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18 +#define CONFIG_SYS_I2C_PCA953X_ADDR1 0x19 +#define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0 + +/* PCA957 @ 0x18 */ +#define CONFIG_SYS_PCA953X_BRD_CFG0 0x01 +#define CONFIG_SYS_PCA953X_BRD_CFG1 0x02 +#define CONFIG_SYS_PCA953X_BRD_CFG2 0x04 +#define CONFIG_SYS_PCA953X_XMC_ROOT0 0x08 +#define CONFIG_SYS_PCA953X_FLASH_PASS_CS 0x10 +#define CONFIG_SYS_PCA953X_FLASH_WP 0x20 +#define CONFIG_SYS_PCA953X_MONARCH 0x40 +#define CONFIG_SYS_PCA953X_EREADY 0x80 + +/* PCA957 @ 0x19 */ +#define CONFIG_SYS_PCA953X_P14_IO0 0x01 +#define CONFIG_SYS_PCA953X_P14_IO1 0x02 +#define CONFIG_SYS_PCA953X_P14_IO2 0x04 +#define CONFIG_SYS_PCA953X_P14_IO3 0x08 +#define CONFIG_SYS_PCA953X_P14_IO4 0x10 +#define CONFIG_SYS_PCA953X_P14_IO5 0x20 +#define CONFIG_SYS_PCA953X_P14_IO6 0x40 +#define CONFIG_SYS_PCA953X_P14_IO7 0x80 + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ +#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_SIZE 0x40000000 /* 1G */ +#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_PHYS 0xe8000000 +#define CONFIG_SYS_PCI1_IO_SIZE 0x00800000 /* 1M */ + +/* + * Networking options + */ +#define CONFIG_TSEC_ENET /* tsec ethernet support */ +#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ +#define CONFIG_NET_MULTI 1 +#define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_ETHPRIME "eTSEC1" + +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define TSEC1_FLAGS TSEC_GIGABIT +#define TSEC1_PHY_ADDR 1 +#define TSEC1_PHYIDX 0 +#define CONFIG_HAS_ETH0 + +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "eTSEC2" +#define TSEC2_FLAGS TSEC_GIGABIT +#define TSEC2_PHY_ADDR 2 +#define TSEC2_PHYIDX 0 +#define CONFIG_HAS_ETH1 + +#define CONFIG_TSEC3 1 +#define CONFIG_TSEC3_NAME "eTSEC3" +#define TSEC3_FLAGS TSEC_GIGABIT +#define TSEC3_PHY_ADDR 3 +#define TSEC3_PHYIDX 0 +#define CONFIG_HAS_ETH2 + +#define CONFIG_TSEC4 1 +#define CONFIG_TSEC4_NAME "eTSEC4" +#define TSEC4_FLAGS TSEC_GIGABIT +#define TSEC4_PHY_ADDR 4 +#define TSEC4_PHYIDX 0 +#define CONFIG_HAS_ETH3 + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY + +/* + * Command configuration. + */ +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCA953X +#define CONFIG_CMD_PCA953X_INFO +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SNTP + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ +#define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_LOADADDR 0x1000000 /* default location for tftp and bootm */ +#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ +#define CONFIG_PANIC_HANG /* do not reset board on panic */ +#define CONFIG_PREBOOT /* enable preboot variable */ +#define CONFIG_FIT 1 +#define CONFIG_FIT_VERBOSE 1 +#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */ +#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ + +/* + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/* + * Environment Configuration + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */ +#define CONFIG_ENV_SIZE 0x8000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024)) + +/* + * Flash memory map: + * fff80000 - ffffffff Pri U-Boot (512 KB) + * fff40000 - fff7ffff Pri U-Boot Environment (256 KB) + * fff00000 - fff3ffff Pri FDT (256KB) + * fef00000 - ffefffff Pri OS image (16MB) + * fc000000 - feefffff Pri OS Use/Filesystem (47MB) + * + * fbf80000 - fbffffff Sec U-Boot (512 KB) + * fbf40000 - fbf7ffff Sec U-Boot Environment (256 KB) + * fbf00000 - fbf3ffff Sec FDT (256KB) + * faf00000 - fbefffff Sec OS image (16MB) + * f8000000 - faefffff Sec OS Use/Filesystem (47MB) + */ +#define CONFIG_UBOOT1_ENV_ADDR MK_STR(0xfff80000) +#define CONFIG_UBOOT2_ENV_ADDR MK_STR(0xfbf80000) +#define CONFIG_FDT1_ENV_ADDR MK_STR(0xfff00000) +#define CONFIG_FDT2_ENV_ADDR MK_STR(0xfbf00000) +#define CONFIG_OS1_ENV_ADDR MK_STR(0xfef00000) +#define CONFIG_OS2_ENV_ADDR MK_STR(0xfaf00000) + +#define CONFIG_PROG_UBOOT1 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_UBOOT2 \ + "$download_cmd $loadaddr $ubootfile; " \ + "if test $? -eq 0; then " \ + "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \ + "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \ + "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \ + "if test $? -ne 0; then " \ + "echo PROGRAM FAILED; " \ + "else; " \ + "echo PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_BOOT_OS_NET \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "if test -n $fdtaddr; then " \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "bootm $osaddr - $fdtaddr; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi; " \ + "else; " \ + "bootm $osaddr; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS1 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_OS2 \ + "$download_cmd $osaddr $osfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \ + "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo OS PROGRAM FAILED; " \ + "else; " \ + "echo OS PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo OS DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT1 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_PROG_FDT2 \ + "$download_cmd $fdtaddr $fdtfile; " \ + "if test $? -eq 0; then " \ + "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \ + "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \ + "if test $? -ne 0; then " \ + "echo FDT PROGRAM FAILED; " \ + "else; " \ + "echo FDT PROGRAM SUCCEEDED; " \ + "fi; " \ + "else; " \ + "echo FDT DOWNLOAD FAILED; " \ + "fi;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=yes\0" \ + "download_cmd=tftp\0" \ + "console_args=console=ttyS0,115200\0" \ + "root_args=root=/dev/nfs rw\0" \ + "misc_args=ip=on\0" \ + "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \ + "bootfile=/home/user/file\0" \ + "osfile=/home/user/uImage-XPedite5200\0" \ + "fdtfile=/home/user/xpedite5200.dtb\0" \ + "ubootfile=/home/user/u-boot.bin\0" \ + "fdtaddr=c00000\0" \ + "osaddr=0x1000000\0" \ + "loadaddr=0x1000000\0" \ + "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \ + "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \ + "prog_os1="CONFIG_PROG_OS1"\0" \ + "prog_os2="CONFIG_PROG_OS2"\0" \ + "prog_fdt1="CONFIG_PROG_FDT1"\0" \ + "prog_fdt2="CONFIG_PROG_FDT2"\0" \ + "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \ + "bootcmd_flash1=run set_bootargs; " \ + "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\ + "bootcmd_flash2=run set_bootargs; " \ + "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\ + "bootcmd=run bootcmd_flash1\0" +#endif /* __CONFIG_H */ -- cgit v1.3.1 From d481c80d78f954133c035dae6c7d22de3625795d Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 3 Jan 2009 17:22:25 +0100 Subject: at91rm9200: rename lowlevel init value to CONFIG_SYS_ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/m501sk/memsetup.S | 134 ++++++++++++++++----------------- cpu/arm920t/at91rm9200/lowlevel_init.S | 88 +++++++++++----------- include/configs/at91rm9200dk.h | 46 +++++------ include/configs/cmc_pu2.h | 46 +++++------ include/configs/csb637.h | 46 +++++------ include/configs/mp2usb.h | 46 +++++------ 6 files changed, 203 insertions(+), 203 deletions(-) (limited to 'include') diff --git a/board/m501sk/memsetup.S b/board/m501sk/memsetup.S index 6aea723f91f..1a3ca4ba3e0 100644 --- a/board/m501sk/memsetup.S +++ b/board/m501sk/memsetup.S @@ -41,50 +41,50 @@ /* flash */ #define MC_PUIA 0xFFFFFF10 -#define MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 #define MC_PUP 0xFFFFFF50 -#define MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 #define MC_PUER 0xFFFFFF54 -#define MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 #define MC_ASR 0xFFFFFF04 -#define MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 #define MC_AASR 0xFFFFFF08 -#define MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 #define EBI_CFGR 0xFFFFFF64 -#define EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 #define SMC_CSR0 0xFFFFFF70 -#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ /* clocks */ #define PLLAR 0xFFFFFC28 -#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ #define PLLBR 0xFFFFFC2C -#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ #define MCKR 0xFFFFFC30 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ -#define MCKR_VAL 0x00000202 +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* sdram */ #define PIOC_ASR 0xFFFFF870 -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as Perip (D16/D31) */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as Perip (D16/D31) */ #define PIOC_BSR 0xFFFFF874 -#define PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 #define PIOC_PDR 0xFFFFF804 -#define PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 #define EBI_CSA 0xFFFFFF60 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ #define SDRC_CR 0xFFFFFF98 -#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000080 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ #define SDRC_MR 0xFFFFFF90 -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ #define SDRC_TR 0xFFFFFF94 -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ _TEXT_BASE: .word TEXT_BASE @@ -130,71 +130,71 @@ lowlevelinit: SMRDATA: .word MC_PUIA - .word MC_PUIA_VAL + .word CONFIG_SYS_MC_PUIA_VAL .word MC_PUP - .word MC_PUP_VAL + .word CONFIG_SYS_MC_PUP_VAL .word MC_PUER - .word MC_PUER_VAL + .word CONFIG_SYS_MC_PUER_VAL .word MC_ASR - .word MC_ASR_VAL + .word CONFIG_SYS_MC_ASR_VAL .word MC_AASR - .word MC_AASR_VAL + .word CONFIG_SYS_MC_AASR_VAL .word EBI_CFGR - .word EBI_CFGR_VAL + .word CONFIG_SYS_EBI_CFGR_VAL .word SMC_CSR0 - .word SMC_CSR0_VAL + .word CONFIG_SYS_SMC_CSR0_VAL .word PLLAR - .word PLLAR_VAL + .word CONFIG_SYS_PLLAR_VAL .word PLLBR - .word PLLBR_VAL + .word CONFIG_SYS_PLLBR_VAL .word MCKR - .word MCKR_VAL + .word CONFIG_SYS_MCKR_VAL /* SMRDATA is 80 bytes long */ /* here there's a delay of 100 */ SMRDATA1: .word PIOC_ASR - .word PIOC_ASR_VAL + .word CONFIG_SYS_PIOC_ASR_VAL .word PIOC_BSR - .word PIOC_BSR_VAL + .word CONFIG_SYS_PIOC_BSR_VAL .word PIOC_PDR - .word PIOC_PDR_VAL + .word CONFIG_SYS_PIOC_PDR_VAL .word EBI_CSA - .word EBI_CSA_VAL + .word CONFIG_SYS_EBI_CSA_VAL .word SDRC_CR - .word SDRC_CR_VAL + .word CONFIG_SYS_SDRC_CR_VAL .word SDRC_MR - .word SDRC_MR_VAL - .word SDRAM - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_MR_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL .word SDRC_MR - .word SDRC_MR_VAL1 - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_MR_VAL1 + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL .word SDRC_MR - .word SDRC_MR_VAL2 - .word SDRAM1 - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_MR_VAL2 + .word CONFIG_SYS_SDRAM1 + .word CONFIG_SYS_SDRAM_VAL .word SDRC_TR - .word SDRC_TR_VAL - .word SDRAM - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_TR_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL .word SDRC_MR - .word SDRC_MR_VAL3 - .word SDRAM - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_MR_VAL3 + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL /* SMRDATA1 is 176 bytes long */ #endif /* CONFIG_BOOTBINFUNC */ diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S b/cpu/arm920t/at91rm9200/lowlevel_init.S index 66b07da08b6..736f1ea4d29 100644 --- a/cpu/arm920t/at91rm9200/lowlevel_init.S +++ b/cpu/arm920t/at91rm9200/lowlevel_init.S @@ -135,71 +135,71 @@ LoopOsc: SMRDATA: .word MC_PUIA - .word MC_PUIA_VAL + .word CONFIG_SYS_MC_PUIA_VAL .word MC_PUP - .word MC_PUP_VAL + .word CONFIG_SYS_MC_PUP_VAL .word MC_PUER - .word MC_PUER_VAL + .word CONFIG_SYS_MC_PUER_VAL .word MC_ASR - .word MC_ASR_VAL + .word CONFIG_SYS_MC_ASR_VAL .word MC_AASR - .word MC_AASR_VAL + .word CONFIG_SYS_MC_AASR_VAL .word EBI_CFGR - .word EBI_CFGR_VAL + .word CONFIG_SYS_EBI_CFGR_VAL .word SMC_CSR0 - .word SMC_CSR0_VAL + .word CONFIG_SYS_SMC_CSR0_VAL .word PLLAR - .word PLLAR_VAL + .word CONFIG_SYS_PLLAR_VAL .word PLLBR - .word PLLBR_VAL + .word CONFIG_SYS_PLLBR_VAL .word MCKR - .word MCKR_VAL + .word CONFIG_SYS_MCKR_VAL /* SMRDATA is 80 bytes long */ /* here there's a delay of 100 */ SMRDATA1: .word PIOC_ASR - .word PIOC_ASR_VAL + .word CONFIG_SYS_PIOC_ASR_VAL .word PIOC_BSR - .word PIOC_BSR_VAL + .word CONFIG_SYS_PIOC_BSR_VAL .word PIOC_PDR - .word PIOC_PDR_VAL + .word CONFIG_SYS_PIOC_PDR_VAL .word EBI_CSA - .word EBI_CSA_VAL + .word CONFIG_SYS_EBI_CSA_VAL .word SDRC_CR - .word SDRC_CR_VAL + .word CONFIG_SYS_SDRC_CR_VAL .word SDRC_MR - .word SDRC_MR_VAL - .word SDRAM - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_MR_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL .word SDRC_MR - .word SDRC_MR_VAL1 - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL - .word SDRAM - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_MR_VAL1 + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL .word SDRC_MR - .word SDRC_MR_VAL2 - .word SDRAM1 - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_MR_VAL2 + .word CONFIG_SYS_SDRAM1 + .word CONFIG_SYS_SDRAM_VAL .word SDRC_TR - .word SDRC_TR_VAL - .word SDRAM - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_TR_VAL + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL .word SDRC_MR - .word SDRC_MR_VAL3 - .word SDRAM - .word SDRAM_VAL + .word CONFIG_SYS_SDRC_MR_VAL3 + .word CONFIG_SYS_SDRAM + .word CONFIG_SYS_SDRAM_VAL /* SMRDATA1 is 176 bytes long */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 746f0ef102e..c7e83ccfc14 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -45,33 +45,33 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define MC_PUIA_VAL 0x00000000 -#define MC_PUP_VAL 0x00000000 -#define MC_PUER_VAL 0x00000000 -#define MC_ASR_VAL 0x00000000 -#define MC_AASR_VAL 0x00000000 -#define EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ /* clocks */ -#define PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ -#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ -#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ /* sdram */ -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -#define SDRC_CR_VAL 0x2188c155 /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000080 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h index cdd308d8b91..d9acb470fed 100644 --- a/include/configs/cmc_pu2.h +++ b/include/configs/cmc_pu2.h @@ -44,33 +44,33 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define MC_PUIA_VAL 0x00000000 -#define MC_PUP_VAL 0x00000000 -#define MC_PUER_VAL 0x00000000 -#define MC_ASR_VAL 0x00000000 -#define MC_AASR_VAL 0x00000000 -#define EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x100032ad /* 16bit, 2 TDF, 4 WS */ /* clocks */ -#define PLLAR_VAL 0x2026BE04 /* 179,712 MHz for PCK */ -#define PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ -#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */ +#define CONFIG_SYS_PLLAR_VAL 0x2026BE04 /* 179,712 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 69.120MHz from PLLA */ /* sdram */ -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -#define SDRC_CR_VAL 0x3399c1d4 /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000080 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x3399c1d4 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/csb637.h b/include/configs/csb637.h index 682db447dd8..2df77cfa7dd 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -45,33 +45,33 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define MC_PUIA_VAL 0x00000000 -#define MC_PUP_VAL 0x00000000 -#define MC_PUER_VAL 0x00000000 -#define MC_ASR_VAL 0x00000000 -#define MC_AASR_VAL 0x00000000 -#define EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ /* clocks */ -#define PLLAR_VAL 0x2031BE01 /* 184.320000 MHz for PCK */ -#define PLLBR_VAL 0x128A3E19 /* 47.996928 MHz (divider by 2 for USB) */ -#define MCKR_VAL 0x00000302 /* PCK/4 = MCK Master Clock = 46.080000 MHz from PLLA */ +#define CONFIG_SYS_PLLAR_VAL 0x2031BE01 /* 184.320000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x128A3E19 /* 47.996928 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_MCKR_VAL 0x00000302 /* PCK/4 = MCK Master Clock = 46.080000 MHz from PLLA */ /* sdram */ -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -#define SDRC_CR_VAL 0x21914159 /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000080 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x21914159 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index cbbdb0c77ed..fb10616c308 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -49,33 +49,33 @@ #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 /* flash */ -#define MC_PUIA_VAL 0x00000000 -#define MC_PUP_VAL 0x00000000 -#define MC_PUER_VAL 0x00000000 -#define MC_ASR_VAL 0x00000000 -#define MC_AASR_VAL 0x00000000 -#define EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */ /* clocks */ -#define PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */ -#define PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */ -#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */ /* sdram */ -#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ -#define PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */ -#define SDRC_CR_VAL 0x3211295A /* set up the SDRAM */ -#define SDRAM 0x20000000 /* address of the SDRAM */ -#define SDRAM1 0x20000020 /* address of the SDRAM */ -#define SDRAM_VAL 0x00000000 /* value written to SDRAM */ -#define SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define SDRC_MR_VAL1 0x00000004 /* refresh */ -#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x3211295A /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000020 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ #else #define CONFIG_SKIP_RELOCATE_UBOOT #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ -- cgit v1.3.1 From 8a48686fac2030287765f1970ea046bd5734b733 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 3 Jan 2009 17:22:26 +0100 Subject: m501sk: move to the common memory setup Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/m501sk/Makefile | 2 - board/m501sk/memsetup.S | 200 ----------------------------------------------- include/configs/m501sk.h | 33 ++++++++ 3 files changed, 33 insertions(+), 202 deletions(-) delete mode 100644 board/m501sk/memsetup.S (limited to 'include') diff --git a/board/m501sk/Makefile b/board/m501sk/Makefile index c562c600a41..aec3d1c7c07 100644 --- a/board/m501sk/Makefile +++ b/board/m501sk/Makefile @@ -27,8 +27,6 @@ LIB = $(obj)lib$(BOARD).a COBJS := m501sk.o eeprom.o -SOBJS := memsetup.o - SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/board/m501sk/memsetup.S b/board/m501sk/memsetup.S deleted file mode 100644 index 1a3ca4ba3e0..00000000000 --- a/board/m501sk/memsetup.S +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Memory Setup stuff - taken from blob memsetup.S - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) - * - * Modified for the at91rm9200dk board by - * (C) Copyright 2004 - * Gary Jennejohn, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#ifdef CONFIG_BOOTBINFUNC -/* - * some parameters for the board - * - * This is based on rm9200dk.cfg for the BDI2000 from ABATRON which in - * turn is based on the boot.bin code from ATMEL - * - */ - -/* flash */ -#define MC_PUIA 0xFFFFFF10 -#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 -#define MC_PUP 0xFFFFFF50 -#define CONFIG_SYS_MC_PUP_VAL 0x00000000 -#define MC_PUER 0xFFFFFF54 -#define CONFIG_SYS_MC_PUER_VAL 0x00000000 -#define MC_ASR 0xFFFFFF04 -#define CONFIG_SYS_MC_ASR_VAL 0x00000000 -#define MC_AASR 0xFFFFFF08 -#define CONFIG_SYS_MC_AASR_VAL 0x00000000 -#define EBI_CFGR 0xFFFFFF64 -#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 -#define SMC_CSR0 0xFFFFFF70 -#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ - -/* clocks */ -#define PLLAR 0xFFFFFC28 -#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ -#define PLLBR 0xFFFFFC2C -#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ -#define MCKR 0xFFFFFC30 -/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ -#define CONFIG_SYS_MCKR_VAL 0x00000202 - -/* sdram */ -#define PIOC_ASR 0xFFFFF870 -#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as Perip (D16/D31) */ -#define PIOC_BSR 0xFFFFF874 -#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 -#define PIOC_PDR 0xFFFFF804 -#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 -#define EBI_CSA 0xFFFFFF60 -#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ -#define SDRC_CR 0xFFFFFF98 -#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ -#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ -#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ -#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ -#define SDRC_MR 0xFFFFFF90 -#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ -#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ -#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ -#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ -#define SDRC_TR 0xFFFFFF94 -#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ - -_TEXT_BASE: - .word TEXT_BASE - -.globl lowlevelinit -lowlevelinit: - /* memory control configuration */ - /* this isn't very elegant, but what the heck */ - ldr r0, =SMRDATA - ldr r1, _TEXT_BASE - sub r0, r0, r1 - add r2, r0, #80 -0: - /* the address */ - ldr r1, [r0], #4 - /* the value */ - ldr r3, [r0], #4 - str r3, [r1] - cmp r2, r0 - bne 0b - /* delay - this is all done by guess */ - ldr r0, =0x00010000 -1: - subs r0, r0, #1 - bhi 1b - ldr r0, =SMRDATA1 - ldr r1, _TEXT_BASE - sub r0, r0, r1 - add r2, r0, #176 -2: - /* the address */ - ldr r1, [r0], #4 - /* the value */ - ldr r3, [r0], #4 - str r3, [r1] - cmp r2, r0 - bne 2b - - /* everything is fine now */ - mov pc, lr - - .ltorg - -SMRDATA: - .word MC_PUIA - .word CONFIG_SYS_MC_PUIA_VAL - .word MC_PUP - .word CONFIG_SYS_MC_PUP_VAL - .word MC_PUER - .word CONFIG_SYS_MC_PUER_VAL - .word MC_ASR - .word CONFIG_SYS_MC_ASR_VAL - .word MC_AASR - .word CONFIG_SYS_MC_AASR_VAL - .word EBI_CFGR - .word CONFIG_SYS_EBI_CFGR_VAL - .word SMC_CSR0 - .word CONFIG_SYS_SMC_CSR0_VAL - .word PLLAR - .word CONFIG_SYS_PLLAR_VAL - .word PLLBR - .word CONFIG_SYS_PLLBR_VAL - .word MCKR - .word CONFIG_SYS_MCKR_VAL - /* SMRDATA is 80 bytes long */ - /* here there's a delay of 100 */ -SMRDATA1: - .word PIOC_ASR - .word CONFIG_SYS_PIOC_ASR_VAL - .word PIOC_BSR - .word CONFIG_SYS_PIOC_BSR_VAL - .word PIOC_PDR - .word CONFIG_SYS_PIOC_PDR_VAL - .word EBI_CSA - .word CONFIG_SYS_EBI_CSA_VAL - .word SDRC_CR - .word CONFIG_SYS_SDRC_CR_VAL - .word SDRC_MR - .word CONFIG_SYS_SDRC_MR_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word SDRC_MR - .word CONFIG_SYS_SDRC_MR_VAL1 - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word SDRC_MR - .word CONFIG_SYS_SDRC_MR_VAL2 - .word CONFIG_SYS_SDRAM1 - .word CONFIG_SYS_SDRAM_VAL - .word SDRC_TR - .word CONFIG_SYS_SDRC_TR_VAL - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - .word SDRC_MR - .word CONFIG_SYS_SDRC_MR_VAL3 - .word CONFIG_SYS_SDRAM - .word CONFIG_SYS_SDRAM_VAL - /* SMRDATA1 is 176 bytes long */ -#endif /* CONFIG_BOOTBINFUNC */ diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h index f09214dce9c..eab37df22dd 100644 --- a/include/configs/m501sk.h +++ b/include/configs/m501sk.h @@ -41,6 +41,39 @@ #define CONFIG_INITRD_TAG 1 #define CONFIG_MENUPROMPT "." +/* + * LowLevel Init + */ +#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1 +/* flash */ +#define CONFIG_SYS_MC_PUIA_VAL 0x00000000 +#define CONFIG_SYS_MC_PUP_VAL 0x00000000 +#define CONFIG_SYS_MC_PUER_VAL 0x00000000 +#define CONFIG_SYS_MC_ASR_VAL 0x00000000 +#define CONFIG_SYS_MC_AASR_VAL 0x00000000 +#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 +#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ + +/* clocks */ +#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ +#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ +/* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ +#define CONFIG_SYS_MCKR_VAL 0x00000202 + +/* sdram */ +#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ +#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 +#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 +#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ +#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ +#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ +#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ +#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ +#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ /* * Size of malloc() pool -- cgit v1.3.1 From 3dd9395a0d7ce69a335d0e743c04b9caedd681d3 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Tue, 6 Jan 2009 21:41:59 +0100 Subject: at91rm9200: move define from lowlevel_init to header Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- cpu/arm920t/at91rm9200/lowlevel_init.S | 70 +++++++++------------------- include/asm-arm/arch-at91rm9200/AT91RM9200.h | 27 +++++++++++ 2 files changed, 49 insertions(+), 48 deletions(-) (limited to 'include') diff --git a/cpu/arm920t/at91rm9200/lowlevel_init.S b/cpu/arm920t/at91rm9200/lowlevel_init.S index 736f1ea4d29..0913284e793 100644 --- a/cpu/arm920t/at91rm9200/lowlevel_init.S +++ b/cpu/arm920t/at91rm9200/lowlevel_init.S @@ -38,33 +38,7 @@ * turn is based on the boot.bin code from ATMEL * */ - -/* flash */ -#define MC_PUIA 0xFFFFFF10 -#define MC_PUP 0xFFFFFF50 -#define MC_PUER 0xFFFFFF54 -#define MC_ASR 0xFFFFFF04 -#define MC_AASR 0xFFFFFF08 -#define EBI_CFGR 0xFFFFFF64 -#define SMC_CSR0 0xFFFFFF70 - -/* clocks */ -#define PLLAR 0xFFFFFC28 -#define PLLBR 0xFFFFFC2C -#define MCKR 0xFFFFFC30 - -#define AT91C_BASE_CKGR 0xFFFFFC20 -#define CKGR_MOR 0 - -/* sdram */ -#define PIOC_ASR 0xFFFFF870 -#define PIOC_BSR 0xFFFFF874 -#define PIOC_PDR 0xFFFFF804 -#define EBI_CSA 0xFFFFFF60 -#define SDRC_CR 0xFFFFFF98 -#define SDRC_MR 0xFFFFFF90 -#define SDRC_TR 0xFFFFFF94 - +#include _MTEXT_BASE: #undef START_FROM_MEM @@ -84,7 +58,7 @@ lowlevel_init: #else ldr r0, =0x0000FF00 /* Disable main oscillator, OSCOUNT = 0xFF */ #endif - str r0, [r1, #CKGR_MOR] + str r0, [r1, #AT91C_CKGR_MOR] /* Add loop to compensate Main Oscillator startup time */ ldr r0, =0x00000010 LoopOsc: @@ -134,44 +108,44 @@ LoopOsc: .ltorg SMRDATA: - .word MC_PUIA + .word AT91C_MC_PUIA .word CONFIG_SYS_MC_PUIA_VAL - .word MC_PUP + .word AT91C_MC_PUP .word CONFIG_SYS_MC_PUP_VAL - .word MC_PUER + .word AT91C_MC_PUER .word CONFIG_SYS_MC_PUER_VAL - .word MC_ASR + .word AT91C_MC_ASR .word CONFIG_SYS_MC_ASR_VAL - .word MC_AASR + .word AT91C_MC_AASR .word CONFIG_SYS_MC_AASR_VAL - .word EBI_CFGR + .word AT91C_EBI_CFGR .word CONFIG_SYS_EBI_CFGR_VAL - .word SMC_CSR0 + .word AT91C_SMC_CSR0 .word CONFIG_SYS_SMC_CSR0_VAL - .word PLLAR + .word AT91C_PLLAR .word CONFIG_SYS_PLLAR_VAL - .word PLLBR + .word AT91C_PLLBR .word CONFIG_SYS_PLLBR_VAL - .word MCKR + .word AT91C_MCKR .word CONFIG_SYS_MCKR_VAL /* SMRDATA is 80 bytes long */ /* here there's a delay of 100 */ SMRDATA1: - .word PIOC_ASR + .word AT91C_PIOC_ASR .word CONFIG_SYS_PIOC_ASR_VAL - .word PIOC_BSR + .word AT91C_PIOC_BSR .word CONFIG_SYS_PIOC_BSR_VAL - .word PIOC_PDR + .word AT91C_PIOC_PDR .word CONFIG_SYS_PIOC_PDR_VAL - .word EBI_CSA + .word AT91C_EBI_CSA .word CONFIG_SYS_EBI_CSA_VAL - .word SDRC_CR + .word AT91C_SDRC_CR .word CONFIG_SYS_SDRC_CR_VAL - .word SDRC_MR + .word AT91C_SDRC_MR .word CONFIG_SYS_SDRC_MR_VAL .word CONFIG_SYS_SDRAM .word CONFIG_SYS_SDRAM_VAL - .word SDRC_MR + .word AT91C_SDRC_MR .word CONFIG_SYS_SDRC_MR_VAL1 .word CONFIG_SYS_SDRAM .word CONFIG_SYS_SDRAM_VAL @@ -189,15 +163,15 @@ SMRDATA1: .word CONFIG_SYS_SDRAM_VAL .word CONFIG_SYS_SDRAM .word CONFIG_SYS_SDRAM_VAL - .word SDRC_MR + .word AT91C_SDRC_MR .word CONFIG_SYS_SDRC_MR_VAL2 .word CONFIG_SYS_SDRAM1 .word CONFIG_SYS_SDRAM_VAL - .word SDRC_TR + .word AT91C_SDRC_TR .word CONFIG_SYS_SDRC_TR_VAL .word CONFIG_SYS_SDRAM .word CONFIG_SYS_SDRAM_VAL - .word SDRC_MR + .word AT91C_SDRC_MR .word CONFIG_SYS_SDRC_MR_VAL3 .word CONFIG_SYS_SDRAM .word CONFIG_SYS_SDRAM_VAL diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 95db0177cd4..00bae1c4d57 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -781,5 +781,32 @@ typedef struct _AT91S_PDC #define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) /* (PIOB) Output Disable Registerr */ #define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) /* (PIOB) Pin Data Status Register */ +#else +/* flash */ +#define AT91C_MC_PUIA 0xFFFFFF10 +#define AT91C_MC_PUP 0xFFFFFF50 +#define AT91C_MC_PUER 0xFFFFFF54 +#define AT91C_MC_ASR 0xFFFFFF04 +#define AT91C_MC_AASR 0xFFFFFF08 +#define AT91C_EBI_CFGR 0xFFFFFF64 +#define AT91C_SMC_CSR0 0xFFFFFF70 + +/* clocks */ +#define AT91C_PLLAR 0xFFFFFC28 +#define AT91C_PLLBR 0xFFFFFC2C +#define AT91C_MCKR 0xFFFFFC30 + +#define AT91C_BASE_CKGR 0xFFFFFC20 +#define AT91C_CKGR_MOR 0 + +/* sdram */ +#define AT91C_PIOC_ASR 0xFFFFF870 +#define AT91C_PIOC_BSR 0xFFFFF874 +#define AT91C_PIOC_PDR 0xFFFFF804 +#define AT91C_EBI_CSA 0xFFFFFF60 +#define AT91C_SDRC_CR 0xFFFFFF98 +#define AT91C_SDRC_MR 0xFFFFFF90 +#define AT91C_SDRC_TR 0xFFFFFF94 + #endif /* __ASSEMBLY__ */ #endif /* AT91RM9200_H */ -- cgit v1.3.1 From 79e436cad3b4a7db88408c3f05175028f30d700d Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 3 Dec 2008 22:36:26 -0600 Subject: sbc8641d: Fix PCI mapping concepts Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce --- board/sbc8641d/law.c | 10 +++++----- board/sbc8641d/sbc8641d.c | 8 ++++---- include/configs/sbc8641d.h | 32 ++++++++++++++++++-------------- 3 files changed, 27 insertions(+), 23 deletions(-) (limited to 'include') diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c index de47fcd634f..760c6935de7 100644 --- a/board/sbc8641d/law.c +++ b/board/sbc8641d/law.c @@ -45,14 +45,14 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), - SET_LAW(CONFIG_SYS_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), - SET_LAW(CONFIG_SYS_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC), - SET_LAW(CONFIG_SYS_PCI1_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), - SET_LAW(CONFIG_SYS_PCI2_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), + SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), + SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), - SET_LAW(CONFIG_SYS_RIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO) + SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index 1471e581e37..508bdc5dd82 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -247,14 +247,14 @@ void pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCI1_MEM_BASE, + CONFIG_SYS_PCI1_MEM_BUS, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ pci_set_region(r++, - CONFIG_SYS_PCI1_IO_BASE, + CONFIG_SYS_PCI1_IO_BUS, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_SIZE, PCI_REGION_IO); @@ -290,14 +290,14 @@ void pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCI2_MEM_BASE, + CONFIG_SYS_PCI2_MEM_BUS, CONFIG_SYS_PCI2_MEM_PHYS, CONFIG_SYS_PCI2_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ pci_set_region(r++, - CONFIG_SYS_PCI2_IO_BASE, + CONFIG_SYS_PCI2_IO_BUS, CONFIG_SYS_PCI2_IO_PHYS, CONFIG_SYS_PCI2_IO_SIZE, PCI_REGION_IO); diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 00129457582..1008812b711 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -311,18 +311,22 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BUS +#define CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI1_MEM_BUS #define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_BASE 0xe2000000 -#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE +#define CONFIG_SYS_PCI1_IO_BUS 0xe2000000 +#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BUS +#define CONFIG_SYS_PCI1_IO_VIRT CONFIG_SYS_PCI1_IO_BUS #define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */ -#define CONFIG_SYS_PCI2_MEM_BASE 0xa0000000 -#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BASE +#define CONFIG_SYS_PCI2_MEM_BUS 0xa0000000 +#define CONFIG_SYS_PCI2_MEM_PHYS CONFIG_SYS_PCI2_MEM_BUS +#define CONFIG_SYS_PCI2_MEM_VIRT CONFIG_SYS_PCI2_MEM_BUS #define CONFIG_SYS_PCI2_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI2_IO_BASE 0xe3000000 -#define CONFIG_SYS_PCI2_IO_PHYS CONFIG_SYS_PCI2_IO_BASE +#define CONFIG_SYS_PCI2_IO_BUS 0xe3000000 +#define CONFIG_SYS_PCI2_IO_PHYS CONFIG_SYS_PCI2_IO_BUS +#define CONFIG_SYS_PCI2_IO_VIRT CONFIG_SYS_PCI2_IO_BUS #define CONFIG_SYS_PCI2_IO_SIZE 0x1000000 /* 16M */ #if defined(CONFIG_PCI) @@ -409,10 +413,10 @@ * 0xa000_0000 512M PCI-Express 2 Memory * Changed it for operating from 0xd0000000 */ -#define CONFIG_SYS_DBAT1L ( CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW \ +#define CONFIG_SYS_DBAT1L ( CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT1U CONFIG_SYS_DBAT1U /* @@ -452,10 +456,10 @@ * 0xe300_0000 16M PCI-Express 2 I/0 * Note that this is at 0xe0000000 */ -#define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCI1_IO_BASE | BATL_PP_RW \ +#define CONFIG_SYS_DBAT4L ( CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW \ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCI1_IO_BASE | BATU_BL_32M | BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_IO_BASE | BATL_PP_RW | BATL_CACHEINHIBIT) +#define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCI1_IO_VIRT | BATU_BL_32M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT4U CONFIG_SYS_DBAT4U /* -- cgit v1.3.1 From 3e3fffe3baf3befde287fec1fcbfe55052fb8946 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Wed, 3 Dec 2008 22:36:44 -0600 Subject: mpc8610hpcd: Fix PCI mapping concepts Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce --- board/freescale/mpc8610hpcd/law.c | 4 ++-- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 12 ++++++------ include/configs/MPC8610HPCD.h | 24 +++++++++++++----------- 3 files changed, 21 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/board/freescale/mpc8610hpcd/law.c b/board/freescale/mpc8610hpcd/law.c index 2aad28aee1f..0fc83848472 100644 --- a/board/freescale/mpc8610hpcd/law.c +++ b/board/freescale/mpc8610hpcd/law.c @@ -31,8 +31,8 @@ struct law_entry law_table[] = { #if !defined(CONFIG_SPD_EEPROM) SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR_1), #endif - SET_LAW(CONFIG_SYS_PCIE1_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1), - SET_LAW(CONFIG_SYS_PCIE2_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), + SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), SET_LAW(PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_2), diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 2792778e320..a2097a5aff7 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -266,14 +266,14 @@ void pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCIE1_MEM_BASE, + CONFIG_SYS_PCIE1_MEM_BUS, CONFIG_SYS_PCIE1_MEM_PHYS, CONFIG_SYS_PCIE1_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ pci_set_region(r++, - CONFIG_SYS_PCIE1_IO_BASE, + CONFIG_SYS_PCIE1_IO_BUS, CONFIG_SYS_PCIE1_IO_PHYS, CONFIG_SYS_PCIE1_IO_SIZE, PCI_REGION_IO); @@ -321,14 +321,14 @@ void pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCIE2_MEM_BASE, + CONFIG_SYS_PCIE2_MEM_BUS, CONFIG_SYS_PCIE2_MEM_PHYS, CONFIG_SYS_PCIE2_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ pci_set_region(r++, - CONFIG_SYS_PCIE2_IO_BASE, + CONFIG_SYS_PCIE2_IO_BUS, CONFIG_SYS_PCIE2_IO_PHYS, CONFIG_SYS_PCIE2_IO_SIZE, PCI_REGION_IO); @@ -370,14 +370,14 @@ void pci_init_board(void) /* outbound memory */ pci_set_region(r++, - CONFIG_SYS_PCI1_MEM_BASE, + CONFIG_SYS_PCI1_MEM_BUS, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_SIZE, PCI_REGION_MEM); /* outbound io */ pci_set_region(r++, - CONFIG_SYS_PCI1_IO_BASE, + CONFIG_SYS_PCI1_IO_BUS, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_SIZE, PCI_REGION_IO); diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 27517e5b1fb..4bd3e0bd3d8 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -273,11 +273,13 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BUS +#define CONFIG_SYS_PCI1_MEM_VIRT CONFIG_SYS_PCI1_MEM_BUS #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_BUS 0x0000000 #define CONFIG_SYS_PCI1_IO_PHYS 0xe1000000 +#define CONFIG_SYS_PCI1_IO_VIRT 0xe1000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ /* For RTL8139 */ @@ -285,18 +287,18 @@ #define _IO_BASE 0x00000000 /* controller 1, Base address 0xa000 */ -#define CONFIG_SYS_PCIE1_MEM_BASE 0xa0000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BASE +#define CONFIG_SYS_PCIE1_MEM_BUS 0xa0000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS #define CONFIG_SYS_PCIE1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE1_IO_PHYS 0xe3000000 #define CONFIG_SYS_PCIE1_IO_SIZE 0x00100000 /* 1M */ /* controller 2, Base Address 0x9000 */ -#define CONFIG_SYS_PCIE2_MEM_BASE 0x90000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BASE +#define CONFIG_SYS_PCIE2_MEM_BUS 0x90000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS CONFIG_SYS_PCIE2_MEM_BUS #define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE2_IO_BASE 0x00000000 /* reuse mem LAW */ +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 /* reuse mem LAW */ #define CONFIG_SYS_PCIE2_IO_PHYS 0xe2000000 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00100000 /* 1M */ @@ -364,7 +366,7 @@ #define CONFIG_SYS_DBAT1L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_PHYS | BATU_BL_1G | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT1U (CONFIG_SYS_PCI1_MEM_VIRT | BATU_BL_1G | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT1U CONFIG_SYS_DBAT1U @@ -375,7 +377,7 @@ #define CONFIG_SYS_DBAT2L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT \ | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCI1_IO_PHYS | BATU_BL_16M | BATU_VS | BATU_VP) +#define CONFIG_SYS_DBAT2U (CONFIG_SYS_PCI1_IO_VIRT | BATU_BL_16M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT) #define CONFIG_SYS_IBAT2U CONFIG_SYS_DBAT2U -- cgit v1.3.1 From b5f65dfa9aa8e068e62aba4733dc4fd97b1d9bf6 Mon Sep 17 00:00:00 2001 From: Haiying Wang Date: Tue, 13 Jan 2009 16:29:28 -0500 Subject: Some changes of TLB entry setting for MPC8572DS - Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode, all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0 can not access PIXIS_BASE anymore (any access will cause DataTLBError exception) - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board. Signed-off-by: Haiying Wang --- board/freescale/mpc8572ds/tlb.c | 7 +++---- include/configs/MPC8572DS.h | 1 + 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/board/freescale/mpc8572ds/tlb.c b/board/freescale/mpc8572ds/tlb.c index 8d1f646fac7..829896ac060 100644 --- a/board/freescale/mpc8572ds/tlb.c +++ b/board/freescale/mpc8572ds/tlb.c @@ -41,10 +41,6 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, 0, 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, PIXIS_BASE, PIXIS_BASE, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 0, BOOKE_PAGESZ_4K, 0), - /* TLB 1 */ /* *I*** - Covers boot page */ SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000, @@ -86,6 +82,9 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 7, BOOKE_PAGESZ_1M, 1), + SET_TLB_ENTRY(1, PIXIS_BASE, PIXIS_BASE, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 8, BOOKE_PAGESZ_4K, 1), }; int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 37c3f4200be..6c7a364545c 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -92,6 +92,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000) /* DDR Setup */ +#define CONFIG_SYS_DDR_TLB_START 9 #define CONFIG_FSL_DDR2 #undef CONFIG_FSL_DDR_INTERACTIVE #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ -- cgit v1.3.1 From 3ba605d4beec649438539e7df97b5fedb26592fb Mon Sep 17 00:00:00 2001 From: Matthias Fuchs Date: Fri, 2 Jan 2009 12:18:49 +0100 Subject: ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boards This patch adds esd's loadpci BSP command to CPCI4052 and CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM. Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese --- board/esd/cpci405/Makefile | 1 + include/configs/CPCI4052.h | 2 ++ include/configs/CPCI405AB.h | 3 +++ 3 files changed, 6 insertions(+) (limited to 'include') diff --git a/board/esd/cpci405/Makefile b/board/esd/cpci405/Makefile index 3867bd809c3..7516c2280e8 100644 --- a/board/esd/cpci405/Makefile +++ b/board/esd/cpci405/Makefile @@ -29,6 +29,7 @@ endif LIB = $(obj)lib$(BOARD).a COBJS = $(BOARD).o flash.o ../common/misc.o ../common/auto_update.o +COBJS += ../common/cmd_loadpci.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index e231fa70588..d0b4d113399 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -216,6 +216,8 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ +#define CONFIG_PRAM 0 /* use pram variable to overwrite */ + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 2319c58725c..69c8c6eee76 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -92,6 +92,7 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_MII #define CONFIG_CMD_PING +#define CONFIG_CMD_BSP #define CONFIG_CMD_EEPROM @@ -212,6 +213,8 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */ +#define CONFIG_PRAM 0 /* use pram variable to overwrite */ + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is -- cgit v1.3.1 From f7e78f3b74aae9caca2997bad865a72338326c0a Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Sat, 20 Dec 2008 19:29:49 +0100 Subject: sh: use write{8,16,32} in all lowlevel_init Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Nobuhiro Iwamatsu --- board/mpr2/lowlevel_init.S | 49 +++------ board/ms7722se/lowlevel_init.S | 160 +++++++++-------------------- board/ms7750se/lowlevel_init.S | 64 ++++-------- board/renesas/MigoR/lowlevel_init.S | 141 ++++++++------------------ board/renesas/ap325rxa/lowlevel_init.S | 121 ++++++---------------- board/renesas/r2dplus/lowlevel_init.S | 85 ++++------------ board/renesas/r7780mp/lowlevel_init.S | 122 ++++++---------------- board/renesas/rsk7203/lowlevel_init.S | 129 ++++++------------------ board/renesas/sh7763rdp/lowlevel_init.S | 172 +++++++++----------------------- board/renesas/sh7785lcr/lowlevel_init.S | 28 +----- include/asm-sh/macro.h | 52 ++++++++++ 11 files changed, 338 insertions(+), 785 deletions(-) create mode 100644 include/asm-sh/macro.h (limited to 'include') diff --git a/board/mpr2/lowlevel_init.S b/board/mpr2/lowlevel_init.S index 187b5bbeba4..5f02bd4bb26 100644 --- a/board/mpr2/lowlevel_init.S +++ b/board/mpr2/lowlevel_init.S @@ -22,6 +22,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ +#include .global lowlevel_init @@ -33,59 +34,35 @@ lowlevel_init: /* * Set frequency multipliers and dividers in FRQCR. */ - mov.l WTCSR_A, r1 - mov.l WTCSR_D, r0 - mov.w r0, @r1 + write16 WTCSR_A, WTCSR_D - mov.l WTCNT_A, r1 - mov.l WTCNT_D, r0 - mov.w r0, @r1 + write16 WTCNT_A, WTCNT_D - mov.l FRQCR_A, r1 - mov.l FRQCR_D, r0 - mov.w r0, @r1 + write16 FRQCR_A, FRQCR_D /* * Setup CS0 (Flash). */ - mov.l CS0BCR_A, r1 - mov.l CS0BCR_D, r0 - mov.l r0, @r1 + write32 CS0BCR_A, CS0BCR_D - mov.l CS0WCR_A, r1 - mov.l CS0WCR_D, r0 - mov.l r0, @r1 + write32 CS0WCR_A, CS0WCR_D /* * Setup CS3 (SDRAM). */ - mov.l CS3BCR_A, r1 - mov.l CS3BCR_D, r0 - mov.l r0, @r1 + write32 CS3BCR_A, CS3BCR_D - mov.l CS3WCR_A, r1 - mov.l CS3WCR_D, r0 - mov.l r0, @r1 + write32 CS3WCR_A, CS3WCR_D - mov.l SDCR_A, r1 - mov.l SDCR_D1, r0 - mov.l r0, @r1 + write32 SDCR_A, SDCR_D1 - mov.l RTCSR_A, r1 - mov.l RTCSR_D, r0 - mov.l r0, @r1 + write32 RTCSR_A, RTCSR_D - mov.l RTCNT_A, r1 - mov.l RTCNT_D, r0 - mov.l r0, @r1 + write32 RTCNT_A, RTCNT_D - mov.l RTCOR_A, r1 - mov.l RTCOR_D, r0 - mov.l r0, @r1 + write32 RTCOR_A, RTCOR_D - mov.l SDCR_A, r1 - mov.l SDCR_D2, r0 - mov.l r0, @r1 + write32 SDCR_A, SDCR_D2 mov.l SDMR3_A, r1 mov.l SDMR3_D, r0 diff --git a/board/ms7722se/lowlevel_init.S b/board/ms7722se/lowlevel_init.S index 3e887cfe8ee..9144e104b76 100644 --- a/board/ms7722se/lowlevel_init.S +++ b/board/ms7722se/lowlevel_init.S @@ -27,6 +27,7 @@ #include #include +#include /* * Board specific low level init code, called _very_ early in the @@ -43,165 +44,94 @@ lowlevel_init: - /* Address of Cache Control Register */ - mov.l CCR_A, r1 - /*Instruction Cache Invalidate */ - mov.l CCR_D, r0 - mov.l r0, @r1 + /* + * Cache Control Register + * Instruction Cache Invalidate + */ + write32 CCR_A, CCR_D - /* Address of MMU Control Register */ - mov.l MMUCR_A, r1 - /* TI == TLB Invalidate bit */ - mov.l MMUCR_D, r0 - mov.l r0, @r1 + /* + * Address of MMU Control Register + * TI == TLB Invalidate bit + */ + write32 MMUCR_A, MMUCR_D /* Address of Power Control Register 0 */ - mov.l MSTPCR0_A, r1 - mov.l MSTPCR0_D, r0 - mov.l r0, @r1 + write32 MSTPCR0_A, MSTPCR0_D /* Address of Power Control Register 2 */ - mov.l MSTPCR2_A, r1 - mov.l MSTPCR2_D, r0 - mov.l r0, @r1 + write32 MSTPCR2_A, MSTPCR2_D - mov.l SBSCR_A, r1 - mov.w SBSCR_D, r0 - mov.w r0, @r1 + write16 SBSCR_A, SBSCR_D - mov.l PSCR_A, r1 - mov.w PSCR_D, r0 - mov.w r0, @r1 + write16 PSCR_A, PSCR_D /* 0xA4520004 (Watchdog Control / Status Register) */ -! mov.l RWTCSR_A, r1 - /* 0xA507 -> timer_STOP/WDT_CLK=max */ -! mov.w RWTCSR_D_1, r0 -! mov.w r0, @r1 +! write16 RWTCSR_A, RWTCSR_D_1 /* 0xA507 -> timer_STOP/WDT_CLK=max */ /* 0xA4520000 (Watchdog Count Register) */ - mov.l RWTCNT_A, r1 - /*0x5A00 -> Clear */ - mov.w RWTCNT_D, r0 - mov.w r0, @r1 + write16 RWTCNT_A, RWTCNT_D /*0x5A00 -> Clear */ /* 0xA4520004 (Watchdog Control / Status Register) */ - mov.l RWTCSR_A, r1 - /* 0xA504 -> timer_STOP/CLK=500ms */ - mov.w RWTCSR_D_2, r0 - mov.w r0, @r1 + write16 RWTCSR_A, RWTCSR_D_2 /* 0xA504 -> timer_STOP/CLK=500ms */ /* 0xA4150000 Frequency control register */ - mov.l FRQCR_A, r1 - mov.l FRQCR_D, r0 ! - mov.l r0, @r1 + write32 FRQCR_A, FRQCR_D - mov.l CCR_A, r1 - mov.l CCR_D_2, r0 - mov.l r0, @r1 + write32 CCR_A, CCR_D_2 bsc_init: - mov.l PSELA_A, r1 - mov.w PSELA_D, r0 - mov.w r0, @r1 + write16 PSELA_A, PSELA_D - mov.l DRVCR_A, r1 - mov.w DRVCR_D, r0 - mov.w r0, @r1 + write16 DRVCR_A, DRVCR_D - mov.l PCCR_A, r1 - mov.w PCCR_D, r0 - mov.w r0, @r1 + write16 PCCR_A, PCCR_D - mov.l PECR_A, r1 - mov.w PECR_D, r0 - mov.w r0, @r1 + write16 PECR_A, PECR_D - mov.l PJCR_A, r1 - mov.w PJCR_D, r0 - mov.w r0, @r1 + write16 PJCR_A, PJCR_D - mov.l PXCR_A, r1 - mov.w PXCR_D, r0 - mov.w r0, @r1 + write16 PXCR_A, PXCR_D - mov.l CMNCR_A, r1 ! CMNCR address -> R1 - mov.l CMNCR_D, r0 ! CMNCR data -> R0 - mov.l r0, @r1 ! CMNCR set + write32 CMNCR_A, CMNCR_D - mov.l CS0BCR_A, r1 ! CS0BCR address -> R1 - mov.l CS0BCR_D, r0 ! CS0BCR data -> R0 - mov.l r0, @r1 ! CS0BCR set + write32 CS0BCR_A, CS0BCR_D - mov.l CS2BCR_A, r1 ! CS2BCR address -> R1 - mov.l CS2BCR_D, r0 ! CS2BCR data -> R0 - mov.l r0, @r1 ! CS2BCR set + write32 CS2BCR_A, CS2BCR_D - mov.l CS4BCR_A, r1 ! CS4BCR address -> R1 - mov.l CS4BCR_D, r0 ! CS4BCR data -> R0 - mov.l r0, @r1 ! CS4BCR set + write32 CS4BCR_A, CS4BCR_D - mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1 - mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0 - mov.l r0, @r1 ! CS5ABCR set + write32 CS5ABCR_A, CS5ABCR_D - mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1 - mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0 - mov.l r0, @r1 ! CS5BBCR set + write32 CS5BBCR_A, CS5BBCR_D - mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1 - mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0 - mov.l r0, @r1 ! CS6ABCR set + write32 CS6ABCR_A, CS6ABCR_D - mov.l CS0WCR_A, r1 ! CS0WCR address -> R1 - mov.l CS0WCR_D, r0 ! CS0WCR data -> R0 - mov.l r0, @r1 ! CS0WCR set + write32 CS0WCR_A, CS0WCR_D - mov.l CS2WCR_A, r1 ! CS2WCR address -> R1 - mov.l CS2WCR_D, r0 ! CS2WCR data -> R0 - mov.l r0, @r1 ! CS2WCR set + write32 CS2WCR_A, CS2WCR_D - mov.l CS4WCR_A, r1 ! CS4WCR address -> R1 - mov.l CS4WCR_D, r0 ! CS4WCR data -> R0 - mov.l r0, @r1 ! CS4WCR set + write32 CS4WCR_A, CS4WCR_D - mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1 - mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0 - mov.l r0, @r1 ! CS5AWCR set + write32 CS5AWCR_A, CS5AWCR_D - mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1 - mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0 - mov.l r0, @r1 ! CS5BWCR set + write32 CS5BWCR_A, CS5BWCR_D - mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1 - mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0 - mov.l r0, @r1 ! CS6AWCR set + write32 CS6AWCR_A, CS6AWCR_D ! SDRAM initialization - mov.l SDCR_A, r1 ! SB_SDCR address -> R1 - mov.l SDCR_D, r0 ! SB_SDCR data -> R0 - mov.l r0, @r1 ! SB_SDCR set + write32 SDCR_A, SDCR_D - mov.l SDWCR_A, r1 ! SB_SDWCR address -> R1 - mov.l SDWCR_D, r0 ! SB_SDWCR data -> R0 - mov.l r0, @r1 ! SB_SDWCR set + write32 SDWCR_A, SDWCR_D - mov.l SDPCR_A, r1 ! SB_SDPCR address -> R1 - mov.l SDPCR_D, r0 ! SB_SDPCR data -> R0 - mov.l r0, @r1 ! SB_SDPCR set + write32 SDPCR_A, SDPCR_D - mov.l RTCOR_A, r1 ! SB_RTCOR address -> R1 - mov.l RTCOR_D, r0 ! SB_RTCOR data -> R0 - mov.l r0, @r1 ! SB_RTCOR set + write32 RTCOR_A, RTCOR_D - mov.l RTCSR_A, r1 ! SB_RTCSR address -> R1 - mov.l RTCSR_D, r0 ! SB_RTCSR data -> R0 - mov.l r0, @r1 ! SB_RTCSR set + write32 RTCSR_A, RTCSR_D - mov.l SDMR3_A, r1 ! SDMR3 address -> R1 - mov #0x00, r0 ! SDMR3 data -> R0 - mov.b r0, @r1 ! SDMR3 set + write8 SDMR3_A, #0x00 ! BL bit off (init = ON) (?!?) diff --git a/board/ms7750se/lowlevel_init.S b/board/ms7750se/lowlevel_init.S index de05dd9ee85..71080197829 100644 --- a/board/ms7750se/lowlevel_init.S +++ b/board/ms7750se/lowlevel_init.S @@ -29,6 +29,7 @@ #include #include +#include #ifdef CONFIG_CPU_SH7751 #define BCR2_D_VALUE 0x2FFC /* Area 1-6 width: 32/32/32/32/32/16 */ @@ -65,61 +66,37 @@ lowlevel_init: - mov.l CCR_A, r1 ! CCR Address - mov.l CCR_D_DISABLE, r0 ! CCR Data - mov.l r0, @r1 + write32 CCR_A, CCR_D_DISABLE init_bsc: - mov.l FRQCR_A, r1 /* FRQCR Address */ - mov.l FRQCR_D, r0 /* FRQCR Data */ - mov.w r0, @r1 + write16 FRQCR_A, FRQCR_D - mov.l BCR1_A, r1 /* BCR1 Address */ - mov.l BCR1_D, r0 /* BCR1 Data */ - mov.l r0, @r1 + write32 BCR1_A, BCR1_D - mov.l BCR2_A, r1 /* BCR2 Address */ - mov.l BCR2_D, r0 /* BCR2 Data */ - mov.w r0, @r1 + write16 BCR2_A, BCR2_D - mov.l WCR1_A, r1 /* WCR1 Address */ - mov.l WCR1_D, r0 /* WCR1 Data */ - mov.l r0, @r1 + write32 WCR1_A, WCR1_D - mov.l WCR2_A, r1 /* WCR2 Address */ - mov.l WCR2_D, r0 /* WCR2 Data */ - mov.l r0, @r1 + write32 WCR2_A, WCR2_D - mov.l WCR3_A, r1 /* WCR3 Address */ - mov.l WCR3_D, r0 /* WCR3 Data */ - mov.l r0, @r1 + write32 WCR3_A, WCR3_D - mov.l MCR_A, r1 /* MCR Address */ - mov.l MCR_D1, r0 /* MCR Data1 */ - mov.l r0, @r1 + write32 MCR_A, MCR_D1 - mov.l SDMR3_A, r1 /* Set SDRAM mode */ - mov #0, r0 - mov.b r0, @r1 + /* Set SDRAM mode */ + write8 SDMR3_A, #0 ! Do you need PCMCIA setting? ! If so, please add the lines here... - mov.l RTCNT_A, r1 /* RTCNT Address */ - mov.l RTCNT_D, r0 /* RTCNT Data */ - mov.w r0, @r1 + write16 RTCNT_A, RTCNT_D - mov.l RTCOR_A, r1 /* RTCOR Address */ - mov.l RTCOR_D, r0 /* RTCOR Data */ - mov.w r0, @r1 + write16 RTCOR_A, RTCOR_D - mov.l RTCSR_A, r1 /* RTCSR Address */ - mov.l RTCSR_D, r0 /* RTCSR Data */ - mov.w r0, @r1 + write16 RTCSR_A, RTCSR_D + + write16 RFCR_A, RFCR_D - mov.l RFCR_A, r1 /* RFCR Address */ - mov.l RFCR_D, r0 /* RFCR Data */ - mov.w r0, @r1 /* Clear reflesh counter */ /* Wait DRAM refresh 30 times */ mov #30, r3 1: @@ -128,13 +105,10 @@ init_bsc: cmp/hi r3, r2 bf 1b - mov.l MCR_A, r1 /* MCR Address */ - mov.l MCR_D2, r0 /* MCR Data2 */ - mov.l r0, @r1 + write32 MCR_A, MCR_D2 - mov.l SDMR3_A, r1 /* Set SDRAM mode */ - mov #0, r0 - mov.b r0, @r1 + /* Set SDRAM mode */ + write8 SDMR3_A, #0 rts nop diff --git a/board/renesas/MigoR/lowlevel_init.S b/board/renesas/MigoR/lowlevel_init.S index 13c83bf8cb9..1da603a9fe7 100644 --- a/board/renesas/MigoR/lowlevel_init.S +++ b/board/renesas/MigoR/lowlevel_init.S @@ -27,6 +27,7 @@ #include #include +#include /* * Board specific low level init code, called _very_ early in the @@ -42,139 +43,81 @@ .align 2 lowlevel_init: - mov.l CCR_A, r1 ! Address of Cache Control Register - mov.l CCR_D, r0 ! Instruction Cache Invalidate - mov.l r0, @r1 + write32 CCR_A, CCR_D ! Address of Cache Control Register + ! Instruction Cache Invalidate - mov.l MMUCR_A, r1 ! Address of MMU Control Register - mov.l MMUCR_D, r0 ! TI == TLB Invalidate bit - mov.l r0, @r1 + write32 MMUCR_A, MMUCR_D ! Address of MMU Control Register + ! TI == TLB Invalidate bit - mov.l MSTPCR0_A, r1 ! Address of Power Control Register 0 - mov.l MSTPCR0_D, r0 ! - mov.l r0, @r1 + write32 MSTPCR0_A, MSTPCR0_D ! Address of Power Control Register 0 - mov.l MSTPCR2_A, r1 ! Address of Power Control Register 2 - mov.l MSTPCR2_D, r0 ! - mov.l r0, @r1 + write32 MSTPCR2_A, MSTPCR2_D ! Address of Power Control Register 2 - mov.l PFC_PULCR_A, r1 - mov.w PFC_PULCR_D, r0 - mov.w r0,@r1 + write16 PFC_PULCR_A, PFC_PULCR_D - mov.l PFC_DRVCR_A, r1 - mov.w PFC_DRVCR_D, r0 - mov.w r0, @r1 + write16 PFC_DRVCR_A, PFC_DRVCR_D - mov.l SBSCR_A, r1 ! - mov.w SBSCR_D, r0 ! - mov.w r0, @r1 + write16 SBSCR_A, SBSCR_D - mov.l PSCR_A, r1 ! - mov.w PSCR_D, r0 ! - mov.w r0, @r1 + write16 PSCR_A, PSCR_D - mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register) - mov.w RWTCSR_D_1, r0 ! 0xA507 -> timer_STOP/WDT_CLK=max - mov.w r0, @r1 + write16 RWTCSR_A, RWTCSR_D_1 ! 0xA4520004 (Watchdog Control / Status Register) + ! 0xA507 -> timer_STOP / WDT_CLK = max - mov.l RWTCNT_A, r1 ! 0xA4520000 (Watchdog Count Register) - mov.w RWTCNT_D, r0 ! 0x5A00 -> Clear - mov.w r0, @r1 + write16 RWTCNT_A, RWTCNT_D ! 0xA4520000 (Watchdog Count Register) + ! 0x5A00 -> Clear - mov.l RWTCSR_A, r1 ! 0xA4520004 (Watchdog Control / Status Register) - mov.w RWTCSR_D_2, r0 ! 0xA504 -> timer_STOP/CLK=500ms - mov.w r0, @r1 + write16 RWTCSR_A, RWTCSR_D_2 ! 0xA4520004 (Watchdog Control / Status Register) + ! 0xA504 -> timer_STOP / CLK = 500ms - mov.l DLLFRQ_A, r1 ! 20080115 - mov.l DLLFRQ_D, r0 ! 20080115 - mov.l r0, @r1 + write32 DLLFRQ_A, DLLFRQ_D ! 20080115 + ! 20080115 - mov.l FRQCR_A, r1 ! 0xA4150000 Frequency control register - mov.l FRQCR_D, r0 ! 20080115 - mov.l r0, @r1 + write32 FRQCR_A, FRQCR_D ! 0xA4150000 Frequency control register + ! 20080115 - mov.l CCR_A, r1 ! Address of Cache Control Register - mov.l CCR_D_2, r0 ! ?? - mov.l r0, @r1 + write32 CCR_A, CCR_D_2 ! Address of Cache Control Register + ! ?? bsc_init: - mov.l CMNCR_A, r1 ! CMNCR address -> R1 - mov.l CMNCR_D, r0 ! CMNCR data -> R0 - mov.l r0, @r1 ! CMNCR set + write32 CMNCR_A, CMNCR_D - mov.l CS0BCR_A, r1 ! CS0BCR address -> R1 - mov.l CS0BCR_D, r0 ! CS0BCR data -> R0 - mov.l r0, @r1 ! CS0BCR set + write32 CS0BCR_A, CS0BCR_D - mov.l CS4BCR_A, r1 ! CS4BCR address -> R1 - mov.l CS4BCR_D, r0 ! CS4BCR data -> R0 - mov.l r0, @r1 ! CS4BCR set + write32 CS4BCR_A, CS4BCR_D - mov.l CS5ABCR_A, r1 ! CS5ABCR address -> R1 - mov.l CS5ABCR_D, r0 ! CS5ABCR data -> R0 - mov.l r0, @r1 ! CS5ABCR set + write32 CS5ABCR_A, CS5ABCR_D - mov.l CS5BBCR_A, r1 ! CS5BBCR address -> R1 - mov.l CS5BBCR_D, r0 ! CS5BBCR data -> R0 - mov.l r0, @r1 ! CS5BBCR set + write32 CS5BBCR_A, CS5BBCR_D - mov.l CS6ABCR_A, r1 ! CS6ABCR address -> R1 - mov.l CS6ABCR_D, r0 ! CS6ABCR data -> R0 - mov.l r0, @r1 ! CS6ABCR set + write32 CS6ABCR_A, CS6ABCR_D - mov.l CS0WCR_A, r1 ! CS0WCR address -> R1 - mov.l CS0WCR_D, r0 ! CS0WCR data -> R0 - mov.l r0, @r1 ! CS0WCR set + write32 CS0WCR_A, CS0WCR_D - mov.l CS4WCR_A, r1 ! CS4WCR address -> R1 - mov.l CS4WCR_D, r0 ! CS4WCR data -> R0 - mov.l r0, @r1 ! CS4WCR set + write32 CS4WCR_A, CS4WCR_D - mov.l CS5AWCR_A, r1 ! CS5AWCR address -> R1 - mov.l CS5AWCR_D, r0 ! CS5AWCR data -> R0 - mov.l r0, @r1 ! CS5AWCR set + write32 CS5AWCR_A, CS5AWCR_D - mov.l CS5BWCR_A, r1 ! CS5BWCR address -> R1 - mov.l CS5BWCR_D, r0 ! CS5BWCR data -> R0 - mov.l r0, @r1 ! CS5BWCR set + write32 CS5BWCR_A, CS5BWCR_D - mov.l CS6AWCR_A, r1 ! CS6AWCR address -> R1 - mov.l CS6AWCR_D, r0 ! CS6AWCR data -> R0 - mov.l r0, @r1 ! CS6AWCR set + write32 CS6AWCR_A, CS6AWCR_D ! SDRAM initialization - mov.l SDCR_A, r1 ! SB_SDCR address -> R1 - mov.l SDCR_D, r0 ! SB_SDCR data -> R0 - mov.l r0, @r1 ! SB_SDCR set + write32 SDCR_A, SDCR_D - mov.l SDWCR_A, r1 ! SB_SDWCR address -> R1 - mov.l SDWCR_D, r0 ! SB_SDWCR data -> R0 - mov.l r0, @r1 ! SB_SDWCR set + write32 SDWCR_A, SDWCR_D - mov.l SDPCR_A, r1 ! SB_SDPCR address -> R1 - mov.l SDPCR_D, r0 ! SB_SDPCR data -> R0 - mov.l r0, @r1 ! SB_SDPCR set + write32 SDPCR_A, SDPCR_D - mov.l RTCOR_A, r1 ! SB_RTCOR address -> R1 - mov.l RTCOR_D, r0 ! SB_RTCOR data -> R0 - mov.l r0, @r1 ! SB_RTCOR set + write32 RTCOR_A, RTCOR_D - mov.l RTCNT_A, r1 ! SB_RTCNT address -> R1 - mov.l RTCNT_D, r0 ! SB_RTCNT data -> R0 - mov.l r0, @r1 + write32 RTCNT_A, RTCNT_D - mov.l RTCSR_A, r1 ! SB_RTCSR address -> R1 - mov.l RTCSR_D, r0 ! SB_RTCSR data -> R0 - mov.l r0, @r1 ! SB_RTCSR set + write32 RTCSR_A, RTCSR_D - mov.l RFCR_A, r1 ! SB_RFCR address -> R1 - mov.l RFCR_D, r0 ! SB_RFCR data -> R0 - mov.l r0, @r1 + write32 RFCR_A, RFCR_D - mov.l SDMR3_A, r1 ! SDMR3 address -> R1 - mov #0x00, r0 ! SDMR3 data -> R0 - mov.b r0, @r1 ! SDMR3 set + write8 SDMR3_A, #0x00 ! BL bit off (init = ON) (?!?) diff --git a/board/renesas/ap325rxa/lowlevel_init.S b/board/renesas/ap325rxa/lowlevel_init.S index 558e7793e5d..b32f49132d4 100644 --- a/board/renesas/ap325rxa/lowlevel_init.S +++ b/board/renesas/ap325rxa/lowlevel_init.S @@ -23,6 +23,7 @@ #include #include #include +#include /* * Board specific low level init code, called _very_ early in the @@ -38,113 +39,59 @@ .align 2 lowlevel_init: - mov.l DRVCRA_A, r1 - mov.l DRVCRA_D, r0 - mov.w r0, @r1 + write16 DRVCRA_A, DRVCRA_D - mov.l DRVCRB_A, r1 - mov.l DRVCRB_D, r0 - mov.w r0, @r1 + write16 DRVCRB_A, DRVCRB_D - mov.l RWTCSR_A, r1 - mov.l RWTCSR_D1, r0 - mov.w r0, @r1 + write16 RWTCSR_A, RWTCSR_D1 - mov.l RWTCNT_A, r1 - mov.l RWTCNT_D, r0 - mov.w r0, @r1 + write16 RWTCNT_A, RWTCNT_D - mov.l RWTCSR_A, r1 - mov.l RWTCSR_D2, r0 - mov.w r0, @r1 + write16 RWTCSR_A, RWTCSR_D2 - mov.l FRQCR_A, r1 - mov.l FRQCR_D, r0 - mov.l r0, @r1 + write32 FRQCR_A, FRQCR_D - mov.l CMNCR_A, r1 - mov.l CMNCR_D, r0 - mov.l r0, @r1 + write32 CMNCR_A, CMNCR_D - mov.l CS0BCR_A, r1 - mov.l CS0BCR_D, r0 - mov.l r0, @r1 + write32 CS0BCR_A, CS0BCR_D - mov.l CS4BCR_A, r1 - mov.l CS4BCR_D, r0 - mov.l r0, @r1 + write32 CS4BCR_A, CS4BCR_D - mov.l CS5ABCR_A, r1 - mov.l CS5ABCR_D, r0 - mov.l r0, @r1 + write32 CS5ABCR_A, CS5ABCR_D - mov.l CS5BBCR_A, r1 - mov.l CS5BBCR_D, r0 - mov.l r0, @r1 + write32 CS5BBCR_A, CS5BBCR_D - mov.l CS6ABCR_A, r1 - mov.l CS6ABCR_D, r0 - mov.l r0, @r1 + write32 CS6ABCR_A, CS6ABCR_D - mov.l CS6BBCR_A, r1 - mov.l CS6BBCR_D, r0 - mov.l r0, @r1 + write32 CS6BBCR_A, CS6BBCR_D - mov.l CS0WCR_A, r1 - mov.l CS0WCR_D, r0 - mov.l r0, @r1 + write32 CS0WCR_A, CS0WCR_D - mov.l CS4WCR_A, r1 - mov.l CS4WCR_D, r0 - mov.l r0, @r1 + write32 CS4WCR_A, CS4WCR_D - mov.l CS5AWCR_A, r1 - mov.l CS5AWCR_D, r0 - mov.l r0, @r1 + write32 CS5AWCR_A, CS5AWCR_D - mov.l CS5BWCR_A, r1 - mov.l CS5BWCR_D, r0 - mov.l r0, @r1 + write32 CS5BWCR_A, CS5BWCR_D - mov.l CS6AWCR_A, r1 - mov.l CS6AWCR_D, r0 - mov.l r0, @r1 + write32 CS6AWCR_A, CS6AWCR_D - mov.l CS6BWCR_A, r1 - mov.l CS6BWCR_D, r0 - mov.l r0, @r1 + write32 CS6BWCR_A, CS6BWCR_D - mov.l SBSC_SDCR_A, r1 - mov.l SBSC_SDCR_D1, r0 - mov.l r0, @r1 + write32 SBSC_SDCR_A, SBSC_SDCR_D1 - mov.l SBSC_SDWCR_A, r1 - mov.l SBSC_SDWCR_D, r0 - mov.l r0, @r1 + write32 SBSC_SDWCR_A, SBSC_SDWCR_D - mov.l SBSC_SDPCR_A, r1 - mov.l SBSC_SDPCR_D, r0 - mov.l r0, @r1 + write32 SBSC_SDPCR_A, SBSC_SDPCR_D - mov.l SBSC_RTCSR_A, r1 - mov.l SBSC_RTCSR_D, r0 - mov.l r0, @r1 + write32 SBSC_RTCSR_A, SBSC_RTCSR_D - mov.l SBSC_RTCNT_A, r1 - mov.l SBSC_RTCNT_D, r0 - mov.l r0, @r1 + write32 SBSC_RTCNT_A, SBSC_RTCNT_D - mov.l SBSC_RTCOR_A, r1 - mov.l SBSC_RTCOR_D, r0 - mov.l r0, @r1 + write32 SBSC_RTCOR_A, SBSC_RTCOR_D - mov.l SBSC_SDMR3_A1, r1 - mov.l SBSC_SDMR3_D, r0 - mov.b r0, @r1 + write8 SBSC_SDMR3_A1, SBSC_SDMR3_D - mov.l SBSC_SDMR3_A2, r1 - mov.l SBSC_SDMR3_D, r0 - mov.b r0, @r1 + write8 SBSC_SDMR3_A2, SBSC_SDMR3_D mov.l SLEEP_CNT, r1 2: tst r1, r1 @@ -152,17 +99,11 @@ lowlevel_init: bf/s 2b dt r1 - mov.l SBSC_SDMR3_A3, r1 - mov.l SBSC_SDMR3_D, r0 - mov.b r0, @r1 + write8 SBSC_SDMR3_A3, SBSC_SDMR3_D - mov.l SBSC_SDCR_A, r1 - mov.l SBSC_SDCR_D2, r0 - mov.l r0, @r1 + write32 SBSC_SDCR_A, SBSC_SDCR_D2 - mov.l CCR_A, r1 - mov.l CCR_D, r0 - mov.l r0, @r1 + write32 CCR_A, CCR_D ! BL bit off (init = ON) (?!?) diff --git a/board/renesas/r2dplus/lowlevel_init.S b/board/renesas/r2dplus/lowlevel_init.S index a0573708dde..2f6a9b74ad0 100644 --- a/board/renesas/r2dplus/lowlevel_init.S +++ b/board/renesas/r2dplus/lowlevel_init.S @@ -8,6 +8,7 @@ #include #include +#include .global lowlevel_init .text @@ -15,73 +16,39 @@ lowlevel_init: - mov.l CCR_A, r1 - mov.l CCR_D_D, r0 - mov.l r0, @r1 + write32 CCR_A, CCR_D_D - mov.l MMUCR_A, r1 - mov.l MMUCR_D, r0 - mov.l r0, @r1 + write32 MMUCR_A, MMUCR_D - mov.l BCR1_A, r1 - mov.l BCR1_D, r0 - mov.l r0, @r1 + write32 BCR1_A, BCR1_D - mov.l BCR2_A, r1 - mov.l BCR2_D, r0 - mov.w r0, @r1 + write16 BCR2_A, BCR2_D - mov.l BCR3_A, r1 - mov.l BCR3_D, r0 - mov.w r0, @r1 + write16 BCR3_A, BCR3_D - mov.l BCR4_A, r1 - mov.l BCR4_D, r0 - mov.l r0, @r1 + write32 BCR4_A, BCR4_D - mov.l WCR1_A, r1 - mov.l WCR1_D, r0 - mov.l r0, @r1 + write32 WCR1_A, WCR1_D - mov.l WCR2_A, r1 - mov.l WCR2_D, r0 - mov.l r0, @r1 + write32 WCR2_A, WCR2_D - mov.l WCR3_A, r1 - mov.l WCR3_D, r0 - mov.l r0, @r1 + write32 WCR3_A, WCR3_D - mov.l PCR_A, r1 - mov.l PCR_D, r0 - mov.w r0, @r1 + write16 PCR_A, PCR_D - mov.l LED_A, r1 - mov #0xff, r0 - mov.w r0, @r1 + write16 LED_A, #0xff - mov.l MCR_A, r1 - mov.l MCR_D1, r0 - mov.l r0, @r1 + write32 MCR_A, MCR_D1 - mov.l RTCNT_A, r1 - mov.l RTCNT_D, r0 - mov.w r0, @r1 + write16 RTCNT_A, RTCNT_D - mov.l RTCOR_A, r1 - mov.l RTCOR_D, r0 - mov.w r0, @r1 + write16 RTCOR_A, RTCOR_D - mov.l RFCR_A, r1 - mov.l RFCR_D, r0 - mov.w r0, @r1 + write16 RFCR_A, RFCR_D - mov.l RTCSR_A, r1 - mov.l RTCSR_D, r0 - mov.w r0, @r1 + write16 RTCSR_A, RTCSR_D - mov.l SDMR3_A, r1 - mov #0x55, r0 - mov.b r0, @r1 + write8 SDMR3_A, #0x55 /* Wait DRAM refresh 30 times */ mov.l RFCR_A, r1 @@ -92,21 +59,13 @@ lowlevel_init: cmp/hi r3, r2 bf 1b - mov.l MCR_A, r1 - mov.l MCR_D2, r0 - mov.l r0, @r1 + write32 MCR_A, MCR_D2 - mov.l SDMR3_A, r1 - mov #0, r0 - mov.b r0, @r1 + write8 SDMR3_A, #0 - mov.l IRLMASK_A, r1 - mov.l IRLMASK_D, r0 - mov.l r0, @r1 + write32 IRLMASK_A, IRLMASK_D - mov.l CCR_A, r1 - mov.l CCR_D_E, r0 - mov.l r0, @r1 + write32 CCR_A, CCR_D_E rts nop diff --git a/board/renesas/r7780mp/lowlevel_init.S b/board/renesas/r7780mp/lowlevel_init.S index 0df8c841053..bbea6219200 100644 --- a/board/renesas/r7780mp/lowlevel_init.S +++ b/board/renesas/r7780mp/lowlevel_init.S @@ -22,6 +22,7 @@ #include #include #include +#include /* * Board specific low level init code, called _very_ early in the @@ -38,63 +39,36 @@ lowlevel_init: - mov.l CCR_A, r1 /* Address of Cache Control Register */ - mov.l CCR_D, r0 /* Instruction Cache Invalidate */ - mov.l r0, @r1 + write32 CCR_A, CCR_D /* Address of Cache Control Register */ + /* Instruction Cache Invalidate */ - mov.l FRQCR_A, r1 /* Frequency control register */ - mov.l FRQCR_D, r0 - mov.l r0, @r1 + write32 FRQCR_A, FRQCR_D /* Frequency control register */ /* pin_multi_setting */ - mov.l BBG_PMMR_A, r1 - mov.l BBG_PMMR_D_PMSR1, r0 - mov.l r0, @r1 + write32 BBG_PMMR_A, BBG_PMMR_D_PMSR1 - mov.l BBG_PMSR1_A, r1 - mov.l BBG_PMSR1_D, r0 - mov.l r0, @r1 + write32 BBG_PMSR1_A, BBG_PMSR1_D - mov.l BBG_PMMR_A, r1 - mov.l BBG_PMMR_D_PMSR2, r0 - mov.l r0, @r1 + write32 BBG_PMMR_A, BBG_PMMR_D_PMSR2 - mov.l BBG_PMSR2_A, r1 - mov.l BBG_PMSR2_D, r0 - mov.l r0, @r1 + write32 BBG_PMSR2_A, BBG_PMSR2_D - mov.l BBG_PMMR_A, r1 - mov.l BBG_PMMR_D_PMSR3, r0 - mov.l r0, @r1 + write32 BBG_PMMR_A, BBG_PMMR_D_PMSR3 - mov.l BBG_PMSR3_A, r1 - mov.l BBG_PMSR3_D, r0 - mov.l r0, @r1 + write32 BBG_PMSR3_A, BBG_PMSR3_D - mov.l BBG_PMMR_A, r1 - mov.l BBG_PMMR_D_PMSR4, r0 - mov.l r0, @r1 + write32 BBG_PMMR_A, BBG_PMMR_D_PMSR4 - mov.l BBG_PMSR4_A, r1 - mov.l BBG_PMSR4_D, r0 - mov.l r0, @r1 + write32 BBG_PMSR4_A, BBG_PMSR4_D - mov.l BBG_PMMR_A, r1 - mov.l BBG_PMMR_D_PMSRG, r0 - mov.l r0, @r1 + write32 BBG_PMMR_A, BBG_PMMR_D_PMSRG - mov.l BBG_PMSRG_A, r1 - mov.l BBG_PMSRG_D, r0 - mov.l r0, @r1 + write32 BBG_PMSRG_A, BBG_PMSRG_D /* cpg_setting */ - mov.l FRQCR_A, r1 - mov.l FRQCR_D, r0 - mov.l r0, @r1 + write32 FRQCR_A, FRQCR_D - mov.l DLLCSR_A, r1 - mov.l DLLCSR_D, r0 - mov.l r0, @r1 + write32 DLLCSR_A, DLLCSR_D nop nop @@ -117,69 +91,37 @@ repeat0: nop /* bsc_setting */ - mov.l MMSELR_A, r1 - mov.l MMSELR_D, r0 - mov.l r0, @r1 + write32 MMSELR_A, MMSELR_D - mov.l BCR_A, r1 - mov.l BCR_D, r0 - mov.l r0, @r1 + write32 BCR_A, BCR_D - mov.l CS0BCR_A, r1 - mov.l CS0BCR_D, r0 - mov.l r0, @r1 + write32 CS0BCR_A, CS0BCR_D - mov.l CS1BCR_A, r1 - mov.l CS1BCR_D, r0 - mov.l r0, @r1 + write32 CS1BCR_A, CS1BCR_D - mov.l CS2BCR_A, r1 - mov.l CS2BCR_D, r0 - mov.l r0, @r1 + write32 CS2BCR_A, CS2BCR_D - mov.l CS4BCR_A, r1 - mov.l CS4BCR_D, r0 - mov.l r0, @r1 + write32 CS4BCR_A, CS4BCR_D - mov.l CS5BCR_A, r1 - mov.l CS5BCR_D, r0 - mov.l r0, @r1 + write32 CS5BCR_A, CS5BCR_D - mov.l CS6BCR_A, r1 - mov.l CS6BCR_D, r0 - mov.l r0, @r1 + write32 CS6BCR_A, CS6BCR_D - mov.l CS0WCR_A, r1 - mov.l CS0WCR_D, r0 - mov.l r0, @r1 + write32 CS0WCR_A, CS0WCR_D - mov.l CS1WCR_A, r1 - mov.l CS1WCR_D, r0 - mov.l r0, @r1 + write32 CS1WCR_A, CS1WCR_D - mov.l CS2WCR_A, r1 - mov.l CS2WCR_D, r0 - mov.l r0, @r1 + write32 CS2WCR_A, CS2WCR_D - mov.l CS4WCR_A, r1 - mov.l CS4WCR_D, r0 - mov.l r0, @r1 + write32 CS4WCR_A, CS4WCR_D - mov.l CS5WCR_A, r1 - mov.l CS5WCR_D, r0 - mov.l r0, @r1 + write32 CS5WCR_A, CS5WCR_D - mov.l CS6WCR_A, r1 - mov.l CS6WCR_D, r0 - mov.l r0, @r1 + write32 CS6WCR_A, CS6WCR_D - mov.l CS5PCR_A, r1 - mov.l CS5PCR_D, r0 - mov.l r0, @r1 + write32 CS5PCR_A, CS5PCR_D - mov.l CS6PCR_A, r1 - mov.l CS6PCR_D, r0 - mov.l r0, @r1 + write32 CS6PCR_A, CS6PCR_D /* ddr_setting */ /* wait 200us */ diff --git a/board/renesas/rsk7203/lowlevel_init.S b/board/renesas/rsk7203/lowlevel_init.S index f6a62311de1..7b9ecd89c31 100644 --- a/board/renesas/rsk7203/lowlevel_init.S +++ b/board/renesas/rsk7203/lowlevel_init.S @@ -21,6 +21,7 @@ #include #include +#include .global lowlevel_init @@ -29,140 +30,76 @@ lowlevel_init: /* Cache setting */ - mov.l CCR1_A, r1 - mov.l CCR1_D, r0 - mov.l r0, @r1 + write32 CCR1_A ,CCR1_D /* ConfigurePortPins */ - mov.l PECRL3_A, r1 - mov.l PECRL3_D, r0 - mov.w r0, @r1 + write16 PECRL3_A, PECRL3_D - mov.l PCCRL4_A, r1 - mov.l PCCRL4_D0, r0 - mov.w r0, @r1 + write16 PCCRL4_A, PCCRL4_D0 - mov.l PECRL4_A, r1 - mov.l PECRL4_D0, r0 - mov.w r0, @r1 + write16 PECRL4_A, PECRL4_D0 - mov.l PEIORL_A, r1 - mov.l PEIORL_D0, r0 - mov.w r0, @r1 + write16 PEIORL_A, PEIORL_D0 - mov.l PCIORL_A, r1 - mov.l PCIORL_D, r0 - mov.w r0, @r1 + write16 PCIORL_A, PCIORL_D - mov.l PFCRH2_A, r1 - mov.l PFCRH2_D, r0 - mov.w r0, @r1 + write16 PFCRH2_A, PFCRH2_D - mov.l PFCRH3_A, r1 - mov.l PFCRH3_D, r0 - mov.w r0, @r1 + write16 PFCRH3_A, PFCRH3_D - mov.l PFCRH1_A, r1 - mov.l PFCRH1_D, r0 - mov.w r0, @r1 + write16 PFCRH1_A, PFCRH1_D - mov.l PFIORH_A, r1 - mov.l PFIORH_D, r0 - mov.w r0, @r1 + write16 PFIORH_A, PFIORH_D - mov.l PECRL1_A, r1 - mov.l PECRL1_D0, r0 - mov.w r0, @r1 + write16 PECRL1_A, PECRL1_D0 - mov.l PEIORL_A, r1 - mov.l PEIORL_D1, r0 - mov.w r0, @r1 + write16 PEIORL_A, PEIORL_D1 /* Configure Operating Frequency */ - mov.l WTCSR_A, r1 - mov.l WTCSR_D0, r0 - mov.w r0, @r1 + write16 WTCSR_A, WTCSR_D0 - mov.l WTCSR_A, r1 - mov.l WTCSR_D1, r0 - mov.w r0, @r1 + write16 WTCSR_A, WTCSR_D1 - mov.l WTCNT_A, r1 - mov.l WTCNT_D, r0 - mov.w r0, @r1 + write16 WTCNT_A, WTCNT_D /* Set clock mode*/ - mov.l FRQCR_A, r1 - mov.l FRQCR_D, r0 - mov.w r0, @r1 + write16 FRQCR_A, FRQCR_D /* Configure Bus And Memory */ init_bsc_cs0: - mov.l PCCRL4_A, r1 - mov.l PCCRL4_D1, r0 - mov.w r0, @r1 + write16 PCCRL4_A, PCCRL4_D1 - mov.l PECRL1_A, r1 - mov.l PECRL1_D1, r0 - mov.w r0, @r1 + write16 PECRL1_A, PECRL1_D1 - mov.l CMNCR_A, r1 - mov.l CMNCR_D, r0 - mov.l r0, @r1 + write32 CMNCR_A, CMNCR_D - mov.l SC0BCR_A, r1 - mov.l SC0BCR_D, r0 - mov.l r0, @r1 + write32 SC0BCR_A, SC0BCR_D - mov.l CS0WCR_A, r1 - mov.l CS0WCR_D, r0 - mov.l r0, @r1 + write32 CS0WCR_A, CS0WCR_D init_bsc_cs1: - mov.l PECRL4_A, r1 - mov.l PECRL4_D1, r0 - mov.w r0, @r1 + write16 PECRL4_A, PECRL4_D1 - mov.l CS1WCR_A, r1 - mov.l CS1WCR_D, r0 - mov.l r0, @r1 + write32 CS1WCR_A, CS1WCR_D init_sdram: - mov.l PCCRL2_A, r1 - mov.l PCCRL2_D, r0 - mov.w r0, @r1 + write16 PCCRL2_A, PCCRL2_D - mov.l PCCRL4_A, r1 - mov.l PCCRL4_D2, r0 - mov.w r0, @r1 + write16 PCCRL4_A, PCCRL4_D2 - mov.l PCCRL1_A, r1 - mov.l PCCRL1_D, r0 - mov.w r0, @r1 + write16 PCCRL1_A, PCCRL1_D - mov.l PCCRL3_A, r1 - mov.l PCCRL3_D, r0 - mov.w r0, @r1 + write16 PCCRL3_A, PCCRL3_D - mov.l CS3BCR_A, r1 - mov.l CS3BCR_D, r0 - mov.l r0, @r1 + write32 CS3BCR_A, CS3BCR_D - mov.l CS3WCR_A, r1 - mov.l CS3WCR_D, r0 - mov.l r0, @r1 + write32 CS3WCR_A, CS3WCR_D - mov.l SDCR_A, r1 - mov.l SDCR_D, r0 - mov.l r0, @r1 + write32 SDCR_A, SDCR_D - mov.l RTCOR_A, r1 - mov.l RTCOR_D, r0 - mov.l r0, @r1 + write32 RTCOR_A, RTCOR_D - mov.l RTCSR_A, r1 - mov.l RTCSR_D, r0 - mov.l r0, @r1 + write32 RTCSR_A, RTCSR_D /* wait 200us */ mov.l REPEAT_D, r3 diff --git a/board/renesas/sh7763rdp/lowlevel_init.S b/board/renesas/sh7763rdp/lowlevel_init.S index 715e75fe6af..3747bf6f898 100644 --- a/board/renesas/sh7763rdp/lowlevel_init.S +++ b/board/renesas/sh7763rdp/lowlevel_init.S @@ -25,6 +25,7 @@ #include #include +#include .global lowlevel_init @@ -33,44 +34,33 @@ lowlevel_init: - mov.l WDTCSR_A, r1 /* Watchdog Control / Status Register */ - mov.l WDTCSR_D, r0 - mov.l r0, @r1 + write32 WDTCSR_A, WDTCSR_D /* Watchdog Control / Status Register */ - mov.l WDTST_A, r1 /* Watchdog Stop Time Register */ - mov.l WDTST_D, r0 - mov.l r0, @r1 + write32 WDTST_A, WDTST_D /* Watchdog Stop Time Register */ - mov.l WDTBST_A, r1 /* 0xFFCC0008 (Watchdog Base Stop Time Register */ - mov.l WDTBST_D, r0 - mov.l r0, @r1 + write32 WDTBST_A, WDTBST_D /* + * 0xFFCC0008 + * Watchdog Base Stop Time Register + */ - mov.l CCR_A, r1 /* Address of Cache Control Register */ - mov.l CCR_CACHE_ICI_D, r0 /* Instruction Cache Invalidate */ - mov.l r0, @r1 + write32 CCR_A, CCR_CACHE_ICI_D /* Address of Cache Control Register */ + /* Instruction Cache Invalidate */ - mov.l MMUCR_A, r1 /* Address of MMU Control Register */ - mov.l MMU_CONTROL_TI_D, r0 /* TI == TLB Invalidate bit */ - mov.l r0, @r1 + write32 MMUCR_A, MMU_CONTROL_TI_D /* MMU Control Register */ + /* TI == TLB Invalidate bit */ - mov.l MSTPCR0_A, r1 /* Address of Power Control Register 0 */ - mov.l MSTPCR0_D, r0 - mov.l r0, @r1 + write32 MSTPCR0_A, MSTPCR0_D /* Address of Power Control Register 0 */ - mov.l MSTPCR1_A, r1 /*i Address of Power Control Register 1 */ - mov.l MSTPCR1_D, r0 - mov.l r0, @r1 + write32 MSTPCR1_A, MSTPCR1_D /* Address of Power Control Register 1 */ - mov.l RAMCR_A, r1 - mov.l RAMCR_D, r0 - mov.l r0, @r1 + write32 RAMCR_A, RAMCR_D mov.l MMSELR_A, r1 mov.l MMSELR_D, r0 synco mov.l r0, @r1 - mov.l @r1, r2 /* execute two reads after setting MMSELR*/ + mov.l @r1, r2 /* execute two reads after setting MMSELR */ mov.l @r1, r2 synco @@ -79,75 +69,47 @@ lowlevel_init: mov.l @r1, r0 synco - mov.l MIM8_A, r1 - mov.l MIM8_D, r0 - mov.l r0, @r1 + write32 MIM8_A, MIM8_D - mov.l MIMC_A, r1 - mov.l MIMC_D1, r0 - mov.l r0, @r1 + write32 MIMC_A, MIMC_D1 - mov.l STRC_A, r1 - mov.l STRC_D, r0 - mov.l r0, @r1 + write32 STRC_A, STRC_D - mov.l SDR4_A, r1 - mov.l SDR4_D, r0 - mov.l r0, @r1 + write32 SDR4_A, SDR4_D - mov.l MIMC_A, r1 - mov.l MIMC_D2, r0 - mov.l r0, @r1 + write32 MIMC_A, MIMC_D2 nop nop nop - mov.l SCR4_A, r1 - mov.l SCR4_D3, r0 - mov.l r0, @r1 + write32 SCR4_A, SCR4_D3 - mov.l SCR4_A, r1 - mov.l SCR4_D2, r0 - mov.l r0, @r1 + write32 SCR4_A, SCR4_D2 - mov.l SDMR02000_A, r1 - mov.l SDMR02000_D, r0 - mov.l r0, @r1 + write32 SDMR02000_A, SDMR02000_D - mov.l SDMR00B08_A, r1 - mov.l SDMR00B08_D, r0 - mov.l r0, @r1 + write32 SDMR00B08_A, SDMR00B08_D - mov.l SCR4_A, r1 - mov.l SCR4_D2, r0 - mov.l r0, @r1 + write32 SCR4_A, SCR4_D2 - mov.l SCR4_A, r1 - mov.l SCR4_D4, r0 - mov.l r0, @r1 + write32 SCR4_A, SCR4_D4 nop nop nop nop - mov.l SCR4_A, r1 - mov.l SCR4_D4, r0 - mov.l r0, @r1 + write32 SCR4_A, SCR4_D4 nop nop nop nop - mov.l SDMR00308_A, r1 - mov.l SDMR00308_D, r0 - mov.l r0, @r1 + write32 SDMR00308_A, SDMR00308_D - mov.l MIMC_A, r1 - mov.l MIMC_D3, r0 - mov.l r0, @r1 + write32 MIMC_A, MIMC_D3 mov.l SCR4_A, r1 mov.l SCR4_D1, r0 @@ -159,70 +121,38 @@ delay_loop_60: bf delay_loop_60 nop - mov.l CCR_A, r1 /* Address of Cache Control Register */ - mov.l CCR_CACHE_D_2, r0 - mov.l r0, @r1 + write32 CCR_A, CCR_CACHE_D_2 /* Address of Cache Control Register */ bsc_init: - mov.l BCR_A, r1 - mov.l BCR_D, r0 - mov.l r0, @r1 + write32 BCR_A, BCR_D - mov.l CS0BCR_A, r1 - mov.l CS0BCR_D, r0 - mov.l r0, @r1 + write32 CS0BCR_A, CS0BCR_D - mov.l CS1BCR_A, r1 - mov.l CS1BCR_D, r0 - mov.l r0, @r1 + write32 CS1BCR_A, CS1BCR_D - mov.l CS2BCR_A, r1 - mov.l CS2BCR_D, r0 - mov.l r0, @r1 + write32 CS2BCR_A, CS2BCR_D - mov.l CS4BCR_A, r1 - mov.l CS4BCR_D, r0 - mov.l r0, @r1 + write32 CS4BCR_A, CS4BCR_D - mov.l CS5BCR_A, r1 - mov.l CS5BCR_D, r0 - mov.l r0, @r1 + write32 CS5BCR_A, CS5BCR_D - mov.l CS6BCR_A, r1 - mov.l CS6BCR_D, r0 - mov.l r0, @r1 + write32 CS6BCR_A, CS6BCR_D - mov.l CS0WCR_A, r1 - mov.l CS0WCR_D, r0 - mov.l r0, @r1 + write32 CS0WCR_A, CS0WCR_D - mov.l CS1WCR_A, r1 - mov.l CS1WCR_D, r0 - mov.l r0, @r1 + write32 CS1WCR_A, CS1WCR_D - mov.l CS2WCR_A, r1 - mov.l CS2WCR_D, r0 - mov.l r0, @r1 + write32 CS2WCR_A, CS2WCR_D - mov.l CS4WCR_A, r1 - mov.l CS4WCR_D, r0 - mov.l r0, @r1 + write32 CS4WCR_A, CS4WCR_D - mov.l CS5WCR_A, r1 - mov.l CS5WCR_D, r0 - mov.l r0, @r1 + write32 CS5WCR_A, CS5WCR_D - mov.l CS6WCR_A, r1 - mov.l CS6WCR_D, r0 - mov.l r0, @r1 + write32 CS6WCR_A, CS6WCR_D - mov.l CS5PCR_A, r1 - mov.l CS5PCR_D, r0 - mov.l r0, @r1 + write32 CS5PCR_A, CS5PCR_D - mov.l CS6PCR_A, r1 - mov.l CS6PCR_D, r0 - mov.l r0, @r1 + write32 CS6PCR_A, CS6PCR_D mov.l DELAY200_D, r3 @@ -231,17 +161,11 @@ delay_loop_200: bf delay_loop_200 nop - mov.l PSEL0_A, r1 - mov.l PSEL0_D, r0 - mov.w r0, @r1 + write16 PSEL0_A, PSEL0_D - mov.l PSEL1_A, r1 - mov.l PSEL1_D, r0 - mov.w r0, @r1 + write16 PSEL1_A, PSEL1_D - mov.l ICR0_A, r1 - mov.l ICR0_D, r0 - mov.l r0, @r1 + write32 ICR0_A, ICR0_D stc sr, r0 /* BL bit off(init=ON) */ mov.l SR_MASK_D, r1 diff --git a/board/renesas/sh7785lcr/lowlevel_init.S b/board/renesas/sh7785lcr/lowlevel_init.S index 4cb1d9d6789..f5ebeb9a7d8 100644 --- a/board/renesas/sh7785lcr/lowlevel_init.S +++ b/board/renesas/sh7785lcr/lowlevel_init.S @@ -19,33 +19,7 @@ #include #include #include - -.macro write32, addr, data - mov.l \addr ,r1 - mov.l \data ,r0 - mov.l r0, @r1 -.endm - -.macro write16, addr, data - mov.l \addr ,r1 - mov.l \data ,r0 - mov.w r0, @r1 -.endm - -.macro write8, addr, data - mov.l \addr ,r1 - mov.l \data ,r0 - mov.b r0, @r1 -.endm - -.macro wait_timer, time - mov.l \time ,r3 -1: - nop - tst r3, r3 - bf/s 1b - dt r3 -.endm +#include #include diff --git a/include/asm-sh/macro.h b/include/asm-sh/macro.h new file mode 100644 index 00000000000..61f792a044d --- /dev/null +++ b/include/asm-sh/macro.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2008 Yoshihiro Shimoda + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MACRO_H__ +#define __MACRO_H__ +#ifdef __ASSEMBLY__ + +.macro write32, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.l r0, @r1 +.endm + +.macro write16, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.w r0, @r1 +.endm + +.macro write8, addr, data + mov.l \addr ,r1 + mov.l \data ,r0 + mov.b r0, @r1 +.endm + +.macro wait_timer, time + mov.l \time ,r3 +1: + nop + tst r3, r3 + bf/s 1b + dt r3 +.endm + +#endif /* __ASSEMBLY__ */ +#endif /* __MACRO_H__ */ -- cgit v1.3.1