From c0cdd5adc81d4b5cd0c870fe58c863ab37fd7f89 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Tue, 12 Dec 2017 09:49:44 +0100 Subject: board: stm32: add stm32f469-discovery board support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This board offers : _ STM32F469NIH6 microcontroller featuring 2 Mbytes of Flash memory and 324 Kbytes of RAM in BGA216 package _ On-board ST-LINK/V2-1 SWD debugger, supporting USB reenumeration capability: _ Mbed-enabled (mbed.org) _ USB functions: USB virtual COM port, mass storage, debug port _ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive touch screen _ SAI Audio DAC, with a stereo headphone output jack _ 3 MEMS microphones _ MicroSD card connector _ I2C extension connector _ 4Mx32bit SDRAM _ 128-Mbit Quad-SPI NOR Flash _ Reset and wake-up buttons _ 4 color user LEDs _ USB OTG FS with Micro-AB connector _ Three power supply options: _ Expansion connectors and Arduino™ UNO V3 connectors Signed-off-by: Patrice Chotard --- include/configs/stm32f469-discovery.h | 68 +++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 include/configs/stm32f469-discovery.h (limited to 'include') diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h new file mode 100644 index 00000000000..140999994b1 --- /dev/null +++ b/include/configs/stm32f469-discovery.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) STMicroelectronics SA 2017 + * Author(s): Patrice CHOTARD, for STMicroelectronics. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_STM32F4DISCOVERY + +#define CONFIG_MISC_INIT_R + +#define CONFIG_SYS_FLASH_BASE 0x08000000 + +#define CONFIG_SYS_INIT_SP_ADDR 0x10010000 +#define CONFIG_SYS_TEXT_BASE 0x08000000 + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF + +/* + * Configuration of the external SDRAM memory + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_RAM_FREQ_DIV 2 +#define CONFIG_SYS_RAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE +#define CONFIG_SYS_LOAD_ADDR 0x00400000 +#define CONFIG_LOADADDR 0x00400000 + +#define CONFIG_SYS_MAX_FLASH_SECT 12 +#define CONFIG_SYS_MAX_FLASH_BANKS 2 + +#define CONFIG_ENV_OFFSET (256 << 10) +#define CONFIG_ENV_SECT_SIZE (128 << 10) +#define CONFIG_ENV_SIZE (8 << 10) + +#define CONFIG_STM32_FLASH + +#define CONFIG_STM32_HSE_HZ 8000000 +#define CONFIG_SYS_CLK_FREQ 180000000 /* 180 MHz */ +#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_CBSIZE 1024 + +#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) + +#define CONFIG_BOOTCOMMAND \ + "run boot_sd" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "boot_sd=mmc dev 0;fatload mmc 0 0x00700000 stm32f469-disco.dtb; fatload mmc 0 0x00008000 zImage; icache off; bootz 0x00008000 - 0x00700000" + +/* + * Command line configuration. + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING + +#endif /* __CONFIG_H */ -- cgit v1.3.1