From c2db55499a5d460f33d649728853ca3b69d0c754 Mon Sep 17 00:00:00 2001 From: Prasad Kummari Date: Thu, 27 Mar 2025 16:21:58 +0530 Subject: arm64: versal-net: Add PL bit stream load support Add support for loading the secure & non-secure pdi images and PL bitstream on the Versal NET platform. The FPGA driver is enabled to load the bitstream in PDI format on the AMD Versal NET device. PDI is the new programmable device image format for Versal NET, and the bitstream for the Versal NET platform is generated exclusively in this format. The source code for the versalnet loadpdi command and the CONFIG_CMD_VERSAL_NET configuration has been removed. It now utilizes the fpga load
command to load secure & non-secure pdi images. Signed-off-by: Prasad Kummari Link: https://lore.kernel.org/r/20250327105200.1262615-2-prasad.kummari@amd.com Signed-off-by: Michal Simek --- include/xilinx.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/xilinx.h b/include/xilinx.h index e4e29797988..2b4d6c9bb06 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -34,6 +34,7 @@ typedef enum { /* typedef xilinx_family */ xilinx_zynq, /* Zynq Family */ xilinx_zynqmp, /* ZynqMP Family */ xilinx_versal, /* Versal Family */ + xilinx_versal_net, /* Versal NET Family */ max_xilinx_type /* insert all new types before this */ } xilinx_family; /* end, typedef xilinx_family */ -- cgit v1.2.3