From bd22849d0b2178af75e305d2eb516eee1499eb00 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:10:49 -0600 Subject: init.h: Add "struct cmd_tbl" In order to avoid needing to add to this file, add "struct cmd_tbl" before the prototype for do_bdinfo(). Signed-off-by: Tom Rini --- include/init.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/init.h b/include/init.h index 630d86729c4..2c10171359c 100644 --- a/include/init.h +++ b/include/init.h @@ -401,6 +401,8 @@ void bdinfo_print_size(const char *name, uint64_t size); /* Show arch-specific information for the 'bd' command */ void arch_print_bdinfo(void); +struct cmd_tbl; + int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); #endif /* __ASSEMBLY__ */ -- cgit v1.3.1 From 6fa4850c95c731cc53550da9233c7144a8fdb7c5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:10:50 -0600 Subject: pci.h: Add missing This file has many "Linux" style types in it, add Signed-off-by: Tom Rini --- include/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/pci.h b/include/pci.h index aad233769a3..ea3b73923d6 100644 --- a/include/pci.h +++ b/include/pci.h @@ -520,6 +520,7 @@ #ifndef __ASSEMBLY__ +#include #include #ifdef CONFIG_SYS_PCI_64BIT -- cgit v1.3.1 From fcdcfc90f151d3ca6b154dc61cf3a37123d679d0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:10:51 -0600 Subject: mpc85xx.h: Use directly To ensure that board config headers which set values here in the CFG_SYS range are used, this header needs to include directly. Signed-off-by: Tom Rini --- include/mpc85xx.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/mpc85xx.h b/include/mpc85xx.h index 636734dd3c6..ff86c7c12e0 100644 --- a/include/mpc85xx.h +++ b/include/mpc85xx.h @@ -6,6 +6,7 @@ #ifndef __MPC85xx_H__ #define __MPC85xx_H__ +#include #if defined(CONFIG_E500) #include #endif -- cgit v1.3.1 From e51478ba42687234c1b13720be8a6573cb17624e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:10:56 -0600 Subject: x86: Remove and add needed includes Remove from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini --- arch/x86/cpu/acpi_gpe.c | 2 +- arch/x86/cpu/apollolake/acpi.c | 1 - arch/x86/cpu/apollolake/cpu.c | 1 - arch/x86/cpu/apollolake/cpu_common.c | 1 - arch/x86/cpu/apollolake/cpu_spl.c | 1 - arch/x86/cpu/apollolake/fsp_bindings.c | 1 - arch/x86/cpu/apollolake/fsp_m.c | 1 - arch/x86/cpu/apollolake/fsp_s.c | 1 - arch/x86/cpu/apollolake/hostbridge.c | 1 - arch/x86/cpu/apollolake/lpc.c | 1 - arch/x86/cpu/apollolake/pch.c | 1 - arch/x86/cpu/apollolake/pmc.c | 1 - arch/x86/cpu/apollolake/punit.c | 2 +- arch/x86/cpu/apollolake/spl.c | 1 - arch/x86/cpu/apollolake/systemagent.c | 1 - arch/x86/cpu/apollolake/uart.c | 1 - arch/x86/cpu/baytrail/acpi.c | 1 - arch/x86/cpu/baytrail/cpu.c | 1 - arch/x86/cpu/baytrail/early_uart.c | 1 - arch/x86/cpu/baytrail/fsp_configs.c | 1 - arch/x86/cpu/baytrail/valleyview.c | 2 +- arch/x86/cpu/braswell/braswell.c | 2 +- arch/x86/cpu/braswell/early_uart.c | 1 - arch/x86/cpu/braswell/fsp_configs.c | 1 - arch/x86/cpu/broadwell/adsp.c | 1 - arch/x86/cpu/broadwell/cpu.c | 1 - arch/x86/cpu/broadwell/cpu_from_spl.c | 2 +- arch/x86/cpu/broadwell/cpu_full.c | 1 - arch/x86/cpu/broadwell/iobp.c | 1 - arch/x86/cpu/broadwell/lpc.c | 1 - arch/x86/cpu/broadwell/me.c | 1 - arch/x86/cpu/broadwell/northbridge.c | 1 - arch/x86/cpu/broadwell/pch.c | 1 - arch/x86/cpu/broadwell/pinctrl_broadwell.c | 1 - arch/x86/cpu/broadwell/power_state.c | 1 - arch/x86/cpu/broadwell/refcode.c | 2 +- arch/x86/cpu/broadwell/sata.c | 1 - arch/x86/cpu/broadwell/sdram.c | 1 - arch/x86/cpu/coreboot/coreboot.c | 1 - arch/x86/cpu/coreboot/coreboot_spl.c | 1 - arch/x86/cpu/coreboot/sdram.c | 2 +- arch/x86/cpu/coreboot/timestamp.c | 2 +- arch/x86/cpu/cpu.c | 1 - arch/x86/cpu/cpu_x86.c | 1 - arch/x86/cpu/efi/app.c | 2 +- arch/x86/cpu/efi/payload.c | 3 ++- arch/x86/cpu/efi/sdram.c | 2 +- arch/x86/cpu/i386/cpu.c | 2 +- arch/x86/cpu/i386/interrupt.c | 1 - arch/x86/cpu/intel_common/acpi.c | 1 - arch/x86/cpu/intel_common/car.S | 1 - arch/x86/cpu/intel_common/cpu.c | 1 - arch/x86/cpu/intel_common/cpu_from_spl.c | 1 - arch/x86/cpu/intel_common/fast_spi.c | 1 - arch/x86/cpu/intel_common/generic_wifi.c | 1 - arch/x86/cpu/intel_common/intel_opregion.c | 1 - arch/x86/cpu/intel_common/itss.c | 1 - arch/x86/cpu/intel_common/lpc.c | 1 - arch/x86/cpu/intel_common/lpss.c | 1 - arch/x86/cpu/intel_common/me_status.c | 1 - arch/x86/cpu/intel_common/microcode.c | 1 - arch/x86/cpu/intel_common/mrc.c | 4 ++-- arch/x86/cpu/intel_common/p2sb.c | 1 - arch/x86/cpu/intel_common/pch.c | 1 - arch/x86/cpu/intel_common/report_platform.c | 2 +- arch/x86/cpu/ioapic.c | 1 - arch/x86/cpu/irq.c | 1 - arch/x86/cpu/ivybridge/bd82x6x.c | 1 - arch/x86/cpu/ivybridge/cpu.c | 1 - arch/x86/cpu/ivybridge/early_me.c | 1 - arch/x86/cpu/ivybridge/fsp_configs.c | 1 - arch/x86/cpu/ivybridge/ivybridge.c | 2 +- arch/x86/cpu/ivybridge/lpc.c | 1 - arch/x86/cpu/ivybridge/model_206ax.c | 1 - arch/x86/cpu/ivybridge/northbridge.c | 1 - arch/x86/cpu/ivybridge/sata.c | 1 - arch/x86/cpu/ivybridge/sdram.c | 1 - arch/x86/cpu/ivybridge/sdram_nop.c | 2 +- arch/x86/cpu/lapic.c | 1 - arch/x86/cpu/mp_init.c | 2 +- arch/x86/cpu/mtrr.c | 1 - arch/x86/cpu/pci.c | 1 - arch/x86/cpu/qemu/cpu.c | 1 - arch/x86/cpu/qemu/dram.c | 2 +- arch/x86/cpu/qemu/e820.c | 1 - arch/x86/cpu/qemu/qemu.c | 2 +- arch/x86/cpu/qfw_cpu.c | 1 - arch/x86/cpu/quark/acpi.c | 2 +- arch/x86/cpu/quark/dram.c | 2 +- arch/x86/cpu/quark/hte.c | 1 - arch/x86/cpu/quark/mrc.c | 2 +- arch/x86/cpu/quark/mrc_util.c | 2 +- arch/x86/cpu/quark/msg_port.c | 1 - arch/x86/cpu/quark/quark.c | 2 +- arch/x86/cpu/quark/smc.c | 3 ++- arch/x86/cpu/queensbay/fsp_configs.c | 1 - arch/x86/cpu/queensbay/tnc.c | 1 - arch/x86/cpu/slimbootloader/sdram.c | 1 - arch/x86/cpu/slimbootloader/serial.c | 1 - arch/x86/cpu/slimbootloader/slimbootloader.c | 1 - arch/x86/cpu/tangier/acpi.c | 1 - arch/x86/cpu/tangier/pinmux.c | 1 - arch/x86/cpu/tangier/sdram.c | 2 +- arch/x86/cpu/tangier/sysreset.c | 1 - arch/x86/cpu/tangier/tangier.c | 1 - arch/x86/cpu/turbo.c | 1 - arch/x86/cpu/x86_64/cpu.c | 1 - arch/x86/cpu/x86_64/interrupts.c | 1 - arch/x86/cpu/x86_64/misc.c | 1 - arch/x86/include/asm/arch-quark/mrc.h | 2 ++ arch/x86/include/asm/arch-quark/msg_port.h | 2 ++ arch/x86/include/asm/arch-quark/quark.h | 2 ++ arch/x86/include/asm/cb_sysinfo.h | 1 + arch/x86/include/asm/coreboot_tables.h | 2 ++ arch/x86/include/asm/early_cmos.h | 2 ++ arch/x86/include/asm/handoff.h | 2 ++ arch/x86/include/asm/me_common.h | 1 + arch/x86/include/asm/mp.h | 1 + arch/x86/lib/acpi.c | 1 - arch/x86/lib/acpi_nhlt.c | 1 - arch/x86/lib/acpi_s3.c | 1 - arch/x86/lib/acpi_table.c | 1 - arch/x86/lib/acpigen.c | 1 - arch/x86/lib/asm-offsets.c | 1 - arch/x86/lib/bdinfo.c | 1 - arch/x86/lib/bios.c | 1 - arch/x86/lib/bios_interrupts.c | 1 - arch/x86/lib/bootm.c | 1 - arch/x86/lib/cmd_boot.c | 1 - arch/x86/lib/coreboot/cb_support.c | 2 +- arch/x86/lib/coreboot/cb_sysinfo.c | 2 +- arch/x86/lib/coreboot_table.c | 1 - arch/x86/lib/div64.c | 2 +- arch/x86/lib/e820.c | 1 - arch/x86/lib/early_cmos.c | 1 - arch/x86/lib/fsp/fsp_common.c | 1 - arch/x86/lib/fsp/fsp_dram.c | 1 - arch/x86/lib/fsp/fsp_graphics.c | 1 - arch/x86/lib/fsp/fsp_support.c | 1 - arch/x86/lib/fsp1/fsp_common.c | 1 - arch/x86/lib/fsp1/fsp_dram.c | 1 - arch/x86/lib/fsp1/fsp_support.c | 1 - arch/x86/lib/fsp2/fsp_common.c | 1 - arch/x86/lib/fsp2/fsp_dram.c | 1 - arch/x86/lib/fsp2/fsp_init.c | 1 - arch/x86/lib/fsp2/fsp_meminit.c | 1 - arch/x86/lib/fsp2/fsp_silicon_init.c | 1 - arch/x86/lib/fsp2/fsp_support.c | 1 - arch/x86/lib/hob.c | 1 - arch/x86/lib/i8254.c | 2 +- arch/x86/lib/i8259.c | 1 - arch/x86/lib/init_helpers.c | 2 +- arch/x86/lib/interrupts.c | 1 - arch/x86/lib/lpc-uclass.c | 1 - arch/x86/lib/mpspec.c | 1 - arch/x86/lib/mrccache.c | 1 - arch/x86/lib/northbridge-uclass.c | 1 - arch/x86/lib/physmem.c | 1 - arch/x86/lib/pinctrl_ich6.c | 1 - arch/x86/lib/pirq_routing.c | 1 - arch/x86/lib/pmu.c | 1 - arch/x86/lib/ramtest.c | 2 +- arch/x86/lib/reloc_ia32_efi.c | 1 - arch/x86/lib/reloc_x86_64_efi.c | 1 - arch/x86/lib/relocate.c | 1 - arch/x86/lib/scu.c | 1 - arch/x86/lib/sfi.c | 1 - arch/x86/lib/spl.c | 2 +- arch/x86/lib/tables.c | 1 - arch/x86/lib/tpl.c | 1 - arch/x86/lib/zimage.c | 1 - include/acpi/acpi_s3.h | 3 +++ 172 files changed, 54 insertions(+), 163 deletions(-) (limited to 'include') diff --git a/arch/x86/cpu/acpi_gpe.c b/arch/x86/cpu/acpi_gpe.c index da01e71335f..13fe695014b 100644 --- a/arch/x86/cpu/acpi_gpe.c +++ b/arch/x86/cpu/acpi_gpe.c @@ -6,10 +6,10 @@ #define LOG_CATEGORY UCLASS_IRQ -#include #include #include #include +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/acpi.c b/arch/x86/cpu/apollolake/acpi.c index c610a7f4477..76230aea837 100644 --- a/arch/x86/cpu/apollolake/acpi.c +++ b/arch/x86/cpu/apollolake/acpi.c @@ -10,7 +10,6 @@ #define LOG_CATEGORY LOGC_ACPI -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/cpu.c b/arch/x86/cpu/apollolake/cpu.c index 647c9df6a72..f480bb1d8c3 100644 --- a/arch/x86/cpu/apollolake/cpu.c +++ b/arch/x86/cpu/apollolake/cpu.c @@ -3,7 +3,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/cpu_common.c b/arch/x86/cpu/apollolake/cpu_common.c index 9a5502617bf..498b306cd61 100644 --- a/arch/x86/cpu/apollolake/cpu_common.c +++ b/arch/x86/cpu/apollolake/cpu_common.c @@ -3,7 +3,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/cpu_spl.c b/arch/x86/cpu/apollolake/cpu_spl.c index 8f48457ee22..8798fa79d4c 100644 --- a/arch/x86/cpu/apollolake/cpu_spl.c +++ b/arch/x86/cpu/apollolake/cpu_spl.c @@ -5,7 +5,6 @@ * Portions taken from coreboot */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/fsp_bindings.c b/arch/x86/cpu/apollolake/fsp_bindings.c index fb75e1f7095..f6fbddce922 100644 --- a/arch/x86/cpu/apollolake/fsp_bindings.c +++ b/arch/x86/cpu/apollolake/fsp_bindings.c @@ -3,7 +3,6 @@ * Copyright 2020 B&R Industrial Automation GmbH - http://www.br-automation.com */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c index c6be707e4ea..19065e17ae0 100644 --- a/arch/x86/cpu/apollolake/fsp_m.c +++ b/arch/x86/cpu/apollolake/fsp_m.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c index a9b13c0c704..5fca19f90d3 100644 --- a/arch/x86/cpu/apollolake/fsp_s.c +++ b/arch/x86/cpu/apollolake/fsp_s.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c index 2405dec8525..9ee362239ef 100644 --- a/arch/x86/cpu/apollolake/hostbridge.c +++ b/arch/x86/cpu/apollolake/hostbridge.c @@ -11,7 +11,6 @@ #define LOG_CATEGORY UCLASS_NORTHBRIDGE -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c index 4be6366f043..531ff1cd91f 100644 --- a/arch/x86/cpu/apollolake/lpc.c +++ b/arch/x86/cpu/apollolake/lpc.c @@ -5,7 +5,6 @@ * From coreboot Apollo Lake support lpc.c */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c index a0f9b031dea..32190312ff8 100644 --- a/arch/x86/cpu/apollolake/pch.c +++ b/arch/x86/cpu/apollolake/pch.c @@ -3,7 +3,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c index 163119e2e9e..32fd0344861 100644 --- a/arch/x86/cpu/apollolake/pmc.c +++ b/arch/x86/cpu/apollolake/pmc.c @@ -8,7 +8,6 @@ #define LOG_CATEGORY UCLASS_ACPI_PMC -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/punit.c b/arch/x86/cpu/apollolake/punit.c index 5ed7963579e..b1503c25140 100644 --- a/arch/x86/cpu/apollolake/punit.c +++ b/arch/x86/cpu/apollolake/punit.c @@ -3,10 +3,10 @@ * Copyright 2019 Google LLC */ -#include #include #include #include +#include #include #include #include diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c index 6078d5a200e..b351d73e7d8 100644 --- a/arch/x86/cpu/apollolake/spl.c +++ b/arch/x86/cpu/apollolake/spl.c @@ -5,7 +5,6 @@ #define LOG_CATEGORY LOGC_BOOT -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/systemagent.c b/arch/x86/cpu/apollolake/systemagent.c index b6bc2ba14f1..f966b9083fc 100644 --- a/arch/x86/cpu/apollolake/systemagent.c +++ b/arch/x86/cpu/apollolake/systemagent.c @@ -4,7 +4,6 @@ * Take from coreboot project file of the same name */ -#include #include #include #include diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c index a9362436000..7e4c816dcef 100644 --- a/arch/x86/cpu/apollolake/uart.c +++ b/arch/x86/cpu/apollolake/uart.c @@ -7,7 +7,6 @@ * Some code from coreboot lpss.c */ -#include #include #include #include diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index ccc4851b188..7821964f1fc 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -3,7 +3,6 @@ * Copyright (C) 2016, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index c270426d820..7756a1a4a8e 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -5,7 +5,6 @@ * Based on code from coreboot */ -#include #include #include #include diff --git a/arch/x86/cpu/baytrail/early_uart.c b/arch/x86/cpu/baytrail/early_uart.c index 08dbd5538f7..3736127239e 100644 --- a/arch/x86/cpu/baytrail/early_uart.c +++ b/arch/x86/cpu/baytrail/early_uart.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index fb3f946c45f..9eb456f90d1 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -5,7 +5,6 @@ * Copyright (C) 2015, Kodak Alaris, Inc */ -#include #include #include #include diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c index f73738ce5c0..839ff4d2bf2 100644 --- a/arch/x86/cpu/baytrail/valleyview.c +++ b/arch/x86/cpu/baytrail/valleyview.c @@ -3,7 +3,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include #include #include @@ -11,6 +10,7 @@ #include #include #include +#include #include /* GPIO SUS */ diff --git a/arch/x86/cpu/braswell/braswell.c b/arch/x86/cpu/braswell/braswell.c index 3345049993d..8cf4b628d41 100644 --- a/arch/x86/cpu/braswell/braswell.c +++ b/arch/x86/cpu/braswell/braswell.c @@ -3,10 +3,10 @@ * Copyright (C) 2017, Bin Meng */ -#include #include #include #include +#include int arch_cpu_init(void) { diff --git a/arch/x86/cpu/braswell/early_uart.c b/arch/x86/cpu/braswell/early_uart.c index d78c6b0feb6..8b28d28d136 100644 --- a/arch/x86/cpu/braswell/early_uart.c +++ b/arch/x86/cpu/braswell/early_uart.c @@ -3,7 +3,6 @@ * Copyright (C) 2017, Bin Meng */ -#include #include #define PCI_DEV_CONFIG(segbus, dev, fn) ( \ diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c index 243298fd571..aaf3e67f81c 100644 --- a/arch/x86/cpu/braswell/fsp_configs.c +++ b/arch/x86/cpu/braswell/fsp_configs.c @@ -3,7 +3,6 @@ * Copyright (C) 2017, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/adsp.c b/arch/x86/cpu/broadwell/adsp.c index 1fa18237809..90b2449475e 100644 --- a/arch/x86/cpu/broadwell/adsp.c +++ b/arch/x86/cpu/broadwell/adsp.c @@ -9,7 +9,6 @@ #define LOG_CATEGORY UCLASS_SYSCON -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index cbd4a3b6797..dc6717eca40 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -5,7 +5,6 @@ * Based on code from coreboot src/soc/intel/broadwell/cpu.c */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/cpu_from_spl.c b/arch/x86/cpu/broadwell/cpu_from_spl.c index df5a9675ee4..a48be295994 100644 --- a/arch/x86/cpu/broadwell/cpu_from_spl.c +++ b/arch/x86/cpu/broadwell/cpu_from_spl.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include @@ -13,6 +12,7 @@ #include #include #include +#include int misc_init_r(void) { diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index 2049dbfe24a..c43fb7a608b 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -5,7 +5,6 @@ * Based on code from coreboot src/soc/intel/broadwell/cpu.c */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/iobp.c b/arch/x86/cpu/broadwell/iobp.c index cb5595c930e..f8b2a60d09f 100644 --- a/arch/x86/cpu/broadwell/iobp.c +++ b/arch/x86/cpu/broadwell/iobp.c @@ -5,7 +5,6 @@ * Modified from coreboot */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/lpc.c b/arch/x86/cpu/broadwell/lpc.c index d2638a4e7a6..b945693f1cf 100644 --- a/arch/x86/cpu/broadwell/lpc.c +++ b/arch/x86/cpu/broadwell/lpc.c @@ -5,7 +5,6 @@ * From coreboot broadwell support */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/me.c b/arch/x86/cpu/broadwell/me.c index ae16ce26499..3399d822e5b 100644 --- a/arch/x86/cpu/broadwell/me.c +++ b/arch/x86/cpu/broadwell/me.c @@ -5,7 +5,6 @@ * Based on code from coreboot src/soc/intel/broadwell/me_status.c */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/northbridge.c b/arch/x86/cpu/broadwell/northbridge.c index 141babc51c3..d67ab03627d 100644 --- a/arch/x86/cpu/broadwell/northbridge.c +++ b/arch/x86/cpu/broadwell/northbridge.c @@ -3,7 +3,6 @@ * Copyright (C) 2011 The Chromium Authors */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c index 37fcddbb9b0..2c8b7380d96 100644 --- a/arch/x86/cpu/broadwell/pch.c +++ b/arch/x86/cpu/broadwell/pch.c @@ -3,7 +3,6 @@ * Copyright (c) 2016 Google, Inc */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/pinctrl_broadwell.c b/arch/x86/cpu/broadwell/pinctrl_broadwell.c index 85bd37101ba..b6313c3466a 100644 --- a/arch/x86/cpu/broadwell/pinctrl_broadwell.c +++ b/arch/x86/cpu/broadwell/pinctrl_broadwell.c @@ -3,7 +3,6 @@ * Copyright (C) 2016 Google, Inc */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/power_state.c b/arch/x86/cpu/broadwell/power_state.c index 62fd2e8d2c0..e1d60915f55 100644 --- a/arch/x86/cpu/broadwell/power_state.c +++ b/arch/x86/cpu/broadwell/power_state.c @@ -5,7 +5,6 @@ * Copyright (C) 2016 Google, Inc. */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c index df2df7972e9..653d31dd67c 100644 --- a/arch/x86/cpu/broadwell/refcode.c +++ b/arch/x86/cpu/broadwell/refcode.c @@ -6,7 +6,7 @@ * Copyright (c) 2016 Google, Inc */ -#include +#include #include #include #include diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c index be3c9e764ef..0f67ba9666f 100644 --- a/arch/x86/cpu/broadwell/sata.c +++ b/arch/x86/cpu/broadwell/sata.c @@ -5,7 +5,6 @@ * From coreboot src/soc/intel/broadwell/sata.c */ -#include #include #include #include diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c index d30ebee021e..cd534a17cf1 100644 --- a/arch/x86/cpu/broadwell/sdram.c +++ b/arch/x86/cpu/broadwell/sdram.c @@ -7,7 +7,6 @@ #define LOG_CATEGORY UCLASS_RAM -#include #include #include #include diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 82fe4c71cd2..d474c79e25e 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -5,7 +5,6 @@ * Graeme Russ, graeme.russ@gmail.com. */ -#include #include #include #include diff --git a/arch/x86/cpu/coreboot/coreboot_spl.c b/arch/x86/cpu/coreboot/coreboot_spl.c index 36661871e92..566c65a96ae 100644 --- a/arch/x86/cpu/coreboot/coreboot_spl.c +++ b/arch/x86/cpu/coreboot/coreboot_spl.c @@ -3,7 +3,6 @@ * Copyright 2020 Google LLC */ -#include #include int dram_init(void) diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index 26352df421f..ee0491eab1c 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -5,11 +5,11 @@ * Graeme Russ, */ -#include #include #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c index 3ad611a530c..ec4003c4e77 100644 --- a/arch/x86/cpu/coreboot/timestamp.c +++ b/arch/x86/cpu/coreboot/timestamp.c @@ -5,10 +5,10 @@ * Modified from the coreboot version */ -#include #include #include #include +#include #include static struct timestamp_table *ts_table __section(".data"); diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index ce55efc454b..c8433360f28 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -20,7 +20,6 @@ #define LOG_CATEGORY UCLASS_CPU -#include #include #include #include diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c index 59da41f3833..6c53f0ea821 100644 --- a/arch/x86/cpu/cpu_x86.c +++ b/arch/x86/cpu/cpu_x86.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/efi/app.c b/arch/x86/cpu/efi/app.c index f754489784a..218a68c4642 100644 --- a/arch/x86/cpu/efi/app.c +++ b/arch/x86/cpu/efi/app.c @@ -3,11 +3,11 @@ * Copyright (c) 2015 Google, Inc */ -#include #include #include #include #include +#include int arch_cpu_init(void) { diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index 708bfbe7ee4..cb57f15f710 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include @@ -17,6 +16,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c index 56f3326146c..1f0e87735b2 100644 --- a/arch/x86/cpu/efi/sdram.c +++ b/arch/x86/cpu/efi/sdram.c @@ -3,10 +3,10 @@ * Copyright (c) 2015 Google, Inc */ -#include #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index 8882532ebf3..db2727d7485 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -18,7 +18,6 @@ * src/arch/x86/lib/cpu.c */ -#include #include #include #include @@ -32,6 +31,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c index f3f3527237f..b3f4214acdb 100644 --- a/arch/x86/cpu/i386/interrupt.c +++ b/arch/x86/cpu/i386/interrupt.c @@ -10,7 +10,6 @@ * Copyright (C) 1991, 1992 Linus Torvalds */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/acpi.c b/arch/x86/cpu/intel_common/acpi.c index d94ec208f65..29676b4abfa 100644 --- a/arch/x86/cpu/intel_common/acpi.c +++ b/arch/x86/cpu/intel_common/acpi.c @@ -8,7 +8,6 @@ * Modified from coreboot src/soc/intel/common/block/acpi.c */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/car.S b/arch/x86/cpu/intel_common/car.S index 00308dbdef9..46d9ede09cb 100644 --- a/arch/x86/cpu/intel_common/car.S +++ b/arch/x86/cpu/intel_common/car.S @@ -10,7 +10,6 @@ * Copyright (C) 2012 Kyösti Mälkki */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index 8f489e6c651..e7f41913042 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -7,7 +7,6 @@ * Some code taken from coreboot cpulib.c */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/cpu_from_spl.c b/arch/x86/cpu/intel_common/cpu_from_spl.c index 1c0dcedb582..48b2ef253cb 100644 --- a/arch/x86/cpu/intel_common/cpu_from_spl.c +++ b/arch/x86/cpu/intel_common/cpu_from_spl.c @@ -3,7 +3,6 @@ * Copyright (c) 2016 Google, Inc */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/fast_spi.c b/arch/x86/cpu/intel_common/fast_spi.c index 5d3944dee2c..e1d536be212 100644 --- a/arch/x86/cpu/intel_common/fast_spi.c +++ b/arch/x86/cpu/intel_common/fast_spi.c @@ -3,7 +3,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/generic_wifi.c b/arch/x86/cpu/intel_common/generic_wifi.c index 61ec5391b09..75fa4e01d8a 100644 --- a/arch/x86/cpu/intel_common/generic_wifi.c +++ b/arch/x86/cpu/intel_common/generic_wifi.c @@ -6,7 +6,6 @@ * Modified from coreboot src/drivers/wifi/generic.c */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/intel_opregion.c b/arch/x86/cpu/intel_common/intel_opregion.c index 1eed21d8cdf..78caff0dc12 100644 --- a/arch/x86/cpu/intel_common/intel_opregion.c +++ b/arch/x86/cpu/intel_common/intel_opregion.c @@ -6,7 +6,6 @@ * Modified from coreboot src/soc/intel/gma/opregion.c */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index ec73b3d8931..6d3184f969f 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -9,7 +9,6 @@ * Taken from coreboot itss.c */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/lpc.c b/arch/x86/cpu/intel_common/lpc.c index af68c0f079c..f2bdf8c1e87 100644 --- a/arch/x86/cpu/intel_common/lpc.c +++ b/arch/x86/cpu/intel_common/lpc.c @@ -3,7 +3,6 @@ * Copyright (c) 2016 Google, Inc */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/lpss.c b/arch/x86/cpu/intel_common/lpss.c index 26a2d2d1e36..44cd3f0ca5f 100644 --- a/arch/x86/cpu/intel_common/lpss.c +++ b/arch/x86/cpu/intel_common/lpss.c @@ -7,7 +7,6 @@ * Some code from coreboot lpss.c */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/me_status.c b/arch/x86/cpu/intel_common/me_status.c index abc5f6fbc77..a09bd5029eb 100644 --- a/arch/x86/cpu/intel_common/me_status.c +++ b/arch/x86/cpu/intel_common/me_status.c @@ -5,7 +5,6 @@ * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. */ -#include #include #include diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c index 4d8e1d21083..6cad2727075 100644 --- a/arch/x86/cpu/intel_common/microcode.c +++ b/arch/x86/cpu/intel_common/microcode.c @@ -6,7 +6,6 @@ * Microcode update for Intel PIII and later CPUs */ -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c index ff959d1bd8d..c834c05d130 100644 --- a/arch/x86/cpu/intel_common/mrc.c +++ b/arch/x86/cpu/intel_common/mrc.c @@ -5,17 +5,17 @@ #define LOG_CATEGORY UCLASS_RAM -#include +#include #include #include #include #include #include +#include #include #include #include #include -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index e4e53f73c08..7aad8f8ca56 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -7,7 +7,6 @@ #define LOG_CATEGORY UCLASS_P2SB -#include #include #include #include diff --git a/arch/x86/cpu/intel_common/pch.c b/arch/x86/cpu/intel_common/pch.c index af82b64a13c..c4cc478b306 100644 --- a/arch/x86/cpu/intel_common/pch.c +++ b/arch/x86/cpu/intel_common/pch.c @@ -3,7 +3,6 @@ * Copyright (c) 2016 Google, Inc */ -#include #include #include diff --git a/arch/x86/cpu/intel_common/report_platform.c b/arch/x86/cpu/intel_common/report_platform.c index a3612817c45..a7524435ba0 100644 --- a/arch/x86/cpu/intel_common/report_platform.c +++ b/arch/x86/cpu/intel_common/report_platform.c @@ -5,12 +5,12 @@ * Copyright (C) 2012 Google Inc. */ -#include #include #include #include #include #include +#include static void report_cpu_info(void) { diff --git a/arch/x86/cpu/ioapic.c b/arch/x86/cpu/ioapic.c index 4f99de6ece2..fa912bac57d 100644 --- a/arch/x86/cpu/ioapic.c +++ b/arch/x86/cpu/ioapic.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index 766b2451a2c..d4dd1816092 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 417290f559e..8ae4798f125 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -2,7 +2,6 @@ /* * Copyright (C) 2014 Google, Inc */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index e71a10bfd44..d71ab0a6385 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -10,7 +10,6 @@ * Copyright (C) 2011 Google Inc. */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c index bee1671baf8..ac868025f8e 100644 --- a/arch/x86/cpu/ivybridge/early_me.c +++ b/arch/x86/cpu/ivybridge/early_me.c @@ -5,7 +5,6 @@ * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c index 3c4ea6c267f..19b6ef283bc 100644 --- a/arch/x86/cpu/ivybridge/fsp_configs.c +++ b/arch/x86/cpu/ivybridge/fsp_configs.c @@ -3,7 +3,6 @@ * Copyright (C) 2016, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/ivybridge.c b/arch/x86/cpu/ivybridge/ivybridge.c index eb3f362e4e9..81b54bb8dda 100644 --- a/arch/x86/cpu/ivybridge/ivybridge.c +++ b/arch/x86/cpu/ivybridge/ivybridge.c @@ -3,10 +3,10 @@ * Copyright (C) 2016, Bin Meng */ -#include #include #include #include +#include int arch_cpu_init(void) { diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c index f931d2be1b5..17a47edadbb 100644 --- a/arch/x86/cpu/ivybridge/lpc.c +++ b/arch/x86/cpu/ivybridge/lpc.c @@ -5,7 +5,6 @@ * Copyright (C) 2008-2009 coresystems GmbH */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index 3906a69796f..b72de96a277 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -6,7 +6,6 @@ * Copyright (C) 2011 The Chromium Authors */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/northbridge.c b/arch/x86/cpu/ivybridge/northbridge.c index 994f8a4ff6a..76e52f38ad8 100644 --- a/arch/x86/cpu/ivybridge/northbridge.c +++ b/arch/x86/cpu/ivybridge/northbridge.c @@ -6,7 +6,6 @@ * Copyright (C) 2011 The Chromium Authors */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c index f47ecdffae7..4e2484fa956 100644 --- a/arch/x86/cpu/ivybridge/sata.c +++ b/arch/x86/cpu/ivybridge/sata.c @@ -4,7 +4,6 @@ * Copyright (C) 2008-2009 coresystems GmbH */ -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c index 95a826da713..bddec6c66b6 100644 --- a/arch/x86/cpu/ivybridge/sdram.c +++ b/arch/x86/cpu/ivybridge/sdram.c @@ -11,7 +11,6 @@ #define LOG_CATEGORY UCLASS_RAM -#include #include #include #include diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c index 51dfe23f94d..e7ec35bbe2a 100644 --- a/arch/x86/cpu/ivybridge/sdram_nop.c +++ b/arch/x86/cpu/ivybridge/sdram_nop.c @@ -3,9 +3,9 @@ * Copyright (c) 2016 Google, Inc */ -#include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c index c0691454f12..55b1b1833ee 100644 --- a/arch/x86/cpu/lapic.c +++ b/arch/x86/cpu/lapic.c @@ -6,7 +6,6 @@ * Copyright (C) 2014 Google, Inc */ -#include #include #include #include diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index a133a5d8116..aa1f47d7227 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -5,13 +5,13 @@ * Based on code from the coreboot file of the same name */ -#include #include #include #include #include #include #include +#include #include #include #include diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 9c24ae984e9..50cba5fb88d 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -16,7 +16,6 @@ * since the MTRR registers are sometimes in flux. */ -#include #include #include #include diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c index 8a992ed8233..a7ad57f6de0 100644 --- a/arch/x86/cpu/pci.c +++ b/arch/x86/cpu/pci.c @@ -8,7 +8,6 @@ * Daniel Engström, Omicron Ceti AB, */ -#include #include #include #include diff --git a/arch/x86/cpu/qemu/cpu.c b/arch/x86/cpu/qemu/cpu.c index 735b6560843..0708a380626 100644 --- a/arch/x86/cpu/qemu/cpu.c +++ b/arch/x86/cpu/qemu/cpu.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Miao Yan */ -#include #include #include #include diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index d83abf00527..6ac363f3d8c 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -3,11 +3,11 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/qemu/e820.c b/arch/x86/cpu/qemu/e820.c index ebfe5956442..17a04f86479 100644 --- a/arch/x86/cpu/qemu/e820.c +++ b/arch/x86/cpu/qemu/e820.c @@ -6,7 +6,6 @@ * (C) Copyright 2019 Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c index 70414556086..262584d01f0 100644 --- a/arch/x86/cpu/qemu/qemu.c +++ b/arch/x86/cpu/qemu/qemu.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include @@ -14,6 +13,7 @@ #include #include #include +#include static bool i440fx; diff --git a/arch/x86/cpu/qfw_cpu.c b/arch/x86/cpu/qfw_cpu.c index ee00b8fe732..468df5a36e6 100644 --- a/arch/x86/cpu/qfw_cpu.c +++ b/arch/x86/cpu/qfw_cpu.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/arch/x86/cpu/quark/acpi.c b/arch/x86/cpu/quark/acpi.c index 0e18ceab68d..80e94600fc5 100644 --- a/arch/x86/cpu/quark/acpi.c +++ b/arch/x86/cpu/quark/acpi.c @@ -3,13 +3,13 @@ * Copyright (C) 2016, Bin Meng */ -#include #include #include #include #include #include #include +#include static int quark_write_fadt(struct acpi_ctx *ctx, const struct acpi_writer *entry) diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c index ad98f3e07ba..7d32b98e8da 100644 --- a/arch/x86/cpu/quark/dram.c +++ b/arch/x86/cpu/quark/dram.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include @@ -18,6 +17,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/quark/hte.c b/arch/x86/cpu/quark/hte.c index df14779357d..3cca6bd4c22 100644 --- a/arch/x86/cpu/quark/hte.c +++ b/arch/x86/cpu/quark/hte.c @@ -7,7 +7,6 @@ * QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei */ -#include #include #include #include "mrc_util.h" diff --git a/arch/x86/cpu/quark/mrc.c b/arch/x86/cpu/quark/mrc.c index ce3c2b8ab42..be9c36b96c4 100644 --- a/arch/x86/cpu/quark/mrc.c +++ b/arch/x86/cpu/quark/mrc.c @@ -32,9 +32,9 @@ * DRAM unit configuration based on Valleyview MRC. */ -#include #include #include +#include #include "mrc_util.h" #include "smc.h" diff --git a/arch/x86/cpu/quark/mrc_util.c b/arch/x86/cpu/quark/mrc_util.c index b0bc59b71ef..85408b3e335 100644 --- a/arch/x86/cpu/quark/mrc_util.c +++ b/arch/x86/cpu/quark/mrc_util.c @@ -7,12 +7,12 @@ * QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei */ -#include #include #include #include #include #include +#include #include "mrc_util.h" #include "hte.h" #include "smc.h" diff --git a/arch/x86/cpu/quark/msg_port.c b/arch/x86/cpu/quark/msg_port.c index d4f8c082ffc..6261766cdf8 100644 --- a/arch/x86/cpu/quark/msg_port.c +++ b/arch/x86/cpu/quark/msg_port.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 62b83c228cf..fdf92b2c0c3 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include @@ -19,6 +18,7 @@ #include #include #include +#include #include static void quark_setup_mtrr(void) diff --git a/arch/x86/cpu/quark/smc.c b/arch/x86/cpu/quark/smc.c index b4b3e1204bd..a7e92b3f5c1 100644 --- a/arch/x86/cpu/quark/smc.c +++ b/arch/x86/cpu/quark/smc.c @@ -7,11 +7,12 @@ * QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei */ -#include #include #include #include #include +#include +#include #include "mrc_util.h" #include "hte.h" #include "smc.h" diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c index 381edd07615..3b5cbdb44f1 100644 --- a/arch/x86/cpu/queensbay/fsp_configs.c +++ b/arch/x86/cpu/queensbay/fsp_configs.c @@ -4,7 +4,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include void fsp_update_configs(struct fsp_config_data *config, diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index 4a008622d19..7c7eb413f99 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -3,7 +3,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/cpu/slimbootloader/sdram.c b/arch/x86/cpu/slimbootloader/sdram.c index fbb33b246e5..75ca5273625 100644 --- a/arch/x86/cpu/slimbootloader/sdram.c +++ b/arch/x86/cpu/slimbootloader/sdram.c @@ -3,7 +3,6 @@ * Copyright (C) 2019 Intel Corporation */ -#include #include #include #include diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c index d28b280890d..4c889dad6d2 100644 --- a/arch/x86/cpu/slimbootloader/serial.c +++ b/arch/x86/cpu/slimbootloader/serial.c @@ -3,7 +3,6 @@ * Copyright (C) 2019 Intel Corporation */ -#include #include #include #include diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c index ec5b87cfd63..142c9341cf8 100644 --- a/arch/x86/cpu/slimbootloader/slimbootloader.c +++ b/arch/x86/cpu/slimbootloader/slimbootloader.c @@ -3,7 +3,6 @@ * Copyright (C) 2019 Intel Corporation */ -#include #include #include #include diff --git a/arch/x86/cpu/tangier/acpi.c b/arch/x86/cpu/tangier/acpi.c index 1d37cc9e2b0..d4d0ef6f855 100644 --- a/arch/x86/cpu/tangier/acpi.c +++ b/arch/x86/cpu/tangier/acpi.c @@ -5,7 +5,6 @@ * Partially based on acpi.c for other x86 platforms */ -#include #include #include #include diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c index 23bfa7c18d2..6afb8646a98 100644 --- a/arch/x86/cpu/tangier/pinmux.c +++ b/arch/x86/cpu/tangier/pinmux.c @@ -3,7 +3,6 @@ * Copyright (c) 2018 Emlid Limited */ -#include #include #include #include diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c index 374b262b134..7e1d290fc59 100644 --- a/arch/x86/cpu/tangier/sdram.c +++ b/arch/x86/cpu/tangier/sdram.c @@ -3,12 +3,12 @@ * Copyright (c) 2017 Intel Corporation */ -#include #include #include #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/tangier/sysreset.c b/arch/x86/cpu/tangier/sysreset.c index b03bc28f935..f57423a611d 100644 --- a/arch/x86/cpu/tangier/sysreset.c +++ b/arch/x86/cpu/tangier/sysreset.c @@ -5,7 +5,6 @@ * Reset driver for tangier processor */ -#include #include #include #include diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c index 1e2f6cc8b70..8a8f7d27a9d 100644 --- a/arch/x86/cpu/tangier/tangier.c +++ b/arch/x86/cpu/tangier/tangier.c @@ -3,7 +3,6 @@ * Copyright (c) 2017 Intel Corporation */ -#include #include #include #include diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c index e2c84cddec8..c9b402c4dc7 100644 --- a/arch/x86/cpu/turbo.c +++ b/arch/x86/cpu/turbo.c @@ -5,7 +5,6 @@ * Copyright (C) 2011 The Chromium Authors. */ -#include #include #include #include diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c index 5ea746ecce4..80eab710315 100644 --- a/arch/x86/cpu/x86_64/cpu.c +++ b/arch/x86/cpu/x86_64/cpu.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/arch/x86/cpu/x86_64/interrupts.c b/arch/x86/cpu/x86_64/interrupts.c index 634f7660c03..b84ff798814 100644 --- a/arch/x86/cpu/x86_64/interrupts.c +++ b/arch/x86/cpu/x86_64/interrupts.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include diff --git a/arch/x86/cpu/x86_64/misc.c b/arch/x86/cpu/x86_64/misc.c index 691b67ff68a..294511e6eba 100644 --- a/arch/x86/cpu/x86_64/misc.c +++ b/arch/x86/cpu/x86_64/misc.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/include/asm/arch-quark/mrc.h b/arch/x86/include/asm/arch-quark/mrc.h index 2353426cd6d..40c92a549cd 100644 --- a/arch/x86/include/asm/arch-quark/mrc.h +++ b/arch/x86/include/asm/arch-quark/mrc.h @@ -10,6 +10,8 @@ #ifndef _MRC_H_ #define _MRC_H_ +#include + #define MRC_VERSION 0x0111 /* architectural definitions */ diff --git a/arch/x86/include/asm/arch-quark/msg_port.h b/arch/x86/include/asm/arch-quark/msg_port.h index 9527fdad3fd..98a9360d543 100644 --- a/arch/x86/include/asm/arch-quark/msg_port.h +++ b/arch/x86/include/asm/arch-quark/msg_port.h @@ -34,6 +34,8 @@ #ifndef __ASSEMBLY__ +#include + /** * msg_port_setup - set up the message port control register * diff --git a/arch/x86/include/asm/arch-quark/quark.h b/arch/x86/include/asm/arch-quark/quark.h index feca1983ba8..dec30e2b27f 100644 --- a/arch/x86/include/asm/arch-quark/quark.h +++ b/arch/x86/include/asm/arch-quark/quark.h @@ -71,6 +71,8 @@ #ifndef __ASSEMBLY__ +#include + /* variable range MTRR usage */ enum { MTRR_VAR_ROM, diff --git a/arch/x86/include/asm/cb_sysinfo.h b/arch/x86/include/asm/cb_sysinfo.h index 12fa395ffd2..5864b2700ce 100644 --- a/arch/x86/include/asm/cb_sysinfo.h +++ b/arch/x86/include/asm/cb_sysinfo.h @@ -9,6 +9,7 @@ #define _COREBOOT_SYSINFO_H #include +#include /* Maximum number of memory range definitions */ #define SYSINFO_MAX_MEM_RANGES 32 diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h index 0dfb64babb9..c967e6ad0ce 100644 --- a/arch/x86/include/asm/coreboot_tables.h +++ b/arch/x86/include/asm/coreboot_tables.h @@ -8,6 +8,8 @@ #ifndef _COREBOOT_TABLES_H #define _COREBOOT_TABLES_H +#include + struct timestamp_entry { u32 entry_id; u64 entry_stamp; diff --git a/arch/x86/include/asm/early_cmos.h b/arch/x86/include/asm/early_cmos.h index 543a9e69f03..007aeb7c23e 100644 --- a/arch/x86/include/asm/early_cmos.h +++ b/arch/x86/include/asm/early_cmos.h @@ -6,6 +6,8 @@ #ifndef __EARLY_CMOS_H #define __EARLY_CMOS_H +#include + /* CMOS actually resides in the RTC SRAM */ #define CMOS_IO_PORT 0x70 diff --git a/arch/x86/include/asm/handoff.h b/arch/x86/include/asm/handoff.h index aec49b9b815..5f6691939eb 100644 --- a/arch/x86/include/asm/handoff.h +++ b/arch/x86/include/asm/handoff.h @@ -9,6 +9,8 @@ #ifndef __x86_asm_handoff_h #define __x86_asm_handoff_h +#include + /** * struct arch_spl_handoff - architecture-specific handoff info * diff --git a/arch/x86/include/asm/me_common.h b/arch/x86/include/asm/me_common.h index 85703683149..aa478594ec9 100644 --- a/arch/x86/include/asm/me_common.h +++ b/arch/x86/include/asm/me_common.h @@ -13,6 +13,7 @@ #define __ASM_ME_COMMON_H #include +#include #include #include diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h index f4c4d6c257c..7c08f7a1d5c 100644 --- a/arch/x86/include/asm/mp.h +++ b/arch/x86/include/asm/mp.h @@ -11,6 +11,7 @@ #include #include #include +#include struct udevice; diff --git a/arch/x86/lib/acpi.c b/arch/x86/lib/acpi.c index 155fffabf08..a73a2539ad3 100644 --- a/arch/x86/lib/acpi.c +++ b/arch/x86/lib/acpi.c @@ -3,7 +3,6 @@ * Copyright (C) 2018, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/acpi_nhlt.c b/arch/x86/lib/acpi_nhlt.c index 08e13fdea67..880ef31df7d 100644 --- a/arch/x86/lib/acpi_nhlt.c +++ b/arch/x86/lib/acpi_nhlt.c @@ -7,7 +7,6 @@ #define LOG_CATEGORY LOGC_ACPI -#include #include #include #include diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c index 2c70acbe7b0..3a1e3318a15 100644 --- a/arch/x86/lib/acpi_s3.c +++ b/arch/x86/lib/acpi_s3.c @@ -3,7 +3,6 @@ * Copyright (C) 2017, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c index a5683132b01..a42a7e6bbd6 100644 --- a/arch/x86/lib/acpi_table.c +++ b/arch/x86/lib/acpi_table.c @@ -8,7 +8,6 @@ #define LOG_CATEGORY LOGC_ACPI -#include #include #include #include diff --git a/arch/x86/lib/acpigen.c b/arch/x86/lib/acpigen.c index ea2ec2a9083..b486f8fb37d 100644 --- a/arch/x86/lib/acpigen.c +++ b/arch/x86/lib/acpigen.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Google LLC */ -#include #include #include #include diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c index 8df67db65c3..7b2905dda56 100644 --- a/arch/x86/lib/asm-offsets.c +++ b/arch/x86/lib/asm-offsets.c @@ -11,7 +11,6 @@ * #defines from the assembly-language output. */ -#include #include #include diff --git a/arch/x86/lib/bdinfo.c b/arch/x86/lib/bdinfo.c index 124058442c5..165e8ab944f 100644 --- a/arch/x86/lib/bdinfo.c +++ b/arch/x86/lib/bdinfo.c @@ -5,7 +5,6 @@ * Copyright 2021 Google LLC */ -#include #include #include #include diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c index f146bbd5422..03f7360032c 100644 --- a/arch/x86/lib/bios.c +++ b/arch/x86/lib/bios.c @@ -5,7 +5,6 @@ * Copyright (C) 2007 Advanced Micro Devices, Inc. * Copyright (C) 2009-2010 coresystems GmbH */ -#include #include #include #include diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c index d6b4da7e250..b2cf1527b1c 100644 --- a/arch/x86/lib/bios_interrupts.c +++ b/arch/x86/lib/bios_interrupts.c @@ -7,7 +7,6 @@ * Copyright (C) 2007-2009 coresystems GmbH */ -#include #include #include #include "bios_emul.h" diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c index 050c420e86b..2c889bcd33c 100644 --- a/arch/x86/lib/bootm.c +++ b/arch/x86/lib/bootm.c @@ -7,7 +7,6 @@ * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) */ -#include #include #include #include diff --git a/arch/x86/lib/cmd_boot.c b/arch/x86/lib/cmd_boot.c index 4facbe5f32f..0444a5f89d3 100644 --- a/arch/x86/lib/cmd_boot.c +++ b/arch/x86/lib/cmd_boot.c @@ -14,7 +14,6 @@ * Marius Groeger */ -#include #include #include #include diff --git a/arch/x86/lib/coreboot/cb_support.c b/arch/x86/lib/coreboot/cb_support.c index ebb45cdfb5b..b4d5fa4af32 100644 --- a/arch/x86/lib/coreboot/cb_support.c +++ b/arch/x86/lib/coreboot/cb_support.c @@ -5,9 +5,9 @@ * Copyright 2021 Google LLC */ -#include #include #include +#include unsigned int cb_install_e820_map(unsigned int max_entries, struct e820_entry *entries) diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c b/arch/x86/lib/coreboot/cb_sysinfo.c index f7fd9ea5bcb..ec997fa49cf 100644 --- a/arch/x86/lib/coreboot/cb_sysinfo.c +++ b/arch/x86/lib/coreboot/cb_sysinfo.c @@ -6,12 +6,12 @@ * Copyright (C) 2009 coresystems GmbH */ -#include #include #include #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c index 05519d851a9..33fce5d0a5e 100644 --- a/arch/x86/lib/coreboot_table.c +++ b/arch/x86/lib/coreboot_table.c @@ -3,7 +3,6 @@ * Copyright (C) 2016, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/div64.c b/arch/x86/lib/div64.c index 2bea205f60f..57da889ef49 100644 --- a/arch/x86/lib/div64.c +++ b/arch/x86/lib/div64.c @@ -6,7 +6,7 @@ * Copyright 2014 Google Inc. */ -#include +#include union overlay64 { u64 longw; diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c index 12fcff12380..122b4f7ca01 100644 --- a/arch/x86/lib/e820.c +++ b/arch/x86/lib/e820.c @@ -3,7 +3,6 @@ * Copyright (C) 2015, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/early_cmos.c b/arch/x86/lib/early_cmos.c index f7b3bb2a8e1..5635d08718f 100644 --- a/arch/x86/lib/early_cmos.c +++ b/arch/x86/lib/early_cmos.c @@ -10,7 +10,6 @@ * uclass write ops, that data is stored in little-endian mode. */ -#include #include #include diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index 8f2977a8070..c47e6ca4738 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -3,7 +3,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index cc889a688d8..730721dc176 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -3,7 +3,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c index 09d5da8c841..5f7701265a9 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp/fsp_graphics.c @@ -5,7 +5,6 @@ #define LOG_CATEGORY UCLASS_VIDEO -#include #include #include #include diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c index fd4d98ef627..19f9f65b2e4 100644 --- a/arch/x86/lib/fsp/fsp_support.c +++ b/arch/x86/lib/fsp/fsp_support.c @@ -4,7 +4,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c index df18f476756..ebf655a1143 100644 --- a/arch/x86/lib/fsp1/fsp_common.c +++ b/arch/x86/lib/fsp1/fsp_common.c @@ -3,7 +3,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c index eee9ce54b1c..f3a8134a3f2 100644 --- a/arch/x86/lib/fsp1/fsp_dram.c +++ b/arch/x86/lib/fsp1/fsp_dram.c @@ -3,7 +3,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/fsp1/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c index d84c632f140..6e311a12d20 100644 --- a/arch/x86/lib/fsp1/fsp_support.c +++ b/arch/x86/lib/fsp1/fsp_support.c @@ -4,7 +4,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_common.c b/arch/x86/lib/fsp2/fsp_common.c index d802a86967d..45a274c0512 100644 --- a/arch/x86/lib/fsp2/fsp_common.c +++ b/arch/x86/lib/fsp2/fsp_common.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c index a1432239cfc..83c6d7bcc93 100644 --- a/arch/x86/lib/fsp2/fsp_dram.c +++ b/arch/x86/lib/fsp2/fsp_dram.c @@ -6,7 +6,6 @@ #define LOG_CATEGORY LOGC_ARCH -#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index aadc08cf3c4..ecbadaae75c 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -3,7 +3,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_meminit.c b/arch/x86/lib/fsp2/fsp_meminit.c index 022e2cb64e5..f4817830cc2 100644 --- a/arch/x86/lib/fsp2/fsp_meminit.c +++ b/arch/x86/lib/fsp2/fsp_meminit.c @@ -6,7 +6,6 @@ * Mostly taken from coreboot fsp2_0/memory_init.c */ -#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_silicon_init.c b/arch/x86/lib/fsp2/fsp_silicon_init.c index a96d2b183f6..16d30c25a57 100644 --- a/arch/x86/lib/fsp2/fsp_silicon_init.c +++ b/arch/x86/lib/fsp2/fsp_silicon_init.c @@ -8,7 +8,6 @@ #define LOG_CATEGORY UCLASS_NORTHBRIDGE -#include #include #include #include diff --git a/arch/x86/lib/fsp2/fsp_support.c b/arch/x86/lib/fsp2/fsp_support.c index b2c76582453..808f0eb9d29 100644 --- a/arch/x86/lib/fsp2/fsp_support.c +++ b/arch/x86/lib/fsp2/fsp_support.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/arch/x86/lib/hob.c b/arch/x86/lib/hob.c index b35248e5fde..46e83aa395a 100644 --- a/arch/x86/lib/hob.c +++ b/arch/x86/lib/hob.c @@ -4,7 +4,6 @@ * Copyright (C) 2014, Bin Meng */ -#include #include /** diff --git a/arch/x86/lib/i8254.c b/arch/x86/lib/i8254.c index a8d1db188ec..8a590c6191f 100644 --- a/arch/x86/lib/i8254.c +++ b/arch/x86/lib/i8254.c @@ -4,10 +4,10 @@ * Daniel Engström, Omicron Ceti AB, */ -#include #include #include #include +#include #define TIMER1_VALUE 18 /* 15.6us */ #define BEEP_FREQUENCY_HZ 440 diff --git a/arch/x86/lib/i8259.c b/arch/x86/lib/i8259.c index a0e3c092573..465ff70146f 100644 --- a/arch/x86/lib/i8259.c +++ b/arch/x86/lib/i8259.c @@ -13,7 +13,6 @@ * Programmable Interrupt Controllers. */ -#include #include #include #include diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index bf0c921577d..bd0efde00c1 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -4,11 +4,11 @@ * Graeme Russ, */ -#include #include #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/lib/interrupts.c b/arch/x86/lib/interrupts.c index ff52959ed28..f96b2bfd70e 100644 --- a/arch/x86/lib/interrupts.c +++ b/arch/x86/lib/interrupts.c @@ -29,7 +29,6 @@ * Daniel Engström */ -#include #include #include #include diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c index 67b931d3b28..4f89db4e538 100644 --- a/arch/x86/lib/lpc-uclass.c +++ b/arch/x86/lib/lpc-uclass.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include UCLASS_DRIVER(lpc) = { diff --git a/arch/x86/lib/mpspec.c b/arch/x86/lib/mpspec.c index 8e97d9ff36d..5abd9288c2a 100644 --- a/arch/x86/lib/mpspec.c +++ b/arch/x86/lib/mpspec.c @@ -5,7 +5,6 @@ * Adapted from coreboot src/arch/x86/boot/mpspec.c */ -#include #include #include #include diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 6494b8d2634..970704a8dd6 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -8,7 +8,6 @@ #define LOG_CATEGORY UCLASS_RAM -#include #include #include #include diff --git a/arch/x86/lib/northbridge-uclass.c b/arch/x86/lib/northbridge-uclass.c index 38388872484..1d1780535a2 100644 --- a/arch/x86/lib/northbridge-uclass.c +++ b/arch/x86/lib/northbridge-uclass.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c index 382f768149f..48cd1073c15 100644 --- a/arch/x86/lib/physmem.c +++ b/arch/x86/lib/physmem.c @@ -8,7 +8,6 @@ * Software Foundation. */ -#include #include #include #include diff --git a/arch/x86/lib/pinctrl_ich6.c b/arch/x86/lib/pinctrl_ich6.c index c93f245845d..d4f71c562f8 100644 --- a/arch/x86/lib/pinctrl_ich6.c +++ b/arch/x86/lib/pinctrl_ich6.c @@ -3,7 +3,6 @@ * Copyright (C) 2016 Google, Inc */ -#include #include #include #include diff --git a/arch/x86/lib/pirq_routing.c b/arch/x86/lib/pirq_routing.c index caeaec9287f..5178940901c 100644 --- a/arch/x86/lib/pirq_routing.c +++ b/arch/x86/lib/pirq_routing.c @@ -5,7 +5,6 @@ * Part of this file is ported from coreboot src/arch/x86/boot/pirq_routing.c */ -#include #include #include #include diff --git a/arch/x86/lib/pmu.c b/arch/x86/lib/pmu.c index 083aec8d8dd..2127257cd43 100644 --- a/arch/x86/lib/pmu.c +++ b/arch/x86/lib/pmu.c @@ -2,7 +2,6 @@ /* * Copyright (c) 2017 Intel Corporation */ -#include #include #include #include diff --git a/arch/x86/lib/ramtest.c b/arch/x86/lib/ramtest.c index 03385396325..16cd6e49437 100644 --- a/arch/x86/lib/ramtest.c +++ b/arch/x86/lib/ramtest.c @@ -5,9 +5,9 @@ * From Coreboot src/lib/ramtest.c */ -#include #include #include +#include static void write_phys(unsigned long addr, u32 value) { diff --git a/arch/x86/lib/reloc_ia32_efi.c b/arch/x86/lib/reloc_ia32_efi.c index d56cd50bd93..17ab54dc246 100644 --- a/arch/x86/lib/reloc_ia32_efi.c +++ b/arch/x86/lib/reloc_ia32_efi.c @@ -7,7 +7,6 @@ * All rights reserved. */ -#include #include #include diff --git a/arch/x86/lib/reloc_x86_64_efi.c b/arch/x86/lib/reloc_x86_64_efi.c index 2694de71104..c7a21d9393d 100644 --- a/arch/x86/lib/reloc_x86_64_efi.c +++ b/arch/x86/lib/reloc_x86_64_efi.c @@ -9,7 +9,6 @@ * All rights reserved. */ -#include #include #include diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c index da819b9bdd2..9ce56062d24 100644 --- a/arch/x86/lib/relocate.c +++ b/arch/x86/lib/relocate.c @@ -14,7 +14,6 @@ * Marius Groeger */ -#include #include #include #include diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c index 90ef239bcd3..02fed601fb6 100644 --- a/arch/x86/lib/scu.c +++ b/arch/x86/lib/scu.c @@ -9,7 +9,6 @@ * * This driver enables IPC channel to SCU. */ -#include #include #include #include diff --git a/arch/x86/lib/sfi.c b/arch/x86/lib/sfi.c index 85e963b634b..04d97327a4d 100644 --- a/arch/x86/lib/sfi.c +++ b/arch/x86/lib/sfi.c @@ -12,7 +12,6 @@ * See https://simplefirmware.org/ for details */ -#include #include #include #include diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index c15f11f8cdf..f761fbc8bc3 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -5,7 +5,6 @@ #define LOG_CATEGORY LOGC_BOOT -#include #include #include #include @@ -29,6 +28,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index 1095dc92c5a..45a70e92763 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -5,7 +5,6 @@ #define LOG_CATEGORY LOGC_ACPI -#include #include #include #include diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 273e9c8e1ca..7c03dea0711 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -5,7 +5,6 @@ #define LOG_CATEGORY LOGC_BOOT -#include #include #include #include diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index d7403876c13..73a21bc8f03 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -14,7 +14,6 @@ #define LOG_CATEGORY LOGC_BOOT -#include #include #include #include diff --git a/include/acpi/acpi_s3.h b/include/acpi/acpi_s3.h index d3f271f948e..f7bea941855 100644 --- a/include/acpi/acpi_s3.h +++ b/include/acpi/acpi_s3.h @@ -37,6 +37,9 @@ #ifndef __ASSEMBLY__ +#include +#include + extern char __wakeup[]; extern int __wakeup_size; -- cgit v1.3.1 From 702841b56e9113acd7dea78c432cfd186c0293f4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:10:57 -0600 Subject: powerpc: Remove and add needed includes Remove from all powerpc architecture files and when needed add missing include files directly. This typically involves using instead due to the difficult nested structure of the PowerPC includes themselves. Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc83xx/cpu.c | 1 - arch/powerpc/cpu/mpc83xx/ecc.c | 1 - arch/powerpc/cpu/mpc83xx/fdt.c | 1 - arch/powerpc/cpu/mpc83xx/interrupts.c | 2 +- arch/powerpc/cpu/mpc83xx/law.c | 1 - arch/powerpc/cpu/mpc83xx/pci.c | 1 - arch/powerpc/cpu/mpc83xx/pcie.c | 2 +- arch/powerpc/cpu/mpc83xx/qe_io.c | 1 - arch/powerpc/cpu/mpc83xx/serdes.c | 1 - arch/powerpc/cpu/mpc83xx/spd_sdram.c | 2 +- arch/powerpc/cpu/mpc83xx/speed.c | 2 +- arch/powerpc/cpu/mpc83xx/spl_minimal.c | 2 +- arch/powerpc/cpu/mpc83xx/traps.c | 1 - arch/powerpc/cpu/mpc85xx/b4860_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/c29x_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/cmd_errata.c | 2 +- arch/powerpc/cpu/mpc85xx/cpu.c | 1 - arch/powerpc/cpu/mpc85xx/cpu_init_early.c | 3 ++- arch/powerpc/cpu/mpc85xx/fdt.c | 2 +- arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/interrupts.c | 2 +- arch/powerpc/cpu/mpc85xx/liodn.c | 2 +- arch/powerpc/cpu/mpc85xx/mp.c | 2 +- arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p1021_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p1023_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p2020_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p2041_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/p2041_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/p3041_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/p3041_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p4080_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/p4080_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p5040_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/p5040_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/portals.c | 1 - arch/powerpc/cpu/mpc85xx/qe_io.c | 2 +- arch/powerpc/cpu/mpc85xx/speed.c | 2 +- arch/powerpc/cpu/mpc85xx/spl_minimal.c | 2 +- arch/powerpc/cpu/mpc85xx/t1024_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/t1024_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/t1040_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/t1040_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/t2080_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/t2080_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/t4240_ids.c | 2 +- arch/powerpc/cpu/mpc85xx/t4240_serdes.c | 2 +- arch/powerpc/cpu/mpc85xx/tlb.c | 2 +- arch/powerpc/cpu/mpc85xx/traps.c | 2 +- arch/powerpc/cpu/mpc8xxx/cpu.c | 1 - arch/powerpc/cpu/mpc8xxx/fdt.c | 1 - arch/powerpc/cpu/mpc8xxx/fsl_lbc.c | 2 +- arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 2 +- arch/powerpc/cpu/mpc8xxx/law.c | 2 +- arch/powerpc/cpu/mpc8xxx/pamu_table.c | 2 +- arch/powerpc/cpu/mpc8xxx/srio.c | 3 +-- arch/powerpc/include/asm/cache.h | 2 ++ arch/powerpc/include/asm/fsl_dma.h | 2 +- arch/powerpc/include/asm/fsl_serdes.h | 1 + arch/powerpc/include/asm/immap_8xx.h | 2 ++ arch/powerpc/lib/bdinfo.c | 2 +- arch/powerpc/lib/bootm.c | 2 +- arch/powerpc/lib/cache.c | 1 - arch/powerpc/lib/extable.c | 1 - arch/powerpc/lib/interrupts.c | 2 +- arch/powerpc/lib/kgdb.c | 1 - arch/powerpc/lib/spl.c | 1 - arch/powerpc/lib/stack.c | 1 - arch/powerpc/lib/time.c | 1 - include/fsl_immap.h | 3 +++ 76 files changed, 50 insertions(+), 73 deletions(-) (limited to 'include') diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c index f6ffe295b8e..e0be938ea98 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu.c +++ b/arch/powerpc/cpu/mpc83xx/cpu.c @@ -9,7 +9,6 @@ * Derived from the MPC8260 and MPC85xx. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c index 3e24752e2f6..9ab5ea313d3 100644 --- a/arch/powerpc/cpu/mpc83xx/ecc.c +++ b/arch/powerpc/cpu/mpc83xx/ecc.c @@ -6,7 +6,6 @@ * based on the contribution of Marian Balakowicz */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c index 33b2151f878..1bd4f2b3449 100644 --- a/arch/powerpc/cpu/mpc83xx/fdt.c +++ b/arch/powerpc/cpu/mpc83xx/fdt.c @@ -6,7 +6,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c index f9486678af3..6238eec605f 100644 --- a/arch/powerpc/cpu/mpc83xx/interrupts.c +++ b/arch/powerpc/cpu/mpc83xx/interrupts.c @@ -6,7 +6,7 @@ * Copyright 2004 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/law.c b/arch/powerpc/cpu/mpc83xx/law.c index 5e02f4094bb..ae60be9e877 100644 --- a/arch/powerpc/cpu/mpc83xx/law.c +++ b/arch/powerpc/cpu/mpc83xx/law.c @@ -3,7 +3,6 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c index 65ef0497c2a..6f378c4e221 100644 --- a/arch/powerpc/cpu/mpc83xx/pci.c +++ b/arch/powerpc/cpu/mpc83xx/pci.c @@ -6,7 +6,6 @@ * with some bits from older board-specific PCI initialization. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 47ca74c5c35..feecf8a8193 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -7,7 +7,7 @@ * Anton Vorontsov */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/qe_io.c b/arch/powerpc/cpu/mpc83xx/qe_io.c index 52360703a7d..256dbfe8a4b 100644 --- a/arch/powerpc/cpu/mpc83xx/qe_io.c +++ b/arch/powerpc/cpu/mpc83xx/qe_io.c @@ -6,7 +6,6 @@ * based on source code of Shlomi Gridish */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c index d4848b2ec4d..d3ca24422a5 100644 --- a/arch/powerpc/cpu/mpc83xx/serdes.c +++ b/arch/powerpc/cpu/mpc83xx/serdes.c @@ -9,7 +9,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c index 6da8fc4381d..37234e00abd 100644 --- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c +++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c @@ -12,7 +12,7 @@ #ifndef CONFIG_MPC83XX_SDRAM -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index b7a87fec2f5..bfc62423217 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -8,7 +8,7 @@ #ifndef CONFIG_CLK_MPC83XX -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c index b55bfaffcae..7036e3fae0c 100644 --- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c @@ -3,7 +3,7 @@ * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/traps.c b/arch/powerpc/cpu/mpc83xx/traps.c index 94e6323d736..79ea1a9bb3c 100644 --- a/arch/powerpc/cpu/mpc83xx/traps.c +++ b/arch/powerpc/cpu/mpc83xx/traps.c @@ -11,7 +11,6 @@ * exceptions */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/b4860_ids.c b/arch/powerpc/cpu/mpc85xx/b4860_ids.c index 013a171ed87..39cfd20129f 100644 --- a/arch/powerpc/cpu/mpc85xx/b4860_ids.c +++ b/arch/powerpc/cpu/mpc85xx/b4860_ids.c @@ -3,7 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c index 8e18e12f634..25fdb4b0421 100644 --- a/arch/powerpc/cpu/mpc85xx/b4860_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/b4860_serdes.c @@ -3,7 +3,6 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c index 79213348274..9ebb3d838fa 100644 --- a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c index e53dd43f31f..bbe4a0dd62b 100644 --- a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c @@ -4,7 +4,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index c7d473d4a1b..01763b54e8a 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index e8a3e82765f..6356b021638 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -9,7 +9,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c index a67f37e3af9..574510fa088 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c @@ -3,8 +3,9 @@ * Copyright 2009-2012 Freescale Semiconductor, Inc */ -#include +#include #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index e26436bf570..c56e98d4b49 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c index 9b6577e547e..3383bb5c9b0 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c @@ -3,7 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 7c2de02c4c5..78316ea5ffe 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -3,7 +3,7 @@ * Copyright 2009-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c index bcbdfac0279..3c98768f22e 100644 --- a/arch/powerpc/cpu/mpc85xx/interrupts.c +++ b/arch/powerpc/cpu/mpc85xx/interrupts.c @@ -10,7 +10,7 @@ * Xianghua Xiao (X.Xiao@motorola.com) */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c index 4b8844a4d96..af6731cbb3a 100644 --- a/arch/powerpc/cpu/mpc85xx/liodn.c +++ b/arch/powerpc/cpu/mpc85xx/liodn.c @@ -3,7 +3,7 @@ * Copyright 2008-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index 7c47e415f05..b638f24ed14 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -3,7 +3,7 @@ * Copyright 2008-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c index cbcb57fe3a5..bafff2083b3 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c index a48f3c15128..ad979caf6a7 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c @@ -4,7 +4,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c index 479ee085d3a..924afa096d1 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c @@ -4,7 +4,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c index 56e5ef6468c..d38041ef5c2 100644 --- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c index 47f13e3c1cd..ec0f14ae6a7 100644 --- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c @@ -4,7 +4,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c index 7a8f653727e..6d306d99c32 100644 --- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c index 8c5d82ae8ad..49626fc1d1b 100644 --- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c @@ -4,7 +4,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index 540a6e6e191..67a21e15a64 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c @@ -3,7 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c index 3eca3a69326..d915665df8f 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index 8f645258a5f..e5d600fa2a4 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c b/arch/powerpc/cpu/mpc85xx/p3041_serdes.c index ec8234c1c1e..b1586f110e8 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_serdes.c @@ -3,7 +3,6 @@ * Copyright 2009-2011 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c index db411162022..25050412837 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p4080_serdes.c b/arch/powerpc/cpu/mpc85xx/p4080_serdes.c index 463fa119c9b..438fd446be3 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_serdes.c @@ -3,7 +3,6 @@ * Copyright 2009-2010 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p5040_ids.c b/arch/powerpc/cpu/mpc85xx/p5040_ids.c index bd05eae2551..de1d372631b 100644 --- a/arch/powerpc/cpu/mpc85xx/p5040_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5040_ids.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p5040_serdes.c b/arch/powerpc/cpu/mpc85xx/p5040_serdes.c index 2327b2c2a41..409f2ac938d 100644 --- a/arch/powerpc/cpu/mpc85xx/p5040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p5040_serdes.c @@ -3,7 +3,6 @@ * Copyright 2009-2011 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c index 6b4cbddcdfe..782874d79d7 100644 --- a/arch/powerpc/cpu/mpc85xx/portals.c +++ b/arch/powerpc/cpu/mpc85xx/portals.c @@ -3,7 +3,6 @@ * Copyright 2008-2011 Freescale Semiconductor, Inc. */ -#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/qe_io.c b/arch/powerpc/cpu/mpc85xx/qe_io.c index 3cf41ca76d5..c3f7493efc7 100644 --- a/arch/powerpc/cpu/mpc85xx/qe_io.c +++ b/arch/powerpc/cpu/mpc85xx/qe_io.c @@ -6,7 +6,7 @@ * based on source code of Shlomi Gridish */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 9af40310b46..1a4ee87cb34 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -9,7 +9,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/spl_minimal.c b/arch/powerpc/cpu/mpc85xx/spl_minimal.c index ce2b9c21667..e7031c1338b 100644 --- a/arch/powerpc/cpu/mpc85xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc85xx/spl_minimal.c @@ -3,7 +3,7 @@ * Copyright 2009 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1024_ids.c b/arch/powerpc/cpu/mpc85xx/t1024_ids.c index bab076b2b18..01a62b86926 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_ids.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c index 16458e73be1..3ab743c3d62 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c @@ -3,7 +3,7 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1040_ids.c b/arch/powerpc/cpu/mpc85xx/t1040_ids.c index 59f4f9c6692..d0f9b0ca758 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_ids.c @@ -3,7 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c index 3a7fdef79c2..1f1b23a3aaa 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c @@ -3,7 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t2080_ids.c b/arch/powerpc/cpu/mpc85xx/t2080_ids.c index 390bb115375..51ac367dd80 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_ids.c @@ -3,7 +3,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c index 5f34aab4531..16fa16b0808 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c @@ -5,7 +5,7 @@ * Shengzhou Liu */ -#include +#include #include #include #include "fsl_corenet2_serdes.h" diff --git a/arch/powerpc/cpu/mpc85xx/t4240_ids.c b/arch/powerpc/cpu/mpc85xx/t4240_ids.c index 37ea7788ccf..94b4409ceca 100644 --- a/arch/powerpc/cpu/mpc85xx/t4240_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t4240_ids.c @@ -3,7 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c index 61402e84ef6..956b5ea37aa 100644 --- a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c @@ -3,7 +3,7 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index 2a78f0fe502..e0b36f869a9 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c index 8f451b48624..db70f07500c 100644 --- a/arch/powerpc/cpu/mpc85xx/traps.c +++ b/arch/powerpc/cpu/mpc85xx/traps.c @@ -19,7 +19,7 @@ * This file handles the architecture-dependent parts of hardware exceptions */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index 73d28f2a4e2..82f28749eb1 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -8,7 +8,6 @@ */ #include -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 30042902487..f1c1cbc1c3c 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -8,7 +8,6 @@ * cpu specific common code for 85xx/86xx processors. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c index 29489b46e6c..c7bae5a8815 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c @@ -3,7 +3,7 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c index 8e1f6c964d3..523367ddf1c 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c @@ -5,7 +5,7 @@ * Copyright 2012-2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index 35409dc8824..5c6e26b9aa1 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -6,7 +6,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c index b906279226a..e55173a890b 100644 --- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c +++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c @@ -3,7 +3,7 @@ * Copyright 2012-2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c index c0b4a1217d3..185cbabbcd8 100644 --- a/arch/powerpc/cpu/mpc8xxx/srio.c +++ b/arch/powerpc/cpu/mpc8xxx/srio.c @@ -3,8 +3,7 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ -#include -#include +#include #include #include #include diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index b94faa5408e..21dfce4c8c7 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -39,6 +39,8 @@ #endif #if defined(__KERNEL__) && !defined(__ASSEMBLY__) +#include + extern void flush_dcache_range(unsigned long start, unsigned long stop); extern void clean_dcache_range(unsigned long start, unsigned long stop); extern void invalidate_dcache_range(unsigned long start, unsigned long stop); diff --git a/arch/powerpc/include/asm/fsl_dma.h b/arch/powerpc/include/asm/fsl_dma.h index 1459db74bee..e69e7dbefe8 100644 --- a/arch/powerpc/include/asm/fsl_dma.h +++ b/arch/powerpc/include/asm/fsl_dma.h @@ -8,7 +8,7 @@ #ifndef _ASM_FSL_DMA_H_ #define _ASM_FSL_DMA_H_ -#include +#include #ifdef CONFIG_MPC83xx typedef struct fsl_dma { diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h index ddde4f80c63..fdf76115233 100644 --- a/arch/powerpc/include/asm/fsl_serdes.h +++ b/arch/powerpc/include/asm/fsl_serdes.h @@ -7,6 +7,7 @@ #define __FSL_SERDES_H #include +#include enum srds_prtcl { /* diff --git a/arch/powerpc/include/asm/immap_8xx.h b/arch/powerpc/include/asm/immap_8xx.h index cf1300f6e29..e11300cab20 100644 --- a/arch/powerpc/include/asm/immap_8xx.h +++ b/arch/powerpc/include/asm/immap_8xx.h @@ -12,6 +12,8 @@ #ifndef __IMMAP_8XX__ #define __IMMAP_8XX__ +#include + /* System configuration registers. */ typedef struct sys_conf { diff --git a/arch/powerpc/lib/bdinfo.c b/arch/powerpc/lib/bdinfo.c index 55dcad5df8e..c12e4c6371f 100644 --- a/arch/powerpc/lib/bdinfo.c +++ b/arch/powerpc/lib/bdinfo.c @@ -6,9 +6,9 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index 75c6bfd2bf8..f55b5ff8320 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -7,7 +7,7 @@ */ -#include +#include #include #include #include diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c index c4c5c2d4513..e480b269649 100644 --- a/arch/powerpc/lib/cache.c +++ b/arch/powerpc/lib/cache.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/arch/powerpc/lib/extable.c b/arch/powerpc/lib/extable.c index 7e9d4f22f39..fd45e8a790d 100644 --- a/arch/powerpc/lib/extable.c +++ b/arch/powerpc/lib/extable.c @@ -5,7 +5,6 @@ * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include /* diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c index df312dfa28e..92b8a0bceac 100644 --- a/arch/powerpc/lib/interrupts.c +++ b/arch/powerpc/lib/interrupts.c @@ -7,7 +7,7 @@ * Gleb Natapov */ -#include +#include #include #include #include diff --git a/arch/powerpc/lib/kgdb.c b/arch/powerpc/lib/kgdb.c index 8727d18884c..20fcb7eef0e 100644 --- a/arch/powerpc/lib/kgdb.c +++ b/arch/powerpc/lib/kgdb.c @@ -1,4 +1,3 @@ -#include #include #include #include diff --git a/arch/powerpc/lib/spl.c b/arch/powerpc/lib/spl.c index b638ea7be61..3a24cbfff3b 100644 --- a/arch/powerpc/lib/spl.c +++ b/arch/powerpc/lib/spl.c @@ -2,7 +2,6 @@ /* * Copyright 2012 Stefan Roese */ -#include #include #include #include diff --git a/arch/powerpc/lib/stack.c b/arch/powerpc/lib/stack.c index 2e731aa8701..afd869e4ac3 100644 --- a/arch/powerpc/lib/stack.c +++ b/arch/powerpc/lib/stack.c @@ -10,7 +10,6 @@ * Sysgo Real-Time Solutions, GmbH * Marius Groeger */ -#include #include #include #include diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c index 8d6babfb83d..0a0e75e726b 100644 --- a/arch/powerpc/lib/time.c +++ b/arch/powerpc/lib/time.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/include/fsl_immap.h b/include/fsl_immap.h index 5297c0b3f9b..54d6e0ab377 100644 --- a/include/fsl_immap.h +++ b/include/fsl_immap.h @@ -7,6 +7,9 @@ #ifndef __FSL_IMMAP_H #define __FSL_IMMAP_H + +#include + /* * DDR memory controller registers * This structure works for mpc83xx (DDR2 and DDR3), mpc85xx, mpc86xx. -- cgit v1.3.1 From 752ed0867522a68f21392a6b9d78589129248572 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:10:58 -0600 Subject: test: Remove and add needed includes Remove from all "test/" files and when needed add missing include files directly. Signed-off-by: Tom Rini --- include/adc.h | 2 ++ include/audio_codec.h | 2 ++ include/axi.h | 2 ++ include/bootmeth.h | 2 ++ include/bootstd.h | 2 ++ include/cedit.h | 3 +++ include/dm/test.h | 2 ++ test/bloblist.c | 1 - test/boot/bootdev.c | 1 - test/boot/bootflow.c | 1 - test/boot/bootmeth.c | 1 - test/boot/bootstd_common.c | 1 - test/boot/cedit.c | 1 - test/boot/expo.c | 1 - test/boot/image.c | 1 - test/boot/measurement.c | 1 - test/boot/vbe_fixup.c | 1 - test/boot/vbe_simple.c | 1 - test/bootm.c | 1 - test/cmd/addrmap.c | 1 - test/cmd/armffa.c | 1 - test/cmd/bdinfo.c | 1 - test/cmd/exit.c | 1 - test/cmd/fdt.c | 1 - test/cmd/font.c | 1 - test/cmd/history.c | 1 - test/cmd/loadm.c | 1 - test/cmd/mem.c | 1 - test/cmd/mem_search.c | 1 - test/cmd/pci_mps.c | 1 - test/cmd/pinmux.c | 1 - test/cmd/rw.c | 1 - test/cmd/seama.c | 1 - test/cmd/setexpr.c | 1 - test/cmd/temperature.c | 1 - test/cmd/test_echo.c | 1 - test/cmd/test_pause.c | 1 - test/cmd/wget.c | 1 - test/cmd_ut.c | 2 +- test/command_ut.c | 1 - test/common/cmd_ut_common.c | 1 - test/common/cread.c | 2 +- test/common/cyclic.c | 1 - test/common/event.c | 1 - test/common/test_autoboot.c | 1 - test/compression.c | 1 - test/dm/acpi.c | 1 - test/dm/acpi_dp.c | 1 - test/dm/acpigen.c | 1 - test/dm/adc.c | 1 - test/dm/audio.c | 1 - test/dm/axi.c | 1 - test/dm/blk.c | 1 - test/dm/blkmap.c | 1 - test/dm/bootcount.c | 1 - test/dm/bus.c | 1 - test/dm/button.c | 1 - test/dm/cache.c | 1 - test/dm/clk.c | 1 - test/dm/clk_ccf.c | 1 - test/dm/core.c | 1 - test/dm/cpu.c | 1 - test/dm/cros_ec.c | 1 - test/dm/cros_ec_pwm.c | 1 - test/dm/devres.c | 1 - test/dm/dma.c | 1 - test/dm/dsi_host.c | 1 - test/dm/efi_media.c | 1 - test/dm/eth.c | 1 - test/dm/fastboot.c | 1 - test/dm/fdtdec.c | 1 - test/dm/ffa.c | 1 - test/dm/firmware.c | 1 - test/dm/fwu_mdata.c | 1 - test/dm/gpio.c | 1 - test/dm/host.c | 1 - test/dm/hwspinlock.c | 1 - test/dm/i2c.c | 1 - test/dm/i2s.c | 1 - test/dm/iommu.c | 1 - test/dm/irq.c | 1 - test/dm/k210_pll.c | 1 - test/dm/led.c | 1 - test/dm/mailbox.c | 1 - test/dm/mdio.c | 1 - test/dm/mdio_mux.c | 1 - test/dm/misc.c | 1 - test/dm/mmc.c | 1 - test/dm/mux-cmd.c | 2 +- test/dm/mux-emul.c | 1 - test/dm/mux-mmio.c | 1 - test/dm/nop.c | 1 - test/dm/nvmxip.c | 1 - test/dm/of_extra.c | 1 - test/dm/of_platdata.c | 1 - test/dm/ofnode.c | 1 - test/dm/ofread.c | 1 - test/dm/osd.c | 1 - test/dm/p2sb.c | 1 - test/dm/panel.c | 1 - test/dm/part.c | 1 - test/dm/pch.c | 1 - test/dm/pci.c | 1 - test/dm/pci_ep.c | 1 - test/dm/phy.c | 1 - test/dm/phys2bus.c | 1 - test/dm/pinmux.c | 1 - test/dm/pmc.c | 1 - test/dm/pmic.c | 1 - test/dm/power-domain.c | 1 - test/dm/pwm.c | 1 - test/dm/qfw.c | 1 - test/dm/ram.c | 1 - test/dm/read.c | 1 - test/dm/reboot-mode.c | 1 - test/dm/regmap.c | 2 +- test/dm/regulator.c | 1 - test/dm/remoteproc.c | 3 ++- test/dm/reset.c | 1 - test/dm/rkmtd.c | 1 - test/dm/rng.c | 1 - test/dm/rtc.c | 1 - test/dm/scmi.c | 1 - test/dm/scsi.c | 1 - test/dm/serial.c | 1 - test/dm/sf.c | 1 - test/dm/simple-bus.c | 1 - test/dm/simple-pm-bus.c | 1 - test/dm/sm.c | 1 - test/dm/smem.c | 1 - test/dm/soc.c | 1 - test/dm/sound.c | 1 - test/dm/spi.c | 1 - test/dm/spmi.c | 1 - test/dm/syscon-reset.c | 1 - test/dm/syscon.c | 1 - test/dm/sysinfo-gpio.c | 1 - test/dm/sysinfo.c | 1 - test/dm/sysreset.c | 1 - test/dm/tag.c | 1 - test/dm/tee.c | 1 - test/dm/test-dm.c | 1 - test/dm/test-driver.c | 1 - test/dm/test-fdt.c | 1 - test/dm/test-uclass.c | 1 - test/dm/timer.c | 1 - test/dm/tpm.c | 1 - test/dm/usb.c | 1 - test/dm/video.c | 1 - test/dm/virtio.c | 1 - test/dm/virtio_device.c | 1 - test/dm/virtio_rng.c | 1 - test/dm/wdt.c | 2 +- test/env/attr.c | 1 - test/env/cmd_ut_env.c | 1 - test/env/fdt.c | 1 - test/env/hashtable.c | 2 +- test/fuzz/cmd_fuzz.c | 1 - test/fuzz/virtio.c | 1 - test/image/spl_load.c | 1 - test/image/spl_load_fs.c | 1 - test/image/spl_load_net.c | 1 - test/image/spl_load_nor.c | 1 - test/image/spl_load_os.c | 1 - test/image/spl_load_spi.c | 1 - test/lib/abuf.c | 1 - test/lib/asn1.c | 1 - test/lib/cmd_ut_lib.c | 1 - test/lib/efi_device_path.c | 1 - test/lib/efi_image_region.c | 1 - test/lib/getopt.c | 1 - test/lib/hexdump.c | 1 - test/lib/kconfig.c | 1 - test/lib/kconfig_spl.c | 1 - test/lib/lmb.c | 1 - test/lib/longjmp.c | 1 - test/lib/rsa.c | 1 - test/lib/sscanf.c | 1 - test/lib/string.c | 1 - test/lib/strlcat.c | 1 - test/lib/test_aes.c | 1 - test/lib/test_crypt.c | 1 - test/lib/test_errno_str.c | 1 - test/lib/test_print.c | 1 - test/lib/uuid.c | 1 - test/log/cont_test.c | 1 - test/log/log_filter.c | 1 - test/log/log_test.c | 1 - test/log/log_ut.c | 1 - test/log/nolog_ndebug.c | 1 - test/log/nolog_test.c | 1 - test/log/pr_cont_test.c | 1 - test/log/syslog_test.c | 1 - test/log/syslog_test_ndebug.c | 1 - test/optee/cmd_ut_optee.c | 1 - test/overlay/cmd_ut_overlay.c | 1 - test/print_ut.c | 1 - test/stdint/int-types.c | 2 +- test/str_ut.c | 1 - test/test-main.c | 1 - test/time_ut.c | 1 - test/unicode_ut.c | 1 - test/ut.c | 1 - 203 files changed, 24 insertions(+), 196 deletions(-) (limited to 'include') diff --git a/include/adc.h b/include/adc.h index 0d1a666908f..15e4cdb7dce 100644 --- a/include/adc.h +++ b/include/adc.h @@ -7,6 +7,8 @@ #ifndef _ADC_H_ #define _ADC_H_ +#include + /* ADC_CHANNEL() - ADC channel bit mask, to select only required channels */ #define ADC_CHANNEL(x) (1 << x) diff --git a/include/audio_codec.h b/include/audio_codec.h index a81a3151576..a87b76c6f9e 100644 --- a/include/audio_codec.h +++ b/include/audio_codec.h @@ -7,6 +7,8 @@ #ifndef __AUDIO_CODEC_H__ #define __AUDIO_CODEC_H__ +#include + struct udevice; /* diff --git a/include/axi.h b/include/axi.h index 59fb0b2e458..133a06ee271 100644 --- a/include/axi.h +++ b/include/axi.h @@ -7,6 +7,8 @@ #ifndef _AXI_H_ #define _AXI_H_ +#include + struct udevice; /** diff --git a/include/bootmeth.h b/include/bootmeth.h index 0fc36104ece..cd9517321c0 100644 --- a/include/bootmeth.h +++ b/include/bootmeth.h @@ -7,6 +7,8 @@ #ifndef __bootmeth_h #define __bootmeth_h +#include + struct blk_desc; struct bootflow; struct bootflow_iter; diff --git a/include/bootstd.h b/include/bootstd.h index 99ce7b64e7c..ac756e98d84 100644 --- a/include/bootstd.h +++ b/include/bootstd.h @@ -10,6 +10,8 @@ #define __bootstd_h #include +#include +#include struct udevice; diff --git a/include/cedit.h b/include/cedit.h index f43cafa5aa2..a31b4245247 100644 --- a/include/cedit.h +++ b/include/cedit.h @@ -7,12 +7,15 @@ #ifndef __CEDIT_H #define __CEDIT_H +#include #include +#include struct abuf; struct expo; struct scene; struct video_priv; +struct udevice; enum { /* size increment for writing FDT */ diff --git a/include/dm/test.h b/include/dm/test.h index b5937509212..02737411a16 100644 --- a/include/dm/test.h +++ b/include/dm/test.h @@ -6,6 +6,8 @@ #ifndef __DM_TEST_H #define __DM_TEST_H +#include + struct udevice; /** diff --git a/test/bloblist.c b/test/bloblist.c index 1c60bbac36c..7c63682908a 100644 --- a/test/bloblist.c +++ b/test/bloblist.c @@ -3,7 +3,6 @@ * Copyright (c) 2018, Google Inc. All rights reserved. */ -#include #include #include #include diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c index 0702fccdae6..6e940002f84 100644 --- a/test/boot/bootdev.c +++ b/test/boot/bootdev.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c index 674d4c05f83..4511cfa7f9b 100644 --- a/test/boot/bootflow.c +++ b/test/boot/bootflow.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/boot/bootmeth.c b/test/boot/bootmeth.c index e498eee036e..113b789ea79 100644 --- a/test/boot/bootmeth.c +++ b/test/boot/bootmeth.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/boot/bootstd_common.c b/test/boot/bootstd_common.c index cc97e255e5c..e50539500a0 100644 --- a/test/boot/bootstd_common.c +++ b/test/boot/bootstd_common.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/boot/cedit.c b/test/boot/cedit.c index aa417190486..fd19da0a0c0 100644 --- a/test/boot/cedit.c +++ b/test/boot/cedit.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/boot/expo.c b/test/boot/expo.c index 714fdfa415d..6ea0184373d 100644 --- a/test/boot/expo.c +++ b/test/boot/expo.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/boot/image.c b/test/boot/image.c index 2844b057859..0894e30587f 100644 --- a/test/boot/image.c +++ b/test/boot/image.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/boot/measurement.c b/test/boot/measurement.c index 9db2ed324c2..29be495412d 100644 --- a/test/boot/measurement.c +++ b/test/boot/measurement.c @@ -6,7 +6,6 @@ * Written by Eddie James */ -#include #include #include #include diff --git a/test/boot/vbe_fixup.c b/test/boot/vbe_fixup.c index eba5c4ebe6c..540816e42b0 100644 --- a/test/boot/vbe_fixup.c +++ b/test/boot/vbe_fixup.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/boot/vbe_simple.c b/test/boot/vbe_simple.c index 5e61840652c..3672b744e5f 100644 --- a/test/boot/vbe_simple.c +++ b/test/boot/vbe_simple.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/bootm.c b/test/bootm.c index 4bb3ca0655c..26c15552bf6 100644 --- a/test/bootm.c +++ b/test/bootm.c @@ -5,7 +5,6 @@ * Copyright 2020 Google LLC */ -#include #include #include #include diff --git a/test/cmd/addrmap.c b/test/cmd/addrmap.c index 1eb5955db17..7b8f49fd375 100644 --- a/test/cmd/addrmap.c +++ b/test/cmd/addrmap.c @@ -5,7 +5,6 @@ * Copyright (C) 2021, Bin Meng */ -#include #include #include #include diff --git a/test/cmd/armffa.c b/test/cmd/armffa.c index 9a44a397e8a..38f40b72f5e 100644 --- a/test/cmd/armffa.c +++ b/test/cmd/armffa.c @@ -8,7 +8,6 @@ * Abdellatif El Khlifi */ -#include #include #include #include diff --git a/test/cmd/bdinfo.c b/test/cmd/bdinfo.c index 4977d01f62d..027848c3e24 100644 --- a/test/cmd/bdinfo.c +++ b/test/cmd/bdinfo.c @@ -5,7 +5,6 @@ * Copyright 2023 Marek Vasut */ -#include #include #include #include diff --git a/test/cmd/exit.c b/test/cmd/exit.c index 7e160f7e4bb..d310ec8531b 100644 --- a/test/cmd/exit.c +++ b/test/cmd/exit.c @@ -5,7 +5,6 @@ * Copyright 2022 Marek Vasut */ -#include #include #include #include diff --git a/test/cmd/fdt.c b/test/cmd/fdt.c index 54708552175..a0faf5aca90 100644 --- a/test/cmd/fdt.c +++ b/test/cmd/fdt.c @@ -5,7 +5,6 @@ * Copyright 2022 Google LLC */ -#include #include #include #include diff --git a/test/cmd/font.c b/test/cmd/font.c index 1fe05c1ead5..a8905ce617e 100644 --- a/test/cmd/font.c +++ b/test/cmd/font.c @@ -5,7 +5,6 @@ * Copyright 2022 Google LLC */ -#include #include #include #include diff --git a/test/cmd/history.c b/test/cmd/history.c index 06517fcdbb5..6964bfa9e1e 100644 --- a/test/cmd/history.c +++ b/test/cmd/history.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/cmd/loadm.c b/test/cmd/loadm.c index 41e005ac592..dff8a97d139 100644 --- a/test/cmd/loadm.c +++ b/test/cmd/loadm.c @@ -9,7 +9,6 @@ * Rui Miguel Silva */ -#include #include #include #include diff --git a/test/cmd/mem.c b/test/cmd/mem.c index d76f47cf311..f1bbab6055b 100644 --- a/test/cmd/mem.c +++ b/test/cmd/mem.c @@ -5,7 +5,6 @@ * Copyright 2020 Google LLC */ -#include #include #include #include diff --git a/test/cmd/mem_search.c b/test/cmd/mem_search.c index f80c9c40687..55ad2fac1e3 100644 --- a/test/cmd/mem_search.c +++ b/test/cmd/mem_search.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/cmd/pci_mps.c b/test/cmd/pci_mps.c index fd96f4fba6c..2a64143eecd 100644 --- a/test/cmd/pci_mps.c +++ b/test/cmd/pci_mps.c @@ -7,7 +7,6 @@ * Written by Stephen Carlson */ -#include #include #include #include diff --git a/test/cmd/pinmux.c b/test/cmd/pinmux.c index df40bb77435..4253baa5646 100644 --- a/test/cmd/pinmux.c +++ b/test/cmd/pinmux.c @@ -5,7 +5,6 @@ * Copyright (C) 2021, STMicroelectronics - All Rights Reserved */ -#include #include #include #include diff --git a/test/cmd/rw.c b/test/cmd/rw.c index 98302bf047b..edd762e4d58 100644 --- a/test/cmd/rw.c +++ b/test/cmd/rw.c @@ -3,7 +3,6 @@ * Tests for read and write commands */ -#include #include #include #include diff --git a/test/cmd/seama.c b/test/cmd/seama.c index b1b56930c64..b60f6550b13 100644 --- a/test/cmd/seama.c +++ b/test/cmd/seama.c @@ -5,7 +5,6 @@ * Copyright (C) 2021 Linus Walleij */ -#include #include #include #include diff --git a/test/cmd/setexpr.c b/test/cmd/setexpr.c index ee329e94b85..d50ce5803c3 100644 --- a/test/cmd/setexpr.c +++ b/test/cmd/setexpr.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/cmd/temperature.c b/test/cmd/temperature.c index 2a1ea0611dc..364972626b1 100644 --- a/test/cmd/temperature.c +++ b/test/cmd/temperature.c @@ -5,7 +5,6 @@ * Copyright (C) 2022 Sartura Ltd. */ -#include #include #include #include diff --git a/test/cmd/test_echo.c b/test/cmd/test_echo.c index 091e4f823c9..cde74ebeb61 100644 --- a/test/cmd/test_echo.c +++ b/test/cmd/test_echo.c @@ -5,7 +5,6 @@ * Copyright 2020, Heinrich Schuchadt */ -#include #include #include #include diff --git a/test/cmd/test_pause.c b/test/cmd/test_pause.c index 2b85cce3271..3703290350b 100644 --- a/test/cmd/test_pause.c +++ b/test/cmd/test_pause.c @@ -5,7 +5,6 @@ * Copyright 2022, Samuel Dionne-Riel */ -#include #include #include #include diff --git a/test/cmd/wget.c b/test/cmd/wget.c index ed83fc94a5e..356a4dcd8fa 100644 --- a/test/cmd/wget.c +++ b/test/cmd/wget.c @@ -6,7 +6,6 @@ * Ying-Chun Liu (PaulLiu) */ -#include #include #include #include diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 0677ce0cd17..4e4aa8f1cb2 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -4,9 +4,9 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ -#include #include #include +#include #include #include #include diff --git a/test/command_ut.c b/test/command_ut.c index a74bd109e15..2b8d28d7ae3 100644 --- a/test/command_ut.c +++ b/test/command_ut.c @@ -5,7 +5,6 @@ #define DEBUG -#include #include #include #include diff --git a/test/common/cmd_ut_common.c b/test/common/cmd_ut_common.c index 2c0267801b2..2f03a58af47 100644 --- a/test/common/cmd_ut_common.c +++ b/test/common/cmd_ut_common.c @@ -6,7 +6,6 @@ * Unit tests for common functions */ -#include #include #include #include diff --git a/test/common/cread.c b/test/common/cread.c index 4edc7739604..e159caed041 100644 --- a/test/common/cread.c +++ b/test/common/cread.c @@ -3,8 +3,8 @@ * Copyright 2023 Google LLC */ -#include #include +#include #include #include #include diff --git a/test/common/cyclic.c b/test/common/cyclic.c index 6e758e89dbd..461f8cf91f4 100644 --- a/test/common/cyclic.c +++ b/test/common/cyclic.c @@ -3,7 +3,6 @@ * Copyright (C) 2022 Stefan Roese */ -#include #include #include #include diff --git a/test/common/event.c b/test/common/event.c index b462694fc3b..de433d34f22 100644 --- a/test/common/event.c +++ b/test/common/event.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/common/test_autoboot.c b/test/common/test_autoboot.c index 42a1e4ab1fa..4ba1dcc8091 100644 --- a/test/common/test_autoboot.c +++ b/test/common/test_autoboot.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include diff --git a/test/compression.c b/test/compression.c index 3df90819a1f..aa1d38bb7bc 100644 --- a/test/compression.c +++ b/test/compression.c @@ -3,7 +3,6 @@ * Copyright (c) 2013, The Chromium Authors */ -#include #include #include #include diff --git a/test/dm/acpi.c b/test/dm/acpi.c index f14b3962f84..4db2171a4b1 100644 --- a/test/dm/acpi.c +++ b/test/dm/acpi.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/acpi_dp.c b/test/dm/acpi_dp.c index 44bcabda6bc..87bd8ae6749 100644 --- a/test/dm/acpi_dp.c +++ b/test/dm/acpi_dp.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/acpigen.c b/test/dm/acpigen.c index 15b2b6f64a0..7113219792e 100644 --- a/test/dm/acpigen.c +++ b/test/dm/acpigen.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/adc.c b/test/dm/adc.c index 740167e16b8..a26a677074a 100644 --- a/test/dm/adc.c +++ b/test/dm/adc.c @@ -6,7 +6,6 @@ * Przemyslaw Marczak */ -#include #include #include #include diff --git a/test/dm/audio.c b/test/dm/audio.c index add15ae20e0..3d1d821f323 100644 --- a/test/dm/audio.c +++ b/test/dm/audio.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/axi.c b/test/dm/axi.c index dc029df5e44..0900a9b5485 100644 --- a/test/dm/axi.c +++ b/test/dm/axi.c @@ -4,7 +4,6 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ -#include #include #include #include diff --git a/test/dm/blk.c b/test/dm/blk.c index 799f1e4dc75..d03aec32f6c 100644 --- a/test/dm/blk.c +++ b/test/dm/blk.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/blkmap.c b/test/dm/blkmap.c index 7a163d6eaef..7581e62df3b 100644 --- a/test/dm/blkmap.c +++ b/test/dm/blkmap.c @@ -4,7 +4,6 @@ * Author: Tobias Waldekranz */ -#include #include #include #include diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c index b77b472d1f2..9cfc7d48aac 100644 --- a/test/dm/bootcount.c +++ b/test/dm/bootcount.c @@ -3,7 +3,6 @@ * (C) 2018 Theobroma Systems Design und Consulting GmbH */ -#include #include #include #include diff --git a/test/dm/bus.c b/test/dm/bus.c index 89a6aa6554c..a338c7f567c 100644 --- a/test/dm/bus.c +++ b/test/dm/bus.c @@ -3,7 +3,6 @@ * Copyright (c) 2014 Google, Inc */ -#include #ifdef CONFIG_SANDBOX #include #include diff --git a/test/dm/button.c b/test/dm/button.c index 830d96fbef3..9157ec92878 100644 --- a/test/dm/button.c +++ b/test/dm/button.c @@ -5,7 +5,6 @@ * Based on led.c */ -#include #include #include #include diff --git a/test/dm/cache.c b/test/dm/cache.c index bbd8f98d007..d2f3bfe2caf 100644 --- a/test/dm/cache.c +++ b/test/dm/cache.c @@ -3,7 +3,6 @@ * Copyright (C) 2019 Intel Corporation */ -#include #include #include diff --git a/test/dm/clk.c b/test/dm/clk.c index 57fabbdce08..a966471dbd9 100644 --- a/test/dm/clk.c +++ b/test/dm/clk.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c index 61dad8d8527..15fba31b962 100644 --- a/test/dm/clk_ccf.c +++ b/test/dm/clk_ccf.c @@ -4,7 +4,6 @@ * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ -#include #include #include #include diff --git a/test/dm/core.c b/test/dm/core.c index 7f3f8d183bc..4741c81bcc1 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -5,7 +5,6 @@ * Copyright (c) 2013 Google, Inc */ -#include #include #include #include diff --git a/test/dm/cpu.c b/test/dm/cpu.c index 5734cd0a92d..acba8105996 100644 --- a/test/dm/cpu.c +++ b/test/dm/cpu.c @@ -4,7 +4,6 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ -#include #include #include #include diff --git a/test/dm/cros_ec.c b/test/dm/cros_ec.c index 30cb70e0882..ac0055f0acd 100644 --- a/test/dm/cros_ec.c +++ b/test/dm/cros_ec.c @@ -3,7 +3,6 @@ * Copyright 2021 Google LLC */ -#include #include #include #include diff --git a/test/dm/cros_ec_pwm.c b/test/dm/cros_ec_pwm.c index f8d6e1e6c40..f68ee6f33b8 100644 --- a/test/dm/cros_ec_pwm.c +++ b/test/dm/cros_ec_pwm.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include diff --git a/test/dm/devres.c b/test/dm/devres.c index 3df0f64362d..95a470b9f1c 100644 --- a/test/dm/devres.c +++ b/test/dm/devres.c @@ -5,7 +5,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/test/dm/dma.c b/test/dm/dma.c index cce47cb2180..949710fdb4e 100644 --- a/test/dm/dma.c +++ b/test/dm/dma.c @@ -6,7 +6,6 @@ * Grygorii Strashko */ -#include #include #include #include diff --git a/test/dm/dsi_host.c b/test/dm/dsi_host.c index 6e0a5df704f..68686a40d9f 100644 --- a/test/dm/dsi_host.c +++ b/test/dm/dsi_host.c @@ -4,7 +4,6 @@ * Author(s): Yannick Fertre for STMicroelectronics. */ -#include #include #include #include diff --git a/test/dm/efi_media.c b/test/dm/efi_media.c index e343a0e9c85..9d0ed0f0755 100644 --- a/test/dm/efi_media.c +++ b/test/dm/efi_media.c @@ -5,7 +5,6 @@ * Copyright 2021 Google LLC */ -#include #include #include #include diff --git a/test/dm/eth.c b/test/dm/eth.c index bb3dcc6b954..820b8cbfc29 100644 --- a/test/dm/eth.c +++ b/test/dm/eth.c @@ -6,7 +6,6 @@ * Joe Hershberger */ -#include #include #include #include diff --git a/test/dm/fastboot.c b/test/dm/fastboot.c index 758538d0e85..5d938eb7f12 100644 --- a/test/dm/fastboot.c +++ b/test/dm/fastboot.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/fdtdec.c b/test/dm/fdtdec.c index 087d4846da8..b484414f5f0 100644 --- a/test/dm/fdtdec.c +++ b/test/dm/fdtdec.c @@ -3,7 +3,6 @@ * Copyright 2020 NXP */ -#include #include #include #include diff --git a/test/dm/ffa.c b/test/dm/ffa.c index 6912666bb46..fa6d54d00d6 100644 --- a/test/dm/ffa.c +++ b/test/dm/ffa.c @@ -8,7 +8,6 @@ * Abdellatif El Khlifi */ -#include #include #include #include diff --git a/test/dm/firmware.c b/test/dm/firmware.c index f37bccfe4a8..ec68e816999 100644 --- a/test/dm/firmware.c +++ b/test/dm/firmware.c @@ -3,7 +3,6 @@ * Copyright (C) 2018 Xilinx, Inc. */ -#include #include #include #include diff --git a/test/dm/fwu_mdata.c b/test/dm/fwu_mdata.c index 52018f610fe..43ce3d0a9d8 100644 --- a/test/dm/fwu_mdata.c +++ b/test/dm/fwu_mdata.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/test/dm/gpio.c b/test/dm/gpio.c index 0d88ec24bda..957ab25c8d3 100644 --- a/test/dm/gpio.c +++ b/test/dm/gpio.c @@ -3,7 +3,6 @@ * Copyright (C) 2013 Google, Inc */ -#include #include #include #include diff --git a/test/dm/host.c b/test/dm/host.c index ca05a36b313..e514f8409cf 100644 --- a/test/dm/host.c +++ b/test/dm/host.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/hwspinlock.c b/test/dm/hwspinlock.c index 995759d4d7e..a05b183b8bc 100644 --- a/test/dm/hwspinlock.c +++ b/test/dm/hwspinlock.c @@ -3,7 +3,6 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ -#include #include #include #include diff --git a/test/dm/i2c.c b/test/dm/i2c.c index b46a22e79b1..e9cf9f7819a 100644 --- a/test/dm/i2c.c +++ b/test/dm/i2c.c @@ -5,7 +5,6 @@ * Note: Test coverage does not include 10-bit addressing */ -#include #include #include #include diff --git a/test/dm/i2s.c b/test/dm/i2s.c index c2bf4d5604b..a3d3a31b6fb 100644 --- a/test/dm/i2s.c +++ b/test/dm/i2s.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/iommu.c b/test/dm/iommu.c index 62d38f1214a..acea5f28971 100644 --- a/test/dm/iommu.c +++ b/test/dm/iommu.c @@ -3,7 +3,6 @@ * Copyright (C) 2021 Mark Kettenis */ -#include #include #include #include diff --git a/test/dm/irq.c b/test/dm/irq.c index 51dd5e4abb4..d22772ab769 100644 --- a/test/dm/irq.c +++ b/test/dm/irq.c @@ -5,7 +5,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/test/dm/k210_pll.c b/test/dm/k210_pll.c index 354720f61e2..2a581499634 100644 --- a/test/dm/k210_pll.c +++ b/test/dm/k210_pll.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Sean Anderson */ -#include /* For DIV_ROUND_DOWN_ULL, defined in linux/kernel.h */ #include #include diff --git a/test/dm/led.c b/test/dm/led.c index eed3f4654c5..c28fa044f45 100644 --- a/test/dm/led.c +++ b/test/dm/led.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/mailbox.c b/test/dm/mailbox.c index 7ad8a1cbba2..14f72d58d1c 100644 --- a/test/dm/mailbox.c +++ b/test/dm/mailbox.c @@ -3,7 +3,6 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ -#include #include #include #include diff --git a/test/dm/mdio.c b/test/dm/mdio.c index f863c52645b..7ececf37ccc 100644 --- a/test/dm/mdio.c +++ b/test/dm/mdio.c @@ -4,7 +4,6 @@ * Alex Marginean, NXP */ -#include #include #include #include diff --git a/test/dm/mdio_mux.c b/test/dm/mdio_mux.c index bfe3518221f..33a7e972609 100644 --- a/test/dm/mdio_mux.c +++ b/test/dm/mdio_mux.c @@ -4,7 +4,6 @@ * Alex Marginean, NXP */ -#include #include #include #include diff --git a/test/dm/misc.c b/test/dm/misc.c index 8bdd8c64bca..ad856fd01b6 100644 --- a/test/dm/misc.c +++ b/test/dm/misc.c @@ -4,7 +4,6 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ -#include #include #include #include diff --git a/test/dm/mmc.c b/test/dm/mmc.c index b1eb8bee2f9..c0abea797d9 100644 --- a/test/dm/mmc.c +++ b/test/dm/mmc.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/mux-cmd.c b/test/dm/mux-cmd.c index 11c237b5da9..d4bb8befa38 100644 --- a/test/dm/mux-cmd.c +++ b/test/dm/mux-cmd.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Texas Instruments Inc. * Pratyush Yadav */ -#include #include #include #include @@ -13,6 +12,7 @@ #include #include #include +#include #define BUF_SIZE 256 diff --git a/test/dm/mux-emul.c b/test/dm/mux-emul.c index c6aeeb7e1f1..febd521104a 100644 --- a/test/dm/mux-emul.c +++ b/test/dm/mux-emul.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ * Pratyush Yadav */ -#include #include #include #include diff --git a/test/dm/mux-mmio.c b/test/dm/mux-mmio.c index 27c881dabde..3a871a19c7e 100644 --- a/test/dm/mux-mmio.c +++ b/test/dm/mux-mmio.c @@ -4,7 +4,6 @@ * Jean-Jacques Hiblot */ -#include #include #include #include diff --git a/test/dm/nop.c b/test/dm/nop.c index f7d9a0f3df3..0c79431d9d8 100644 --- a/test/dm/nop.c +++ b/test/dm/nop.c @@ -6,7 +6,6 @@ * Jean-Jacques Hiblot */ -#include #include #include #include diff --git a/test/dm/nvmxip.c b/test/dm/nvmxip.c index f0ad47d4efe..537959a0930 100644 --- a/test/dm/nvmxip.c +++ b/test/dm/nvmxip.c @@ -8,7 +8,6 @@ * Abdellatif El Khlifi */ -#include #include #include #include diff --git a/test/dm/of_extra.c b/test/dm/of_extra.c index ac2d886892d..3c31bfcd31f 100644 --- a/test/dm/of_extra.c +++ b/test/dm/of_extra.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/of_platdata.c b/test/dm/of_platdata.c index a241c427936..d4939e88516 100644 --- a/test/dm/of_platdata.c +++ b/test/dm/of_platdata.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c index a5bc43aea4e..39191d7f52b 100644 --- a/test/dm/ofnode.c +++ b/test/dm/ofnode.c @@ -16,7 +16,6 @@ * behaviour of each ofnode function, since that is done by the normal ones. */ -#include #include #include #include diff --git a/test/dm/ofread.c b/test/dm/ofread.c index 3523860d2b3..69d03c49107 100644 --- a/test/dm/ofread.c +++ b/test/dm/ofread.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include diff --git a/test/dm/osd.c b/test/dm/osd.c index 6279b391ca5..cf4a3a545ed 100644 --- a/test/dm/osd.c +++ b/test/dm/osd.c @@ -4,7 +4,6 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ -#include #include #include #include diff --git a/test/dm/p2sb.c b/test/dm/p2sb.c index df24709141a..3ada1fcb362 100644 --- a/test/dm/p2sb.c +++ b/test/dm/p2sb.c @@ -5,7 +5,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/test/dm/panel.c b/test/dm/panel.c index 4d435a0d255..8be7c397a46 100644 --- a/test/dm/panel.c +++ b/test/dm/panel.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/part.c b/test/dm/part.c index d6e43458127..cabb31d18ca 100644 --- a/test/dm/part.c +++ b/test/dm/part.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Sean Anderson */ -#include #include #include #include diff --git a/test/dm/pch.c b/test/dm/pch.c index 53f7bbf180c..b37b856d5da 100644 --- a/test/dm/pch.c +++ b/test/dm/pch.c @@ -3,7 +3,6 @@ * Copyright 2018 Google LLC */ -#include #include #include #include diff --git a/test/dm/pci.c b/test/dm/pci.c index 8c5e7da9e62..9b97f2e0544 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/pci_ep.c b/test/dm/pci_ep.c index 9941abd4ceb..e82fc53f84b 100644 --- a/test/dm/pci_ep.c +++ b/test/dm/pci_ep.c @@ -3,7 +3,6 @@ * Copyright (C) 2019 Ramon Fried */ -#include #include #include #include diff --git a/test/dm/phy.c b/test/dm/phy.c index 0cf3689fdec..d14117f6f7a 100644 --- a/test/dm/phy.c +++ b/test/dm/phy.c @@ -4,7 +4,6 @@ * Written by Jean-Jacques Hiblot */ -#include #include #include #include diff --git a/test/dm/phys2bus.c b/test/dm/phys2bus.c index 342f2fa8eba..1ee2150482c 100644 --- a/test/dm/phys2bus.c +++ b/test/dm/phys2bus.c @@ -3,7 +3,6 @@ * Copyright (c) 2020 Nicolas Saenz Julienne */ -#include #include #include #include diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c index 6880b2d2cd9..cfbe3ef5d1e 100644 --- a/test/dm/pinmux.c +++ b/test/dm/pinmux.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Sean Anderson */ -#include #include #include #include diff --git a/test/dm/pmc.c b/test/dm/pmc.c index e70227e7800..bbad1ee2741 100644 --- a/test/dm/pmc.c +++ b/test/dm/pmc.c @@ -5,7 +5,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/test/dm/pmic.c b/test/dm/pmic.c index ce671202fbc..53a6f0369e8 100644 --- a/test/dm/pmic.c +++ b/test/dm/pmic.c @@ -6,7 +6,6 @@ * Przemyslaw Marczak */ -#include #include #include #include diff --git a/test/dm/power-domain.c b/test/dm/power-domain.c index 8604b5d72dc..120a9059c8e 100644 --- a/test/dm/power-domain.c +++ b/test/dm/power-domain.c @@ -3,7 +3,6 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ -#include #include #include #include diff --git a/test/dm/pwm.c b/test/dm/pwm.c index dff626c771a..80133347ec7 100644 --- a/test/dm/pwm.c +++ b/test/dm/pwm.c @@ -3,7 +3,6 @@ * Copyright (C) 2017 Google, Inc */ -#include #include #include #include diff --git a/test/dm/qfw.c b/test/dm/qfw.c index f3f35689830..3c354163ef3 100644 --- a/test/dm/qfw.c +++ b/test/dm/qfw.c @@ -3,7 +3,6 @@ * Copyright 2021 Asherah Connor */ -#include #include #include #include diff --git a/test/dm/ram.c b/test/dm/ram.c index f624343138d..188c7c32758 100644 --- a/test/dm/ram.c +++ b/test/dm/ram.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/read.c b/test/dm/read.c index 7768aa29688..4ecf18110d0 100644 --- a/test/dm/read.c +++ b/test/dm/read.c @@ -3,7 +3,6 @@ * Copyright (c) 2020 Nicolas Saenz Julienne */ -#include #include #include #include diff --git a/test/dm/reboot-mode.c b/test/dm/reboot-mode.c index fbb9c3a5426..160b4da07f2 100644 --- a/test/dm/reboot-mode.c +++ b/test/dm/reboot-mode.c @@ -3,7 +3,6 @@ * (C) 2018 Theobroma Systems Design und Consulting GmbH */ -#include #include #include #include diff --git a/test/dm/regmap.c b/test/dm/regmap.c index 8560f2afc2d..1398f8f6573 100644 --- a/test/dm/regmap.c +++ b/test/dm/regmap.c @@ -3,13 +3,13 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include #include #include #include +#include #include #include #include diff --git a/test/dm/regulator.c b/test/dm/regulator.c index 86f4862d9dd..9e45fd177b9 100644 --- a/test/dm/regulator.c +++ b/test/dm/regulator.c @@ -6,7 +6,6 @@ * Przemyslaw Marczak */ -#include #include #include #include diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c index f6f9e509e27..ef9e8e5a0df 100644 --- a/test/dm/remoteproc.c +++ b/test/dm/remoteproc.c @@ -3,7 +3,8 @@ * (C) Copyright 2015 * Texas Instruments Incorporated - https://www.ti.com/ */ -#include + +#include #include #include #include diff --git a/test/dm/reset.c b/test/dm/reset.c index e2d6f456230..d3158bf4a72 100644 --- a/test/dm/reset.c +++ b/test/dm/reset.c @@ -3,7 +3,6 @@ * Copyright (c) 2016, NVIDIA CORPORATION. */ -#include #include #include #include diff --git a/test/dm/rkmtd.c b/test/dm/rkmtd.c index 3c3e8efa92f..3dc9ca1add1 100644 --- a/test/dm/rkmtd.c +++ b/test/dm/rkmtd.c @@ -8,7 +8,6 @@ * Copyright (C) 2023 Johan Jonker */ -#include #include #include #include diff --git a/test/dm/rng.c b/test/dm/rng.c index 6d1f68848d5..c8ed6cadf58 100644 --- a/test/dm/rng.c +++ b/test/dm/rng.c @@ -3,7 +3,6 @@ * Copyright (c) 2019, Linaro Limited */ -#include #include #include #include diff --git a/test/dm/rtc.c b/test/dm/rtc.c index bf97dbbd2f9..a8aa41955c2 100644 --- a/test/dm/rtc.c +++ b/test/dm/rtc.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/scmi.c b/test/dm/scmi.c index adf36ffaab1..69fc900e342 100644 --- a/test/dm/scmi.c +++ b/test/dm/scmi.c @@ -12,7 +12,6 @@ * unknown SCMI protocol ID. */ -#include #include #include #include diff --git a/test/dm/scsi.c b/test/dm/scsi.c index 380cfc88bab..5180159fb27 100644 --- a/test/dm/scsi.c +++ b/test/dm/scsi.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/serial.c b/test/dm/serial.c index 34b783e062e..34c0d4db879 100644 --- a/test/dm/serial.c +++ b/test/dm/serial.c @@ -3,7 +3,6 @@ * Copyright (c) 2018, STMicroelectronics */ -#include #include #include #include diff --git a/test/dm/sf.c b/test/dm/sf.c index 17d43fef3bc..0e3a0f13f9e 100644 --- a/test/dm/sf.c +++ b/test/dm/sf.c @@ -3,7 +3,6 @@ * Copyright (C) 2013 Google, Inc */ -#include #include #include #include diff --git a/test/dm/simple-bus.c b/test/dm/simple-bus.c index 3530b47fac2..8a730ba2fce 100644 --- a/test/dm/simple-bus.c +++ b/test/dm/simple-bus.c @@ -3,7 +3,6 @@ * Copyright (C) 2021, Bin Meng */ -#include #include #include #include diff --git a/test/dm/simple-pm-bus.c b/test/dm/simple-pm-bus.c index 792c7450580..9949cb34d59 100644 --- a/test/dm/simple-pm-bus.c +++ b/test/dm/simple-pm-bus.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Sean Anderson */ -#include #include #include #include diff --git a/test/dm/sm.c b/test/dm/sm.c index 7ebb0c9c85e..4d95c2ad75b 100644 --- a/test/dm/sm.c +++ b/test/dm/sm.c @@ -5,7 +5,6 @@ * Author: Alexey Romanov */ -#include #include #include #include diff --git a/test/dm/smem.c b/test/dm/smem.c index 289fb59ba13..adcbfe574ab 100644 --- a/test/dm/smem.c +++ b/test/dm/smem.c @@ -3,7 +3,6 @@ * Copyright (C) 2018 Ramon Fried */ -#include #include #include #include diff --git a/test/dm/soc.c b/test/dm/soc.c index 8f6c97fa790..cb0ac1545f7 100644 --- a/test/dm/soc.c +++ b/test/dm/soc.c @@ -6,7 +6,6 @@ * Dave Gerlach */ -#include #include #include #include diff --git a/test/dm/sound.c b/test/dm/sound.c index 15d545ab5a3..f4e6215e683 100644 --- a/test/dm/sound.c +++ b/test/dm/sound.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/spi.c b/test/dm/spi.c index 325799bbf10..1ab2dd78324 100644 --- a/test/dm/spi.c +++ b/test/dm/spi.c @@ -3,7 +3,6 @@ * Copyright (C) 2013 Google, Inc */ -#include #include #include #include diff --git a/test/dm/spmi.c b/test/dm/spmi.c index 97bb0eb30fc..e10ae8db4d3 100644 --- a/test/dm/spmi.c +++ b/test/dm/spmi.c @@ -3,7 +3,6 @@ * (C) Copyright 2015 Mateusz Kulikowski */ -#include #include #include #include diff --git a/test/dm/syscon-reset.c b/test/dm/syscon-reset.c index eeaddf88392..ba19504573f 100644 --- a/test/dm/syscon-reset.c +++ b/test/dm/syscon-reset.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Sean Anderson */ -#include #include #include #include diff --git a/test/dm/syscon.c b/test/dm/syscon.c index be232972336..04d324e87d4 100644 --- a/test/dm/syscon.c +++ b/test/dm/syscon.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/sysinfo-gpio.c b/test/dm/sysinfo-gpio.c index 2e494b3f341..24a99dafb15 100644 --- a/test/dm/sysinfo-gpio.c +++ b/test/dm/sysinfo-gpio.c @@ -3,7 +3,6 @@ * Copyright (C) 2021 Sean Anderson */ -#include #include #include #include diff --git a/test/dm/sysinfo.c b/test/dm/sysinfo.c index 96b3a8ebaba..7444a580df6 100644 --- a/test/dm/sysinfo.c +++ b/test/dm/sysinfo.c @@ -4,7 +4,6 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ -#include #include #include #include diff --git a/test/dm/sysreset.c b/test/dm/sysreset.c index 5aa69e04618..f3a859be787 100644 --- a/test/dm/sysreset.c +++ b/test/dm/sysreset.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/tag.c b/test/dm/tag.c index 8ae8a1fcd65..bce8a35acfb 100644 --- a/test/dm/tag.c +++ b/test/dm/tag.c @@ -6,7 +6,6 @@ * Author: AKASHI Takahiro */ -#include #include #include /* DM_TEST() */ #include /* struct unit_test_state */ diff --git a/test/dm/tee.c b/test/dm/tee.c index 7a11bf89138..bb02a9b3c98 100644 --- a/test/dm/tee.c +++ b/test/dm/tee.c @@ -3,7 +3,6 @@ * Copyright (C) 2018 Linaro Limited */ -#include #include #include #include diff --git a/test/dm/test-dm.c b/test/dm/test-dm.c index e73a1dd8f81..4bc2c45db61 100644 --- a/test/dm/test-dm.c +++ b/test/dm/test-dm.c @@ -3,7 +3,6 @@ * Copyright (c) 2013 Google, Inc */ -#include #include #include diff --git a/test/dm/test-driver.c b/test/dm/test-driver.c index 02cb974b0f7..851177c3018 100644 --- a/test/dm/test-driver.c +++ b/test/dm/test-driver.c @@ -6,7 +6,6 @@ * Pavel Herrmann */ -#include #include #include #include diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c index 72d0eb57e21..18c89eef43f 100644 --- a/test/dm/test-fdt.c +++ b/test/dm/test-fdt.c @@ -3,7 +3,6 @@ * Copyright (c) 2013 Google, Inc */ -#include #include #include #include diff --git a/test/dm/test-uclass.c b/test/dm/test-uclass.c index 067701734a0..9a80cc63667 100644 --- a/test/dm/test-uclass.c +++ b/test/dm/test-uclass.c @@ -6,7 +6,6 @@ * Pavel Herrmann */ -#include #include #include #include diff --git a/test/dm/timer.c b/test/dm/timer.c index 9f94d476920..7fcefc42e59 100644 --- a/test/dm/timer.c +++ b/test/dm/timer.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Thomas Chou */ -#include #include #include #include diff --git a/test/dm/tpm.c b/test/dm/tpm.c index cde933ab284..0e413c0eedd 100644 --- a/test/dm/tpm.c +++ b/test/dm/tpm.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/usb.c b/test/dm/usb.c index 7671ef156d8..9a571938b81 100644 --- a/test/dm/usb.c +++ b/test/dm/usb.c @@ -3,7 +3,6 @@ * Copyright (C) 2015 Google, Inc */ -#include #include #include #include diff --git a/test/dm/video.c b/test/dm/video.c index d907f681600..7dfbeb9555d 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/dm/virtio.c b/test/dm/virtio.c index 3e108cdc35d..3efd7c74f42 100644 --- a/test/dm/virtio.c +++ b/test/dm/virtio.c @@ -3,7 +3,6 @@ * Copyright (C) 2018, Bin Meng */ -#include #include #include #include diff --git a/test/dm/virtio_device.c b/test/dm/virtio_device.c index fdda4da4178..63dc53415b7 100644 --- a/test/dm/virtio_device.c +++ b/test/dm/virtio_device.c @@ -3,7 +3,6 @@ * Copyright (C) 2018, Bin Meng */ -#include #include #include #include diff --git a/test/dm/virtio_rng.c b/test/dm/virtio_rng.c index 8b9a04b1fde..ab7d862d79e 100644 --- a/test/dm/virtio_rng.c +++ b/test/dm/virtio_rng.c @@ -4,7 +4,6 @@ * Written by Andrew Scull */ -#include #include #include #include diff --git a/test/dm/wdt.c b/test/dm/wdt.c index 2bbebcdbf28..1df2da23c6c 100644 --- a/test/dm/wdt.c +++ b/test/dm/wdt.c @@ -3,9 +3,9 @@ * Copyright 2017 Google, Inc */ -#include #include #include +#include #include #include #include diff --git a/test/env/attr.c b/test/env/attr.c index 8d5c0f1c3df..de5d5d4ee27 100644 --- a/test/env/attr.c +++ b/test/env/attr.c @@ -4,7 +4,6 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ -#include #include #include #include diff --git a/test/env/cmd_ut_env.c b/test/env/cmd_ut_env.c index d65a32179ce..13e0998341e 100644 --- a/test/env/cmd_ut_env.c +++ b/test/env/cmd_ut_env.c @@ -4,7 +4,6 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ -#include #include #include #include diff --git a/test/env/fdt.c b/test/env/fdt.c index 30bfa88c355..c495ac7b307 100644 --- a/test/env/fdt.c +++ b/test/env/fdt.c @@ -1,4 +1,3 @@ -#include #include #include #include diff --git a/test/env/hashtable.c b/test/env/hashtable.c index 70102f9121c..ccdf0138c4b 100644 --- a/test/env/hashtable.c +++ b/test/env/hashtable.c @@ -4,11 +4,11 @@ * Roman Kapl, SYSGO, rka@sysgo.com */ -#include #include #include #include #include +#include #include #include diff --git a/test/fuzz/cmd_fuzz.c b/test/fuzz/cmd_fuzz.c index d0bc7b8d7b7..faa140433ff 100644 --- a/test/fuzz/cmd_fuzz.c +++ b/test/fuzz/cmd_fuzz.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/test/fuzz/virtio.c b/test/fuzz/virtio.c index 8a47667e778..836eb9a2f66 100644 --- a/test/fuzz/virtio.c +++ b/test/fuzz/virtio.c @@ -4,7 +4,6 @@ * Written by Andrew Scull */ -#include #include #include #include diff --git a/test/image/spl_load.c b/test/image/spl_load.c index e1036eff28c..7cbad40ea0c 100644 --- a/test/image/spl_load.c +++ b/test/image/spl_load.c @@ -3,7 +3,6 @@ * Copyright (C) 2023 Sean Anderson */ -#include #include #include #include diff --git a/test/image/spl_load_fs.c b/test/image/spl_load_fs.c index a89189e1124..935078bf67b 100644 --- a/test/image/spl_load_fs.c +++ b/test/image/spl_load_fs.c @@ -3,7 +3,6 @@ * Copyright (C) 2023 Sean Anderson */ -#include #include #include #include diff --git a/test/image/spl_load_net.c b/test/image/spl_load_net.c index 9d067a7a592..4af6e21b8b9 100644 --- a/test/image/spl_load_net.c +++ b/test/image/spl_load_net.c @@ -3,7 +3,6 @@ * Copyright (C) 2023 Sean Anderson */ -#include #include #include #include diff --git a/test/image/spl_load_nor.c b/test/image/spl_load_nor.c index de5686343b9..f53a6724e27 100644 --- a/test/image/spl_load_nor.c +++ b/test/image/spl_load_nor.c @@ -3,7 +3,6 @@ * Copyright (C) 2023 Sean Anderson */ -#include #include #include #include diff --git a/test/image/spl_load_os.c b/test/image/spl_load_os.c index 26228a8a4a9..7d5fb9b07e0 100644 --- a/test/image/spl_load_os.c +++ b/test/image/spl_load_os.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/image/spl_load_spi.c b/test/image/spl_load_spi.c index 54a95465e23..80836dc0dff 100644 --- a/test/image/spl_load_spi.c +++ b/test/image/spl_load_spi.c @@ -3,7 +3,6 @@ * Copyright (C) 2023 Sean Anderson */ -#include #include #include #include diff --git a/test/lib/abuf.c b/test/lib/abuf.c index 42803b20e2a..7c0481ab610 100644 --- a/test/lib/abuf.c +++ b/test/lib/abuf.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/lib/asn1.c b/test/lib/asn1.c index a66cdd77df0..4842b7058ac 100644 --- a/test/lib/asn1.c +++ b/test/lib/asn1.c @@ -6,7 +6,6 @@ * Unit test for asn1 compiler and asn1 decoder function via various parsers */ -#include #include #include #include diff --git a/test/lib/cmd_ut_lib.c b/test/lib/cmd_ut_lib.c index f1ac015b2c8..f98cb9b3c57 100644 --- a/test/lib/cmd_ut_lib.c +++ b/test/lib/cmd_ut_lib.c @@ -5,7 +5,6 @@ * Unit tests for library functions */ -#include #include #include #include diff --git a/test/lib/efi_device_path.c b/test/lib/efi_device_path.c index 24e2f23c5af..290c8768fa4 100644 --- a/test/lib/efi_device_path.c +++ b/test/lib/efi_device_path.c @@ -5,7 +5,6 @@ * Copyright (c) 2020 Heinrich Schuchardt */ -#include #include #include #include diff --git a/test/lib/efi_image_region.c b/test/lib/efi_image_region.c index 0b888f84337..3ca49dc4a2e 100644 --- a/test/lib/efi_image_region.c +++ b/test/lib/efi_image_region.c @@ -3,7 +3,6 @@ * (C) Copyright 2020, Heinrich Schuchardt */ -#include #include #include #include diff --git a/test/lib/getopt.c b/test/lib/getopt.c index 3c68b93c8a5..388a076200b 100644 --- a/test/lib/getopt.c +++ b/test/lib/getopt.c @@ -6,7 +6,6 @@ * posix/tst-getopt-cancel.c */ -#include #include #include #include diff --git a/test/lib/hexdump.c b/test/lib/hexdump.c index 5dccf438866..d531a830398 100644 --- a/test/lib/hexdump.c +++ b/test/lib/hexdump.c @@ -4,7 +4,6 @@ * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc */ -#include #include #include #include diff --git a/test/lib/kconfig.c b/test/lib/kconfig.c index 3914f699659..0c463bb794a 100644 --- a/test/lib/kconfig.c +++ b/test/lib/kconfig.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/lib/kconfig_spl.c b/test/lib/kconfig_spl.c index 8f8a3411b14..3bd8abdf4b8 100644 --- a/test/lib/kconfig_spl.c +++ b/test/lib/kconfig_spl.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/lib/lmb.c b/test/lib/lmb.c index 7e4368de22e..4b5b6e5e209 100644 --- a/test/lib/lmb.c +++ b/test/lib/lmb.c @@ -3,7 +3,6 @@ * (C) Copyright 2018 Simon Goldschmidt */ -#include #include #include #include diff --git a/test/lib/longjmp.c b/test/lib/longjmp.c index 201367a5a3a..79d889bdd5f 100644 --- a/test/lib/longjmp.c +++ b/test/lib/longjmp.c @@ -5,7 +5,6 @@ * Copyright (c) 2021, Heinrich Schuchardt */ -#include #include #include #include diff --git a/test/lib/rsa.c b/test/lib/rsa.c index 44f8ade226f..40f70010c78 100644 --- a/test/lib/rsa.c +++ b/test/lib/rsa.c @@ -6,7 +6,6 @@ * Unit test for rsa_verify() function */ -#include #include #include #include diff --git a/test/lib/sscanf.c b/test/lib/sscanf.c index 772e4b92042..9fe5521749f 100644 --- a/test/lib/sscanf.c +++ b/test/lib/sscanf.c @@ -9,7 +9,6 @@ * Unit tests for sscanf() function */ -#include #include #include #include diff --git a/test/lib/string.c b/test/lib/string.c index 5dcf4d6db00..d08dbca9291 100644 --- a/test/lib/string.c +++ b/test/lib/string.c @@ -9,7 +9,6 @@ * This has to be considered in testing. */ -#include #include #include #include diff --git a/test/lib/strlcat.c b/test/lib/strlcat.c index d8453fe78e2..d1a0293271b 100644 --- a/test/lib/strlcat.c +++ b/test/lib/strlcat.c @@ -6,7 +6,6 @@ * These tests adapted from glibc's string/test-strncat.c */ -#include #include #include #include diff --git a/test/lib/test_aes.c b/test/lib/test_aes.c index cbc712f7eda..cfd9d8ca5a9 100644 --- a/test/lib/test_aes.c +++ b/test/lib/test_aes.c @@ -5,7 +5,6 @@ * Unit tests for aes functions */ -#include #include #include #include diff --git a/test/lib/test_crypt.c b/test/lib/test_crypt.c index fb21edf9748..dcdadd992c1 100644 --- a/test/lib/test_crypt.c +++ b/test/lib/test_crypt.c @@ -5,7 +5,6 @@ * Unit test for crypt-style password hashing */ -#include #include #include #include diff --git a/test/lib/test_errno_str.c b/test/lib/test_errno_str.c index 8a9f1fd9805..67f76442b27 100644 --- a/test/lib/test_errno_str.c +++ b/test/lib/test_errno_str.c @@ -9,7 +9,6 @@ * This has to be considered in testing. */ -#include #include #include #include diff --git a/test/lib/test_print.c b/test/lib/test_print.c index 79b67c77932..c7fc50a1de1 100644 --- a/test/lib/test_print.c +++ b/test/lib/test_print.c @@ -5,7 +5,6 @@ * Copyright 2020, Heinrich Schuchadt */ -#include #include #include #include diff --git a/test/lib/uuid.c b/test/lib/uuid.c index e24331a1366..0914f2c47e7 100644 --- a/test/lib/uuid.c +++ b/test/lib/uuid.c @@ -8,7 +8,6 @@ * Abdellatif El Khlifi */ -#include #include #include #include diff --git a/test/log/cont_test.c b/test/log/cont_test.c index de7b7f064cd..036d44b9d73 100644 --- a/test/log/cont_test.c +++ b/test/log/cont_test.c @@ -5,7 +5,6 @@ * Test continuation of log messages. */ -#include #include #include #include diff --git a/test/log/log_filter.c b/test/log/log_filter.c index b644b40a850..9cc891dc48c 100644 --- a/test/log/log_filter.c +++ b/test/log/log_filter.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Sean Anderson */ -#include #include #include #include diff --git a/test/log/log_test.c b/test/log/log_test.c index c5abff80d11..855353a9c40 100644 --- a/test/log/log_test.c +++ b/test/log/log_test.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/log/log_ut.c b/test/log/log_ut.c index 5aa3a184004..6617ed8b152 100644 --- a/test/log/log_ut.c +++ b/test/log/log_ut.c @@ -5,7 +5,6 @@ * Logging function tests. */ -#include #include #include #include diff --git a/test/log/nolog_ndebug.c b/test/log/nolog_ndebug.c index bd9a4f408e7..b714a16d2e7 100644 --- a/test/log/nolog_ndebug.c +++ b/test/log/nolog_ndebug.c @@ -5,7 +5,6 @@ * Logging function tests for CONFIG_LOG=n without #define DEBUG */ -#include #include #include #include diff --git a/test/log/nolog_test.c b/test/log/nolog_test.c index 4e52e5bed82..c4c0fa6cf81 100644 --- a/test/log/nolog_test.c +++ b/test/log/nolog_test.c @@ -8,7 +8,6 @@ /* Needed for testing log_debug() */ #define DEBUG 1 -#include #include #include #include diff --git a/test/log/pr_cont_test.c b/test/log/pr_cont_test.c index df4520d2807..30f30d98fe1 100644 --- a/test/log/pr_cont_test.c +++ b/test/log/pr_cont_test.c @@ -5,7 +5,6 @@ * Test continuation of log messages using pr_cont(). */ -#include #include #include #include diff --git a/test/log/syslog_test.c b/test/log/syslog_test.c index 4db649db822..c4180f775b9 100644 --- a/test/log/syslog_test.c +++ b/test/log/syslog_test.c @@ -10,7 +10,6 @@ /* Override CONFIG_LOG_MAX_LEVEL */ #define LOG_DEBUG -#include #include #include #include diff --git a/test/log/syslog_test_ndebug.c b/test/log/syslog_test_ndebug.c index 4438791044d..b10e636812b 100644 --- a/test/log/syslog_test_ndebug.c +++ b/test/log/syslog_test_ndebug.c @@ -7,7 +7,6 @@ * Invoke the test with: ./u-boot -d arch/sandbox/dts/test.dtb */ -#include #include #include #include diff --git a/test/optee/cmd_ut_optee.c b/test/optee/cmd_ut_optee.c index c3887ab11d9..c6f50e0995a 100644 --- a/test/optee/cmd_ut_optee.c +++ b/test/optee/cmd_ut_optee.c @@ -3,7 +3,6 @@ * Copyright (C) 2019, Theobroma Systems Design und Consulting GmbH */ -#include #include #include #include diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c index 56a3df17138..bcb29a26e21 100644 --- a/test/overlay/cmd_ut_overlay.c +++ b/test/overlay/cmd_ut_overlay.c @@ -4,7 +4,6 @@ * Copyright (c) 2016 Free Electrons */ -#include #include #include #include diff --git a/test/print_ut.c b/test/print_ut.c index bb844d2542b..bded2b6ebe5 100644 --- a/test/print_ut.c +++ b/test/print_ut.c @@ -3,7 +3,6 @@ * Copyright (c) 2012, The Chromium Authors */ -#include #include #include #include diff --git a/test/stdint/int-types.c b/test/stdint/int-types.c index f6d09e8643d..9051e32c7ce 100644 --- a/test/stdint/int-types.c +++ b/test/stdint/int-types.c @@ -1,4 +1,4 @@ -#include +#include int test_types(void) { diff --git a/test/str_ut.c b/test/str_ut.c index fa9328ede50..389779859a3 100644 --- a/test/str_ut.c +++ b/test/str_ut.c @@ -3,7 +3,6 @@ * Copyright 2020 Google LLC */ -#include #include #include #include diff --git a/test/test-main.c b/test/test-main.c index b7015d9f38d..3fa6f6e32ec 100644 --- a/test/test-main.c +++ b/test/test-main.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/time_ut.c b/test/time_ut.c index 80b82dbfd83..149c4b58f4a 100644 --- a/test/time_ut.c +++ b/test/time_ut.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/test/unicode_ut.c b/test/unicode_ut.c index 47c3f52774c..13e29c9b9e3 100644 --- a/test/unicode_ut.c +++ b/test/unicode_ut.c @@ -5,7 +5,6 @@ * Copyright (c) 2018 Heinrich Schuchardt */ -#include #include #include #include diff --git a/test/ut.c b/test/ut.c index 628e9dc9805..ae99831ac8f 100644 --- a/test/ut.c +++ b/test/ut.c @@ -5,7 +5,6 @@ * Copyright (c) 2013 Google, Inc */ -#include #include #include #ifdef CONFIG_SANDBOX -- cgit v1.3.1 From 301bac6047c85e2c5e39929805ca661bb09a7481 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:10:59 -0600 Subject: cmd: Remove and add needed includes Remove from all "cmd/" files and when needed add missing include files directly. Signed-off-by: Tom Rini --- cmd/2048.c | 2 +- cmd/ab_select.c | 1 - cmd/abootimg.c | 1 - cmd/acpi.c | 2 +- cmd/adc.c | 1 - cmd/addrmap.c | 1 - cmd/adtimg.c | 2 +- cmd/aes.c | 2 +- cmd/arm/exception64.c | 1 - cmd/armffa.c | 1 - cmd/armflash.c | 2 +- cmd/axi.c | 1 - cmd/bcb.c | 2 +- cmd/bdinfo.c | 1 - cmd/bind.c | 1 - cmd/binop.c | 2 +- cmd/blk_common.c | 2 +- cmd/blkcache.c | 2 +- cmd/blkmap.c | 1 - cmd/blob.c | 2 +- cmd/bloblist.c | 1 - cmd/bmp.c | 1 - cmd/boot.c | 2 +- cmd/bootcount.c | 1 - cmd/bootdev.c | 1 - cmd/bootflow.c | 1 - cmd/booti.c | 1 - cmd/bootm.c | 1 - cmd/bootmenu.c | 1 - cmd/bootmeth.c | 1 - cmd/bootstage.c | 2 +- cmd/bootz.c | 1 - cmd/broadcom/chimp_boot.c | 1 - cmd/broadcom/chimp_handshake.c | 1 - cmd/broadcom/nitro_image_load.c | 2 +- cmd/btrfs.c | 1 - cmd/button.c | 1 - cmd/cache.c | 1 - cmd/cat.c | 1 - cmd/cbfs.c | 2 +- cmd/cedit.c | 1 - cmd/clk.c | 1 - cmd/clone.c | 2 +- cmd/cls.c | 1 - cmd/config.c | 1 - cmd/conitrace.c | 1 - cmd/console.c | 1 - cmd/cpu.c | 1 - cmd/cramfs.c | 1 - cmd/cros_ec.c | 1 - cmd/cyclic.c | 3 ++- cmd/date.c | 1 - cmd/demo.c | 1 - cmd/dfu.c | 1 - cmd/diag.c | 1 - cmd/disk.c | 1 - cmd/dm.c | 1 - cmd/echo.c | 1 - cmd/eeprom.c | 2 +- cmd/efi.c | 1 - cmd/efi_common.c | 1 - cmd/eficonfig.c | 1 - cmd/eficonfig_sbkey.c | 1 - cmd/efidebug.c | 1 - cmd/elf.c | 1 - cmd/ethsw.c | 2 +- cmd/event.c | 1 - cmd/exit.c | 2 +- cmd/ext2.c | 1 - cmd/ext4.c | 1 - cmd/extension_board.c | 1 - cmd/fastboot.c | 1 - cmd/fat.c | 1 - cmd/fdt.c | 1 - cmd/flash.c | 2 +- cmd/font.c | 1 - cmd/fpga.c | 1 - cmd/fpgad.c | 2 +- cmd/fs.c | 1 - cmd/fs_uuid.c | 1 - cmd/fuse.c | 2 +- cmd/gettime.c | 2 +- cmd/gpio.c | 1 - cmd/gpt.c | 1 - cmd/hash.c | 1 - cmd/help.c | 1 - cmd/history.c | 1 - cmd/host.c | 1 - cmd/i2c.c | 1 - cmd/ide.c | 1 - cmd/ini.c | 2 +- cmd/io.c | 2 +- cmd/iotrace.c | 2 +- cmd/irq.c | 1 - cmd/itest.c | 2 +- cmd/jffs2.c | 1 - cmd/kaslrseed.c | 1 - cmd/led.c | 1 - cmd/legacy-mtd-utils.c | 1 - cmd/legacy_led.c | 3 +-- cmd/license.c | 1 - cmd/load.c | 1 - cmd/log.c | 1 - cmd/lsblk.c | 1 - cmd/lzmadec.c | 2 +- cmd/mbr.c | 2 +- cmd/mdio.c | 1 - cmd/mem.c | 2 +- cmd/meson/sm.c | 2 +- cmd/mii.c | 1 - cmd/misc.c | 1 - cmd/mmc.c | 2 +- cmd/mp.c | 2 +- cmd/mtd.c | 1 - cmd/mtdparts.c | 1 - cmd/mux.c | 1 - cmd/mvebu/bubt.c | 1 - cmd/mvebu/comphy_rx_training.c | 1 - cmd/nand.c | 1 - cmd/net.c | 1 - cmd/nvedit.c | 2 +- cmd/nvedit_efi.c | 1 - cmd/nvme.c | 1 - cmd/onenand.c | 1 - cmd/optee_rpmb.c | 1 - cmd/osd.c | 1 - cmd/panic.c | 2 +- cmd/part.c | 1 - cmd/pcap.c | 2 +- cmd/pci.c | 1 - cmd/pci_mps.c | 1 - cmd/pinmux.c | 1 - cmd/pmc.c | 1 - cmd/pmic.c | 1 - cmd/printf.c | 2 +- cmd/pvblock.c | 1 - cmd/pxe.c | 2 +- cmd/qfw.c | 1 - cmd/read.c | 2 +- cmd/reginfo.c | 1 - cmd/regulator.c | 1 - cmd/remoteproc.c | 1 - cmd/riscv/sbi.c | 1 - cmd/rkmtd.c | 1 - cmd/rng.c | 1 - cmd/rockusb.c | 1 - cmd/rtc.c | 1 - cmd/sata.c | 1 - cmd/sb.c | 1 - cmd/scp03.c | 1 - cmd/scsi.c | 1 - cmd/seama.c | 1 - cmd/setexpr.c | 3 ++- cmd/sf.c | 2 +- cmd/sha1sum.c | 1 - cmd/sleep.c | 3 ++- cmd/smccc.c | 2 +- cmd/sound.c | 1 - cmd/source.c | 1 - cmd/spi.c | 1 - cmd/spl.c | 1 - cmd/stackprot_test.c | 1 - cmd/strings.c | 2 +- cmd/sysboot.c | 2 +- cmd/temperature.c | 1 - cmd/terminal.c | 1 - cmd/test.c | 2 +- cmd/thordown.c | 1 - cmd/ti/ddr3.c | 1 - cmd/ti/pd.c | 1 - cmd/time.c | 1 - cmd/timer.c | 2 +- cmd/tlv_eeprom.c | 1 - cmd/tpm-common.c | 1 - cmd/tpm-v1.c | 2 +- cmd/tpm-v2.c | 1 - cmd/tpm_test.c | 2 +- cmd/trace.c | 2 +- cmd/tsi148.c | 2 +- cmd/ubi.c | 1 - cmd/ubifs.c | 2 +- cmd/ufs.c | 2 +- cmd/universe.c | 2 +- cmd/unlz4.c | 2 +- cmd/unzip.c | 2 +- cmd/usb.c | 1 - cmd/usb_gadget_sdp.c | 1 - cmd/usb_mass_storage.c | 1 - cmd/vbe.c | 1 - cmd/version.c | 1 - cmd/video.c | 1 - cmd/virtio.c | 1 - cmd/w1.c | 1 - cmd/wdt.c | 1 - cmd/wol.c | 2 +- cmd/x86/cbsysinfo.c | 1 - cmd/x86/fsp.c | 1 - cmd/x86/hob.c | 1 - cmd/x86/mtrr.c | 2 +- cmd/ximg.c | 1 - cmd/xxd.c | 1 - cmd/yaffs2.c | 1 - cmd/zfs.c | 1 - cmd/zip.c | 2 +- include/android_ab.h | 2 ++ 205 files changed, 65 insertions(+), 205 deletions(-) (limited to 'include') diff --git a/cmd/2048.c b/cmd/2048.c index fa60aa94aad..42cd171b0e4 100644 --- a/cmd/2048.c +++ b/cmd/2048.c @@ -3,10 +3,10 @@ /* Console version of the game "2048" for GNU/Linux */ -#include #include #include #include +#include #include #define SIZE 4 diff --git a/cmd/ab_select.c b/cmd/ab_select.c index bfb67b8236b..faeb83816e5 100644 --- a/cmd/ab_select.c +++ b/cmd/ab_select.c @@ -3,7 +3,6 @@ * Copyright (C) 2017 The Android Open Source Project */ -#include #include #include #include diff --git a/cmd/abootimg.c b/cmd/abootimg.c index 2653b555b10..88c77d99929 100644 --- a/cmd/abootimg.c +++ b/cmd/abootimg.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/cmd/acpi.c b/cmd/acpi.c index 928e5dc525e..094d9d4e858 100644 --- a/cmd/acpi.c +++ b/cmd/acpi.c @@ -3,7 +3,6 @@ * Copyright 2019 Google LLC * Written by Simon Glass */ -#include #include #include #include @@ -11,6 +10,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/cmd/adc.c b/cmd/adc.c index 4cb18b66d4a..f87f9785a11 100644 --- a/cmd/adc.c +++ b/cmd/adc.c @@ -3,7 +3,6 @@ * Copyright (C) 2018 BayLibre, SAS * Author: Neil Armstrong */ -#include #include #include #include diff --git a/cmd/addrmap.c b/cmd/addrmap.c index bd23549f3a5..f7e4d9206de 100644 --- a/cmd/addrmap.c +++ b/cmd/addrmap.c @@ -3,7 +3,6 @@ * Copyright (C) 2021, Bin Meng */ -#include #include #include diff --git a/cmd/adtimg.c b/cmd/adtimg.c index f4b5cbf35b9..53f33764fbe 100644 --- a/cmd/adtimg.c +++ b/cmd/adtimg.c @@ -7,8 +7,8 @@ #include #include +#include #include -#include #define OPT_INDEX "--index" diff --git a/cmd/aes.c b/cmd/aes.c index 1264675aa01..87ad1ab82b9 100644 --- a/cmd/aes.c +++ b/cmd/aes.c @@ -5,13 +5,13 @@ * Command for en/de-crypting block of memory with AES-[128/192/256]-CBC cipher. */ -#include #include #include #include #include #include #include +#include u32 aes_get_key_len(char *command) { diff --git a/cmd/arm/exception64.c b/cmd/arm/exception64.c index 589a23115b0..73d6c20ccac 100644 --- a/cmd/arm/exception64.c +++ b/cmd/arm/exception64.c @@ -5,7 +5,6 @@ * Copyright (c) 2018, Heinrich Schuchardt */ -#include #include #include diff --git a/cmd/armffa.c b/cmd/armffa.c index 9585150b962..181e31bc49a 100644 --- a/cmd/armffa.c +++ b/cmd/armffa.c @@ -5,7 +5,6 @@ * Authors: * Abdellatif El Khlifi */ -#include #include #include #include diff --git a/cmd/armflash.c b/cmd/armflash.c index fdaea5ad811..e292cf85c45 100644 --- a/cmd/armflash.c +++ b/cmd/armflash.c @@ -5,10 +5,10 @@ * * Support for ARM Flash Partitions */ -#include #include #include #include +#include #include #define MAX_REGIONS 4 diff --git a/cmd/axi.c b/cmd/axi.c index 5620891db28..3dbea0499de 100644 --- a/cmd/axi.c +++ b/cmd/axi.c @@ -9,7 +9,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include #include #include #include diff --git a/cmd/bcb.c b/cmd/bcb.c index f3b92564d10..fe6d6cb2c38 100644 --- a/cmd/bcb.c +++ b/cmd/bcb.c @@ -8,12 +8,12 @@ #include #include #include -#include #include #include #include #include #include +#include #include enum bcb_cmd { diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index 79106caeec2..437ac4e8630 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -6,7 +6,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/cmd/bind.c b/cmd/bind.c index be0d4d2a711..3a59eefd5c5 100644 --- a/cmd/bind.c +++ b/cmd/bind.c @@ -3,7 +3,6 @@ * Copyright (c) 2018 JJ Hiblot */ -#include #include #include #include diff --git a/cmd/binop.c b/cmd/binop.c index 592e9146901..10d91b5dbf2 100644 --- a/cmd/binop.c +++ b/cmd/binop.c @@ -1,11 +1,11 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include #include #include +#include #include enum { diff --git a/cmd/blk_common.c b/cmd/blk_common.c index 02ac92837b6..4c05a4e0610 100644 --- a/cmd/blk_common.c +++ b/cmd/blk_common.c @@ -8,10 +8,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include +#include int blk_common_cmd(int argc, char *const argv[], enum uclass_id uclass_id, int *cur_devnump) diff --git a/cmd/blkcache.c b/cmd/blkcache.c index 1456654df6f..dbd03df14dc 100644 --- a/cmd/blkcache.c +++ b/cmd/blkcache.c @@ -6,9 +6,9 @@ */ #include #include -#include #include #include +#include static int blkc_show(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/blkmap.c b/cmd/blkmap.c index ef74ebc0036..164f80f1387 100644 --- a/cmd/blkmap.c +++ b/cmd/blkmap.c @@ -6,7 +6,6 @@ #include #include -#include #include #include #include diff --git a/cmd/blob.c b/cmd/blob.c index 7c77c410d52..a3c1dc49224 100644 --- a/cmd/blob.c +++ b/cmd/blob.c @@ -4,9 +4,9 @@ * Command for encapsulating/decapsulating blob of memory. */ -#include #include #include +#include #include #include #if defined(CONFIG_ARCH_MX6) || defined(CONFIG_ARCH_MX7) || \ diff --git a/cmd/bloblist.c b/cmd/bloblist.c index 26548ecf847..333ae558142 100644 --- a/cmd/bloblist.c +++ b/cmd/bloblist.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/bmp.c b/cmd/bmp.c index 8f43a40dafd..3b618448624 100644 --- a/cmd/bmp.c +++ b/cmd/bmp.c @@ -8,7 +8,6 @@ * BMP handling routines */ -#include #include #include #include diff --git a/cmd/boot.c b/cmd/boot.c index 14839c1cedc..23496cafdf5 100644 --- a/cmd/boot.c +++ b/cmd/boot.c @@ -7,9 +7,9 @@ /* * Misc boot support */ -#include #include #include +#include #ifdef CONFIG_CMD_GO diff --git a/cmd/bootcount.c b/cmd/bootcount.c index 30ce5dba30d..5e3b66e676b 100644 --- a/cmd/bootcount.c +++ b/cmd/bootcount.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include diff --git a/cmd/bootdev.c b/cmd/bootdev.c index 471189cda48..fa7285ba25e 100644 --- a/cmd/bootdev.c +++ b/cmd/bootdev.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/bootflow.c b/cmd/bootflow.c index be5d7d8e743..1588f277a4a 100644 --- a/cmd/bootflow.c +++ b/cmd/bootflow.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/booti.c b/cmd/booti.c index b9637b3ec3d..62b19e83436 100644 --- a/cmd/booti.c +++ b/cmd/booti.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/cmd/bootm.c b/cmd/bootm.c index 9737a2d28c0..545b0c3d823 100644 --- a/cmd/bootm.c +++ b/cmd/bootm.c @@ -7,7 +7,6 @@ /* * Boot support */ -#include #include #include #include diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c index 78184fccab2..977a04b7d76 100644 --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c @@ -5,7 +5,6 @@ #include #include -#include #include #include #include diff --git a/cmd/bootmeth.c b/cmd/bootmeth.c index f5b01343c48..ebf8b7e2530 100644 --- a/cmd/bootmeth.c +++ b/cmd/bootmeth.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/bootstage.c b/cmd/bootstage.c index 77a4bc66ff4..5246924f39a 100644 --- a/cmd/bootstage.c +++ b/cmd/bootstage.c @@ -3,9 +3,9 @@ * Copyright (c) 2012, Google Inc. All rights reserved. */ -#include #include #include +#include static int do_bootstage_report(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/bootz.c b/cmd/bootz.c index b6bb4aae72d..55837a7599b 100644 --- a/cmd/bootz.c +++ b/cmd/bootz.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/cmd/broadcom/chimp_boot.c b/cmd/broadcom/chimp_boot.c index 16f2b612c4d..ae0a81179d0 100644 --- a/cmd/broadcom/chimp_boot.c +++ b/cmd/broadcom/chimp_boot.c @@ -3,7 +3,6 @@ * Copyright 2020 Broadcom */ -#include #include #include diff --git a/cmd/broadcom/chimp_handshake.c b/cmd/broadcom/chimp_handshake.c index a90a73a6d74..e2742671963 100644 --- a/cmd/broadcom/chimp_handshake.c +++ b/cmd/broadcom/chimp_handshake.c @@ -3,7 +3,6 @@ * Copyright 2020 Broadcom */ -#include #include #include diff --git a/cmd/broadcom/nitro_image_load.c b/cmd/broadcom/nitro_image_load.c index 93b5cb4cebe..289b184e9af 100644 --- a/cmd/broadcom/nitro_image_load.c +++ b/cmd/broadcom/nitro_image_load.c @@ -3,8 +3,8 @@ * Copyright 2020 Broadcom */ -#include #include +#include #define FW_IMAGE_SIG 0xff123456 #define CFG_IMAGE_SIG 0xcf54321a diff --git a/cmd/btrfs.c b/cmd/btrfs.c index 2843835d08b..69d1b1f830d 100644 --- a/cmd/btrfs.c +++ b/cmd/btrfs.c @@ -3,7 +3,6 @@ * 2017 by Marek Behún */ -#include #include #include #include diff --git a/cmd/button.c b/cmd/button.c index 1b45d0a2a03..3e6db3f5b8e 100644 --- a/cmd/button.c +++ b/cmd/button.c @@ -5,7 +5,6 @@ * Based on led.c */ -#include #include #include #include diff --git a/cmd/cache.c b/cmd/cache.c index b68d45b98bf..0254ff17f9b 100644 --- a/cmd/cache.c +++ b/cmd/cache.c @@ -7,7 +7,6 @@ /* * Cache support: switch on or off, get status */ -#include #include #include #include diff --git a/cmd/cat.c b/cmd/cat.c index 18aa6ca7aa6..6828b7b364e 100644 --- a/cmd/cat.c +++ b/cmd/cat.c @@ -4,7 +4,6 @@ * Roger Knecht */ -#include #include #include #include diff --git a/cmd/cbfs.c b/cmd/cbfs.c index 3cfc9eb2727..c1035461df1 100644 --- a/cmd/cbfs.c +++ b/cmd/cbfs.c @@ -6,10 +6,10 @@ /* * CBFS commands */ -#include #include #include #include +#include static int do_cbfs_init(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/cedit.c b/cmd/cedit.c index 6352e6369d1..fec67a8e334 100644 --- a/cmd/cedit.c +++ b/cmd/cedit.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/clk.c b/cmd/clk.c index 7bbcbfeda33..6fda6efb1ce 100644 --- a/cmd/clk.c +++ b/cmd/clk.c @@ -2,7 +2,6 @@ /* * Copyright (C) 2013 Xilinx, Inc. */ -#include #include #include #if defined(CONFIG_DM) && defined(CONFIG_CLK) diff --git a/cmd/clone.c b/cmd/clone.c index a9062077571..1f3cff1836d 100644 --- a/cmd/clone.c +++ b/cmd/clone.c @@ -4,11 +4,11 @@ * */ -#include #include #include #include #include +#include #include #define BUFSIZE (1 * 1024 * 1024) diff --git a/cmd/cls.c b/cmd/cls.c index 80d0558d467..4bee8a18305 100644 --- a/cmd/cls.c +++ b/cmd/cls.c @@ -5,7 +5,6 @@ * * cls - clear screen command */ -#include #include #include #include diff --git a/cmd/config.c b/cmd/config.c index cf30841a359..f0d2033c61f 100644 --- a/cmd/config.c +++ b/cmd/config.c @@ -3,7 +3,6 @@ * Copyright (C) 2017 Masahiro Yamada */ -#include #include #include #include diff --git a/cmd/conitrace.c b/cmd/conitrace.c index 9a1bc351848..6cc113328eb 100644 --- a/cmd/conitrace.c +++ b/cmd/conitrace.c @@ -5,7 +5,6 @@ * * Copyright (c) 2018, Heinrich Schuchardt */ -#include #include #include diff --git a/cmd/console.c b/cmd/console.c index 58c2cf1c894..12fc92061a1 100644 --- a/cmd/console.c +++ b/cmd/console.c @@ -7,7 +7,6 @@ /* * Boot support */ -#include #include #include #include diff --git a/cmd/cpu.c b/cmd/cpu.c index 245a82fa3eb..9e323069b9e 100644 --- a/cmd/cpu.c +++ b/cmd/cpu.c @@ -5,7 +5,6 @@ * Copyright (c) 2017 Álvaro Fernández Rojas */ -#include #include #include #include diff --git a/cmd/cramfs.c b/cmd/cramfs.c index 57e2afa2472..b57e2815926 100644 --- a/cmd/cramfs.c +++ b/cmd/cramfs.c @@ -10,7 +10,6 @@ /* * CRAMFS support */ -#include #include #include #include diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c index 90921cecf60..7b60e415b6c 100644 --- a/cmd/cros_ec.c +++ b/cmd/cros_ec.c @@ -6,7 +6,6 @@ * Copyright (c) 2016 National Instruments Corp */ -#include #include #include #include diff --git a/cmd/cyclic.c b/cmd/cyclic.c index ad7fc3b975e..40e966de9aa 100644 --- a/cmd/cyclic.c +++ b/cmd/cyclic.c @@ -8,11 +8,12 @@ * Copyright (C) 2022 Stefan Roese */ -#include #include #include #include #include +#include +#include #include struct cyclic_demo_info { diff --git a/cmd/date.c b/cmd/date.c index 4f98b470ca2..755adec1e71 100644 --- a/cmd/date.c +++ b/cmd/date.c @@ -7,7 +7,6 @@ /* * RTC, Date & Time support: get and set date & time */ -#include #include #include #include diff --git a/cmd/demo.c b/cmd/demo.c index ebd5a241c36..5c422ac165b 100644 --- a/cmd/demo.c +++ b/cmd/demo.c @@ -6,7 +6,6 @@ * Pavel Herrmann */ -#include #include #include #include diff --git a/cmd/dfu.c b/cmd/dfu.c index d7bfb535dc6..46f0190588e 100644 --- a/cmd/dfu.c +++ b/cmd/dfu.c @@ -10,7 +10,6 @@ * Lukasz Majewski */ -#include #include #include #include diff --git a/cmd/diag.c b/cmd/diag.c index f51536dbfaa..c6da5aae3fc 100644 --- a/cmd/diag.c +++ b/cmd/diag.c @@ -7,7 +7,6 @@ /* * Diagnostics support */ -#include #include #include diff --git a/cmd/disk.c b/cmd/disk.c index 92eaa02f4a1..2efc3ca4b1a 100644 --- a/cmd/disk.c +++ b/cmd/disk.c @@ -3,7 +3,6 @@ * (C) Copyright 2000-2011 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/cmd/dm.c b/cmd/dm.c index fb605c2da1a..ec9cfd85376 100644 --- a/cmd/dm.c +++ b/cmd/dm.c @@ -6,7 +6,6 @@ * Marek Vasut */ -#include #include #include #include diff --git a/cmd/echo.c b/cmd/echo.c index fda844ee9d3..973213a03a6 100644 --- a/cmd/echo.c +++ b/cmd/echo.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include static int do_echo(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/eeprom.c b/cmd/eeprom.c index 322765ad02a..26f3750a80a 100644 --- a/cmd/eeprom.c +++ b/cmd/eeprom.c @@ -19,12 +19,12 @@ * */ -#include #include #include #include #include #include +#include #include #ifndef I2C_RXTX_LEN diff --git a/cmd/efi.c b/cmd/efi.c index 6cd5361aca5..6bed2d743ba 100644 --- a/cmd/efi.c +++ b/cmd/efi.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/efi_common.c b/cmd/efi_common.c index 1aa2351fcdf..c46764e6eea 100644 --- a/cmd/efi_common.c +++ b/cmd/efi_common.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c index 0ba92c60e03..4164cb4f9b8 100644 --- a/cmd/eficonfig.c +++ b/cmd/eficonfig.c @@ -7,7 +7,6 @@ #include #include -#include #include #include #include diff --git a/cmd/eficonfig_sbkey.c b/cmd/eficonfig_sbkey.c index caca27495e0..b3325a540f9 100644 --- a/cmd/eficonfig_sbkey.c +++ b/cmd/eficonfig_sbkey.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include diff --git a/cmd/efidebug.c b/cmd/efidebug.c index c2c525f2351..e978e74aad9 100644 --- a/cmd/efidebug.c +++ b/cmd/efidebug.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include diff --git a/cmd/elf.c b/cmd/elf.c index df4354d3742..a02361f9f51 100644 --- a/cmd/elf.c +++ b/cmd/elf.c @@ -4,7 +4,6 @@ * All rights reserved. */ -#include #include #include #include diff --git a/cmd/ethsw.c b/cmd/ethsw.c index f8b8a798bf6..4bf49ac598f 100644 --- a/cmd/ethsw.c +++ b/cmd/ethsw.c @@ -5,13 +5,13 @@ * Ethernet Switch commands */ -#include #include #include #include #include #include #include +#include static const char *ethsw_name; diff --git a/cmd/event.c b/cmd/event.c index f6cdb55fc91..00c828757ca 100644 --- a/cmd/event.c +++ b/cmd/event.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include diff --git a/cmd/exit.c b/cmd/exit.c index 7bf241ec732..d125ec1e31f 100644 --- a/cmd/exit.c +++ b/cmd/exit.c @@ -4,8 +4,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include +#include static int do_exit(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/ext2.c b/cmd/ext2.c index a0ce0cf5796..45c8b353b58 100644 --- a/cmd/ext2.c +++ b/cmd/ext2.c @@ -19,7 +19,6 @@ /* * Ext2fs support */ -#include #include #include diff --git a/cmd/ext4.c b/cmd/ext4.c index 4791b69fd96..40d1fe30d5e 100644 --- a/cmd/ext4.c +++ b/cmd/ext4.c @@ -25,7 +25,6 @@ * file in uboot. Added ext4fs ls load and write support. */ -#include #include #include #include diff --git a/cmd/extension_board.c b/cmd/extension_board.c index 2b672d888c6..f43bf680858 100644 --- a/cmd/extension_board.c +++ b/cmd/extension_board.c @@ -4,7 +4,6 @@ * Köry Maincent, Bootlin, */ -#include #include #include #include diff --git a/cmd/fastboot.c b/cmd/fastboot.c index c3c19231c98..d4cfc0c7a28 100644 --- a/cmd/fastboot.c +++ b/cmd/fastboot.c @@ -6,7 +6,6 @@ * (C) Copyright 2014 Linaro, Ltd. * Rob Herring */ -#include #include #include #include diff --git a/cmd/fat.c b/cmd/fat.c index 69ce1fa5300..ad0e5ed7d60 100644 --- a/cmd/fat.c +++ b/cmd/fat.c @@ -7,7 +7,6 @@ /* * Boot support */ -#include #include #include #include diff --git a/cmd/fdt.c b/cmd/fdt.c index 331564c13be..d16b141ce32 100644 --- a/cmd/fdt.c +++ b/cmd/fdt.c @@ -7,7 +7,6 @@ * Matthew McClintock */ -#include #include #include #include diff --git a/cmd/flash.c b/cmd/flash.c index f4f85ecc7a8..de0e04f09cf 100644 --- a/cmd/flash.c +++ b/cmd/flash.c @@ -7,9 +7,9 @@ /* * FLASH support */ -#include #include #include +#include #include #if defined(CONFIG_CMD_MTDPARTS) diff --git a/cmd/font.c b/cmd/font.c index cb39c88063f..ebde094b0a5 100644 --- a/cmd/font.c +++ b/cmd/font.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/fpga.c b/cmd/fpga.c index 8c64e957db0..93f14098ccb 100644 --- a/cmd/fpga.c +++ b/cmd/fpga.c @@ -7,7 +7,6 @@ /* * FPGA support */ -#include #include #include #include diff --git a/cmd/fpgad.c b/cmd/fpgad.c index dfc6220b5e0..b4bfaa12165 100644 --- a/cmd/fpgad.c +++ b/cmd/fpgad.c @@ -8,10 +8,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include +#include #include diff --git a/cmd/fs.c b/cmd/fs.c index 46cb43dcdb5..3d7e06d6f1e 100644 --- a/cmd/fs.c +++ b/cmd/fs.c @@ -5,7 +5,6 @@ * Inspired by cmd_ext_common.c, cmd_fat.c. */ -#include #include #include diff --git a/cmd/fs_uuid.c b/cmd/fs_uuid.c index 5dc94aa6408..5f7770d09ac 100644 --- a/cmd/fs_uuid.c +++ b/cmd/fs_uuid.c @@ -5,7 +5,6 @@ * Copyright (C) 2014, Bachmann electronic GmbH */ -#include #include #include diff --git a/cmd/fuse.c b/cmd/fuse.c index f884c894fb0..598ef496a43 100644 --- a/cmd/fuse.c +++ b/cmd/fuse.c @@ -8,11 +8,11 @@ * Martha Marx */ -#include #include #include #include #include +#include #include static int strtou32(const char *str, unsigned int base, u32 *result) diff --git a/cmd/gettime.c b/cmd/gettime.c index 2e74e02b499..fc307efce8c 100644 --- a/cmd/gettime.c +++ b/cmd/gettime.c @@ -11,8 +11,8 @@ /* * Get Timer overflows after 2^32 / CONFIG_SYS_HZ (32Khz) = 131072 sec */ -#include #include +#include static int do_gettime(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/gpio.c b/cmd/gpio.c index dab6f7097ae..7a43dc6ab18 100644 --- a/cmd/gpio.c +++ b/cmd/gpio.c @@ -6,7 +6,6 @@ * Licensed under the GPL-2 or later. */ -#include #include #include #include diff --git a/cmd/gpt.c b/cmd/gpt.c index 7aaf1889a5a..36b112d5978 100644 --- a/cmd/gpt.c +++ b/cmd/gpt.c @@ -10,7 +10,6 @@ * author: Piotr Wilczek */ -#include #include #include #include diff --git a/cmd/hash.c b/cmd/hash.c index 5534a735fa7..60d482b7f87 100644 --- a/cmd/hash.c +++ b/cmd/hash.c @@ -9,7 +9,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/cmd/help.c b/cmd/help.c index 9f8393eefd8..56579e28d31 100644 --- a/cmd/help.c +++ b/cmd/help.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include static int do_help(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/history.c b/cmd/history.c index b6bf4670b1c..8972986ca9d 100644 --- a/cmd/history.c +++ b/cmd/history.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include diff --git a/cmd/host.c b/cmd/host.c index c33c2a9787e..e03576b4d2d 100644 --- a/cmd/host.c +++ b/cmd/host.c @@ -3,7 +3,6 @@ * Copyright (c) 2012, Google Inc. */ -#include #include #include #include diff --git a/cmd/i2c.c b/cmd/i2c.c index 80831561c67..7dac0a9fb6c 100644 --- a/cmd/i2c.c +++ b/cmd/i2c.c @@ -64,7 +64,6 @@ * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). */ -#include #include #include #include diff --git a/cmd/ide.c b/cmd/ide.c index ddc87d3a0bb..036489fda97 100644 --- a/cmd/ide.c +++ b/cmd/ide.c @@ -8,7 +8,6 @@ * IDE support */ -#include #include #include #include diff --git a/cmd/ini.c b/cmd/ini.c index 35de2373e60..96399017691 100644 --- a/cmd/ini.c +++ b/cmd/ini.c @@ -11,9 +11,9 @@ * http://code.google.com/p/inih/ */ -#include #include #include +#include #include #include diff --git a/cmd/io.c b/cmd/io.c index 2de1111998f..617373d3cb7 100644 --- a/cmd/io.c +++ b/cmd/io.c @@ -7,9 +7,9 @@ * IO space access commands. */ -#include #include #include +#include #include /* Display values from last command */ diff --git a/cmd/iotrace.c b/cmd/iotrace.c index f28359e2875..0a041ed8652 100644 --- a/cmd/iotrace.c +++ b/cmd/iotrace.c @@ -3,9 +3,9 @@ * Copyright (c) 2014 Google, Inc */ -#include #include #include +#include static void do_print_stats(void) { diff --git a/cmd/irq.c b/cmd/irq.c index 1d3e28cb3ce..655aba576a8 100644 --- a/cmd/irq.c +++ b/cmd/irq.c @@ -3,7 +3,6 @@ * Copyright 2008 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/cmd/itest.c b/cmd/itest.c index 74414cbdc4c..b79512a505d 100644 --- a/cmd/itest.c +++ b/cmd/itest.c @@ -11,11 +11,11 @@ * A few parts were lifted from bash 'test' command */ -#include #include #include #include #include +#include #include diff --git a/cmd/jffs2.c b/cmd/jffs2.c index e00fcc20226..89d336f5958 100644 --- a/cmd/jffs2.c +++ b/cmd/jffs2.c @@ -70,7 +70,6 @@ /* * JFFS2/CRAMFS support */ -#include #include #include #if defined(CONFIG_CMD_FLASH) diff --git a/cmd/kaslrseed.c b/cmd/kaslrseed.c index 9acb8e16386..e0d3c7fe748 100644 --- a/cmd/kaslrseed.c +++ b/cmd/kaslrseed.c @@ -6,7 +6,6 @@ * Copyright (c) 2021, Chris Morgan */ -#include #include #include #include diff --git a/cmd/led.c b/cmd/led.c index 48a02baf509..4256b3429c2 100644 --- a/cmd/led.c +++ b/cmd/led.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/legacy-mtd-utils.c b/cmd/legacy-mtd-utils.c index 5903a90fe53..1a5271000bf 100644 --- a/cmd/legacy-mtd-utils.c +++ b/cmd/legacy-mtd-utils.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include diff --git a/cmd/legacy_led.c b/cmd/legacy_led.c index 5256255f052..50de7e89d8f 100644 --- a/cmd/legacy_led.c +++ b/cmd/legacy_led.c @@ -9,10 +9,9 @@ * Ulf Samuelsson */ -#include -#include #include #include +#include struct led_tbl_s { char *string; /* String for use in the command */ diff --git a/cmd/license.c b/cmd/license.c index 15411b5a92d..161663ff29c 100644 --- a/cmd/license.c +++ b/cmd/license.c @@ -4,7 +4,6 @@ * Author: Harald Welte */ -#include #include #include #include diff --git a/cmd/load.c b/cmd/load.c index 540361b43f0..ace1c52f90a 100644 --- a/cmd/load.c +++ b/cmd/load.c @@ -7,7 +7,6 @@ /* * Serial up- and download support */ -#include #include #include #include diff --git a/cmd/log.c b/cmd/log.c index c9a23e4ae0d..519ec76f3b5 100644 --- a/cmd/log.c +++ b/cmd/log.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/lsblk.c b/cmd/lsblk.c index d214dafc3be..7c00bfdc7a0 100644 --- a/cmd/lsblk.c +++ b/cmd/lsblk.c @@ -4,7 +4,6 @@ * Niel Fourie, DENX Software Engineering, lusus@denx.de. */ -#include #include #include #include diff --git a/cmd/lzmadec.c b/cmd/lzmadec.c index 81924da4618..c40b96941b4 100644 --- a/cmd/lzmadec.c +++ b/cmd/lzmadec.c @@ -9,10 +9,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include +#include #include #include diff --git a/cmd/mbr.c b/cmd/mbr.c index ec99b662834..7e1f92a13bb 100644 --- a/cmd/mbr.c +++ b/cmd/mbr.c @@ -8,11 +8,11 @@ * based on the gpt command. */ -#include #include #include #include #include +#include /** * extract_val() - Extract a value from the key=value pair list diff --git a/cmd/mdio.c b/cmd/mdio.c index 3c74326161e..c0a87087d31 100644 --- a/cmd/mdio.c +++ b/cmd/mdio.c @@ -8,7 +8,6 @@ * MDIO Commands */ -#include #include #include #include diff --git a/cmd/mem.c b/cmd/mem.c index 768057e4d3f..4989d27f2ab 100644 --- a/cmd/mem.c +++ b/cmd/mem.c @@ -10,7 +10,6 @@ * Copied from FADS ROM, Dan Malek (dmalek@jlc.net) */ -#include #include #include #include @@ -24,6 +23,7 @@ #include #include #include +#include #include #include #include diff --git a/cmd/meson/sm.c b/cmd/meson/sm.c index de9a242e17f..b69f8123ee2 100644 --- a/cmd/meson/sm.c +++ b/cmd/meson/sm.c @@ -9,11 +9,11 @@ */ #include -#include #include #include #include #include +#include static int do_sm_serial(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/mii.c b/cmd/mii.c index fab420ee29e..ce372489692 100644 --- a/cmd/mii.c +++ b/cmd/mii.c @@ -8,7 +8,6 @@ * MII Utilities */ -#include #include #include #include diff --git a/cmd/misc.c b/cmd/misc.c index ec32b41ed1e..792d9723c75 100644 --- a/cmd/misc.c +++ b/cmd/misc.c @@ -8,7 +8,6 @@ * A command interface to access misc devices with MISC uclass driver APIs. */ -#include #include #include #include diff --git a/cmd/mmc.c b/cmd/mmc.c index 2d5430a5307..7244a90f4dc 100644 --- a/cmd/mmc.c +++ b/cmd/mmc.c @@ -4,7 +4,6 @@ * Kyle Harris, kharris@nexus-tech.net */ -#include #include #include #include @@ -14,6 +13,7 @@ #include #include #include +#include static int curr_device = -1; diff --git a/cmd/mp.c b/cmd/mp.c index 1b4373f2587..b9b5e016246 100644 --- a/cmd/mp.c +++ b/cmd/mp.c @@ -3,9 +3,9 @@ * Copyright 2008-2009 Freescale Semiconductor, Inc. */ -#include #include #include +#include static int cpu_status_all(void) { diff --git a/cmd/mtd.c b/cmd/mtd.c index 9189f45cabd..795aaa2b37d 100644 --- a/cmd/mtd.c +++ b/cmd/mtd.c @@ -9,7 +9,6 @@ */ #include -#include #include #if CONFIG_IS_ENABLED(CMD_MTD_OTP) #include diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c index b31db73ebfc..f57d84dbb3a 100644 --- a/cmd/mtdparts.c +++ b/cmd/mtdparts.c @@ -70,7 +70,6 @@ * */ -#include #include #include #include diff --git a/cmd/mux.c b/cmd/mux.c index 388fb0878a8..2f6c08b8b07 100644 --- a/cmd/mux.c +++ b/cmd/mux.c @@ -6,7 +6,6 @@ * Author: Pratyush Yadav */ -#include #include #include #include diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index 744b1c20aa8..e3f21dd0d81 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/cmd/mvebu/comphy_rx_training.c b/cmd/mvebu/comphy_rx_training.c index 4ee8f54ea9c..5653877cd4a 100644 --- a/cmd/mvebu/comphy_rx_training.c +++ b/cmd/mvebu/comphy_rx_training.c @@ -5,7 +5,6 @@ * SPDX-License-Identifier: GPL-2.0 */ -#include #include #include #include diff --git a/cmd/nand.c b/cmd/nand.c index fe834c4ac5c..5a328e0acdd 100644 --- a/cmd/nand.c +++ b/cmd/nand.c @@ -23,7 +23,6 @@ * only */ -#include #include #include #include diff --git a/cmd/net.c b/cmd/net.c index d407d8320a3..b206ff58e68 100644 --- a/cmd/net.c +++ b/cmd/net.c @@ -9,7 +9,6 @@ /* * Boot support */ -#include #include #include #include diff --git a/cmd/nvedit.c b/cmd/nvedit.c index e77338f8139..98a687bcabb 100644 --- a/cmd/nvedit.c +++ b/cmd/nvedit.c @@ -23,7 +23,7 @@ * environment. After that, we use a hash table. */ -#include +#include #include #include #include diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c index 7a30b5cc8f8..64ae2ad2ce2 100644 --- a/cmd/nvedit_efi.c +++ b/cmd/nvedit_efi.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include diff --git a/cmd/nvme.c b/cmd/nvme.c index 09d5f438fb1..f2c9acba5c3 100644 --- a/cmd/nvme.c +++ b/cmd/nvme.c @@ -4,7 +4,6 @@ * Copyright (C) 2017 Bin Meng */ -#include #include #include #include diff --git a/cmd/onenand.c b/cmd/onenand.c index fad781583a3..6e808ce3fce 100644 --- a/cmd/onenand.c +++ b/cmd/onenand.c @@ -9,7 +9,6 @@ * published by the Free Software Foundation. */ -#include #include #include #include diff --git a/cmd/optee_rpmb.c b/cmd/optee_rpmb.c index b3cafd92410..b155278ee2a 100644 --- a/cmd/optee_rpmb.c +++ b/cmd/optee_rpmb.c @@ -4,7 +4,6 @@ */ #include -#include #include #include #include diff --git a/cmd/osd.c b/cmd/osd.c index 210bc5d4c23..5671338d9e7 100644 --- a/cmd/osd.c +++ b/cmd/osd.c @@ -9,7 +9,6 @@ * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de */ -#include #include #include #include diff --git a/cmd/panic.c b/cmd/panic.c index f13b3f094fa..7c0affa5eb5 100644 --- a/cmd/panic.c +++ b/cmd/panic.c @@ -3,7 +3,7 @@ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH */ -#include +#include #include static int do_panic(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/part.c b/cmd/part.c index c75f85acd52..d140a1eddb9 100644 --- a/cmd/part.c +++ b/cmd/part.c @@ -15,7 +15,6 @@ * Pavel Bartusek */ -#include #include #include #include diff --git a/cmd/pcap.c b/cmd/pcap.c index a0149203fad..8d610966c13 100644 --- a/cmd/pcap.c +++ b/cmd/pcap.c @@ -4,8 +4,8 @@ * Ramon Fried */ -#include #include +#include #include #include diff --git a/cmd/pci.c b/cmd/pci.c index d89e71c16a0..3c0aed50cae 100644 --- a/cmd/pci.c +++ b/cmd/pci.c @@ -12,7 +12,6 @@ * PCI routines */ -#include #include #include #include diff --git a/cmd/pci_mps.c b/cmd/pci_mps.c index 98161da93a0..19e71db8cbd 100644 --- a/cmd/pci_mps.c +++ b/cmd/pci_mps.c @@ -6,7 +6,6 @@ * PCI Express Maximum Packet Size (MPS) configuration */ -#include #include #include #include diff --git a/cmd/pinmux.c b/cmd/pinmux.c index 105f01eaaff..01f3e4af6ce 100644 --- a/cmd/pinmux.c +++ b/cmd/pinmux.c @@ -3,7 +3,6 @@ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved */ -#include #include #include #include diff --git a/cmd/pmc.c b/cmd/pmc.c index 9a3ba2bffc5..1a3416fb2a9 100644 --- a/cmd/pmc.c +++ b/cmd/pmc.c @@ -5,7 +5,6 @@ * Copyright 2019 Google LLC */ -#include #include #include #include diff --git a/cmd/pmic.c b/cmd/pmic.c index c9e9730adf9..3ad1b8aa375 100644 --- a/cmd/pmic.c +++ b/cmd/pmic.c @@ -3,7 +3,6 @@ * Copyright (C) 2014-2015 Samsung Electronics * Przemyslaw Marczak */ -#include #include #include #include diff --git a/cmd/printf.c b/cmd/printf.c index 0c6887e0d6e..a1727ac15a2 100644 --- a/cmd/printf.c +++ b/cmd/printf.c @@ -84,12 +84,12 @@ * We try to be compatible. */ -#include #include #include #include #include #include +#include #define WANT_HEX_ESCAPES 0 #define PRINT_CONVERSION_ERROR 1 diff --git a/cmd/pvblock.c b/cmd/pvblock.c index 1b604c37373..3a83ac9cd92 100644 --- a/cmd/pvblock.c +++ b/cmd/pvblock.c @@ -6,7 +6,6 @@ */ #include -#include #include /* Current I/O Device */ diff --git a/cmd/pxe.c b/cmd/pxe.c index 21134eb7a30..ae02c28c075 100644 --- a/cmd/pxe.c +++ b/cmd/pxe.c @@ -4,12 +4,12 @@ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. */ -#include #include #include #include #include #include +#include #include "pxe_utils.h" diff --git a/cmd/qfw.c b/cmd/qfw.c index 1b8c775ebf5..1b108118658 100644 --- a/cmd/qfw.c +++ b/cmd/qfw.c @@ -3,7 +3,6 @@ * (C) Copyright 2015 Miao Yan */ -#include #include #include #include diff --git a/cmd/read.c b/cmd/read.c index 1218e7acfd0..af54bd17654 100644 --- a/cmd/read.c +++ b/cmd/read.c @@ -8,10 +8,10 @@ * Software Foundation. */ -#include #include #include #include +#include static int do_rw(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/reginfo.c b/cmd/reginfo.c index c8a04b1754e..53b8bc41bfe 100644 --- a/cmd/reginfo.c +++ b/cmd/reginfo.c @@ -4,7 +4,6 @@ * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com */ -#include #include #include diff --git a/cmd/regulator.c b/cmd/regulator.c index 635a9add585..da298090bb7 100644 --- a/cmd/regulator.c +++ b/cmd/regulator.c @@ -3,7 +3,6 @@ * Copyright (C) 2014-2015 Samsung Electronics * Przemyslaw Marczak */ -#include #include #include #include diff --git a/cmd/remoteproc.c b/cmd/remoteproc.c index ea8724a187d..3c5b6a05b1a 100644 --- a/cmd/remoteproc.c +++ b/cmd/remoteproc.c @@ -3,7 +3,6 @@ * (C) Copyright 2015 * Texas Instruments Incorporated - https://www.ti.com/ */ -#include #include #include #include diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c index 2d8ee7e5bbb..a231604e492 100644 --- a/cmd/riscv/sbi.c +++ b/cmd/riscv/sbi.c @@ -5,7 +5,6 @@ * Copyright (c) 2020, Heinrich Schuchardt */ -#include #include #include diff --git a/cmd/rkmtd.c b/cmd/rkmtd.c index 5b80427cb94..a870c119110 100644 --- a/cmd/rkmtd.c +++ b/cmd/rkmtd.c @@ -8,7 +8,6 @@ * Copyright (C) 2023 Johan Jonker */ -#include #include #include #include diff --git a/cmd/rng.c b/cmd/rng.c index e5ab8681122..2fb7202303a 100644 --- a/cmd/rng.c +++ b/cmd/rng.c @@ -4,7 +4,6 @@ * * Copyright (c) 2019, Heinrich Schuchardt */ -#include #include #include #include diff --git a/cmd/rockusb.c b/cmd/rockusb.c index 07088564a10..48497aa8764 100644 --- a/cmd/rockusb.c +++ b/cmd/rockusb.c @@ -3,7 +3,6 @@ * Copyright (C) 2017 Eddie Cai */ -#include #include #include #include diff --git a/cmd/rtc.c b/cmd/rtc.c index a344cfa76b1..a931fd9d54f 100644 --- a/cmd/rtc.c +++ b/cmd/rtc.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include diff --git a/cmd/sata.c b/cmd/sata.c index 9c9fe111d12..8b923f9378b 100644 --- a/cmd/sata.c +++ b/cmd/sata.c @@ -9,7 +9,6 @@ * Dave Liu */ -#include #include #include #include diff --git a/cmd/sb.c b/cmd/sb.c index 0d55818e3c6..1aa5921f03e 100644 --- a/cmd/sb.c +++ b/cmd/sb.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/scp03.c b/cmd/scp03.c index 2b8d5aecf34..9c749d19af8 100644 --- a/cmd/scp03.c +++ b/cmd/scp03.c @@ -4,7 +4,6 @@ * */ -#include #include #include #include diff --git a/cmd/scsi.c b/cmd/scsi.c index c501d7f456d..c286bdc0726 100644 --- a/cmd/scsi.c +++ b/cmd/scsi.c @@ -7,7 +7,6 @@ /* * SCSI support. */ -#include #include #include #include diff --git a/cmd/seama.c b/cmd/seama.c index 3aafb43c48a..3c8e8199234 100644 --- a/cmd/seama.c +++ b/cmd/seama.c @@ -4,7 +4,6 @@ * Support for the "SEAttle iMAge" SEAMA NAND image format */ -#include #include #include diff --git a/cmd/setexpr.c b/cmd/setexpr.c index ab76824a32b..e111b8ba98a 100644 --- a/cmd/setexpr.c +++ b/cmd/setexpr.c @@ -8,7 +8,6 @@ * This file provides a shell like 'expr' function to return. */ -#include #include #include #include @@ -16,6 +15,8 @@ #include #include #include +#include +#include #include #include "printf.h" diff --git a/cmd/sf.c b/cmd/sf.c index e3866899f6c..f43a2e08b31 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -5,7 +5,6 @@ * Copyright (C) 2008 Atmel Corporation */ -#include #include #include #include @@ -14,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/cmd/sha1sum.c b/cmd/sha1sum.c index bcc665a5a6c..52aa26c78d2 100644 --- a/cmd/sha1sum.c +++ b/cmd/sha1sum.c @@ -7,7 +7,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/cmd/sleep.c b/cmd/sleep.c index c741b4aa029..7616fed7556 100644 --- a/cmd/sleep.c +++ b/cmd/sleep.c @@ -4,9 +4,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include +#include +#include #include static int do_sleep(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/smccc.c b/cmd/smccc.c index fb80431ad1d..3a4d885e37e 100644 --- a/cmd/smccc.c +++ b/cmd/smccc.c @@ -4,8 +4,8 @@ * Michalis Pappas */ #include -#include #include +#include #include #include #include diff --git a/cmd/sound.c b/cmd/sound.c index 0b7f9599716..08bf74112f1 100644 --- a/cmd/sound.c +++ b/cmd/sound.c @@ -4,7 +4,6 @@ * Rajeshwari Shinde */ -#include #include #include #include diff --git a/cmd/source.c b/cmd/source.c index 0ba9736b1ab..c9b5f8e400a 100644 --- a/cmd/source.c +++ b/cmd/source.c @@ -14,7 +14,6 @@ /* #define DEBUG */ -#include #include #include #include diff --git a/cmd/spi.c b/cmd/spi.c index f30018f33be..ea30c854c21 100644 --- a/cmd/spi.c +++ b/cmd/spi.c @@ -8,7 +8,6 @@ * SPI Read/Write Utilities */ -#include #include #include #include diff --git a/cmd/spl.c b/cmd/spl.c index 8a2ded72be9..d1f47c7316b 100644 --- a/cmd/spl.c +++ b/cmd/spl.c @@ -4,7 +4,6 @@ * Corscience GmbH & Co. KG - Simon Schwarz */ -#include #include #include #include diff --git a/cmd/stackprot_test.c b/cmd/stackprot_test.c index f3470288fac..e7ff4a06158 100644 --- a/cmd/stackprot_test.c +++ b/cmd/stackprot_test.c @@ -3,7 +3,6 @@ * Copyright 2021 Broadcom */ -#include #include static int do_test_stackprot_fail(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/strings.c b/cmd/strings.c index bf348afce81..5bcb0f2b567 100644 --- a/cmd/strings.c +++ b/cmd/strings.c @@ -7,8 +7,8 @@ */ #include -#include #include +#include static char *start_addr, *last_addr; diff --git a/cmd/sysboot.c b/cmd/sysboot.c index d14c570d96a..0ea08fd7b53 100644 --- a/cmd/sysboot.c +++ b/cmd/sysboot.c @@ -1,10 +1,10 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include #include +#include /** * struct sysboot_info - useful information for sysboot helpers diff --git a/cmd/temperature.c b/cmd/temperature.c index 420965de143..41e422fc937 100644 --- a/cmd/temperature.c +++ b/cmd/temperature.c @@ -5,7 +5,6 @@ * Written by Robert Marko */ -#include #include #include #include diff --git a/cmd/terminal.c b/cmd/terminal.c index 9e32a4191e1..369a755e0f5 100644 --- a/cmd/terminal.c +++ b/cmd/terminal.c @@ -7,7 +7,6 @@ /* * Boot support */ -#include #include #include #include diff --git a/cmd/test.c b/cmd/test.c index fa7c48fb9f1..b4c3eabf9f6 100644 --- a/cmd/test.c +++ b/cmd/test.c @@ -4,10 +4,10 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include +#include #define OP_INVALID 0 #define OP_NOT 1 diff --git a/cmd/thordown.c b/cmd/thordown.c index 48e22b31d02..70061bf8d4c 100644 --- a/cmd/thordown.c +++ b/cmd/thordown.c @@ -6,7 +6,6 @@ * All rights reserved. */ -#include #include #include #include diff --git a/cmd/ti/ddr3.c b/cmd/ti/ddr3.c index bbd406fc66e..70ce53d01e8 100644 --- a/cmd/ti/ddr3.c +++ b/cmd/ti/ddr3.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include diff --git a/cmd/ti/pd.c b/cmd/ti/pd.c index a0492a5fdee..305023af1e7 100644 --- a/cmd/ti/pd.c +++ b/cmd/ti/pd.c @@ -5,7 +5,6 @@ * Copyright (C) 2020 Texas Instruments Incorporated, */ -#include #include #include #include diff --git a/cmd/time.c b/cmd/time.c index db8c1892df4..eee6084e968 100644 --- a/cmd/time.c +++ b/cmd/time.c @@ -3,7 +3,6 @@ * Copyright (c) 2011 The Chromium OS Authors. */ -#include #include static void report_time(ulong cycles) diff --git a/cmd/timer.c b/cmd/timer.c index 551be5dd54e..04fcd84ac6a 100644 --- a/cmd/timer.c +++ b/cmd/timer.c @@ -4,8 +4,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include +#include static int do_timer(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c index 57cfd355df1..0aec7521770 100644 --- a/cmd/tlv_eeprom.c +++ b/cmd/tlv_eeprom.c @@ -9,7 +9,6 @@ * Copyright (C) 2014,2016 david_yang */ -#include #include #include #include diff --git a/cmd/tpm-common.c b/cmd/tpm-common.c index a7dc23d85d5..1cd57f901b6 100644 --- a/cmd/tpm-common.c +++ b/cmd/tpm-common.c @@ -3,7 +3,6 @@ * Copyright (c) 2013 The Chromium OS Authors. */ -#include #include #include #include diff --git a/cmd/tpm-v1.c b/cmd/tpm-v1.c index 1b1efcd204d..6e019d1c729 100644 --- a/cmd/tpm-v1.c +++ b/cmd/tpm-v1.c @@ -3,10 +3,10 @@ * Copyright (c) 2013 The Chromium OS Authors. */ -#include #include #include #include +#include #include #include #include diff --git a/cmd/tpm-v2.c b/cmd/tpm-v2.c index 7e479b9dfe3..99c540b26de 100644 --- a/cmd/tpm-v2.c +++ b/cmd/tpm-v2.c @@ -4,7 +4,6 @@ * Author: Miquel Raynal */ -#include #include #include #include diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c index c7fa6e775f5..9c8b1c74384 100644 --- a/cmd/tpm_test.c +++ b/cmd/tpm_test.c @@ -3,10 +3,10 @@ * Copyright (c) 2015 Google, Inc */ -#include #include #include #include +#include #include #include #include "tpm-user-utils.h" diff --git a/cmd/trace.c b/cmd/trace.c index 2e3ee1d3ba2..937e6a682ad 100644 --- a/cmd/trace.c +++ b/cmd/trace.c @@ -3,11 +3,11 @@ * Copyright (c) 2011 The Chromium OS Authors. */ -#include #include #include #include #include +#include #include static int get_args(int argc, char *const argv[], char **buff, diff --git a/cmd/tsi148.c b/cmd/tsi148.c index 0d849d9979e..113b4e67330 100644 --- a/cmd/tsi148.c +++ b/cmd/tsi148.c @@ -7,10 +7,10 @@ * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com */ -#include #include #include #include +#include #include #include diff --git a/cmd/ubi.c b/cmd/ubi.c index 0a6a80bdd10..8c1b5df0572 100644 --- a/cmd/ubi.c +++ b/cmd/ubi.c @@ -11,7 +11,6 @@ * published by the Free Software Foundation. */ -#include #include #include #include diff --git a/cmd/ubifs.c b/cmd/ubifs.c index 2a035bc7ae6..8fd39032ecc 100644 --- a/cmd/ubifs.c +++ b/cmd/ubifs.c @@ -11,11 +11,11 @@ #undef DEBUG -#include #include #include #include #include +#include static int ubifs_initialized; static int ubifs_mounted; diff --git a/cmd/ufs.c b/cmd/ufs.c index 536bd85b75d..6e21fbb1685 100644 --- a/cmd/ufs.c +++ b/cmd/ufs.c @@ -5,9 +5,9 @@ * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com * */ -#include #include #include +#include static int do_ufs(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { diff --git a/cmd/universe.c b/cmd/universe.c index fb3a32d4d5a..d1a712829d0 100644 --- a/cmd/universe.c +++ b/cmd/universe.c @@ -3,9 +3,9 @@ * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com */ -#include #include #include +#include #include #include diff --git a/cmd/unlz4.c b/cmd/unlz4.c index 5f20838e899..fc5200117ad 100644 --- a/cmd/unlz4.c +++ b/cmd/unlz4.c @@ -4,9 +4,9 @@ * FUJITSU COMPUTERTECHNOLOGIES LIMITED. All rights reserved. */ -#include #include #include +#include #include static int do_unlz4(struct cmd_tbl *cmdtp, int flag, int argc, diff --git a/cmd/unzip.c b/cmd/unzip.c index bc6cee06043..e7a3f9808b2 100644 --- a/cmd/unzip.c +++ b/cmd/unzip.c @@ -4,12 +4,12 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include #include #include +#include static int do_unzip(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) diff --git a/cmd/usb.c b/cmd/usb.c index 23253f22231..3a3764a5b86 100644 --- a/cmd/usb.c +++ b/cmd/usb.c @@ -10,7 +10,6 @@ * project. */ -#include #include #include #include diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c index cbdda733533..39259a3b092 100644 --- a/cmd/usb_gadget_sdp.c +++ b/cmd/usb_gadget_sdp.c @@ -6,7 +6,6 @@ * Author: Stefan Agner */ -#include #include #include #include diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c index 751701fe73a..47e8b70cd10 100644 --- a/cmd/usb_mass_storage.c +++ b/cmd/usb_mass_storage.c @@ -6,7 +6,6 @@ * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. */ -#include #include #include #include diff --git a/cmd/vbe.c b/cmd/vbe.c index 0e84b0e97aa..423d9e5f8f0 100644 --- a/cmd/vbe.c +++ b/cmd/vbe.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/version.c b/cmd/version.c index d99a44f19fb..53db1a0b6bd 100644 --- a/cmd/version.c +++ b/cmd/version.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/cmd/video.c b/cmd/video.c index 942f81c1633..91bd6de14dc 100644 --- a/cmd/video.c +++ b/cmd/video.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/virtio.c b/cmd/virtio.c index 019e317e755..a42a563ab72 100644 --- a/cmd/virtio.c +++ b/cmd/virtio.c @@ -4,7 +4,6 @@ * Copyright (C) 2018, Bin Meng */ -#include #include #include #include diff --git a/cmd/w1.c b/cmd/w1.c index 3209e65f377..e462e786a96 100644 --- a/cmd/w1.c +++ b/cmd/w1.c @@ -4,7 +4,6 @@ * Microchip Technology, Inc. * Eugen Hristev */ -#include #include #include #include diff --git a/cmd/wdt.c b/cmd/wdt.c index b9fdf7ad155..c7a06cca181 100644 --- a/cmd/wdt.c +++ b/cmd/wdt.c @@ -5,7 +5,6 @@ * Copyright (c) 2019 Michael Walle */ -#include #include #include #include diff --git a/cmd/wol.c b/cmd/wol.c index f0d63432272..45d4ae3f719 100644 --- a/cmd/wol.c +++ b/cmd/wol.c @@ -7,9 +7,9 @@ /* * Wake-on-LAN support */ -#include #include #include +#include #if defined(CONFIG_CMD_WOL) void wol_set_timeout(ulong); diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c index 84822a3e321..7ca2e13ae2f 100644 --- a/cmd/x86/cbsysinfo.c +++ b/cmd/x86/cbsysinfo.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/cmd/x86/fsp.c b/cmd/x86/fsp.c index 82e4415b16e..2620ab8ee02 100644 --- a/cmd/x86/fsp.c +++ b/cmd/x86/fsp.c @@ -3,7 +3,6 @@ * Copyright (C) 2014-2015, Bin Meng */ -#include #include #include #include diff --git a/cmd/x86/hob.c b/cmd/x86/hob.c index 04d092dbe7e..2dd30808bd1 100644 --- a/cmd/x86/hob.c +++ b/cmd/x86/hob.c @@ -3,7 +3,6 @@ * Copyright (C) 2014-2015, Bin Meng */ -#include #include #include #include diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c index 6ad7a123a44..b2afb598c73 100644 --- a/cmd/x86/mtrr.c +++ b/cmd/x86/mtrr.c @@ -3,9 +3,9 @@ * (C) Copyright 2014 Google, Inc */ -#include #include #include +#include #include #include #include diff --git a/cmd/ximg.c b/cmd/ximg.c index 0e7eead8d19..1467484df8d 100644 --- a/cmd/ximg.c +++ b/cmd/ximg.c @@ -11,7 +11,6 @@ /* * Multi Image extract */ -#include #include #include #include diff --git a/cmd/xxd.c b/cmd/xxd.c index 446ac1915ef..8ae05f910cb 100644 --- a/cmd/xxd.c +++ b/cmd/xxd.c @@ -4,7 +4,6 @@ * Roger Knecht */ -#include #include #include #include diff --git a/cmd/yaffs2.c b/cmd/yaffs2.c index 27fbd1be8f7..d0724d9bea8 100644 --- a/cmd/yaffs2.c +++ b/cmd/yaffs2.c @@ -13,7 +13,6 @@ * ... */ -#include #include #include diff --git a/cmd/zfs.c b/cmd/zfs.c index 6ef1b56ab10..2f831532c2e 100644 --- a/cmd/zfs.c +++ b/cmd/zfs.c @@ -8,7 +8,6 @@ * made from existing GRUB Sources by Sun, GNU and others. */ -#include #include #include #include diff --git a/cmd/zip.c b/cmd/zip.c index 08afd62b973..2d255428822 100644 --- a/cmd/zip.c +++ b/cmd/zip.c @@ -4,10 +4,10 @@ * Lei Wen , Marvell Inc. */ -#include #include #include #include +#include static int do_zip(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { diff --git a/include/android_ab.h b/include/android_ab.h index 1fee7582b90..dbf20343da6 100644 --- a/include/android_ab.h +++ b/include/android_ab.h @@ -6,6 +6,8 @@ #ifndef __ANDROID_AB_H #define __ANDROID_AB_H +#include + struct blk_desc; struct disk_partition; -- cgit v1.3.1 From a79fc7a79cc9d4f7a46b19a4891484ac1e9ef599 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:11:00 -0600 Subject: common: Remove and add needed includes Remove from all "commmon/" files and when needed add missing include files directly. Signed-off-by: Tom Rini --- common/autoboot.c | 3 ++- common/bloblist.c | 1 - common/board_f.c | 2 +- common/board_info.c | 1 - common/board_r.c | 2 +- common/bootstage.c | 1 - common/bouncebuf.c | 1 - common/cli.c | 1 - common/cli_getch.c | 4 +++- common/cli_hush.c | 1 - common/cli_readline.c | 2 +- common/cli_simple.c | 1 - common/command.c | 3 ++- common/console.c | 1 - common/cros_ec.c | 1 - common/ddr_spd.c | 2 +- common/dfu.c | 1 - common/dlmalloc.c | 1 - common/edid.c | 1 - common/eeprom/eeprom_field.c | 3 ++- common/eeprom/eeprom_layout.c | 2 +- common/event.c | 2 +- common/exports.c | 1 - common/flash.c | 2 +- common/hash.c | 1 - common/hwconfig.c | 1 - common/init/board_init.c | 2 +- common/init/handoff.c | 2 +- common/iomux.c | 1 - common/iotrace.c | 1 - common/kallsyms.c | 1 - common/kgdb.c | 1 - common/kgdb_stubs.c | 1 - common/log.c | 1 - common/log_console.c | 1 - common/log_syslog.c | 1 - common/main.c | 1 - common/malloc_simple.c | 1 - common/memsize.c | 2 +- common/menu.c | 1 - common/miiphyutil.c | 1 - common/s_record.c | 1 - common/scp03.c | 3 ++- common/spl/spl.c | 2 +- common/spl/spl_atf.c | 1 - common/spl/spl_blk_fs.c | 1 - common/spl/spl_bootrom.c | 1 - common/spl/spl_dfu.c | 1 - common/spl/spl_ext.c | 1 - common/spl/spl_fat.c | 1 - common/spl/spl_fit.c | 1 - common/spl/spl_imx_container.c | 1 - common/spl/spl_legacy.c | 1 - common/spl/spl_mmc.c | 1 - common/spl/spl_nand.c | 1 - common/spl/spl_net.c | 1 - common/spl/spl_nor.c | 2 +- common/spl/spl_nvme.c | 1 - common/spl/spl_onenand.c | 1 - common/spl/spl_opensbi.c | 1 - common/spl/spl_ram.c | 1 - common/spl/spl_sata.c | 1 - common/spl/spl_sdp.c | 1 - common/spl/spl_semihosting.c | 1 - common/spl/spl_spi.c | 2 +- common/spl/spl_ubi.c | 1 - common/spl/spl_usb.c | 1 - common/spl/spl_xip.c | 2 +- common/spl/spl_ymodem.c | 1 - common/splash.c | 3 ++- common/splash_source.c | 1 - common/stackprot.c | 1 - common/stdio.c | 1 - common/update.c | 1 - common/usb.c | 1 - common/usb_hub.c | 2 +- common/usb_kbd.c | 2 +- common/usb_onboard_hub.c | 1 - common/usb_storage.c | 1 - common/xyzModem.c | 3 ++- include/atf_common.h | 2 ++ include/autoboot.h | 1 + include/bmp_layout.h | 2 ++ include/ddr_spd.h | 2 ++ include/flash.h | 2 ++ include/gzip.h | 2 ++ include/handoff.h | 1 + include/nand.h | 2 -- include/s_record.h | 2 ++ 89 files changed, 45 insertions(+), 82 deletions(-) (limited to 'include') diff --git a/common/autoboot.c b/common/autoboot.c index 6f0aeae6bf3..898a57bc92b 100644 --- a/common/autoboot.c +++ b/common/autoboot.c @@ -4,13 +4,14 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include #include #include #include +#include #include #include #include diff --git a/common/bloblist.c b/common/bloblist.c index ad06d7a1795..11d6422b695 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -6,7 +6,6 @@ #define LOG_CATEGORY LOGC_BLOBLIST -#include #include #include #include diff --git a/common/board_f.c b/common/board_f.c index 039d6d712d0..212ffb3090b 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -9,7 +9,7 @@ * Marius Groeger */ -#include +#include #include #include #include diff --git a/common/board_info.c b/common/board_info.c index f4c385add90..33c260b404e 100644 --- a/common/board_info.c +++ b/common/board_info.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include diff --git a/common/board_r.c b/common/board_r.c index da0b80f24ff..c823cd262f1 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -9,7 +9,7 @@ * Marius Groeger */ -#include +#include #include #include #include diff --git a/common/bootstage.c b/common/bootstage.c index 0e6d80718fd..fb6befcbc4a 100644 --- a/common/bootstage.c +++ b/common/bootstage.c @@ -11,7 +11,6 @@ #define LOG_CATEGORY LOGC_BOOT -#include #include #include #include diff --git a/common/bouncebuf.c b/common/bouncebuf.c index 934b83f7ec3..b2f87e4d939 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -5,7 +5,6 @@ * Copyright (C) 2012 Marek Vasut */ -#include #include #include #include diff --git a/common/cli.c b/common/cli.c index 1c33daf1149..4694a35cd0e 100644 --- a/common/cli.c +++ b/common/cli.c @@ -10,7 +10,6 @@ #define pr_fmt(fmt) "cli: %s: " fmt, __func__ -#include #include #include #include diff --git a/common/cli_getch.c b/common/cli_getch.c index 0ee79087774..a5ed6eb6fcf 100644 --- a/common/cli_getch.c +++ b/common/cli_getch.c @@ -6,8 +6,10 @@ * Copyright 2022 Google LLC */ -#include #include +#include +#include +#include /** * enum cli_esc_state_t - indicates what to do with an escape character diff --git a/common/cli_hush.c b/common/cli_hush.c index 9cda97f30e3..96a98209b9d 100644 --- a/common/cli_hush.c +++ b/common/cli_hush.c @@ -75,7 +75,6 @@ #define __U_BOOT__ #ifdef __U_BOOT__ -#include /* readline */ #include #include /* malloc, free, realloc*/ #include /* isalpha, isdigit */ diff --git a/common/cli_readline.c b/common/cli_readline.c index cf4339d0e50..4cb82b40149 100644 --- a/common/cli_readline.c +++ b/common/cli_readline.c @@ -8,7 +8,6 @@ * JinHua Luo, GuangDong Linux Center, */ -#include #include #include #include @@ -16,6 +15,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/common/cli_simple.c b/common/cli_simple.c index f89ba92d1b0..266c444334e 100644 --- a/common/cli_simple.c +++ b/common/cli_simple.c @@ -8,7 +8,6 @@ * JinHua Luo, GuangDong Linux Center, */ -#include #include #include #include diff --git a/common/command.c b/common/command.c index af8ffdba8f8..3f691399cbe 100644 --- a/common/command.c +++ b/common/command.c @@ -8,7 +8,7 @@ * Command Processor Table */ -#include +#include #include #include #include @@ -16,6 +16,7 @@ #include #include #include +#include #include #include diff --git a/common/console.c b/common/console.c index aa3053bc441..63f78004fdb 100644 --- a/common/console.c +++ b/common/console.c @@ -4,7 +4,6 @@ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it */ -#include #include #include #include diff --git a/common/cros_ec.c b/common/cros_ec.c index 249d1f19411..9ccc8fa16cd 100644 --- a/common/cros_ec.c +++ b/common/cros_ec.c @@ -8,7 +8,6 @@ * Software Foundation. */ -#include #include #include #include diff --git a/common/ddr_spd.c b/common/ddr_spd.c index 58dc9b3781b..2f6eb99bf0c 100644 --- a/common/ddr_spd.c +++ b/common/ddr_spd.c @@ -3,8 +3,8 @@ * Copyright 2008-2014 Freescale Semiconductor, Inc. */ -#include #include +#include /* used for ddr1 and ddr2 spd */ static int diff --git a/common/dfu.c b/common/dfu.c index 0d154e8d4c4..1af8194139c 100644 --- a/common/dfu.c +++ b/common/dfu.c @@ -10,7 +10,6 @@ * Lukasz Majewski */ -#include #include #include #include diff --git a/common/dlmalloc.c b/common/dlmalloc.c index a0616217d49..9549c59f358 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -12,7 +12,6 @@ #define DEBUG #endif -#include #include #include diff --git a/common/edid.c b/common/edid.c index 556c4e3434b..865ba9daa78 100644 --- a/common/edid.c +++ b/common/edid.c @@ -9,7 +9,6 @@ * Copyright (C) Nalin Dahyabhai */ -#include #include #include #include diff --git a/common/eeprom/eeprom_field.c b/common/eeprom/eeprom_field.c index f56eebe679f..3bacb1ae7eb 100644 --- a/common/eeprom/eeprom_field.c +++ b/common/eeprom/eeprom_field.c @@ -6,7 +6,8 @@ * Igor Grinberg */ -#include +#include +#include #include #include diff --git a/common/eeprom/eeprom_layout.c b/common/eeprom/eeprom_layout.c index 5a9be1da061..1a425c1754d 100644 --- a/common/eeprom/eeprom_layout.c +++ b/common/eeprom/eeprom_layout.c @@ -6,8 +6,8 @@ * Igor Grinberg */ -#include #include +#include #include #include diff --git a/common/event.c b/common/event.c index 16c2ba6cc92..dda569d4478 100644 --- a/common/event.c +++ b/common/event.c @@ -9,13 +9,13 @@ #define LOG_CATEGORY LOGC_EVENT -#include #include #include #include #include #include #include +#include #include #include diff --git a/common/exports.c b/common/exports.c index 20d8b759bc2..48b084c3861 100644 --- a/common/exports.c +++ b/common/exports.c @@ -1,4 +1,3 @@ -#include #include #include #include diff --git a/common/flash.c b/common/flash.c index 848f44e59df..24ddc8bee72 100644 --- a/common/flash.c +++ b/common/flash.c @@ -6,10 +6,10 @@ /* #define DEBUG */ -#include #include #include #include +#include #include diff --git a/common/hash.c b/common/hash.c index 3d6b84de473..ac63803fed9 100644 --- a/common/hash.c +++ b/common/hash.c @@ -10,7 +10,6 @@ */ #ifndef USE_HOSTCC -#include #include #include #include diff --git a/common/hwconfig.c b/common/hwconfig.c index cac0b6348f4..afaa6cb37ab 100644 --- a/common/hwconfig.c +++ b/common/hwconfig.c @@ -10,7 +10,6 @@ #ifndef HWCONFIG_TEST #include -#include #include #include #include diff --git a/common/init/board_init.c b/common/init/board_init.c index ed2365daa35..a06ec1caa2c 100644 --- a/common/init/board_init.c +++ b/common/init/board_init.c @@ -6,7 +6,7 @@ * Written by Simon Glass */ -#include +#include #include #include #include diff --git a/common/init/handoff.c b/common/init/handoff.c index d0be1bb17a2..687513bda35 100644 --- a/common/init/handoff.c +++ b/common/init/handoff.c @@ -5,9 +5,9 @@ * Copyright 2018 Google, Inc */ -#include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/common/iomux.c b/common/iomux.c index c428f7110a7..1224c15eb71 100644 --- a/common/iomux.c +++ b/common/iomux.c @@ -4,7 +4,6 @@ * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. */ -#include #include #include #include diff --git a/common/iotrace.c b/common/iotrace.c index 63d0cca3a00..a0a5613bd9b 100644 --- a/common/iotrace.c +++ b/common/iotrace.c @@ -5,7 +5,6 @@ #define IOTRACE_IMPL -#include #include #include #include diff --git a/common/kallsyms.c b/common/kallsyms.c index 13344e634b9..49b3897078a 100644 --- a/common/kallsyms.c +++ b/common/kallsyms.c @@ -5,7 +5,6 @@ * Licensed under the GPL-2 or later. */ -#include /* We need the weak marking as this symbol is provided specially */ extern const char system_map[] __attribute__((weak)); diff --git a/common/kgdb.c b/common/kgdb.c index 29b09fcfe56..01a09f17628 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -87,7 +87,6 @@ * ****************************************************************************/ -#include #include #include diff --git a/common/kgdb_stubs.c b/common/kgdb_stubs.c index 66aed7cea1c..256d88697d7 100644 --- a/common/kgdb_stubs.c +++ b/common/kgdb_stubs.c @@ -7,7 +7,6 @@ * Licensed under the GPL-2 or later. */ -#include #include #include #include diff --git a/common/log.c b/common/log.c index 42d35f04b68..dfee250b158 100644 --- a/common/log.c +++ b/common/log.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/common/log_console.c b/common/log_console.c index bb091ce21a4..c27101b8fe2 100644 --- a/common/log_console.c +++ b/common/log_console.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include diff --git a/common/log_syslog.c b/common/log_syslog.c index 53c4def5d1c..d01bb749c22 100644 --- a/common/log_syslog.c +++ b/common/log_syslog.c @@ -5,7 +5,6 @@ * Copyright (c) 2020, Heinrich Schuchardt */ -#include #include #include #include diff --git a/common/main.c b/common/main.c index 82d3aafa53c..b0b6e74f5d3 100644 --- a/common/main.c +++ b/common/main.c @@ -6,7 +6,6 @@ /* #define DEBUG */ -#include #include #include #include diff --git a/common/malloc_simple.c b/common/malloc_simple.c index 0a004d40e1e..4e6d7952b3c 100644 --- a/common/malloc_simple.c +++ b/common/malloc_simple.c @@ -7,7 +7,6 @@ #define LOG_CATEGORY LOGC_ALLOC -#include #include #include #include diff --git a/common/memsize.c b/common/memsize.c index d646df8b04c..86109579c95 100644 --- a/common/memsize.c +++ b/common/memsize.c @@ -4,7 +4,7 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include +#include #include #include #include diff --git a/common/menu.c b/common/menu.c index b55cf7b9996..e48424995b6 100644 --- a/common/menu.c +++ b/common/menu.c @@ -5,7 +5,6 @@ */ #include -#include #include #include #include diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 194c84e7e89..9b8744e5d8b 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -9,7 +9,6 @@ * channel. */ -#include #include #include #include diff --git a/common/s_record.c b/common/s_record.c index 2b7651fcffc..486dd93abd4 100644 --- a/common/s_record.c +++ b/common/s_record.c @@ -4,7 +4,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include static int hex1_bin (char c); diff --git a/common/scp03.c b/common/scp03.c index 09ef7b5ba3d..54b1bd54b60 100644 --- a/common/scp03.c +++ b/common/scp03.c @@ -4,10 +4,11 @@ * */ -#include #include #include #include +#include +#include static int scp03_enable(bool provision) { diff --git a/common/spl/spl.c b/common/spl/spl.c index e06bc75d36b..4e92771ecaa 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -6,7 +6,7 @@ * Aneesh V */ -#include +#include #include #include #include diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c index 3bdd013a35f..0b1c981a105 100644 --- a/common/spl/spl_atf.c +++ b/common/spl/spl_atf.c @@ -9,7 +9,6 @@ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH */ -#include #include #include #include diff --git a/common/spl/spl_blk_fs.c b/common/spl/spl_blk_fs.c index 04eac6f306b..bc551c5c074 100644 --- a/common/spl/spl_blk_fs.c +++ b/common/spl/spl_blk_fs.c @@ -5,7 +5,6 @@ * */ -#include #include #include #include diff --git a/common/spl/spl_bootrom.c b/common/spl/spl_bootrom.c index 0eefd39a519..e172a2d7b83 100644 --- a/common/spl/spl_bootrom.c +++ b/common/spl/spl_bootrom.c @@ -3,7 +3,6 @@ * Copyright (C) 2017 Theobroma Systems Design und Consulting GmH */ -#include #include __weak int board_return_to_bootrom(struct spl_image_info *spl_image, diff --git a/common/spl/spl_dfu.c b/common/spl/spl_dfu.c index 8a779da8fa1..e9f381c392c 100644 --- a/common/spl/spl_dfu.c +++ b/common/spl/spl_dfu.c @@ -5,7 +5,6 @@ * * Ravi B */ -#include #include #include #include diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c index 2be6f04b02c..2399e1d806d 100644 --- a/common/spl/spl_ext.c +++ b/common/spl/spl_ext.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c index a52f9e178e6..2e320ba7c01 100644 --- a/common/spl/spl_fat.c +++ b/common/spl/spl_fat.c @@ -8,7 +8,6 @@ * FAT Image Functions copied from spl_mmc.c */ -#include #include #include #include diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index e5195d460c4..988125be008 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -4,7 +4,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/common/spl/spl_imx_container.c b/common/spl/spl_imx_container.c index b4ea9241d68..2c31777fcd3 100644 --- a/common/spl/spl_imx_container.c +++ b/common/spl/spl_imx_container.c @@ -4,7 +4,6 @@ */ #define LOG_CATEGORY LOGC_ARCH -#include #include #include #include diff --git a/common/spl/spl_legacy.c b/common/spl/spl_legacy.c index 08687ca8f6c..a77893455f2 100644 --- a/common/spl/spl_legacy.c +++ b/common/spl/spl_legacy.c @@ -3,7 +3,6 @@ * Copyright (C) 2020 Stefan Roese */ -#include #include #include #include diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index 3d032bb27ce..f4481b90463 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -5,7 +5,6 @@ * * Aneesh V */ -#include #include #include #include diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c index 3b0a1524238..5631fa6d563 100644 --- a/common/spl/spl_nand.c +++ b/common/spl/spl_nand.c @@ -3,7 +3,6 @@ * Copyright (C) 2011 * Corscience GmbH & Co. KG - Simon Schwarz */ -#include #include #include #include diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c index 898f9df705a..be7278bb933 100644 --- a/common/spl/spl_net.c +++ b/common/spl/spl_net.c @@ -6,7 +6,6 @@ * (C) Copyright 2012 * Ilya Yanok */ -#include #include #include #include diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index 70745114efe..ed76b5e1293 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -3,7 +3,7 @@ * Copyright (C) 2012 Stefan Roese */ -#include +#include #include #include #include diff --git a/common/spl/spl_nvme.c b/common/spl/spl_nvme.c index c8774d67ecf..0e15a3c7545 100644 --- a/common/spl/spl_nvme.c +++ b/common/spl/spl_nvme.c @@ -5,7 +5,6 @@ * */ -#include #include #include diff --git a/common/spl/spl_onenand.c b/common/spl/spl_onenand.c index 53a8c6de89e..f6f65286c21 100644 --- a/common/spl/spl_onenand.c +++ b/common/spl/spl_onenand.c @@ -7,7 +7,6 @@ * Copyright (C) 2011 * Corscience GmbH & Co. KG - Simon Schwarz */ -#include #include #include #include diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c index ec62aab929b..5a26d7c31a4 100644 --- a/common/spl/spl_opensbi.c +++ b/common/spl/spl_opensbi.c @@ -5,7 +5,6 @@ * * Based on common/spl/spl_atf.c */ -#include #include #include #include diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c index 8aeda237be1..5a23841f698 100644 --- a/common/spl/spl_ram.c +++ b/common/spl/spl_ram.c @@ -9,7 +9,6 @@ * Michal Simek * Stefan Agner */ -#include #include #include #include diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c index 32746ce9f3c..18acc40e46f 100644 --- a/common/spl/spl_sata.c +++ b/common/spl/spl_sata.c @@ -8,7 +8,6 @@ * Derived work from spl_usb.c */ -#include #include #include #include diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c index 9143c27bbf1..9ca80bd534f 100644 --- a/common/spl/spl_sdp.c +++ b/common/spl/spl_sdp.c @@ -4,7 +4,6 @@ * Author: Stefan Agner */ -#include #include #include #include diff --git a/common/spl/spl_semihosting.c b/common/spl/spl_semihosting.c index 941fa911040..2047248f39b 100644 --- a/common/spl/spl_semihosting.c +++ b/common/spl/spl_semihosting.c @@ -3,7 +3,6 @@ * Copyright (C) 2022 Sean Anderson */ -#include #include #include #include diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index 89de73c726c..8ab4803f7c4 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -8,7 +8,7 @@ * Heiko Schocher, DENX Software Engineering, hs@denx.de. */ -#include +#include #include #include #include diff --git a/common/spl/spl_ubi.c b/common/spl/spl_ubi.c index d7ab9efd110..a8d3f43b452 100644 --- a/common/spl/spl_ubi.c +++ b/common/spl/spl_ubi.c @@ -4,7 +4,6 @@ * Ladislav Michl */ -#include #include #include #include diff --git a/common/spl/spl_usb.c b/common/spl/spl_usb.c index 479e2dc1826..31fc4b57d48 100644 --- a/common/spl/spl_usb.c +++ b/common/spl/spl_usb.c @@ -8,7 +8,6 @@ * Derived work from spl_mmc.c */ -#include #include #include #include diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c index 959915ffa61..1465c3e46b9 100644 --- a/common/spl/spl_xip.c +++ b/common/spl/spl_xip.c @@ -4,7 +4,7 @@ * Author(s): Vikas Manocha, for STMicroelectronics. */ -#include +#include #include #include #include diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c index 1faaa2c938d..fd48f80f75e 100644 --- a/common/spl/spl_ymodem.c +++ b/common/spl/spl_ymodem.c @@ -8,7 +8,6 @@ * * Matt Porter */ -#include #include #include #include diff --git a/common/splash.c b/common/splash.c index 6820db683bd..c5591293634 100644 --- a/common/splash.c +++ b/common/splash.c @@ -20,11 +20,12 @@ * */ -#include #include #include #include #include +#include +#include static struct splash_location default_splash_locations[] = { { diff --git a/common/splash_source.c b/common/splash_source.c index 2ce0768833d..5b271160449 100644 --- a/common/splash_source.c +++ b/common/splash_source.c @@ -5,7 +5,6 @@ * Authors: Igor Grinberg */ -#include #include #include #include diff --git a/common/stackprot.c b/common/stackprot.c index 6495951a773..4e3297b7d00 100644 --- a/common/stackprot.c +++ b/common/stackprot.c @@ -3,7 +3,6 @@ * Copyright 2021 Broadcom */ -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/common/stdio.c b/common/stdio.c index e3354f092dc..a61220ce4b9 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -9,7 +9,6 @@ */ #include -#include #include #include #include diff --git a/common/update.c b/common/update.c index ec302ca68fb..eb0b60a2ce4 100644 --- a/common/update.c +++ b/common/update.c @@ -6,7 +6,6 @@ * Bartlomiej Sieka */ -#include #include #include #include diff --git a/common/usb.c b/common/usb.c index 99e6b857c74..84b10f5c7d8 100644 --- a/common/usb.c +++ b/common/usb.c @@ -25,7 +25,6 @@ * * For each transfer (except "Interrupt") we wait for completion. */ -#include #include #include #include diff --git a/common/usb_hub.c b/common/usb_hub.c index 2e054eb9353..807f490bb60 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -21,7 +21,6 @@ * Probes device for being a hub and configurate it */ -#include #include #include #include @@ -29,6 +28,7 @@ #include #include #include +#include #include #include #include diff --git a/common/usb_kbd.c b/common/usb_kbd.c index 820f591fc5b..f3b4a3c94e6 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -6,7 +6,6 @@ * Part of this source has been derived from the Linux USB * project. */ -#include #include #include #include @@ -15,6 +14,7 @@ #include #include #include +#include #include #include #ifdef CONFIG_SANDBOX diff --git a/common/usb_onboard_hub.c b/common/usb_onboard_hub.c index 89e18a2ddad..68a04ac0412 100644 --- a/common/usb_onboard_hub.c +++ b/common/usb_onboard_hub.c @@ -7,7 +7,6 @@ * Mostly inspired by Linux kernel v6.1 onboard_usb_hub driver */ -#include #include #include #include diff --git a/common/usb_storage.c b/common/usb_storage.c index 774d5bdf54b..a79ed2e23a4 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -32,7 +32,6 @@ */ -#include #include #include #include diff --git a/common/xyzModem.c b/common/xyzModem.c index fb319f71190..9feb240de28 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -21,12 +21,13 @@ * *========================================================================== */ -#include #include #include +#include #include #include #include +#include /* Assumption - run xyzModem protocol over the console port */ diff --git a/include/atf_common.h b/include/atf_common.h index d69892fac6c..5ae45090252 100644 --- a/include/atf_common.h +++ b/include/atf_common.h @@ -74,6 +74,8 @@ #ifndef __ASSEMBLY__ +#include + /******************************************************************************* * Structure used for telling the next BL how much of a particular type of * memory is available for its use and how much is already used. diff --git a/include/autoboot.h b/include/autoboot.h index eb204995d07..c68bd79f8dc 100644 --- a/include/autoboot.h +++ b/include/autoboot.h @@ -12,6 +12,7 @@ #define __AUTOBOOT_H #include +#include #ifdef CONFIG_SANDBOX diff --git a/include/bmp_layout.h b/include/bmp_layout.h index a5c9498dc9f..eabbd25a330 100644 --- a/include/bmp_layout.h +++ b/include/bmp_layout.h @@ -10,6 +10,8 @@ #ifndef _BMP_H_ #define _BMP_H_ +#include + struct __packed bmp_color_table_entry { __u8 blue; __u8 green; diff --git a/include/ddr_spd.h b/include/ddr_spd.h index fe163da43e5..c4d199fd7e1 100644 --- a/include/ddr_spd.h +++ b/include/ddr_spd.h @@ -6,6 +6,8 @@ #ifndef _DDR_SPD_H_ #define _DDR_SPD_H_ +#include + /* * Format from "JEDEC Standard No. 21-C, * Appendix D: Rev 1.0: SPD's for DDR SDRAM diff --git a/include/flash.h b/include/flash.h index 3710a2731b7..0f736977411 100644 --- a/include/flash.h +++ b/include/flash.h @@ -7,6 +7,8 @@ #ifndef _FLASH_H_ #define _FLASH_H_ +#include + /*----------------------------------------------------------------------- * FLASH Info: contains chip specific data, per FLASH bank */ diff --git a/include/gzip.h b/include/gzip.h index e578b283edc..5e0d0ec07fb 100644 --- a/include/gzip.h +++ b/include/gzip.h @@ -7,6 +7,8 @@ #ifndef __GZIP_H #define __GZIP_H +#include + struct blk_desc; /** diff --git a/include/handoff.h b/include/handoff.h index 0104b834f2c..c0ae7b19a75 100644 --- a/include/handoff.h +++ b/include/handoff.h @@ -10,6 +10,7 @@ #if CONFIG_IS_ENABLED(HANDOFF) +#include #include /** diff --git a/include/nand.h b/include/nand.h index 220ffa202ef..cdba7384ad1 100644 --- a/include/nand.h +++ b/include/nand.h @@ -8,8 +8,6 @@ #ifndef _NAND_H_ #define _NAND_H_ -#include - extern void nand_init(void); void nand_reinit(void); unsigned long nand_size(void); diff --git a/include/s_record.h b/include/s_record.h index 3ece695941d..aab09d9c3c8 100644 --- a/include/s_record.h +++ b/include/s_record.h @@ -4,6 +4,8 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ +#include + /*-------------------------------------------------------------------------- * * Motorola S-Record Format: -- cgit v1.3.1 From 0f92fa4560335f04858bfc9881e0bc6bbb756b3f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:11:03 -0600 Subject: env: Remove and add needed includes Remove from all "env/" files and when needed add missing include files directly. Signed-off-by: Tom Rini --- env/attr.c | 4 ++-- env/callback.c | 1 - env/common.c | 1 - env/eeprom.c | 1 - env/env.c | 2 +- env/ext4.c | 1 - env/fat.c | 1 - env/flags.c | 4 ++-- env/flash.c | 1 - env/mmc.c | 1 - env/nand.c | 1 - env/nowhere.c | 1 - env/nvram.c | 1 - env/onenand.c | 1 - env/remote.c | 2 +- env/sf.c | 1 - env/ubi.c | 1 - include/env_callback.h | 1 + include/env_default.h | 1 + include/env_flags.h | 2 ++ 20 files changed, 10 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/env/attr.c b/env/attr.c index a958c714828..fed5b212e2f 100644 --- a/env/attr.c +++ b/env/attr.c @@ -4,13 +4,13 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ +#include #ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */ #include -#include #include #else -#include #include +#include #endif #include diff --git a/env/callback.c b/env/callback.c index 98ddba035ea..b7cbccd1175 100644 --- a/env/callback.c +++ b/env/callback.c @@ -4,7 +4,6 @@ * Joe Hershberger, National Instruments, joe.hershberger@ni.com */ -#include #include #include #include diff --git a/env/common.c b/env/common.c index 48a565107c1..d8c276dddfd 100644 --- a/env/common.c +++ b/env/common.c @@ -7,7 +7,6 @@ * Andreas Heppel */ -#include #include #include #include diff --git a/env/eeprom.c b/env/eeprom.c index 7ce7e9972b2..b290b1013e1 100644 --- a/env/eeprom.c +++ b/env/eeprom.c @@ -7,7 +7,6 @@ * Andreas Heppel */ -#include #include #include #include diff --git a/env/env.c b/env/env.c index bae3f6482ae..bcc189e14db 100644 --- a/env/env.c +++ b/env/env.c @@ -4,13 +4,13 @@ * Written by Simon Glass */ -#include #include #include #include #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/env/ext4.c b/env/ext4.c index da26705b8da..eb16568bd46 100644 --- a/env/ext4.c +++ b/env/ext4.c @@ -18,7 +18,6 @@ * Manjunatha C Achar */ -#include #include #include diff --git a/env/fat.c b/env/fat.c index 3172130d75d..2a40f123936 100644 --- a/env/fat.c +++ b/env/fat.c @@ -6,7 +6,6 @@ * Maximilian Schwerin */ -#include #include #include #include diff --git a/env/flags.c b/env/flags.c index e2866361dfe..233fd460d84 100644 --- a/env/flags.c +++ b/env/flags.c @@ -8,9 +8,9 @@ #include #include +#include #ifdef USE_HOSTCC /* Eliminate "ANSI does not permit..." warnings */ #include -#include #include "fw_env_private.h" #include "fw_env.h" #include @@ -18,7 +18,7 @@ #define env_get fw_getenv #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) #else -#include +#include #include #endif diff --git a/env/flash.c b/env/flash.c index 1e75f8c004e..1bd6e7003d6 100644 --- a/env/flash.c +++ b/env/flash.c @@ -9,7 +9,6 @@ /* #define DEBUG */ -#include #include #include #include diff --git a/env/mmc.c b/env/mmc.c index 7afb733e890..776df0786be 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -5,7 +5,6 @@ /* #define DEBUG */ -#include #include #include diff --git a/env/nand.c b/env/nand.c index df300b13179..fef5697ec39 100644 --- a/env/nand.c +++ b/env/nand.c @@ -13,7 +13,6 @@ * Andreas Heppel */ -#include #include #include #include diff --git a/env/nowhere.c b/env/nowhere.c index 9ebc357dbd7..326f27db2e9 100644 --- a/env/nowhere.c +++ b/env/nowhere.c @@ -7,7 +7,6 @@ * Andreas Heppel */ -#include #include #include #include diff --git a/env/nvram.c b/env/nvram.c index 229c34f5367..d49cd0f337a 100644 --- a/env/nvram.c +++ b/env/nvram.c @@ -7,7 +7,6 @@ * Andreas Heppel */ -#include #include #include #include diff --git a/env/onenand.c b/env/onenand.c index 1faa2cb62a3..8c349ef5ce6 100644 --- a/env/onenand.c +++ b/env/onenand.c @@ -7,7 +7,6 @@ * Kyungmin Park */ -#include #include #include #include diff --git a/env/remote.c b/env/remote.c index 166bebf52b5..0cc383c2360 100644 --- a/env/remote.c +++ b/env/remote.c @@ -5,10 +5,10 @@ /* #define DEBUG */ -#include #include #include #include +#include #include #include diff --git a/env/sf.c b/env/sf.c index 8f5c03b00d3..c747e175e31 100644 --- a/env/sf.c +++ b/env/sf.c @@ -8,7 +8,6 @@ * * (C) Copyright 2008 Atmel Corporation */ -#include #include #include #include diff --git a/env/ubi.c b/env/ubi.c index 445d34fedb8..0c3e93c2bf2 100644 --- a/env/ubi.c +++ b/env/ubi.c @@ -4,7 +4,6 @@ * Joe Hershberger */ -#include #include #include diff --git a/include/env_callback.h b/include/env_callback.h index 23bc650c162..8e500aaaf80 100644 --- a/include/env_callback.h +++ b/include/env_callback.h @@ -7,6 +7,7 @@ #ifndef __ENV_CALLBACK_H__ #define __ENV_CALLBACK_H__ +#include #include #include #include diff --git a/include/env_default.h b/include/env_default.h index 8ee500d1709..076ffdd44e9 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -7,6 +7,7 @@ * Andreas Heppel */ +#include #include #include diff --git a/include/env_flags.h b/include/env_flags.h index d785f87cdcb..2476043b0e3 100644 --- a/include/env_flags.h +++ b/include/env_flags.h @@ -7,6 +7,8 @@ #ifndef __ENV_FLAGS_H__ #define __ENV_FLAGS_H__ +#include + enum env_flags_vartype { env_flags_vartype_string, env_flags_vartype_decimal, -- cgit v1.3.1 From 8d28959d700aa537650b5e62c63d49d3b807e809 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 27 Apr 2024 08:11:05 -0600 Subject: fs: Remove and add needed includes Remove from all "fs/" files and when needed add missing include files directly. Signed-off-by: Tom Rini --- fs/btrfs/dev.c | 1 - fs/btrfs/disk-io.c | 1 - fs/btrfs/volumes.c | 2 +- fs/cbfs/cbfs.c | 2 +- fs/cramfs/cramfs.c | 2 +- fs/cramfs/uncompress.c | 2 +- fs/ext4/dev.c | 1 - fs/ext4/ext4_common.c | 1 - fs/ext4/ext4_journal.c | 1 - fs/ext4/ext4_write.c | 1 - fs/ext4/ext4fs.c | 1 - fs/fat/fat.c | 1 - fs/fat/fat_write.c | 1 - fs/fs.c | 2 +- fs/fs_internal.c | 1 - fs/jffs2/compr_zlib.c | 2 -- fs/jffs2/jffs2_1pass.c | 1 - fs/jffs2/mergesort.c | 1 - fs/sandbox/host_bootdev.c | 1 - fs/sandbox/sandboxfs.c | 2 +- fs/semihostingfs.c | 2 +- fs/ubifs/super.c | 1 - fs/ubifs/ubifs.c | 1 - fs/yaffs2/yaffs_mtdif.c | 1 - fs/yaffs2/yaffs_mtdif2.c | 1 - fs/yaffs2/yaffs_uboot_glue.c | 1 - fs/zfs/dev.c | 1 - fs/zfs/zfs.c | 1 - fs/zfs/zfs_fletcher.c | 1 - fs/zfs/zfs_lzjb.c | 1 - fs/zfs/zfs_sha256.c | 1 - include/jffs2/load_kernel.h | 1 + 32 files changed, 8 insertions(+), 32 deletions(-) (limited to 'include') diff --git a/fs/btrfs/dev.c b/fs/btrfs/dev.c index cb3b9713a5f..e27a032c9f6 100644 --- a/fs/btrfs/dev.c +++ b/fs/btrfs/dev.c @@ -5,7 +5,6 @@ * 2017 Marek Behún, CZ.NIC, kabel@kernel.org */ -#include #include #include #include diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c index 7eaa7e94960..e5bfaf461c2 100644 --- a/fs/btrfs/disk-io.c +++ b/fs/btrfs/disk-io.c @@ -1,5 +1,4 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include #include #include diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c index 7d4095d9ca8..8ec545eded7 100644 --- a/fs/btrfs/volumes.c +++ b/fs/btrfs/volumes.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ #include -#include +#include #include #include "ctree.h" #include "disk-io.h" diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c index 714f4baafc9..ad5583233bb 100644 --- a/fs/cbfs/cbfs.c +++ b/fs/cbfs/cbfs.c @@ -3,10 +3,10 @@ * Copyright (c) 2011 The Chromium OS Authors. All rights reserved. */ -#include #include #include #include +#include #include /* Offset of master header from the start of a coreboot ROM */ diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c index abb2de34eb0..22148ff8fe2 100644 --- a/fs/cramfs/cramfs.c +++ b/fs/cramfs/cramfs.c @@ -24,7 +24,7 @@ * The actual compression is based on zlib, see the other files. */ -#include +#include #include #include #include diff --git a/fs/cramfs/uncompress.c b/fs/cramfs/uncompress.c index 0d071b69f4c..2141edf22e4 100644 --- a/fs/cramfs/uncompress.c +++ b/fs/cramfs/uncompress.c @@ -20,7 +20,7 @@ * then is used by multiple filesystems. */ -#include +#include #include #include #include diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c index 168443de1ff..3fd8980b1d6 100644 --- a/fs/ext4/dev.c +++ b/fs/ext4/dev.c @@ -22,7 +22,6 @@ * fs/ext2/dev.c file in uboot. */ -#include #include #include #include diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index 2ff0dca2495..857c15d878e 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -18,7 +18,6 @@ * ext4write : Based on generic ext4 protocol. */ -#include #include #include #include diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c index e80f797c8dc..02c4ac2cb93 100644 --- a/fs/ext4/ext4_journal.c +++ b/fs/ext4/ext4_journal.c @@ -13,7 +13,6 @@ * Copyright 1998-2000 Red Hat, Inc --- All Rights Reserved */ -#include #include #include #include diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c index d057f6b5a79..38da3923c47 100644 --- a/fs/ext4/ext4_write.c +++ b/fs/ext4/ext4_write.c @@ -21,7 +21,6 @@ */ -#include #include #include #include diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index 33e200ffa3c..da59cb008fc 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -20,7 +20,6 @@ * ext4write : Based on generic ext4 protocol. */ -#include #include #include #include diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 2dd9d4e72dc..e2570e81676 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -10,7 +10,6 @@ #define LOG_CATEGORY LOGC_FS -#include #include #include #include diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index c8e0fbf1a3b..ea877ee9171 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -7,7 +7,6 @@ #define LOG_CATEGORY LOGC_FS -#include #include #include #include diff --git a/fs/fs.c b/fs/fs.c index acf465bdd80..bed1f7242f4 100644 --- a/fs/fs.c +++ b/fs/fs.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -21,6 +20,7 @@ #include #include #include +#include #include #include #include diff --git a/fs/fs_internal.c b/fs/fs_internal.c index 111f91b355d..51c1719361b 100644 --- a/fs/fs_internal.c +++ b/fs/fs_internal.c @@ -7,7 +7,6 @@ #define LOG_CATEGORY LOGC_CORE -#include #include #include #include diff --git a/fs/jffs2/compr_zlib.c b/fs/jffs2/compr_zlib.c index d306b6dc4cf..e1e3c15e75e 100644 --- a/fs/jffs2/compr_zlib.c +++ b/fs/jffs2/compr_zlib.c @@ -35,8 +35,6 @@ * */ -#include -#include #include #include diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 49ba82ef959..5b7d7f4ae88 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -111,7 +111,6 @@ */ -#include #include #include #include diff --git a/fs/jffs2/mergesort.c b/fs/jffs2/mergesort.c index fca77aa6511..495937d792d 100644 --- a/fs/jffs2/mergesort.c +++ b/fs/jffs2/mergesort.c @@ -7,7 +7,6 @@ * http://www.chiark.greenend.org.uk/~sgtatham/algorithms/listsort.html */ -#include #include "jffs2_private.h" int sort_list(struct b_list *list) diff --git a/fs/sandbox/host_bootdev.c b/fs/sandbox/host_bootdev.c index 3ef53627608..3f74972a9f8 100644 --- a/fs/sandbox/host_bootdev.c +++ b/fs/sandbox/host_bootdev.c @@ -6,7 +6,6 @@ * Written by Simon Glass */ -#include #include #include #include diff --git a/fs/sandbox/sandboxfs.c b/fs/sandbox/sandboxfs.c index 4ae41d5b4db..773b583fa43 100644 --- a/fs/sandbox/sandboxfs.c +++ b/fs/sandbox/sandboxfs.c @@ -3,7 +3,7 @@ * Copyright (c) 2012, Google Inc. */ -#include +#include #include #include #include diff --git a/fs/semihostingfs.c b/fs/semihostingfs.c index 3592338a686..77e39ca407e 100644 --- a/fs/semihostingfs.c +++ b/fs/semihostingfs.c @@ -4,7 +4,7 @@ * Copyright (c) 2012, Google Inc. */ -#include +#include #include #include #include diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index 3e7160352e6..788f88f0495 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -29,7 +29,6 @@ #include #else -#include #include #include #include diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index a509584e5d7..75de01e95f7 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -11,7 +11,6 @@ * Adrian Hunter */ -#include #include #include #include diff --git a/fs/yaffs2/yaffs_mtdif.c b/fs/yaffs2/yaffs_mtdif.c index 50fed2d4b15..0eec22bc4a5 100644 --- a/fs/yaffs2/yaffs_mtdif.c +++ b/fs/yaffs2/yaffs_mtdif.c @@ -12,7 +12,6 @@ */ /* XXX U-BOOT XXX */ -#include #include "yportenv.h" diff --git a/fs/yaffs2/yaffs_mtdif2.c b/fs/yaffs2/yaffs_mtdif2.c index 81a4d964f3e..2bf171f99f1 100644 --- a/fs/yaffs2/yaffs_mtdif2.c +++ b/fs/yaffs2/yaffs_mtdif2.c @@ -14,7 +14,6 @@ /* mtd interface for YAFFS2 */ /* XXX U-BOOT XXX */ -#include #include #include diff --git a/fs/yaffs2/yaffs_uboot_glue.c b/fs/yaffs2/yaffs_uboot_glue.c index 0a920561149..deddbaac51e 100644 --- a/fs/yaffs2/yaffs_uboot_glue.c +++ b/fs/yaffs2/yaffs_uboot_glue.c @@ -19,7 +19,6 @@ * This version now uses the ydevconfig mechanism to set up partitions. */ -#include #include #include #include diff --git a/fs/zfs/dev.c b/fs/zfs/dev.c index fcd9893b3ac..722c6a86176 100644 --- a/fs/zfs/dev.c +++ b/fs/zfs/dev.c @@ -8,7 +8,6 @@ */ -#include #include #include #include diff --git a/fs/zfs/zfs.c b/fs/zfs/zfs.c index bfc11fa6676..c44e7ece5df 100644 --- a/fs/zfs/zfs.c +++ b/fs/zfs/zfs.c @@ -10,7 +10,6 @@ * Copyright 2004 Sun Microsystems, Inc. */ -#include #include #include #include diff --git a/fs/zfs/zfs_fletcher.c b/fs/zfs/zfs_fletcher.c index 008a303ec79..b06c335626a 100644 --- a/fs/zfs/zfs_fletcher.c +++ b/fs/zfs/zfs_fletcher.c @@ -8,7 +8,6 @@ * Use is subject to license terms. */ -#include #include #include #include diff --git a/fs/zfs/zfs_lzjb.c b/fs/zfs/zfs_lzjb.c index b42d4980129..e79c5b4278f 100644 --- a/fs/zfs/zfs_lzjb.c +++ b/fs/zfs/zfs_lzjb.c @@ -8,7 +8,6 @@ * Use is subject to license terms. */ -#include #include #include #include diff --git a/fs/zfs/zfs_sha256.c b/fs/zfs/zfs_sha256.c index cb5b1c06834..602d75254ff 100644 --- a/fs/zfs/zfs_sha256.c +++ b/fs/zfs/zfs_sha256.c @@ -8,7 +8,6 @@ * Use is subject to license terms. */ -#include #include #include #include diff --git a/include/jffs2/load_kernel.h b/include/jffs2/load_kernel.h index 9346d7ee9f1..fa4600e84fc 100644 --- a/include/jffs2/load_kernel.h +++ b/include/jffs2/load_kernel.h @@ -10,6 +10,7 @@ *-----------------------------------------------------------------------*/ #include +#include /* mtd device types */ #define MTD_DEV_TYPE_NOR 0x0001 -- cgit v1.3.1 From 675dd31a7dc4c85385d5bce3b4fb281aa91968cb Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 30 Apr 2024 07:35:28 -0600 Subject: include: Add missing headers in a few instances A few headers rely on indirect inclusion of or so add them directly. In the case of add a "struct bd_info;" as well rather than the large header chain to resolve that. Signed-off-by: Tom Rini --- include/mailbox.h | 2 ++ include/netdev.h | 3 +++ include/phy_interface.h | 1 + include/u-boot/sha1.h | 2 ++ include/u-boot/sha256.h | 2 ++ include/u-boot/sha512.h | 2 ++ 6 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/mailbox.h b/include/mailbox.h index 323b6c2bc5d..e70266fb61c 100644 --- a/include/mailbox.h +++ b/include/mailbox.h @@ -6,6 +6,8 @@ #ifndef _MAILBOX_H #define _MAILBOX_H +#include + /** * A mailbox is a hardware mechanism for transferring small fixed-size messages * and/or notifications between the CPU on which U-Boot runs and some other diff --git a/include/netdev.h b/include/netdev.h index 2a7f40e5040..2a06d9a261b 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -10,9 +10,12 @@ #ifndef _NETDEV_H_ #define _NETDEV_H_ + +#include #include struct udevice; +struct bd_info; /* * Board and CPU-specific initialization functions diff --git a/include/phy_interface.h b/include/phy_interface.h index 31be3228c7c..b74f4ccd84a 100644 --- a/include/phy_interface.h +++ b/include/phy_interface.h @@ -11,6 +11,7 @@ #define _PHY_INTERFACE_H #include +#include typedef enum { PHY_INTERFACE_MODE_NA, /* don't touch */ diff --git a/include/u-boot/sha1.h b/include/u-boot/sha1.h index 09fee594d26..c1e9f67068d 100644 --- a/include/u-boot/sha1.h +++ b/include/u-boot/sha1.h @@ -14,6 +14,8 @@ #ifndef _SHA1_H #define _SHA1_H +#include + #ifdef __cplusplus extern "C" { #endif diff --git a/include/u-boot/sha256.h b/include/u-boot/sha256.h index 9aa1251789a..a4fe176c0b4 100644 --- a/include/u-boot/sha256.h +++ b/include/u-boot/sha256.h @@ -1,6 +1,8 @@ #ifndef _SHA256_H #define _SHA256_H +#include + #define SHA256_SUM_LEN 32 #define SHA256_DER_LEN 19 diff --git a/include/u-boot/sha512.h b/include/u-boot/sha512.h index 516729d7750..90bd96a3f8c 100644 --- a/include/u-boot/sha512.h +++ b/include/u-boot/sha512.h @@ -1,6 +1,8 @@ #ifndef _SHA512_H #define _SHA512_H +#include + #define SHA384_SUM_LEN 48 #define SHA384_DER_LEN 19 #define SHA512_SUM_LEN 64 -- cgit v1.3.1 From 6a7185887b83a5cc334c7ce5bd65970381b2f4ce Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 30 Apr 2024 20:40:48 -0600 Subject: global: Make include This follows the example of RISC-V where includes directly as "gd" includes a reference to bd_info already and so the first must include the second anyhow. We then remove from all of the places which include references to "gd" an so have already. Signed-off-by: Tom Rini --- api/api_platform-arm.c | 1 - api/api_platform-mips.c | 1 - api/api_platform-powerpc.c | 1 - arch/arc/include/asm/global_data.h | 2 ++ arch/arm/include/asm/global_data.h | 1 + arch/arm/lib/bdinfo.c | 1 - arch/arm/lib/cache-cp15.c | 1 - arch/arm/mach-davinci/cpu.c | 1 - arch/arm/mach-davinci/misc.c | 1 - arch/arm/mach-davinci/spl.c | 1 - arch/arm/mach-imx/ele_ahab.c | 1 - arch/arm/mach-imx/mx5/mx53_dram.c | 1 - arch/arm/mach-mediatek/mt7622/init.c | 1 - arch/arm/mach-mediatek/mt7981/init.c | 1 - arch/arm/mach-mediatek/mt7986/init.c | 1 - arch/arm/mach-mediatek/mt7988/init.c | 1 - arch/arm/mach-mvebu/armada8k/dram.c | 1 - arch/arm/mach-mvebu/dram.c | 1 - arch/arm/mach-omap2/omap-cache.c | 1 - arch/arm/mach-omap2/omap3/emif4.c | 1 - arch/arm/mach-omap2/omap3/sdrc.c | 1 - arch/arm/mach-owl/soc.c | 1 - arch/arm/mach-renesas/memmap-gen3.c | 1 - arch/arm/mach-renesas/memmap-rzg2l.c | 1 - arch/arm/mach-socfpga/clock_manager.c | 1 - arch/arm/mach-socfpga/clock_manager_agilex5.c | 1 - arch/arm/mach-socfpga/spl_a10.c | 1 - arch/arm/mach-socfpga/spl_agilex.c | 1 - arch/arm/mach-socfpga/spl_gen5.c | 1 - arch/arm/mach-socfpga/spl_n5x.c | 1 - arch/arm/mach-socfpga/spl_s10.c | 1 - arch/arm/mach-uniphier/dram_init.c | 1 - arch/arm/mach-versal-net/clk.c | 1 - arch/arm/mach-versal-net/cpu.c | 1 - arch/arm/mach-versal/clk.c | 1 - arch/arm/mach-versal/cpu.c | 1 - arch/arm/mach-zynqmp/clk.c | 1 - arch/arm/mach-zynqmp/cpu.c | 1 - arch/m68k/include/asm/global_data.h | 2 ++ arch/m68k/lib/bdinfo.c | 1 - arch/microblaze/cpu/spl.c | 1 - arch/microblaze/include/asm/global_data.h | 1 + arch/mips/include/asm/global_data.h | 1 + arch/mips/lib/traps.c | 1 - arch/nios2/include/asm/global_data.h | 1 + arch/powerpc/cpu/mpc83xx/interrupts.c | 1 - arch/powerpc/cpu/mpc83xx/pcie.c | 1 - arch/powerpc/cpu/mpc83xx/spd_sdram.c | 1 - arch/powerpc/cpu/mpc83xx/speed.c | 1 - arch/powerpc/cpu/mpc85xx/b4860_ids.c | 1 + arch/powerpc/cpu/mpc85xx/cmd_errata.c | 1 - arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p2041_ids.c | 3 ++- arch/powerpc/cpu/mpc85xx/p2041_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/p3041_ids.c | 1 + arch/powerpc/cpu/mpc85xx/p4080_ids.c | 1 + arch/powerpc/cpu/mpc85xx/p5040_ids.c | 1 + arch/powerpc/cpu/mpc85xx/speed.c | 1 - arch/powerpc/cpu/mpc85xx/spl_minimal.c | 1 - arch/powerpc/cpu/mpc85xx/t1024_ids.c | 3 ++- arch/powerpc/cpu/mpc85xx/t1024_serdes.c | 1 - arch/powerpc/cpu/mpc85xx/t1040_ids.c | 3 ++- arch/powerpc/cpu/mpc85xx/t1040_serdes.c | 3 ++- arch/powerpc/cpu/mpc85xx/t2080_ids.c | 3 ++- arch/powerpc/cpu/mpc85xx/t2080_serdes.c | 3 ++- arch/powerpc/cpu/mpc85xx/t4240_ids.c | 3 ++- arch/powerpc/cpu/mpc85xx/t4240_serdes.c | 1 - arch/powerpc/cpu/mpc8xxx/fsl_lbc.c | 1 - arch/powerpc/cpu/mpc8xxx/fsl_pamu.c | 4 +++- arch/powerpc/cpu/mpc8xxx/law.c | 1 - arch/powerpc/cpu/mpc8xxx/pamu_table.c | 1 - arch/powerpc/cpu/mpc8xxx/srio.c | 3 ++- arch/powerpc/include/asm/fsl_liodn.h | 4 +++- arch/powerpc/include/asm/fsl_portals.h | 2 ++ arch/powerpc/include/asm/global_data.h | 2 ++ arch/powerpc/lib/bdinfo.c | 1 - arch/riscv/lib/boot.c | 3 ++- arch/sandbox/include/asm/global_data.h | 1 + arch/sh/include/asm/global_data.h | 2 ++ arch/x86/cpu/coreboot/sdram.c | 1 - arch/x86/cpu/efi/payload.c | 1 - arch/x86/cpu/efi/sdram.c | 1 - arch/x86/cpu/ivybridge/sdram_nop.c | 1 - arch/x86/cpu/qemu/dram.c | 1 - arch/x86/cpu/quark/dram.c | 1 - arch/x86/cpu/tangier/sdram.c | 1 - arch/x86/include/asm/global_data.h | 1 + arch/xtensa/include/asm/global_data.h | 2 ++ board/keymile/kmcent2/tlb.c | 2 +- board/phytium/pe2201/pe2201.c | 1 - board/phytium/pomelo/pomelo.c | 1 - board/renesas/falcon/falcon.c | 1 - board/renesas/grpeach/grpeach.c | 1 - common/init/handoff.c | 1 - common/spl/spl.c | 1 - common/spl/spl_ext.c | 1 - common/spl/spl_fat.c | 1 - common/spl/spl_mmc.c | 1 - common/spl/spl_sata.c | 1 - common/spl/spl_usb.c | 1 - common/spl/spl_ymodem.c | 1 - drivers/clk/altera/clk-agilex5.c | 1 - include/dm/of.h | 1 - include/fsl_errata.h | 2 +- 104 files changed, 48 insertions(+), 88 deletions(-) (limited to 'include') diff --git a/api/api_platform-arm.c b/api/api_platform-arm.c index 6cfd9e6cc20..9afba66c244 100644 --- a/api/api_platform-arm.c +++ b/api/api_platform-arm.c @@ -12,7 +12,6 @@ #include #include -#include #include #include "api_private.h" diff --git a/api/api_platform-mips.c b/api/api_platform-mips.c index e1509663af5..262b35a2777 100644 --- a/api/api_platform-mips.c +++ b/api/api_platform-mips.c @@ -9,7 +9,6 @@ #include #include -#include #include #include "api_private.h" diff --git a/api/api_platform-powerpc.c b/api/api_platform-powerpc.c index 847a4a3015b..3a04a9f691c 100644 --- a/api/api_platform-powerpc.c +++ b/api/api_platform-powerpc.c @@ -12,7 +12,6 @@ #include #include -#include #include #include "api_private.h" diff --git a/arch/arc/include/asm/global_data.h b/arch/arc/include/asm/global_data.h index e35a26f1eb1..fd9b7fb5f8d 100644 --- a/arch/arc/include/asm/global_data.h +++ b/arch/arc/include/asm/global_data.h @@ -6,6 +6,8 @@ #ifndef __ASM_ARC_GLOBAL_DATA_H #define __ASM_ARC_GLOBAL_DATA_H +#include + #ifndef __ASSEMBLY__ /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 452bcd1b8fd..45401d5e3c8 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -12,6 +12,7 @@ #include #include +#include /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/arm/lib/bdinfo.c b/arch/arm/lib/bdinfo.c index 40255ace405..7c49462c8eb 100644 --- a/arch/arm/lib/bdinfo.c +++ b/arch/arm/lib/bdinfo.c @@ -9,7 +9,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 0b2a0c35154..947012f2996 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c index 03341123539..7c0a2638977 100644 --- a/arch/arm/mach-davinci/cpu.c +++ b/arch/arm/mach-davinci/cpu.c @@ -9,7 +9,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c index 93a144757a9..6c97e5810cd 100644 --- a/arch/arm/mach-davinci/misc.c +++ b/arch/arm/mach-davinci/misc.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c index 4603c8fbc57..8c6cf9c2192 100644 --- a/arch/arm/mach-davinci/spl.c +++ b/arch/arm/mach-davinci/spl.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-imx/ele_ahab.c b/arch/arm/mach-imx/ele_ahab.c index eaeecf60042..c13d9f0e00e 100644 --- a/arch/arm/mach-imx/ele_ahab.c +++ b/arch/arm/mach-imx/ele_ahab.c @@ -14,7 +14,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-imx/mx5/mx53_dram.c b/arch/arm/mach-imx/mx5/mx53_dram.c index 6459b4a82d2..180a745d435 100644 --- a/arch/arm/mach-imx/mx5/mx53_dram.c +++ b/arch/arm/mach-imx/mx5/mx53_dram.c @@ -6,7 +6,6 @@ #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7622/init.c b/arch/arm/mach-mediatek/mt7622/init.c index 00d3eb9ce7a..6e970acf8b0 100644 --- a/arch/arm/mach-mediatek/mt7622/init.c +++ b/arch/arm/mach-mediatek/mt7622/init.c @@ -9,7 +9,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7981/init.c b/arch/arm/mach-mediatek/mt7981/init.c index 862f0ca4793..07da5897190 100644 --- a/arch/arm/mach-mediatek/mt7981/init.c +++ b/arch/arm/mach-mediatek/mt7981/init.c @@ -9,7 +9,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7986/init.c b/arch/arm/mach-mediatek/mt7986/init.c index 905a3ab4e27..a521c95bd9d 100644 --- a/arch/arm/mach-mediatek/mt7986/init.c +++ b/arch/arm/mach-mediatek/mt7986/init.c @@ -9,7 +9,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mediatek/mt7988/init.c b/arch/arm/mach-mediatek/mt7988/init.c index 082f12bf65e..2efc8c6a88f 100644 --- a/arch/arm/mach-mediatek/mt7988/init.c +++ b/arch/arm/mach-mediatek/mt7988/init.c @@ -8,7 +8,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-mvebu/armada8k/dram.c b/arch/arm/mach-mvebu/armada8k/dram.c index 8a87e4a8e03..fd58551d0e3 100644 --- a/arch/arm/mach-mvebu/armada8k/dram.c +++ b/arch/arm/mach-mvebu/armada8k/dram.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c index daf2f8e3f67..c00c6b9b3fc 100644 --- a/arch/arm/mach-mvebu/dram.c +++ b/arch/arm/mach-mvebu/dram.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-omap2/omap-cache.c b/arch/arm/mach-omap2/omap-cache.c index 132b205220c..200a08fa5c8 100644 --- a/arch/arm/mach-omap2/omap-cache.c +++ b/arch/arm/mach-omap2/omap-cache.c @@ -16,7 +16,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c index 79960bf46f8..049eedfeb65 100644 --- a/arch/arm/mach-omap2/omap3/emif4.c +++ b/arch/arm/mach-omap2/omap3/emif4.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c index f08e4b3af5e..404333689f6 100644 --- a/arch/arm/mach-omap2/omap3/sdrc.c +++ b/arch/arm/mach-omap2/omap3/sdrc.c @@ -23,7 +23,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c index e6332452e3e..0130cad7678 100644 --- a/arch/arm/mach-owl/soc.c +++ b/arch/arm/mach-owl/soc.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-renesas/memmap-gen3.c b/arch/arm/mach-renesas/memmap-gen3.c index 4dff9e07629..c50700df078 100644 --- a/arch/arm/mach-renesas/memmap-gen3.c +++ b/arch/arm/mach-renesas/memmap-gen3.c @@ -7,7 +7,6 @@ #include #include -#include #include #define GEN3_NR_REGIONS 16 diff --git a/arch/arm/mach-renesas/memmap-rzg2l.c b/arch/arm/mach-renesas/memmap-rzg2l.c index 9934a775220..3b3c6f7cde9 100644 --- a/arch/arm/mach-renesas/memmap-rzg2l.c +++ b/arch/arm/mach-renesas/memmap-rzg2l.c @@ -8,7 +8,6 @@ #include #include -#include #include #define RZG2L_NR_REGIONS 16 diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c index 4fcb13f17e6..160f6e73ca9 100644 --- a/arch/arm/mach-socfpga/clock_manager.c +++ b/arch/arm/mach-socfpga/clock_manager.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-socfpga/clock_manager_agilex5.c b/arch/arm/mach-socfpga/clock_manager_agilex5.c index b92f0b3af80..7ec28d91ef3 100644 --- a/arch/arm/mach-socfpga/clock_manager_agilex5.c +++ b/arch/arm/mach-socfpga/clock_manager_agilex5.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index af5bed162e2..c20376f7f8e 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c index cd1bf48d832..52617a39cca 100644 --- a/arch/arm/mach-socfpga/spl_agilex.c +++ b/arch/arm/mach-socfpga/spl_agilex.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index d53592cba4d..df79cfe0f7f 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_n5x.c b/arch/arm/mach-socfpga/spl_n5x.c index a1960203939..5ff137e5c6f 100644 --- a/arch/arm/mach-socfpga/spl_n5x.c +++ b/arch/arm/mach-socfpga/spl_n5x.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index 9b3c75f9767..53852cb7443 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c index e6f1286e71f..0e1164a2680 100644 --- a/arch/arm/mach-uniphier/dram_init.c +++ b/arch/arm/mach-uniphier/dram_init.c @@ -12,7 +12,6 @@ #include #include #include -#include #include "init.h" #include "sg-regs.h" diff --git a/arch/arm/mach-versal-net/clk.c b/arch/arm/mach-versal-net/clk.c index a88b5101eb1..61b8fe71b1a 100644 --- a/arch/arm/mach-versal-net/clk.c +++ b/arch/arm/mach-versal-net/clk.c @@ -9,7 +9,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-versal-net/cpu.c b/arch/arm/mach-versal-net/cpu.c index 59b0cb2e78f..d088e440f63 100644 --- a/arch/arm/mach-versal-net/cpu.c +++ b/arch/arm/mach-versal-net/cpu.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-versal/clk.c b/arch/arm/mach-versal/clk.c index 0c7d468f1dd..19943dfdd4c 100644 --- a/arch/arm/mach-versal/clk.c +++ b/arch/arm/mach-versal/clk.c @@ -7,7 +7,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c index 7de431e5500..363ce3007fd 100644 --- a/arch/arm/mach-versal/cpu.c +++ b/arch/arm/mach-versal/cpu.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-zynqmp/clk.c b/arch/arm/mach-zynqmp/clk.c index dc8e2cbd3da..9b573b1746a 100644 --- a/arch/arm/mach-zynqmp/clk.c +++ b/arch/arm/mach-zynqmp/clk.c @@ -10,7 +10,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c index d7b5e99504c..07668c94689 100644 --- a/arch/arm/mach-zynqmp/cpu.c +++ b/arch/arm/mach-zynqmp/cpu.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index c2ef5770a3d..93efc722ba8 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -7,6 +7,8 @@ #ifndef __ASM_GBL_DATA_H #define __ASM_GBL_DATA_H +#include + /* Architecture-specific global data */ struct arch_global_data { #ifdef CONFIG_SYS_I2C_FSL diff --git a/arch/m68k/lib/bdinfo.c b/arch/m68k/lib/bdinfo.c index 3719f11c03c..cf6ae5adddf 100644 --- a/arch/m68k/lib/bdinfo.c +++ b/arch/m68k/lib/bdinfo.c @@ -8,7 +8,6 @@ #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index cb224bd2542..52177670578 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -10,7 +10,6 @@ #include #include #include -#include #include void board_boot_order(u32 *spl_boot_list) diff --git a/arch/microblaze/include/asm/global_data.h b/arch/microblaze/include/asm/global_data.h index 93506dec894..bb4112f22a3 100644 --- a/arch/microblaze/include/asm/global_data.h +++ b/arch/microblaze/include/asm/global_data.h @@ -9,6 +9,7 @@ #define __ASM_GBL_DATA_H #include +#include /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index 34b7e0bed94..147a95ecea8 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -9,6 +9,7 @@ #include #include +#include struct octeon_eeprom_mac_addr { u8 mac_addr_base[6]; diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c index 40469d1be09..89846c9723c 100644 --- a/arch/mips/lib/traps.c +++ b/arch/mips/lib/traps.c @@ -20,7 +20,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/nios2/include/asm/global_data.h b/arch/nios2/include/asm/global_data.h index b56e8a5078e..d9bbd54734e 100644 --- a/arch/nios2/include/asm/global_data.h +++ b/arch/nios2/include/asm/global_data.h @@ -7,6 +7,7 @@ #define __ASM_NIOS2_GLOBALDATA_H_ #include +#include /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c index 6238eec605f..d86c981811e 100644 --- a/arch/powerpc/cpu/mpc83xx/interrupts.c +++ b/arch/powerpc/cpu/mpc83xx/interrupts.c @@ -6,7 +6,6 @@ * Copyright 2004 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index feecf8a8193..efa30c68338 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -7,7 +7,6 @@ * Anton Vorontsov */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c index 37234e00abd..e847c03f378 100644 --- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c +++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c @@ -12,7 +12,6 @@ #ifndef CONFIG_MPC83XX_SDRAM -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index bfc62423217..72464962613 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -8,7 +8,6 @@ #ifndef CONFIG_CLK_MPC83XX -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/b4860_ids.c b/arch/powerpc/cpu/mpc85xx/b4860_ids.c index 39cfd20129f..df2f0efe3ed 100644 --- a/arch/powerpc/cpu/mpc85xx/b4860_ids.c +++ b/arch/powerpc/cpu/mpc85xx/b4860_ids.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index 01763b54e8a..f91a4d441d3 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -3,7 +3,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c index 3383bb5c9b0..945020f7ecb 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c @@ -3,7 +3,6 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p2041_ids.c b/arch/powerpc/cpu/mpc85xx/p2041_ids.c index 67a21e15a64..ae5227a1eed 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_ids.c @@ -3,7 +3,8 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c index d915665df8f..3943859a518 100644 --- a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c @@ -3,7 +3,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p3041_ids.c b/arch/powerpc/cpu/mpc85xx/p3041_ids.c index e5d600fa2a4..0675a59414b 100644 --- a/arch/powerpc/cpu/mpc85xx/p3041_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p3041_ids.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p4080_ids.c b/arch/powerpc/cpu/mpc85xx/p4080_ids.c index 25050412837..15ab4ac9385 100644 --- a/arch/powerpc/cpu/mpc85xx/p4080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p4080_ids.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/p5040_ids.c b/arch/powerpc/cpu/mpc85xx/p5040_ids.c index de1d372631b..0a34e066e94 100644 --- a/arch/powerpc/cpu/mpc85xx/p5040_ids.c +++ b/arch/powerpc/cpu/mpc85xx/p5040_ids.c @@ -4,6 +4,7 @@ */ #include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 1a4ee87cb34..a7e1b3c98a9 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -9,7 +9,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/spl_minimal.c b/arch/powerpc/cpu/mpc85xx/spl_minimal.c index e7031c1338b..29318fad5f0 100644 --- a/arch/powerpc/cpu/mpc85xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc85xx/spl_minimal.c @@ -3,7 +3,6 @@ * Copyright 2009 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1024_ids.c b/arch/powerpc/cpu/mpc85xx/t1024_ids.c index 01a62b86926..7239d28f936 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_ids.c @@ -3,7 +3,8 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include +#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c index 3ab743c3d62..0d958fe131b 100644 --- a/arch/powerpc/cpu/mpc85xx/t1024_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1024_serdes.c @@ -3,7 +3,6 @@ * Copyright 2014 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1040_ids.c b/arch/powerpc/cpu/mpc85xx/t1040_ids.c index d0f9b0ca758..bb92fc392cc 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_ids.c @@ -3,7 +3,8 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c index 1f1b23a3aaa..2033ebbaa5e 100644 --- a/arch/powerpc/cpu/mpc85xx/t1040_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t1040_serdes.c @@ -3,10 +3,11 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include +#include static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { diff --git a/arch/powerpc/cpu/mpc85xx/t2080_ids.c b/arch/powerpc/cpu/mpc85xx/t2080_ids.c index 51ac367dd80..26a2d745a86 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_ids.c @@ -3,7 +3,8 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ -#include +#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c index 16fa16b0808..6702acaf772 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c @@ -5,9 +5,10 @@ * Shengzhou Liu */ -#include +#include #include #include +#include #include "fsl_corenet2_serdes.h" struct serdes_config { diff --git a/arch/powerpc/cpu/mpc85xx/t4240_ids.c b/arch/powerpc/cpu/mpc85xx/t4240_ids.c index 94b4409ceca..c319bf5cff5 100644 --- a/arch/powerpc/cpu/mpc85xx/t4240_ids.c +++ b/arch/powerpc/cpu/mpc85xx/t4240_ids.c @@ -3,7 +3,8 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include +#include +#include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c index 956b5ea37aa..36fe34f11ec 100644 --- a/arch/powerpc/cpu/mpc85xx/t4240_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t4240_serdes.c @@ -3,7 +3,6 @@ * Copyright 2012 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c index c7bae5a8815..843dd191ccf 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c @@ -3,7 +3,6 @@ * Copyright 2010-2011 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c index 523367ddf1c..29399bcd8b6 100644 --- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c +++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c @@ -5,12 +5,14 @@ * Copyright 2012-2016 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include #include #include +#include +#include struct paace *ppaact; struct paace *sec; diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index 5c6e26b9aa1..f16bc199663 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -6,7 +6,6 @@ * Wolfgang Denk, DENX Software Engineering, wd@denx.de. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c index e55173a890b..831a11736cc 100644 --- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c +++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c @@ -3,7 +3,6 @@ * Copyright 2012-2016 Freescale Semiconductor, Inc. */ -#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c index 185cbabbcd8..0c7288c7574 100644 --- a/arch/powerpc/cpu/mpc8xxx/srio.c +++ b/arch/powerpc/cpu/mpc8xxx/srio.c @@ -3,12 +3,13 @@ * Copyright 2011 Freescale Semiconductor, Inc. */ -#include +#include #include #include #include #include #include +#include #include #include diff --git a/arch/powerpc/include/asm/fsl_liodn.h b/arch/powerpc/include/asm/fsl_liodn.h index 0af3d8902ac..4ce869b5c18 100644 --- a/arch/powerpc/include/asm/fsl_liodn.h +++ b/arch/powerpc/include/asm/fsl_liodn.h @@ -6,7 +6,9 @@ #ifndef _FSL_LIODN_H_ #define _FSL_LIODN_H_ -#include +#include +#include +#include #include struct srio_liodn_id_table { diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h index 54ef4fb6295..021eec72382 100644 --- a/arch/powerpc/include/asm/fsl_portals.h +++ b/arch/powerpc/include/asm/fsl_portals.h @@ -6,6 +6,8 @@ #ifndef _FSL_PORTALS_H_ #define _FSL_PORTALS_H_ +#include + /* entries must be in order and contiguous */ enum fsl_dpaa_dev { FSL_HW_PORTAL_SEC, diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index f7860122a00..a9efbbdd3d4 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -93,4 +93,6 @@ struct arch_global_data { #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") +#include + #endif /* __ASM_GBL_DATA_H */ diff --git a/arch/powerpc/lib/bdinfo.c b/arch/powerpc/lib/bdinfo.c index c12e4c6371f..6491c210f4e 100644 --- a/arch/powerpc/lib/bdinfo.c +++ b/arch/powerpc/lib/bdinfo.c @@ -8,7 +8,6 @@ #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/riscv/lib/boot.c b/arch/riscv/lib/boot.c index 03014c56dce..161335abee1 100644 --- a/arch/riscv/lib/boot.c +++ b/arch/riscv/lib/boot.c @@ -4,7 +4,8 @@ * Rick Chen, Andes Technology Corporation */ -#include +#include +#include unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, char *const argv[]) diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h index 001b2b53c1c..309422f75e3 100644 --- a/arch/sandbox/include/asm/global_data.h +++ b/arch/sandbox/include/asm/global_data.h @@ -10,6 +10,7 @@ #define __ASM_GBL_DATA_H #include +#include /* Architecture-specific global data */ struct arch_global_data { diff --git a/arch/sh/include/asm/global_data.h b/arch/sh/include/asm/global_data.h index bd946ffd8fd..933c302d68c 100644 --- a/arch/sh/include/asm/global_data.h +++ b/arch/sh/include/asm/global_data.h @@ -10,6 +10,8 @@ #ifndef __ASM_SH_GLOBALDATA_H_ #define __ASM_SH_GLOBALDATA_H_ +#include + /* Architecture-specific global data */ struct arch_global_data { }; diff --git a/arch/x86/cpu/coreboot/sdram.c b/arch/x86/cpu/coreboot/sdram.c index ee0491eab1c..013225f129a 100644 --- a/arch/x86/cpu/coreboot/sdram.c +++ b/arch/x86/cpu/coreboot/sdram.c @@ -9,7 +9,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c index cb57f15f710..642a87a37d8 100644 --- a/arch/x86/cpu/efi/payload.c +++ b/arch/x86/cpu/efi/payload.c @@ -16,7 +16,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/efi/sdram.c b/arch/x86/cpu/efi/sdram.c index 1f0e87735b2..6fe40071140 100644 --- a/arch/x86/cpu/efi/sdram.c +++ b/arch/x86/cpu/efi/sdram.c @@ -6,7 +6,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c index e7ec35bbe2a..d20c9a2a379 100644 --- a/arch/x86/cpu/ivybridge/sdram_nop.c +++ b/arch/x86/cpu/ivybridge/sdram_nop.c @@ -5,7 +5,6 @@ #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/qemu/dram.c b/arch/x86/cpu/qemu/dram.c index 6ac363f3d8c..62a301c0fd3 100644 --- a/arch/x86/cpu/qemu/dram.c +++ b/arch/x86/cpu/qemu/dram.c @@ -7,7 +7,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c index 7d32b98e8da..34e576940d4 100644 --- a/arch/x86/cpu/quark/dram.c +++ b/arch/x86/cpu/quark/dram.c @@ -17,7 +17,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c index 7e1d290fc59..6192f2296b8 100644 --- a/arch/x86/cpu/tangier/sdram.c +++ b/arch/x86/cpu/tangier/sdram.c @@ -8,7 +8,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 1ef7f1f0349..06bd80ccc13 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -12,6 +12,7 @@ #include #include #include +#include enum pei_boot_mode_t { PEI_BOOT_NONE = 0, diff --git a/arch/xtensa/include/asm/global_data.h b/arch/xtensa/include/asm/global_data.h index 1157978ab68..40c129db4ac 100644 --- a/arch/xtensa/include/asm/global_data.h +++ b/arch/xtensa/include/asm/global_data.h @@ -6,6 +6,8 @@ #ifndef _XTENSA_GBL_DATA_H #define _XTENSA_GBL_DATA_H +#include + /* Architecture-specific global data */ struct arch_global_data { diff --git a/board/keymile/kmcent2/tlb.c b/board/keymile/kmcent2/tlb.c index 41b24e39433..77e11e9bc1e 100644 --- a/board/keymile/kmcent2/tlb.c +++ b/board/keymile/kmcent2/tlb.c @@ -7,7 +7,7 @@ */ #include -#include +#include struct fsl_e_tlb_entry tlb_table[] = { /* TLB 0 - for temp stack in cache */ diff --git a/board/phytium/pe2201/pe2201.c b/board/phytium/pe2201/pe2201.c index 0e837b0f50f..fbbf6789b50 100644 --- a/board/phytium/pe2201/pe2201.c +++ b/board/phytium/pe2201/pe2201.c @@ -12,7 +12,6 @@ #include #include #include -#include #include "cpu.h" DECLARE_GLOBAL_DATA_PTR; diff --git a/board/phytium/pomelo/pomelo.c b/board/phytium/pomelo/pomelo.c index 960e491c768..0ea335e7486 100644 --- a/board/phytium/pomelo/pomelo.c +++ b/board/phytium/pomelo/pomelo.c @@ -14,7 +14,6 @@ #include #include #include -#include #include "cpu.h" DECLARE_GLOBAL_DATA_PTR; diff --git a/board/renesas/falcon/falcon.c b/board/renesas/falcon/falcon.c index 27fccacf6f8..c88257d9677 100644 --- a/board/renesas/falcon/falcon.c +++ b/board/renesas/falcon/falcon.c @@ -14,7 +14,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/renesas/grpeach/grpeach.c b/board/renesas/grpeach/grpeach.c index c475c3f50ab..88f65c3b6a0 100644 --- a/board/renesas/grpeach/grpeach.c +++ b/board/renesas/grpeach/grpeach.c @@ -10,7 +10,6 @@ #include #include #include -#include #define RZA1_WDT_BASE 0xfcfe0000 #define WTCSR 0x00 diff --git a/common/init/handoff.c b/common/init/handoff.c index 687513bda35..a7cd065fb38 100644 --- a/common/init/handoff.c +++ b/common/init/handoff.c @@ -7,7 +7,6 @@ #include #include -#include DECLARE_GLOBAL_DATA_PTR; diff --git a/common/spl/spl.c b/common/spl/spl.c index 4e92771ecaa..9a879e9fb10 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c index 2399e1d806d..76f49a5a8a6 100644 --- a/common/spl/spl_ext.c +++ b/common/spl/spl_ext.c @@ -4,7 +4,6 @@ #include #include #include -#include #include #include #include diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c index 2e320ba7c01..bd8aab253a9 100644 --- a/common/spl/spl_fat.c +++ b/common/spl/spl_fat.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index f4481b90463..ccab0be4be2 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c index 18acc40e46f..67fc620d9be 100644 --- a/common/spl/spl_sata.c +++ b/common/spl/spl_sata.c @@ -9,7 +9,6 @@ */ #include -#include #include #include #include diff --git a/common/spl/spl_usb.c b/common/spl/spl_usb.c index 31fc4b57d48..932da56ab6d 100644 --- a/common/spl/spl_usb.c +++ b/common/spl/spl_usb.c @@ -10,7 +10,6 @@ #include #include -#include #include #include #include diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c index fd48f80f75e..4c7222af612 100644 --- a/common/spl/spl_ymodem.c +++ b/common/spl/spl_ymodem.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #define BUF_SIZE 1024 diff --git a/drivers/clk/altera/clk-agilex5.c b/drivers/clk/altera/clk-agilex5.c index 92f2abdaf93..72b923465df 100644 --- a/drivers/clk/altera/clk-agilex5.c +++ b/drivers/clk/altera/clk-agilex5.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include diff --git a/include/dm/of.h b/include/dm/of.h index b1c934f610d..b7404c139d1 100644 --- a/include/dm/of.h +++ b/include/dm/of.h @@ -7,7 +7,6 @@ #ifndef _DM_OF_H #define _DM_OF_H -#include #include /* integer value within a device tree property which references another node */ diff --git a/include/fsl_errata.h b/include/fsl_errata.h index 44547645df8..9f070726acb 100644 --- a/include/fsl_errata.h +++ b/include/fsl_errata.h @@ -7,7 +7,7 @@ #define _FSL_ERRATA_H #if defined(CONFIG_PPC) -#include +#include #elif defined(CONFIG_ARCH_LS1021A) #include #elif defined(CONFIG_FSL_LAYERSCAPE) -- cgit v1.3.1 From 9ef78205bbd84dd7045974b7717a472fdc9be69c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 30 Apr 2024 20:40:50 -0600 Subject: eeprom.h: Add missing This file has many "Linux" style types in it, add Signed-off-by: Tom Rini --- include/eeprom.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/eeprom.h b/include/eeprom.h index f9c6542ba76..e223e4c7670 100644 --- a/include/eeprom.h +++ b/include/eeprom.h @@ -8,6 +8,8 @@ #define __EEPROM_LEGACY_H #if defined(CONFIG_CMD_EEPROM) || defined(CONFIG_ENV_IS_IN_EEPROM) +#include + void eeprom_init(int bus); int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt); int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt); -- cgit v1.3.1 From ea1a07f588372d1a266890843288d3e77c1fd1d5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 30 Apr 2024 20:40:51 -0600 Subject: splash.h: Add missing This file has many "Linux" style types in it, add Signed-off-by: Tom Rini --- include/splash.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/splash.h b/include/splash.h index c3922375987..83c6fa9767f 100644 --- a/include/splash.h +++ b/include/splash.h @@ -23,6 +23,7 @@ #define _SPLASH_H_ #include +#include enum splash_storage { SPLASH_STORAGE_NAND, -- cgit v1.3.1 From 62cdc75fbae0f3b5595c06cc692e9406be9c6354 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 30 Apr 2024 20:40:52 -0600 Subject: extension_board.h: Add missing This file has "struct list" in one of the structures, so add . Signed-off-by: Tom Rini --- include/extension_board.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/extension_board.h b/include/extension_board.h index 3b75b5ba9f7..87d404c0074 100644 --- a/include/extension_board.h +++ b/include/extension_board.h @@ -7,6 +7,8 @@ #ifndef __EXTENSION_SUPPORT_H #define __EXTENSION_SUPPORT_H +#include + struct extension { struct list_head list; char name[32]; -- cgit v1.3.1 From c4083e0184f93cf44ca661d7d34b4f9cb48a8ffd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 30 Apr 2024 20:43:02 -0600 Subject: board: ti: Remove and add needed includes Remove from this board vendor directory and when needed add missing include files directly. Signed-off-by: Tom Rini --- board/ti/am335x/board.c | 2 +- board/ti/am335x/board.h | 2 ++ board/ti/am335x/mux.c | 2 +- board/ti/am43xx/board.c | 2 +- board/ti/am43xx/board.h | 1 + board/ti/am43xx/mux.c | 1 - board/ti/am57xx/board.c | 2 +- board/ti/common/board_detect.c | 2 +- board/ti/common/cape_detect.c | 3 ++- board/ti/dra7xx/evm.c | 2 +- board/ti/ks2_evm/board.c | 2 +- board/ti/ks2_evm/board_k2e.c | 1 - board/ti/ks2_evm/board_k2g.c | 2 +- board/ti/ks2_evm/board_k2hk.c | 1 - board/ti/ks2_evm/board_k2l.c | 1 - board/ti/ks2_evm/ddr3_cfg.c | 1 - board/ti/ks2_evm/ddr3_k2e.c | 1 - board/ti/ks2_evm/ddr3_k2g.c | 1 - board/ti/ks2_evm/ddr3_k2hk.c | 1 - board/ti/ks2_evm/ddr3_k2l.c | 1 - board/ti/omap3evm/evm.c | 2 +- board/ti/panda/panda.c | 1 - board/ti/sdp4430/cmd_bat.c | 1 - board/ti/sdp4430/sdp.c | 1 - include/linux/mtd/omap_gpmc.h | 2 ++ 25 files changed, 16 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 34f987c2b72..34f4a919656 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -7,7 +7,7 @@ * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h index 1284c160d81..b0a3842423f 100644 --- a/board/ti/am335x/board.h +++ b/board/ti/am335x/board.h @@ -10,6 +10,8 @@ #ifndef _BOARD_H_ #define _BOARD_H_ +#include + /** * AM335X (EMIF_4D) EMIF REG_COS_COUNT_1, REG_COS_COUNT_2, and * REG_PR_OLD_COUNT values to avoid LCDC DMA FIFO underflows and Frame diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 0bad154f86e..960de15398f 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include +#include #include #include #include diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index fdeb63d4790..40b7fcfc387 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -7,7 +7,7 @@ * Copyright (C) 2013, Texas Instruments, Incorporated - https://www.ti.com/ */ -#include +#include #include #include #include diff --git a/board/ti/am43xx/board.h b/board/ti/am43xx/board.h index 37a169aaf75..b1025bdda1e 100644 --- a/board/ti/am43xx/board.h +++ b/board/ti/am43xx/board.h @@ -11,6 +11,7 @@ #ifndef _BOARD_H_ #define _BOARD_H_ +#include #include #define DEV_ATTR_MAX_OFFSET 5 diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c index 463f1cc7178..2fcccbd1f04 100644 --- a/board/ti/am43xx/mux.c +++ b/board/ti/am43xx/mux.c @@ -5,7 +5,6 @@ * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ */ -#include #include #include #include "../common/board_detect.h" diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c index b004a89bb32..48668884bdd 100644 --- a/board/ti/am57xx/board.c +++ b/board/ti/am57xx/board.c @@ -7,7 +7,7 @@ * Based on board/ti/dra7xx/evm.c */ -#include +#include #include #include #include diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c index 644df3b0b6a..ea21d48bbc0 100644 --- a/board/ti/common/board_detect.c +++ b/board/ti/common/board_detect.c @@ -7,9 +7,9 @@ * Steve Kipisz */ -#include #include #include +#include #include #include #include diff --git a/board/ti/common/cape_detect.c b/board/ti/common/cape_detect.c index 2e6105cfbf1..da805befabc 100644 --- a/board/ti/common/cape_detect.c +++ b/board/ti/common/cape_detect.c @@ -4,10 +4,11 @@ * Köry Maincent, Bootlin, */ -#include +#include #include #include #include +#include #include "cape_detect.h" diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index a8a216d034a..2b1db2541b0 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -9,7 +9,7 @@ * Aneesh V * Steve Sakoman */ -#include +#include #include #include #include diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 5dcda12105b..c6735d37dda 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -6,7 +6,7 @@ * Texas Instruments Incorporated, */ -#include +#include #include #include "board.h" #include diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c index 39abb24e156..4385be4221b 100644 --- a/board/ti/ks2_evm/board_k2e.c +++ b/board/ti/ks2_evm/board_k2e.c @@ -6,7 +6,6 @@ * Texas Instruments Incorporated, */ -#include #include #include #include diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index 4fed42ec124..d07b77d23e2 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -5,7 +5,7 @@ * (C) Copyright 2015 * Texas Instruments Incorporated, */ -#include +#include #include #include #include diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c index 12c4649c3c4..2b5d2d75664 100644 --- a/board/ti/ks2_evm/board_k2hk.c +++ b/board/ti/ks2_evm/board_k2hk.c @@ -6,7 +6,6 @@ * Texas Instruments Incorporated, */ -#include #include #include #include diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c index f759ee36466..1971bc94f7d 100644 --- a/board/ti/ks2_evm/board_k2l.c +++ b/board/ti/ks2_evm/board_k2l.c @@ -6,7 +6,6 @@ * Texas Instruments Incorporated, */ -#include #include #include #include diff --git a/board/ti/ks2_evm/ddr3_cfg.c b/board/ti/ks2_evm/ddr3_cfg.c index 0ade75263f8..fe350fee795 100644 --- a/board/ti/ks2_evm/ddr3_cfg.c +++ b/board/ti/ks2_evm/ddr3_cfg.c @@ -6,7 +6,6 @@ * Texas Instruments Incorporated, */ -#include #include #include "ddr3_cfg.h" diff --git a/board/ti/ks2_evm/ddr3_k2e.c b/board/ti/ks2_evm/ddr3_k2e.c index 95fe3a9021e..28305326e6a 100644 --- a/board/ti/ks2_evm/ddr3_k2e.c +++ b/board/ti/ks2_evm/ddr3_k2e.c @@ -6,7 +6,6 @@ * Texas Instruments Incorporated, */ -#include #include "ddr3_cfg.h" #include diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c index 3000d7245eb..ef39e078152 100644 --- a/board/ti/ks2_evm/ddr3_k2g.c +++ b/board/ti/ks2_evm/ddr3_k2g.c @@ -6,7 +6,6 @@ * Texas Instruments Incorporated, */ -#include #include "ddr3_cfg.h" #include #include diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c index 198c5da0e62..05c050cee44 100644 --- a/board/ti/ks2_evm/ddr3_k2hk.c +++ b/board/ti/ks2_evm/ddr3_k2hk.c @@ -6,7 +6,6 @@ * Texas Instruments Incorporated, */ -#include #include "ddr3_cfg.h" #include #include diff --git a/board/ti/ks2_evm/ddr3_k2l.c b/board/ti/ks2_evm/ddr3_k2l.c index 805bf81f6bd..aa6d45f0f8a 100644 --- a/board/ti/ks2_evm/ddr3_k2l.c +++ b/board/ti/ks2_evm/ddr3_k2l.c @@ -6,7 +6,6 @@ * Texas Instruments Incorporated, */ -#include #include "ddr3_cfg.h" #include diff --git a/board/ti/omap3evm/evm.c b/board/ti/omap3evm/evm.c index a4d6a0138d9..4eb08add256 100644 --- a/board/ti/omap3evm/evm.c +++ b/board/ti/omap3evm/evm.c @@ -10,7 +10,7 @@ * Richard Woodruff * Syed Mohammed Khasim */ -#include +#include #include #include #include diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c index 22093186019..e47d3a952d5 100644 --- a/board/ti/panda/panda.c +++ b/board/ti/panda/panda.c @@ -4,7 +4,6 @@ * Texas Instruments Incorporated, * Steve Sakoman */ -#include #include #include #include diff --git a/board/ti/sdp4430/cmd_bat.c b/board/ti/sdp4430/cmd_bat.c index 6c1e6ca393c..6bf44d92655 100644 --- a/board/ti/sdp4430/cmd_bat.c +++ b/board/ti/sdp4430/cmd_bat.c @@ -3,7 +3,6 @@ * Copyright (C) 2010 Texas Instruments */ -#include #include #ifdef CONFIG_CMD_BAT diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c index 2c9ae794fd4..1a71390f543 100644 --- a/board/ti/sdp4430/sdp.c +++ b/board/ti/sdp4430/sdp.c @@ -5,7 +5,6 @@ * Aneesh V * Steve Sakoman */ -#include #include #include #include diff --git a/include/linux/mtd/omap_gpmc.h b/include/linux/mtd/omap_gpmc.h index f08e700a1da..2dbf988863f 100644 --- a/include/linux/mtd/omap_gpmc.h +++ b/include/linux/mtd/omap_gpmc.h @@ -8,6 +8,8 @@ #ifndef __ASM_OMAP_GPMC_H #define __ASM_OMAP_GPMC_H +#include + /* Maximum Number of Chip Selects */ #define GPMC_CS_NUM 8 -- cgit v1.3.1 From 2143a11e61492cee2f4f5bd4f4203c652c394d0b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 1 May 2024 19:30:18 -0600 Subject: mmc: Migrate MMC_SUPPORTS_TUNING to Kconfig The constraints on the MMC_SUPPORTS_TUNING symbol can easily be expressed in Kconfig (with the addition of SPL_MMC_SUPPORTS_TUNING). Furthermore, in order to remove from the MMC subsystem, the way this symbol is used today needs to be changed in order to continue functioning. Reviewed-by: Jaehoon Chung Signed-off-by: Tom Rini --- arch/arm/mach-mediatek/Kconfig | 1 + arch/mips/mach-mtmips/Kconfig | 1 + drivers/mmc/Kconfig | 11 +++++++++++ drivers/mmc/am654_sdhci.c | 6 +++--- drivers/mmc/fsl_esdhc.c | 4 ++-- drivers/mmc/fsl_esdhc_imx.c | 8 ++++---- drivers/mmc/mmc-uclass.c | 2 +- drivers/mmc/mmc.c | 12 ++++++------ drivers/mmc/mtk-sd.c | 4 ++-- drivers/mmc/octeontx_hsmmc.c | 12 ++++++------ drivers/mmc/omap_hsmmc.c | 4 ++-- drivers/mmc/sdhci-cadence.c | 2 +- drivers/mmc/sdhci.c | 4 ++-- include/configs/mt7621.h | 3 --- include/configs/mt7623.h | 3 --- include/configs/octeontx2_common.h | 5 ----- include/mmc.h | 9 +-------- 17 files changed, 43 insertions(+), 48 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-mediatek/Kconfig b/arch/arm/mach-mediatek/Kconfig index 82018bd9d3e..ff1fdee5c8d 100644 --- a/arch/arm/mach-mediatek/Kconfig +++ b/arch/arm/mach-mediatek/Kconfig @@ -23,6 +23,7 @@ config TARGET_MT7622 config TARGET_MT7623 bool "MediaTek MT7623 SoC" select CPU_V7A + select MMC_SUPPORTS_TUNING help The MediaTek MT7623 is a ARM-based SoC with a quad-core Cortex-A7 including NEON and GPU, Mali-450 graphics, several DDR3 options, diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig index 15b2792e619..3fcd0b8465b 100644 --- a/arch/mips/mach-mtmips/Kconfig +++ b/arch/mips/mach-mtmips/Kconfig @@ -80,6 +80,7 @@ config SOC_MT7621 bool "MT7621" select MIPS_CM select MIPS_L2_CACHE + select MMC_SUPPORTS_TUNING select SYS_CACHE_SHIFT_5 select SYS_MIPS_CACHE_INIT_RAM_LOAD select PINCTRL_MT7621 diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 549634891a3..d0944793c92 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -147,9 +147,16 @@ config SPL_MMC_IO_VOLTAGE support. For eMMC this not mandatory, but not enabling this option may prevent the driver of using the faster modes. +config MMC_SUPPORTS_TUNING + bool + +config SPL_MMC_SUPPORTS_TUNING + bool + config MMC_UHS_SUPPORT bool "enable UHS support" depends on MMC_IO_VOLTAGE + select MMC_SUPPORTS_TUNING help The Ultra High Speed (UHS) bus is available on some SDHC and SDXC cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus @@ -158,6 +165,7 @@ config MMC_UHS_SUPPORT config SPL_MMC_UHS_SUPPORT bool "enable UHS support in SPL" depends on SPL_MMC_IO_VOLTAGE + select SPL_MMC_SUPPORTS_TUNING help The Ultra High Speed (UHS) bus is available on some SDHC and SDXC cards. The IO voltage must be switchable from 3.3v to 1.8v. The bus @@ -193,6 +201,7 @@ config SPL_MMC_HS400_SUPPORT config MMC_HS200_SUPPORT bool "enable HS200 support" + select MMC_SUPPORTS_TUNING help The HS200 mode is support by some eMMC. The bus frequency is up to 200MHz. This mode requires tuning the IO. @@ -200,6 +209,7 @@ config MMC_HS200_SUPPORT config SPL_MMC_HS200_SUPPORT bool "enable HS200 support in SPL" depends on SPL_MMC + select SPL_MMC_SUPPORTS_TUNING help The HS200 mode is support by some eMMC. The bus frequency is up to 200MHz. This mode requires tuning the IO. @@ -347,6 +357,7 @@ config MMC_OCTEONTX bool "Marvell Octeon Multimedia Card Interface support" depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) depends on DM_MMC + select MMC_SUPPORTS_TUNING if ARCH_OCTEONTX2 help This selects the Octeon Multimedia card Interface. If you have an OcteonTX/TX2 or MIPS Octeon board with a diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index fadab7d40bb..ffb461c2f6c 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -397,7 +397,7 @@ static void am654_sdhci_write_b(struct sdhci_host *host, u8 val, int reg) writeb(val, host->ioaddr + reg); } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) #define ITAPDLY_LENGTH 32 #define ITAPDLY_LAST_INDEX (ITAPDLY_LENGTH - 1) @@ -500,7 +500,7 @@ static int am654_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) } #endif const struct sdhci_ops am654_sdhci_ops = { -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) .platform_execute_tuning = am654_sdhci_execute_tuning, #endif .deferred_probe = am654_sdhci_deferred_probe, @@ -560,7 +560,7 @@ static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host) } const struct sdhci_ops j721e_4bit_sdhci_ops = { -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) .platform_execute_tuning = am654_sdhci_execute_tuning, #endif .deferred_probe = am654_sdhci_deferred_probe, diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 595d88bd562..5ac1c6a0e9e 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -1102,7 +1102,7 @@ static int fsl_esdhc_reinit(struct udevice *dev) return esdhc_init_common(priv, &plat->mmc); } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) { struct fsl_esdhc_plat *plat = dev_get_plat(dev); @@ -1175,7 +1175,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) .execute_tuning = fsl_esdhc_execute_tuning, #endif .reinit = fsl_esdhc_reinit, diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index b74c0140020..8b2ef9391f3 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -635,7 +635,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) priv->clock = clock; } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static int esdhc_change_pinstate(struct udevice *dev) { struct fsl_esdhc_priv *priv = dev_get_priv(dev); @@ -913,7 +913,7 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) int ret __maybe_unused; u32 clock; -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) /* * call esdhc_set_timing() before update the clock rate, * This is because current we support DDR and SDR mode, @@ -951,7 +951,7 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) /* * For HS400/HS400ES mode, make sure set the strobe dll in the * target clock rate. So call esdhc_set_strobe_dll() after the @@ -1618,7 +1618,7 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) .execute_tuning = fsl_esdhc_execute_tuning, #endif #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index 24170c59ecc..0685b86af46 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -112,7 +112,7 @@ int mmc_getcd(struct mmc *mmc) return dm_mmc_get_cd(mmc->dev); } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static int dm_mmc_execute_tuning(struct udevice *dev, uint opcode) { struct dm_mmc_ops *ops = mmc_get_ops(dev); diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 7b068c71ff3..4543d94c720 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -329,7 +329,7 @@ int mmc_set_blocklen(struct mmc *mmc, int len) MMC_QUIRK_RETRY_SET_BLOCKLEN, 4); } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static const u8 tuning_blk_pattern_4bit[] = { 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, @@ -1621,7 +1621,7 @@ static inline int bus_width(uint cap) } #if !CONFIG_IS_ENABLED(DM_MMC) -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static int mmc_execute_tuning(struct mmc *mmc, uint opcode) { return -ENOTSUPP; @@ -1702,7 +1702,7 @@ void mmc_dump_capabilities(const char *text, uint caps) struct mode_width_tuning { enum bus_mode mode; uint widths; -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) uint tuning; #endif }; @@ -1743,7 +1743,7 @@ static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage) #if !CONFIG_IS_ENABLED(MMC_TINY) static const struct mode_width_tuning sd_modes_by_pref[] = { #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) { .mode = UHS_SDR104, .widths = MMC_MODE_4BIT | MMC_MODE_1BIT, @@ -1846,7 +1846,7 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps) mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE); -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) /* execute tuning if needed */ if (mwt->tuning && !mmc_host_is_spi(mmc)) { err = mmc_execute_tuning(mmc, @@ -2224,7 +2224,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps) mmc_select_mode(mmc, mwt->mode); mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE); -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) /* execute tuning if needed */ if (mwt->tuning) { diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c index 296aaee7331..4bd66ecf93a 100644 --- a/drivers/mmc/mtk-sd.c +++ b/drivers/mmc/mtk-sd.c @@ -1011,7 +1011,7 @@ static int msdc_ops_get_wp(struct udevice *dev) #endif } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static u32 test_delay_bit(u32 delay, u32 bit) { bit %= PAD_DELAY_MAX; @@ -1760,7 +1760,7 @@ static const struct dm_mmc_ops msdc_ops = { .set_ios = msdc_ops_set_ios, .get_cd = msdc_ops_get_cd, .get_wp = msdc_ops_get_wp, -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) .execute_tuning = msdc_execute_tuning, #endif .wait_dat0 = msdc_ops_wait_dat0, diff --git a/drivers/mmc/octeontx_hsmmc.c b/drivers/mmc/octeontx_hsmmc.c index 7f9c4f4d36d..3b5e1221732 100644 --- a/drivers/mmc/octeontx_hsmmc.c +++ b/drivers/mmc/octeontx_hsmmc.c @@ -794,7 +794,7 @@ octeontx_mmc_get_cr_mods(struct mmc *mmc, const struct mmc_cmd *cmd, u8 desired_ctype = 0; if (IS_MMC(mmc)) { -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) if (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) { if (cmd->resp_type == MMC_RSP_R1) cr.rtype_xor = 1; @@ -1631,7 +1631,7 @@ static int octeontx_mmc_dev_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, return octeontx_mmc_send_cmd(dev_to_mmc(dev), cmd, data); } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static int octeontx_mmc_test_cmd(struct mmc *mmc, u32 opcode, int *statp) { struct mmc_cmd cmd; @@ -2421,12 +2421,12 @@ static int octeontx_mmc_execute_tuning(struct udevice *dev, u32 opcode) return 0; } -#else /* MMC_SUPPORTS_TUNING */ +#else /* CONFIG_MMC_SUPPORTS_TUNING */ static void octeontx_mmc_set_emm_timing(struct mmc *mmc, union mio_emm_timing emm_timing) { } -#endif /* MMC_SUPPORTS_TUNING */ +#endif /* CONFIG_MMC_SUPPORTS_TUNING */ /** * Calculate the clock period with rounding up @@ -2573,7 +2573,7 @@ static int octeontx_mmc_set_ios(struct udevice *dev) err = octeontx_mmc_configure_delay(mmc); -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) if (!err && mmc->selected_mode == MMC_HS_400 && !slot->hs400_tuned) { debug("%s: Tuning HS400 mode\n", __func__); err = octeontx_tune_hs400(mmc); @@ -3776,7 +3776,7 @@ static const struct dm_mmc_ops octeontx_hsmmc_ops = { .set_ios = octeontx_mmc_set_ios, .get_cd = octeontx_mmc_get_cd, .get_wp = octeontx_mmc_get_wp, -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) .execute_tuning = octeontx_mmc_execute_tuning, #endif }; diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 99f21b2c546..118d9cd16fd 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -577,7 +577,7 @@ static uint32_t omap_hsmmc_set_capabilities(struct mmc *mmc) return val; } -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static void omap_hsmmc_disable_tuning(struct mmc *mmc) { struct hsmmc *mmc_base; @@ -1518,7 +1518,7 @@ static const struct dm_mmc_ops omap_hsmmc_ops = { .get_cd = omap_hsmmc_getcd, .get_wp = omap_hsmmc_getwp, #endif -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) .execute_tuning = omap_hsmmc_execute_tuning, #endif .wait_dat0 = omap_hsmmc_wait_dat0, diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c index c0a9f60b149..0570dbca00d 100644 --- a/drivers/mmc/sdhci-cadence.c +++ b/drivers/mmc/sdhci-cadence.c @@ -274,7 +274,7 @@ static int sdhci_cdns_probe(struct udevice *dev) host->ops = &sdhci_cdns_ops; host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD; sdhci_cdns_mmc_ops = sdhci_ops; -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) sdhci_cdns_mmc_ops.execute_tuning = sdhci_cdns_execute_tuning; #endif diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index af654ea8d13..d06f2c02bb7 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -351,7 +351,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, return -ECOMM; } -#if defined(CONFIG_DM_MMC) && defined(MMC_SUPPORTS_TUNING) +#if defined(CONFIG_DM_MMC) && CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) static int sdhci_execute_tuning(struct udevice *dev, uint opcode) { int err; @@ -848,7 +848,7 @@ const struct dm_mmc_ops sdhci_ops = { .set_ios = sdhci_set_ios, .get_cd = sdhci_get_cd, .deferred_probe = sdhci_deferred_probe, -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) .execute_tuning = sdhci_execute_tuning, #endif .wait_dat0 = sdhci_wait_dat0, diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index bf2bc2d45c0..e6dba707195 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -14,9 +14,6 @@ #define CFG_SYS_INIT_SP_OFFSET 0x800000 -/* MMC */ -#define MMC_SUPPORTS_TUNING - /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) #define CFG_SYS_NS16550_CLK 50000000 diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index fca234a1dc7..6f42cd32d80 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -11,9 +11,6 @@ #include -/* MMC */ -#define MMC_SUPPORTS_TUNING - /* DRAM */ #define CFG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index c4db38562d8..f415dffddbe 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -19,9 +19,4 @@ "loadaddr=20080000\0" \ "ethrotate=yes\0" -#if defined(CONFIG_MMC_OCTEONTX) -#define MMC_SUPPORTS_TUNING -/** EMMC specific defines */ -#endif - #endif /* __OCTEONTX2_COMMON_H__ */ diff --git a/include/mmc.h b/include/mmc.h index 4b8327f1f93..7f1900363b9 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -18,13 +18,6 @@ struct bd_info; -#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) -#define MMC_SUPPORTS_TUNING -#endif -#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) -#define MMC_SUPPORTS_TUNING -#endif - /* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ #define SD_VERSION_SD (1U << 31) #define MMC_VERSION_MMC (1U << 30) @@ -485,7 +478,7 @@ struct dm_mmc_ops { */ int (*get_wp)(struct udevice *dev); -#ifdef MMC_SUPPORTS_TUNING +#if CONFIG_IS_ENABLED(MMC_SUPPORTS_TUNING) /** * execute_tuning() - Start the tuning process * -- cgit v1.3.1 From a37323a2cb6ef73a1e68fc81a24c2e77c087fb18 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 1 May 2024 19:30:24 -0600 Subject: include: Add missing These files have many "Linux" style types in them, add Signed-off-by: Tom Rini --- include/display.h | 2 ++ include/fuse.h | 2 ++ include/i2c_eeprom.h | 1 + include/libata.h | 1 + include/ram.h | 2 ++ include/sm.h | 2 +- 6 files changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/display.h b/include/display.h index 3d012176441..e8d8aaa15fb 100644 --- a/include/display.h +++ b/include/display.h @@ -6,6 +6,8 @@ #ifndef _DISPLAY_H #define _DISPLAY_H +#include + struct udevice; struct display_timing; diff --git a/include/fuse.h b/include/fuse.h index d48dcdfa647..4519821af7e 100644 --- a/include/fuse.h +++ b/include/fuse.h @@ -11,6 +11,8 @@ #ifndef _FUSE_H_ #define _FUSE_H_ +#include + /* * Read/Sense/Program/Override interface: * bank: Fuse bank diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h index cba991e3574..1fe32d2dd68 100644 --- a/include/i2c_eeprom.h +++ b/include/i2c_eeprom.h @@ -7,6 +7,7 @@ #define __I2C_EEPROM #include +#include struct udevice; diff --git a/include/libata.h b/include/libata.h index a55e9315a73..fa39d21a44a 100644 --- a/include/libata.h +++ b/include/libata.h @@ -10,6 +10,7 @@ #ifndef __LIBATA_H__ #define __LIBATA_H__ +#include enum { /* various global constants */ diff --git a/include/ram.h b/include/ram.h index 2fc971df465..3600bb57a6c 100644 --- a/include/ram.h +++ b/include/ram.h @@ -7,6 +7,8 @@ #ifndef __RAM_H #define __RAM_H +#include + struct udevice; struct ram_info { diff --git a/include/sm.h b/include/sm.h index afa9c89055e..fbc156ad68a 100644 --- a/include/sm.h +++ b/include/sm.h @@ -19,7 +19,7 @@ * implementation of the driver you are using. */ -#include +#include #include struct udevice; -- cgit v1.3.1 From 43c1d9fe3277d8853fe647446ce563f17c532dfd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 1 May 2024 19:30:25 -0600 Subject: fsl_ifc.h: Add In the case of PowerPC, this file needs to include in order to resolve all of the references it makes. Signed-off-by: Tom Rini --- include/fsl_ifc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h index f9a0a7017d4..4991d932200 100644 --- a/include/fsl_ifc.h +++ b/include/fsl_ifc.h @@ -12,6 +12,8 @@ #include #ifdef CONFIG_ARM #include +#else +#include #endif #define FSL_IFC_V1_1_0 0x01010000 -- cgit v1.3.1 From 70ab38f4268c5ce5302849fcebf9bdfa2e152e76 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 1 May 2024 19:30:26 -0600 Subject: include/linux/compat.h: Add As this file has macros which use get_timer() it must include to resolve this. Signed-off-by: Tom Rini --- include/linux/compat.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/compat.h b/include/linux/compat.h index f8e3570d1ad..62381451617 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -5,6 +5,7 @@ #include #include #include +#include #include -- cgit v1.3.1 From 3ba56d6b232f7dcbf00552af48355f0dc2d26994 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 1 May 2024 19:31:32 -0600 Subject: virtio: Remove and add needed includes Remove from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini --- drivers/virtio/virtio-uclass.c | 1 - drivers/virtio/virtio_blk.c | 1 - drivers/virtio/virtio_mmio.c | 1 - drivers/virtio/virtio_net.c | 1 - drivers/virtio/virtio_pci_legacy.c | 1 - drivers/virtio/virtio_pci_modern.c | 1 - drivers/virtio/virtio_ring.c | 1 - drivers/virtio/virtio_rng.c | 1 - drivers/virtio/virtio_sandbox.c | 1 - include/virtio.h | 1 + 10 files changed, 1 insertion(+), 9 deletions(-) (limited to 'include') diff --git a/drivers/virtio/virtio-uclass.c b/drivers/virtio/virtio-uclass.c index c5420162735..1dbc1a56aa2 100644 --- a/drivers/virtio/virtio-uclass.c +++ b/drivers/virtio/virtio-uclass.c @@ -17,7 +17,6 @@ #define LOG_CATEGORY UCLASS_VIRTIO -#include #include #include #include diff --git a/drivers/virtio/virtio_blk.c b/drivers/virtio/virtio_blk.c index 95810582867..3404f61eba5 100644 --- a/drivers/virtio/virtio_blk.c +++ b/drivers/virtio/virtio_blk.c @@ -6,7 +6,6 @@ #define LOG_CATEGORY UCLASS_VIRTIO -#include #include #include #include diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c index 78c15c821b4..1cd737aca24 100644 --- a/drivers/virtio/virtio_mmio.c +++ b/drivers/virtio/virtio_mmio.c @@ -7,7 +7,6 @@ * Ported from Linux drivers/virtio/virtio_mmio.c */ -#include #include #include #include diff --git a/drivers/virtio/virtio_net.c b/drivers/virtio/virtio_net.c index 1794f73a8de..0e5367a085e 100644 --- a/drivers/virtio/virtio_net.c +++ b/drivers/virtio/virtio_net.c @@ -4,7 +4,6 @@ * Copyright (C) 2018, Bin Meng */ -#include #include #include #include diff --git a/drivers/virtio/virtio_pci_legacy.c b/drivers/virtio/virtio_pci_legacy.c index aa89604ae84..15f8c6e7d25 100644 --- a/drivers/virtio/virtio_pci_legacy.c +++ b/drivers/virtio/virtio_pci_legacy.c @@ -6,7 +6,6 @@ * Ported from Linux drivers/virtio/virtio_pci*.c */ -#include #include #include #include diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c index 3cdc2d2d6fd..5850e0c18c6 100644 --- a/drivers/virtio/virtio_pci_modern.c +++ b/drivers/virtio/virtio_pci_modern.c @@ -6,7 +6,6 @@ * Ported from Linux drivers/virtio/virtio_pci*.c */ -#include #include #include #include diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c index c9adcce5c09..306fa5b3f68 100644 --- a/drivers/virtio/virtio_ring.c +++ b/drivers/virtio/virtio_ring.c @@ -7,7 +7,6 @@ */ #include -#include #include #include #include diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c index 786359a6e36..90a371a59cc 100644 --- a/drivers/virtio/virtio_rng.c +++ b/drivers/virtio/virtio_rng.c @@ -3,7 +3,6 @@ * Copyright (c) 2019, Linaro Limited */ -#include #include #include #include diff --git a/drivers/virtio/virtio_sandbox.c b/drivers/virtio/virtio_sandbox.c index b34f1d60455..0f1ebef22e5 100644 --- a/drivers/virtio/virtio_sandbox.c +++ b/drivers/virtio/virtio_sandbox.c @@ -5,7 +5,6 @@ * VirtIO Sandbox transport driver, for testing purpose only */ -#include #include #include #include diff --git a/include/virtio.h b/include/virtio.h index 062a24630ce..1ab0ec5f39f 100644 --- a/include/virtio.h +++ b/include/virtio.h @@ -23,6 +23,7 @@ #include #include #include +#include #define VIRTIO_ID_NET 1 /* virtio net */ #define VIRTIO_ID_BLOCK 2 /* virtio block */ #define VIRTIO_ID_RNG 4 /* virtio rng */ -- cgit v1.3.1 From 2193e160446e78513a4a8dfd95876762286f1fb1 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 1 May 2024 19:31:36 -0600 Subject: xen: Remove and add needed includes Remove from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini --- drivers/xen/events.c | 1 - drivers/xen/gnttab.c | 1 - drivers/xen/hypervisor.c | 1 - drivers/xen/pvblock.c | 1 - drivers/xen/xenbus.c | 1 - include/xen/events.h | 1 + 6 files changed, 1 insertion(+), 5 deletions(-) (limited to 'include') diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 2ebe20dbf26..fa8b13d2c61 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c @@ -14,7 +14,6 @@ * * [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary */ -#include #include #include diff --git a/drivers/xen/gnttab.c b/drivers/xen/gnttab.c index 31e96e2939c..005694a5c62 100644 --- a/drivers/xen/gnttab.c +++ b/drivers/xen/gnttab.c @@ -14,7 +14,6 @@ * * [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary */ -#include #include #include #include diff --git a/drivers/xen/hypervisor.c b/drivers/xen/hypervisor.c index 0b2311ba267..d28df823c68 100644 --- a/drivers/xen/hypervisor.c +++ b/drivers/xen/hypervisor.c @@ -8,7 +8,6 @@ * Copyright (c) 2005, Grzegorz Milos, gm281@cam.ac.uk,Intel Research Cambridge * Copyright (c) 2020, EPAM Systems Inc. */ -#include #include #include #include diff --git a/drivers/xen/pvblock.c b/drivers/xen/pvblock.c index 9fc51d203e5..0e47ffb46a8 100644 --- a/drivers/xen/pvblock.c +++ b/drivers/xen/pvblock.c @@ -7,7 +7,6 @@ #define LOG_CATEGORY UCLASS_PVBLOCK #include -#include #include #include #include diff --git a/drivers/xen/xenbus.c b/drivers/xen/xenbus.c index 177d144723c..36de5255099 100644 --- a/drivers/xen/xenbus.c +++ b/drivers/xen/xenbus.c @@ -15,7 +15,6 @@ * [1] - http://xenbits.xen.org/gitweb/?p=mini-os.git;a=summary */ -#include #include #include diff --git a/include/xen/events.h b/include/xen/events.h index 82bd18b48c8..f0a8ef32d00 100644 --- a/include/xen/events.h +++ b/include/xen/events.h @@ -15,6 +15,7 @@ #ifndef _EVENTS_H_ #define _EVENTS_H_ +#include #include #include -- cgit v1.3.1 From 1227a30d0056e8f09e7bb97a555ccfa900afba46 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 1 May 2024 19:31:37 -0600 Subject: api: Remove and add needed includes Remove from here and when needed add missing include files directly. Signed-off-by: Tom Rini --- api/api.c | 4 +++- api/api_display.c | 2 +- api/api_net.c | 1 - api/api_storage.c | 2 +- examples/api/demo.c | 2 +- examples/api/glue.c | 1 - examples/api/libgenwrap.c | 1 - examples/standalone/atmel_df_pow2.c | 1 - examples/standalone/sched.c | 1 - examples/standalone/stubs.c | 1 - include/api_public.h | 2 ++ 11 files changed, 8 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/api/api.c b/api/api.c index 89003c161c2..d22132f62fe 100644 --- a/api/api.c +++ b/api/api.c @@ -7,11 +7,13 @@ #include #include -#include #include #include +#include #include +#include #include +#include #include #include #include diff --git a/api/api_display.c b/api/api_display.c index 2e877a85d14..8fd078c8c4a 100644 --- a/api/api_display.c +++ b/api/api_display.c @@ -3,9 +3,9 @@ * Copyright (c) 2011 The Chromium OS Authors. */ -#include #include #include +#include /* TODO(clchiou): add support of video device */ diff --git a/api/api_net.c b/api/api_net.c index 7515c26e8b4..264ff530563 100644 --- a/api/api_net.c +++ b/api/api_net.c @@ -6,7 +6,6 @@ */ #include -#include #include #include #include diff --git a/api/api_storage.c b/api/api_storage.c index 78becbe39fb..3d2d9d6ef4c 100644 --- a/api/api_storage.c +++ b/api/api_storage.c @@ -6,10 +6,10 @@ */ #include -#include #include #include #include +#include #if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE) #include diff --git a/examples/api/demo.c b/examples/api/demo.c index d586174ce8c..677d13b307a 100644 --- a/examples/api/demo.c +++ b/examples/api/demo.c @@ -5,7 +5,7 @@ * Written by: Rafal Jaworowski */ -#include +#include #include #include #include diff --git a/examples/api/glue.c b/examples/api/glue.c index 075d307ae26..08c21a8cb9c 100644 --- a/examples/api/glue.c +++ b/examples/api/glue.c @@ -3,7 +3,6 @@ * (C) Copyright 2007-2008 Semihalf, Rafal Jaworowski */ -#include #include #include #include diff --git a/examples/api/libgenwrap.c b/examples/api/libgenwrap.c index 3aa222866ff..bfd88e100d6 100644 --- a/examples/api/libgenwrap.c +++ b/examples/api/libgenwrap.c @@ -9,7 +9,6 @@ * existing code e.g. operations on strings and similar. */ -#include #include #include #include diff --git a/examples/standalone/atmel_df_pow2.c b/examples/standalone/atmel_df_pow2.c index dcb25da9498..ed0d7aeaadc 100644 --- a/examples/standalone/atmel_df_pow2.c +++ b/examples/standalone/atmel_df_pow2.c @@ -6,7 +6,6 @@ * Licensed under the 2-clause BSD. */ -#include #include #include #include diff --git a/examples/standalone/sched.c b/examples/standalone/sched.c index 1c529607132..d507163f6f3 100644 --- a/examples/standalone/sched.c +++ b/examples/standalone/sched.c @@ -1,6 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ -#include #include /* diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index 65115570e8e..04e8acb8abe 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -1,4 +1,3 @@ -#include #include #include diff --git a/include/api_public.h b/include/api_public.h index 5a4465ea893..e89572c00a4 100644 --- a/include/api_public.h +++ b/include/api_public.h @@ -8,6 +8,8 @@ #ifndef _API_PUBLIC_H_ #define _API_PUBLIC_H_ +#include + #define API_EINVAL 1 /* invalid argument(s) */ #define API_ENODEV 2 /* no device */ #define API_ENOMEM 3 /* no memory */ -- cgit v1.3.1 From 47558a4fce629390133bc6f410a942f109165efd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 1 May 2024 19:31:38 -0600 Subject: common.h: Remove this file and all references With all files that had included this file directly having been updated, we can now remove this file. Signed-off-by: Tom Rini --- doc/develop/codingstyle.rst | 8 ++------ doc/develop/tests_writing.rst | 1 - include/common.h | 33 --------------------------------- scripts/Makefile.autoconf | 4 ++-- scripts/gen_ll_addressable_symbols.sh | 2 +- tools/dtoc/dtb_platdata.py | 3 --- tools/dtoc/test_dtoc.py | 3 --- 7 files changed, 5 insertions(+), 49 deletions(-) delete mode 100644 include/common.h (limited to 'include') diff --git a/doc/develop/codingstyle.rst b/doc/develop/codingstyle.rst index f6248cdcb1e..fa3cd6aec82 100644 --- a/doc/develop/codingstyle.rst +++ b/doc/develop/codingstyle.rst @@ -110,9 +110,8 @@ Include files You should follow this ordering in U-Boot. In all cases, they should be listed in alphabetical order. First comes headers which are located directly in our -top-level include diretory. This excludes the common.h header file which is to -be removed. Second are headers within subdirectories, Finally directory-local -includes should be listed. See this example: +top-level include diretory. Second are headers within subdirectories, Finally +directory-local includes should be listed. See this example: .. code-block:: C @@ -129,9 +128,6 @@ For files that need to be compiled for the host (e.g. tools), you need to use ``#ifndef USE_HOSTCC`` to avoid including U-Boot specific include files. See common/image.c for an example. -If you encounter code which still uses a patch to remove that and -replace it with any required include files directly is much appreciated. - If your file uses driver model, include in the C file. Do not include dm.h in a header file. Try to use forward declarations (e.g. ``struct udevice``) instead. diff --git a/doc/develop/tests_writing.rst b/doc/develop/tests_writing.rst index bb1145da268..44b544fa78b 100644 --- a/doc/develop/tests_writing.rst +++ b/doc/develop/tests_writing.rst @@ -281,7 +281,6 @@ new one of those, you should add a new suite. Create a new file in test/ or a subdirectory and define a macro to register the suite. For example:: - #include #include #include #include diff --git a/include/common.h b/include/common.h deleted file mode 100644 index a79c2bb4993..00000000000 --- a/include/common.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Common header file for U-Boot - * - * This file still includes quite a few headers that should be included - * individually as needed. Patches to remove things are welcome. - * - * (C) Copyright 2000-2009 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - */ - -#ifndef __COMMON_H_ -#define __COMMON_H_ 1 - -#ifndef __ASSEMBLY__ /* put C only stuff in this section */ -#include -#include -#include -#include -#include -#include -#include -#include -#include /* boot information for Linux kernel */ -#include -#endif /* __ASSEMBLY__ */ - -/* Pull in stuff for the build system */ -#ifdef DO_DEPS_ONLY -# include -#endif - -#endif /* __COMMON_H_ */ diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf index 8208ffe2274..b42f9b525fe 100644 --- a/scripts/Makefile.autoconf +++ b/scripts/Makefile.autoconf @@ -45,7 +45,7 @@ c_flags := $(KBUILD_CFLAGS) $(KBUILD_CPPFLAGS) $(PLATFORM_CPPFLAGS) \ quiet_cmd_autoconf_dep = GEN $@ cmd_autoconf_dep = $(CC) -x c -DDO_DEPS_ONLY -M -MP $(c_flags) \ - -MQ include/config/auto.conf $(srctree)/include/common.h > $@ || { \ + -MQ include/config/auto.conf include/config.h > $@ || { \ rm $@; false; \ } include/autoconf.mk.dep: include/config.h FORCE @@ -70,7 +70,7 @@ quiet_cmd_autoconf = GEN $@ quiet_cmd_u_boot_cfg = CFG $@ cmd_u_boot_cfg = \ - $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM $(srctree)/include/common.h > $@.tmp && { \ + $(CPP) $(c_flags) $2 -DDO_DEPS_ONLY -dM include/config.h > $@.tmp && { \ grep 'define CONFIG_' $@.tmp | \ sed '/define CONFIG_IS_ENABLED(/d;/define CONFIG_IF_ENABLED_INT(/d;/define CONFIG_VAL(/d;' > $@; \ rm $@.tmp; \ diff --git a/scripts/gen_ll_addressable_symbols.sh b/scripts/gen_ll_addressable_symbols.sh index d0864804aaf..13f670ae0ef 100755 --- a/scripts/gen_ll_addressable_symbols.sh +++ b/scripts/gen_ll_addressable_symbols.sh @@ -10,6 +10,6 @@ set -e -echo '#include ' +echo '#include ' $@ 2>/dev/null | grep -oe '_u_boot_list_2_[a-zA-Z0-9_]*_2_[a-zA-Z0-9_]*' | \ sort -u | sed -e 's/^\(.*\)/extern char \1[];\n__ADDRESSABLE(\1);/' diff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py index 39f416cfd80..89066e6403f 100644 --- a/tools/dtoc/dtb_platdata.py +++ b/tools/dtoc/dtb_platdata.py @@ -835,7 +835,6 @@ class DtbPlatdata(): def generate_uclasses(self): self.out('\n') - self.out('#include \n') self.out('#include \n') self.out('#include \n') self.out('\n') @@ -1059,7 +1058,6 @@ class DtbPlatdata(): self.out('/* Allow use of U_BOOT_DRVINFO() in this file */\n') self.out('#define DT_PLAT_C\n') self.out('\n') - self.out('#include \n') self.out('#include \n') self.out('#include \n') self.out('\n') @@ -1092,7 +1090,6 @@ class DtbPlatdata(): See the documentation in doc/driver-model/of-plat.rst for more information. """ - self.out('#include \n') self.out('#include \n') self.out('#include \n') self.out('\n') diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index 597c93e8a87..c4a0889aebe 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -63,7 +63,6 @@ C_HEADER = C_HEADER_PRE + ''' /* Allow use of U_BOOT_DRVINFO() in this file */ #define DT_PLAT_C -#include #include #include ''' @@ -417,7 +416,6 @@ U_BOOT_DRVINFO(spl_test3) = { ''' uclass_text_inst = ''' -#include #include #include @@ -521,7 +519,6 @@ DM_UCLASS_INST(testfdt) = { * This was generated by dtoc from a .dtb (device tree binary) file. */ -#include #include #include -- cgit v1.3.1 From 48a0b0b4b7d7c84c31b307a5ae8bfbc264cf2162 Mon Sep 17 00:00:00 2001 From: Nathan Barrett-Morrison Date: Wed, 24 Apr 2024 20:04:00 -0400 Subject: arch: arm: Add Analog Devices SC5xx machine type Add support for the SC5xx machine type from Analog Devices. This includes support for the SC57x, SC58x, SC59x, and SC59x-64 SoCs, which have many common features such as common ADI IP blocks, and SHARC DSP cores. This commit introduces core functionality required for all boards using an SC5xx SoC, such as: - SPL configuration - Required CPU hooks such as reset - Boot ROM interaction to load the stage 2 bootloader in the reference configuration. Other options are possible but not officially supported at this time - SoC-common configuration expected to be reused by all boards - Early initialization for system clocks and DDR controller Co-developed-by: Greg Malysa Signed-off-by: Greg Malysa Co-developed-by: Ian Roberts Signed-off-by: Ian Roberts Signed-off-by: Vasileios Bimpikas Signed-off-by: Utsav Agarwal Signed-off-by: Arturs Artamonovs Signed-off-by: Nathan Barrett-Morrison --- MAINTAINERS | 13 + arch/arm/Kconfig | 5 + arch/arm/Makefile | 1 + arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h | 39 ++ arch/arm/include/asm/arch-adi/sc5xx/soc.h | 18 + arch/arm/include/asm/arch-adi/sc5xx/spl.h | 43 ++ arch/arm/mach-sc5xx/Kconfig | 475 +++++++++++++ arch/arm/mach-sc5xx/Makefile | 19 + arch/arm/mach-sc5xx/config.mk | 16 + arch/arm/mach-sc5xx/init/Makefile | 11 + arch/arm/mach-sc5xx/init/clkinit.c | 558 ++++++++++++++++ arch/arm/mach-sc5xx/init/clkinit.h | 18 + arch/arm/mach-sc5xx/init/dmcinit.c | 954 +++++++++++++++++++++++++++ arch/arm/mach-sc5xx/init/dmcinit.h | 31 + arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h | 62 ++ arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h | 50 ++ arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h | 50 ++ arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h | 49 ++ arch/arm/mach-sc5xx/rcu.c | 22 + arch/arm/mach-sc5xx/sc57x.c | 32 + arch/arm/mach-sc5xx/sc58x.c | 32 + arch/arm/mach-sc5xx/sc59x.c | 43 ++ arch/arm/mach-sc5xx/sc59x_64.c | 97 +++ arch/arm/mach-sc5xx/soc.c | 179 +++++ arch/arm/mach-sc5xx/spl.c | 102 +++ include/env/adi/adi_boot.env | 122 ++++ 26 files changed, 3041 insertions(+) create mode 100644 arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h create mode 100644 arch/arm/include/asm/arch-adi/sc5xx/soc.h create mode 100644 arch/arm/include/asm/arch-adi/sc5xx/spl.h create mode 100644 arch/arm/mach-sc5xx/Kconfig create mode 100644 arch/arm/mach-sc5xx/Makefile create mode 100644 arch/arm/mach-sc5xx/config.mk create mode 100644 arch/arm/mach-sc5xx/init/Makefile create mode 100644 arch/arm/mach-sc5xx/init/clkinit.c create mode 100644 arch/arm/mach-sc5xx/init/clkinit.h create mode 100644 arch/arm/mach-sc5xx/init/dmcinit.c create mode 100644 arch/arm/mach-sc5xx/init/dmcinit.h create mode 100644 arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h create mode 100644 arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h create mode 100644 arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h create mode 100644 arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h create mode 100644 arch/arm/mach-sc5xx/rcu.c create mode 100644 arch/arm/mach-sc5xx/sc57x.c create mode 100644 arch/arm/mach-sc5xx/sc58x.c create mode 100644 arch/arm/mach-sc5xx/sc59x.c create mode 100644 arch/arm/mach-sc5xx/sc59x_64.c create mode 100644 arch/arm/mach-sc5xx/soc.c create mode 100644 arch/arm/mach-sc5xx/spl.c create mode 100644 include/env/adi/adi_boot.env (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index 0462ade4ac6..d18429665c8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -599,6 +599,19 @@ R: Marc Murphy S: Supported F: arch/arm/dts/am335x-sancloud* +ARM SC5XX +M: Nathan Barrett-Morrison +M: Greg Malysa +M: Ian Roberts +M: Vasileios Bimpikas +M: Utsav Agarwal +M: Arturs Artamonovs +S: Supported +T: git https://github.com/analogdevicesinc/lnxdsp-u-boot +F: arch/arm/include/asm/arch-adi/ +F: arch/arm/mach-sc5xx/ +F: include/env/adi/ + ARM SNAPDRAGON M: Caleb Connolly M: Neil Armstrong diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a0842e19330..ded35cb65c7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1843,6 +1843,9 @@ config TARGET_LS1046AFRWY development platform that supports the QorIQ LS1046A Layerscape Architecture processor. +config ARCH_SC5XX + bool "Analog Devices SC5XX-processor family" + config TARGET_SL28 bool "Support sl28" select ARCH_LS1028A @@ -2276,6 +2279,8 @@ source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" +source "arch/arm/mach-sc5xx/Kconfig" + source "arch/arm/mach-snapdragon/Kconfig" source "arch/arm/mach-socfpga/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index a4266a3e366..734c6d69926 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -78,6 +78,7 @@ machine-$(CONFIG_ARCH_OWL) += owl machine-$(CONFIG_ARCH_RENESAS) += renesas machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx +machine-$(CONFIG_ARCH_SC5XX) += sc5xx machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_STM32) += stm32 diff --git a/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h b/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h new file mode 100644 index 00000000000..683e3d412ce --- /dev/null +++ b/arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ +#ifndef ARCH_ADI_SC5XX_SC5XX_H +#define ARCH_ADI_SC5XX_SC5XX_H + +#include + +#define TWI0_CLKDIV 0x31001400 // TWI0 SCL Clock Divider Register +#define TWI1_CLKDIV 0x31001500 // TWI1 SCL Clock Divider Register +#define TWI2_CLKDIV 0x31001600 // TWI2 SCL Clock Divider Register + +const char *sc5xx_get_boot_mode(u32 *bmode); +void sc5xx_enable_rgmii(void); + +void sc5xx_enable_ns_sharc_access(uintptr_t securec0_base); +void sc5xx_disable_spu0(uintptr_t spu0_start, uintptr_t spu0_end); +void sc5xx_enable_pmu(void); + +/** + * Per-SoC init function to be used to initialize hw-specific things. Examples: + * enable PMU on armv7, enable coresight timer on armv8, etc. + */ +void sc5xx_soc_init(void); + +/* + * Reconfigure SPI memory map region for OSPI use. The adi-spi3 driver + * does not use the memory map, while the OSPI driver requires it. Only + * available on sc59x and sc59x-64 + */ +void sc59x_remap_ospi(void); + +#endif diff --git a/arch/arm/include/asm/arch-adi/sc5xx/soc.h b/arch/arm/include/asm/arch-adi/sc5xx/soc.h new file mode 100644 index 00000000000..430dbe2dae4 --- /dev/null +++ b/arch/arm/include/asm/arch-adi/sc5xx/soc.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#ifndef BOARD_ADI_COMMON_SOC_H +#define BOARD_ADI_COMMON_SOC_H + +#include + +void fixup_dp83867_phy(struct phy_device *phydev); + +#endif diff --git a/arch/arm/include/asm/arch-adi/sc5xx/spl.h b/arch/arm/include/asm/arch-adi/sc5xx/spl.h new file mode 100644 index 00000000000..c215e6b892a --- /dev/null +++ b/arch/arm/include/asm/arch-adi/sc5xx/spl.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ +#ifndef ARCH_ADI_SC5XX_SPL_H +#define ARCH_ADI_SC5XX_SPL_H + +#include + +struct adi_boot_args { + phys_addr_t addr; + u32 flags; + u32 cmd; +}; + +extern u32 bmode; + +/** + * This table stores the arguments to the rom boot function per bootmode, + * and it is populated per SoC in the corresponding SoC support file (sc7x, sc58x, + * and so on). + */ +extern const struct adi_boot_args adi_rom_boot_args[8]; + +/** + * Struct layout for the boot config is also specific to an SoC, so you should + * only access it inside an SoC-specific boot hook function, which will be called + * from the boot rom while going from SPL to proper u-boot + */ +struct ADI_ROM_BOOT_CONFIG; +int32_t adi_rom_boot_hook(struct ADI_ROM_BOOT_CONFIG *cfg, int32_t cause); + +typedef void (*adi_rom_boot_fn)(void *address, uint32_t flags, int32_t count, + void *hook, uint32_t command); + +extern adi_rom_boot_fn adi_rom_boot; + +#endif diff --git a/arch/arm/mach-sc5xx/Kconfig b/arch/arm/mach-sc5xx/Kconfig new file mode 100644 index 00000000000..3846b4fd5b6 --- /dev/null +++ b/arch/arm/mach-sc5xx/Kconfig @@ -0,0 +1,475 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2022 - Analog Devices, Inc. +# +# Written and/or maintained by Timesys Corporation +# +# Contact: Nathan Barrett-Morrison +# Contact: Greg Malysa +# + +# All 32-bit platforms require SYS_ARM_CACHE_WRITETHROUGH +# But it is ignored if selected here, so it must be in the defconfig + +if ARCH_SC5XX + +config SC57X + bool + select SUPPORT_SPL + select CPU_V7A + select PANIC_HANG + select COMMON_CLK_ADI_SC57X + select TIMER + select ADI_SC5XX_TIMER + +config SC58X + bool + select SUPPORT_SPL + select CPU_V7A + select PANIC_HANG + select COMMON_CLK_ADI_SC58X + select TIMER + select ADI_SC5XX_TIMER + +config SC59X + bool + select SUPPORT_SPL + select CPU_V7A + select PANIC_HANG + select COMMON_CLK_ADI_SC594 + select TIMER + select ADI_SC5XX_TIMER + select NOP_PHY + +config SC59X_64 + bool + select SUPPORT_SPL + select PANIC_HANG + select MMC_SDHCI_ADMA_FORCE_32BIT + select ARM64 + select DM + select DM_SERIAL + select COMMON_CLK_ADI_SC598 + select GICV3 + select GIC_600_CLEAR_RDPD + select NOP_PHY + +config SC_BOOT_MODE + int "SC5XX boot mode select" + default 1 + range 0 7 + help + Mode 0: do nothing, just idle + Mode 1: boot ldr out of serial flash + Mode 7: boot ldr over uart + +config SC_BOOT_SPI_BUS + int "sc5xx spi boot bus" + default 2 + range 0 4 + help + This is the SPI peripheral number to use for booting, X in the + expression `sf probe X:Y` + +config SC_BOOT_SPI_SSEL + int "sc5xx spi boot chipselect" + default 1 + range 0 6 + help + This is the SPI chip select number to use for booting, Y in the + expression `sf probe X:Y` + +config SC_BOOT_OSPI_BUS + int "sc5xx ospi boot bus" + default 0 + help + This is the OSPI peripheral number to use for booting, X in the + expression `sf probe X:Y` + +config SC_BOOT_OSPI_SSEL + int "sc5xx ospi boot chipselect" + default 0 + help + This is the OSPI chip select number to use for booting, Y in the + expression `sf probe X:Y` + +config SYS_FLASH_BASE + hex + default 0x60000000 + +config UART_CONSOLE + int + default 0 + +config UART4_SERIAL + bool + depends on DM_SERIAL + default y + +config WDT_ADI + bool + default y + +config WATCHDOG_TIMEOUT_MSECS + int + default 30000 + +config DW_PORTS + int + default 1 + +config ADI_BUG_EZKHW21 + bool "SC584 EZKIT phy bug workaround" + depends on SC58X + help + This workaround affects the SC584 EZKIT and addresses bug EZKHW21. + It disables gigabit ethernet mode and limits the board to 100 Mbps + +config ADI_CARRIER_SOMCRR_EZKIT + bool "Support the EV-SOMCRR-EZKIT" + depends on (SC59X || SC59X_64) + help + Say y to include support for the EV-SOMCRR-EZKIT carrier board, + which is compatible with the SC594 and SC598 SOMs. The EZKIT is + mutually incompatible with the EZLITE. + +config ADI_CARRIER_SOMCRR_EZLITE + bool "Support the EV-SOMCRR-EZLITE" + depends on (SC59X || SC59X_64) + help + Say y to include support for the EV-SOMCRR-EZLITE carrier board, + which is compatible with the SC594 and SC598 SOMs. The EZLITE is + mutually incompatible with the EZKIT. + +config ADI_SPL_FORCE_BMODE + int "Force the SPL to use this BMODE device during next boot stage" + default 0 + range 0 9 + depends on SPL + help + Force the SPL to use this BMODE device during next boot stage. + For example, if booting via QSPI, we can force the second stage + Of the boot process to use other peripherals via: + 1 = QSPI -> QSPI + 5 = QSPI -> OSPI + 6 = QSPI -> eMMC + +config ADI_USE_DMC0 + bool "Configure DMC0" + default y + help + During hardware initialization, channel 0 of the DMC will be + initialized. Select this if you have DMC0 connected to external + DDR memory. This is expected to be true for every board using + an SC5xx SoC. + +config ADI_USE_DMC1 + bool "Configure DMC1" + help + During hardware initialization, channel 1 of the DMC will be + initialized. Not all processors have a DMC1. Select this if your + SoC has DMC1 and you have it connected to external DDR memory. + +config ADI_USE_DDR2 + bool "Configure DMC for DDR2 mode" + help + Configure the DMC in DDR2 mode. The default is DDR3 and not all + parts may actually support DDR2. Please consult the manual for + the SoC that you are using to determine if DDR2 mode is supported. + This also requires that DDR2 memory is present on the board or it + will probably cause strange failure. + +menu "Clock configuration" + +config CGU0_DF_DIV + int "CGU0_DF_DIV" + range 0 1 + help + Select 0 to pass CLKIN to PLL + Select 1 to pass CLKIN/2 to PLL + +config CGU0_VCO_MULT + int "CGU0_VCO_MULT" + range 0 127 + help + VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL + A value of 0 means 128 + +config CGU0_CCLK_DIV + int "CGU0_CCLK_DIV" + range 0 31 + help + CCLK_DIV controls the core clock divider + A value of 0 means 32 + CCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / CCLK_DIV + +config CGU0_SCLK_DIV + int "CGU0_SCLK_DIV" + range 0 31 + help + SCLK_DIV controls the system clock divider + A value of 0 means 32 + SCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / SYSCLK_DIV + +config CGU0_SCLK0_DIV + int "CGU0_SCLK0_DIV" + range 0 7 + help + A value of 0 means 8 + SCLK0 = SCLK / SCLK0_DIV + +config CGU0_SCLK1_DIV + int "CGU0_SCLK1_DIV" + depends on (SC57X || SC58X) + range 0 7 + help + A value of 0 means 8 + SCLK1 = SCLK / SCLK1_DIV + +config CGU0_DCLK_DIV + int "CGU0_DCLK_DIV" + range 0 31 + help + DCLK_DIV controls the DDR clock divider + A value of 0 means 32 + DCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / DCLK_DIV + +config CGU0_OCLK_DIV + int "CGU0_OCLK_DIV" + range 0 127 + help + OCLK_DIV controls the output clock divider + A value of 0 means 128 + OCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / OCLK_DIV + +config CGU0_DIV_S1SELEX + int "CGU0_DIV_S1SELEX" + depends on !SC57X && !SC58X + range 0 255 + help + CGU0 SCLK1 Extended divisor register. + A value of 0 means 256. + SCLK1 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S1SELEX + +config CGU0_CLKOUTSEL + int "CGU0_CLKOUTSEL" + default 0 + range 0 31 + help + Select signal driven through CLKOUT pin multiplexer. + This value varies on each SOC. Refer to + CGU_CLKOUTSEL.CLKOUTSEL in the Hardware Reference Manual + for values applicable to each SOC. + Commonly, values 0 and 1 select CLKIN0 or CLKIN1 respectively. + +config CGU1_PLL3_DDRCLK + bool "DDRCLK From 3rd PLL" + depends on SC59X_64 + help + 3rd PLL output is connected to DMC block when set. + When cleared, DDR clock is CLKO3 output of CDU. + +config CGU1_PLL3_VCO_MSEL + int "CGU0_PLL3_VCO_MSEL" + depends on CGU1_PLL3_DDRCLK + range 1 128 + help + PLL multiplier value for the 3rd PLL. + DCLK = (CLKIN * PLL3_VCO_MSEL) / PLL3_DCLK_DIV + +config CGU1_PLL3_DCLK_DIV + int "CGU0_PLL3_DCLK_DIV" + depends on CGU1_PLL3_DDRCLK + range 1 32 + help + PLL divider value for the 3rd PLL. + DCLK = (CLKIN * PLL3_VCO_MSEL) / PLL3_DCLK_DIV + +config CGU1_DF_DIV + int "CGU1_DF_DIV" + range 0 1 + help + Select 0 to pass CLKIN to PLL + Select 1 to pass CLKIN/2 to PLL + +config CGU1_VCO_MULT + int "CGU1_VCO_MULT" + range 0 127 + help + VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL + A value of 0 means 128 + +config CGU1_CCLK_DIV + int "CGU1_CCLK_DIV" + range 0 31 + help + CCLK_DIV controls the core clock divider + A value of 0 means 32 + CCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / CCLK_DIV + +config CGU1_SCLK_DIV + int "CGU1_SCLK_DIV" + range 0 31 + help + SCLK_DIV controls the system clock divider + A value of 0 means 32 + SCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / SYSCLK_DIV + +config CGU1_SCLK0_DIV + int "CGU1_SCLK0_DIV" + depends on (SC57X || SC58X || SC59X) + range 0 7 + help + A value of 0 means 8 + SCLK0 = SCLK / SCLK0_DIV + +config CGU1_SCLK1_DIV + int "CGU1_SCLK1_DIV" + depends on (SC57X || SC58X) + range 0 7 + help + A value of 0 means 8 + SCLK1 = SCLK / SCLK1_DIV + +config CGU1_DCLK_DIV + int "CGU1_DCLK_DIV" + range 0 31 + help + DCLK_DIV controls the DDR clock divider + A value of 0 means 32 + DCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / DCLK_DIV + +config CGU1_OCLK_DIV + int "CGU1_OCLK_DIV" + range 0 127 + help + OCLK_DIV controls the output clock divider + A value of 0 means 128 + OCLK = ((CLKIN / (1 + DF)) * VCO_MULT) / OCLK_DIV + +config CGU1_DIV_S0SELEX + int "CGU1_DIV_S0SELEX" + depends on !SC57X && !SC58X && !SC59X + range 0 255 + help + CGU1 SCLK0 Extended divisor register. + A value of 0 means 256. + SCLK0 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S0SELEX + +config CGU1_DIV_S1SELEX + int "CGU1_DIV_S1SELEX" + depends on !SC57X && !SC58X + range 0 255 + help + CGU1 SCLK1 Extended divisor register. + A value of 0 means 256. + SCLK1 = ((CLKIN / (1 + DF)) * VCO_MULT) / DIV_S1SELEX + +config CDU0_CGU1_CLKIN + int "CDU0 CGU1 CLKINn Select" + default 0 + range 0 1 + help + Selects source clock for CGU1. + 0 for CLKIN0 + 1 for CLKIN1 + +config CDU0_CLKO0 + int "CDU0_CLKO0" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO1 + int "CDU0_CLKO1" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO2 + int "CDU0_CLKO2" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO3 + int "CDU0_CLKO3" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO4 + int "CDU0_CLKO4" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO5 + int "CDU0_CLKO5" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO6 + int "CDU0_CLKO6" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO7 + int "CDU0_CLKO7" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO8 + int "CDU0_CLKO8" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO9 + int "CDU0_CLKO9" + range 1 7 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO10 + int "CDU0_CLKO10" + range 1 7 + depends on (SC59X || SC59X_64) + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO12 + int "CDU0_CLKO12" + range 1 7 + depends on (SC59X || SC59X_64) + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO13 + int "CDU0_CLKO13" + range 1 7 + depends on SC59X_64 + help + Clock source select. Refer to SOC Hardware Reference Manual + +config CDU0_CLKO14 + int "CDU0_CLKO14" + range 1 7 + depends on SC59X_64 + help + Clock source select. Refer to SOC Hardware Reference Manual + +endmenu + +config ADI_GPIO + bool + default y + +config PINCTRL_ADI + bool + default y + +endif diff --git a/arch/arm/mach-sc5xx/Makefile b/arch/arm/mach-sc5xx/Makefile new file mode 100644 index 00000000000..eeb56c078b3 --- /dev/null +++ b/arch/arm/mach-sc5xx/Makefile @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2022 - Analog Devices, Inc. +# +# Written and/or maintained by Timesys Corporation +# +# Contact: Nathan Barrett-Morrison +# Contact: Greg Malysa +# + +obj-y += soc.o init/ + +obj-$(CONFIG_SC57X) += sc57x.o +obj-$(CONFIG_SC58X) += sc58x.o +obj-$(CONFIG_SC59X) += sc59x.o +obj-$(CONFIG_SC59X_64) += sc59x_64.o + +obj-$(CONFIG_SPL_BUILD) += spl.o +obj-$(CONFIG_SYSCON) += rcu.o diff --git a/arch/arm/mach-sc5xx/config.mk b/arch/arm/mach-sc5xx/config.mk new file mode 100644 index 00000000000..580964e559c --- /dev/null +++ b/arch/arm/mach-sc5xx/config.mk @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2022 - Analog Devices, Inc. +# +# Written and/or maintained by Timesys Corporation +# +# Contact: Nathan Barrett-Morrison +# Contact: Greg Malysa +# + +ifdef CONFIG_SPL_BUILD +INPUTS-y += $(obj)/u-boot-spl.ldr +endif + +LDR_FLAGS += --bcode=$(CONFIG_SC_BOOT_MODE) +LDR_FLAGS += --use-vmas diff --git a/arch/arm/mach-sc5xx/init/Makefile b/arch/arm/mach-sc5xx/init/Makefile new file mode 100644 index 00000000000..9d4920fe076 --- /dev/null +++ b/arch/arm/mach-sc5xx/init/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2022 - Analog Devices, Inc. +# +# Written and/or maintained by Timesys Corporation +# +# Contact: Nathan Barrett-Morrison +# Contact: Greg Malysa +# + +obj-y += dmcinit.o clkinit.o diff --git a/arch/arm/mach-sc5xx/init/clkinit.c b/arch/arm/mach-sc5xx/init/clkinit.c new file mode 100644 index 00000000000..ae53cd61efd --- /dev/null +++ b/arch/arm/mach-sc5xx/init/clkinit.c @@ -0,0 +1,558 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#include +#include +#include +#include "clkinit.h" +#include "dmcinit.h" + +#ifdef CONFIG_CGU0_SCLK0_DIV + #define VAL_CGU0_SCLK0_DIV CONFIG_CGU0_SCLK0_DIV +#else + #define VAL_CGU0_SCLK0_DIV 1 +#endif +#ifdef CONFIG_CGU0_SCLK1_DIV + #define VAL_CGU0_SCLK1_DIV CONFIG_CGU0_SCLK1_DIV +#else + #define VAL_CGU0_SCLK1_DIV 1 +#endif +#ifdef CONFIG_CGU0_DIV_S0SELEX + #define VAL_CGU0_DIV_S0SELEX CONFIG_CGU0_DIV_S0SELEX +#else + #define VAL_CGU0_DIV_S0SELEX -1 +#endif +#ifdef CONFIG_CGU0_DIV_S1SELEX + #define VAL_CGU0_DIV_S1SELEX CONFIG_CGU0_DIV_S1SELEX +#else + #define VAL_CGU0_DIV_S1SELEX -1 +#endif +#ifdef CONFIG_CGU0_CLKOUTSEL + #define VAL_CGU0_CLKOUTSEL CONFIG_CGU0_CLKOUTSEL +#else + #define VAL_CGU0_CLKOUTSEL -1 +#endif +#ifdef CONFIG_CGU1_SCLK0_DIV + #define VAL_CGU1_SCLK0_DIV CONFIG_CGU1_SCLK0_DIV +#else + #define VAL_CGU1_SCLK0_DIV 1 +#endif +#ifdef CONFIG_CGU1_SCLK1_DIV + #define VAL_CGU1_SCLK1_DIV CONFIG_CGU1_SCLK1_DIV +#else + #define VAL_CGU1_SCLK1_DIV 1 +#endif +#ifdef CONFIG_CGU1_DIV_S0SELEX + #define VAL_CGU1_DIV_S0SELEX CONFIG_CGU1_DIV_S0SELEX +#else + #define VAL_CGU1_DIV_S0SELEX -1 +#endif +#ifdef CONFIG_CGU1_DIV_S1SELEX + #define VAL_CGU1_DIV_S1SELEX CONFIG_CGU1_DIV_S1SELEX +#else + #define VAL_CGU1_DIV_S1SELEX -1 +#endif +#ifdef CONFIG_CGU1_CLKOUTSEL + #define VAL_CGU1_CLKOUTSEL CONFIG_CGU1_CLKOUTSEL +#else + #define VAL_CGU1_CLKOUTSEL -1 +#endif + +#define REG_MISC_REG10_tst_addr 0x310A902C + +#define CGU0_REGBASE 0x3108D000 +#define CGU1_REGBASE 0x3108E000 + +#define CGU_CTL 0x00 // CGU0 Control Register +#define CGU_PLLCTL 0x04 // CGU0 PLL Control Register +#define CGU_STAT 0x08 // CGU0 Status Register +#define CGU_DIV 0x0C // CGU0 Clocks Divisor Register +#define CGU_CLKOUTSEL 0x10 // CGU0 CLKOUT Select Register +#define CGU_DIVEX 0x40 // CGU0 DIV Register Extension + +#define BITP_CGU_DIV_OSEL 22 // OUTCLK Divisor +#define BITP_CGU_DIV_DSEL 16 // DCLK Divisor +#define BITP_CGU_DIV_S1SEL 13 // SCLK 1 Divisor +#define BITP_CGU_DIV_SYSSEL 8 // SYSCLK Divisor +#define BITP_CGU_DIV_S0SEL 5 // SCLK 0 Divisor +#define BITP_CGU_DIV_CSEL 0 // CCLK Divisor + +#define BITP_CGU_CTL_MSEL 8 // Multiplier Select +#define BITP_CGU_CTL_DF 0 // Divide Frequency + +#define BITM_CGU_STAT_CLKSALGN 0x00000008 +#define BITM_CGU_STAT_PLOCK 0x00000004 +#define BITM_CGU_STAT_PLLBP 0x00000002 +#define BITM_CGU_STAT_PLLEN 0x00000001 + +/* PLL Multiplier and Divisor Selections (Required Value, Bit Position) */ +/* PLL Multiplier Select */ +#define MSEL(X) (((X) << BITP_CGU_CTL_MSEL) & \ + BITM_CGU_CTL_MSEL) +/* Divide frequency[true or false] */ +#define DF(X) (((X) << BITP_CGU_CTL_DF) & \ + BITM_CGU_CTL_DF) +/* Core Clock Divisor Select */ +#define CSEL(X) (((X) << BITP_CGU_DIV_CSEL) & \ + BITM_CGU_DIV_CSEL) +/* System Clock Divisor Select */ +#define SYSSEL(X) (((X) << BITP_CGU_DIV_SYSSEL) & \ + BITM_CGU_DIV_SYSSEL) +/* SCLK0 Divisor Select */ +#define S0SEL(X) (((X) << BITP_CGU_DIV_S0SEL) & \ + BITM_CGU_DIV_S0SEL) +/* SCLK1 Divisor Select */ +#define S1SEL(X) (((X) << BITP_CGU_DIV_S1SEL) & \ + BITM_CGU_DIV_S1SEL) +/* DDR Clock Divisor Select */ +#define DSEL(X) (((X) << BITP_CGU_DIV_DSEL) & \ + BITM_CGU_DIV_DSEL) +/* OUTCLK Divisor Select */ +#define OSEL(X) (((X) << BITP_CGU_DIV_OSEL) & \ + BITM_CGU_DIV_OSEL) +/* CLKOUT select */ +#define CLKOUTSEL(X) (((X) << BITP_CGU_CLKOUTSEL_CLKOUTSEL) & \ + BITM_CGU_CLKOUTSEL_CLKOUTSEL) +#define S0SELEX(X) (((X) << BITP_CGU_DIVEX_S0SELEX) & \ + BITM_CGU_DIVEX_S0SELEX) +#define S1SELEX(X) (((X) << BITP_CGU_DIVEX_S1SELEX) & \ + BITM_CGU_DIVEX_S1SELEX) + +struct CGU_Settings { + phys_addr_t rbase; + u32 ctl_MSEL:7; + u32 ctl_DF:1; + u32 div_CSEL:5; + u32 div_SYSSEL:5; + u32 div_S0SEL:3; + u32 div_S1SEL:3; + u32 div_DSEL:5; + u32 div_OSEL:7; + s16 divex_S0SELEX; + s16 divex_S1SELEX; + s8 clkoutsel; +}; + +/* CGU Registers */ +#define BITM_CGU_CTL_LOCK 0x80000000 /* Lock */ + +#define BITM_CGU_CTL_MSEL 0x00007F00 /* Multiplier Select */ +#define BITM_CGU_CTL_DF 0x00000001 /* Divide Frequency */ +#define BITM_CGU_CTL_S1SELEXEN 0x00020000 /* SCLK1 Extension Divider Enable */ +#define BITM_CGU_CTL_S0SELEXEN 0x00010000 /* SCLK0 Extension Divider Enable */ + +#define BITM_CGU_DIV_LOCK 0x80000000 /* Lock */ +#define BITM_CGU_DIV_UPDT 0x40000000 /* Update Clock Divisors */ +#define BITM_CGU_DIV_ALGN 0x20000000 /* Align */ +#define BITM_CGU_DIV_OSEL 0x1FC00000 /* OUTCLK Divisor */ +#define BITM_CGU_DIV_DSEL 0x001F0000 /* DCLK Divisor */ +#define BITM_CGU_DIV_S1SEL 0x0000E000 /* SCLK 1 Divisor */ +#define BITM_CGU_DIV_SYSSEL 0x00001F00 /* SYSCLK Divisor */ +#define BITM_CGU_DIV_S0SEL 0x000000E0 /* SCLK 0 Divisor */ +#define BITM_CGU_DIV_CSEL 0x0000001F /* CCLK Divisor */ + +#define BITP_CGU_DIVEX_S0SELEX 0 +#define BITM_CGU_DIVEX_S0SELEX 0x000000FF /* SCLK 0 Extension Divisor */ + +#define BITP_CGU_DIVEX_S1SELEX 16 +#define BITM_CGU_DIVEX_S1SELEX 0x00FF0000 /* SCLK 1 Extension Divisor */ + +#define BITM_CGU_PLLCTL_PLLEN 0x00000008 /* PLL Enable */ +#define BITM_CGU_PLLCTL_PLLBPCL 0x00000002 /* PLL Bypass Clear */ +#define BITM_CGU_PLLCTL_PLLBPST 0x00000001 /* PLL Bypass Set */ + +#define BITP_CGU_CLKOUTSEL_CLKOUTSEL 0 /* CLKOUT Select */ +#define BITM_CGU_CLKOUTSEL_CLKOUTSEL 0x0000001F /* CLKOUT Select */ + +#define CGU_STAT_MASK (BITM_CGU_STAT_PLLEN | BITM_CGU_STAT_PLOCK | \ + BITM_CGU_STAT_CLKSALGN) +#define CGU_STAT_ALGN_LOCK (BITM_CGU_STAT_PLLEN | BITM_CGU_STAT_PLOCK) + +/* Clock Distribution Unit Registers */ +#define REG_CDU0_CFG0 0x3108F000 +#define REG_CDU0_CFG1 0x3108F004 +#define REG_CDU0_CFG2 0x3108F008 +#define REG_CDU0_CFG3 0x3108F00C +#define REG_CDU0_CFG4 0x3108F010 +#define REG_CDU0_CFG5 0x3108F014 +#define REG_CDU0_CFG6 0x3108F018 +#define REG_CDU0_CFG7 0x3108F01C +#define REG_CDU0_CFG8 0x3108F020 +#define REG_CDU0_CFG9 0x3108F024 +#define REG_CDU0_CFG10 0x3108F028 +#define REG_CDU0_CFG11 0x3108F02C +#define REG_CDU0_CFG12 0x3108F030 +#define REG_CDU0_CFG13 0x3108F034 +#define REG_CDU0_CFG14 0x3108F038 +#define REG_CDU0_STAT 0x3108F040 +#define REG_CDU0_CLKINSEL 0x3108F044 +#define REG_CDU0_REVID 0x3108F048 + +#define BITM_REG10_MSEL3 0x000007F0 +#define BITP_REG10_MSEL3 4 + +#define BITM_REG10_DSEL3 0x0001F000 +#define BITP_REG10_DSEL3 12 + +/* Selected clock macros */ +#define CGUn_MULT(cgu) ((CONFIG_CGU##cgu##_VCO_MULT == 0) ? \ + 128 : CONFIG_CGU##cgu##_VCO_MULT) +#define CGUn_DIV(clkname, cgu) ((CONFIG_CGU##cgu##_##clkname##_DIV == 0) ? \ + 32 : CONFIG_CGU##cgu##_##clkname##_DIV) +#define CCLK1_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ + (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ + CGUn_DIV(CCLK, cgu)) +#define CCLK2_n_RATIO(cgu) (((CGUn_MULT(cgu) * 2) / 3) / \ + (1 + CONFIG_CGU##cgu##_DF_DIV)) +#define DCLK_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ + (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ + CGUn_DIV(DCLK, cgu)) +#define SYSCLK_n_RATIO(cgu) (((CGUn_MULT(cgu)) / \ + (1 + CONFIG_CGU##cgu##_DF_DIV)) / \ + CGUn_DIV(SCLK, cgu)) +#define PLL3_RATIO ((CONFIG_CGU1_PLL3_VCO_MSEL) / \ + (CONFIG_CGU1_PLL3_DCLK_DIV)) + +#if (1 == CONFIG_CDU0_CLKO2) + #define ARMCLK_IN 0 + #define ARMCLK_RATIO CCLK1_n_RATIO(0) +#elif (3 == CONFIG_CDU0_CLKO2) && \ + (defined(CONFIG_SC57X) || defined(CONFIG_SC58X)) + #define ARMCLK_IN 0 + #define ARMCLK_RATIO SYSCLK_n_RATIO(0) +#elif (5 == CONFIG_CDU0_CLKO2) && defined(CONFIG_SC59X_64) + #define ARMCLK_IN 0 + #define ARMCLK_RATIO CCLK2_n_RATIO(0) +#elif (7 == CONFIG_CDU0_CLKO2) && defined(CONFIG_SC59X_64) + #define ARMCLK_IN CDU0_CGU1_CLKIN + #define ARMCLK_RATIO CCLK2_n_RATIO(1) +#endif + +#ifdef CONFIG_CGU1_PLL3_DDRCLK + #define DDRCLK_IN CDU0_CGU1_CLKIN + #define DDRCLK_RATIO PLL3_RATIO +#elif (1 == CONFIG_CDU0_CLKO3) + #define DDRCLK_IN 0 + #define DDRCLK_RATIO DCLK_n_RATIO(0) +#elif (3 == CONFIG_CDU0_CLKO3) + #define DDRCLK_IN CDU0_CGU1_CLKIN + #define DDRCLK_RATIO DCLK_n_RATIO(1) +#endif + +#ifndef ARMCLK_RATIO + #error Invalid/unknown ARMCLK selection! +#endif +#ifndef DDRCLK_RATIO + #error Invalid/unknown DDRCLK selection! +#endif + +#define ARMDDR_CLK_RATIO_FPERCISION 1000 + +#if ARMCLK_IN != DDRCLK_IN + #ifndef CUSTOM_ARMDDR_CLK_RATIO + /** + * SYS_CLKINx are defined within the device tree, not configs. + * Thus, we can only determine cross-CGU clock ratios if they + * use the same SYS_CLKINx. + */ + #error Define CUSTOM_ARMDDR_CLK_RATIO for different SYS_CLKINs + #else + #define ARMDDR_CLK_RATIO CUSTOM_ARMDDR_CLK_RATIO + #endif +#else + #define ARMDDR_CLK_RATIO (ARMDDR_CLK_RATIO_FPERCISION *\ + ARMCLK_RATIO / DDRCLK_RATIO) +#endif + +void dmcdelay(uint32_t delay) +{ + /* There is no zero-overhead loop on ARM, so assume each iteration + * takes 4 processor cycles (based on examination of -O3 and -Ofast + * output). + */ + u32 i, remainder; + + /* Convert DDR cycles to core clock cycles */ + u32 f = delay * ARMDDR_CLK_RATIO; + + delay = f + 500; + delay /= ARMDDR_CLK_RATIO_FPERCISION; + + /* Round up to multiple of 4 */ + remainder = delay % 4; + if (remainder != 0u) + delay += (4u - remainder); + + for (i = 0; i < delay; i += 4) + asm("nop"); +} + +static void program_cgu(const struct CGU_Settings *cgu) +{ + const uintptr_t b = cgu->rbase; + const bool use_extension0 = cgu->divex_S0SELEX >= 0; + const bool use_extension1 = cgu->divex_S1SELEX >= 0; + u32 temp; + + temp = OSEL(cgu->div_OSEL); + temp |= SYSSEL(cgu->div_SYSSEL); + temp |= CSEL(cgu->div_CSEL); + temp |= DSEL(cgu->div_DSEL); + temp |= (S0SEL(cgu->div_S0SEL)); + temp |= (S1SEL(cgu->div_S1SEL)); + temp &= ~BITM_CGU_DIV_LOCK; + + //Put PLL in to Bypass Mode + writel(BITM_CGU_PLLCTL_PLLEN | BITM_CGU_PLLCTL_PLLBPST, + b + CGU_PLLCTL); + while (!(readl(b + CGU_STAT) & BITM_CGU_STAT_PLLBP)) + ; + + while (!((readl(b + CGU_STAT) & CGU_STAT_MASK) == CGU_STAT_ALGN_LOCK)) + ; + + dmcdelay(1000); + + writel(temp & (~BITM_CGU_DIV_ALGN) & (~BITM_CGU_DIV_UPDT), + b + CGU_DIV); + + dmcdelay(1000); + + temp = MSEL(cgu->ctl_MSEL) | DF(cgu->ctl_DF); + if (use_extension0) + temp |= BITM_CGU_CTL_S0SELEXEN; + if (use_extension1) + temp |= BITM_CGU_CTL_S1SELEXEN; + + writel(temp & (~BITM_CGU_CTL_LOCK), b + CGU_CTL); + + if (use_extension0 || use_extension1) { + u32 mask = BITM_CGU_CTL_S1SELEXEN | BITM_CGU_CTL_S0SELEXEN; + + while (!(readl(b + CGU_CTL) & mask)) + ; + + temp = readl(b + CGU_DIVEX); + + if (use_extension0) { + temp &= ~BITM_CGU_DIVEX_S0SELEX; + temp |= S0SELEX(cgu->divex_S0SELEX); + } + + if (use_extension1) { + temp &= ~BITM_CGU_DIVEX_S1SELEX; + temp |= S1SELEX(cgu->divex_S1SELEX); + } + + writel(temp, b + CGU_DIVEX); + } + + dmcdelay(1000); + + //Take PLL out of Bypass Mode + writel(BITM_CGU_PLLCTL_PLLEN | BITM_CGU_PLLCTL_PLLBPCL, + b + CGU_PLLCTL); + while ((readl(b + CGU_STAT) & + (BITM_CGU_STAT_PLLBP | BITM_CGU_STAT_CLKSALGN))) + ; + + dmcdelay(1000); + + if (cgu->clkoutsel >= 0) { + temp = readl(b + CGU_CLKOUTSEL); + temp &= ~BITM_CGU_CLKOUTSEL_CLKOUTSEL; + temp |= CLKOUTSEL(cgu->clkoutsel); + writel(temp, b + CGU_CLKOUTSEL); + } +} + +void adi_config_third_pll(void) +{ +#if defined(CONFIG_CGU1_PLL3_VCO_MSEL) && defined(CONFIG_CGU1_PLL3_DCLK_DIV) + u32 temp; + + u32 msel = CONFIG_CGU1_PLL3_VCO_MSEL - 1; + u32 dsel = CONFIG_CGU1_PLL3_DCLK_DIV - 1; + + temp = readl(REG_MISC_REG10_tst_addr); + temp &= 0xFFFE0000; + writel(temp, REG_MISC_REG10_tst_addr); + + dmcdelay(4000u); + + //update MSEL [10:4] + temp = readl(REG_MISC_REG10_tst_addr); + temp |= ((msel << BITP_REG10_MSEL3) & BITM_REG10_MSEL3); + writel(temp, REG_MISC_REG10_tst_addr); + + temp = readl(REG_MISC_REG10_tst_addr); + temp |= 0x2; + writel(temp, REG_MISC_REG10_tst_addr); + + dmcdelay(100000u); + + temp = readl(REG_MISC_REG10_tst_addr); + temp |= 0x1; + writel(temp, REG_MISC_REG10_tst_addr); + + temp = readl(REG_MISC_REG10_tst_addr); + temp |= 0x800; + writel(temp, REG_MISC_REG10_tst_addr); + + temp = readl(REG_MISC_REG10_tst_addr); + temp &= 0xFFFFF7F8; + writel(temp, REG_MISC_REG10_tst_addr); + + dmcdelay(4000u); + + temp = readl(REG_MISC_REG10_tst_addr); + temp |= ((dsel << BITP_REG10_DSEL3) & BITM_REG10_DSEL3); + writel(temp, REG_MISC_REG10_tst_addr); + + temp = readl(REG_MISC_REG10_tst_addr); + temp |= 0x4; + writel(temp, REG_MISC_REG10_tst_addr); + + dmcdelay(100000u); + + temp = readl(REG_MISC_REG10_tst_addr); + temp |= 0x1; + writel(temp, REG_MISC_REG10_tst_addr); + + temp = readl(REG_MISC_REG10_tst_addr); + temp |= 0x800; + writel(temp, REG_MISC_REG10_tst_addr); +#endif +} + +static void Active_To_Fullon(const struct CGU_Settings *pCGU) +{ + u32 tmp; + + while (1) { + tmp = readl(pCGU->rbase + CGU_STAT); + if ((tmp & BITM_CGU_STAT_PLLEN) && + (tmp & BITM_CGU_STAT_PLLBP)) + break; + } + + writel(BITM_CGU_PLLCTL_PLLBPCL, pCGU->rbase + CGU_PLLCTL); + + while (1) { + tmp = readl(pCGU->rbase + CGU_STAT); + if ((tmp & BITM_CGU_STAT_PLLEN) && + ~(tmp & BITM_CGU_STAT_PLLBP) && + ~(tmp & BITM_CGU_STAT_CLKSALGN)) + break; + } +} + +static void CGU_Init(const struct CGU_Settings *pCGU) +{ + const uintptr_t b = pCGU->rbase; + +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + if (readl(b + CGU_STAT) & BITM_CGU_STAT_PLLEN) + writel(BITM_CGU_PLLCTL_PLLEN, b + CGU_PLLCTL); + + dmcdelay(1000); +#endif + + /* Check if processor is in Active mode */ + if (readl(b + CGU_STAT) & BITM_CGU_STAT_PLLBP) + Active_To_Fullon(pCGU); + +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + dmcdelay(1000); +#endif + + program_cgu(pCGU); +} + +void cgu_init(void) +{ + const struct CGU_Settings dividers0 = { + .rbase = CGU0_REGBASE, + .ctl_MSEL = CONFIG_CGU0_VCO_MULT, + .ctl_DF = CONFIG_CGU0_DF_DIV, + .div_CSEL = CONFIG_CGU0_CCLK_DIV, + .div_SYSSEL = CONFIG_CGU0_SCLK_DIV, + .div_S0SEL = VAL_CGU0_SCLK0_DIV, + .div_S1SEL = VAL_CGU0_SCLK1_DIV, + .div_DSEL = CONFIG_CGU0_DCLK_DIV, + .div_OSEL = CONFIG_CGU0_OCLK_DIV, + .divex_S0SELEX = VAL_CGU0_DIV_S0SELEX, + .divex_S1SELEX = VAL_CGU0_DIV_S1SELEX, + .clkoutsel = VAL_CGU0_CLKOUTSEL, + }; + const struct CGU_Settings dividers1 = { + .rbase = CGU1_REGBASE, + .ctl_MSEL = CONFIG_CGU1_VCO_MULT, + .ctl_DF = CONFIG_CGU1_DF_DIV, + .div_CSEL = CONFIG_CGU1_CCLK_DIV, + .div_SYSSEL = CONFIG_CGU1_SCLK_DIV, + .div_S0SEL = VAL_CGU1_SCLK0_DIV, + .div_S1SEL = VAL_CGU1_SCLK1_DIV, + .div_DSEL = CONFIG_CGU1_DCLK_DIV, + .div_OSEL = CONFIG_CGU1_OCLK_DIV, + .divex_S0SELEX = VAL_CGU1_DIV_S0SELEX, + .divex_S1SELEX = VAL_CGU1_DIV_S1SELEX, + .clkoutsel = VAL_CGU1_CLKOUTSEL, + }; + + CGU_Init(÷rs0); + CGU_Init(÷rs1); +} + +#define CONFIGURE_CDU0(a, b, c) \ + writel(a, b); \ + while (readl(REG_CDU0_STAT) & (1 << (c))) + +void cdu_init(void) +{ + while (readl(REG_CDU0_STAT) & 0xffff) + ; + writel((CONFIG_CDU0_CGU1_CLKIN & 0x1), REG_CDU0_CLKINSEL); + + CONFIGURE_CDU0(CONFIG_CDU0_CLKO0, REG_CDU0_CFG0, 0); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO1, REG_CDU0_CFG1, 1); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO2, REG_CDU0_CFG2, 2); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO3, REG_CDU0_CFG3, 3); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO4, REG_CDU0_CFG4, 4); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO5, REG_CDU0_CFG5, 5); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO6, REG_CDU0_CFG6, 6); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO7, REG_CDU0_CFG7, 7); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO8, REG_CDU0_CFG8, 8); + CONFIGURE_CDU0(CONFIG_CDU0_CLKO9, REG_CDU0_CFG9, 9); +#ifdef CONFIG_CDU0_CLKO10 + CONFIGURE_CDU0(CONFIG_CDU0_CLKO10, REG_CDU0_CFG10, 10); +#endif +#ifdef CONFIG_CDU0_CLKO12 + CONFIGURE_CDU0(CONFIG_CDU0_CLKO12, REG_CDU0_CFG12, 12); +#endif +#ifdef CONFIG_CDU0_CLKO13 + CONFIGURE_CDU0(CONFIG_CDU0_CLKO13, REG_CDU0_CFG13, 13); +#endif +#ifdef CONFIG_CDU0_CLKO14 + CONFIGURE_CDU0(CONFIG_CDU0_CLKO14, REG_CDU0_CFG14, 14); +#endif +} + +void clks_init(void) +{ + adi_dmc_reset_lanes(true); + + cdu_init(); + cgu_init(); + + adi_config_third_pll(); + + adi_dmc_reset_lanes(false); +} diff --git a/arch/arm/mach-sc5xx/init/clkinit.h b/arch/arm/mach-sc5xx/init/clkinit.h new file mode 100644 index 00000000000..b05f4325bfc --- /dev/null +++ b/arch/arm/mach-sc5xx/init/clkinit.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#ifndef CLKINIT_H_ +#define CLKINIT_H_ + +void clks_init(void); + +void dmcdelay(uint32_t delay); + +#endif diff --git a/arch/arm/mach-sc5xx/init/dmcinit.c b/arch/arm/mach-sc5xx/init/dmcinit.c new file mode 100644 index 00000000000..e375b5c9dfa --- /dev/null +++ b/arch/arm/mach-sc5xx/init/dmcinit.c @@ -0,0 +1,954 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#include +#include +#include +#include "clkinit.h" +#include "dmcinit.h" + +#define REG_DMC0_BASE 0x31070000 +#define REG_DMC1_BASE 0x31073000 + +#define REG_DMC_CTL 0x0004 // Control Register +#define REG_DMC_STAT 0x0008 // Status Register +#define REG_DMC_CFG 0x0040 // Configuration Register +#define REG_DMC_TR0 0x0044 // Timing 0 Register +#define REG_DMC_TR1 0x0048 // Timing 1 Register +#define REG_DMC_TR2 0x004C // Timing 2 Register +#define REG_DMC_MR 0x0060 // Shadow MR Register (DDR3) +#define REG_DMC_EMR1 0x0064 // Shadow EMR1 Register +#define REG_DMC_EMR2 0x0068 // Shadow EMR2 Register +#define REG_DMC_EMR3 0x006C +#define REG_DMC_DLLCTL 0x0080 // DLL Control Register +#define REG_DMC_DT_CALIB_ADDR 0x0090 // Data Calibration Address Register +#define REG_DMC_CPHY_CTL 0x01C0 // Controller to PHY Interface Register + +/* SC57x && SC58x DMC REGs */ +#define REG_DMC_PHY_CTL0 0x1000 // PHY Control 0 Register +#define REG_DMC_PHY_CTL1 0x1004 // PHY Control 1 Register +#define REG_DMC_PHY_CTL2 0x1008 // PHY Control 2 Register +#define REG_DMC_PHY_CTL3 0x100c // PHY Control 3 Register +#define REG_DMC_PHY_CTL4 0x1010 // PHY Control 4 Register +#define REG_DMC_CAL_PADCTL0 0x1034 // CALIBRATION PAD CTL 0 Register +#define REG_DMC_CAL_PADCTL2 0x103C // CALIBRATION PAD CTL2 Register +/* END */ + +/* SC59x DMC REGs */ +#define REG_DMC_DDR_LANE0_CTL0 0x1000 // Data Lane 0 Control Register 0 +#define REG_DMC_DDR_LANE0_CTL1 0x1004 // Data Lane 0 Control Register 1 +#define REG_DMC_DDR_LANE1_CTL0 0x100C // Data Lane 1 Control Register 0 +#define REG_DMC_DDR_LANE1_CTL1 0x1010 // Data Lane 1 Control Register 1 +#define REG_DMC_DDR_ROOT_CTL 0x1018 // DDR ROOT Module Control Register +#define REG_DMC_DDR_ZQ_CTL0 0x1034 // DDR Calibration Control Register 0 +#define REG_DMC_DDR_ZQ_CTL1 0x1038 // DDR Calibration Control Register 1 +#define REG_DMC_DDR_ZQ_CTL2 0x103C // DDR Calibration Control Register 2 +#define REG_DMC_DDR_CA_CTL 0x1068 // DDR CA Lane Control Register +/* END */ + +#define REG_DMC_DDR_SCRATCH_2 0x1074 +#define REG_DMC_DDR_SCRATCH_3 0x1078 +#define REG_DMC_DDR_SCRATCH_6 0x1084 +#define REG_DMC_DDR_SCRATCH_7 0x1088 + +#define REG_DMC_DDR_SCRATCH_STAT0 0x107C +#define REG_DMC_DDR_SCRATCH_STAT1 0x1080 + +#define DMC0_DATA_CALIB_ADD 0x80000000 +#define DMC1_DATA_CALIB_ADD 0xC0000000 + +#define BITM_DMC_CFG_EXTBANK 0x0000F000 /* External Banks */ +#define ENUM_DMC_CFG_EXTBANK1 0x00000000 /* EXTBANK: 1 External Bank */ +#define BITM_DMC_CFG_SDRSIZE 0x00000F00 /* SDRAM Size */ +#define ENUM_DMC_CFG_SDRSIZE64 0x00000000 /* SDRSIZE: 64M Bit SDRAM (LPDDR Only) */ +#define ENUM_DMC_CFG_SDRSIZE128 0x00000100 /* SDRSIZE: 128M Bit SDRAM (LPDDR Only) */ +#define ENUM_DMC_CFG_SDRSIZE256 0x00000200 /* SDRSIZE: 256M Bit SDRAM */ +#define ENUM_DMC_CFG_SDRSIZE512 0x00000300 /* SDRSIZE: 512M Bit SDRAM */ +#define ENUM_DMC_CFG_SDRSIZE1G 0x00000400 /* SDRSIZE: 1G Bit SDRAM */ +#define ENUM_DMC_CFG_SDRSIZE2G 0x00000500 /* SDRSIZE: 2G Bit SDRAM */ +#define ENUM_DMC_CFG_SDRSIZE4G 0x00000600 /* SDRSIZE: 4G Bit SDRAM */ +#define ENUM_DMC_CFG_SDRSIZE8G 0x00000700 /* SDRSIZE: 8G Bit SDRAM */ +#define BITM_DMC_CFG_SDRWID 0x000000F0 /* SDRAM Width */ +#define ENUM_DMC_CFG_SDRWID16 0x00000020 /* SDRWID: 16-Bit Wide SDRAM */ +#define BITM_DMC_CFG_IFWID 0x0000000F /* Interface Width */ +#define ENUM_DMC_CFG_IFWID16 0x00000002 /* IFWID: 16-Bit Wide Interface */ + +#define BITM_DMC_CTL_DDR3EN 0x00000001 +#define BITM_DMC_CTL_INIT 0x00000004 +#define BITP_DMC_STAT_INITDONE 2 /* Initialization Done */ +#define BITM_DMC_STAT_INITDONE 0x00000004 + +#define BITP_DMC_CTL_AL_EN 27 +#define BITP_DMC_CTL_ZQCL 25 /* ZQ Calibration Long */ +#define BITP_DMC_CTL_ZQCS 24 /* ZQ Calibration Short */ +#define BITP_DMC_CTL_DLLCAL 13 /* DLL Calibration Start */ +#define BITP_DMC_CTL_PPREF 12 /* Postpone Refresh */ +#define BITP_DMC_CTL_RDTOWR 9 /* Read-to-Write Cycle */ +#define BITP_DMC_CTL_ADDRMODE 8 /* Addressing (Page/Bank) Mode */ +#define BITP_DMC_CTL_RESET 7 /* Reset SDRAM */ +#define BITP_DMC_CTL_PREC 6 /* Precharge */ +#define BITP_DMC_CTL_DPDREQ 5 /* Deep Power Down Request */ +#define BITP_DMC_CTL_PDREQ 4 /* Power Down Request */ +#define BITP_DMC_CTL_SRREQ 3 /* Self Refresh Request */ +#define BITP_DMC_CTL_INIT 2 /* Initialize DRAM Start */ +#define BITP_DMC_CTL_LPDDR 1 /* Low Power DDR Mode */ +#define BITP_DMC_CTL_DDR3EN 0 /* DDR3 Mode */ + +#ifdef CONFIG_TARGET_SC584_EZKIT + #define DMC_PADCTL2_VALUE 0x0078283C +#elif CONFIG_TARGET_SC573_EZKIT + #define DMC_PADCTL2_VALUE 0x00782828 +#elif CONFIG_TARGET_SC589_MINI || CONFIG_TARGET_SC589_EZKIT + #define DMC_PADCTL2_VALUE 0x00783C3C +#elif defined(CONFIG_SC57X) || defined(CONFIG_SC58X) + #error "PADCTL2 not specified for custom board!" +#else + //Newer DMC. Legacy calibration obsolete + #define DMC_PADCTL2_VALUE 0x0 +#endif + +#define DMC_CPHYCTL_VALUE 0x0000001A + +#define BITP_DMC_MR1_QOFF 12 /* Output Buffer Enable */ +#define BITP_DMC_MR1_TDQS 11 /* Termination Data Strobe */ +#define BITP_DMC_MR1_RTT2 9 /* Rtt_nom */ +#define BITP_DMC_MR1_WL 7 /* Write Leveling Enable. */ +#define BITP_DMC_MR1_RTT1 6 /* Rtt_nom */ +#define BITP_DMC_MR1_DIC1 5 /* Output Driver Impedance Control */ +#define BITP_DMC_MR1_AL 3 /* Additive Latency */ +#define BITP_DMC_MR1_RTT0 2 /* Rtt_nom */ +#define BITP_DMC_MR1_DIC0 1 /* Output Driver Impedance control */ +#define BITP_DMC_MR1_DLLEN 0 /* DLL Enable */ + +#define BITP_DMC_MR2_CWL 3 /* CAS write Latency */ + +#define BITP_DMC_TR0_TMRD 28 /* Timing Mode Register Delay */ +#define BITP_DMC_TR0_TRC 20 /* Timing Row Cycle */ +#define BITP_DMC_TR0_TRAS 12 /* Timing Row Active Time */ +#define BITP_DMC_TR0_TRP 8 /* Timing RAS Precharge. */ +#define BITP_DMC_TR0_TWTR 4 /* Timing Write to Read */ +#define BITP_DMC_TR0_TRCD 0 /* Timing RAS to CAS Delay */ + +#define BITP_DMC_TR1_TRRD 28 /* Timing Read-Read Delay */ +#define BITP_DMC_TR1_TRFC 16 /* Timing Refresh-to-Command */ +#define BITP_DMC_TR1_TREF 0 /* Timing Refresh Interval */ + +#define BITP_DMC_TR2_TCKE 20 /* Timing Clock Enable */ +#define BITP_DMC_TR2_TXP 16 /* Timing Exit Powerdown */ +#define BITP_DMC_TR2_TWR 12 /* Timing Write Recovery */ +#define BITP_DMC_TR2_TRTP 8 /* Timing Read-to-Precharge */ +#define BITP_DMC_TR2_TFAW 0 /* Timing Four-Activated-Window */ + +#define BITP_DMC_MR_PD 12 /* Active Powerdown Mode */ +#define BITP_DMC_MR_WRRECOV 9 /* Write Recovery */ +#define BITP_DMC_MR_DLLRST 8 /* DLL Reset */ +#define BITP_DMC_MR_CL 4 /* CAS Latency */ +#define BITP_DMC_MR_CL0 2 /* CAS Latency */ +#define BITP_DMC_MR_BLEN 0 /* Burst Length */ + +#define BITP_DMC_DLLCTL_DATACYC 8 /* Data Cycles */ +#define BITP_DMC_DLLCTL_DLLCALRDCNT 0 /* DLL Calibration RD Count */ + +#define BITM_DMC_DLLCTL_DATACYC 0x00000F00 /* Data Cycles */ +#define BITM_DMC_DLLCTL_DLLCALRDCNT 0x000000FF /* DLL Calib RD Count */ + +#define BITP_DMC_STAT_PHYRDPHASE 20 /* PHY Read Phase */ + +#define BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT 0x08000000 /* Rst Data Pads */ +#define BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT 0x08000000 /* Rst Data Pads */ +#define BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE 0x00000002 /* Compute Dcycle */ +#define BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE 0x00000002 /* Compute Dcycle */ +#define BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL 0x00000100 /* Rst Lane DLL */ +#define BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL 0x00000100 /* Rst Lane DLL */ +#define BITP_DMC_DDR_ROOT_CTL_PIPE_OFSTDCYCLE 10 /* Pipeline offset for PHYC_DATACYCLE */ +#define BITM_DMC_DDR_ROOT_CTL_SW_REFRESH 0x00002000 /* Refresh Lane DLL Code */ +#define BITM_DMC_DDR_CA_CTL_SW_REFRESH 0x00004000 /* Refresh Lane DLL Code */ + +#define BITP_DMC_CTL_RL_DQS 26 /* RL_DQS */ +#define BITM_DMC_CTL_RL_DQS 0x04000000 /* RL_DQS */ +#define BITP_DMC_EMR3_MPR 2 /* Multi Purpose Read Enable (Read Leveling)*/ +#define BITM_DMC_EMR3_MPR 0x00000004 /* Multi Purpose Read Enable (Read Leveling)*/ +#define BITM_DMC_MR1_WL 0x00000080 /* Write Leveling Enable.*/ +#define BITM_DMC_STAT_PHYRDPHASE 0x00F00000 /* PHY Read Phase */ + +#define BITP_DMC_DDR_LANE0_CTL1_BYPCODE 10 +#define BITM_DMC_DDR_LANE0_CTL1_BYPCODE 0x00007C00 +#define BITP_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN 15 +#define BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN 0x00008000 + +#define DMC_ZQCTL0_VALUE 0x00785A64 +#define DMC_ZQCTL1_VALUE 0 +#define DMC_ZQCTL2_VALUE 0x70000000 + +#define DMC_TRIG_CALIB 0 +#define DMC_OFSTDCYCLE 2 + +#define BITP_DMC_CAL_PADCTL0_RTTCALEN 31 /* RTT Calibration Enable */ +#define BITP_DMC_CAL_PADCTL0_PDCALEN 30 /* PULLDOWN Calib Enable */ +#define BITP_DMC_CAL_PADCTL0_PUCALEN 29 /* PULLUP Calib Enable */ +#define BITP_DMC_CAL_PADCTL0_CALSTRT 28 /* Start New Calib ( Hardware Cleared) */ +#define BITM_DMC_CAL_PADCTL0_RTTCALEN 0x80000000 /* RTT Calibration Enable */ +#define BITM_DMC_CAL_PADCTL0_PDCALEN 0x40000000 /* PULLDOWN Calib Enable */ +#define BITM_DMC_CAL_PADCTL0_PUCALEN 0x20000000 /* PULLUP Calib Enable */ +#define BITM_DMC_CAL_PADCTL0_CALSTRT 0x10000000 /* Start New Calib ( Hardware Cleared) */ +#define ENUM_DMC_PHY_CTL4_DDR3 0x00000000 /* DDRMODE: DDR3 Mode */ +#define ENUM_DMC_PHY_CTL4_DDR2 0x00000001 /* DDRMODE: DDR2 Mode */ +#define ENUM_DMC_PHY_CTL4_LPDDR 0x00000003 /* DDRMODE: LPDDR Mode */ + +#define BITP_DMC_DDR_ZQ_CTL0_IMPRTT 16 /* Data/DQS ODT */ +#define BITP_DMC_DDR_ZQ_CTL0_IMPWRDQ 8 /* Data/DQS/DM/CLK Drive Strength */ +#define BITP_DMC_DDR_ZQ_CTL0_IMPWRADD 0 /* Address/Command Drive Strength */ +#define BITM_DMC_DDR_ZQ_CTL0_IMPRTT 0x00FF0000 /* Data/DQS ODT */ +#define BITM_DMC_DDR_ZQ_CTL0_IMPWRDQ 0x0000FF00 /* Data/DQS/DM/CLK Drive Strength */ +#define BITM_DMC_DDR_ZQ_CTL0_IMPWRADD 0x000000FF /* Address/Command Drive Strength */ + +#define BITM_DMC_DDR_ROOT_CTL_TRIG_RD_XFER_ALL 0x00200000 /* All Lane Read Status */ + +#if defined(CONFIG_ADI_USE_DDR2) + #define DMC_MR0_VALUE \ + ((DMC_BL / 4 + 1) << BITP_DMC_MR_BLEN) | \ + (DMC_CL << BITP_DMC_MR_CL) | \ + (DMC_WRRECOV << BITP_DMC_MR_WRRECOV) + + #define DMC_MR1_VALUE \ + (DMC_MR1_AL << BITP_DMC_MR1_AL | 0x04) \ + + #define DMC_MR2_VALUE 0 + #define DMC_MR3_VALUE 0 + + #define DMC_CTL_VALUE \ + (DMC_RDTOWR << BITP_DMC_CTL_RDTOWR) | \ + (1 << BITP_DMC_CTL_DLLCAL) | \ + (BITM_DMC_CTL_INIT) +#else + #define DMC_MR0_VALUE \ + (0 << BITP_DMC_MR_BLEN) | \ + (DMC_CL0 << BITP_DMC_MR_CL0) | \ + (DMC_CL123 << BITP_DMC_MR_CL) | \ + (DMC_WRRECOV << BITP_DMC_MR_WRRECOV) | \ + (1 << BITP_DMC_MR_DLLRST) + + #define DMC_MR1_VALUE \ + (DMC_MR1_DLLEN << BITP_DMC_MR1_DLLEN) | \ + (DMC_MR1_DIC0 << BITP_DMC_MR1_DIC0) | \ + (DMC_MR1_RTT0 << BITP_DMC_MR1_RTT0) | \ + (DMC_MR1_AL << BITP_DMC_MR1_AL) | \ + (DMC_MR1_DIC1 << BITP_DMC_MR1_DIC1) | \ + (DMC_MR1_RTT1 << BITP_DMC_MR1_RTT1) | \ + (DMC_MR1_RTT2 << BITP_DMC_MR1_RTT2) | \ + (DMC_MR1_WL << BITP_DMC_MR1_WL) | \ + (DMC_MR1_TDQS << BITP_DMC_MR1_TDQS) | \ + (DMC_MR1_QOFF << BITP_DMC_MR1_QOFF) + + #define DMC_MR2_VALUE \ + ((DMC_WL) << BITP_DMC_MR2_CWL) + + #define DMC_MR3_VALUE \ + ((DMC_WL) << BITP_DMC_MR2_CWL) + + #define DMC_CTL_VALUE \ + (DMC_RDTOWR << BITP_DMC_CTL_RDTOWR) | \ + (BITM_DMC_CTL_INIT) | \ + (BITM_DMC_CTL_DDR3EN) | \ + (DMC_CTL_AL_EN << BITP_DMC_CTL_AL_EN) +#endif + +#define DMC_DLLCTL_VALUE \ + (DMC_DATACYC << BITP_DMC_DLLCTL_DATACYC) | \ + (DMC_DLLCALRDCNT << BITP_DMC_DLLCTL_DLLCALRDCNT) + +#define DMC_CFG_VALUE \ + ENUM_DMC_CFG_IFWID16 | \ + ENUM_DMC_CFG_SDRWID16 | \ + SDR_CHIP_SIZE | \ + ENUM_DMC_CFG_EXTBANK1 + +#define DMC_TR0_VALUE \ + (DMC_TRCD << BITP_DMC_TR0_TRCD) | \ + (DMC_TWTR << BITP_DMC_TR0_TWTR) | \ + (DMC_TRP << BITP_DMC_TR0_TRP) | \ + (DMC_TRAS << BITP_DMC_TR0_TRAS) | \ + (DMC_TRC << BITP_DMC_TR0_TRC) | \ + (DMC_TMRD << BITP_DMC_TR0_TMRD) + +#define DMC_TR1_VALUE \ + (DMC_TREF << BITP_DMC_TR1_TREF) | \ + (DMC_TRFC << BITP_DMC_TR1_TRFC) | \ + (DMC_TRRD << BITP_DMC_TR1_TRRD) + +#define DMC_TR2_VALUE \ + (DMC_TFAW << BITP_DMC_TR2_TFAW) | \ + (DMC_TRTP << BITP_DMC_TR2_TRTP) | \ + (DMC_TWR << BITP_DMC_TR2_TWR) | \ + (DMC_TXP << BITP_DMC_TR2_TXP) | \ + (DMC_TCKE << BITP_DMC_TR2_TCKE) + +enum DDR_MODE { + DDR3_MODE, + DDR2_MODE, + LPDDR_MODE, +}; + +enum CALIBRATION_MODE { + CALIBRATION_LEGACY, + CALIBRATION_METHOD1, + CALIBRATION_METHOD2, +}; + +static struct dmc_param { + phys_addr_t reg; + u32 ddr_mode; + u32 padctl2_value; + u32 dmc_cphyctl_value; + u32 dmc_cfg_value; + u32 dmc_dllctl_value; + u32 dmc_ctl_value; + u32 dmc_tr0_value; + u32 dmc_tr1_value; + u32 dmc_tr2_value; + u32 dmc_mr0_value; + u32 dmc_mr1_value; + u32 dmc_mr2_value; + u32 dmc_mr3_value; + u32 dmc_zqctl0_value; + u32 dmc_zqctl1_value; + u32 dmc_zqctl2_value; + u32 dmc_data_calib_add_value; + bool phy_init_required; + bool anomaly_20000037_applicable; + enum CALIBRATION_MODE calib_mode; +} dmc; + +#ifdef CONFIG_SC59X_64 +#define DQS_DEFAULT_DELAY 3ul + +#define DELAYTRIM 1 +#define LANE0_DQS_DELAY 1 +#define LANE1_DQS_DELAY 1 + +#define CLKDIR 0ul + +#define DQSTRIM 0 +#define DQSCODE 0ul + +#define CLKTRIM 0 +#define CLKCODE 0ul +#endif + +static inline void calibration_legacy(void) +{ + u32 temp; + + /* 1. Set DDR mode to DDR3/DDR2/LPDDR in DMCx_PHY_CTL4 register */ + if (dmc.ddr_mode == DDR3_MODE) + writel(ENUM_DMC_PHY_CTL4_DDR3, dmc.reg + REG_DMC_PHY_CTL4); + else if (dmc.ddr_mode == DDR2_MODE) + writel(ENUM_DMC_PHY_CTL4_DDR2, dmc.reg + REG_DMC_PHY_CTL4); + else if (dmc.ddr_mode == LPDDR_MODE) + writel(ENUM_DMC_PHY_CTL4_LPDDR, dmc.reg + REG_DMC_PHY_CTL4); + + /* + * 2. Make sure that the bits 6, 7, 25, and 27 of the DMC_PHY_ + * CTL3 register are set + */ + writel(0x0A0000C0, dmc.reg + REG_DMC_PHY_CTL3); + + /* + * 3. For DDR2/DDR3 mode, make sure that the bits 0, 1, 2, 3 of + * the DMC_PHY_CTL0 register and the bits 26, 27, 28, 29, 30, 31 + * of the DMC_PHY_CTL2 are set. + */ + if (dmc.ddr_mode == DDR3_MODE || + dmc.ddr_mode == DDR2_MODE) { + writel(0XFC000000, dmc.reg + REG_DMC_PHY_CTL2); + writel(0x0000000f, dmc.reg + REG_DMC_PHY_CTL0); + } + + writel(0x00000000, dmc.reg + REG_DMC_PHY_CTL1); + + /* 4. For DDR3 mode, set bit 1 and configure bits [5:2] of the + * DMC_CPHY_CTL register with WL=CWL+AL in DCLK cycles. + */ + if (dmc.ddr_mode == DDR3_MODE) + writel(dmc.dmc_cphyctl_value, dmc.reg + REG_DMC_CPHY_CTL); + /* 5. Perform On Die Termination(ODT) & Driver Impedance Calibration */ + if (dmc.ddr_mode == LPDDR_MODE) { + /* Bypass processor ODT */ + writel(0x80000, dmc.reg + REG_DMC_PHY_CTL1); + } else { + /* Set bits RTTCALEN, PDCALEN, PUCALEN of register */ + temp = BITM_DMC_CAL_PADCTL0_RTTCALEN | + BITM_DMC_CAL_PADCTL0_PDCALEN | + BITM_DMC_CAL_PADCTL0_PUCALEN; + writel(temp, dmc.reg + REG_DMC_CAL_PADCTL0); + /* Configure ODT and drive impedance values in the + * DMCx_CAL_PADCTL2 register + */ + writel(dmc.padctl2_value, dmc.reg + REG_DMC_CAL_PADCTL2); + /* start calibration */ + temp |= BITM_DMC_CAL_PADCTL0_CALSTRT; + writel(temp, dmc.reg + REG_DMC_CAL_PADCTL0); + /* Wait for PAD calibration to complete - 300 DCLK cycle. + * Worst case: CCLK=450 MHz, DCLK=125 MHz + */ + dmcdelay(300); + } +} + +static inline void calibration_method1(void) +{ +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + writel(dmc.dmc_zqctl0_value, dmc.reg + REG_DMC_DDR_ZQ_CTL0); + writel(dmc.dmc_zqctl1_value, dmc.reg + REG_DMC_DDR_ZQ_CTL1); + writel(dmc.dmc_zqctl2_value, dmc.reg + REG_DMC_DDR_ZQ_CTL2); + + /* Generate the trigger */ + writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + writel(0x00010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(8000u); + + /* The [31:26] bits may change if pad ring changes */ + writel(0x0C000001ul | DMC_TRIG_CALIB, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(8000u); + writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); +#endif +} + +static inline void calibration_method2(void) +{ +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + u32 stat_value = 0x0u; + u32 drv_pu, drv_pd, odt_pu, odt_pd; + u32 ro_dt, clk_dqs_drv_impedance; + u32 temp; + + /* Reset trigger */ + writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); + + /* Writing internal registers in calib pad to zero. Calib mode set + * to 1 [26], trig M1 S1 write [16], this enables usage of scratch + * registers instead of ZQCTL registers + */ + writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + + /* TRIGGER FOR M2-S2 WRITE -> slave id 31:26 trig m2,s2 write + * bit 1->1 slave1 address is 4 + */ + writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + + /* reset Trigger */ + writel(0x0u, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0x0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); + + /* write to slave 1, make the power down bit high */ + writel(0x1ul << 12, dmc.reg + REG_DMC_DDR_SCRATCH_3); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); + dmcdelay(2500u); + + /* Calib mode set to 1 [26], trig M1 S1 write [16] */ + writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + + writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + + writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + writel(0x0, dmc.reg + REG_DMC_DDR_SCRATCH_3); + + /* for slave 0 */ + writel(dmc.dmc_zqctl0_value, dmc.reg + REG_DMC_DDR_SCRATCH_2); + + /* Calib mode set to 1 [26], trig M1 S1 write [16] */ + writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + + writel(0x0C000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + + writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + + /* writing to slave 1 + * calstrt is 0, but other programming is done + * + * make power down LOW again, to kickstart BIAS circuit + */ + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); + writel(0x30000000ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); + + /* write to ca_ctl lane, calib mode set to 1 [26], + * trig M1 S1 write [16] + */ + writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + + /* copies data to lane controller slave + * TRIGGER FOR M2-S2 WRITE -> slave id 31:26 + * trig m2,s2 write bit 1->1 + * slave1 address is 4 + */ + writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + + /* reset Trigger */ + writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); + writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + writel(0x0ul, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); + writel(0x0ul, dmc.reg + REG_DMC_DDR_SCRATCH_3); + writel(0x50000000ul, dmc.reg + REG_DMC_DDR_SCRATCH_2); + writel(0x04010000ul, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + writel(0x10000002ul, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); + writel(0x0C000004u, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + writel(BITM_DMC_DDR_ROOT_CTL_TRIG_RD_XFER_ALL, + dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); + // calculate ODT PU and PD values + stat_value = ((readl(dmc.reg + REG_DMC_DDR_SCRATCH_7) & 0x0000FFFFu) << + 16); + stat_value |= ((readl(dmc.reg + REG_DMC_DDR_SCRATCH_6) & 0xFFFF0000u) >> + 16); + clk_dqs_drv_impedance = ((dmc.dmc_zqctl0_value) & + BITM_DMC_DDR_ZQ_CTL0_IMPWRDQ) >> BITP_DMC_DDR_ZQ_CTL0_IMPWRDQ; + ro_dt = ((dmc.dmc_zqctl0_value) & BITM_DMC_DDR_ZQ_CTL0_IMPRTT) >> + BITP_DMC_DDR_ZQ_CTL0_IMPRTT; + drv_pu = stat_value & 0x0000003Fu; + drv_pd = (stat_value >> 12) & 0x0000003Fu; + odt_pu = (drv_pu * clk_dqs_drv_impedance) / ro_dt; + odt_pd = (drv_pd * clk_dqs_drv_impedance) / ro_dt; + temp = ((1uL << 24) | + ((drv_pd & 0x0000003Fu)) | + ((odt_pd & 0x0000003Fu) << 6) | + ((drv_pu & 0x0000003Fu) << 12) | + ((odt_pu & 0x0000003Fu) << 18)); + temp |= readl(dmc.reg + REG_DMC_DDR_SCRATCH_2); + writel(temp, dmc.reg + REG_DMC_DDR_SCRATCH_2); + writel(0x0C010000u, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + writel(0x08000002u, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); + writel(0x04010000u, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + writel(0x80000002u, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(2500u); + writel(0u, dmc.reg + REG_DMC_DDR_CA_CTL); + writel(0u, dmc.reg + REG_DMC_DDR_ROOT_CTL); +#endif +} + +static inline void adi_dmc_lane_reset(bool reset, uint32_t dmc_no) +{ +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + u32 temp; + phys_addr_t base = (dmc_no == 0) ? REG_DMC0_BASE : REG_DMC1_BASE; + phys_addr_t ln0 = base + REG_DMC_DDR_LANE0_CTL0; + phys_addr_t ln1 = base + REG_DMC_DDR_LANE1_CTL0; + + if (reset) { + temp = readl(ln0); + temp |= BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL; + writel(temp, ln0); + + temp = readl(ln1); + temp |= BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL; + writel(temp, ln1); + } else { + temp = readl(ln0); + temp &= ~BITM_DMC_DDR_LANE0_CTL0_CB_RSTDLL; + writel(temp, ln0); + + temp = readl(ln1); + temp &= ~BITM_DMC_DDR_LANE1_CTL0_CB_RSTDLL; + writel(temp, ln1); + } + dmcdelay(9000u); +#endif +} + +void adi_dmc_reset_lanes(bool reset) +{ + if (!IS_ENABLED(CONFIG_ADI_USE_DDR2)) { + if (IS_ENABLED(CONFIG_SC59X) || IS_ENABLED(CONFIG_SC59X_64)) { + if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) + adi_dmc_lane_reset(reset, 0); + if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) + adi_dmc_lane_reset(reset, 1); + } + else { + u32 temp = reset ? 0x800 : 0x0; + + if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) + writel(temp, REG_DMC0_BASE + REG_DMC_PHY_CTL0); + if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) + writel(temp, REG_DMC1_BASE + REG_DMC_PHY_CTL0); + } + } +} + +static inline void dmc_controller_init(void) +{ +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + u32 phyphase, rd_cnt, t_EMR1, t_EMR3, t_CTL, data_cyc, temp; +#endif + + /* 1. Program the DMC controller registers: DMCx_CFG, DMCx_TR0, + * DMCx_TR1, DMCx_TR2, DMCx_MR(DDR2/LPDDR)/DMCx_MR0(DDR3), + * DMCx_EMR1(DDR2)/DMCx_MR1(DDR3), + * DMCx_EMR2(DDR2)/DMCx_EMR(LPDDR)/DMCx_MR2(DDR3) + */ + writel(dmc.dmc_cfg_value, dmc.reg + REG_DMC_CFG); + writel(dmc.dmc_tr0_value, dmc.reg + REG_DMC_TR0); + writel(dmc.dmc_tr1_value, dmc.reg + REG_DMC_TR1); + writel(dmc.dmc_tr2_value, dmc.reg + REG_DMC_TR2); + writel(dmc.dmc_mr0_value, dmc.reg + REG_DMC_MR); + writel(dmc.dmc_mr1_value, dmc.reg + REG_DMC_EMR1); + writel(dmc.dmc_mr2_value, dmc.reg + REG_DMC_EMR2); + +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + writel(dmc.dmc_mr3_value, dmc.reg + REG_DMC_EMR3); + writel(dmc.dmc_dllctl_value, dmc.reg + REG_DMC_DLLCTL); + dmcdelay(2000u); + + temp = readl(dmc.reg + REG_DMC_DDR_CA_CTL); + temp |= BITM_DMC_DDR_CA_CTL_SW_REFRESH; + writel(temp, dmc.reg + REG_DMC_DDR_CA_CTL); + dmcdelay(5u); + + temp = readl(dmc.reg + REG_DMC_DDR_ROOT_CTL); + temp |= BITM_DMC_DDR_ROOT_CTL_SW_REFRESH | + (DMC_OFSTDCYCLE << BITP_DMC_DDR_ROOT_CTL_PIPE_OFSTDCYCLE); + writel(temp, dmc.reg + REG_DMC_DDR_ROOT_CTL); +#endif + + /* 2. Make sure that the REG_DMC_DT_CALIB_ADDR register is programmed + * to an unused DMC location corresponding to a burst of 16 bytes + * (by default it is the starting address of the DMC address range). + */ +#ifndef CONFIG_SC59X + writel(dmc.dmc_data_calib_add_value, dmc.reg + REG_DMC_DT_CALIB_ADDR); +#endif + /* 3. Program the DMCx_CTL register with INIT bit set to start + * the DMC initialization sequence + */ + writel(dmc.dmc_ctl_value, dmc.reg + REG_DMC_CTL); + /* 4. Wait for the DMC initialization to complete by polling + * DMCx_STAT.INITDONE bit. + */ + +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + dmcdelay(722000u); + + /* Add necessary delay depending on the configuration */ + t_EMR1 = (dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL; + + dmcdelay(600u); + if (t_EMR1 != 0u) + while ((readl(dmc.reg + REG_DMC_EMR1) & BITM_DMC_MR1_WL) != 0) + ; + + t_EMR3 = (dmc.dmc_mr3_value & BITM_DMC_EMR3_MPR) >> + BITP_DMC_EMR3_MPR; + dmcdelay(2000u); + if (t_EMR3 != 0u) + while ((readl(dmc.reg + REG_DMC_EMR3) & BITM_DMC_EMR3_MPR) != 0) + ; + + t_CTL = (dmc.dmc_ctl_value & BITM_DMC_CTL_RL_DQS) >> BITP_DMC_CTL_RL_DQS; + dmcdelay(600u); + if (t_CTL != 0u) + while ((readl(dmc.reg + REG_DMC_CTL) & BITM_DMC_CTL_RL_DQS) != 0) + ; +#endif + + /* check if DMC initialization finished*/ + while ((readl(dmc.reg + REG_DMC_STAT) & BITM_DMC_STAT_INITDONE) == 0) + ; + +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + /* toggle DCYCLE */ + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); + temp |= BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE; + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); + temp |= BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE; + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); + + dmcdelay(10u); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); + temp &= (~BITM_DMC_DDR_LANE0_CTL1_COMP_DCYCLE); + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); + temp &= (~BITM_DMC_DDR_LANE1_CTL1_COMP_DCYCLE); + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); + + /* toggle RSTDAT */ + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); + temp |= BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT; + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); + temp &= (~BITM_DMC_DDR_LANE0_CTL0_CB_RSTDAT); + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); + temp |= BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT; + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); + temp &= (~BITM_DMC_DDR_LANE1_CTL0_CB_RSTDAT); + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); + + dmcdelay(2500u); + + /* Program phyphase*/ + phyphase = (readl(dmc.reg + REG_DMC_STAT) & + BITM_DMC_STAT_PHYRDPHASE) >> BITP_DMC_STAT_PHYRDPHASE; + data_cyc = (phyphase << BITP_DMC_DLLCTL_DATACYC) & + BITM_DMC_DLLCTL_DATACYC; + rd_cnt = dmc.dmc_dllctl_value; + rd_cnt <<= BITP_DMC_DLLCTL_DLLCALRDCNT; + rd_cnt &= BITM_DMC_DLLCTL_DLLCALRDCNT; + writel(rd_cnt | data_cyc, dmc.reg + REG_DMC_DLLCTL); + writel((dmc.dmc_ctl_value & (~BITM_DMC_CTL_INIT) & + (~BITM_DMC_CTL_RL_DQS)), dmc.reg + REG_DMC_CTL); + +#if DELAYTRIM + /* DQS delay trim*/ + u32 stat_value, WL_code_LDQS, WL_code_UDQS; + + /* For LDQS */ + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1) | (0x000000D0); + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); + dmcdelay(2500u); + writel(0x00400000, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + writel(0x0, dmc.reg + REG_DMC_DDR_ROOT_CTL); + stat_value = (readl(dmc.reg + REG_DMC_DDR_SCRATCH_STAT0) & + (0xFFFF0000)) >> 16; + WL_code_LDQS = (stat_value) & (0x0000001F); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); + temp &= ~(BITM_DMC_DDR_LANE0_CTL1_BYPCODE | + BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN); + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); + + /* If write leveling is enabled */ + if ((dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL) { + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); + temp |= (((WL_code_LDQS + LANE0_DQS_DELAY) << + BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & + BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | + BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); + } else { + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL1); + temp |= (((DQS_DEFAULT_DELAY + LANE0_DQS_DELAY) << + BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & + BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | + BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL1); + } + dmcdelay(2500u); + + /* For UDQS */ + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1) | (0x000000D0); + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); + dmcdelay(2500u); + writel(0x00800000, dmc.reg + REG_DMC_DDR_ROOT_CTL); + dmcdelay(2500u); + writel(0x0, dmc.reg + REG_DMC_DDR_ROOT_CTL); + stat_value = (readl(dmc.reg + REG_DMC_DDR_SCRATCH_STAT1) & + (0xFFFF0000)) >> 16; + WL_code_UDQS = (stat_value) & (0x0000001F); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); + temp &= ~(BITM_DMC_DDR_LANE0_CTL1_BYPCODE | + BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN); + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); + + /* If write leveling is enabled */ + if ((dmc.dmc_mr1_value & BITM_DMC_MR1_WL) >> BITP_DMC_MR1_WL) { + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); + temp |= (((WL_code_UDQS + LANE1_DQS_DELAY) << + BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & + BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | + BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); + } else { + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL1); + temp |= (((DQS_DEFAULT_DELAY + LANE1_DQS_DELAY) << + BITP_DMC_DDR_LANE0_CTL1_BYPCODE) & + BITM_DMC_DDR_LANE0_CTL1_BYPCODE) | + BITM_DMC_DDR_LANE0_CTL1_BYPDELCHAINEN; + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL1); + } + dmcdelay(2500u); +#endif + +#else + /* 5. Program the DMCx_CTL.DLLCTL register with 0x948 value + * (DATACYC=9, DLLCALRDCNT=72). + */ + writel(0x00000948, dmc.reg + REG_DMC_DLLCTL); +#endif + + /* 6. Workaround for anomaly#20000037 */ + if (dmc.anomaly_20000037_applicable) { + /* Perform dummy read to any DMC location */ + readl(0x80000000); + + writel(readl(dmc.reg + REG_DMC_PHY_CTL0) | 0x1000, + dmc.reg + REG_DMC_PHY_CTL0); + /* Clear DMCx_PHY_CTL0.RESETDAT bit */ + writel(readl(dmc.reg + REG_DMC_PHY_CTL0) & (~0x1000), + dmc.reg + REG_DMC_PHY_CTL0); + } +} + +static inline void dmc_init(void) +{ + /* PHY Calibration+Initialization */ + if (!dmc.phy_init_required) + goto out; + + switch (dmc.calib_mode) { + case CALIBRATION_LEGACY: + calibration_legacy(); + break; + case CALIBRATION_METHOD1: + calibration_method1(); + break; + case CALIBRATION_METHOD2: + calibration_method2(); + break; + } + +#if DQSTRIM + /* DQS duty trim */ + temp = readl(dmc.reg + REG_DMC_DDR_LANE0_CTL0); + temp |= ((DQSCODE) << BITP_DMC_DDR_LANE0_CTL0_BYPENB) & + (BITM_DMC_DDR_LANE1_CTL0_BYPENB | + BITM_DMC_DDR_LANE0_CTL0_BYPSELP | + BITM_DMC_DDR_LANE0_CTL0_BYPCODE); + writel(temp, dmc.reg + REG_DMC_DDR_LANE0_CTL0); + + temp = readl(dmc.reg + REG_DMC_DDR_LANE1_CTL0); + temp |= ((DQSCODE) << BITP_DMC_DDR_LANE1_CTL0_BYPENB) & + (BITM_DMC_DDR_LANE1_CTL1_BYPCODE | + BITM_DMC_DDR_LANE1_CTL0_BYPSELP | + BITM_DMC_DDR_LANE1_CTL0_BYPCODE); + writel(temp, dmc.reg + REG_DMC_DDR_LANE1_CTL0); +#endif + +#if CLKTRIM + /* Clock duty trim */ + temp = readl(dmc.reg + REG_DMC_DDR_CA_CTL); + temp |= (((CLKCODE << BITP_DMC_DDR_CA_CTL_BYPCODE1) & + BITM_DMC_DDR_CA_CTL_BYPCODE1) | + BITM_DMC_DDR_CA_CTL_BYPENB | + ((CLKDIR << BITP_DMC_DDR_CA_CTL_BYPSELP) & + BITM_DMC_DDR_CA_CTL_BYPSELP)); + writel(temp, dmc.reg + REG_DMC_DDR_CA_CTL); +#endif + +out: + /* Controller Initialization */ + dmc_controller_init(); +} + +static inline void __dmc_config(uint32_t dmc_no) +{ + if (dmc_no == 0) { + dmc.reg = REG_DMC0_BASE; + dmc.dmc_data_calib_add_value = DMC0_DATA_CALIB_ADD; + } else if (dmc_no == 1) { + dmc.reg = REG_DMC1_BASE; + dmc.dmc_data_calib_add_value = DMC1_DATA_CALIB_ADD; + } else { + return; + } + + if (IS_ENABLED(CONFIG_ADI_USE_DDR2)) + dmc.ddr_mode = DDR2_MODE; + else + dmc.ddr_mode = DDR3_MODE; + + dmc.phy_init_required = true; + +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + dmc.anomaly_20000037_applicable = false; + dmc.dmc_dllctl_value = DMC_DLLCTL_VALUE; + dmc.calib_mode = CALIBRATION_METHOD2; +#else + dmc.anomaly_20000037_applicable = true; + dmc.calib_mode = CALIBRATION_LEGACY; +#endif + + dmc.dmc_ctl_value = DMC_CTL_VALUE; + dmc.dmc_cfg_value = DMC_CFG_VALUE; + dmc.dmc_tr0_value = DMC_TR0_VALUE; + dmc.dmc_tr1_value = DMC_TR1_VALUE; + dmc.dmc_tr2_value = DMC_TR2_VALUE; + dmc.dmc_mr0_value = DMC_MR0_VALUE; + dmc.dmc_mr1_value = DMC_MR1_VALUE; + dmc.dmc_mr2_value = DMC_MR2_VALUE; + +#if defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + dmc.dmc_mr3_value = DMC_MR3_VALUE; + dmc.dmc_zqctl0_value = DMC_ZQCTL0_VALUE; + dmc.dmc_zqctl1_value = DMC_ZQCTL1_VALUE; + dmc.dmc_zqctl2_value = DMC_ZQCTL2_VALUE; +#endif + + dmc.padctl2_value = DMC_PADCTL2_VALUE; + dmc.dmc_cphyctl_value = DMC_CPHYCTL_VALUE; + + /* Initialize DMC now */ + dmc_init(); +} + +void DMC_Config(void) +{ + if (IS_ENABLED(CONFIG_ADI_USE_DMC0)) + __dmc_config(0); + + if (IS_ENABLED(CONFIG_ADI_USE_DMC1)) + __dmc_config(1); +} diff --git a/arch/arm/mach-sc5xx/init/dmcinit.h b/arch/arm/mach-sc5xx/init/dmcinit.h new file mode 100644 index 00000000000..46ff729282d --- /dev/null +++ b/arch/arm/mach-sc5xx/init/dmcinit.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#ifndef DMCINIT_H_ +#define DMCINIT_H_ + +#include + +#ifdef MEM_MT41K512M16HA + #include "mem/mt41k512m16ha.h" +#elif defined(MEM_MT41K128M16JT) + #include "mem/mt41k128m16jt.h" +#elif defined(MEM_MT47H128M16RT) + #include "mem/mt47h128m16rt.h" +#elif defined(MEM_IS43TR16512BL) + #include "mem/is43tr16512bl.h" +#else + #error "No DDR part name is defined for this board." +#endif + +void DMC_Config(void); +void adi_dmc_reset_lanes(bool reset); + +#endif diff --git a/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h b/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h new file mode 100644 index 00000000000..a5838370555 --- /dev/null +++ b/arch/arm/mach-sc5xx/init/mem/is43tr16512bl.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#ifndef IS43TR16512BL_H +#define IS43TR16512BL_H + +/* DMC0 setup for the EV-21593-SOM and EV-SC594-SOM : + * - uses a single 8GB IS43TR16512BL-125KBL DDR3 chip configured for + * 800 MHz DCLK. + * DMC0 setup for the EV-SC594-SOMS : + * - uses a single 4GB IS43TR16256BL-093NBL DDR3 chip configured for + * 800 MHz DCLK. + */ +#define DMC_DLLCALRDCNT 240 +#define DMC_DATACYC 12 +#define DMC_TRCD 11 +#define DMC_TWTR 6 +#define DMC_TRP 11 +#define DMC_TRAS 28 +#define DMC_TRC 39 +#define DMC_TMRD 4 +#define DMC_TREF 6240 +#define DMC_TRRD 6 +#define DMC_TFAW 32 +#define DMC_TRTP 6 +#define DMC_TWR 12 +#define DMC_TXP 5 +#define DMC_TCKE 4 +#define DMC_CL0 0 +#define DMC_CL123 7 +#define DMC_WRRECOV 6 +#define DMC_MR1_DLLEN 0 +#define DMC_MR1_DIC0 0 +#define DMC_MR1_RTT0 0 +#define DMC_MR1_AL 0 +#define DMC_MR1_DIC1 0 +#define DMC_MR1_RTT1 1 +#define DMC_MR1_WL 0 +#define DMC_MR1_RTT2 0 +#define DMC_MR1_TDQS 0 +#define DMC_MR1_QOFF 0 +#define DMC_WL 3 +#define DMC_RDTOWR 5 +#define DMC_CTL_AL_EN 1 +#if defined(MEM_ISSI_4Gb_DDR3_800MHZ) + #define SDR_CHIP_SIZE (ENUM_DMC_CFG_SDRSIZE4G) + #define DMC_TRFC 208ul +#elif defined(MEM_ISSI_8Gb_DDR3_800MHZ) + #define SDR_CHIP_SIZE (ENUM_DMC_CFG_SDRSIZE8G) + #define DMC_TRFC 280ul +#else + #error "Need to select MEM_ISSI_4Gb_DDR3_800MHZ or MEM_ISSI_8Gb_DDR3_800MHZ" +#endif + +#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h b/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h new file mode 100644 index 00000000000..882777521b8 --- /dev/null +++ b/arch/arm/mach-sc5xx/init/mem/mt41k128m16jt.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#ifndef MT41K128M16JT_H +#define MT41K128M16JT_H + +/* Default DDR3 part assumed: MT41K128M16JT-125, 2Gb part */ +/* For DCLK= 450 MHz */ +#define DMC_DLLCALRDCNT 72 +#define DMC_DATACYC 9 +#define DMC_TRCD 6 +#define DMC_TWTR 4 +#define DMC_TRP 6 +#define DMC_TRAS 17 +#define DMC_TRC 23 +#define DMC_TMRD 4 +#define DMC_TREF 3510 +#define DMC_TRFC 72 +#define DMC_TRRD 4 +#define DMC_TFAW 17 +#define DMC_TRTP 4 +#define DMC_TWR 7 +#define DMC_TXP 4 +#define DMC_TCKE 3 +#define DMC_CL0 0 +#define DMC_CL123 3 +#define DMC_WRRECOV (DMC_TWR - 1) +#define DMC_MR1_DLLEN 0 +#define DMC_MR1_DIC0 1 +#define DMC_MR1_RTT0 1 +#define DMC_MR1_AL 0 +#define DMC_MR1_DIC1 0 +#define DMC_MR1_RTT1 0 +#define DMC_MR1_WL 0 +#define DMC_MR1_RTT2 0 +#define DMC_MR1_TDQS 0 +#define DMC_MR1_QOFF 0 +#define DMC_WL 1 +#define DMC_RDTOWR 2 +#define DMC_CTL_AL_EN 0 +#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE2G + +#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h b/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h new file mode 100644 index 00000000000..5735b87871c --- /dev/null +++ b/arch/arm/mach-sc5xx/init/mem/mt41k512m16ha.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#ifndef MT41K512M16HA_H +#define MT41K512M16HA_H + +/* Default DDR3 part assumed: MT41K512M16HA-107, 8Gb part */ +/* For DCLK= 450 MHz */ +#define DMC_DLLCALRDCNT 72 +#define DMC_DATACYC 9 +#define DMC_TRCD 7 +#define DMC_TWTR 4 +#define DMC_TRP 7 +#define DMC_TRAS 10 +#define DMC_TRC 16 +#define DMC_TMRD 4 +#define DMC_TREF 3510 +#define DMC_TRFC 158 +#define DMC_TRRD 6 +#define DMC_TFAW 16 +#define DMC_TRTP 4 +#define DMC_TWR 7 +#define DMC_TXP 3 +#define DMC_TCKE 3 +#define DMC_CL0 0 +#define DMC_CL123 3 +#define DMC_WRRECOV (DMC_TWR - 1) +#define DMC_MR1_DLLEN 0 +#define DMC_MR1_DIC0 1 +#define DMC_MR1_RTT0 1 +#define DMC_MR1_AL 0 +#define DMC_MR1_DIC1 0 +#define DMC_MR1_RTT1 0 +#define DMC_MR1_WL 0 +#define DMC_MR1_RTT2 0 +#define DMC_MR1_TDQS 0 +#define DMC_MR1_QOFF 0 +#define DMC_WL 1 +#define DMC_RDTOWR 2 +#define DMC_CTL_AL_EN 0 +#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE8G + +#endif diff --git a/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h b/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h new file mode 100644 index 00000000000..5ada7f2985b --- /dev/null +++ b/arch/arm/mach-sc5xx/init/mem/mt47h128m16rt.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#ifndef MT47H128M16RT_H +#define MT47H128M16RT_H + +/* Default DDR2 part: MT47H128M16RT-25E XIT:C, 2 Gb part */ +/* For DCLK= 400 MHz */ +#define DMC_DLLCALRDCNT 72 +#define DMC_DATACYC 9 +#define DMC_TRCD 5 +#define DMC_TWTR 3 +#define DMC_TRP 5 +#define DMC_TRAS 16 +#define DMC_TRC 22 +#define DMC_TMRD 2 +#define DMC_TREF 3120 +#define DMC_TRFC 78 +#define DMC_TRRD 4 +#define DMC_TFAW 18 +#define DMC_TRTP 3 +#define DMC_TWR 6 +#define DMC_TXP 2 +#define DMC_TCKE 3 +#define DMC_CL 5 +#define DMC_WRRECOV (DMC_TWR - 1) +#define DMC_MR1_DLLEN 0 +#define DMC_MR1_DIC0 1 +#define DMC_MR1_RTT0 1 +#define DMC_MR1_AL 4 +#define DMC_MR1_DIC1 0 +#define DMC_MR1_RTT1 0 +#define DMC_MR1_WL 0 +#define DMC_MR1_RTT2 0 +#define DMC_MR1_TDQS 0 +#define DMC_MR1_QOFF 0 +#define DMC_BL 4 +#define DMC_RDTOWR 2 +#define DMC_CTL_AL_EN 0 +#define SDR_CHIP_SIZE ENUM_DMC_CFG_SDRSIZE2G + +#endif diff --git a/arch/arm/mach-sc5xx/rcu.c b/arch/arm/mach-sc5xx/rcu.c new file mode 100644 index 00000000000..49357501a93 --- /dev/null +++ b/arch/arm/mach-sc5xx/rcu.c @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Ian Roberts + */ + +#include +#include + +static const struct udevice_id adi_syscon_ids[] = { + { .compatible = "adi,reset-controller" }, + { } +}; + +U_BOOT_DRIVER(syscon_sc5xx_rcu) = { + .name = "sc5xx_rcu", + .id = UCLASS_SYSCON, + .of_match = adi_syscon_ids, +}; diff --git a/arch/arm/mach-sc5xx/sc57x.c b/arch/arm/mach-sc5xx/sc57x.c new file mode 100644 index 00000000000..b0587686d73 --- /dev/null +++ b/arch/arm/mach-sc5xx/sc57x.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#include +#include +#include + +#define REG_SPU0_SECUREC0 0x3108B980 +#define REG_PADS0_PCFG0 0x31004404 +#define REG_SPU0_SECUREP_START 0x3108BA00 +#define REG_SPU0_SECUREP_END 0x3108BD24 + +adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e1; + +void sc5xx_enable_rgmii(void) +{ + writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); +} + +void sc5xx_soc_init(void) +{ + sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); + sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); + sc5xx_enable_pmu(); +} diff --git a/arch/arm/mach-sc5xx/sc58x.c b/arch/arm/mach-sc5xx/sc58x.c new file mode 100644 index 00000000000..0f892774309 --- /dev/null +++ b/arch/arm/mach-sc5xx/sc58x.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#include +#include +#include + +#define REG_SPU0_SECUREC0 0x3108C980 +#define REG_PADS0_PCFG0 0x31004404 +#define REG_SPU0_SECUREP_START 0x3108CA00 +#define REG_SPU0_SECUREP_END 0x3108CCF0 + +adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e1; + +void sc5xx_enable_rgmii(void) +{ + writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); +} + +void sc5xx_soc_init(void) +{ + sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); + sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); + sc5xx_enable_pmu(); +} diff --git a/arch/arm/mach-sc5xx/sc59x.c b/arch/arm/mach-sc5xx/sc59x.c new file mode 100644 index 00000000000..174c6f5c445 --- /dev/null +++ b/arch/arm/mach-sc5xx/sc59x.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#include +#include +#include + +#define REG_SPU0_SECUREC0 0x3108B980 +#define REG_PADS0_PCFG0 0x31004604 +#define REG_SPU0_SECUREP_START 0x3108BA00 +#define REG_SPU0_SECUREP_END 0x3108BD24 + +#define REG_SCB5_SPI2_OSPI_REMAP 0x30400000 +#define BITM_SCB5_SPI2_OSPI_REMAP_REMAP 0x00000003 +#define ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0 0x00000001 + +adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e9; + +void sc5xx_enable_rgmii(void) +{ + writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); +} + +void sc59x_remap_ospi(void) +{ + clrsetbits_le32(REG_SCB5_SPI2_OSPI_REMAP, + BITM_SCB5_SPI2_OSPI_REMAP_REMAP, + ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0); +} + +void sc5xx_soc_init(void) +{ + sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); + sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_END); + sc5xx_enable_pmu(); +} diff --git a/arch/arm/mach-sc5xx/sc59x_64.c b/arch/arm/mach-sc5xx/sc59x_64.c new file mode 100644 index 00000000000..82537bf1965 --- /dev/null +++ b/arch/arm/mach-sc5xx/sc59x_64.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2024 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#include +#include +#include + +#define REG_TSGENWR0_CNTCR 0x310AE000 +#define REG_PADS0_PCFG0 0x31004604 +#define REG_RCU0_BCODE 0x3108C028 + +#define REG_SPU0_SECUREP_START 0x3108BA00 +#define REG_SPU0_WP_START 0x3108B400 +#define REG_SPU0_SECUREC0 0x3108B980 + +#define REG_SCB5_SPI2_OSPI_REMAP 0x30400000 +#define BITM_SCB5_SPI2_OSPI_REMAP_REMAP 0x00000003 +#define ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0 0x00000001 + +adi_rom_boot_fn adi_rom_boot = (adi_rom_boot_fn)0x000000e4; + +void sc5xx_enable_rgmii(void) +{ + writel((readl(REG_PADS0_PCFG0) | 0xc), REG_PADS0_PCFG0); + + // Set dw for little endian operation as well + writel(readl(REG_PADS0_PCFG0) & ~(1 << 19), REG_PADS0_PCFG0); + writel(readl(REG_PADS0_PCFG0) & ~(1 << 20), REG_PADS0_PCFG0); +} + +void sc59x_remap_ospi(void) +{ + clrsetbits_le32(REG_SCB5_SPI2_OSPI_REMAP, + BITM_SCB5_SPI2_OSPI_REMAP_REMAP, + ENUM_SCB5_SPI2_OSPI_REMAP_OSPI0); +} + +/** + * SPU/SMPU configuration is the default for permissive access from non-secure + * EL1. If TFA and OPTEE are configured, they run *after* this code, as the + * current boot flow is SPL -> TFA -> OPTEE -> Proper -> Linux, and will + * be expected to configure peripheral security correctly. If they are not + * configured, then this permissive setting will allow Linux (which always + * runs in NS EL1) to control all access to these peripherals. Without it, + * the peripherals would simply be unavailable in a non-security build, + * which is not OK. + */ +void sc5xx_soc_init(void) +{ + phys_addr_t smpus[] = { + 0x31007800, //SMPU0 + 0x31083800, //SMPU2 + 0x31084800, //SMPU3 + 0x31085800, //SMPU4 + 0x31086800, //SMPU5 + 0x31087800, //SMPU6 + 0x310A0800, //SMPU9 + 0x310A1800, //SMPU11 + 0x31012800, //SMPU12 + }; + size_t i; + + // Enable coresight timer + writel(1, REG_TSGENWR0_CNTCR); + + //Do not rerun preboot routine -- + // Without this, hardware resets triggered by RCU0_CTL:SYSRST + // lead to a deadlock somewhere in the boot ROM + writel(0x200, REG_RCU0_BCODE); + + /* Alter outstanding transactions property of A55*/ + writel(0x1, 0x30643108); /* SCB6 A55 M0 Ib.fn Mod */ + isb(); + + /* configure DDR prefetch behavior, per ADI */ + writel(0x1, 0x31076000); + + /* configure smart mode, per ADI */ + writel(0x1307, 0x31076004); + + // Disable SPU and SPU WP registers + sc5xx_disable_spu0(REG_SPU0_SECUREP_START, REG_SPU0_SECUREP_START + 4*213); + sc5xx_disable_spu0(REG_SPU0_WP_START, REG_SPU0_WP_START + 4*213); + + /* configure smpus permissively */ + for (i = 0; i < ARRAY_SIZE(smpus); ++i) + writel(0x500, smpus[i]); + + sc5xx_enable_ns_sharc_access(REG_SPU0_SECUREC0); +} diff --git a/arch/arm/mach-sc5xx/soc.c b/arch/arm/mach-sc5xx/soc.c new file mode 100644 index 00000000000..8f13127a660 --- /dev/null +++ b/arch/arm/mach-sc5xx/soc.c @@ -0,0 +1,179 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#include +#include +#include +#include +#include + +#ifdef CONFIG_SC58X + #define RCU0_CTL 0x3108B000 + #define RCU0_STAT 0x3108B004 + #define RCU0_CRCTL 0x3108B008 + #define RCU0_CRSTAT 0x3108B00C + #define RCU0_SIDIS 0x3108B010 + #define RCU0_MSG_SET 0x3108B064 +#elif defined(CONFIG_SC57X) || defined(CONFIG_SC59X) || defined(CONFIG_SC59X_64) + #define RCU0_CTL 0x3108C000 + #define RCU0_STAT 0x3108C004 + #define RCU0_CRCTL 0x3108C008 + #define RCU0_CRSTAT 0x3108C00C + #define RCU0_SIDIS 0x3108C01C + #define RCU0_MSG_SET 0x3108C070 +#else + #error "No SC5xx SoC CONFIG_ enabled" +#endif + +#define BITP_RCU_STAT_BMODE 8 +#define BITM_RCU_STAT_BMODE 0x00000F00 + +#define REG_ARMPMU0_PMCR 0x31121E04 +#define REG_ARMPMU0_PMUSERENR 0x31121E08 +#define REG_ARMPMU0_PMLAR 0x31121FB0 + +DECLARE_GLOBAL_DATA_PTR; + +void reset_cpu(void) +{ + u32 val = readl(RCU0_CTL); + writel(val | 1, RCU0_CTL); +} + +void enable_caches(void) +{ + if (!IS_ENABLED(CONFIG_SYS_DCACHE_OFF)) + dcache_enable(); +} + +void sc5xx_enable_ns_sharc_access(uintptr_t securec0_base) +{ + writel(0, securec0_base); + writel(0, securec0_base + 0x4); + writel(0, securec0_base + 0x8); +} + +void sc5xx_disable_spu0(uintptr_t spu0_start, uintptr_t spu0_end) +{ + for (uintptr_t i = spu0_start; i <= spu0_end; i += 4) + writel(0, i); +} + +/** + * PMU is only available on armv7 platforms and all share the same location + */ +void sc5xx_enable_pmu(void) +{ + if (!IS_ENABLED(CONFIG_SC59X_64)) { + writel(readl(REG_ARMPMU0_PMUSERENR) | 0x01, REG_ARMPMU0_PMUSERENR); + writel(0xc5acce55, REG_ARMPMU0_PMLAR); + writel(readl(REG_ARMPMU0_PMCR) | (1 << 1), REG_ARMPMU0_PMCR); + } +} + +const char *sc5xx_get_boot_mode(u32 *bmode) +{ + static const char * const bmodes[] = { + "JTAG/BOOTROM", + "QSPI Master", + "QSPI Slave", + "UART", + "LP0 Slave", + "OSPI", +#ifdef CONFIG_SC59X_64 + "eMMC" +#endif + }; + u32 local_mode; + + local_mode = (readl(RCU0_STAT) & BITM_RCU_STAT_BMODE) >> BITP_RCU_STAT_BMODE; + +#if CONFIG_ADI_SPL_FORCE_BMODE != 0 + /* + * In case we want to force boot sequences such as: + * QSPI -> OSPI + * QSPI -> eMMC + * If this is not set, then we will always try to use the BMODE setting + * for both stages... i.e. + * QSPI -> QSPI + */ + + // (Don't allow skipping JTAG/UART BMODE settings) + if (local_mode != 0 && local_mode != 3) + local_mode = CONFIG_ADI_SPL_FORCE_BMODE; +#endif + + *bmode = local_mode; + + if (local_mode >= 0 && local_mode <= ARRAY_SIZE(bmodes)) + return bmodes[local_mode]; + return "unknown"; +} + +void print_cpu_id(void) +{ + if (!IS_ENABLED(CONFIG_ARM64)) { + u32 cpuid = 0; + + __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0" : "=r"(cpuid)); + + printf("Detected Revision: %d.%d\n", cpuid & 0xf00000 >> 20, cpuid & 0xf); + } +} + +int print_cpuinfo(void) +{ + u32 bmode; + + printf("CPU: ADSP %s (%s boot)\n", CONFIG_LDR_CPU, sc5xx_get_boot_mode(&bmode)); + print_cpu_id(); + + return 0; +} + +void fixup_dp83867_phy(struct phy_device *phydev) +{ + int phy_data = 0; + + phy_data = phy_read(phydev, MDIO_DEVAD_NONE, 0x32); + phy_write(phydev, MDIO_DEVAD_NONE, 0x32, (1 << 7) | phy_data); + int cfg3 = 0; + #define MII_DP83867_CFG3 (0x1e) + /* + * Pin INT/PWDN on DP83867 should be configured as an Interrupt Output + * instead of a Power-Down Input on ADI SC5XX boards in order to + * prevent the signal interference from other peripherals during they + * are running at the same time. + */ + cfg3 = phy_read(phydev, MDIO_DEVAD_NONE, MII_DP83867_CFG3); + cfg3 |= (1 << 7); + phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_CFG3, cfg3); + + // Mystery second port fixup on ezkits with two PHYs + if (CONFIG_DW_PORTS & 2) + phy_write(phydev, MDIO_DEVAD_NONE, 0x11, 3); + + if (IS_ENABLED(CONFIG_ADI_BUG_EZKHW21)) { + phydev->advertising &= PHY_BASIC_FEATURES; + phydev->speed = SPEED_100; + } + + if (phydev->drv->config) + phydev->drv->config(phydev); + + if (IS_ENABLED(CONFIG_ADI_BUG_EZKHW21)) + phy_write(phydev, MDIO_DEVAD_NONE, 0, 0x3100); +} + +int dram_init(void) +{ + gd->ram_size = CFG_SYS_SDRAM_SIZE; + return 0; +} diff --git a/arch/arm/mach-sc5xx/spl.c b/arch/arm/mach-sc5xx/spl.c new file mode 100644 index 00000000000..68e0310f5af --- /dev/null +++ b/arch/arm/mach-sc5xx/spl.c @@ -0,0 +1,102 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + */ + +#include +#include +#include +#include "init/clkinit.h" +#include "init/dmcinit.h" + +static bool adi_start_uboot_proper; + +static int adi_sf_default_bus = CONFIG_SF_DEFAULT_BUS; +static int adi_sf_default_cs = CONFIG_SF_DEFAULT_CS; +static int adi_sf_default_speed = CONFIG_SF_DEFAULT_SPEED; + +u32 bmode; + +int spl_start_uboot(void) +{ + return adi_start_uboot_proper; +} + +unsigned int spl_spi_get_default_speed(void) +{ + return adi_sf_default_speed; +} + +unsigned int spl_spi_get_default_bus(void) +{ + return adi_sf_default_bus; +} + +unsigned int spl_spi_get_default_cs(void) +{ + return adi_sf_default_cs; +} + +void board_boot_order(u32 *spl_boot_list) +{ + const char *bmodestring = sc5xx_get_boot_mode(&bmode); + + printf("ADI Boot Mode: 0x%x (%s)\n", bmode, bmodestring); + + /* + * By default everything goes back to the bootrom, where we'll read table + * parameters and ask for another image to be loaded + */ + spl_boot_list[0] = BOOT_DEVICE_BOOTROM; + + if (bmode == 0) { + printf("SPL execution has completed. Please load U-Boot Proper via JTAG"); + while (1) + ; + } +} + +int32_t __weak adi_rom_boot_hook(struct ADI_ROM_BOOT_CONFIG *config, int32_t cause) +{ + return 0; +} + +int board_return_to_bootrom(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) +{ +#if CONFIG_ADI_SPL_FORCE_BMODE != 0 + // see above + if (bmode != 0 && bmode != 3) + bmode = CONFIG_ADI_SPL_FORCE_BMODE; +#endif + + if (bmode >= (ARRAY_SIZE(adi_rom_boot_args))) + bmode = 0; + + adi_rom_boot((void *)adi_rom_boot_args[bmode].addr, + adi_rom_boot_args[bmode].flags, + 0, &adi_rom_boot_hook, + adi_rom_boot_args[bmode].cmd); + return 0; +}; + +void board_init_f(ulong dummy) +{ + int ret; + + clks_init(); + DMC_Config(); + sc5xx_soc_init(); + + ret = spl_early_init(); + if (ret) + panic("spl_early_init() failed\n"); + + preloader_console_init(); +} + diff --git a/include/env/adi/adi_boot.env b/include/env/adi/adi_boot.env new file mode 100644 index 00000000000..d56b14f5172 --- /dev/null +++ b/include/env/adi/adi_boot.env @@ -0,0 +1,122 @@ +/* + * A target board needs to set these variables for the commands below to work: + * + * - adi_stage2_offset, the location of stage2-boot.ldr on the SPI flash + * - adi_image_offset, location of the fitImage on the SPI flash + * - adi_rfs_offset, location of the RFS on the SPI flash + * - loadaddr, where you want to load things + * - jffs2file, name of the jffs2 file for update, ex adsp-sc5xx-tiny-adsp-sc573.jffs2 + */ + +#ifdef CONFIG_SC59X_64 +#define EARLY_PRINTK earlycon=adi_uart,0x31003000 +#else +#define EARLY_PRINTK earlyprintk=serial,uart0,CONFIG_BAUDRATE +#endif + +/* Config options */ +imagefile=fitImage +ethaddr=02:80:ad:20:31:e8 +eth1addr=02:80:ad:20:31:e9 +uart_console=CONFIG_UART_CONSOLE +#ifdef CONFIG_SC59X_64 +fdt_high=0xffffffffffffffff +initrd_high=0xffffffffffffffff +#else +fdt_high=0xffffffff +initrd_high=0xffffffff +#endif + +/* Helper routines */ +init_ethernet=mii info; + dhcp; + setenv serverip ${tftpserverip} + +/* Args for each boot mode */ +adi_bootargs=EARLY_PRINTK console=ttySC0,CONFIG_BAUDRATE vmalloc=512M +ramargs=setenv bootargs ${adi_bootargs} + +addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off + +/* Boot modes are selectable and should be defined in the board env before including */ +#if defined(USE_NFS) +// rootpath is set by CONFIG_ROOTPATH +nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}${rootpath},tcp,nfsvers=3 ${adi_bootargs} +nfsboot=run init_ethernet; + tftp ${loadaddr} ${tftp_dir_prefix}${imagefile}; + run nfsargs; + run addip; + bootm ${loadaddr} +#endif + +#if defined(USE_MMC) +mmcargs=setenv bootargs root=/dev/mmcblk0p1 rw rootfstype=ext4 rootwait ${adi_bootargs} +mmcboot=mmc rescan; + ext4load mmc 0:1 ${loadaddr} /boot/${imagefile}; + run mmcargs; + bootm ${loadaddr} +#endif + +#if defined(USE_SPI) || defined(USE_OSPI) +spiargs=setenv bootargs root=/dev/mtdblock4 rw rootfstype=jffs2 ${adi_bootargs} +spiboot=run spiargs; + sf probe ${sfdev}; + sf read ${loadaddr} ${adi_image_offset} ${imagesize}; + bootm ${loadaddr} +#endif + +#if defined(USE_OSPI) +ospiboot=run spiboot +#endif + +#if defined(USE_RAM) +ramboot=run init_ethernet; + tftp ${loadaddr} ${tfpt_dir_prefix}${imagefile}; + run ramargs; + bootm ${loadaddr} +#endif + +/* Update commands */ +stage1file=stage1-boot.ldr +stage2file=stage2-boot.ldr + +#if defined(USE_SPI) || defined(USE_OSPI) +update_spi_uboot_stage1=tftp ${loadaddr} ${tftp_dir_prefix}${stage1file}; + sf probe ${sfdev}; + sf update ${loadaddr} 0x0 ${filesize} +update_spi_uboot_stage2=tftp ${loadaddr} ${tftp_dir_prefix}${stage2file}; + sf probe ${sfdev}; + sf update ${loadaddr} ${adi_stage2_offset} ${filesize} +update_spi_uboot=run update_spi_uboot_stage1; + run update_spi_uboot_stage2; +update_spi_fit=tftp ${loadaddr} ${tftp_dir_prefix}${imagefile}; + sf probe ${sfdev}; + sf update ${loadaddr} ${adi_image_offset} ${filesize}; + setenv imagesize ${filesize} +update_spi_rfs=tftp ${loadaddr} ${tftp_dir_prefix}${jffs2file}; + sf probe ${sfdev}; + sf update ${loadaddr} ${adi_rfs_offset} ${filesize} + +start_update_spi=run init_ethernet; + run update_spi_uboot; + run update_spi_fit; + run update_spi_rfs; +start_update_spi_uboot_only=run init_ethernet; + run update_spi_uboot; +#endif + +#if defined(USE_SPI) +update_spi=setenv sfdev CONFIG_SC_BOOT_SPI_BUS:CONFIG_SC_BOOT_SPI_SSEL; + setenv bootcmd run spiboot; + setenv argscmd spiargs; + run start_update_spi; + saveenv +#endif + +#if defined(USE_OSPI) +update_ospi=setenv sfdev CONFIG_SC_BOOT_OSPI_BUS:CONFIG_SC_BOOT_OSPI_SSEL; + setenv bootcmd run ospiboot; + setenv argscmd spiargs; + run start_update_spi; + saveenv +#endif -- cgit v1.3.1 From 16fe1118da91fedb564cb323bec2eeab6bdddde8 Mon Sep 17 00:00:00 2001 From: Nathan Barrett-Morrison Date: Wed, 24 Apr 2024 20:04:01 -0400 Subject: drivers: clk: adi: Add in SC5XX-family clock driver This adds support for the SC5XX clock trees which are required for reading clock speeds on the SoCs. This is largely a port of the same support for Linux, which has not yet been submitted upstream. Co-developed-by: Greg Malysa Signed-off-by: Greg Malysa Co-developed-by: Ian Roberts Signed-off-by: Ian Roberts Signed-off-by: Vasileios Bimpikas Signed-off-by: Utsav Agarwal Signed-off-by: Arturs Artamonovs Signed-off-by: Nathan Barrett-Morrison --- MAINTAINERS | 1 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/adi/Kconfig | 83 ++++++++ drivers/clk/adi/Makefile | 16 ++ drivers/clk/adi/clk-adi-pll.c | 93 +++++++++ drivers/clk/adi/clk-adi-sc57x.c | 206 +++++++++++++++++++ drivers/clk/adi/clk-adi-sc58x.c | 222 ++++++++++++++++++++ drivers/clk/adi/clk-adi-sc594.c | 231 +++++++++++++++++++++ drivers/clk/adi/clk-adi-sc598.c | 308 ++++++++++++++++++++++++++++ drivers/clk/adi/clk-shared.c | 48 +++++ drivers/clk/adi/clk.h | 123 +++++++++++ include/dt-bindings/clock/adi-sc5xx-clock.h | 271 ++++++++++++++++++++++++ 13 files changed, 1604 insertions(+) create mode 100644 drivers/clk/adi/Kconfig create mode 100644 drivers/clk/adi/Makefile create mode 100644 drivers/clk/adi/clk-adi-pll.c create mode 100644 drivers/clk/adi/clk-adi-sc57x.c create mode 100644 drivers/clk/adi/clk-adi-sc58x.c create mode 100644 drivers/clk/adi/clk-adi-sc594.c create mode 100644 drivers/clk/adi/clk-adi-sc598.c create mode 100644 drivers/clk/adi/clk-shared.c create mode 100644 drivers/clk/adi/clk.h create mode 100644 include/dt-bindings/clock/adi-sc5xx-clock.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index d18429665c8..831f6da53f5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -610,6 +610,7 @@ S: Supported T: git https://github.com/analogdevicesinc/lnxdsp-u-boot F: arch/arm/include/asm/arch-adi/ F: arch/arm/mach-sc5xx/ +F: drivers/clk/adi/ F: include/env/adi/ ARM SNAPDRAGON diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 017dd260a54..d8c619add41 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -246,6 +246,7 @@ config CLK_ZYNQMP This clock driver adds support for clock realted settings for ZynqMP platform. +source "drivers/clk/adi/Kconfig" source "drivers/clk/analogbits/Kconfig" source "drivers/clk/at91/Kconfig" source "drivers/clk/exynos/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 638ad04baeb..847b9b29110 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-fixed-factor.o obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) += clk-composite.o obj-$(CONFIG_$(SPL_TPL_)CLK_GPIO) += clk-gpio.o +obj-y += adi/ obj-y += analogbits/ obj-y += imx/ obj-$(CONFIG_CLK_JH7110) += starfive/ diff --git a/drivers/clk/adi/Kconfig b/drivers/clk/adi/Kconfig new file mode 100644 index 00000000000..5745bedf88c --- /dev/null +++ b/drivers/clk/adi/Kconfig @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2022 - Analog Devices, Inc. +# +# Written and/or maintained by Timesys Corporation +# +# Contact: Nathan Barrett-Morrison +# Contact: Greg Malysa +# + +config COMMON_CLK_ADI_SHARED + bool "Enable shared ADI clock framework code" + help + Required for shared code between SoC clock drivers. Automatically + selected by an appropriate SoC-specific clock driver version. + +config COMMON_CLK_ADI_SC598 + bool "Clock driver for ADI SC598 SoCs" + select DM + select CLK + select CLK_CCF + select OF_CONTROL + select CMD_CLK + select SPL_DM if SPL + select SPL_CLK if SPL + select SPL_CLK_CCF if SPL + select SPL_OF_CONTROL if SPL + select COMMON_CLK_ADI_SHARED + depends on SC59X_64 + help + This driver supports the system clocks on Analog Devices SC598-series + SoCs. It includes CGU and CDU clocks and supports gating unused clocks. + Modifying PLL configuration is not supported; that must be done prior + to booting the kernel. Clock dividers after the PLLs may be configured. + +config COMMON_CLK_ADI_SC594 + bool "Clock driver for ADI SC594 SoCs" + select DM + select CLK + select CLK_CCF + select OF_CONTROL + select CMD_CLK + select SPL_DM if SPL + select SPL_CLK if SPL + select SPL_CLK_CCF if SPL + select SPL_OF_CONTROL if SPL + select COMMON_CLK_ADI_SHARED + depends on SC59X + help + This driver supports the system clocks on Analog Devices SC594-series + SoCs. It includes CGU and CDU clocks and supports gating unused clocks. + Modifying PLL configuration is not supported; that must be done prior + to booting the kernel. Clock dividers after the PLLs may be configured. + +config COMMON_CLK_ADI_SC58X + bool "Clock driver for ADI SC58X SoCs" + select DM + select CLK + select CLK_CCF + select OF_CONTROL + select CMD_CLK + select COMMON_CLK_ADI_SHARED + depends on SC58X + help + This driver supports the system clocks on Analog Devices SC58x-series + SoCs. It includes CGU and CDU clocks and supports gating unused clocks. + Modifying PLL configuration is not supported; that must be done prior + to booting the kernel. Clock dividers after the PLLs may be configured. + +config COMMON_CLK_ADI_SC57X + bool "Clock driver for ADI SC57X SoCs" + select DM + select CLK + select CLK_CCF + select OF_CONTROL + select CMD_CLK + select COMMON_CLK_ADI_SHARED + depends on SC57X + help + This driver supports the system clocks on Analog Devices SC57x-series + SoCs. It includes CGU and CDU clocks and supports gating unused clocks. + Modifying PLL configuration is not supported; that must be done prior + to booting the kernel. Clock dividers after the PLLs may be configured. diff --git a/drivers/clk/adi/Makefile b/drivers/clk/adi/Makefile new file mode 100644 index 00000000000..f3f1fd92e5f --- /dev/null +++ b/drivers/clk/adi/Makefile @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# +# (C) Copyright 2022 - Analog Devices, Inc. +# +# Written and/or maintained by Timesys Corporation +# +# Contact: Nathan Barrett-Morrison +# Contact: Greg Malysa +# + +obj-$(CONFIG_COMMON_CLK_ADI_SHARED) += clk-shared.o clk-adi-pll.o + +obj-$(CONFIG_COMMON_CLK_ADI_SC594) += clk-adi-sc594.o +obj-$(CONFIG_COMMON_CLK_ADI_SC598) += clk-adi-sc598.o +obj-$(CONFIG_COMMON_CLK_ADI_SC58X) += clk-adi-sc58x.o +obj-$(CONFIG_COMMON_CLK_ADI_SC57X) += clk-adi-sc57x.o diff --git a/drivers/clk/adi/clk-adi-pll.c b/drivers/clk/adi/clk-adi-pll.c new file mode 100644 index 00000000000..372baa9c11b --- /dev/null +++ b/drivers/clk/adi/clk-adi-pll.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Author: Greg Malysa + * + * Ported from Linux: Nathan Barrett-Morrison + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +#define ADI_CLK_PLL_GENERIC "adi_clk_pll_generic" + +struct clk_sc5xx_cgu_pll { + struct clk clk; + void __iomem *base; + u32 mask; + u32 max; + u32 m_offset; + u8 shift; + bool half_m; +}; + +#define to_clk_sc5xx_cgu_pll(_clk) container_of(_clk, struct clk_sc5xx_cgu_pll, clk) + +static unsigned long sc5xx_cgu_pll_get_rate(struct clk *clk) +{ + struct clk_sc5xx_cgu_pll *pll = to_clk_sc5xx_cgu_pll(dev_get_clk_ptr(clk->dev)); + unsigned long parent_rate = clk_get_parent_rate(clk); + + u32 reg = readl(pll->base); + u32 m = ((reg & pll->mask) >> pll->shift) + pll->m_offset; + + if (m == 0) + m = pll->max; + + if (pll->half_m) + return parent_rate * m * 2; + return parent_rate * m; +} + +static const struct clk_ops clk_sc5xx_cgu_pll_ops = { + .get_rate = sc5xx_cgu_pll_get_rate, +}; + +struct clk *sc5xx_cgu_pll(const char *name, const char *parent_name, + void __iomem *base, u8 shift, u8 width, u32 m_offset, + bool half_m) +{ + struct clk_sc5xx_cgu_pll *pll; + struct clk *clk; + int ret; + char *drv_name = ADI_CLK_PLL_GENERIC; + + pll = kzalloc(sizeof(*pll), GFP_KERNEL); + if (!pll) + return ERR_PTR(-ENOMEM); + + pll->base = base; + pll->shift = shift; + pll->mask = GENMASK(width - 1, 0) << shift; + pll->max = pll->mask + 1; + pll->m_offset = m_offset; + pll->half_m = half_m; + + clk = &pll->clk; + + ret = clk_register(clk, drv_name, name, parent_name); + if (ret) { + pr_err("Failed to register %s in %s: %d\n", name, __func__, ret); + kfree(pll); + return ERR_PTR(ret); + } + + return clk; +} + +U_BOOT_DRIVER(clk_adi_pll_generic) = { + .name = ADI_CLK_PLL_GENERIC, + .id = UCLASS_CLK, + .ops = &clk_sc5xx_cgu_pll_ops, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/adi/clk-adi-sc57x.c b/drivers/clk/adi/clk-adi-sc57x.c new file mode 100644 index 00000000000..b17563f0444 --- /dev/null +++ b/drivers/clk/adi/clk-adi-sc57x.c @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Author: Greg Malysa + * + * Ported from Linux: Nathan Barrett-Morrison + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; +static const char * const sharc0_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; +static const char * const sharc1_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; +static const char * const arm_sels[] = {"cclk1_0", "sysclk_0", "dummy", "dummy"}; +static const char * const cdu_ddr_sels[] = {"dclk_0", "dclk_1", "dummy", "dummy"}; +static const char * const can_sels[] = {"oclk_0", "oclk_1", "dclk_1", "oclk_0_half"}; +static const char * const spdif_sels[] = {"oclk_0", "oclk_1", "dclk_1", "dclk_0"}; +static const char * const gige_sels[] = {"sclk1_0", "sclk1_1", "cclk0_1", "oclk_0"}; +static const char * const sdio_sels[] = {"oclk_0_half", "cclk1_1_half", "cclk1_1", + "dclk_1"}; + +static int sc57x_clock_probe(struct udevice *dev) +{ + void __iomem *cgu0; + void __iomem *cgu1; + void __iomem *cdu; + int ret; + struct resource res; + + struct clk *clks[ADSP_SC57X_CLK_END]; + struct clk dummy, clkin0, clkin1; + + ret = dev_read_resource_byname(dev, "cgu0", &res); + if (ret) + return ret; + cgu0 = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "cgu1", &res); + if (ret) + return ret; + cgu1 = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "cdu", &res); + if (ret) + return ret; + cdu = devm_ioremap(dev, res.start, resource_size(&res)); + + // Input clock configuration + clk_get_by_name(dev, "dummy", &dummy); + clk_get_by_name(dev, "sys_clkin0", &clkin0); + clk_get_by_name(dev, "sys_clkin1", &clkin1); + + clks[ADSP_SC57X_CLK_DUMMY] = &dummy; + clks[ADSP_SC57X_CLK_SYS_CLKIN0] = &clkin0; + clks[ADSP_SC57X_CLK_SYS_CLKIN1] = &clkin1; + + clks[ADSP_SC57X_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, + 2, CLK_SET_RATE_PARENT, + cdu + CDU_CLKINSEL, 0, 1, 0); + + // CGU configuration and internal clocks + clks[ADSP_SC57X_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", + "sys_clkin0", + CLK_SET_RATE_PARENT, + cgu0 + CGU_CTL, 0, 1, 0); + clks[ADSP_SC57X_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", + "cgu1_in_sel", + CLK_SET_RATE_PARENT, + cgu1 + CGU_CTL, 0, 1, 0); + + // VCO output == PLL output + clks[ADSP_SC57X_CLK_CGU0_PLLCLK] = sc5xx_cgu_pll("cgu0_pllclk", "cgu0_df", + cgu0 + CGU_CTL, CGU_MSEL_SHIFT, + CGU_MSEL_WIDTH, 0, false); + clks[ADSP_SC57X_CLK_CGU1_PLLCLK] = sc5xx_cgu_pll("cgu1_pllclk", "cgu1_df", + cgu1 + CGU_CTL, CGU_MSEL_SHIFT, + CGU_MSEL_WIDTH, 0, false); + + // Dividers from pll output + clks[ADSP_SC57X_CLK_CGU0_CDIV] = cgu_divider("cgu0_cdiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 0, 5, 0); + clks[ADSP_SC57X_CLK_CGU0_SYSCLK] = cgu_divider("sysclk_0", "cgu0_pllclk", + cgu0 + CGU_DIV, 8, 5, 0); + clks[ADSP_SC57X_CLK_CGU0_DDIV] = cgu_divider("cgu0_ddiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 16, 5, 0); + clks[ADSP_SC57X_CLK_CGU0_ODIV] = cgu_divider("cgu0_odiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 22, 7, 0); + clks[ADSP_SC57X_CLK_CGU0_S0SELDIV] = cgu_divider("cgu0_s0seldiv", "sysclk_0", + cgu0 + CGU_DIV, 5, 3, 0); + clks[ADSP_SC57X_CLK_CGU0_S1SELDIV] = cgu_divider("cgu0_s1seldiv", "sysclk_0", + cgu0 + CGU_DIV, 13, 3, 0); + + clks[ADSP_SC57X_CLK_CGU1_CDIV] = cgu_divider("cgu1_cdiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 0, 5, 0); + clks[ADSP_SC57X_CLK_CGU1_SYSCLK] = cgu_divider("sysclk_1", "cgu1_pllclk", + cgu1 + CGU_DIV, 8, 5, 0); + clks[ADSP_SC57X_CLK_CGU1_DDIV] = cgu_divider("cgu1_ddiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 16, 5, 0); + clks[ADSP_SC57X_CLK_CGU1_ODIV] = cgu_divider("cgu1_odiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 22, 7, 0); + clks[ADSP_SC57X_CLK_CGU1_S0SELDIV] = cgu_divider("cgu1_s0seldiv", + "sysclk_1", cgu1 + CGU_DIV, 5, + 3, 0); + clks[ADSP_SC57X_CLK_CGU1_S1SELDIV] = cgu_divider("cgu1_s1seldiv", + "sysclk_1", cgu1 + CGU_DIV, 13, + 3, 0); + + // Gates to enable CGU outputs + clks[ADSP_SC57X_CLK_CGU0_CCLK0] = cgu_gate("cclk0_0", "cgu0_cdiv", + cgu0 + CGU_CCBF_DIS, 0); + clks[ADSP_SC57X_CLK_CGU0_CCLK1] = cgu_gate("cclk1_0", "cgu0_cdiv", + cgu1 + CGU_CCBF_DIS, 1); + clks[ADSP_SC57X_CLK_CGU0_OCLK] = cgu_gate("oclk_0", "cgu0_odiv", + cgu0 + CGU_SCBF_DIS, 3); + clks[ADSP_SC57X_CLK_CGU0_DCLK] = cgu_gate("dclk_0", "cgu0_ddiv", + cgu0 + CGU_SCBF_DIS, 2); + clks[ADSP_SC57X_CLK_CGU0_SCLK1] = cgu_gate("sclk1_0", "cgu0_s1seldiv", + cgu0 + CGU_SCBF_DIS, 1); + clks[ADSP_SC57X_CLK_CGU0_SCLK0] = cgu_gate("sclk0_0", "cgu0_s0seldiv", + cgu0 + CGU_SCBF_DIS, 0); + + clks[ADSP_SC57X_CLK_CGU1_CCLK0] = cgu_gate("cclk0_1", "cgu1_cdiv", + cgu1 + CGU_CCBF_DIS, 0); + clks[ADSP_SC57X_CLK_CGU1_CCLK1] = cgu_gate("cclk1_1", "cgu1_cdiv", + cgu1 + CGU_CCBF_DIS, 1); + clks[ADSP_SC57X_CLK_CGU1_OCLK] = cgu_gate("oclk_1", "cgu1_odiv", + cgu1 + CGU_SCBF_DIS, 3); + clks[ADSP_SC57X_CLK_CGU1_DCLK] = cgu_gate("dclk_1", "cgu1_ddiv", + cgu1 + CGU_SCBF_DIS, 2); + clks[ADSP_SC57X_CLK_CGU1_SCLK1] = cgu_gate("sclk1_1", "cgu1_s1seldiv", + cgu1 + CGU_SCBF_DIS, 1); + clks[ADSP_SC57X_CLK_CGU1_SCLK0] = cgu_gate("sclk0_1", "cgu1_s0seldiv", + cgu1 + CGU_SCBF_DIS, 0); + + // Extra half rate clocks generated in the CDU + clks[ADSP_SC57X_CLK_OCLK0_HALF] = clk_register_fixed_factor(NULL, "oclk_0_half", + "oclk_0", + CLK_SET_RATE_PARENT, + 1, 2); + clks[ADSP_SC57X_CLK_CCLK1_1_HALF] = clk_register_fixed_factor(NULL, + "cclk1_1_half", + "cclk1_1", + CLK_SET_RATE_PARENT, + 1, 2); + + // CDU output muxes + clks[ADSP_SC57X_CLK_SHARC0_SEL] = cdu_mux("sharc0_sel", cdu + CDU_CFG0, + sharc0_sels); + clks[ADSP_SC57X_CLK_SHARC1_SEL] = cdu_mux("sharc1_sel", cdu + CDU_CFG1, + sharc1_sels); + clks[ADSP_SC57X_CLK_ARM_SEL] = cdu_mux("arm_sel", cdu + CDU_CFG2, arm_sels); + clks[ADSP_SC57X_CLK_CDU_DDR_SEL] = cdu_mux("cdu_ddr_sel", cdu + CDU_CFG3, + cdu_ddr_sels); + clks[ADSP_SC57X_CLK_CAN_SEL] = cdu_mux("can_sel", cdu + CDU_CFG4, can_sels); + clks[ADSP_SC57X_CLK_SPDIF_SEL] = cdu_mux("spdif_sel", cdu + CDU_CFG5, spdif_sels); + clks[ADSP_SC57X_CLK_GIGE_SEL] = cdu_mux("gige_sel", cdu + CDU_CFG7, gige_sels); + clks[ADSP_SC57X_CLK_SDIO_SEL] = cdu_mux("sdio_sel", cdu + CDU_CFG9, sdio_sels); + + // CDU output enable gates + clks[ADSP_SC57X_CLK_SHARC0] = cdu_gate("sharc0", "sharc0_sel", cdu + CDU_CFG0, + CLK_IS_CRITICAL); + clks[ADSP_SC57X_CLK_SHARC1] = cdu_gate("sharc1", "sharc1_sel", cdu + CDU_CFG1, + CLK_IS_CRITICAL); + clks[ADSP_SC57X_CLK_ARM] = cdu_gate("arm", "arm_sel", cdu + CDU_CFG2, + CLK_IS_CRITICAL); + clks[ADSP_SC57X_CLK_CDU_DDR] = cdu_gate("cdu_ddr", "cdu_ddr_sel", cdu + CDU_CFG3, + CLK_IS_CRITICAL); + clks[ADSP_SC57X_CLK_CAN] = cdu_gate("can", "can_sel", cdu + CDU_CFG4, 0); + clks[ADSP_SC57X_CLK_SPDIF] = cdu_gate("spdif", "spdif_sel", cdu + CDU_CFG5, 0); + clks[ADSP_SC57X_CLK_GIGE] = cdu_gate("gige", "gige_sel", cdu + CDU_CFG7, 0); + clks[ADSP_SC57X_CLK_SDIO] = cdu_gate("sdio", "sdio_sel", cdu + CDU_CFG9, 0); + + ret = cdu_check_clocks(clks, ARRAY_SIZE(clks)); + if (ret) + pr_err("CDU error detected\n"); + + return ret; +} + +static const struct udevice_id adi_sc57x_clk_ids[] = { + { .compatible = "adi,sc57x-clocks" }, + { }, +}; + +U_BOOT_DRIVER(adi_sc57x_clk) = { + .name = "clk_adi_sc57x", + .id = UCLASS_CLK, + .of_match = adi_sc57x_clk_ids, + .ops = &adi_clk_ops, + .probe = sc57x_clock_probe, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/adi/clk-adi-sc58x.c b/drivers/clk/adi/clk-adi-sc58x.c new file mode 100644 index 00000000000..05a0feddec7 --- /dev/null +++ b/drivers/clk/adi/clk-adi-sc58x.c @@ -0,0 +1,222 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Author: Greg Malysa + * + * Ported from Linux: Nathan Barrett-Morrison + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; +static const char * const sharc0_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; +static const char * const sharc1_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; +static const char * const arm_sels[] = {"cclk1_0", "sysclk_0", "dummy", "dummy"}; +static const char * const cdu_ddr_sels[] = {"dclk_0", "dclk_1", "dummy", "dummy"}; +static const char * const can_sels[] = {"oclk_0", "oclk_1", "dclk_1", "dummy"}; +static const char * const spdif_sels[] = {"oclk_0", "oclk_1", "dclk_1", "dclk_0"}; +static const char * const reserved_sels[] = {"sclk0_0", "oclk_0", "dummy", "dummy"}; +static const char * const gige_sels[] = {"sclk0_0", "sclk1_1", "cclk0_1", "oclk_0"}; +static const char * const lp_sels[] = {"sclk0_0", "sclk0_1", "cclk1_1", "dclk_1"}; +static const char * const sdio_sels[] = {"oclk_0_half", "cclk1_1_half", "cclk1_1", + "dclk_1"}; + +static int sc58x_clock_probe(struct udevice *dev) +{ + void __iomem *cgu0; + void __iomem *cgu1; + void __iomem *cdu; + int ret; + struct resource res; + + struct clk *clks[ADSP_SC58X_CLK_END]; + struct clk dummy, clkin0, clkin1; + + ret = dev_read_resource_byname(dev, "cgu0", &res); + if (ret) + return ret; + cgu0 = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "cgu1", &res); + if (ret) + return ret; + cgu1 = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "cdu", &res); + if (ret) + return ret; + cdu = devm_ioremap(dev, res.start, resource_size(&res)); + + // Input clock configuration + clk_get_by_name(dev, "dummy", &dummy); + clk_get_by_name(dev, "sys_clkin0", &clkin0); + clk_get_by_name(dev, "sys_clkin1", &clkin1); + + clks[ADSP_SC58X_CLK_DUMMY] = &dummy; + clks[ADSP_SC58X_CLK_SYS_CLKIN0] = &clkin0; + clks[ADSP_SC58X_CLK_SYS_CLKIN1] = &clkin1; + + clks[ADSP_SC58X_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, + 2, CLK_SET_RATE_PARENT, + cdu + CDU_CLKINSEL, 0, 1, 0); + + // CGU configuration and internal clocks + clks[ADSP_SC58X_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", + "sys_clkin0", + CLK_SET_RATE_PARENT, + cgu0 + CGU_CTL, 0, 1, 0); + clks[ADSP_SC58X_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", + "cgu1_in_sel", + CLK_SET_RATE_PARENT, + cgu1 + CGU_CTL, 0, 1, 0); + + // VCO output inside PLL + clks[ADSP_SC58X_CLK_CGU0_VCO_OUT] = sc5xx_cgu_pll("cgu0_vco", "cgu0_df", + cgu0 + CGU_CTL, CGU_MSEL_SHIFT, + CGU_MSEL_WIDTH, 0, false); + clks[ADSP_SC58X_CLK_CGU1_VCO_OUT] = sc5xx_cgu_pll("cgu1_vco", "cgu1_df", + cgu1 + CGU_CTL, CGU_MSEL_SHIFT, + CGU_MSEL_WIDTH, 0, false); + + // Final PLL output + clks[ADSP_SC58X_CLK_CGU0_PLLCLK] = clk_register_fixed_factor(NULL, "cgu0_pllclk", + "cgu0_vco", + CLK_SET_RATE_PARENT, + 1, 1); + clks[ADSP_SC58X_CLK_CGU1_PLLCLK] = clk_register_fixed_factor(NULL, "cgu1_pllclk", + "cgu1_vco", + CLK_SET_RATE_PARENT, + 1, 1); + + // Dividers from pll output + clks[ADSP_SC58X_CLK_CGU0_CDIV] = cgu_divider("cgu0_cdiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 0, 5, 0); + clks[ADSP_SC58X_CLK_CGU0_SYSCLK] = cgu_divider("sysclk_0", "cgu0_pllclk", + cgu0 + CGU_DIV, 8, 5, 0); + clks[ADSP_SC58X_CLK_CGU0_DDIV] = cgu_divider("cgu0_ddiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 16, 5, 0); + clks[ADSP_SC58X_CLK_CGU0_ODIV] = cgu_divider("cgu0_odiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 22, 7, 0); + clks[ADSP_SC58X_CLK_CGU0_S0SELDIV] = cgu_divider("cgu0_s0seldiv", "sysclk_0", + cgu0 + CGU_DIV, 5, 3, 0); + clks[ADSP_SC58X_CLK_CGU0_S1SELDIV] = cgu_divider("cgu0_s1seldiv", "sysclk_0", + cgu0 + CGU_DIV, 13, 3, 0); + + clks[ADSP_SC58X_CLK_CGU1_CDIV] = cgu_divider("cgu1_cdiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 0, 5, 0); + clks[ADSP_SC58X_CLK_CGU1_SYSCLK] = cgu_divider("sysclk_1", "cgu1_pllclk", + cgu1 + CGU_DIV, 8, 5, 0); + clks[ADSP_SC58X_CLK_CGU1_DDIV] = cgu_divider("cgu1_ddiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 16, 5, 0); + clks[ADSP_SC58X_CLK_CGU1_ODIV] = cgu_divider("cgu1_odiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 22, 7, 0); + clks[ADSP_SC58X_CLK_CGU1_S0SELDIV] = cgu_divider("cgu1_s0seldiv", "sysclk_1", + cgu1 + CGU_DIV, 5, 3, 0); + clks[ADSP_SC58X_CLK_CGU1_S1SELDIV] = cgu_divider("cgu1_s1seldiv", "sysclk_1", + cgu1 + CGU_DIV, 13, 3, 0); + + // Gates to enable CGU outputs + clks[ADSP_SC58X_CLK_CGU0_CCLK0] = cgu_gate("cclk0_0", "cgu0_cdiv", + cgu0 + CGU_CCBF_DIS, 0); + clks[ADSP_SC58X_CLK_CGU0_CCLK1] = cgu_gate("cclk1_0", "cgu0_cdiv", + cgu1 + CGU_CCBF_DIS, 1); + clks[ADSP_SC58X_CLK_CGU0_OCLK] = cgu_gate("oclk_0", "cgu0_odiv", + cgu0 + CGU_SCBF_DIS, 3); + clks[ADSP_SC58X_CLK_CGU0_DCLK] = cgu_gate("dclk_0", "cgu0_ddiv", + cgu0 + CGU_SCBF_DIS, 2); + clks[ADSP_SC58X_CLK_CGU0_SCLK1] = cgu_gate("sclk1_0", "cgu0_s1seldiv", + cgu0 + CGU_SCBF_DIS, 1); + clks[ADSP_SC58X_CLK_CGU0_SCLK0] = cgu_gate("sclk0_0", "cgu0_s0seldiv", + cgu0 + CGU_SCBF_DIS, 0); + + clks[ADSP_SC58X_CLK_CGU1_CCLK0] = cgu_gate("cclk0_1", "cgu1_cdiv", + cgu1 + CGU_CCBF_DIS, 0); + clks[ADSP_SC58X_CLK_CGU1_CCLK1] = cgu_gate("cclk1_1", "cgu1_cdiv", + cgu1 + CGU_CCBF_DIS, 1); + clks[ADSP_SC58X_CLK_CGU1_OCLK] = cgu_gate("oclk_1", "cgu1_odiv", + cgu1 + CGU_SCBF_DIS, 3); + clks[ADSP_SC58X_CLK_CGU1_DCLK] = cgu_gate("dclk_1", "cgu1_ddiv", + cgu1 + CGU_SCBF_DIS, 2); + clks[ADSP_SC58X_CLK_CGU1_SCLK1] = cgu_gate("sclk1_1", "cgu1_s1seldiv", + cgu1 + CGU_SCBF_DIS, 1); + clks[ADSP_SC58X_CLK_CGU1_SCLK0] = cgu_gate("sclk0_1", "cgu1_s0seldiv", + cgu1 + CGU_SCBF_DIS, 0); + + // Extra half rate clocks generated in the CDU + clks[ADSP_SC58X_CLK_OCLK0_HALF] = clk_register_fixed_factor(NULL, "oclk_0_half", + "oclk_0", + CLK_SET_RATE_PARENT, + 1, 2); + clks[ADSP_SC58X_CLK_CCLK1_1_HALF] = clk_register_fixed_factor(NULL, + "cclk1_1_half", + "cclk1_1", + CLK_SET_RATE_PARENT, + 1, 2); + + // CDU output muxes + clks[ADSP_SC58X_CLK_SHARC0_SEL] = cdu_mux("sharc0_sel", cdu + CDU_CFG0, + sharc0_sels); + clks[ADSP_SC58X_CLK_SHARC1_SEL] = cdu_mux("sharc1_sel", cdu + CDU_CFG1, + sharc1_sels); + clks[ADSP_SC58X_CLK_ARM_SEL] = cdu_mux("arm_sel", cdu + CDU_CFG2, arm_sels); + clks[ADSP_SC58X_CLK_CDU_DDR_SEL] = cdu_mux("cdu_ddr_sel", cdu + CDU_CFG3, + cdu_ddr_sels); + clks[ADSP_SC58X_CLK_CAN_SEL] = cdu_mux("can_sel", cdu + CDU_CFG4, can_sels); + clks[ADSP_SC58X_CLK_SPDIF_SEL] = cdu_mux("spdif_sel", cdu + CDU_CFG5, spdif_sels); + clks[ADSP_SC58X_CLK_RESERVED_SEL] = cdu_mux("reserved_sel", cdu + CDU_CFG6, + reserved_sels); + clks[ADSP_SC58X_CLK_GIGE_SEL] = cdu_mux("gige_sel", cdu + CDU_CFG7, gige_sels); + clks[ADSP_SC58X_CLK_LP_SEL] = cdu_mux("lp_sel", cdu + CDU_CFG8, lp_sels); + clks[ADSP_SC58X_CLK_SDIO_SEL] = cdu_mux("sdio_sel", cdu + CDU_CFG9, sdio_sels); + + // CDU output enable gates + clks[ADSP_SC58X_CLK_SHARC0] = cdu_gate("sharc0", "sharc0_sel", cdu + CDU_CFG0, + CLK_IS_CRITICAL); + clks[ADSP_SC58X_CLK_SHARC1] = cdu_gate("sharc1", "sharc1_sel", cdu + CDU_CFG1, + CLK_IS_CRITICAL); + clks[ADSP_SC58X_CLK_ARM] = cdu_gate("arm", "arm_sel", cdu + CDU_CFG2, + CLK_IS_CRITICAL); + clks[ADSP_SC58X_CLK_CDU_DDR] = cdu_gate("cdu_ddr", "cdu_ddr_sel", cdu + CDU_CFG3, + CLK_IS_CRITICAL); + clks[ADSP_SC58X_CLK_CAN] = cdu_gate("can", "can_sel", cdu + CDU_CFG4, 0); + clks[ADSP_SC58X_CLK_SPDIF] = cdu_gate("spdif", "spdif_sel", cdu + CDU_CFG5, 0); + clks[ADSP_SC58X_CLK_RESERVED] = cdu_gate("reserved", "reserved_sel", + cdu + CDU_CFG6, 0); + clks[ADSP_SC58X_CLK_GIGE] = cdu_gate("gige", "gige_sel", cdu + CDU_CFG7, 0); + clks[ADSP_SC58X_CLK_LP] = cdu_gate("lp", "lp_sel", cdu + CDU_CFG8, 0); + clks[ADSP_SC58X_CLK_SDIO] = cdu_gate("sdio", "sdio_sel", cdu + CDU_CFG9, 0); + + ret = cdu_check_clocks(clks, ARRAY_SIZE(clks)); + if (ret) + pr_err("CDU error detected\n"); + + return ret; +} + +static const struct udevice_id adi_sc58x_clk_ids[] = { + { .compatible = "adi,sc58x-clocks" }, + { }, +}; + +U_BOOT_DRIVER(adi_sc58x_clk) = { + .name = "clk_adi_sc58x", + .id = UCLASS_CLK, + .of_match = adi_sc58x_clk_ids, + .ops = &adi_clk_ops, + .probe = sc58x_clock_probe, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/adi/clk-adi-sc594.c b/drivers/clk/adi/clk-adi-sc594.c new file mode 100644 index 00000000000..c80bbf9728d --- /dev/null +++ b/drivers/clk/adi/clk-adi-sc594.c @@ -0,0 +1,231 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Author: Greg Malysa + * + * Ported from Linux: Nathan Barrett-Morrison + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; +static const char * const cgu0_s1sels[] = {"cgu0_s1seldiv", "cgu0_s1selexdiv"}; +static const char * const cgu1_s1sels[] = {"cgu1_s1seldiv", "cgu1_s1selexdiv"}; +static const char * const sharc0_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; +static const char * const sharc1_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; +static const char * const arm_sels[] = {"cclk1_0", "dummy", "dummy", "dummy"}; +static const char * const cdu_ddr_sels[] = {"dclk_0", "dclk_1", "dummy", "dummy"}; +static const char * const can_sels[] = {"oclk_0", "oclk_1", "dummy", "dummy"}; +static const char * const spdif_sels[] = {"sclk1_0", "dummy", "dummy", "dummy"}; +static const char * const spi_sels[] = {"sclk0_0", "oclk_0", "dummy", "dummy"}; +static const char * const gige_sels[] = {"sclk0_0", "sclk0_1", "cclk0_1", "dummy"}; +static const char * const lp_sels[] = {"oclk_0", "sclk0_0", "cclk0_1", "dummy"}; +static const char * const lpddr_sels[] = {"oclk_0", "dclk_0", "sysclkin_1", "dummy"}; +static const char * const ospi_sels[] = {"sysclk_0", "sclk0_0", "sclk1_1", "dummy"}; +static const char * const trace_sels[] = {"sclk0_0", "dummy", "dummy", "dummy"}; + +static int sc594_clock_probe(struct udevice *dev) +{ + void __iomem *cgu0; + void __iomem *cgu1; + void __iomem *cdu; + int ret; + struct resource res; + + struct clk *clks[ADSP_SC594_CLK_END]; + struct clk dummy, clkin0, clkin1; + + ret = dev_read_resource_byname(dev, "cgu0", &res); + if (ret) + return ret; + cgu0 = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "cgu1", &res); + if (ret) + return ret; + cgu1 = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "cdu", &res); + if (ret) + return ret; + cdu = devm_ioremap(dev, res.start, resource_size(&res)); + + // Input clock configuration + clk_get_by_name(dev, "dummy", &dummy); + clk_get_by_name(dev, "sys_clkin0", &clkin0); + clk_get_by_name(dev, "sys_clkin1", &clkin1); + + clks[ADSP_SC594_CLK_DUMMY] = &dummy; + clks[ADSP_SC594_CLK_SYS_CLKIN0] = &clkin0; + clks[ADSP_SC594_CLK_SYS_CLKIN1] = &clkin1; + clks[ADSP_SC594_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, + 2, CLK_SET_RATE_PARENT, + cdu + CDU_CLKINSEL, 0, 1, 0); + + // CGU configuration and internal clocks + clks[ADSP_SC594_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", + "sys_clkin0", + CLK_SET_RATE_PARENT, + cgu0 + CGU_CTL, 0, 1, 0); + clks[ADSP_SC594_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", + "cgu1_in_sel", + CLK_SET_RATE_PARENT, + cgu1 + CGU_CTL, 0, 1, 0); + + // VCO output inside PLL + clks[ADSP_SC594_CLK_CGU0_VCO_OUT] = sc5xx_cgu_pll("cgu0_vco", "cgu0_df", + cgu0 + CGU_CTL, CGU_MSEL_SHIFT, + CGU_MSEL_WIDTH, 0, false); + clks[ADSP_SC594_CLK_CGU1_VCO_OUT] = sc5xx_cgu_pll("cgu1_vco", "cgu1_df", + cgu1 + CGU_CTL, CGU_MSEL_SHIFT, + CGU_MSEL_WIDTH, 0, false); + + // Final PLL output + clks[ADSP_SC594_CLK_CGU0_PLLCLK] = clk_register_fixed_factor(NULL, "cgu0_pllclk", + "cgu0_vco", + CLK_SET_RATE_PARENT, + 1, 1); + clks[ADSP_SC594_CLK_CGU1_PLLCLK] = clk_register_fixed_factor(NULL, "cgu1_pllclk", + "cgu1_vco", + CLK_SET_RATE_PARENT, + 1, 1); + + // Dividers from pll output + clks[ADSP_SC594_CLK_CGU0_CDIV] = cgu_divider("cgu0_cdiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 0, 5, 0); + clks[ADSP_SC594_CLK_CGU0_SYSCLK] = cgu_divider("sysclk_0", "cgu0_pllclk", + cgu0 + CGU_DIV, 8, 5, 0); + clks[ADSP_SC594_CLK_CGU0_DDIV] = cgu_divider("cgu0_ddiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 16, 5, 0); + clks[ADSP_SC594_CLK_CGU0_ODIV] = cgu_divider("cgu0_odiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 22, 7, 0); + clks[ADSP_SC594_CLK_CGU0_S0SELDIV] = cgu_divider("cgu0_s0seldiv", "sysclk_0", + cgu0 + CGU_DIV, 5, 3, 0); + clks[ADSP_SC594_CLK_CGU0_S1SELDIV] = cgu_divider("cgu0_s1seldiv", "sysclk_0", + cgu0 + CGU_DIV, 13, 3, 0); + clks[ADSP_SC594_CLK_CGU0_S1SELEXDIV] = cgu_divider("cgu0_s1selexdiv", + "cgu0_pllclk", + cgu0 + CGU_DIVEX, 16, 8, 0); + clks[ADSP_SC594_CLK_CGU0_S1SEL] = clk_register_mux(NULL, "cgu0_sclk1sel", + cgu0_s1sels, 2, + CLK_SET_RATE_PARENT, + cgu0 + CGU_CTL, 17, 1, 0); + + clks[ADSP_SC594_CLK_CGU1_CDIV] = cgu_divider("cgu1_cdiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 0, 5, 0); + clks[ADSP_SC594_CLK_CGU1_SYSCLK] = cgu_divider("sysclk_1", "cgu1_pllclk", + cgu1 + CGU_DIV, 8, 5, 0); + clks[ADSP_SC594_CLK_CGU1_DDIV] = cgu_divider("cgu1_ddiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 16, 5, 0); + clks[ADSP_SC594_CLK_CGU1_ODIV] = cgu_divider("cgu1_odiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 22, 7, 0); + clks[ADSP_SC594_CLK_CGU1_S0SELDIV] = cgu_divider("cgu1_s0seldiv", "sysclk_1", + cgu1 + CGU_DIV, 5, 3, 0); + clks[ADSP_SC594_CLK_CGU1_S1SELDIV] = cgu_divider("cgu1_s1seldiv", "sysclk_1", + cgu1 + CGU_DIV, 13, 3, 0); + clks[ADSP_SC594_CLK_CGU1_S1SELEXDIV] = cgu_divider("cgu1_s1selexdiv", + "cgu1_pllclk", + cgu1 + CGU_DIVEX, 16, 8, 0); + clks[ADSP_SC594_CLK_CGU1_S1SEL] = clk_register_mux(NULL, "cgu1_sclk1sel", + cgu1_s1sels, 2, + CLK_SET_RATE_PARENT, + cgu1 + CGU_CTL, 17, 1, 0); + + // Gates to enable CGU outputs + clks[ADSP_SC594_CLK_CGU0_CCLK0] = cgu_gate("cclk0_0", "cgu0_cdiv", + cgu0 + CGU_CCBF_DIS, 0); + clks[ADSP_SC594_CLK_CGU0_CCLK1] = cgu_gate("cclk1_0", "cgu0_cdiv", + cgu1 + CGU_CCBF_DIS, 1); + clks[ADSP_SC594_CLK_CGU0_OCLK] = cgu_gate("oclk_0", "cgu0_odiv", + cgu0 + CGU_SCBF_DIS, 3); + clks[ADSP_SC594_CLK_CGU0_DCLK] = cgu_gate("dclk_0", "cgu0_ddiv", + cgu0 + CGU_SCBF_DIS, 2); + clks[ADSP_SC594_CLK_CGU0_SCLK1] = cgu_gate("sclk1_0", "cgu0_sclk1sel", + cgu0 + CGU_SCBF_DIS, 1); + clks[ADSP_SC594_CLK_CGU0_SCLK0] = cgu_gate("sclk0_0", "cgu0_s0seldiv", + cgu0 + CGU_SCBF_DIS, 0); + + clks[ADSP_SC594_CLK_CGU1_CCLK0] = cgu_gate("cclk0_1", "cgu1_cdiv", + cgu1 + CGU_CCBF_DIS, 0); + clks[ADSP_SC594_CLK_CGU1_CCLK1] = cgu_gate("cclk1_1", "cgu1_cdiv", + cgu1 + CGU_CCBF_DIS, 1); + clks[ADSP_SC594_CLK_CGU1_OCLK] = cgu_gate("oclk_1", "cgu1_odiv", + cgu1 + CGU_SCBF_DIS, 3); + clks[ADSP_SC594_CLK_CGU1_DCLK] = cgu_gate("dclk_1", "cgu1_ddiv", + cgu1 + CGU_SCBF_DIS, 2); + clks[ADSP_SC594_CLK_CGU1_SCLK1] = cgu_gate("sclk1_1", "cgu1_sclk1sel", + cgu1 + CGU_SCBF_DIS, 1); + clks[ADSP_SC594_CLK_CGU1_SCLK0] = cgu_gate("sclk0_1", "cgu1_s0seldiv", + cgu1 + CGU_SCBF_DIS, 0); + + // CDU output muxes + clks[ADSP_SC594_CLK_SHARC0_SEL] = cdu_mux("sharc0_sel", cdu + CDU_CFG0, + sharc0_sels); + clks[ADSP_SC594_CLK_SHARC1_SEL] = cdu_mux("sharc1_sel", cdu + CDU_CFG1, + sharc1_sels); + clks[ADSP_SC594_CLK_ARM_SEL] = cdu_mux("arm_sel", cdu + CDU_CFG2, arm_sels); + clks[ADSP_SC594_CLK_CDU_DDR_SEL] = cdu_mux("cdu_ddr_sel", cdu + CDU_CFG3, + cdu_ddr_sels); + clks[ADSP_SC594_CLK_CAN_SEL] = cdu_mux("can_sel", cdu + CDU_CFG4, can_sels); + clks[ADSP_SC594_CLK_SPDIF_SEL] = cdu_mux("spdif_sel", cdu + CDU_CFG5, spdif_sels); + clks[ADSP_SC594_CLK_RESERVED_SEL] = cdu_mux("spi_sel", cdu + CDU_CFG6, spi_sels); + clks[ADSP_SC594_CLK_GIGE_SEL] = cdu_mux("gige_sel", cdu + CDU_CFG7, gige_sels); + clks[ADSP_SC594_CLK_LP_SEL] = cdu_mux("lp_sel", cdu + CDU_CFG8, lp_sels); + clks[ADSP_SC594_CLK_LPDDR_SEL] = cdu_mux("lpddr_sel", cdu + CDU_CFG9, lpddr_sels); + clks[ADSP_SC594_CLK_OSPI_SEL] = cdu_mux("ospi_sel", cdu + CDU_CFG10, + ospi_sels); + clks[ADSP_SC594_CLK_TRACE_SEL] = cdu_mux("trace_sel", cdu + CDU_CFG12, + trace_sels); + + // CDU output enable gates + clks[ADSP_SC594_CLK_SHARC0] = cdu_gate("sharc0", "sharc0_sel", + cdu + CDU_CFG0, CLK_IS_CRITICAL); + clks[ADSP_SC594_CLK_SHARC1] = cdu_gate("sharc1", "sharc1_sel", + cdu + CDU_CFG1, CLK_IS_CRITICAL); + clks[ADSP_SC594_CLK_ARM] = cdu_gate("arm", "arm_sel", cdu + CDU_CFG2, + CLK_IS_CRITICAL); + clks[ADSP_SC594_CLK_CDU_DDR] = cdu_gate("cdu_ddr", "cdu_ddr_sel", + cdu + CDU_CFG3, CLK_IS_CRITICAL); + clks[ADSP_SC594_CLK_CAN] = cdu_gate("can", "can_sel", cdu + CDU_CFG4, 0); + clks[ADSP_SC594_CLK_SPDIF] = cdu_gate("spdif", "spdif_sel", cdu + CDU_CFG5, 0); + clks[ADSP_SC594_CLK_SPI] = cdu_gate("spi", "spi_sel", cdu + CDU_CFG6, 0); + clks[ADSP_SC594_CLK_GIGE] = cdu_gate("gige", "gige_sel", cdu + CDU_CFG7, 0); + clks[ADSP_SC594_CLK_LP] = cdu_gate("lp", "lp_sel", cdu + CDU_CFG8, 0); + clks[ADSP_SC594_CLK_LPDDR] = cdu_gate("lpddr", "lpddr_sel", cdu + CDU_CFG9, 0); + clks[ADSP_SC594_CLK_OSPI] = cdu_gate("ospi", "ospi_sel", cdu + CDU_CFG10, 0); + clks[ADSP_SC594_CLK_TRACE] = cdu_gate("trace", "trace_sel", cdu + CDU_CFG12, 0); + + ret = cdu_check_clocks(clks, ARRAY_SIZE(clks)); + if (ret) + pr_err("CDU error detected\n"); + + return ret; +} + +static const struct udevice_id adi_sc594_clk_ids[] = { + { .compatible = "adi,sc594-clocks" }, + { }, +}; + +U_BOOT_DRIVER(adi_sc594_clk) = { + .name = "clk_adi_sc594", + .id = UCLASS_CLK, + .of_match = adi_sc594_clk_ids, + .ops = &adi_clk_ops, + .probe = sc594_clock_probe, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/adi/clk-adi-sc598.c b/drivers/clk/adi/clk-adi-sc598.c new file mode 100644 index 00000000000..d4a16ac9603 --- /dev/null +++ b/drivers/clk/adi/clk-adi-sc598.c @@ -0,0 +1,308 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Author: Greg Malysa + * + * Ported from Linux: Nathan Barrett-Morrison + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clk.h" + +static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; +static const char * const cgu0_s1sels[] = {"cgu0_s1seldiv", "cgu0_s1selexdiv"}; +static const char * const cgu1_s0sels[] = {"cgu1_s0seldiv", "cgu1_s0selexdiv"}; +static const char * const cgu1_s1sels[] = {"cgu1_s1seldiv", "cgu1_s1selexdiv"}; +static const char * const sharc0_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; +static const char * const sharc1_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; +static const char * const arm_sels[] = {"dummy", "dummy", "cclk2_0", "cclk2_1"}; +static const char * const cdu_ddr_sels[] = {"dclk_0", "dclk_1", "dummy", "dummy"}; +static const char * const can_sels[] = {"dummy", "oclk_1", "dummy", "dummy"}; +static const char * const spdif_sels[] = {"sclk1_0", "dummy", "dummy", "dummy"}; +static const char * const spi_sels[] = {"sclk0_0", "oclk_0", "dummy", "dummy"}; +static const char * const gige_sels[] = {"sclk0_0", "sclk0_1", "dummy", "dummy"}; +static const char * const lp_sels[] = {"oclk_0", "sclk0_0", "cclk0_1", "dummy"}; +static const char * const lp_ddr_sels[] = {"oclk_0", "dclk_0", "sysclk_1", "dummy"}; +static const char * const ospi_refclk_sels[] = {"sysclk_0", "sclk0_0", "sclk1_1", + "dummy"}; +static const char * const trace_sels[] = {"sclk0_0", "dummy", "dummy", "dummy"}; +static const char * const emmc_sels[] = {"oclk_0", "sclk0_1", "dclk_0_half", + "dclk_1_half"}; +static const char * const emmc_timer_sels[] = {"dummy", "sclk1_1_half", "dummy", + "dummy"}; +static const char * const ddr_sels[] = {"cdu_ddr", "3pll_ddiv"}; + +static int sc598_clock_probe(struct udevice *dev) +{ + void __iomem *cgu0; + void __iomem *cgu1; + void __iomem *cdu; + void __iomem *pll3; + int ret; + struct resource res; + + struct clk *clks[ADSP_SC598_CLK_END]; + struct clk dummy, clkin0, clkin1; + + ret = dev_read_resource_byname(dev, "cgu0", &res); + if (ret) + return ret; + cgu0 = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "cgu1", &res); + if (ret) + return ret; + cgu1 = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "cdu", &res); + if (ret) + return ret; + cdu = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "pll3", &res); + if (ret) + return ret; + pll3 = devm_ioremap(dev, res.start, resource_size(&res)); + + // We only access this one register for pll3 + pll3 = pll3 + PLL3_OFFSET; + + // Input clock configuration + clk_get_by_name(dev, "dummy", &dummy); + clk_get_by_name(dev, "sys_clkin0", &clkin0); + clk_get_by_name(dev, "sys_clkin1", &clkin1); + + clks[ADSP_SC598_CLK_DUMMY] = &dummy; + clks[ADSP_SC598_CLK_SYS_CLKIN0] = &clkin0; + clks[ADSP_SC598_CLK_SYS_CLKIN1] = &clkin1; + + clks[ADSP_SC598_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, + 2, CLK_SET_RATE_PARENT, + cdu + CDU_CLKINSEL, 0, 1, 0); + + // 3rd pll reuses cgu1 clk in selection, feeds directly into 3pll df + // changing the cgu1 in sel mux will affect 3pll so reuse the same clocks + + // CGU configuration and internal clocks + clks[ADSP_SC598_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", + "sys_clkin0", + CLK_SET_RATE_PARENT, + cgu0 + CGU_CTL, 0, 1, 0); + clks[ADSP_SC598_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", + "cgu1_in_sel", + CLK_SET_RATE_PARENT, + cgu1 + CGU_CTL, 0, 1, 0); + clks[ADSP_SC598_CLK_3PLL_PLL_IN] = clk_register_divider(NULL, "3pll_df", + "cgu1_in_sel", + CLK_SET_RATE_PARENT, + pll3, 3, 1, 0); + + // VCO output inside PLL + clks[ADSP_SC598_CLK_CGU0_VCO_OUT] = sc5xx_cgu_pll("cgu0_vco", "cgu0_df", + cgu0 + CGU_CTL, CGU_MSEL_SHIFT, + CGU_MSEL_WIDTH, 0, true); + clks[ADSP_SC598_CLK_CGU1_VCO_OUT] = sc5xx_cgu_pll("cgu1_vco", "cgu1_df", + cgu1 + CGU_CTL, CGU_MSEL_SHIFT, + CGU_MSEL_WIDTH, 0, true); + clks[ADSP_SC598_CLK_3PLL_VCO_OUT] = sc5xx_cgu_pll("3pll_vco", "3pll_df", + pll3, PLL3_MSEL_SHIFT, + PLL3_MSEL_WIDTH, 1, true); + + // Final PLL output + clks[ADSP_SC598_CLK_CGU0_PLLCLK] = clk_register_fixed_factor(NULL, "cgu0_pllclk", + "cgu0_vco", + CLK_SET_RATE_PARENT, + 1, 2); + clks[ADSP_SC598_CLK_CGU1_PLLCLK] = clk_register_fixed_factor(NULL, "cgu1_pllclk", + "cgu1_vco", + CLK_SET_RATE_PARENT, + 1, 2); + clks[ADSP_SC598_CLK_3PLL_PLLCLK] = clk_register_fixed_factor(NULL, "3pll_pllclk", + "3pll_vco", + CLK_SET_RATE_PARENT, + 1, 2); + + // Dividers from pll output + clks[ADSP_SC598_CLK_CGU0_CDIV] = cgu_divider("cgu0_cdiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 0, 5, 0); + clks[ADSP_SC598_CLK_CGU0_SYSCLK] = cgu_divider("sysclk_0", "cgu0_pllclk", + cgu0 + CGU_DIV, 8, 5, 0); + clks[ADSP_SC598_CLK_CGU0_DDIV] = cgu_divider("cgu0_ddiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 16, 5, 0); + clks[ADSP_SC598_CLK_CGU0_ODIV] = cgu_divider("cgu0_odiv", "cgu0_pllclk", + cgu0 + CGU_DIV, 22, 7, 0); + clks[ADSP_SC598_CLK_CGU0_S0SELDIV] = cgu_divider("cgu0_s0seldiv", "sysclk_0", + cgu0 + CGU_DIV, 5, 3, 0); + clks[ADSP_SC598_CLK_CGU0_S1SELDIV] = cgu_divider("cgu0_s1seldiv", "sysclk_0", + cgu0 + CGU_DIV, 13, 3, 0); + clks[ADSP_SC598_CLK_CGU0_S1SELEXDIV] = cgu_divider("cgu0_s1selexdiv", + "cgu0_pllclk", + cgu0 + CGU_DIVEX, 16, 8, 0); + clks[ADSP_SC598_CLK_CGU0_S1SEL] = clk_register_mux(NULL, "cgu0_sclk1sel", + cgu0_s1sels, 2, + CLK_SET_RATE_PARENT, + cgu0 + CGU_CTL, 17, 1, 0); + clks[ADSP_SC598_CLK_CGU0_CCLK2] = clk_register_fixed_factor(NULL, "cclk2_0", + "cgu0_vco", + CLK_SET_RATE_PARENT, + 1, 3); + + clks[ADSP_SC598_CLK_CGU1_CDIV] = cgu_divider("cgu1_cdiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 0, 5, 0); + clks[ADSP_SC598_CLK_CGU1_SYSCLK] = cgu_divider("sysclk_1", "cgu1_pllclk", + cgu1 + CGU_DIV, 8, 5, 0); + clks[ADSP_SC598_CLK_CGU1_DDIV] = cgu_divider("cgu1_ddiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 16, 5, 0); + clks[ADSP_SC598_CLK_CGU1_ODIV] = cgu_divider("cgu1_odiv", "cgu1_pllclk", + cgu1 + CGU_DIV, 22, 7, 0); + clks[ADSP_SC598_CLK_CGU1_S0SELDIV] = cgu_divider("cgu1_s0seldiv", "sysclk_1", + cgu1 + CGU_DIV, 5, 3, 0); + clks[ADSP_SC598_CLK_CGU1_S1SELDIV] = cgu_divider("cgu1_s1seldiv", "sysclk_1", + cgu1 + CGU_DIV, 13, 3, 0); + clks[ADSP_SC598_CLK_CGU1_S0SELEXDIV] = cgu_divider("cgu1_s0selexdiv", + "cgu1_pllclk", + cgu1 + CGU_DIVEX, 0, 8, 0); + clks[ADSP_SC598_CLK_CGU1_S1SELEXDIV] = cgu_divider("cgu1_s1selexdiv", + "cgu1_pllclk", + cgu1 + CGU_DIVEX, 16, 8, 0); + clks[ADSP_SC598_CLK_CGU1_S0SEL] = clk_register_mux(NULL, "cgu1_sclk0sel", + cgu1_s0sels, 2, + CLK_SET_RATE_PARENT, + cgu1 + CGU_CTL, 16, 1, 0); + clks[ADSP_SC598_CLK_CGU1_S1SEL] = clk_register_mux(NULL, "cgu1_sclk1sel", + cgu1_s1sels, 2, + CLK_SET_RATE_PARENT, + cgu1 + CGU_CTL, 17, 1, 0); + clks[ADSP_SC598_CLK_CGU1_CCLK2] = clk_register_fixed_factor(NULL, "cclk2_1", + "cgu1_vco", + CLK_SET_RATE_PARENT, + 1, 3); + + clks[ADSP_SC598_CLK_3PLL_DDIV] = clk_register_divider(NULL, "3pll_ddiv", + "3pll_pllclk", + CLK_SET_RATE_PARENT, pll3, + 12, 5, 0); + + // Gates to enable CGU outputs + clks[ADSP_SC598_CLK_CGU0_CCLK0] = cgu_gate("cclk0_0", "cgu0_cdiv", + cgu0 + CGU_CCBF_DIS, 0); + clks[ADSP_SC598_CLK_CGU0_OCLK] = cgu_gate("oclk_0", "cgu0_odiv", + cgu0 + CGU_SCBF_DIS, 3); + clks[ADSP_SC598_CLK_CGU0_DCLK] = cgu_gate("dclk_0", "cgu0_ddiv", + cgu0 + CGU_SCBF_DIS, 2); + clks[ADSP_SC598_CLK_CGU0_SCLK1] = cgu_gate("sclk1_0", "cgu0_sclk1sel", + cgu0 + CGU_SCBF_DIS, 1); + clks[ADSP_SC598_CLK_CGU0_SCLK0] = cgu_gate("sclk0_0", "cgu0_s0seldiv", + cgu0 + CGU_SCBF_DIS, 0); + + clks[ADSP_SC598_CLK_CGU1_CCLK0] = cgu_gate("cclk0_1", "cgu1_cdiv", + cgu1 + CGU_CCBF_DIS, 0); + clks[ADSP_SC598_CLK_CGU1_OCLK] = cgu_gate("oclk_1", "cgu1_odiv", + cgu1 + CGU_SCBF_DIS, 3); + clks[ADSP_SC598_CLK_CGU1_DCLK] = cgu_gate("dclk_1", "cgu1_ddiv", + cgu1 + CGU_SCBF_DIS, 2); + clks[ADSP_SC598_CLK_CGU1_SCLK1] = cgu_gate("sclk1_1", "cgu1_sclk1sel", + cgu1 + CGU_SCBF_DIS, 1); + clks[ADSP_SC598_CLK_CGU1_SCLK0] = cgu_gate("sclk0_1", "cgu1_sclk0sel", + cgu1 + CGU_SCBF_DIS, 0); + + // Extra half rate clocks generated in the CDU + clks[ADSP_SC598_CLK_DCLK0_HALF] = clk_register_fixed_factor(NULL, "dclk_0_half", + "dclk_0", + CLK_SET_RATE_PARENT, + 1, 2); + clks[ADSP_SC598_CLK_DCLK1_HALF] = clk_register_fixed_factor(NULL, "dclk_1_half", + "dclk_1", + CLK_SET_RATE_PARENT, + 1, 2); + clks[ADSP_SC598_CLK_CGU1_SCLK1_HALF] = clk_register_fixed_factor(NULL, + "sclk1_1_half", + "sclk1_1", + CLK_SET_RATE_PARENT, + 1, 2); + + // CDU output muxes + clks[ADSP_SC598_CLK_SHARC0_SEL] = cdu_mux("sharc0_sel", cdu + CDU_CFG0, + sharc0_sels); + clks[ADSP_SC598_CLK_SHARC1_SEL] = cdu_mux("sharc1_sel", cdu + CDU_CFG1, + sharc1_sels); + clks[ADSP_SC598_CLK_ARM_SEL] = cdu_mux("arm_sel", cdu + CDU_CFG2, arm_sels); + clks[ADSP_SC598_CLK_CDU_DDR_SEL] = cdu_mux("cdu_ddr_sel", cdu + CDU_CFG3, + cdu_ddr_sels); + clks[ADSP_SC598_CLK_CAN_SEL] = cdu_mux("can_sel", cdu + CDU_CFG4, can_sels); + clks[ADSP_SC598_CLK_SPDIF_SEL] = cdu_mux("spdif_sel", cdu + CDU_CFG5, spdif_sels); + clks[ADSP_SC598_CLK_SPI_SEL] = cdu_mux("spi_sel", cdu + CDU_CFG6, spi_sels); + clks[ADSP_SC598_CLK_GIGE_SEL] = cdu_mux("gige_sel", cdu + CDU_CFG7, gige_sels); + clks[ADSP_SC598_CLK_LP_SEL] = cdu_mux("lp_sel", cdu + CDU_CFG8, lp_sels); + clks[ADSP_SC598_CLK_LP_DDR_SEL] = cdu_mux("lp_ddr_sel", cdu + CDU_CFG9, + lp_ddr_sels); + clks[ADSP_SC598_CLK_OSPI_REFCLK_SEL] = cdu_mux("ospi_refclk_sel", cdu + CDU_CFG10, + ospi_refclk_sels); + clks[ADSP_SC598_CLK_TRACE_SEL] = cdu_mux("trace_sel", cdu + CDU_CFG12, + trace_sels); + clks[ADSP_SC598_CLK_EMMC_SEL] = cdu_mux("emmc_sel", cdu + CDU_CFG13, emmc_sels); + clks[ADSP_SC598_CLK_EMMC_TIMER_QMC_SEL] = cdu_mux("emmc_timer_qmc_sel", + cdu + CDU_CFG14, + emmc_timer_sels); + + // CDU output enable gates + clks[ADSP_SC598_CLK_SHARC0] = cdu_gate("sharc0", "sharc0_sel", cdu + CDU_CFG0, + CLK_IS_CRITICAL); + clks[ADSP_SC598_CLK_SHARC1] = cdu_gate("sharc1", "sharc1_sel", cdu + CDU_CFG1, + CLK_IS_CRITICAL); + clks[ADSP_SC598_CLK_ARM] = cdu_gate("arm", "arm_sel", cdu + CDU_CFG2, + CLK_IS_CRITICAL); + clks[ADSP_SC598_CLK_CDU_DDR] = cdu_gate("cdu_ddr", "cdu_ddr_sel", cdu + CDU_CFG3, + 0); + clks[ADSP_SC598_CLK_CAN] = cdu_gate("can", "can_sel", cdu + CDU_CFG4, 0); + clks[ADSP_SC598_CLK_SPDIF] = cdu_gate("spdif", "spdif_sel", cdu + CDU_CFG5, 0); + clks[ADSP_SC598_CLK_SPI] = cdu_gate("spi", "spi_sel", cdu + CDU_CFG6, 0); + clks[ADSP_SC598_CLK_GIGE] = cdu_gate("gige", "gige_sel", cdu + CDU_CFG7, 0); + clks[ADSP_SC598_CLK_LP] = cdu_gate("lp", "lp_sel", cdu + CDU_CFG8, 0); + clks[ADSP_SC598_CLK_LP_DDR] = cdu_gate("lp_ddr", "lp_ddr_sel", cdu + CDU_CFG9, 0); + clks[ADSP_SC598_CLK_OSPI_REFCLK] = cdu_gate("ospi_refclk", "ospi_refclk_sel", + cdu + CDU_CFG10, 0); + clks[ADSP_SC598_CLK_TRACE] = cdu_gate("trace", "trace_sel", cdu + CDU_CFG12, 0); + clks[ADSP_SC598_CLK_EMMC] = cdu_gate("emmc", "emmc_sel", cdu + CDU_CFG13, 0); + clks[ADSP_SC598_CLK_EMMC_TIMER_QMC] = cdu_gate("emmc_timer_qmc", + "emmc_timer_qmc_sel", + cdu + CDU_CFG14, 0); + + // Dedicated DDR output mux + clks[ADSP_SC598_CLK_DDR] = clk_register_mux(NULL, "ddr", ddr_sels, 2, + CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + pll3, 11, 1, 0); + + ret = cdu_check_clocks(clks, ARRAY_SIZE(clks)); + if (ret) + pr_err("CDU error detected\n"); + + return ret; +} + +static const struct udevice_id adi_sc598_clk_ids[] = { + { .compatible = "adi,sc598-clocks" }, + { }, +}; + +U_BOOT_DRIVER(adi_sc598_clk) = { + .name = "clk_adi_sc598", + .id = UCLASS_CLK, + .of_match = adi_sc598_clk_ids, + .ops = &adi_clk_ops, + .probe = sc598_clock_probe, + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/clk/adi/clk-shared.c b/drivers/clk/adi/clk-shared.c new file mode 100644 index 00000000000..dcadcafa9d2 --- /dev/null +++ b/drivers/clk/adi/clk-shared.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Author: Greg Malysa + */ + +#include "clk.h" + +static ulong adi_get_rate(struct clk *clk) +{ + struct clk *c; + int ret; + + ret = clk_get_by_id(clk->id, &c); + if (ret) + return ret; + + return clk_get_rate(c); +} + +static ulong adi_set_rate(struct clk *clk, ulong rate) +{ + //Not yet implemented + return 0; +} + +static int adi_enable(struct clk *clk) +{ + //Not yet implemented + return 0; +} + +static int adi_disable(struct clk *clk) +{ + //Not yet implemented + return 0; +} + +const struct clk_ops adi_clk_ops = { + .set_rate = adi_set_rate, + .get_rate = adi_get_rate, + .enable = adi_enable, + .disable = adi_disable, +}; + diff --git a/drivers/clk/adi/clk.h b/drivers/clk/adi/clk.h new file mode 100644 index 00000000000..f230205c311 --- /dev/null +++ b/drivers/clk/adi/clk.h @@ -0,0 +1,123 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Author: Greg Malysa + * + * Ported from Linux: Nathan Barrett-Morrison + */ + +#ifndef CLK_ADI_CLK_H +#define CLK_ADI_CLK_H + +#include +#include +#include + +#define CGU_CTL 0x00 +#define CGU_PLLCTL 0x04 +#define CGU_STAT 0x08 +#define CGU_DIV 0x0C +#define CGU_CLKOUTSEL 0x10 +#define CGU_OSCWDCTL 0x14 +#define CGU_TSCTL 0x18 +#define CGU_TSVALUE0 0x1C +#define CGU_TSVALUE1 0x20 +#define CGU_TSCOUNT0 0x24 +#define CGU_TSCOUNT1 0x28 +#define CGU_CCBF_DIS 0x2C +#define CGU_CCBF_STAT 0x30 +#define CGU_SCBF_DIS 0x38 +#define CGU_SCBF_STAT 0x3C +#define CGU_DIVEX 0x40 +#define CGU_REVID 0x48 + +#define CDU_CFG0 0x00 +#define CDU_CFG1 0x04 +#define CDU_CFG2 0x08 +#define CDU_CFG3 0x0C +#define CDU_CFG4 0x10 +#define CDU_CFG5 0x14 +#define CDU_CFG6 0x18 +#define CDU_CFG7 0x1C +#define CDU_CFG8 0x20 +#define CDU_CFG9 0x24 +#define CDU_CFG10 0x28 +#define CDU_CFG11 0x2C +#define CDU_CFG12 0x30 +#define CDU_CFG13 0x34 +#define CDU_CFG14 0x38 + +#define PLL3_OFFSET 0x2c + +#define CDU_CLKINSEL 0x44 + +#define CGU_MSEL_SHIFT 8 +#define CGU_MSEL_WIDTH 7 + +#define PLL3_MSEL_SHIFT 4 +#define PLL3_MSEL_WIDTH 7 + +#define CDU_MUX_SIZE 4 +#define CDU_MUX_SHIFT 1 +#define CDU_MUX_WIDTH 2 +#define CDU_EN_BIT 0 + +extern const struct clk_ops adi_clk_ops; + +struct clk *sc5xx_cgu_pll(const char *name, const char *parent_name, + void __iomem *base, u8 shift, u8 width, u32 m_offset, bool half_m); + +/** + * All CDU clock muxes are the same size + */ +static inline struct clk *cdu_mux(const char *name, void __iomem *reg, + const char * const *parents) +{ + return clk_register_mux(NULL, name, parents, CDU_MUX_SIZE, + CLK_SET_RATE_PARENT, reg, CDU_MUX_SHIFT, CDU_MUX_WIDTH, 0); +} + +static inline struct clk *cgu_divider(const char *name, const char *parent, + void __iomem *reg, u8 shift, u8 width, u8 extra_flags) +{ + return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, + reg, shift, width, CLK_DIVIDER_MAX_AT_ZERO | extra_flags); +} + +static inline struct clk *cdu_gate(const char *name, const char *parent, + void __iomem *reg, u32 flags) +{ + return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT | flags, + reg, CDU_EN_BIT, 0, NULL); +} + +static inline struct clk *cgu_gate(const char *name, const char *parent, + void __iomem *reg, u8 bit) +{ + return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, bit, + CLK_GATE_SET_TO_DISABLE, NULL); +} + +static inline int cdu_check_clocks(struct clk *clks[], size_t count) +{ + size_t i; + + for (i = 0; i < count; ++i) { + if (clks[i]) { + if (IS_ERR(clks[i])) { + pr_err("Clock %zu failed to register: %ld\n", i, PTR_ERR(clks[i])); + return PTR_ERR(clks[i]); + } + clks[i]->id = i; + } else { + pr_err("ADI Clock framework: Null pointer detected on clock %zu\n", i); + } + } + + return 0; +} + +#endif diff --git a/include/dt-bindings/clock/adi-sc5xx-clock.h b/include/dt-bindings/clock/adi-sc5xx-clock.h new file mode 100644 index 00000000000..4a5373d1141 --- /dev/null +++ b/include/dt-bindings/clock/adi-sc5xx-clock.h @@ -0,0 +1,271 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + * + */ + +#ifndef DT_BINDINGS_CLOCK_ADI_SC5XX_CLOCK_H +#define DT_BINDINGS_CLOCK_ADI_SC5XX_CLOCK_H + +//ADSP-SC594 +#define ADSP_SC594_CLK_DUMMY 0 +#define ADSP_SC594_CLK_SYS_CLKIN0 1 +#define ADSP_SC594_CLK_SYS_CLKIN1 2 +#define ADSP_SC594_CLK_CGU1_IN 3 +#define ADSP_SC594_CLK_CGU0_PLL_IN 4 +#define ADSP_SC594_CLK_CGU1_PLL_IN 5 +#define ADSP_SC594_CLK_CGU0_VCO_OUT 6 +#define ADSP_SC594_CLK_CGU1_VCO_OUT 7 +#define ADSP_SC594_CLK_CGU0_PLLCLK 8 +#define ADSP_SC594_CLK_CGU1_PLLCLK 9 +#define ADSP_SC594_CLK_CGU0_CDIV 10 +#define ADSP_SC594_CLK_CGU0_SYSCLK 11 +#define ADSP_SC594_CLK_CGU0_DDIV 12 +#define ADSP_SC594_CLK_CGU0_ODIV 13 +#define ADSP_SC594_CLK_CGU0_S0SELDIV 14 +#define ADSP_SC594_CLK_CGU0_S1SELDIV 15 +#define ADSP_SC594_CLK_CGU0_S1SELEXDIV 16 +#define ADSP_SC594_CLK_CGU0_S1SEL 17 +#define ADSP_SC594_CLK_CGU1_CDIV 18 +#define ADSP_SC594_CLK_CGU1_SYSCLK 19 +#define ADSP_SC594_CLK_CGU1_DDIV 20 +#define ADSP_SC594_CLK_CGU1_ODIV 21 +#define ADSP_SC594_CLK_CGU1_S0SELDIV 22 +#define ADSP_SC594_CLK_CGU1_S1SELDIV 23 +#define ADSP_SC594_CLK_CGU1_S1SELEXDIV 24 +#define ADSP_SC594_CLK_CGU1_S1SEL 25 +#define ADSP_SC594_CLK_CGU0_CCLK0 26 +#define ADSP_SC594_CLK_CGU0_CCLK1 27 +#define ADSP_SC594_CLK_CGU0_OCLK 28 +#define ADSP_SC594_CLK_CGU0_DCLK 29 +#define ADSP_SC594_CLK_CGU0_SCLK1 30 +#define ADSP_SC594_CLK_CGU0_SCLK0 31 +#define ADSP_SC594_CLK_CGU1_CCLK0 32 +#define ADSP_SC594_CLK_CGU1_CCLK1 33 +#define ADSP_SC594_CLK_CGU1_OCLK 34 +#define ADSP_SC594_CLK_CGU1_DCLK 35 +#define ADSP_SC594_CLK_CGU1_SCLK1 36 +#define ADSP_SC594_CLK_CGU1_SCLK0 37 +#define ADSP_SC594_CLK_SHARC0_SEL 38 +#define ADSP_SC594_CLK_SHARC1_SEL 39 +#define ADSP_SC594_CLK_ARM_SEL 40 +#define ADSP_SC594_CLK_CDU_DDR_SEL 41 +#define ADSP_SC594_CLK_CAN_SEL 42 +#define ADSP_SC594_CLK_SPDIF_SEL 43 +#define ADSP_SC594_CLK_RESERVED_SEL 44 +#define ADSP_SC594_CLK_GIGE_SEL 45 +#define ADSP_SC594_CLK_LP_SEL 46 +#define ADSP_SC594_CLK_LPDDR_SEL 47 +#define ADSP_SC594_CLK_OSPI_SEL 48 +#define ADSP_SC594_CLK_TRACE_SEL 49 +#define ADSP_SC594_CLK_SHARC0 50 +#define ADSP_SC594_CLK_SHARC1 51 +#define ADSP_SC594_CLK_ARM 52 +#define ADSP_SC594_CLK_CDU_DDR 53 +#define ADSP_SC594_CLK_CAN 54 +#define ADSP_SC594_CLK_SPDIF 55 +#define ADSP_SC594_CLK_SPI 56 +#define ADSP_SC594_CLK_GIGE 57 +#define ADSP_SC594_CLK_LP 58 +#define ADSP_SC594_CLK_LPDDR 59 +#define ADSP_SC594_CLK_OSPI 60 +#define ADSP_SC594_CLK_TRACE 61 +#define ADSP_SC594_CLK_END 62 + +//ADSP-SC598 +#define ADSP_SC598_CLK_DUMMY 0 +#define ADSP_SC598_CLK_SYS_CLKIN0 1 +#define ADSP_SC598_CLK_SYS_CLKIN1 2 +#define ADSP_SC598_CLK_CGU0_PLL_IN 3 +#define ADSP_SC598_CLK_CGU0_VCO_OUT 4 +#define ADSP_SC598_CLK_CGU0_PLLCLK 5 +#define ADSP_SC598_CLK_CGU1_IN 6 +#define ADSP_SC598_CLK_CGU1_PLL_IN 7 +#define ADSP_SC598_CLK_CGU1_VCO_OUT 8 +#define ADSP_SC598_CLK_CGU1_PLLCLK 9 +#define ADSP_SC598_CLK_CGU0_CDIV 10 +#define ADSP_SC598_CLK_CGU0_SYSCLK 11 +#define ADSP_SC598_CLK_CGU0_DDIV 12 +#define ADSP_SC598_CLK_CGU0_ODIV 13 +#define ADSP_SC598_CLK_CGU0_S0SELDIV 14 +#define ADSP_SC598_CLK_CGU0_S1SELDIV 15 +#define ADSP_SC598_CLK_CGU0_S1SELEXDIV 16 +#define ADSP_SC598_CLK_CGU0_S1SEL 17 +#define ADSP_SC598_CLK_CGU1_CDIV 18 +#define ADSP_SC598_CLK_CGU1_SYSCLK 19 +#define ADSP_SC598_CLK_CGU1_DDIV 20 +#define ADSP_SC598_CLK_CGU1_ODIV 21 +#define ADSP_SC598_CLK_CGU1_S0SELDIV 22 +#define ADSP_SC598_CLK_CGU1_S1SELDIV 23 +#define ADSP_SC598_CLK_CGU1_S0SELEXDIV 24 +#define ADSP_SC598_CLK_CGU1_S1SELEXDIV 25 +#define ADSP_SC598_CLK_CGU1_S0SEL 26 +#define ADSP_SC598_CLK_CGU1_S1SEL 27 +#define ADSP_SC598_CLK_CGU0_CCLK2 28 +#define ADSP_SC598_CLK_CGU0_CCLK0 29 +#define ADSP_SC598_CLK_CGU0_OCLK 30 +#define ADSP_SC598_CLK_CGU0_DCLK 31 +#define ADSP_SC598_CLK_CGU0_SCLK1 32 +#define ADSP_SC598_CLK_CGU0_SCLK0 33 +#define ADSP_SC598_CLK_CGU1_CCLK0 34 +#define ADSP_SC598_CLK_CGU1_OCLK 35 +#define ADSP_SC598_CLK_CGU1_DCLK 36 +#define ADSP_SC598_CLK_CGU1_SCLK1 37 +#define ADSP_SC598_CLK_CGU1_SCLK0 38 +#define ADSP_SC598_CLK_CGU1_CCLK2 39 +#define ADSP_SC598_CLK_DCLK0_HALF 40 +#define ADSP_SC598_CLK_DCLK1_HALF 41 +#define ADSP_SC598_CLK_CGU1_SCLK1_HALF 42 +#define ADSP_SC598_CLK_SHARC0_SEL 43 +#define ADSP_SC598_CLK_SHARC1_SEL 44 +#define ADSP_SC598_CLK_ARM_SEL 45 +#define ADSP_SC598_CLK_CDU_DDR_SEL 46 +#define ADSP_SC598_CLK_CAN_SEL 47 +#define ADSP_SC598_CLK_SPDIF_SEL 48 +#define ADSP_SC598_CLK_SPI_SEL 49 +#define ADSP_SC598_CLK_GIGE_SEL 50 +#define ADSP_SC598_CLK_LP_SEL 51 +#define ADSP_SC598_CLK_LP_DDR_SEL 52 +#define ADSP_SC598_CLK_OSPI_REFCLK_SEL 53 +#define ADSP_SC598_CLK_TRACE_SEL 54 +#define ADSP_SC598_CLK_EMMC_SEL 55 +#define ADSP_SC598_CLK_EMMC_TIMER_QMC_SEL 56 +#define ADSP_SC598_CLK_SHARC0 57 +#define ADSP_SC598_CLK_SHARC1 58 +#define ADSP_SC598_CLK_ARM 59 +#define ADSP_SC598_CLK_CDU_DDR 60 +#define ADSP_SC598_CLK_CAN 61 +#define ADSP_SC598_CLK_SPDIF 62 +#define ADSP_SC598_CLK_SPI 63 +#define ADSP_SC598_CLK_GIGE 64 +#define ADSP_SC598_CLK_LP 65 +#define ADSP_SC598_CLK_LP_DDR 66 +#define ADSP_SC598_CLK_OSPI_REFCLK 67 +#define ADSP_SC598_CLK_TRACE 68 +#define ADSP_SC598_CLK_EMMC 69 +#define ADSP_SC598_CLK_EMMC_TIMER_QMC 70 +#define ADSP_SC598_CLK_3PLL_PLL_IN 71 +#define ADSP_SC598_CLK_3PLL_VCO_OUT 72 +#define ADSP_SC598_CLK_3PLL_PLLCLK 73 +#define ADSP_SC598_CLK_3PLL_DDIV 74 +#define ADSP_SC598_CLK_DDR 75 +#define ADSP_SC598_CLK_END 76 + +//ADSP-SC58X +#define ADSP_SC58X_CLK_DUMMY 0 +#define ADSP_SC58X_CLK_SYS_CLKIN0 1 +#define ADSP_SC58X_CLK_SYS_CLKIN1 2 +#define ADSP_SC58X_CLK_CGU0_PLL_IN 3 +#define ADSP_SC58X_CLK_CGU0_VCO_OUT 4 +#define ADSP_SC58X_CLK_CGU0_PLLCLK 5 +#define ADSP_SC58X_CLK_CGU1_IN 6 +#define ADSP_SC58X_CLK_CGU1_PLL_IN 7 +#define ADSP_SC58X_CLK_CGU1_VCO_OUT 8 +#define ADSP_SC58X_CLK_CGU1_PLLCLK 9 +#define ADSP_SC58X_CLK_CGU0_CDIV 10 +#define ADSP_SC58X_CLK_CGU0_SYSCLK 11 +#define ADSP_SC58X_CLK_CGU0_DDIV 12 +#define ADSP_SC58X_CLK_CGU0_ODIV 13 +#define ADSP_SC58X_CLK_CGU0_S0SELDIV 14 +#define ADSP_SC58X_CLK_CGU0_S1SELDIV 15 +#define ADSP_SC58X_CLK_CGU1_CDIV 16 +#define ADSP_SC58X_CLK_CGU1_SYSCLK 17 +#define ADSP_SC58X_CLK_CGU1_DDIV 18 +#define ADSP_SC58X_CLK_CGU1_ODIV 19 +#define ADSP_SC58X_CLK_CGU1_S0SELDIV 20 +#define ADSP_SC58X_CLK_CGU1_S1SELDIV 21 +#define ADSP_SC58X_CLK_CGU0_CCLK0 22 +#define ADSP_SC58X_CLK_CGU0_CCLK1 23 +#define ADSP_SC58X_CLK_CGU0_OCLK 24 +#define ADSP_SC58X_CLK_CGU0_DCLK 25 +#define ADSP_SC58X_CLK_CGU0_SCLK1 26 +#define ADSP_SC58X_CLK_CGU0_SCLK0 27 +#define ADSP_SC58X_CLK_CGU1_CCLK0 28 +#define ADSP_SC58X_CLK_CGU1_CCLK1 29 +#define ADSP_SC58X_CLK_CGU1_OCLK 30 +#define ADSP_SC58X_CLK_CGU1_DCLK 31 +#define ADSP_SC58X_CLK_CGU1_SCLK1 32 +#define ADSP_SC58X_CLK_CGU1_SCLK0 33 +#define ADSP_SC58X_CLK_OCLK0_HALF 34 +#define ADSP_SC58X_CLK_CCLK1_1_HALF 35 +#define ADSP_SC58X_CLK_SHARC0_SEL 36 +#define ADSP_SC58X_CLK_SHARC1_SEL 37 +#define ADSP_SC58X_CLK_ARM_SEL 38 +#define ADSP_SC58X_CLK_CDU_DDR_SEL 39 +#define ADSP_SC58X_CLK_CAN_SEL 40 +#define ADSP_SC58X_CLK_SPDIF_SEL 41 +#define ADSP_SC58X_CLK_RESERVED_SEL 42 +#define ADSP_SC58X_CLK_GIGE_SEL 43 +#define ADSP_SC58X_CLK_LP_SEL 44 +#define ADSP_SC58X_CLK_SDIO_SEL 45 +#define ADSP_SC58X_CLK_SHARC0 46 +#define ADSP_SC58X_CLK_SHARC1 47 +#define ADSP_SC58X_CLK_ARM 48 +#define ADSP_SC58X_CLK_CDU_DDR 49 +#define ADSP_SC58X_CLK_CAN 50 +#define ADSP_SC58X_CLK_SPDIF 51 +#define ADSP_SC58X_CLK_RESERVED 52 +#define ADSP_SC58X_CLK_GIGE 53 +#define ADSP_SC58X_CLK_LP 54 +#define ADSP_SC58X_CLK_SDIO 55 +#define ADSP_SC58X_CLK_END 56 + +//ADSP-SC57X +#define ADSP_SC57X_CLK_DUMMY 0 +#define ADSP_SC57X_CLK_SYS_CLKIN0 1 +#define ADSP_SC57X_CLK_SYS_CLKIN1 2 +#define ADSP_SC57X_CLK_CGU0_PLL_IN 3 +#define ADSP_SC57X_CLK_CGU0_PLLCLK 4 +#define ADSP_SC57X_CLK_CGU1_IN 5 +#define ADSP_SC57X_CLK_CGU1_PLL_IN 6 +#define ADSP_SC57X_CLK_CGU1_PLLCLK 7 +#define ADSP_SC57X_CLK_CGU0_CDIV 8 +#define ADSP_SC57X_CLK_CGU0_SYSCLK 9 +#define ADSP_SC57X_CLK_CGU0_DDIV 10 +#define ADSP_SC57X_CLK_CGU0_ODIV 11 +#define ADSP_SC57X_CLK_CGU0_S0SELDIV 12 +#define ADSP_SC57X_CLK_CGU0_S1SELDIV 13 +#define ADSP_SC57X_CLK_CGU1_CDIV 14 +#define ADSP_SC57X_CLK_CGU1_SYSCLK 15 +#define ADSP_SC57X_CLK_CGU1_DDIV 16 +#define ADSP_SC57X_CLK_CGU1_ODIV 17 +#define ADSP_SC57X_CLK_CGU1_S0SELDIV 18 +#define ADSP_SC57X_CLK_CGU1_S1SELDIV 19 +#define ADSP_SC57X_CLK_CGU0_CCLK0 20 +#define ADSP_SC57X_CLK_CGU0_CCLK1 21 +#define ADSP_SC57X_CLK_CGU0_OCLK 22 +#define ADSP_SC57X_CLK_CGU0_DCLK 23 +#define ADSP_SC57X_CLK_CGU0_SCLK1 24 +#define ADSP_SC57X_CLK_CGU0_SCLK0 25 +#define ADSP_SC57X_CLK_CGU1_CCLK0 26 +#define ADSP_SC57X_CLK_CGU1_CCLK1 27 +#define ADSP_SC57X_CLK_CGU1_OCLK 28 +#define ADSP_SC57X_CLK_CGU1_DCLK 29 +#define ADSP_SC57X_CLK_CGU1_SCLK1 30 +#define ADSP_SC57X_CLK_CGU1_SCLK0 31 +#define ADSP_SC57X_CLK_OCLK0_HALF 32 +#define ADSP_SC57X_CLK_CCLK1_1_HALF 33 +#define ADSP_SC57X_CLK_SHARC0_SEL 34 +#define ADSP_SC57X_CLK_SHARC1_SEL 35 +#define ADSP_SC57X_CLK_ARM_SEL 36 +#define ADSP_SC57X_CLK_CDU_DDR_SEL 37 +#define ADSP_SC57X_CLK_CAN_SEL 38 +#define ADSP_SC57X_CLK_SPDIF_SEL 39 +#define ADSP_SC57X_CLK_GIGE_SEL 40 +#define ADSP_SC57X_CLK_SDIO_SEL 41 +#define ADSP_SC57X_CLK_SHARC0 42 +#define ADSP_SC57X_CLK_SHARC1 43 +#define ADSP_SC57X_CLK_ARM 44 +#define ADSP_SC57X_CLK_CDU_DDR 45 +#define ADSP_SC57X_CLK_CAN 46 +#define ADSP_SC57X_CLK_SPDIF 47 +#define ADSP_SC57X_CLK_GIGE 48 +#define ADSP_SC57X_CLK_SDIO 49 +#define ADSP_SC57X_CLK_END 50 + +#endif -- cgit v1.3.1