From a45ddf7a3e63d085994293571fdb0373bd1c53b8 Mon Sep 17 00:00:00 2001 From: Mateusz Zalega Date: Mon, 28 Apr 2014 21:13:29 +0200 Subject: arm: goni: Update configuration for Goni target Configuration file for GONI has been updated to support FAT file system, new mmc partitioning scheme and read linux kernel from eMMC instead of OneNAND. Signed-off-by: Arkadiusz Wlodarczyk Signed-off-by: Kyungmin Park Signed-off-by: Mateusz Zalega Tested-by: Arkadiusz Wlodarczyk Tested-by: Mateusz Zalega Signed-off-by: Minkyu Kang --- include/configs/s5p_goni.h | 56 +++++++++++++++++++++++++--------------------- 1 file changed, 30 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 799d4fe9d8c..cc0691fde75 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -17,6 +17,7 @@ #define CONFIG_S5PC110 1 /* which is in a S5PC110 */ #define CONFIG_MACH_GONI 1 /* working with Goni */ +#include #include /* get chip and board defs */ #define CONFIG_ARCH_CPU_INIT @@ -38,11 +39,9 @@ #define CONFIG_INITRD_TAG #define CONFIG_CMDLINE_EDITING -/* - * Size of malloc() pool - * 1MB = 0x100000, 0x100000 = 1024 * 1024 - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) +/* Size of malloc() pool.*/ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M) + /* * select serial console configuration */ @@ -90,30 +89,25 @@ ",7m(kernel)"\ ",1m(log)"\ ",12m(modem)"\ - ",60m(qboot)"\ - ",-(UBI)\0" + ",60m(qboot)\0" #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT -#define CONFIG_BOOTCOMMAND "run ubifsboot" +#define CONFIG_BOOTCOMMAND "run mmcboot" #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" -#define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \ +#define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext4" \ " ${console} ${meminfo}" #define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}" -#define CONFIG_BOOTARGS "root=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3 ubi.mtd=6" \ - " rootfstype=cramfs " CONFIG_COMMON_BOOT +#define CONFIG_BOOTARGS "root=/dev/mtdblock8 rootfstype=ext4 " \ + CONFIG_COMMON_BOOT #define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \ " onenand write 0x32008000 0x0 0x100000\0" -#define CONFIG_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=3 ubi.mtd=6" - -#define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc" - #define CONFIG_MISC_COMMON #define CONFIG_MISC_INIT_R @@ -130,36 +124,38 @@ "onenand erase 0x01560000 0x1eaa0000;" \ "onenand write 0x32000000 0x1260000 0x8C0000\0" \ "bootk=" \ - "onenand read 0x30007FC0 0xc00000 0x600000;" \ + "run loaduimage;" \ "bootm 0x30007FC0\0" \ "flashboot=" \ "set bootargs root=/dev/mtdblock${bootblock} " \ - "rootfstype=${rootfstype}" CONFIG_UBI_MTD " ${opts} " \ + "rootfstype=${rootfstype} ${opts} " \ "${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \ "ubifsboot=" \ "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ - CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ + "${opts} ${lcdinfo} " \ CONFIG_COMMON_BOOT "; run bootk\0" \ "tftpboot=" \ "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ - CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ - CONFIG_COMMON_BOOT "; tftp 0x30007FC0 uImage; " \ - "bootm 0x30007FC0\0" \ + "${opts} ${lcdinfo} " CONFIG_COMMON_BOOT \ + "; tftp 0x30007FC0 uImage; bootm 0x30007FC0\0" \ "ramboot=" \ "set bootargs " CONFIG_RAMDISK_BOOT \ - " initrd=0x33000000,8M ramdisk=8192\0" \ + "initrd=0x33000000,8M ramdisk=8192\0" \ "mmcboot=" \ - "set bootargs root=${mmcblk} rootfstype=${rootfstype}" \ - CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \ + "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ + "rootfstype=${rootfstype} ${opts} ${lcdinfo} " \ CONFIG_COMMON_BOOT "; run bootk\0" \ "boottrace=setenv opts initcall_debug; run bootcmd\0" \ "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ "verify=n\0" \ - "rootfstype=cramfs\0" \ + "rootfstype=ext4\0" \ "console=" CONFIG_DEFAULT_CONSOLE \ "mtdparts=" MTDPARTS_DEFAULT \ "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \ - "mmcblk=/dev/mmcblk1p1\0" \ + "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0" \ + "mmcdev=0\0" \ + "mmcbootpart=2\0" \ + "mmcrootpart=5\0" \ "bootblock=9\0" \ "ubiblock=8\0" \ "ubi=enabled\0" \ @@ -202,6 +198,13 @@ #define CONFIG_DOS_PARTITION 1 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 + +/* write support for filesystems */ +#define CONFIG_FAT_WRITE +#define CONFIG_EXT4_WRITE + #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) #define CONFIG_SYS_CACHELINE_SIZE 64 @@ -226,5 +229,6 @@ #define CONFIG_USB_GADGET #define CONFIG_USB_GADGET_S3C_UDC_OTG #define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 #endif /* __CONFIG_H */ -- cgit v1.3.1 From 2d281b3252ffbe27bfee01aded6df47a9ea186fd Mon Sep 17 00:00:00 2001 From: Mateusz Zalega Date: Mon, 28 Apr 2014 21:13:30 +0200 Subject: arm: goni: dfu: Add support for DFU to Goni target Proper adjustment for supporting DFU at GONI target has been made. The s5p_goni.h file has been updated. Moreover the code for low level USB initialization has been added to GONI board code. The malloc pool has been enlarged in order to support larger buffer sizes needed by DFU implementation. Signed-off-by: Arkadiusz Wlodarczyk Signed-off-by: Kyungmin Park Signed-off-by: Mateusz Zalega Tested-by: Arkadiusz Wlodarczyk Tested-by: Mateusz Zalega Signed-off-by: Minkyu Kang --- board/samsung/goni/goni.c | 8 +++++++ include/configs/s5p_goni.h | 54 ++++++++++++++++++++++++++++++++++++---------- 2 files changed, 51 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c index 4cea63b813e..eb0f9bffae0 100644 --- a/board/samsung/goni/goni.c +++ b/board/samsung/goni/goni.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -175,6 +177,12 @@ struct s3c_plat_otg_data s5pc110_otg_data = { .regs_otg = S5PC110_OTG_BASE, .usb_phy_ctrl = S5PC110_USB_PHY_CONTROL, }; + +int board_usb_init(int index, enum usb_init_type init) +{ + debug("USB_udc_probe\n"); + return s3c_udc_probe(&s5pc110_otg_data); +} #endif #ifdef CONFIG_MISC_INIT_R diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index cc0691fde75..94cdce0e801 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -40,7 +40,7 @@ #define CONFIG_CMDLINE_EDITING /* Size of malloc() pool.*/ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_1M) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 80 * SZ_1M) /* * select serial console configuration @@ -71,14 +71,18 @@ #define CONFIG_CMD_CACHE #define CONFIG_CMD_REGINFO #define CONFIG_CMD_ONENAND -#define CONFIG_CMD_MTDPARTS #define CONFIG_CMD_MMC +#define CONFIG_CMD_DFU -#define CONFIG_BOOTDELAY 1 -#define CONFIG_ZERO_BOOTDELAY_CHECK +/* USB Composite download gadget - g_dnl */ +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_MMC -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS +/* USB Samsung's IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x04E8 +#define CONFIG_G_DNL_PRODUCT_NUM 0x6601 +#define CONFIG_G_DNL_MANUFACTURER "Samsung" /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ #define MTDIDS_DEFAULT "onenand0=samsung-onenand" @@ -91,7 +95,34 @@ ",12m(modem)"\ ",60m(qboot)\0" -#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT +#define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK + +/* partitions definitions */ +#define PARTS_CSA "csa-mmc" +#define PARTS_BOOTLOADER "u-boot" +#define PARTS_BOOT "boot" +#define PARTS_ROOT "platform" +#define PARTS_DATA "data" +#define PARTS_CSC "csc" +#define PARTS_UMS "ums" + +#define CONFIG_DFU_ALT \ + "u-boot raw 0x80 0x400;" \ + "uImage ext4 0 2;" \ + "exynos3-goni.dtb ext4 0 2;" \ + ""PARTS_ROOT" part 0 5\0" + +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \ + "name="PARTS_BOOTLOADER",size=60MiB," \ + "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \ + "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \ + "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \ + "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ + "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \ + "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ #define CONFIG_BOOTCOMMAND "run mmcboot" @@ -150,18 +181,18 @@ "verify=n\0" \ "rootfstype=ext4\0" \ "console=" CONFIG_DEFAULT_CONSOLE \ - "mtdparts=" MTDPARTS_DEFAULT \ "meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \ - "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0" \ + "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0" \ "mmcdev=0\0" \ "mmcbootpart=2\0" \ "mmcrootpart=5\0" \ + "partitions=" PARTS_DEFAULT \ "bootblock=9\0" \ "ubiblock=8\0" \ "ubi=enabled\0" \ - "opts=always_resume=1" + "opts=always_resume=1\0" \ + "dfu_alt_info=" CONFIG_DFU_ALT "\0" -/* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ #define CONFIG_SYS_PROMPT "Goni # " @@ -200,6 +231,7 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_EXT4 +#define CONFIG_CMD_EXT4_WRITE /* write support for filesystems */ #define CONFIG_FAT_WRITE -- cgit v1.3.1 From a3c274de3b3069b73aa2ab30099432170c913639 Mon Sep 17 00:00:00 2001 From: Mateusz Zalega Date: Mon, 28 Apr 2014 21:13:31 +0200 Subject: arm: goni: enable GPT command Signed-off-by: Mateusz Zalega Signed-off-by: Minkyu Kang --- include/configs/s5p_goni.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 94cdce0e801..762f4b67473 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -73,6 +73,7 @@ #define CONFIG_CMD_ONENAND #define CONFIG_CMD_MMC #define CONFIG_CMD_DFU +#define CONFIG_CMD_GPT /* USB Composite download gadget - g_dnl */ #define CONFIG_USBDOWNLOAD_GADGET @@ -237,6 +238,10 @@ #define CONFIG_FAT_WRITE #define CONFIG_EXT4_WRITE +/* GPT */ +#define CONFIG_EFI_PARTITION +#define CONFIG_PARTITION_UUIDS + #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000) #define CONFIG_SYS_CACHELINE_SIZE 64 -- cgit v1.3.1 From d2f588f3b8743f797b6227801eca0b6b3eadaaa1 Mon Sep 17 00:00:00 2001 From: Mateusz Zalega Date: Mon, 28 Apr 2014 21:13:32 +0200 Subject: arm: goni: enable USB Mass Storage UMS-related defines were added to Samsung Goni config header. Signed-off-by: Mateusz Zalega Signed-off-by: Minkyu Kang --- include/configs/s5p_goni.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 762f4b67473..fce17167831 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -267,5 +267,7 @@ #define CONFIG_USB_GADGET_S3C_UDC_OTG #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE #endif /* __CONFIG_H */ -- cgit v1.3.1 From 7d3ca0f89dfa4fc7bef738acdb95e632e284421d Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Fri, 16 May 2014 13:59:51 +0900 Subject: ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung Signed-off-by: Minkyu Kang --- arch/arm/dts/exynos5.dtsi | 8 ++++---- doc/device-tree-bindings/exynos/dwmmc.txt | 8 ++++---- include/fdtdec.h | 2 +- lib/fdtdec.c | 2 +- 4 files changed, 10 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi index f8c87411b6b..a2b533a1368 100644 --- a/arch/arm/dts/exynos5.dtsi +++ b/arch/arm/dts/exynos5.dtsi @@ -136,7 +136,7 @@ mmc@12200000 { #address-cells = <1>; #size-cells = <0>; - compatible = "samsung,exynos5250-dwmmc"; + compatible = "samsung,exynos-dwmmc"; reg = <0x12200000 0x1000>; interrupts = <0 75 0>; }; @@ -144,7 +144,7 @@ mmc@12210000 { #address-cells = <1>; #size-cells = <0>; - compatible = "samsung,exynos5250-dwmmc"; + compatible = "samsung,exynos-dwmmc"; reg = <0x12210000 0x1000>; interrupts = <0 76 0>; }; @@ -152,7 +152,7 @@ mmc@12220000 { #address-cells = <1>; #size-cells = <0>; - compatible = "samsung,exynos5250-dwmmc"; + compatible = "samsung,exynos-dwmmc"; reg = <0x12220000 0x1000>; interrupts = <0 77 0>; }; @@ -160,7 +160,7 @@ mmc@12230000 { #address-cells = <1>; #size-cells = <0>; - compatible = "samsung,exynos5250-dwmmc"; + compatible = "samsung,exynos-dwmmc"; reg = <0x12230000 0x1000>; interrupts = <0 78 0>; }; diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt index 566da3b636d..694d1959162 100644 --- a/doc/device-tree-bindings/exynos/dwmmc.txt +++ b/doc/device-tree-bindings/exynos/dwmmc.txt @@ -1,18 +1,18 @@ -* Exynos 5250 DWC_mobile_storage +* Exynos DWC_mobile_storage -The Exynos 5250 provides DWC_mobile_storage interface which supports +The Exynos provides DWC_mobile_storage interface which supports . Embedded Multimedia Cards (EMMC-version 4.5) . Secure Digital memory (SD mem-version 2.0) . Secure Digital I/O (SDIO-version 3.0) . Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1) -The Exynos 5250 DWC_mobile_storage provides four channels. +The Exynos DWC_mobile_storage provides four channels. SOC specific and Board specific properties are channel specific. Required SoC Specific Properties: - compatible: should be - - samsung,exynos5250-dwmmc: for exynos5250 platforms + - samsung,exynos-dwmmc: for exynos platforms - reg: physical base address of the controller and length of memory mapped region. diff --git a/include/fdtdec.h b/include/fdtdec.h index 3196cf66833..8c751fdc5f1 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -81,7 +81,7 @@ enum fdt_compat_id { COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */ COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi dsi */ COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */ - COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */ + COMPAT_SAMSUNG_EXYNOS_DWMMC, /* Exynos DWMMC controller */ COMPAT_SAMSUNG_EXYNOS_MMC, /* Exynos MMC controller */ COMPAT_SAMSUNG_EXYNOS_SERIAL, /* Exynos UART */ COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 8ecb80f1623..35e91b4ef08 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -55,7 +55,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(SAMSUNG_EXYNOS_FIMD, "samsung,exynos-fimd"), COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), COMPAT(SAMSUNG_EXYNOS5_DP, "samsung,exynos5-dp"), - COMPAT(SAMSUNG_EXYNOS5_DWMMC, "samsung,exynos5250-dwmmc"), + COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"), COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"), COMPAT(SAMSUNG_EXYNOS_SERIAL, "samsung,exynos4210-uart"), COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686_pmic"), -- cgit v1.3.1 From 959198f7cacea1076b3a43721ec173266f3158af Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Fri, 16 May 2014 13:59:52 +0900 Subject: mmc: exynos_dw_mmc: restore the property into host Restore the platdata(property of dt) into host struct. Then data's information is maintained and reused anywhere. Signed-off-by: Jaehoon Chung Tested-by: Lukasz Majewski Acked-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- drivers/mmc/exynos_dw_mmc.c | 204 ++++++++++++++++++++++++++++---------------- include/dwmmc.h | 2 + 2 files changed, 133 insertions(+), 73 deletions(-) (limited to 'include') diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index de8cdcc42b3..28941ad0fd5 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -13,6 +13,8 @@ #include #include #include +#include +#include #define DWMMC_MAX_CH_NUM 4 #define DWMMC_MAX_FREQ 52000000 @@ -44,7 +46,11 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host) & DWMCI_DIVRATIO_MASK) + 1; sclk = get_mmc_clk(host->dev_index); - return sclk / clk_div; + /* + * Assume to know divider value. + * When clock unit is broken, need to set "host->div" + */ + return sclk / clk_div / (host->div + 1); } static void exynos_dwmci_board_init(struct dwmci_host *host) @@ -60,45 +66,32 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) } } -/* - * This function adds the mmc channel to be registered with mmc core. - * index - mmc channel number. - * regbase - register base address of mmc channel specified in 'index'. - * bus_width - operating bus width of mmc channel specified in 'index'. - * clksel - value to be written into CLKSEL register in case of FDT. - * NULL in case od non-FDT. - */ -int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) +static int exynos_dwmci_core_init(struct dwmci_host *host, int index) { - struct dwmci_host *host = NULL; unsigned int div; unsigned long freq, sclk; - host = malloc(sizeof(struct dwmci_host)); - if (!host) { - printf("dwmci_host malloc fail!\n"); - return 1; - } + + if (host->bus_hz) + freq = host->bus_hz; + else + freq = DWMMC_MAX_FREQ; + /* request mmc clock vlaue of 52MHz. */ - freq = 52000000; sclk = get_mmc_clk(index); div = DIV_ROUND_UP(sclk, freq); /* set the clock divisor for mmc */ set_mmc_clk(index, div); host->name = "EXYNOS DWMMC"; - host->ioaddr = (void *)regbase; - host->buswidth = bus_width; #ifdef CONFIG_EXYNOS5420 host->quirks = DWMCI_QUIRK_DISABLE_SMU; #endif host->board_init = exynos_dwmci_board_init; - if (clksel) { - host->clksel_val = clksel; - } else { - if (0 == index) + if (!host->clksel_val) { + if (index == 0) host->clksel_val = DWMMC_MMC0_CLKSEL_VAL; - if (2 == index) + else if (index == 2) host->clksel_val = DWMMC_MMC2_CLKSEL_VAL; } @@ -113,69 +106,134 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) return 0; } +/* + * This function adds the mmc channel to be registered with mmc core. + * index - mmc channel number. + * regbase - register base address of mmc channel specified in 'index'. + * bus_width - operating bus width of mmc channel specified in 'index'. + * clksel - value to be written into CLKSEL register in case of FDT. + * NULL in case od non-FDT. + */ +int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) +{ + struct dwmci_host *host = NULL; + + host = malloc(sizeof(struct dwmci_host)); + if (!host) { + error("dwmci_host malloc fail!\n"); + return -ENOMEM; + } + + host->ioaddr = (void *)regbase; + host->buswidth = bus_width; + + if (clksel) + host->clksel_val = clksel; + + return exynos_dwmci_core_init(host, index); +} + #ifdef CONFIG_OF_CONTROL -int exynos_dwmmc_init(const void *blob) +static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM]; + +static int do_dwmci_init(struct dwmci_host *host) { - int index, bus_width; - int node_list[DWMMC_MAX_CH_NUM]; - int err = 0, dev_id, flag, count, i; - u32 clksel_val, base, timing[3]; + int index, flag, err; - count = fdtdec_find_aliases_for_id(blob, "mmc", - COMPAT_SAMSUNG_EXYNOS5_DWMMC, node_list, - DWMMC_MAX_CH_NUM); + index = host->dev_index; - for (i = 0; i < count; i++) { - int node = node_list[i]; + flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; + err = exynos_pinmux_config(host->dev_id, flag); + if (err) { + debug("DWMMC not configure\n"); + return err; + } - if (node <= 0) - continue; + return exynos_dwmci_core_init(host, index); +} - /* Extract device id for each mmc channel */ - dev_id = pinmux_decode_periph_id(blob, node); +static int exynos_dwmci_get_config(const void *blob, int node, + struct dwmci_host *host) +{ + int err = 0; + u32 base, clksel_val, timing[3]; - /* Get the bus width from the device node */ - bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0); - if (bus_width <= 0) { - debug("DWMMC: Can't get bus-width\n"); - return -1; - } - if (8 == bus_width) - flag = PINMUX_FLAG_8BIT_MODE; - else - flag = PINMUX_FLAG_NONE; + /* Extract device id for each mmc channel */ + host->dev_id = pinmux_decode_periph_id(blob, node); - /* config pinmux for each mmc channel */ - err = exynos_pinmux_config(dev_id, flag); - if (err) { - debug("DWMMC not configured\n"); - return err; - } + /* Get the bus width from the device node */ + host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 0); + if (host->buswidth <= 0) { + debug("DWMMC: Can't get bus-width\n"); + return -EINVAL; + } - index = dev_id - PERIPH_ID_SDMMC0; + host->dev_index = fdtdec_get_int(blob, node, "index", host->dev_id); + if (host->dev_index == host->dev_id) + host->dev_index = host->dev_id - PERIPH_ID_SDMMC0; - /* Get the base address from the device node */ - base = fdtdec_get_addr(blob, node, "reg"); - if (!base) { - debug("DWMMC: Can't get base address\n"); - return -1; - } - /* Extract the timing info from the node */ - err = fdtdec_get_int_array(blob, node, "samsung,timing", - timing, 3); + /* Set the base address from the device node */ + base = fdtdec_get_addr(blob, node, "reg"); + if (!base) { + debug("DWMMC: Can't get base address\n"); + return -EINVAL; + } + host->ioaddr = (void *)base; + + /* Extract the timing info from the node */ + err = fdtdec_get_int_array(blob, node, "samsung,timing", timing, 3); + if (err) { + debug("Can't get sdr-timings for devider\n"); + return -EINVAL; + } + + clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) | + DWMCI_SET_DRV_CLK(timing[1]) | + DWMCI_SET_DIV_RATIO(timing[2])); + if (clksel_val) + host->clksel_val = clksel_val; + + host->fifoth_val = fdtdec_get_int(blob, node, "fifoth_val", 0); + host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0); + host->div = fdtdec_get_int(blob, node, "div", 0); + + return 0; +} + +static int exynos_dwmci_process_node(const void *blob, + int node_list[], int count) +{ + struct dwmci_host *host; + int i, node, err; + + for (i = 0; i < count; i++) { + node = node_list[i]; + if (node <= 0) + continue; + host = &dwmci_host[i]; + err = exynos_dwmci_get_config(blob, node, host); if (err) { - debug("Can't get sdr-timings for divider\n"); - return -1; + debug("%s: failed to decode dev %d\n", __func__, i); + return err; } - clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) | - DWMCI_SET_DRV_CLK(timing[1]) | - DWMCI_SET_DIV_RATIO(timing[2])); - /* Initialise each mmc channel */ - err = exynos_dwmci_add_port(index, base, bus_width, clksel_val); - if (err) - debug("dwmmc Channel-%d init failed\n", index); + do_dwmci_init(host); } return 0; } + +int exynos_dwmmc_init(const void *blob) +{ + int compat_id; + int node_list[DWMMC_MAX_CH_NUM]; + int err = 0, count; + + compat_id = COMPAT_SAMSUNG_EXYNOS_DWMMC; + + count = fdtdec_find_aliases_for_id(blob, "mmc", + compat_id, node_list, DWMMC_MAX_CH_NUM); + err = exynos_dwmci_process_node(blob, node_list, count); + + return err; +} #endif diff --git a/include/dwmmc.h b/include/dwmmc.h index c9bdf51a671..14c7db82691 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -134,7 +134,9 @@ struct dwmci_host { unsigned int version; unsigned int clock; unsigned int bus_hz; + unsigned int div; int dev_index; + int dev_id; int buswidth; u32 clksel_val; u32 fifoth_val; -- cgit v1.3.1 From 8caf46d1890b625aafe9cc16114b3c65842dbb98 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Fri, 16 May 2014 13:59:53 +0900 Subject: mmc: remove the unnecessary define and fix the wrong bit control Signed-off-by: Jaehoon Chung Reviewed-by: Lukasz Majeski Tested-by: Lukasz Majewski Acked-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- drivers/mmc/mmc.c | 2 +- include/mmc.h | 18 ++++++------------ 2 files changed, 7 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 16051e52ff1..dd6a6ef57ce 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -514,7 +514,7 @@ static int mmc_change_freq(struct mmc *mmc) return 0; /* High Speed is set, there are two types: 52MHz and 26MHz */ - if (cardtype & MMC_HS_52MHZ) + if (cardtype & EXT_CSD_CARD_TYPE_52) mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; else mmc->card_caps |= MMC_MODE_HS; diff --git a/include/mmc.h b/include/mmc.h index bc11f45a6fc..d5a896fbb13 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -32,15 +32,12 @@ #define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429) #define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405) -#define MMC_MODE_HS 0x001 -#define MMC_MODE_HS_52MHz 0x010 -#define MMC_MODE_4BIT 0x100 -#define MMC_MODE_8BIT 0x200 -#define MMC_MODE_SPI 0x400 -#define MMC_MODE_HC 0x800 - -#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT) -#define MMC_MODE_WIDTH_BITS_SHIFT 8 +#define MMC_MODE_HS (1 << 0) +#define MMC_MODE_HS_52MHz (1 << 1) +#define MMC_MODE_4BIT (1 << 2) +#define MMC_MODE_8BIT (1 << 3) +#define MMC_MODE_SPI (1 << 4) +#define MMC_MODE_HC (1 << 5) #define SD_DATA_4BIT 0x00040000 @@ -98,9 +95,6 @@ #define SD_HIGHSPEED_BUSY 0x00020000 #define SD_HIGHSPEED_SUPPORTED 0x00020000 -#define MMC_HS_TIMING 0x00000100 -#define MMC_HS_52MHZ 0x2 - #define OCR_BUSY 0x80000000 #define OCR_HCS 0x40000000 #define OCR_VOLTAGE_MASK 0x007FFF80 -- cgit v1.3.1 From d22e3d46a918bde2e6d3bc3f5782548d5ed75358 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Fri, 16 May 2014 13:59:54 +0900 Subject: mmc: support the DDR mode for eMMC Signed-off-by: Jaehoon Chung Tested-by: Lukasz Majewski Acked-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- drivers/mmc/mmc.c | 16 +++++++++++++--- include/mmc.h | 7 +++++++ 2 files changed, 20 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index dd6a6ef57ce..08187d5f3ea 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -158,6 +158,9 @@ int mmc_set_blocklen(struct mmc *mmc, int len) { struct mmc_cmd cmd; + if (mmc->card_caps & MMC_MODE_DDR_52MHz) + return 0; + cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; cmd.resp_type = MMC_RSP_R1; cmd.cmdarg = len; @@ -514,10 +517,13 @@ static int mmc_change_freq(struct mmc *mmc) return 0; /* High Speed is set, there are two types: 52MHz and 26MHz */ - if (cardtype & EXT_CSD_CARD_TYPE_52) + if (cardtype & EXT_CSD_CARD_TYPE_52) { + if (cardtype & EXT_CSD_CARD_TYPE_DDR_52) + mmc->card_caps |= MMC_MODE_DDR_52MHz; mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; - else + } else { mmc->card_caps |= MMC_MODE_HS; + } return 0; } @@ -1054,6 +1060,8 @@ static int mmc_startup(struct mmc *mmc) /* An array of possible bus widths in order of preference */ static unsigned ext_csd_bits[] = { + EXT_CSD_DDR_BUS_WIDTH_8, + EXT_CSD_DDR_BUS_WIDTH_4, EXT_CSD_BUS_WIDTH_8, EXT_CSD_BUS_WIDTH_4, EXT_CSD_BUS_WIDTH_1, @@ -1061,13 +1069,15 @@ static int mmc_startup(struct mmc *mmc) /* An array to map CSD bus widths to host cap bits */ static unsigned ext_to_hostcaps[] = { + [EXT_CSD_DDR_BUS_WIDTH_4] = MMC_MODE_DDR_52MHz, + [EXT_CSD_DDR_BUS_WIDTH_8] = MMC_MODE_DDR_52MHz, [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, }; /* An array to map chosen bus width to an integer */ static unsigned widths[] = { - 8, 4, 1, + 8, 4, 8, 4, 1, }; for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { diff --git a/include/mmc.h b/include/mmc.h index d5a896fbb13..aa2d1ca3605 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -38,6 +38,7 @@ #define MMC_MODE_8BIT (1 << 3) #define MMC_MODE_SPI (1 << 4) #define MMC_MODE_HC (1 << 5) +#define MMC_MODE_DDR_52MHz (1 << 6) #define SD_DATA_4BIT 0x00040000 @@ -169,10 +170,16 @@ #define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ +#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) +#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) +#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ + | EXT_CSD_CARD_TYPE_DDR_1_2V) #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ +#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ +#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ #define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) -- cgit v1.3.1 From 045bdcd0b2ff02effef09d945cee685b88ec521d Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Fri, 16 May 2014 13:59:55 +0900 Subject: mmc: dw_mmc: support the DDR mode Support the DDR mode at dw-mmc controller Signed-off-by: Jaehoon Chung Tested-by: Lukasz Majewski Acked-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- drivers/mmc/dw_mmc.c | 12 ++++++++++-- include/dwmmc.h | 3 +++ 2 files changed, 13 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index eb4e2be5143..5bf36a0309d 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -284,8 +284,8 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) static void dwmci_set_ios(struct mmc *mmc) { - struct dwmci_host *host = mmc->priv; - u32 ctype; + struct dwmci_host *host = (struct dwmci_host *)mmc->priv; + u32 ctype, regs; debug("Buswidth = %d, clock: %d\n",mmc->bus_width, mmc->clock); @@ -304,6 +304,14 @@ static void dwmci_set_ios(struct mmc *mmc) dwmci_writel(host, DWMCI_CTYPE, ctype); + regs = dwmci_readl(host, DWMCI_UHS_REG); + if (mmc->card_caps & MMC_MODE_DDR_52MHz) + regs |= DWMCI_DDR_MODE; + else + regs &= DWMCI_DDR_MODE; + + dwmci_writel(host, DWMCI_UHS_REG, regs); + if (host->clksel) host->clksel(host); } diff --git a/include/dwmmc.h b/include/dwmmc.h index 14c7db82691..b67f11b113f 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -123,6 +123,9 @@ #define DWMCI_BMOD_IDMAC_FB (1 << 1) #define DWMCI_BMOD_IDMAC_EN (1 << 7) +/* UHS register */ +#define DWMCI_DDR_MODE (1 << 16) + /* quirks */ #define DWMCI_QUIRK_DISABLE_SMU (1 << 0) -- cgit v1.3.1 From e33daad0b76e71da14016e12d8f12b74f090a4ac Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Fri, 16 May 2014 13:59:58 +0900 Subject: ARM: exynos4: enable the dwmmc configuration Signed-off-by: Jaehoon Chung Tested-by: Lukasz Majewski Acked-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- include/configs/exynos4-dt.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/exynos4-dt.h b/include/configs/exynos4-dt.h index cbd2d204cf9..0c560ae45ee 100644 --- a/include/configs/exynos4-dt.h +++ b/include/configs/exynos4-dt.h @@ -44,6 +44,9 @@ #define CONFIG_S5P_SDHCI #define CONFIG_SDHCI #define CONFIG_MMC_SDMA +#define CONFIG_DWMMC +#define CONFIG_EXYNOS_DWMMC +#define CONFIG_BOUNCE_BUFFER #define CONFIG_MMC_DEFAULT_DEV 0 /* PWM */ -- cgit v1.3.1 From 913702ca397755e06fcc126a063ebbf814ac869b Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 20 May 2014 06:01:34 -0600 Subject: power: Rename CONFIG_PMIC_... to CONFIG_POWER_... Commit be3b51aa did this mostly, but several have been added since. Do the job again. Signed-off-by: Simon Glass Acked-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- drivers/power/power_fsl.c | 6 +++--- include/configs/arndale.h | 4 ++-- include/configs/exynos5250-dt.h | 2 +- include/configs/mx25pdk.h | 2 +- include/configs/mx35pdk.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/woodburn_common.h | 2 +- 8 files changed, 11 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/drivers/power/power_fsl.c b/drivers/power/power_fsl.c index ac0b541d797..a64161b2430 100644 --- a/drivers/power/power_fsl.c +++ b/drivers/power/power_fsl.c @@ -11,9 +11,9 @@ #include #include -#if defined(CONFIG_PMIC_FSL_MC13892) +#if defined(CONFIG_POWER_FSL_MC13892) #define FSL_PMIC_I2C_LENGTH 3 -#elif defined(CONFIG_PMIC_FSL_MC34704) +#elif defined(CONFIG_POWER_FSL_MC34704) #define FSL_PMIC_I2C_LENGTH 1 #endif @@ -51,7 +51,7 @@ int pmic_init(unsigned char bus) p->hw.i2c.addr = CONFIG_SYS_FSL_PMIC_I2C_ADDR; p->hw.i2c.tx_num = FSL_PMIC_I2C_LENGTH; #else -#error "You must select CONFIG_POWER_SPI or CONFIG_PMIC_I2C" +#error "You must select CONFIG_POWER_SPI or CONFIG_POWER_I2C" #endif return 0; diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 515facfd675..30ecd45584e 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -224,8 +224,8 @@ /* PMIC */ #define CONFIG_PMIC -#define CONFIG_PMIC_I2C -#define CONFIG_PMIC_MAX77686 +#define CONFIG_POWER_I2C +#define CONFIG_POWER_MAX77686 #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-arndale diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index b7ff47236b7..9d1d56a53b4 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -45,7 +45,7 @@ #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK /* PMIC */ -#define CONFIG_PMIC_MAX77686 +#define CONFIG_POWER_MAX77686 /* Sound */ #define CONFIG_CMD_SOUND diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index aff2419f852..d464ad964b9 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -107,7 +107,7 @@ #define CONFIG_POWER #define CONFIG_POWER_I2C #define CONFIG_POWER_FSL -#define CONFIG_PMIC_FSL_MC34704 +#define CONFIG_POWER_FSL_MC34704 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x54 #define CONFIG_DOS_PARTITION diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 0a46f4c305f..ab481441b29 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -52,7 +52,7 @@ #define CONFIG_POWER #define CONFIG_POWER_I2C #define CONFIG_POWER_FSL -#define CONFIG_PMIC_FSL_MC13892 +#define CONFIG_POWER_FSL_MC13892 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 #define CONFIG_RTC_MC13XXX diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 3f0d80ac680..042cdd03235 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -45,7 +45,7 @@ #define CONFIG_POWER_I2C #define CONFIG_POWER_FSL #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 -#define CONFIG_PMIC_FSL_MC13892 +#define CONFIG_POWER_FSL_MC13892 #define CONFIG_RTC_MC13XXX /* MMC Configs */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 5859f360e00..c7f54d4e8cb 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -80,7 +80,7 @@ #define CONFIG_POWER_I2C #define CONFIG_DIALOG_POWER #define CONFIG_POWER_FSL -#define CONFIG_PMIC_FSL_MC13892 +#define CONFIG_POWER_FSL_MC13892 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h index 695bc230c03..259205e8817 100644 --- a/include/configs/woodburn_common.h +++ b/include/configs/woodburn_common.h @@ -55,7 +55,7 @@ #define CONFIG_POWER #define CONFIG_POWER_I2C #define CONFIG_POWER_FSL -#define CONFIG_PMIC_FSL_MC13892 +#define CONFIG_POWER_FSL_MC13892 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 #define CONFIG_RTC_MC13XXX -- cgit v1.3.1 From 78a36c3ef390f7780840db3b42837e55e002829a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 20 May 2014 06:01:35 -0600 Subject: power: Add PMIC_ prefix to CHARGER_EN/DISABLE This enum should be common across all PMICs rather than having it independently defined with the same name in multiple places. Signed-off-by: Simon Glass Signed-off-by: Minkyu Kang --- drivers/power/battery/bat_trats.c | 4 ++-- drivers/power/battery/bat_trats2.c | 2 +- drivers/power/mfd/pmic_max77693.c | 2 +- drivers/power/pmic/pmic_max8997.c | 2 +- include/power/max77693_pmic.h | 2 -- include/power/max8997_pmic.h | 1 - include/power/pmic.h | 5 +++++ 7 files changed, 10 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/drivers/power/battery/bat_trats.c b/drivers/power/battery/bat_trats.c index 41b179fc540..bfde6921764 100644 --- a/drivers/power/battery/bat_trats.c +++ b/drivers/power/battery/bat_trats.c @@ -19,7 +19,7 @@ static int power_battery_charge(struct pmic *bat) struct battery *battery = p_bat->bat; int k; - if (bat->chrg->chrg_state(p_bat->chrg, CHARGER_ENABLE, 450)) + if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450)) return -1; for (k = 0; bat->chrg->chrg_bat_present(p_bat->chrg) && @@ -42,7 +42,7 @@ static int power_battery_charge(struct pmic *bat) } } exit: - bat->chrg->chrg_state(p_bat->chrg, CHARGER_DISABLE, 0); + bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_DISABLE, 0); return 0; } diff --git a/drivers/power/battery/bat_trats2.c b/drivers/power/battery/bat_trats2.c index 94015aa41a1..57221adf818 100644 --- a/drivers/power/battery/bat_trats2.c +++ b/drivers/power/battery/bat_trats2.c @@ -17,7 +17,7 @@ static int power_battery_charge(struct pmic *bat) { struct power_battery *p_bat = bat->pbat; - if (bat->chrg->chrg_state(p_bat->chrg, CHARGER_ENABLE, 450)) + if (bat->chrg->chrg_state(p_bat->chrg, PMIC_CHARGER_ENABLE, 450)) return -1; return 0; diff --git a/drivers/power/mfd/pmic_max77693.c b/drivers/power/mfd/pmic_max77693.c index 1a4416b54f4..6b28e28b3f8 100644 --- a/drivers/power/mfd/pmic_max77693.c +++ b/drivers/power/mfd/pmic_max77693.c @@ -22,7 +22,7 @@ static int max77693_charger_state(struct pmic *p, int state, int current) val = MAX77693_CHG_UNLOCK; pmic_reg_write(p, MAX77693_CHG_CNFG_06, val); - if (state == CHARGER_DISABLE) { + if (state == PMIC_CHARGER_DISABLE) { puts("Disable the charger.\n"); pmic_reg_read(p, MAX77693_CHG_CNFG_00, &val); val &= ~0x01; diff --git a/drivers/power/pmic/pmic_max8997.c b/drivers/power/pmic/pmic_max8997.c index ba016923275..a36a9a08bf4 100644 --- a/drivers/power/pmic/pmic_max8997.c +++ b/drivers/power/pmic/pmic_max8997.c @@ -35,7 +35,7 @@ static int pmic_charger_state(struct pmic *p, int state, int current) if (pmic_probe(p)) return -1; - if (state == CHARGER_DISABLE) { + if (state == PMIC_CHARGER_DISABLE) { puts("Disable the charger.\n"); pmic_reg_read(p, MAX8997_REG_MBCCTRL2, &val); val &= ~(MBCHOSTEN | VCHGR_FC); diff --git a/include/power/max77693_pmic.h b/include/power/max77693_pmic.h index 616d051f178..3d59e5916e5 100644 --- a/include/power/max77693_pmic.h +++ b/include/power/max77693_pmic.h @@ -10,8 +10,6 @@ #include -enum {CHARGER_ENABLE, CHARGER_DISABLE}; - #define CHARGER_MIN_CURRENT 200 #define CHARGER_MAX_CURRENT 2000 diff --git a/include/power/max8997_pmic.h b/include/power/max8997_pmic.h index 74c5d543871..728d60afa59 100644 --- a/include/power/max8997_pmic.h +++ b/include/power/max8997_pmic.h @@ -170,7 +170,6 @@ enum { #define SAFEOUT_3_30V 0x03 /* Charger */ -enum {CHARGER_ENABLE, CHARGER_DISABLE}; #define DETBAT (1 << 2) #define MBCICHFCSET (1 << 4) #define MBCHOSTEN (1 << 6) diff --git a/include/power/pmic.h b/include/power/pmic.h index 8f282dd2f29..a62e6c90a5e 100644 --- a/include/power/pmic.h +++ b/include/power/pmic.h @@ -17,6 +17,11 @@ enum { I2C_PMIC, I2C_NUM, }; enum { PMIC_READ, PMIC_WRITE, }; enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, }; +enum { + PMIC_CHARGER_DISABLE, + PMIC_CHARGER_ENABLE, +}; + struct p_i2c { unsigned char addr; unsigned char *buf; -- cgit v1.3.1 From ac1058fdb72b8a6dade7c81be31b22760099ee91 Mon Sep 17 00:00:00 2001 From: Tom Wai-Hong Tam Date: Tue, 20 May 2014 06:01:36 -0600 Subject: power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam Signed-off-by: Hatim Ali Signed-off-by: Katie Roberts-Hoffman Signed-off-by: Rong Chang Signed-off-by: Sean Paul Signed-off-by: Vincent Palatin Signed-off-by: Aaron Durbin Signed-off-by: Simon Glass Signed-off-by: Minkyu Kang --- doc/device-tree-bindings/power/tps65090.txt | 17 ++ doc/device-tree-bindings/regulator/tps65090.txt | 122 ++++++++++ drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic_tps65090.c | 310 ++++++++++++++++++++++++ include/fdtdec.h | 1 + include/power/tps65090_pmic.h | 73 ++++++ lib/fdtdec.c | 1 + 7 files changed, 525 insertions(+) create mode 100644 doc/device-tree-bindings/power/tps65090.txt create mode 100644 doc/device-tree-bindings/regulator/tps65090.txt create mode 100644 drivers/power/pmic/pmic_tps65090.c create mode 100644 include/power/tps65090_pmic.h (limited to 'include') diff --git a/doc/device-tree-bindings/power/tps65090.txt b/doc/device-tree-bindings/power/tps65090.txt new file mode 100644 index 00000000000..8e5e0d3910d --- /dev/null +++ b/doc/device-tree-bindings/power/tps65090.txt @@ -0,0 +1,17 @@ +TPS65090 Frontend PMU with Switchmode Charger + +Required Properties: +-compatible: "ti,tps65090-charger" + +Optional Properties: +-ti,enable-low-current-chrg: Enables charging when a low current is detected + while the default logic is to stop charging. + +This node is a subnode of the tps65090 PMIC. + +Example: + + tps65090-charger { + compatible = "ti,tps65090-charger"; + ti,enable-low-current-chrg; + }; diff --git a/doc/device-tree-bindings/regulator/tps65090.txt b/doc/device-tree-bindings/regulator/tps65090.txt new file mode 100644 index 00000000000..313a60ba61d --- /dev/null +++ b/doc/device-tree-bindings/regulator/tps65090.txt @@ -0,0 +1,122 @@ +TPS65090 regulators + +Required properties: +- compatible: "ti,tps65090" +- reg: I2C slave address +- interrupts: the interrupt outputs of the controller +- regulators: A node that houses a sub-node for each regulator within the + device. Each sub-node is identified using the node's name, with valid + values listed below. The content of each sub-node is defined by the + standard binding for regulators; see regulator.txt. + dcdc[1-3], fet[1-7] and ldo[1-2] respectively. +- vsys[1-3]-supply: The input supply for DCDC[1-3] respectively. +- infet[1-7]-supply: The input supply for FET[1-7] respectively. +- vsys-l[1-2]-supply: The input supply for LDO[1-2] respectively. + +Optional properties: +- ti,enable-ext-control: This is applicable for DCDC1, DCDC2 and DCDC3. + If DCDCs are externally controlled then this property should be there. +- "dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3. + If DCDCs are externally controlled and if it is from GPIO then GPIO + number should be provided. If it is externally controlled and no GPIO + entry then driver will just configure this rails as external control + and will not provide any enable/disable APIs. + +Each regulator is defined using the standard binding for regulators. + +Example: + + tps65090@48 { + compatible = "ti,tps65090"; + reg = <0x48>; + interrupts = <0 88 0x4>; + + vsys1-supply = <&some_reg>; + vsys2-supply = <&some_reg>; + vsys3-supply = <&some_reg>; + infet1-supply = <&some_reg>; + infet2-supply = <&some_reg>; + infet3-supply = <&some_reg>; + infet4-supply = <&some_reg>; + infet5-supply = <&some_reg>; + infet6-supply = <&some_reg>; + infet7-supply = <&some_reg>; + vsys_l1-supply = <&some_reg>; + vsys_l2-supply = <&some_reg>; + + regulators { + dcdc1 { + regulator-name = "dcdc1"; + regulator-boot-on; + regulator-always-on; + ti,enable-ext-control; + dcdc-ext-control-gpios = <&gpio 10 0>; + }; + + dcdc2 { + regulator-name = "dcdc2"; + regulator-boot-on; + regulator-always-on; + }; + + dcdc3 { + regulator-name = "dcdc3"; + regulator-boot-on; + regulator-always-on; + }; + + fet1 { + regulator-name = "fet1"; + regulator-boot-on; + regulator-always-on; + }; + + fet2 { + regulator-name = "fet2"; + regulator-boot-on; + regulator-always-on; + }; + + fet3 { + regulator-name = "fet3"; + regulator-boot-on; + regulator-always-on; + }; + + fet4 { + regulator-name = "fet4"; + regulator-boot-on; + regulator-always-on; + }; + + fet5 { + regulator-name = "fet5"; + regulator-boot-on; + regulator-always-on; + }; + + fet6 { + regulator-name = "fet6"; + regulator-boot-on; + regulator-always-on; + }; + + fet7 { + regulator-name = "fet7"; + regulator-boot-on; + regulator-always-on; + }; + + ldo1 { + regulator-name = "ldo1"; + regulator-boot-on; + regulator-always-on; + }; + + ldo2 { + regulator-name = "ldo2"; + regulator-boot-on; + regulator-always-on; + }; + }; + }; diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 4129bdabfbe..3244f690b9c 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -10,5 +10,6 @@ obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o obj-$(CONFIG_POWER_MAX77686) += pmic_max77686.o obj-$(CONFIG_POWER_PFUZE100) += pmic_pfuze100.o +obj-$(CONFIG_POWER_TPS65090) += pmic_tps65090.o obj-$(CONFIG_POWER_TPS65217) += pmic_tps65217.o obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o diff --git a/drivers/power/pmic/pmic_tps65090.c b/drivers/power/pmic/pmic_tps65090.c new file mode 100644 index 00000000000..c5b396610ac --- /dev/null +++ b/drivers/power/pmic/pmic_tps65090.c @@ -0,0 +1,310 @@ +/* + * Copyright (c) 2012 The Chromium OS Authors. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define TPS65090_NAME "TPS65090_PMIC" + +/* TPS65090 register addresses */ +enum { + REG_IRQ1 = 0, + REG_CG_CTRL0 = 4, + REG_CG_STATUS1 = 0xa, + REG_FET1_CTRL = 0x0f, + REG_FET2_CTRL, + REG_FET3_CTRL, + REG_FET4_CTRL, + REG_FET5_CTRL, + REG_FET6_CTRL, + REG_FET7_CTRL, + TPS65090_NUM_REGS, +}; + +enum { + IRQ1_VBATG = 1 << 3, + CG_CTRL0_ENC_MASK = 0x01, + + MAX_FET_NUM = 7, + MAX_CTRL_READ_TRIES = 5, + + /* TPS65090 FET_CTRL register values */ + FET_CTRL_TOFET = 1 << 7, /* Timeout, startup, overload */ + FET_CTRL_PGFET = 1 << 4, /* Power good for FET status */ + FET_CTRL_WAIT = 3 << 2, /* Overcurrent timeout max */ + FET_CTRL_ADENFET = 1 << 1, /* Enable output auto discharge */ + FET_CTRL_ENFET = 1 << 0, /* Enable FET */ +}; + +/** + * Checks for a valid FET number + * + * @param fet_id FET number to check + * @return 0 if ok, -EINVAL if FET value is out of range + */ +static int tps65090_check_fet(unsigned int fet_id) +{ + if (fet_id == 0 || fet_id > MAX_FET_NUM) { + debug("parameter fet_id is out of range, %u not in 1 ~ %u\n", + fet_id, MAX_FET_NUM); + return -EINVAL; + } + + return 0; +} + +/** + * Set the power state for a FET + * + * @param pmic pmic structure for the tps65090 + * @param fet_id Fet number to set (1..MAX_FET_NUM) + * @param set 1 to power on FET, 0 to power off + * @return -EIO if we got a comms error, -EAGAIN if the FET failed to + * change state. If all is ok, returns 0. + */ +static int tps65090_fet_set(struct pmic *pmic, int fet_id, bool set) +{ + int retry; + u32 reg, value; + + value = FET_CTRL_ADENFET | FET_CTRL_WAIT; + if (set) + value |= FET_CTRL_ENFET; + + if (pmic_reg_write(pmic, REG_FET1_CTRL + fet_id - 1, value)) + return -EIO; + + /* Try reading until we get a result */ + for (retry = 0; retry < MAX_CTRL_READ_TRIES; retry++) { + if (pmic_reg_read(pmic, REG_FET1_CTRL + fet_id - 1, ®)) + return -EIO; + + /* Check that the fet went into the expected state */ + if (!!(reg & FET_CTRL_PGFET) == set) + return 0; + + /* If we got a timeout, there is no point in waiting longer */ + if (reg & FET_CTRL_TOFET) + break; + + mdelay(1); + } + + debug("FET %d: Power good should have set to %d but reg=%#02x\n", + fet_id, set, reg); + return -EAGAIN; +} + +int tps65090_fet_enable(unsigned int fet_id) +{ + struct pmic *pmic; + ulong start; + int loops; + int ret; + + ret = tps65090_check_fet(fet_id); + if (ret) + return ret; + + pmic = pmic_get(TPS65090_NAME); + if (!pmic) + return -EACCES; + + start = get_timer(0); + for (loops = 0;; loops++) { + ret = tps65090_fet_set(pmic, fet_id, true); + if (!ret) + break; + + if (get_timer(start) > 100) + break; + + /* Turn it off and try again until we time out */ + tps65090_fet_set(pmic, fet_id, false); + } + + if (ret) + debug("%s: FET%d failed to power on: time=%lums, loops=%d\n", + __func__, fet_id, get_timer(start), loops); + else if (loops) + debug("%s: FET%d powered on after %lums, loops=%d\n", + __func__, fet_id, get_timer(start), loops); + + /* + * Unfortunately, there are some conditions where the power + * good bit will be 0, but the fet still comes up. One such + * case occurs with the lcd backlight. We'll just return 0 here + * and assume that the fet will eventually come up. + */ + if (ret == -EAGAIN) + ret = 0; + + return ret; +} + +int tps65090_fet_disable(unsigned int fet_id) +{ + struct pmic *pmic; + int ret; + + ret = tps65090_check_fet(fet_id); + if (ret) + return ret; + + pmic = pmic_get(TPS65090_NAME); + if (!pmic) + return -EACCES; + ret = tps65090_fet_set(pmic, fet_id, false); + + return ret; +} + +int tps65090_fet_is_enabled(unsigned int fet_id) +{ + struct pmic *pmic; + u32 reg; + int ret; + + ret = tps65090_check_fet(fet_id); + if (ret) + return ret; + + pmic = pmic_get(TPS65090_NAME); + if (!pmic) + return -ENODEV; + ret = pmic_reg_read(pmic, REG_FET1_CTRL + fet_id - 1, ®); + if (ret) { + debug("fail to read FET%u_CTRL register over I2C", fet_id); + return -EIO; + } + + return reg & FET_CTRL_ENFET; +} + +int tps65090_get_charging(void) +{ + struct pmic *pmic; + u32 val; + int ret; + + pmic = pmic_get(TPS65090_NAME); + if (!pmic) + return -EACCES; + + ret = pmic_reg_read(pmic, REG_CG_CTRL0, &val); + if (ret) + return ret; + + return !!(val & CG_CTRL0_ENC_MASK); +} + +static int tps65090_charger_state(struct pmic *pmic, int state, + int current) +{ + u32 val; + int ret; + + ret = pmic_reg_read(pmic, REG_CG_CTRL0, &val); + if (!ret) { + if (state == PMIC_CHARGER_ENABLE) + val |= CG_CTRL0_ENC_MASK; + else + val &= ~CG_CTRL0_ENC_MASK; + ret = pmic_reg_write(pmic, REG_CG_CTRL0, val); + } + if (ret) { + debug("%s: Failed to read/write register\n", __func__); + return ret; + } + + return 0; +} + +int tps65090_get_status(void) +{ + struct pmic *pmic; + u32 val; + int ret; + + pmic = pmic_get(TPS65090_NAME); + if (!pmic) + return -EACCES; + + ret = pmic_reg_read(pmic, REG_CG_STATUS1, &val); + if (ret) + return ret; + + return val; +} + +static int tps65090_charger_bat_present(struct pmic *pmic) +{ + u32 val; + int ret; + + ret = pmic_reg_read(pmic, REG_IRQ1, &val); + if (ret) + return ret; + + return !!(val & IRQ1_VBATG); +} + +static struct power_chrg power_chrg_pmic_ops = { + .chrg_bat_present = tps65090_charger_bat_present, + .chrg_state = tps65090_charger_state, +}; + +int tps65090_init(void) +{ + struct pmic *p; + int bus; + int addr; + const void *blob = gd->fdt_blob; + int node, parent; + + node = fdtdec_next_compatible(blob, 0, COMPAT_TI_TPS65090); + if (node < 0) { + debug("PMIC: No node for PMIC Chip in device tree\n"); + debug("node = %d\n", node); + return -ENODEV; + } + + parent = fdt_parent_offset(blob, node); + if (parent < 0) { + debug("%s: Cannot find node parent\n", __func__); + return -EINVAL; + } + + bus = i2c_get_bus_num_fdt(parent); + if (p->bus < 0) { + debug("%s: Cannot find I2C bus\n", __func__); + return -ENOENT; + } + addr = fdtdec_get_int(blob, node, "reg", TPS65090_I2C_ADDR); + p = pmic_alloc(); + if (!p) { + printf("%s: POWER allocation error!\n", __func__); + return -ENOMEM; + } + + p->name = TPS65090_NAME; + p->bus = bus; + p->interface = PMIC_I2C; + p->number_of_regs = TPS65090_NUM_REGS; + p->hw.i2c.addr = addr; + p->hw.i2c.tx_num = 1; + p->chrg = &power_chrg_pmic_ops; + + puts("TPS65090 PMIC init\n"); + + return 0; +} diff --git a/include/fdtdec.h b/include/fdtdec.h index 8c751fdc5f1..4b029d72588 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -92,6 +92,7 @@ enum fdt_compat_id { COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */ COMPAT_SANDBOX_HOST_EMULATION, /* Sandbox emulation of a function */ COMPAT_SANDBOX_LCD_SDL, /* Sandbox LCD emulation with SDL */ + COMPAT_TI_TPS65090, /* Texas Instrument TPS65090 */ COMPAT_COUNT, }; diff --git a/include/power/tps65090_pmic.h b/include/power/tps65090_pmic.h new file mode 100644 index 00000000000..dcf99c956a5 --- /dev/null +++ b/include/power/tps65090_pmic.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2012 The Chromium OS Authors. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __TPS65090_PMIC_H_ +#define __TPS65090_PMIC_H_ + +/* I2C device address for TPS65090 PMU */ +#define TPS65090_I2C_ADDR 0x48 + +enum { + /* Status register fields */ + TPS65090_ST1_OTC = 1 << 0, + TPS65090_ST1_OCC = 1 << 1, + TPS65090_ST1_STATE_SHIFT = 4, + TPS65090_ST1_STATE_MASK = 0xf << TPS65090_ST1_STATE_SHIFT, +}; + +/** + * Enable FET + * + * @param fet_id FET ID, value between 1 and 7 + * @return 0 on success, non-0 on failure + */ +int tps65090_fet_enable(unsigned int fet_id); + +/** + * Disable FET + * + * @param fet_id FET ID, value between 1 and 7 + * @return 0 on success, non-0 on failure + */ +int tps65090_fet_disable(unsigned int fet_id); + +/** + * Is FET enabled? + * + * @param fet_id FET ID, value between 1 and 7 + * @return 1 enabled, 0 disabled, negative value on failure + */ +int tps65090_fet_is_enabled(unsigned int fet_id); + +/** + * Enable / disable the battery charger + * + * @param enable 0 to disable charging, non-zero to enable + */ +int tps65090_set_charge_enable(int enable); + +/** + * Check whether we have enabled battery charging + * + * @return 1 if enabled, 0 if disabled + */ +int tps65090_get_charging(void); + +/** + * Return the value of the status register + * + * @return status register value, or -1 on error + */ +int tps65090_get_status(void); + +/** + * Initialize the TPS65090 PMU. + * + * @return 0 on success, non-0 on failure + */ +int tps65090_init(void); + +#endif /* __TPS65090_PMIC_H_ */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 35e91b4ef08..6cccfe57cd8 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -66,6 +66,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"), COMPAT(SANDBOX_HOST_EMULATION, "sandbox,host-emulation"), COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"), + COMPAT(TI_TPS65090, "ti,tps65090"), }; const char *fdtdec_get_compatible(enum fdt_compat_id id) -- cgit v1.3.1 From 2469bf35a8c4fde242300c8123406cdc3b3b464c Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Tue, 20 May 2014 06:01:37 -0600 Subject: exynos5: Enable tps65090 on exynos5-dt The TPS65090 pmic chip can be on exynos5250 boards. Therefore, select the appropriate config option for TPS65090 devices. This commit should really use exynos5-dt.c, when it is available. Signed-off-by: Simon Glass Reviewed-by: Simon Glass Signed-off-by: Minkyu Kang --- include/configs/exynos5-dt.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h index 5a9b1b42d31..b8304951d25 100644 --- a/include/configs/exynos5-dt.h +++ b/include/configs/exynos5-dt.h @@ -259,6 +259,7 @@ /* PMIC */ #define CONFIG_POWER #define CONFIG_POWER_I2C +#define CONFIG_POWER_TPS65090 /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET -- cgit v1.3.1 From a9cf6da925af92f70165d39afca06e4fbbfcf5a7 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 20 May 2014 06:01:42 -0600 Subject: exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass Reviewed-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/exynos5-dt.c | 100 +++++++++++++++++++++++++++++++++++- include/fdtdec.h | 1 + lib/fdtdec.c | 1 + 3 files changed, 101 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c index bce7583fd02..d6ce1337b94 100644 --- a/board/samsung/smdk5250/exynos5-dt.c +++ b/board/samsung/smdk5250/exynos5-dt.c @@ -11,9 +11,9 @@ #include #include #include +#include #include #include -#include #include #include #include @@ -180,6 +180,59 @@ int exynos_power_init(void) #endif /* CONFIG_POWER */ #ifdef CONFIG_LCD +static int board_dp_bridge_setup(void) +{ + const int max_tries = 10; + int num_tries, node; + + /* + * TODO(sjg): Use device tree for GPIOs when exynos GPIO + * numbering patch is in mainline. + */ + debug("%s\n", __func__); + node = fdtdec_next_compatible(gd->fdt_blob, 0, COMPAT_NXP_PTN3460); + if (node < 0) { + debug("%s: No node for DP bridge in device tree\n", __func__); + return -ENODEV; + } + + /* Setup the GPIOs */ + + /* PD is ACTIVE_LOW, and initially de-asserted */ + gpio_set_pull(EXYNOS5_GPIO_Y25, S5P_GPIO_PULL_NONE); + gpio_direction_output(EXYNOS5_GPIO_Y25, 1); + + /* Reset is ACTIVE_LOW */ + gpio_set_pull(EXYNOS5_GPIO_X15, S5P_GPIO_PULL_NONE); + gpio_direction_output(EXYNOS5_GPIO_X15, 0); + + udelay(10); + gpio_set_value(EXYNOS5_GPIO_X15, 1); + + gpio_direction_input(EXYNOS5_GPIO_X07); + + /* + * We need to wait for 90ms after bringing up the bridge since there + * is a phantom "high" on the HPD chip during its bootup. The phantom + * high comes within 7ms of de-asserting PD and persists for at least + * 15ms. The real high comes roughly 50ms after PD is de-asserted. The + * phantom high makes it hard for us to know when the NXP chip is up. + */ + mdelay(90); + + for (num_tries = 0; num_tries < max_tries; num_tries++) { + /* Check HPD. If it's high, we're all good. */ + if (gpio_get_value(EXYNOS5_GPIO_X07)) + return 0; + + debug("%s: eDP bridge failed to come up; try %d of %d\n", + __func__, num_tries, max_tries); + } + + /* Immediately go into bridge reset if the hp line is not high */ + return -ENODEV; +} + void exynos_cfg_lcd_gpio(void) { /* For Backlight */ @@ -198,4 +251,49 @@ void exynos_set_dp_phy(unsigned int onoff) { set_dp_phy_ctrl(onoff); } + +void exynos_backlight_on(unsigned int on) +{ + debug("%s(%u)\n", __func__, on); + + if (!on) + return; + +#ifdef CONFIG_POWER_TPS65090 + int ret; + + ret = tps65090_fet_enable(1); /* Enable FET1, backlight */ + if (ret) + return; + + /* T5 in the LCD timing spec (defined as > 10ms) */ + mdelay(10); + + /* board_dp_backlight_pwm */ + gpio_direction_output(EXYNOS5_GPIO_B20, 1); + + /* T6 in the LCD timing spec (defined as > 10ms) */ + mdelay(10); + + /* board_dp_backlight_en */ + gpio_direction_output(EXYNOS5_GPIO_X30, 1); +#endif +} + +void exynos_lcd_power_on(void) +{ + int ret; + + debug("%s\n", __func__); + +#ifdef CONFIG_POWER_TPS65090 + /* board_dp_lcd_vdd */ + tps65090_fet_enable(6); /* Enable FET6, lcd panel */ +#endif + + ret = board_dp_bridge_setup(); + if (ret && ret != -ENODEV) + printf("LCD bridge failed to enable: %d\n", ret); +} + #endif diff --git a/include/fdtdec.h b/include/fdtdec.h index 4b029d72588..a7e6ee7fdfd 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -93,6 +93,7 @@ enum fdt_compat_id { COMPAT_SANDBOX_HOST_EMULATION, /* Sandbox emulation of a function */ COMPAT_SANDBOX_LCD_SDL, /* Sandbox LCD emulation with SDL */ COMPAT_TI_TPS65090, /* Texas Instrument TPS65090 */ + COMPAT_NXP_PTN3460, /* NXP PTN3460 DP/LVDS bridge */ COMPAT_COUNT, }; diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 6cccfe57cd8..13d3d2f522f 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -67,6 +67,7 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(SANDBOX_HOST_EMULATION, "sandbox,host-emulation"), COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"), COMPAT(TI_TPS65090, "ti,tps65090"), + COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"), }; const char *fdtdec_get_compatible(enum fdt_compat_id id) -- cgit v1.3.1 From 2f43f85460453f928005e06915892167addbd49a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Tue, 20 May 2014 06:01:43 -0600 Subject: initcall: Improve debugging support Add the ability to display the code offset of an initcall even after it is relocated. This makes it much easier to relate initcalls back to the U-Boot System.map file. Signed-off-by: Simon Glass Signed-off-by: Minkyu Kang --- include/initcall.h | 2 +- lib/initcall.c | 17 ++++++++++++----- 2 files changed, 13 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/initcall.h b/include/initcall.h index 2378077361d..65f67dca832 100644 --- a/include/initcall.h +++ b/include/initcall.h @@ -6,4 +6,4 @@ typedef int (*init_fnc_t)(void); -int initcall_run_list(init_fnc_t init_sequence[]); +int initcall_run_list(const init_fnc_t init_sequence[]); diff --git a/lib/initcall.c b/lib/initcall.c index fa76dd73c19..7597bad5554 100644 --- a/lib/initcall.c +++ b/lib/initcall.c @@ -7,15 +7,22 @@ #include #include -int initcall_run_list(init_fnc_t init_sequence[]) +DECLARE_GLOBAL_DATA_PTR; + +int initcall_run_list(const init_fnc_t init_sequence[]) { - init_fnc_t *init_fnc_ptr; + const init_fnc_t *init_fnc_ptr; for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { - debug("initcall: %p\n", *init_fnc_ptr); + unsigned long reloc_ofs = 0; + + if (gd->flags & GD_FLG_RELOC) + reloc_ofs = gd->reloc_off; + debug("initcall: %p\n", (char *)*init_fnc_ptr - reloc_ofs); if ((*init_fnc_ptr)()) { - debug("initcall sequence %p failed at call %p\n", - init_sequence, *init_fnc_ptr); + printf("initcall sequence %p failed at call %p\n", + init_sequence, + (char *)*init_fnc_ptr - reloc_ofs); return -1; } } -- cgit v1.3.1 From 0c04b1a83b54e5c3c458b5dfa096784be76e24d4 Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Thu, 22 May 2014 08:45:50 +0200 Subject: arm:board:exynos4: add CONFIG_SYS_GENERIC_BOARD Add CONFIG_SYS_GENERIC_BOARD for all Exynos4 boards. Signed-off-by: Piotr Wilczek Cc: Przemyslaw Marczak Cc: Lukasz Majewski Signed-off-by: Minkyu Kang --- include/configs/exynos4-dt.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/exynos4-dt.h b/include/configs/exynos4-dt.h index 0c560ae45ee..44e6ab4ef33 100644 --- a/include/configs/exynos4-dt.h +++ b/include/configs/exynos4-dt.h @@ -20,6 +20,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_BOARD_COMMON +#define CONFIG_SYS_GENERIC_BOARD /* Enable fdt support */ #define CONFIG_OF_CONTROL -- cgit v1.3.1