From 715cce65b889214a728dd44759204316aff29006 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:42 -0500 Subject: Convert CONFIG_SYS_NAND_DBW_8 et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_DBW_8 CONFIG_SYS_NAND_DBW_16 Note that all instances of the code check for CONFIG_SYS_NAND_DBW_16 being defined, and then "else" to CONFIG_SYS_NAND_DBW_8 whereas all of the configs set CONFIG_SYS_NAND_DBW_8. So we introduce CONFIG_SYS_NAND_DBW_16 as an option. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9m10g45ek.h | 1 - include/configs/at91sam9rlek.h | 1 - include/configs/at91sam9x5ek.h | 1 - include/configs/corvus.h | 1 - include/configs/ethernut5.h | 1 - include/configs/gardena-smart-gateway-at91sam.h | 1 - include/configs/meesc.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/pm9g45.h | 1 - include/configs/smartweb.h | 1 - include/configs/snapper9g45.h | 1 - include/configs/taurus.h | 1 - 16 files changed, 16 deletions(-) (limited to 'include') diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index d51da9d5067..60b47379e5e 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -44,7 +44,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 5dc8f21a853..d80a686e9ee 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -25,7 +25,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD22 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) /* our CLE is AD21 */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index d31a7742a17..89a8e43e1e0 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -151,7 +151,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 01085476a43..55edd706ead 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -21,7 +21,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index c60c248b747..0a512c217f8 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -26,7 +26,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 71a2863bfc2..b8a14d571d6 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -28,7 +28,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 0596afbf9fa..3e7c0c0d883 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -38,7 +38,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 22647abee0d..a18920d3f09 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -38,7 +38,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 52b9fe2b171..3d62efb38ff 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -23,7 +23,6 @@ /* NAND flash */ #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE BIT(21) /* our CLE is AD22 */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 9f913fad168..30267e29a12 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -53,7 +53,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ -# define CONFIG_SYS_NAND_DBW_8 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 278f1b5cc62..6a89fb1fa9a 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -130,7 +130,6 @@ /* NAND flash */ #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD22 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) /* our CLE is AD21 */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 7c23206a300..c56db4d793d 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -147,7 +147,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 1 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 35fd5256836..7d3a326deaf 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -26,7 +26,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 /* our ALE is AD21 */ #define CONFIG_SYS_NAND_MASK_ALE BIT(21) /* our CLE is AD22 */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index a77215d19be..c8f5816fed9 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -55,7 +55,6 @@ /* NAND flash settings */ #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index c56fb378312..6aba1d3194c 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -31,7 +31,6 @@ /* NAND Flash */ #define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 45780d9a4ea..ca9616d8af5 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -55,7 +55,6 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 -#define CONFIG_SYS_NAND_DBW_8 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -- cgit v1.2.3 From 50493dd1f9f56097721c043fb7bd55c4cb2cc5e4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:43 -0500 Subject: Remove unused symbols This commit removes the following unused symbols: CONFIG_SYS_NAND_DDR_LAW CONFIG_SYS_NAND_ECCSTEPS CONFIG_SYS_NAND_ECCTOTAL CONFIG_SYS_NAND_ENABLE_PIN_SPL CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES CONFIG_SYS_NAND_U_BOOT_RELOC_SP Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/P1010RDB.h | 2 -- include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/colibri_imx7.h | 1 - include/configs/da850evm.h | 4 ---- include/configs/omapl138_lcdk.h | 4 ---- include/configs/siemens-am33x-common.h | 4 ---- include/configs/smartweb.h | 1 - include/configs/taurus.h | 1 - 12 files changed, 22 deletions(-) (limited to 'include') diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index addb306d57f..3448766d8e5 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -235,8 +235,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_NAND_FTIM3 0x0 #endif -#define CONFIG_SYS_NAND_DDR_LAW 11 - /* Set up IFC registers for boot location NOR/NAND */ #if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT) #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 62c4177f309..4b2327d3232 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -234,7 +234,6 @@ FTIM2_NAND_TWHRE(0x1e)) #define CONFIG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index ad8037e7a8c..e7d82bf4118 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -210,7 +210,6 @@ FTIM2_NAND_TWHRE(0x1e)) #define CONFIG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 2dcaeda78b8..08195505b1d 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -198,7 +198,6 @@ FTIM2_NAND_TWHRE(0x1e)) #define CONFIG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 223c8567517..75d9200d568 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -174,7 +174,6 @@ FTIM2_NAND_TWHRE(0x1e)) #define CONFIG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 12edfdd68db..d79789af0e1 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -231,7 +231,6 @@ FTIM2_NAND_TWHRE(0x1e)) #define CONFIG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_DDR_LAW 11 #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 7380440ae7a..5c7a9f2e69f 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -167,7 +167,6 @@ #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND /* NAND stuff */ #define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_MX7_GPMI_62_ECC_BYTES #endif /* USB Configs */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 281cbe37f9d..262a79be015 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -117,10 +117,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ - CONFIG_SYS_NAND_U_BOOT_SIZE - \ - CONFIG_SYS_MALLOC_LEN - \ - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_NAND_ECCPOS { \ 24, 25, 26, 27, 28, \ 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 41039302415..4b24d614e1a 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -116,10 +116,6 @@ #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \ - CONFIG_SYS_NAND_U_BOOT_SIZE - \ - CONFIG_SYS_MALLOC_LEN - \ - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_NAND_ECCPOS { \ 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 87da5e4232c..dd247d2fd98 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -59,10 +59,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ECCSTEPS 4 -#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ - CONFIG_SYS_NAND_ECCSTEPS) - #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE /* diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index c8f5816fed9..538aad9a7bb 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -92,7 +92,6 @@ /* Defines for SPL */ -#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE diff --git a/include/configs/taurus.h b/include/configs/taurus.h index ca9616d8af5..5ab087da8bd 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -126,7 +126,6 @@ /* Defines for SPL */ -#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE -- cgit v1.2.3 From 60db32502c7f5d54c4cd4e485b95204166a83678 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:44 -0500 Subject: Convert CONFIG_SYS_NAND_HW_ECC_OOBFIRST to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_HW_ECC_OOBFIRST Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/da850evm.h | 1 - include/configs/omapl138_lcdk.h | 1 - 2 files changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 262a79be015..abf5db934c5 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -113,7 +113,6 @@ #define CONFIG_SYS_NAND_MASK_CLE 0x10 #define CONFIG_SYS_NAND_MASK_ALE 0x8 #undef CONFIG_SYS_NAND_HW_ECC -#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 4b24d614e1a..184360f7e90 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -111,7 +111,6 @@ #define CONFIG_SYS_NAND_MASK_CLE 0x10 #define CONFIG_SYS_NAND_MASK_ALE 0x8 #undef CONFIG_SYS_NAND_HW_ECC -#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 -- cgit v1.2.3 From 41fa8f471d41fd42a249e3f24e5ecb2fa8f1b1d4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:45 -0500 Subject: Convert CONFIG_SYS_NAND_HW_ECC to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_HW_ECC Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/da850evm.h | 1 - include/configs/omapl138_lcdk.h | 1 - 2 files changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index abf5db934c5..11f104bcb86 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -112,7 +112,6 @@ #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_MASK_CLE 0x10 #define CONFIG_SYS_NAND_MASK_ALE 0x8 -#undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 184360f7e90..233e7b4ee53 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -110,7 +110,6 @@ #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_MASK_CLE 0x10 #define CONFIG_SYS_NAND_MASK_ALE 0x8 -#undef CONFIG_SYS_NAND_HW_ECC #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 -- cgit v1.2.3 From b41641d52efa242b38fbe5f976331005e329487a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:46 -0500 Subject: mtd: nand: raw: atmel_nand: Use ATMEL_BASE_ECC directly This is the only driver, and only one platform makes use of, setting CONFIG_SYS_NAND_ECC_BASE. Reference ATMEL_BASE_ECC directly in this case. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/snapper9g45.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 6aba1d3194c..29462c526ec 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -29,7 +29,6 @@ /* Mem test settings */ /* NAND Flash */ -#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ -- cgit v1.2.3 From 4d3495deb653ad4e50051e846667eaad8257e1f9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:47 -0500 Subject: Convert CONFIG_SYS_NAND_MAX_OOBFREE et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_MAX_OOBFREE CONFIG_SYS_NAND_MAX_ECCPOS Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/T4240RDB.h | 2 -- include/configs/am3517_evm.h | 2 -- include/configs/ls1088aqds.h | 3 --- include/configs/ls1088ardb.h | 3 --- include/configs/ls2080aqds.h | 3 --- include/configs/ls2080ardb.h | 3 --- include/configs/omap3_logic.h | 2 -- include/configs/sunxi-common.h | 4 ---- 8 files changed, 22 deletions(-) (limited to 'include') diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index d79789af0e1..cfd9cb3e7c8 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -197,8 +197,6 @@ + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} /* NAND Flash on IFC */ -#define CONFIG_SYS_NAND_MAX_ECCPOS 256 -#define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_BASE 0xff800000 #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index e0f5f2b0440..2eb7a51ce2e 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -25,8 +25,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 13 -#define CONFIG_SYS_NAND_MAX_OOBFREE 2 -#define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE /* NAND block size is 128 KiB. Synchronize these values with * corresponding Device Tree entries in Linux: diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index d50b76b89ae..3a2fba6b04e 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -69,9 +69,6 @@ #endif #endif -#define CONFIG_SYS_NAND_MAX_ECCPOS 256 -#define CONFIG_SYS_NAND_MAX_OOBFREE 2 - #define CONFIG_SYS_NAND_CSPR_EXT (0x0) #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 4edf40b0b72..e2ae3026c29 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -53,9 +53,6 @@ #endif #endif -#define CONFIG_SYS_NAND_MAX_ECCPOS 256 -#define CONFIG_SYS_NAND_MAX_OOBFREE 2 - #define CONFIG_SYS_NAND_CSPR_EXT (0x0) #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 1fa4aa3734d..e6019870d8a 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -70,9 +70,6 @@ CONFIG_SYS_FLASH_BASE + 0x40000000} #endif -#define CONFIG_SYS_NAND_MAX_ECCPOS 256 -#define CONFIG_SYS_NAND_MAX_OOBFREE 2 - #define CONFIG_SYS_NAND_CSPR_EXT (0x0) #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index e1c66c5dcc0..382d516c08b 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -67,9 +67,6 @@ CONFIG_SYS_FLASH_BASE + 0x40000000} #endif -#define CONFIG_SYS_NAND_MAX_ECCPOS 256 -#define CONFIG_SYS_NAND_MAX_OOBFREE 2 - #define CONFIG_SYS_NAND_CSPR_EXT (0x0) #define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 442a3cad220..7c0bdcbb115 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 13 -#define CONFIG_SYS_NAND_MAX_OOBFREE 2 -#define CONFIG_SYS_NAND_MAX_ECCPOS 56 #endif /* Environment information */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 720768629d6..d9e4c8b699f 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -71,10 +71,6 @@ #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ -#ifdef CONFIG_NAND_SUNXI -#define CONFIG_SYS_NAND_MAX_ECCPOS 1664 -#endif - /* mmc config */ #define CONFIG_MMC_SUNXI_SLOT 0 -- cgit v1.2.3 From 1a792803d8905373bc04bbc2a4dc7d0d1ecdd967 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:48 -0500 Subject: Convert CONFIG_SYS_NAND_NO_SUBPAGE_WRITE to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_NO_SUBPAGE_WRITE Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/ti_armv7_keystone2.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 6c01ab813e5..b8b4b28b3d6 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -68,7 +68,6 @@ #define CONFIG_SYS_NAND_LARGEPAGE #define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, } -#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE #define DFU_ALT_INFO_MMC \ "dfu_alt_info_mmc=" \ -- cgit v1.2.3 From a9f03760c1b85cda153723c5dc5d7ad0a64a5acc Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:49 -0500 Subject: Convert CONFIG_SYS_NAND_PAGE_2K et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_PAGE_2K CONFIG_SYS_NAND_PAGE_4K Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/da850evm.h | 1 - include/configs/k2e_evm.h | 3 --- include/configs/k2g_evm.h | 3 --- include/configs/k2hk_evm.h | 3 --- include/configs/k2l_evm.h | 3 --- include/configs/omapl138_lcdk.h | 1 - 6 files changed, 14 deletions(-) (limited to 'include') diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 11f104bcb86..5a5c65da16c 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -107,7 +107,6 @@ * Flash & Environment */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_MASK_CLE 0x10 diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index 9b25c349822..bbc58be511e 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -36,9 +36,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS -/* NAND Configuration */ -#define CONFIG_SYS_NAND_PAGE_2K - /* Network */ #define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 9 diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 887fda90d6a..bb91751d5d9 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -50,9 +50,6 @@ "get_mon_mmc=load mmc ${bootpart} ${addr_mon} ${bootdir}/${name_mon}\0"\ "name_fs=arago-base-tisdk-image-k2g-evm.cpio\0" -/* NAND Configuration */ -#define CONFIG_SYS_NAND_PAGE_2K - /* Network */ #define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 2 diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index cfc34c7da6d..68cbe98b553 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -36,9 +36,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS -/* NAND Configuration */ -#define CONFIG_SYS_NAND_PAGE_2K - /* Network */ #define CONFIG_KSNET_NETCP_V1_0 #define CONFIG_KSNET_CPSW_NUM_PORTS 5 diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index 65988fff06e..a18158a7eb3 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -36,9 +36,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS -/* NAND Configuration */ -#define CONFIG_SYS_NAND_PAGE_4K - /* Network */ #define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 5 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 233e7b4ee53..d9f70c75323 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -105,7 +105,6 @@ * Flash & Environment */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CONFIG_SYS_NAND_MASK_CLE 0x10 -- cgit v1.2.3 From 0cd03259644dcb967fcd6b31c3a92984125a1fe3 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:50 -0500 Subject: Convert CONFIG_SYS_NAND_SIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_SIZE Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/m53menlo.h | 6 ------ include/configs/smartweb.h | 1 - include/configs/taurus.h | 1 - 5 files changed, 10 deletions(-) (limited to 'include') diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 47ea51c5072..a39fe5f28a8 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -94,7 +94,6 @@ #ifdef CONFIG_CMD_NAND # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE -# define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 #endif diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index a2e36cc8673..f0734712eaa 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -95,7 +95,6 @@ #endif # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE -# define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index a20b41bdf07..36522419172 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -85,12 +85,6 @@ /* Watchdog */ -/* - * NAND SPL - */ - -#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) - /* * Extra Environments */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 538aad9a7bb..5460c12a17e 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -96,7 +96,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_SIZE (SZ_256M) #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 5ab087da8bd..f130c630dde 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -130,7 +130,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ -- cgit v1.2.3 From 4e5909450ec2acafb3d2e5b9714251ae67e0f0e0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 12 Nov 2022 17:36:51 -0500 Subject: global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/M5329EVB.h | 4 +- include/configs/M5373EVB.h | 4 +- include/configs/MCR3000.h | 2 +- include/configs/MPC837XERDB.h | 2 +- include/configs/P1010RDB.h | 78 ++++++++++++------------- include/configs/P2041RDB.h | 12 ++-- include/configs/T102xRDB.h | 64 ++++++++++---------- include/configs/T104xRDB.h | 62 ++++++++++---------- include/configs/T208xQDS.h | 60 +++++++++---------- include/configs/T208xRDB.h | 60 +++++++++---------- include/configs/T4240RDB.h | 54 ++++++++--------- include/configs/am335x_evm.h | 6 +- include/configs/am335x_guardian.h | 6 +- include/configs/am335x_igep003x.h | 6 +- include/configs/am3517_evm.h | 8 +-- include/configs/am43xx_evm.h | 6 +- include/configs/at91sam9260ek.h | 10 ++-- include/configs/at91sam9261ek.h | 10 ++-- include/configs/at91sam9263ek.h | 10 ++-- include/configs/at91sam9m10g45ek.h | 18 +++--- include/configs/at91sam9n12ek.h | 10 ++-- include/configs/at91sam9rlek.h | 10 ++-- include/configs/at91sam9x5ek.h | 10 ++-- include/configs/baltos.h | 8 +-- include/configs/chiliboard.h | 6 +- include/configs/cm_fx6.h | 2 +- include/configs/cm_t43.h | 6 +- include/configs/colibri-imx6ull.h | 4 +- include/configs/colibri_imx7.h | 2 +- include/configs/corvus.h | 22 +++---- include/configs/da850evm.h | 20 +++---- include/configs/devkit3250.h | 10 ++-- include/configs/devkit8000.h | 8 +-- include/configs/dra7xx_evm.h | 6 +- include/configs/etamin.h | 18 +++--- include/configs/ethernut5.h | 8 +-- include/configs/gardena-smart-gateway-at91sam.h | 16 ++--- include/configs/imx27lite-common.h | 2 +- include/configs/imx6-engicam.h | 4 +- include/configs/imx6_logic.h | 4 +- include/configs/imx6ulz_smm_m2.h | 2 +- include/configs/imx8mn_bsh_smm_s2.h | 2 +- include/configs/imx8mp_rsb3720.h | 2 +- include/configs/km/km-mpc83xx.h | 2 +- include/configs/km/pg-wcom-ls102xa.h | 42 ++++++------- include/configs/kmcent2.h | 38 ++++++------ include/configs/kmcoge5ne.h | 2 +- include/configs/ls1021aqds.h | 60 +++++++++---------- include/configs/ls1043a_common.h | 4 +- include/configs/ls1043aqds.h | 72 +++++++++++------------ include/configs/ls1043ardb.h | 72 +++++++++++------------ include/configs/ls1046a_common.h | 4 +- include/configs/ls1046afrwy.h | 38 ++++++------ include/configs/ls1046aqds.h | 72 +++++++++++------------ include/configs/ls1046ardb.h | 38 ++++++------ include/configs/ls1088a_common.h | 4 +- include/configs/ls1088aqds.h | 66 ++++++++++----------- include/configs/ls1088ardb.h | 34 +++++------ include/configs/ls2080a_common.h | 8 +-- include/configs/ls2080aqds.h | 54 ++++++++--------- include/configs/ls2080ardb.h | 54 ++++++++--------- include/configs/m53menlo.h | 4 +- include/configs/meesc.h | 10 ++-- include/configs/mx6sabreauto.h | 2 +- include/configs/mx6sxsabreauto.h | 2 +- include/configs/mx7dsabresd.h | 2 +- include/configs/mxs.h | 2 +- include/configs/mys_6ulx.h | 2 +- include/configs/npi_imx6ull.h | 2 +- include/configs/omap3_beagle.h | 6 +- include/configs/omap3_evm.h | 6 +- include/configs/omap3_igep00x0.h | 6 +- include/configs/omap3_logic.h | 6 +- include/configs/omapl138_lcdk.h | 20 +++---- include/configs/p1_p2_rdb_pc.h | 26 ++++----- include/configs/pcl063.h | 2 +- include/configs/pcl063_ull.h | 2 +- include/configs/phycore_am335x_r2.h | 6 +- include/configs/pm9261.h | 10 ++-- include/configs/pm9263.h | 10 ++-- include/configs/pm9g45.h | 18 +++--- include/configs/presidio_asic.h | 4 +- include/configs/sam9x60ek.h | 10 ++-- include/configs/sama5d2_ptc_ek.h | 6 +- include/configs/sama5d3_xplained.h | 6 +- include/configs/sama5d3xek.h | 6 +- include/configs/sama5d4_xplained.h | 6 +- include/configs/sama5d4ek.h | 6 +- include/configs/siemens-am33x-common.h | 10 ++-- include/configs/smartweb.h | 22 +++---- include/configs/snapper9g45.h | 10 ++-- include/configs/socfpga_common.h | 4 +- include/configs/socrates.h | 2 +- include/configs/taurus.h | 22 +++---- include/configs/ti816x_evm.h | 8 +-- include/configs/ti_armv7_common.h | 2 +- include/configs/ti_armv7_keystone2.h | 10 ++-- include/configs/ti_armv7_omap.h | 4 +- include/configs/ti_omap3_common.h | 2 +- include/configs/uniphier.h | 4 +- include/configs/usb_a9263.h | 10 ++-- include/configs/vf610twr.h | 2 +- include/configs/work_92105.h | 6 +- 103 files changed, 817 insertions(+), 817 deletions(-) (limited to 'include') diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index a39fe5f28a8..fc21af56ec7 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -93,8 +93,8 @@ #endif #ifdef CONFIG_CMD_NAND -# define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE -# define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +# define CFG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE +# define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 #endif diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index f0734712eaa..f7c09a2333c 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -94,8 +94,8 @@ # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #endif -# define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE -# define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +# define CFG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE +# define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index b0809332bb5..a5518d3d50f 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -82,6 +82,6 @@ /* Ethernet configuration part */ /* NAND configuration part */ -#define CONFIG_SYS_NAND_BASE 0x0C000000 +#define CFG_SYS_NAND_BASE 0x0C000000 #endif /* __CONFIG_H */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index bb93c287441..c4cde1cc512 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -141,7 +141,7 @@ /* * NAND Flash on the Local Bus */ -#define CONFIG_SYS_NAND_BASE 0xE0600000 +#define CFG_SYS_NAND_BASE 0xE0600000 /* Vitesse 7385 */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 3448766d8e5..3288969ce8c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -36,18 +36,18 @@ #ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) -#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) -#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 +#define CFG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) +#define CFG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) +#define CFG_SYS_NAND_U_BOOT_START 0x00200000 #else #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) -#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) -#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) +#define CFG_SYS_NAND_U_BOOT_SIZE (576 << 10) +#define CFG_SYS_NAND_U_BOOT_DST (0x11000000) +#define CFG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) -#define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000 -#define CONFIG_SYS_NAND_U_BOOT_START 0xD0000000 +#define CFG_SYS_NAND_U_BOOT_SIZE (128 << 10) +#define CFG_SYS_NAND_U_BOOT_DST 0xD0000000 +#define CFG_SYS_NAND_U_BOOT_START 0xD0000000 #endif #endif #endif @@ -167,23 +167,23 @@ extern unsigned long get_sdram_size(void); /* CFI for NOR Flash */ /* NAND Flash on IFC */ -#define CONFIG_SYS_NAND_BASE 0xff800000 +#define CFG_SYS_NAND_BASE 0xff800000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_NAND_BASE_PHYS 0xfff800000ull +#define CFG_SYS_NAND_BASE_PHYS 0xfff800000ull #else -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE #endif #define CONFIG_MTD_PARTITION -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_NAND \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CFG_SYS_NAND_AMASK IFC_AMASK(64*1024) #if defined(CONFIG_TARGET_P1010RDB_PA) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_2 /* RAL = 2 Bytes */ \ @@ -192,7 +192,7 @@ extern unsigned long get_sdram_size(void); | CSOR_NAND_PB(32)) /* 32 Pages Per Block */ #elif defined(CONFIG_TARGET_P1010RDB_PB) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \ @@ -201,49 +201,49 @@ extern unsigned long get_sdram_size(void); | CSOR_NAND_PB(128)) /*Pages Per Block = 128 */ #endif -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #if defined(CONFIG_TARGET_P1010RDB_PA) /* NAND Flash Timing Params */ -#define CONFIG_SYS_NAND_FTIM0 FTIM0_NAND_TCCST(0x01) | \ +#define CFG_SYS_NAND_FTIM0 FTIM0_NAND_TCCST(0x01) | \ FTIM0_NAND_TWP(0x0C) | \ FTIM0_NAND_TWCHT(0x04) | \ FTIM0_NAND_TWH(0x05) -#define CONFIG_SYS_NAND_FTIM1 FTIM1_NAND_TADLE(0x1d) | \ +#define CFG_SYS_NAND_FTIM1 FTIM1_NAND_TADLE(0x1d) | \ FTIM1_NAND_TWBE(0x1d) | \ FTIM1_NAND_TRR(0x07) | \ FTIM1_NAND_TRP(0x0c) -#define CONFIG_SYS_NAND_FTIM2 FTIM2_NAND_TRAD(0x0c) | \ +#define CFG_SYS_NAND_FTIM2 FTIM2_NAND_TRAD(0x0c) | \ FTIM2_NAND_TREH(0x05) | \ FTIM2_NAND_TWHRE(0x0f) -#define CONFIG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x04) +#define CFG_SYS_NAND_FTIM3 FTIM3_NAND_TWW(0x04) #elif defined(CONFIG_TARGET_P1010RDB_PB) /* support MT29F16G08ABABAWP 4k-pagesize 2G-bytes NAND */ /* ONFI NAND Flash mode0 Timing Params */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07)| \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07)| \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x07) | \ FTIM0_NAND_TWH(0x0a)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32)| \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32)| \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0x0e) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ FTIM2_NAND_TREH(0x0a) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 #endif /* Set up IFC registers for boot location NOR/NAND */ #if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT) -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR_CSPR #define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK #define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR @@ -259,13 +259,13 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif /* CPLD on IFC */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 08c1bccb2b7..b9311fc5e4f 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -111,22 +111,22 @@ /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_NAND_BASE 0xffa00000 +#define CFG_SYS_NAND_BASE 0xffa00000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull +#define CFG_SYS_NAND_BASE_PHYS 0xfffa00000ull #else -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE #endif -#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} +#define CFG_SYS_NAND_BASE_LIST {CFG_SYS_NAND_BASE} /* NAND flash config */ -#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | (2< /* NAND */ -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 /* APBH DMA is required for NAND support */ /* Ethernet */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index f0fbbe2870b..9061eba6686 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -22,9 +22,9 @@ #endif /* NAND support */ -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 14 -#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 14 +#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ 26, 27, 28, 29, 30, 31, 32, 33, \ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index d7e181b942a..afe8badd650 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -122,8 +122,8 @@ #ifdef CONFIG_TARGET_COLIBRI_IMX6ULL_NAND /* NAND stuff */ -/* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */ -#define CONFIG_SYS_NAND_BASE -1 +/* used to initialize CFG_SYS_NAND_BASE_LIST which is unused */ +#define CFG_SYS_NAND_BASE -1 #endif /* USB Configs */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 5c7a9f2e69f..f9bf849ae98 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -166,7 +166,7 @@ #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND /* NAND stuff */ -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 #endif /* USB Configs */ diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 3e7c0c0d883..9d44e6723e2 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -37,13 +37,13 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 +#define CFG_SYS_NAND_BASE ATMEL_BASE_CS3 /* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +#define CFG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 +#define CFG_SYS_NAND_MASK_CLE (1 << 22) +#define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 +#define CFG_SYS_NAND_READY_PIN AT91_PIN_PC8 #endif /* DFU class support */ @@ -53,13 +53,13 @@ /* Defines for SPL */ -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_SIZE 0x80000 +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_ECCSIZE 256 -#define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ +#define CFG_SYS_NAND_ECCSIZE 256 +#define CFG_SYS_NAND_ECCBYTES 3 +#define CFG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 5a5c65da16c..f8ba4e82819 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -107,21 +107,21 @@ * Flash & Environment */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_CS 3 -#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE -#define CONFIG_SYS_NAND_MASK_CLE 0x10 -#define CONFIG_SYS_NAND_MASK_ALE 0x8 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x40000 -#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST -#define CONFIG_SYS_NAND_ECCPOS { \ +#define CFG_SYS_NAND_CS 3 +#define CFG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CFG_SYS_NAND_MASK_CLE 0x10 +#define CFG_SYS_NAND_MASK_ALE 0x8 +#define CFG_SYS_NAND_U_BOOT_SIZE 0x40000 +#define CFG_SYS_NAND_U_BOOT_DST 0xc1080000 +#define CFG_SYS_NAND_U_BOOT_START CFG_SYS_NAND_U_BOOT_DST +#define CFG_SYS_NAND_ECCPOS { \ 24, 25, 26, 27, 28, \ 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \ 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \ 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \ 59, 60, 61, 62, 63 } -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 10 +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 10 #endif #ifdef CONFIG_MTD_NOR_FLASH diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 42366123cb1..5244b9cf5cc 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -35,8 +35,8 @@ /* * NAND controller */ -#define CONFIG_SYS_NAND_BASE SLC_NAND_BASE -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE SLC_NAND_BASE +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } /* * NAND chip timings @@ -79,10 +79,10 @@ */ /* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_TEXT_BASE */ -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000 +#define CFG_SYS_NAND_U_BOOT_SIZE 0x60000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE /* See common/spl/spl.c spl_set_header_raw_uboot() */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index d45115bdf68..46410595c2b 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -100,12 +100,12 @@ /* Defines for SPL */ /* NAND boot config */ -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ +#define CFG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 +#define CFG_SYS_NAND_U_BOOT_SIZE 0x200000 #endif /* __CONFIG_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 6cf716e293d..93201be485d 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -75,15 +75,15 @@ #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ /* NAND: driver related configs */ -#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ +#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ 26, 27, 28, 29, 30, 31, 32, 33, \ 34, 35, 36, 37, 38, 39, 40, 41, \ 42, 43, 44, 45, 46, 47, 48, 49, \ 50, 51, 52, 53, 54, 55, 56, 57, } -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 14 +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 14 #endif /* !CONFIG_MTD_RAW_NAND */ /* Parallel NOR Support */ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 75322a37322..6cae663cb8a 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -14,10 +14,10 @@ #include "siemens-am33x-common.h" /* NAND specific changes for etamin due to different page size */ -#undef CONFIG_SYS_NAND_ECCPOS +#undef CFG_SYS_NAND_ECCPOS #define CONFIG_SYS_ENV_SECT_SIZE (512 << 10) /* 512 KiB */ -#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ +#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ @@ -40,14 +40,14 @@ 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ } -#undef CONFIG_SYS_NAND_ECCSIZE -#undef CONFIG_SYS_NAND_ECCBYTES -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 26 +#undef CFG_SYS_NAND_ECCSIZE +#undef CFG_SYS_NAND_ECCBYTES +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 26 -#define CONFIG_SYS_NAND_BASE2 (0x18000000) /* physical address */ -#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \ - CONFIG_SYS_NAND_BASE2} +#define CFG_SYS_NAND_BASE2 (0x18000000) /* physical address */ +#define CFG_SYS_NAND_BASE_LIST {CFG_SYS_NAND_BASE, \ + CFG_SYS_NAND_BASE2} #define DDR_PLL_FREQ 303 diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index a18920d3f09..f19e12d9090 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -37,12 +37,12 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 /* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) +#define CFG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) +#define CFG_SYS_NAND_MASK_CLE (1 << 22) +#define CFG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) #endif /* JFFS2 */ diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 3d62efb38ff..ba098316e08 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -22,13 +22,13 @@ #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ /* NAND flash */ -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 /* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE BIT(21) +#define CFG_SYS_NAND_MASK_ALE BIT(21) /* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE BIT(22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 +#define CFG_SYS_NAND_MASK_CLE BIT(22) +#define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 +#define CFG_SYS_NAND_READY_PIN AT91_PIN_PD5 /* SPL */ @@ -37,8 +37,8 @@ #define CONFIG_SYS_MCKR 0x1301 #define CONFIG_SYS_MCKR_CSS 0x1302 -#define CONFIG_SYS_NAND_U_BOOT_SIZE 0xa0000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_SIZE 0xa0000 +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #endif diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 232f7868cc2..974dff8f6f4 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -96,7 +96,7 @@ * NAND */ #define CONFIG_MXC_NAND_REGS_BASE 0xd8000000 -#define CONFIG_SYS_NAND_BASE 0xd8000000 +#define CFG_SYS_NAND_BASE 0xd8000000 #define CONFIG_MXC_NAND_HWECC /* diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index f52367cc1a0..e430efad42e 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -126,8 +126,8 @@ /* NAND */ #ifdef CONFIG_NAND_MXS -# define CONFIG_SYS_NAND_BASE 0x40000000 -# define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +# define CFG_SYS_NAND_BASE 0x40000000 +# define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE /* MTD device */ #endif diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 008fc079a65..7760c8c418a 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -116,8 +116,8 @@ /* Environment organization */ /* NAND stuff */ -#define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE /* USB Configs */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h index 46a96f1f828..d42eb750d01 100644 --- a/include/configs/imx6ulz_smm_m2.h +++ b/include/configs/imx6ulz_smm_m2.h @@ -72,6 +72,6 @@ /* NAND */ -#define CONFIG_SYS_NAND_BASE 0x20000000 +#define CFG_SYS_NAND_BASE 0x20000000 #endif diff --git a/include/configs/imx8mn_bsh_smm_s2.h b/include/configs/imx8mn_bsh_smm_s2.h index a2323bd6716..a768ff35510 100644 --- a/include/configs/imx8mn_bsh_smm_s2.h +++ b/include/configs/imx8mn_bsh_smm_s2.h @@ -44,6 +44,6 @@ /* NAND */ -#define CONFIG_SYS_NAND_BASE 0x20000000 +#define CFG_SYS_NAND_BASE 0x20000000 #endif /* __IMX8MN_BSH_SMM_S2_H */ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 5be46090a14..8f2b474817d 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -166,7 +166,7 @@ #ifdef CONFIG_NAND_MXS /* NAND stuff */ -#define CONFIG_SYS_NAND_BASE 0x20000000 +#define CFG_SYS_NAND_BASE 0x20000000 #endif /* CONFIG_NAND_MXS */ #endif /* __IMX8MP_RSB3720_H */ diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 181ed1b8fae..a658cbc07c2 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -59,7 +59,7 @@ #if defined(CONFIG_CMD_NAND) #define CONFIG_NAND_KMETER1 -#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE +#define CFG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE #endif /* diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 0613b77e966..d883b188ce3 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -77,17 +77,17 @@ #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 /* NAND Flash Definitions */ -#define CONFIG_SYS_NAND_BASE 0x68000000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE 0x68000000 +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE) | \ +#define CFG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE) | \ CSPR_PORT_SIZE_8 | \ CSPR_TE | \ CSPR_MSEL_NAND | \ CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN \ +#define CFG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN \ | CSOR_NAND_ECC_DEC_EN \ | CSOR_NAND_ECC_MODE_4 \ | CSOR_NAND_RAL_3 \ @@ -97,29 +97,29 @@ | CSOR_NAND_TRHZ_40 \ | CSOR_NAND_BCTLD) -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x3) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x3) | \ FTIM0_NAND_TWP(0x8) | \ FTIM0_NAND_TWCHT(0x3) | \ FTIM0_NAND_TWH(0x5)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x1e) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x1e) | \ FTIM1_NAND_TWBE(0x1e) | \ FTIM1_NAND_TRR(0x6) | \ FTIM1_NAND_TRP(0x8)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x9) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x9) | \ FTIM2_NAND_TREH(0x5) | \ FTIM2_NAND_TWHRE(0x3c)) -#define CONFIG_SYS_NAND_FTIM3 (FTIM3_NAND_TWW(0x1e)) - -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 - -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_FTIM3 (FTIM3_NAND_TWW(0x1e)) + +#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 + +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } /* QRIO FPGA Definitions */ #define CONFIG_SYS_QRIO_BASE 0x70000000 diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 2e1459e3e4f..51ee6865533 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -231,18 +231,18 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} /* NAND Flash on IFC CS1*/ -#define CONFIG_SYS_NAND_BASE 0xfa000000 -#define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) +#define CFG_SYS_NAND_BASE 0xfa000000 +#define CFG_SYS_NAND_BASE_PHYS (0xf00000000ull | CFG_SYS_NAND_BASE) -#define CONFIG_SYS_NAND_CSPR_EXT (0x0f) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE) | \ +#define CFG_SYS_NAND_CSPR_EXT (0x0f) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE) | \ CSPR_PORT_SIZE_8 | /* Port Size = 8 bit */\ 0x00000010 | /* drive TE high */\ CSPR_MSEL_NAND | /* MSEL = NAND */\ CSPR_V) /* valid */ -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) /* 64kB */ +#define CFG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) /* 64kB */ -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN | /* ECC encoder on */ \ +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN | /* ECC encoder on */ \ CSOR_NAND_ECC_DEC_EN | /* ECC decoder on */ \ CSOR_NAND_ECC_MODE_4 | /* 4-bit ECC */ \ CSOR_NAND_RAL_3 | /* RAL = 3Bytes */ \ @@ -253,30 +253,30 @@ CSOR_NAND_BCTLD) /**/ /* ONFI NAND Flash mode0 Timing Params */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x3) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x3) | \ FTIM0_NAND_TWP(0x8) | \ FTIM0_NAND_TWCHT(0x3) | \ FTIM0_NAND_TWH(0x5)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x1e) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x1e) | \ FTIM1_NAND_TWBE(0x1e) | \ FTIM1_NAND_TRR(0x6) | \ FTIM1_NAND_TRP(0x8)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x9) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x9) | \ FTIM2_NAND_TREH(0x5) | \ FTIM2_NAND_TWHRE(0x3c)) -#define CONFIG_SYS_NAND_FTIM3 (FTIM3_NAND_TWW(0x1e)) +#define CFG_SYS_NAND_FTIM3 (FTIM3_NAND_TWW(0x1e)) -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 /* More NAND Flash Params */ -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } /* QRIO on IFC CS2 */ #define CONFIG_SYS_QRIO_BASE 0xfb000000 diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index d6b60d8139a..b9540298747 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -12,7 +12,7 @@ #define CONFIG_NAND_ECC_BCH #define CONFIG_NAND_KMETER1 #define NAND_MAX_CHIPS 1 -#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */ +#define CFG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */ #define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" #define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 926c85805b7..7d89b538952 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -11,9 +11,9 @@ #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_SIZE (400 << 10) -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_SIZE (400 << 10) +#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #endif @@ -70,17 +70,17 @@ * NAND Flash Definitions */ -#define CONFIG_SYS_NAND_BASE 0x7e800000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE 0x7e800000 +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_NAND \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ @@ -88,20 +88,20 @@ | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ FTIM0_NAND_TWH(0xa)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0xe) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ FTIM2_NAND_TREH(0xa) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #endif /* @@ -156,14 +156,14 @@ #endif #if defined(CONFIG_NAND_BOOT) -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR #define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK @@ -205,14 +205,14 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 8c19468141a..47367845a07 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -59,8 +59,8 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index d207e475fc0..21263705c80 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -79,17 +79,17 @@ * NAND Flash Definitions */ -#define CONFIG_SYS_NAND_BASE 0x7e800000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE 0x7e800000 +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_NAND \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ @@ -97,25 +97,25 @@ | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ FTIM0_NAND_TWH(0xa)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0xe) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ FTIM2_NAND_TREH(0xa) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE #endif #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 << 10) +#define CFG_SYS_NAND_U_BOOT_SIZE (640 << 10) #endif #if defined(CONFIG_TFABOOT) || \ @@ -188,14 +188,14 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK @@ -206,14 +206,14 @@ #define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 #else #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR #define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK @@ -255,14 +255,14 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 206de7e1380..51667f20258 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -51,16 +51,16 @@ * NAND Flash Definitions */ -#define CONFIG_SYS_NAND_BASE 0x7e800000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE 0x7e800000 +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_NAND \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ @@ -68,24 +68,24 @@ | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ FTIM0_NAND_TWH(0xa)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0xe) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ FTIM2_NAND_TREH(0xa) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_SIZE (1024 << 10) +#define CFG_SYS_NAND_U_BOOT_SIZE (1024 << 10) #endif /* @@ -126,24 +126,24 @@ #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #else #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR_CSPR_EXT #define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR_CSPR @@ -163,14 +163,14 @@ #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 7e1a724387e..07ec2c95637 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -59,8 +59,8 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE #endif /* GPIO */ diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 48408f28583..8402eac4184 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -14,16 +14,16 @@ * NAND Flash Definitions */ -#define CONFIG_SYS_NAND_BASE 0x7e800000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE 0x7e800000 +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_NAND \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ @@ -31,31 +31,31 @@ | CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ FTIM0_NAND_TWH(0xa)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0xe) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ FTIM2_NAND_TREH(0xa) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE /* IFC Timing Params */ -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 /* EEPROM */ #define I2C_RETIMER_ADDR 0x18 diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 037d462b5df..d51209c60f2 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -95,17 +95,17 @@ * NAND Flash Definitions */ -#define CONFIG_SYS_NAND_BASE 0x7e800000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE 0x7e800000 +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_NAND \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_8 /* 8-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ @@ -113,25 +113,25 @@ | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ FTIM0_NAND_TWH(0xa)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0xe) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ FTIM2_NAND_TREH(0xa) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE #endif #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_NAND_U_BOOT_SIZE (768 << 10) #endif #if defined(CONFIG_TFABOOT) || \ @@ -204,14 +204,14 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK @@ -222,14 +222,14 @@ #define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 #else #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR #define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK @@ -271,14 +271,14 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 769349336af..0df68915989 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -19,16 +19,16 @@ #define CONFIG_SYS_UBOOT_BASE 0x40100000 #endif -#define CONFIG_SYS_NAND_BASE 0x7e800000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE 0x7e800000 +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_NAND \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_8 /* 8-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ @@ -36,20 +36,20 @@ | CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \ | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x7) | \ FTIM0_NAND_TWH(0xa)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0xe) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ FTIM2_NAND_TREH(0xa) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE /* @@ -78,14 +78,14 @@ #define CONFIG_SYS_CPLD_FTIM3 0x0 /* IFC Timing Params */ -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_CPLD_CSPR_EXT #define CONFIG_SYS_CSPR2 CONFIG_SYS_CPLD_CSPR diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 73e4ac3e3d4..dec661d6b19 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -88,8 +88,8 @@ unsigned long long get_qixis_addr(void); #define QIXIS_BASE_PHYS_EARLY 0xC000000 -#define CONFIG_SYS_NAND_BASE 0x530000000ULL -#define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 +#define CFG_SYS_NAND_BASE 0x530000000ULL +#define CFG_SYS_NAND_BASE_PHYS 0x30000000 /* MC firmware */ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 3a2fba6b04e..ae452075ac0 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -69,14 +69,14 @@ #endif #endif -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ | CSPR_MSEL_NAND /* MSEL = NAND */ \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \ @@ -85,20 +85,20 @@ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ /* ONFI NAND Flash mode0 Timing Params */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x07) | \ FTIM0_NAND_TWH(0x0a)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0x0e) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ FTIM2_NAND_TREH(0x0a) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 @@ -174,14 +174,14 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL @@ -193,14 +193,14 @@ #define CONFIG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3 #else #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL @@ -230,14 +230,14 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index e2ae3026c29..2ca1384c231 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -53,14 +53,14 @@ #endif #endif -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ | CSPR_MSEL_NAND /* MSEL = NAND */ \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \ @@ -69,20 +69,20 @@ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ /* ONFI NAND Flash mode0 Timing Params */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x07) | \ FTIM0_NAND_TWH(0x0a)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0x0e) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ FTIM2_NAND_TREH(0x0a) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 @@ -132,14 +132,14 @@ #if defined(CONFIG_TFABOOT) || \ defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_FPGA_CSPR_EXT #define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR #define CONFIG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 53a3af1baac..d8997208e97 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -81,8 +81,8 @@ unsigned long long get_qixis_addr(void); #define QIXIS_SDID_MASK 0x07 #define QIXIS_ESDHC_NO_ADAPTER 0x7 -#define CONFIG_SYS_NAND_BASE 0x530000000ULL -#define CONFIG_SYS_NAND_BASE_PHYS 0x30000000 +#define CFG_SYS_NAND_BASE 0x530000000ULL +#define CFG_SYS_NAND_BASE_PHYS 0x30000000 /* MC firmware */ /* TODO Actual DPL max length needs to be confirmed with the MC FW team */ @@ -129,8 +129,8 @@ unsigned long long get_qixis_addr(void); " 0x580e00000 \0" #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_NAND_U_BOOT_DST 0x80400000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST +#define CFG_SYS_NAND_U_BOOT_DST 0x80400000 +#define CFG_SYS_NAND_U_BOOT_START CFG_SYS_NAND_U_BOOT_DST #endif #include diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index e6019870d8a..d9e11cc1917 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -70,14 +70,14 @@ CONFIG_SYS_FLASH_BASE + 0x40000000} #endif -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ | CSPR_MSEL_NAND /* MSEL = NAND */ \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \ @@ -86,20 +86,20 @@ | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ /* ONFI NAND Flash mode0 Timing Params */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ FTIM0_NAND_TWP(0x18) | \ FTIM0_NAND_TWCHT(0x07) | \ FTIM0_NAND_TWH(0x0a)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ FTIM1_NAND_TWBE(0x39) | \ FTIM1_NAND_TRR(0x0e) | \ FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ FTIM2_NAND_TREH(0x0a) | \ FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE #define QIXIS_LBMAP_SWITCH 0x06 @@ -163,16 +163,16 @@ #define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 - -#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024) +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 + +#define CFG_SYS_NAND_U_BOOT_SIZE (640 * 1024) #endif #else #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT @@ -194,14 +194,14 @@ #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #endif #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 382d516c08b..086c46902c8 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -67,14 +67,14 @@ CONFIG_SYS_FLASH_BASE + 0x40000000} #endif -#define CONFIG_SYS_NAND_CSPR_EXT (0x0) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_CSPR_EXT (0x0) +#define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ | CSPR_MSEL_NAND /* MSEL = NAND */ \ | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ +#define CFG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ | CSOR_NAND_RAL_3 /* RAL = 3Byes */ \ @@ -83,20 +83,20 @@ | CSOR_NAND_PB(128)) /* Pages Per Block 128*/ /* ONFI NAND Flash mode0 Timing Params */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x0e) | \ +#define CFG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x0e) | \ FTIM0_NAND_TWP(0x30) | \ FTIM0_NAND_TWCHT(0x0e) | \ FTIM0_NAND_TWH(0x14)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x64) | \ +#define CFG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x64) | \ FTIM1_NAND_TWBE(0xab) | \ FTIM1_NAND_TRR(0x1c) | \ FTIM1_NAND_TRP(0x30)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x1e) | \ +#define CFG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x1e) | \ FTIM2_NAND_TREH(0x14) | \ FTIM2_NAND_TWHRE(0x3c)) -#define CONFIG_SYS_NAND_FTIM3 0x0 +#define CFG_SYS_NAND_FTIM3 0x0 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE #define QIXIS_LBMAP_SWITCH 0x06 @@ -146,16 +146,16 @@ #define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 - -#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 * 1024) +#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 + +#define CFG_SYS_NAND_U_BOOT_SIZE (512 * 1024) #else #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY @@ -166,14 +166,14 @@ #define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 #define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 #define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #endif #endif #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 36522419172..1734f323f92 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -44,10 +44,10 @@ * NAND */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI +#define CFG_SYS_NAND_BASE NFC_BASE_ADDR_AXI #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR -#define CONFIG_SYS_NAND_LARGEPAGE +#define CFG_SYS_NAND_LARGEPAGE #define CONFIG_MXC_NAND_HWECC #endif diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 30267e29a12..cd3910ee4ba 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -52,11 +52,11 @@ /* NAND flash */ #ifdef CONFIG_CMD_NAND -# define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ -# define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -# define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -# define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) -# define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) +# define CFG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ +# define CFG_SYS_NAND_MASK_ALE (1 << 21) +# define CFG_SYS_NAND_MASK_CLE (1 << 22) +# define CFG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) +# define CFG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) #endif /* hw-controller addresses */ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 61570b7af53..8176566f3f6 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -36,7 +36,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 /* NAND stuff */ -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 0d9764e3b4c..a41e428eb8a 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -86,7 +86,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR /* NAND stuff */ -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 2a97d2fac46..af176583814 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -93,7 +93,7 @@ */ #ifdef CONFIG_NAND_MXS /* NAND stuff */ -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 /* DMA stuff, needed for GPMI/MXS NAND support */ #endif diff --git a/include/configs/mxs.h b/include/configs/mxs.h index e8610386f04..9d6b3d40484 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -83,7 +83,7 @@ /* NAND */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_NAND_BASE 0x60000000 +#define CFG_SYS_NAND_BASE 0x60000000 #endif /* OCOTP */ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index a777305ec76..e18d16cc99c 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -30,7 +30,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index ccc203f5f24..2a528850829 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -31,7 +31,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ -#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index d46ca337d5f..0890f51eff2 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -21,10 +21,10 @@ /* NAND */ #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ +#define CFG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 3 /* NAND: SPL falcon mode configs */ #endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 77629d7fc1e..6eec955e88f 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -26,10 +26,10 @@ /* NAND */ #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ +#define CFG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 3 +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 3 #endif /* CONFIG_MTD_RAW_NAND */ #define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 97f47ea5b71..10f6ba63601 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -70,14 +70,14 @@ #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) /* NAND config */ -#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ +#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, \ 18, 19, 20, 21, 22, 23, 24, 25, \ 26, 27, 28, 29, 30, 31, 32, 33, \ 34, 35, 36, 37, 38, 39, 40, 41, \ 42, 43, 44, 45, 46, 47, 48, 49, \ 50, 51, 52, 53, 54, 55, 56, 57, } -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 14 +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 14 #endif /* __IGEP00X0_H */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 7c0bdcbb115..6001037ae88 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -17,15 +17,15 @@ /* Board NAND Info. */ #ifdef CONFIG_MTD_RAW_NAND /* NAND devices */ -#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ +#define CFG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \ 13, 14, 16, 17, 18, 19, 20, 21, 22, \ 23, 24, 25, 26, 27, 28, 30, 31, 32, \ 33, 34, 35, 36, 37, 38, 39, 40, 41, \ 42, 44, 45, 46, 47, 48, 49, 50, 51, \ 52, 53, 54, 55, 56} -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 13 +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 13 #endif /* Environment information */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index d9f70c75323..81ca68de9bc 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -105,21 +105,21 @@ * Flash & Environment */ #ifdef CONFIG_MTD_RAW_NAND -#define CONFIG_SYS_NAND_CS 3 -#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE -#define CONFIG_SYS_NAND_MASK_CLE 0x10 -#define CONFIG_SYS_NAND_MASK_ALE 0x8 +#define CFG_SYS_NAND_CS 3 +#define CFG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE +#define CFG_SYS_NAND_MASK_CLE 0x10 +#define CFG_SYS_NAND_MASK_ALE 0x8 #define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC -#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K -#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1080000 -#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST -#define CONFIG_SYS_NAND_ECCPOS { \ +#define CFG_SYS_NAND_U_BOOT_SIZE SZ_512K +#define CFG_SYS_NAND_U_BOOT_DST 0xc1080000 +#define CFG_SYS_NAND_U_BOOT_START CFG_SYS_NAND_U_BOOT_DST +#define CFG_SYS_NAND_ECCPOS { \ 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \ 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \ 54, 55, 56, 57, 58, 59, 60, 61, 62, 63 } -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 10 +#define CFG_SYS_NAND_ECCSIZE 512 +#define CFG_SYS_NAND_ECCBYTES 10 #endif /* diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 778bf5112af..38f360b53ca 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -98,13 +98,13 @@ #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SPL_PAD_TO #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) -#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) -#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) +#define CFG_SYS_NAND_U_BOOT_SIZE (832 << 10) +#define CFG_SYS_NAND_U_BOOT_DST (0x11000000) +#define CFG_SYS_NAND_U_BOOT_START (0x11000000) #elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) -#define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 -#define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 +#define CFG_SYS_NAND_U_BOOT_SIZE (128 << 10) +#define CFG_SYS_NAND_U_BOOT_DST 0xf8f80000 +#define CFG_SYS_NAND_U_BOOT_START 0xf8f80000 #endif /* not CONFIG_TPL_BUILD */ #endif @@ -207,22 +207,22 @@ /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_NAND_BASE 0xff800000 +#define CFG_SYS_NAND_BASE 0xff800000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_NAND_BASE_PHYS 0xfff800000ull +#define CFG_SYS_NAND_BASE_PHYS 0xfff800000ull #else -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE #endif -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ +#define CFG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | (2< /* Serial support */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK 48000000 #define CONFIG_SYS_NS16550_COM1 0x44e09000 -#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#endif /* NAND support */ #define CFG_SYS_NAND_ECCSIZE 512 diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 4297047e8ce..52f2d50118a 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -14,7 +14,6 @@ #ifndef CONFIG_INTERNAL_UART /* Use BayTrail internal HS UART which is memory-mapped */ -#undef CONFIG_SYS_NS16550_PORT_MAPPED #endif #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ diff --git a/include/configs/galileo.h b/include/configs/galileo.h index 545408a4baa..472f236b9b6 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -13,7 +13,6 @@ #include /* ns16550 UART is memory-mapped in Quark SoC */ -#undef CONFIG_SYS_NS16550_PORT_MAPPED #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index 965fa87c657..0d61724db8c 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -20,9 +20,7 @@ /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_COM1 0xb0000c00 #endif diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 4af845ea9c2..bfc0fa5c442 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -28,9 +28,7 @@ /* * UART configuration */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK 33330000 -#define CONFIG_SYS_NS16550_MEM32 /* * Ethernet PHY configuration diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 0ce65e7755e..ce3cb20732d 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -27,9 +27,7 @@ /* * UART configuration */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK 33330000 -#define CONFIG_SYS_NS16550_MEM32 /* * Ethernet PHY configuration diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index cc8c37ec0bf..7acdb0fa038 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -148,7 +148,6 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK get_serial_clock() /* diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 16fd6d562d4..30ba6065253 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -330,8 +330,6 @@ * Retain non-DM serial port for debug purposes. */ #if !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500) #endif diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index f0ae9248af3..5434c4f7679 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -36,7 +36,6 @@ /* * Serial Driver info */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 9eedd47c07e..b9c853d7dfe 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -20,9 +20,7 @@ /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_COM3 0xb0000e00 #endif diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 77f84e1c9ea..148598fab46 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -26,8 +26,6 @@ /* GPIO */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) #define CONFIG_HWCONFIG diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 885774f63d4..3f2dfa640c9 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -47,8 +47,6 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_serial_clock() /* diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 6b23134ecc9..bd2f74c1262 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -227,10 +227,6 @@ * Serial Port */ #ifndef CONFIG_LPUART -#define CONFIG_SYS_NS16550_SERIAL -#ifndef CONFIG_DM_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#endif #define CONFIG_SYS_NS16550_CLK get_serial_clock() #endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index fce91192dff..8c43f652ab6 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -60,10 +60,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#ifndef CONFIG_DM_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#endif #define CONFIG_SYS_NS16550_CLK get_serial_clock() /* I2C */ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 1ac59a2d459..06830f401a3 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -145,10 +145,6 @@ * Serial Port */ #ifndef CONFIG_LPUART -#define CONFIG_SYS_NS16550_SERIAL -#ifndef CONFIG_DM_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#endif #define CONFIG_SYS_NS16550_CLK get_serial_clock() #endif diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 43dbeea1b3b..7dd5649005b 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -28,8 +28,6 @@ /* I2C */ /* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) /* Miscellaneous configurable options */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 47367845a07..2fc06c1dd2d 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -40,8 +40,6 @@ #define CPU_RELEASE_ADDR secondary_boot_addr /* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) /* SD boot SPL */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 07ec2c95637..40b4cb964d1 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -40,8 +40,6 @@ #define CPU_RELEASE_ADDR secondary_boot_addr /* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) /* SD boot SPL */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index dec661d6b19..5668e07d135 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -45,8 +45,6 @@ /* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) /* diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index d8997208e97..895c566fea2 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -37,8 +37,6 @@ /* I2C */ /* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) /* diff --git a/include/configs/malta.h b/include/configs/malta.h index 30c2e41eec5..2dd34ea7313 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -33,7 +33,6 @@ /* * Serial driver */ -#define CONFIG_SYS_NS16550_PORT_MAPPED /* * Flash configuration diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index 9b1ba3655e8..1f733d112dd 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -22,9 +22,7 @@ /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_CLK 50000000 -#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_COM1 0xbe000c00 #endif diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 43527017d84..da16e3b21a4 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -14,9 +14,7 @@ /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_COM1 0xb0000c00 #endif diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index c93d70ddf1a..eaffe0bf4c9 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -12,9 +12,6 @@ #include -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_COM1 0x11005200 #define CONFIG_SYS_NS16550_CLK 26000000 diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 7228f3e4288..347598868bb 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -12,9 +12,6 @@ #include -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE -4 -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_COM1 0x11005000 #define CONFIG_SYS_NS16550_CLK 26000000 diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 6d4fff3820c..4f1067c23bb 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -32,10 +32,8 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK #if !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 99a020c3c71..310bdde7cb5 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -40,7 +40,6 @@ */ #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK /* diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 838c62c6711..065820689ca 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -319,10 +319,7 @@ * shorted - index 1 */ #undef CONFIG_SERIAL_SOFTWARE_FIFO -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#define CONFIG_SPL_NS16550_MIN_FUNCTIONS #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 49d1878ebdd..8b151ef1883 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_NS16550_MEM32 - /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ #define CONFIG_IRAM_BASE 0xff020000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 200b34b35ba..263d1bd180c 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_IRAM_BASE 0xfff80000 #define CONFIG_SYS_SDRAM_BASE 0 diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 4c964cc3770..1f6b82f2d02 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -7,8 +7,6 @@ #define _ROCKCHIP_COMMON_H_ #include -#define CONFIG_SYS_NS16550_MEM32 - /* ((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) * 512) */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index d071f590f10..5765f2ccb5e 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -38,7 +38,6 @@ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 #define CONFIG_SYS_NS16550_COM4 0x481a6000 diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 0187fca5f0d..c29bc448eed 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -52,11 +52,6 @@ * Serial */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#endif - #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index f712928d3c8..49883ea7a3c 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -18,7 +18,6 @@ /* * Serial / UART configurations */ -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} /* diff --git a/include/configs/socfpga_chameleonv3.h b/include/configs/socfpga_chameleonv3.h index 75d2081fac8..7012097276c 100644 --- a/include/configs/socfpga_chameleonv3.h +++ b/include/configs/socfpga_chameleonv3.h @@ -17,7 +17,6 @@ /* * Serial / UART configurations */ -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 86cc3771ba5..029f898b64f 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -76,7 +76,6 @@ * Serial / UART configurations */ #define CONFIG_SYS_NS16550_CLK 100000000 -#define CONFIG_SYS_NS16550_MEM32 /* * SDMMC configurations diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index d9e4c8b699f..1ed0a262bc6 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -16,7 +16,6 @@ #include /* Serial & console */ -#define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ #ifdef CONFIG_MACH_SUNIV /* suniv doesn't have apb2 and uart is connected to apb1 */ @@ -25,7 +24,6 @@ #define CONFIG_SYS_NS16550_CLK 24000000 #endif #ifndef CONFIG_DM_SERIAL -# define CONFIG_SYS_NS16550_REG_SIZE -4 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 16bdc39b750..38a43b726f0 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -19,7 +19,6 @@ /* * UART configuration */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK 166666666 /* diff --git a/include/configs/theadorable-x86-dfi-bt700.h b/include/configs/theadorable-x86-dfi-bt700.h index bb3186e2192..663a49e7b6c 100644 --- a/include/configs/theadorable-x86-dfi-bt700.h +++ b/include/configs/theadorable-x86-dfi-bt700.h @@ -13,7 +13,6 @@ #include /* Use BayTrail internal HS UART which is memory-mapped */ -#undef CONFIG_SYS_NS16550_PORT_MAPPED /* Set the board specific parameters */ #define DEF_ENV_TFTPDIR "theadorable-x86-dfi" diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 97166e010f7..60632c58c67 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -77,8 +77,6 @@ #define CONFIG_SYS_TIMERBASE 0x4802E000 /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x48020000 /* Base EVM has UART0 */ diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index efd3a0db04e..f2dbe3544a5 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -30,8 +30,6 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x48024000 /* Base EVM has UART2 */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 5d5df6b1019..fb017771688 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -17,12 +17,6 @@ #include /* NS16550 Configuration */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_NS16550_SERIAL -#ifndef CONFIG_DM_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#endif -#endif #define CONFIG_SYS_NS16550_CLK 48000000 /* diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index a4a45fad9dc..aaeea77281b 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -34,7 +34,6 @@ #define KEYSTONE_SRAM_SCRATCH_SPACE_END (TI_SRAM_SCRATCH_BOARD_EEPROM_END) /* UART Configuration */ -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE #define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 6cc443c8e9c..80d2a011f0f 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -27,10 +27,6 @@ /* NS16550 Configuration */ #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -#if !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#endif /* !CONFIG_DM_SERIAL */ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 115200} diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 0568946fc82..eb930341c3a 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -29,8 +29,6 @@ */ #define CONFIG_SYS_NS16550_CLK 48000000 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_COM3 UART3_BASE #endif diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 24bbf9e7c2c..a1efb57f1b0 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -30,10 +30,6 @@ * Hardware drivers */ #define CONFIG_SYS_NS16550_CLK 48000000 -#if !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#endif /* * Environment setup diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 6f36d6964b9..84e5ba39f14 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -19,9 +19,7 @@ #define CONFIG_SYS_UBOOT_BASE 0 /* Serial SPL */ -#define CONFIG_SYS_NS16550_MEM32 #define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_COM3 0xb0000e00 /* RAM */ diff --git a/include/configs/x530.h b/include/configs/x530.h index 0add626e81a..318e3680a6e 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -13,10 +13,8 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK #if !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 8e22d6e5d87..f76c1f8be0f 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -21,7 +21,6 @@ /*----------------------------------------------------------------------- * Serial Configuration */ -#define CONFIG_SYS_NS16550_PORT_MAPPED /* * Miscellaneous configurable options diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 58d01f4bb42..7090fcef680 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -127,8 +127,6 @@ /* Serial Driver Info */ /*====================*/ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_COM1 IOADDR(0x0D050020) /* Base address */ /* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */ diff --git a/include/ns16550.h b/include/ns16550.h index 3d9002d9f15..0ee5c4d6de7 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -26,7 +26,7 @@ #include -#ifdef CONFIG_DM_SERIAL +#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE) /* * For driver model we always use one byte per register, and sort out the * differences in the driver -- cgit v1.2.3 From 91092132bac0ae768beb76c12ef8be732ea6ba3a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:28 -0500 Subject: global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550 namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/MPC837XERDB.h | 6 +++--- include/configs/MPC8548CDS.h | 6 +++--- include/configs/P1010RDB.h | 6 +++--- include/configs/P2041RDB.h | 10 +++++----- include/configs/SBx81LIFKW.h | 4 ++-- include/configs/SBx81LIFXCAT.h | 4 ++-- include/configs/T102xRDB.h | 10 +++++----- include/configs/T104xRDB.h | 10 +++++----- include/configs/T208xQDS.h | 10 +++++----- include/configs/T208xRDB.h | 10 +++++----- include/configs/T4240RDB.h | 10 +++++----- include/configs/am335x_evm.h | 12 ++++++------ include/configs/am335x_guardian.h | 12 ++++++------ include/configs/am335x_igep003x.h | 2 +- include/configs/am335x_shc.h | 12 ++++++------ include/configs/am335x_sl50.h | 12 ++++++------ include/configs/am43xx_evm.h | 4 ++-- include/configs/am57xx_evm.h | 6 +++--- include/configs/ap143.h | 2 +- include/configs/ap152.h | 2 +- include/configs/apalis-tk1.h | 2 +- include/configs/apalis_t30.h | 2 +- include/configs/ax25-ae350.h | 2 +- include/configs/axs10x.h | 2 +- include/configs/baltos.h | 12 ++++++------ include/configs/bcm7260.h | 2 +- include/configs/bcm7445.h | 2 +- include/configs/bcm_ns3.h | 2 +- include/configs/bcmstb.h | 2 +- include/configs/beaver.h | 2 +- include/configs/bur_am335x_common.h | 4 ++-- include/configs/cardhu.h | 2 +- include/configs/cei-tk1-som.h | 2 +- include/configs/chiliboard.h | 12 ++++++------ include/configs/ci20.h | 2 +- include/configs/cm_t43.h | 4 ++-- include/configs/colibri_t20.h | 2 +- include/configs/colibri_t30.h | 2 +- include/configs/da850evm.h | 2 +- include/configs/dalmore.h | 2 +- include/configs/dra7xx_evm.h | 6 +++--- include/configs/gardena-smart-gateway-mt7688.h | 4 ++-- include/configs/harmony.h | 4 ++-- include/configs/hsdk-4xd.h | 2 +- include/configs/hsdk.h | 2 +- include/configs/jetson-tk1.h | 2 +- include/configs/km/pg-wcom-ls102xa.h | 2 +- include/configs/kmcent2.h | 4 ++-- include/configs/kontron_sl28.h | 2 +- include/configs/legoev3.h | 2 +- include/configs/linkit-smart-7688.h | 4 ++-- include/configs/ls1012a_common.h | 2 +- include/configs/ls1021aiot.h | 2 +- include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atsn.h | 2 +- include/configs/ls1021atwr.h | 2 +- include/configs/ls1028a_common.h | 2 +- include/configs/ls1043a_common.h | 2 +- include/configs/ls1046a_common.h | 2 +- include/configs/ls1088a_common.h | 2 +- include/configs/ls2080a_common.h | 2 +- include/configs/medcom-wide.h | 2 +- include/configs/mt7621.h | 4 ++-- include/configs/mt7628.h | 4 ++-- include/configs/mt8183.h | 4 ++-- include/configs/mt8516.h | 4 ++-- include/configs/mv-common.h | 4 ++-- include/configs/nokia_rx51.h | 4 ++-- include/configs/nyan-big.h | 2 +- include/configs/omap5_uevm.h | 2 +- include/configs/omapl138_lcdk.h | 2 +- include/configs/p1_p2_rdb_pc.h | 6 +++--- include/configs/paz00.h | 2 +- include/configs/pdu001.h | 12 ++++++------ include/configs/plutux.h | 2 +- include/configs/seaboard.h | 2 +- include/configs/siemens-am33x-common.h | 6 +++--- include/configs/sniper.h | 4 ++-- include/configs/socfpga_soc64_common.h | 2 +- include/configs/sunxi-common.h | 14 +++++++------- include/configs/tb100.h | 2 +- include/configs/tec-ng.h | 2 +- include/configs/tec.h | 2 +- include/configs/tegra-common.h | 2 +- include/configs/ti814x_evm.h | 4 ++-- include/configs/ti816x_evm.h | 4 ++-- include/configs/ti_am335x_common.h | 2 +- include/configs/ti_armv7_keystone2.h | 8 ++++---- include/configs/ti_omap3_common.h | 8 ++++---- include/configs/ti_omap4_common.h | 4 ++-- include/configs/ti_omap5_common.h | 2 +- include/configs/tplink_wdr4300.h | 2 +- include/configs/trimslice.h | 2 +- include/configs/vcoreiii.h | 2 +- include/configs/venice2.h | 2 +- include/configs/ventana.h | 2 +- include/configs/vocore2.h | 4 ++-- include/configs/x530.h | 4 ++-- include/configs/xtfpga.h | 4 ++-- 99 files changed, 206 insertions(+), 206 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index b8cbdc36754..059885ecb54 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -151,13 +151,13 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#define CFG_SYS_NS16550_CLK get_bus_freq(0) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) /* SERDES */ #define CONFIG_FSL_SERDES diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index dba15dae749..bde8fa8df4d 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -235,13 +235,13 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* Serial Port */ -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#define CFG_SYS_NS16550_CLK get_bus_freq(0) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) /* * I2C diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index fd721f30b3a..05c097759f6 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -322,13 +322,13 @@ extern unsigned long get_sdram_size(void); /* Serial Port */ #undef CONFIG_SERIAL_SOFTWARE_FIFO -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#define CFG_SYS_NS16550_CLK get_bus_freq(0) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) /* I2C */ #define I2C_PCA9557_ADDR1 0x18 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 173f6205e08..132786a4236 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -163,15 +163,15 @@ * open - index 2 * shorted - index 1 */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* I2C */ diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index c99e6ba781a..824190a4123 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -12,8 +12,8 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK -#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE +#define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CFG_SYS_NS16550_COM1 KW_UART0_BASE /* * Serial Port configuration diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 8b43fe0c993..e67da1fe1dc 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -12,8 +12,8 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK -#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE +#define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CFG_SYS_NS16550_COM1 KW_UART0_BASE /* * Serial Port configuration diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 7cb10b205db..b8f3d70e595 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -294,15 +294,15 @@ #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* Serial Port */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* I2C */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 3fa2d01dcc2..777a64eceee 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -267,15 +267,15 @@ * open - index 2 * shorted - index 1 */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index c5a28fadb00..710f105cfad 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -269,13 +269,13 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* * I2C diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 795120c02a8..4c60364f7e7 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -229,13 +229,13 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* * I2C diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index e3cbc649fa1..ba4a989fc5f 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -89,15 +89,15 @@ * open - index 2 * shorted - index 1 */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* I2C */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 13b1ff3bce6..25d9c96e164 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -158,12 +158,12 @@ #endif /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ -#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ -#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ -#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ -#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ -#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ +#define CFG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ /* PMIC support */ #define CONFIG_POWER_TPS65910 diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index cb649b598fe..7c5e7ce475e 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -83,12 +83,12 @@ #define CONSOLE_COLOR_RED 0x001F /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ -#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ -#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ -#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ -#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ -#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ +#define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ +#define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #ifdef CONFIG_MTD_RAW_NAND #define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index b7b1cb0cfe1..abd868c1453 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -88,7 +88,7 @@ "echo WARNING: Could not determine device tree to use; fi; \0" /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ +#define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ /* Ethernet support */ diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 08bae9b886f..452887d6995 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -136,11 +136,11 @@ #endif /* Regular Boot */ /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ -#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ -#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ -#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ -#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ -#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ +#define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ +#define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ #endif /* ! __CONFIG_AM335X_SHC_H */ diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 7df5f140551..4af9edafca8 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -36,12 +36,12 @@ BOOTENV /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ -#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ -#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ -#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ -#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ -#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ +#define CFG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ /* PMIC support */ #define CONFIG_POWER_TPS65910 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index b61c8005c33..4ff8528cf8a 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -14,7 +14,7 @@ #include /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK 48000000 +#define CFG_SYS_NS16550_CLK 48000000 /* I2C Configuration */ @@ -41,7 +41,7 @@ #define V_SCLK (V_OSCK) /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CFG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ #ifndef CONFIG_SPL_BUILD /* USB Device Firmware Update support */ diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index d8b0531673f..c3b6a3fbda2 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -16,9 +16,9 @@ #define CONFIG_IODELAY_RECALIBRATION -#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ -#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ -#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ +#define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ +#define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ +#define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ #define CONFIG_SYS_OMAP_ABE_SYSCK diff --git a/include/configs/ap143.h b/include/configs/ap143.h index 0eed8db23bd..3114cf0c4fb 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -14,7 +14,7 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_CLK 25000000 +#define CFG_SYS_NS16550_CLK 25000000 /* Miscellaneous configurable options */ diff --git a/include/configs/ap152.h b/include/configs/ap152.h index 71247111190..f0674456fd0 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -14,7 +14,7 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_CLK 25000000 +#define CFG_SYS_NS16550_CLK 25000000 /* Miscellaneous configurable options */ diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 6a4092a83e2..f0a02ae1795 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -14,7 +14,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define FDT_MODULE "apalis-v1.2" #define FDT_MODULE_V1_0 "apalis" diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 84bd88f835a..4f00b3bad3f 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -21,7 +21,7 @@ * Apalis UART4: NVIDIA UARTC */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 7224bd8d1f4..e3b6956eb5a 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -33,7 +33,7 @@ /* * Serial console configuration */ -#define CONFIG_SYS_NS16550_CLK 19660800 +#define CFG_SYS_NS16550_CLK 19660800 /* Init Stack Pointer */ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index c0429ae15c4..1932713f453 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -26,7 +26,7 @@ /* * UART configuration */ -#define CONFIG_SYS_NS16550_CLK 33333333 +#define CFG_SYS_NS16550_CLK 33333333 /* * Ethernet PHY configuration diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 31f107a465c..f29729d09ba 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -181,12 +181,12 @@ /*DFUARGS*/ /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ -#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ -#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ -#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ -#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ -#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ +#define CFG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ +#define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ /* PMIC support */ #define CONFIG_POWER_TPS65910 diff --git a/include/configs/bcm7260.h b/include/configs/bcm7260.h index 1bae49e15f3..cba109b74a9 100644 --- a/include/configs/bcm7260.h +++ b/include/configs/bcm7260.h @@ -10,7 +10,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_NS16550_COM1 0xf040c000 +#define CFG_SYS_NS16550_COM1 0xf040c000 #define CONFIG_SYS_INIT_RAM_ADDR 0x10200000 diff --git a/include/configs/bcm7445.h b/include/configs/bcm7445.h index 4b41dc220b1..a07f1b7ad0f 100644 --- a/include/configs/bcm7445.h +++ b/include/configs/bcm7445.h @@ -10,7 +10,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_NS16550_COM1 0xf040ab00 +#define CFG_SYS_NS16550_COM1 0xf040ab00 #define CONFIG_SYS_INIT_RAM_ADDR 0x80200000 diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 795de469384..76189a4d31f 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -26,7 +26,7 @@ /* 12MB Malloc size */ /* console configuration */ -#define CONFIG_SYS_NS16550_CLK 25000000 +#define CFG_SYS_NS16550_CLK 25000000 /* * Increase max uncompressed/gunzip size, keeping size same as EMMC linux diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 481baff11d9..9f51b9ca59d 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -97,7 +97,7 @@ extern phys_addr_t prior_stage_fdt_address; */ #define V_NS16550_CLK 81000000 -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#define CFG_SYS_NS16550_CLK V_NS16550_CLK /* * Serial console configuration. diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 1d51bb4e4c4..6b5f650811b 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -18,7 +18,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ #define CONFIG_TEGRA_SLINK_CTRLS 6 diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 773ce3f6a6f..1bf6baf75c2 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -14,8 +14,8 @@ /* legacy #defines for non DM bur-board */ #ifndef CONFIG_DM -#define CONFIG_SYS_NS16550_CLK (48000000) -#define CONFIG_SYS_NS16550_COM1 0x44e09000 +#define CFG_SYS_NS16550_CLK (48000000) +#define CFG_SYS_NS16550_COM1 0x44e09000 #endif /* CONFIG_DM */ diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index f3416b534b2..35c5a4f1226 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -22,7 +22,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ #define CONFIG_TEGRA_SLINK_CTRLS 6 diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 0672b7dbbe9..55e2d744c4a 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -20,7 +20,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* SPI */ #define CONFIG_SPI_FLASH_SIZE (4 << 20) diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index bfa076b5cc9..1e5154af0a1 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -97,12 +97,12 @@ NANDARGS /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ -#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ -#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ -#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ -#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ -#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ +#define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ +#define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ /* SPL */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 63dac1d4a79..b7511adc09a 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -15,7 +15,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 /* NS16550-ish UARTs */ -#define CONFIG_SYS_NS16550_CLK 48000000 +#define CFG_SYS_NS16550_CLK 48000000 /* Ethernet: davicom DM9000 */ #define CONFIG_DM9000_BASE 0xb6000000 diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 0641d5c0a23..8f058213e9e 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -14,8 +14,8 @@ #include /* Serial support */ -#define CONFIG_SYS_NS16550_CLK 48000000 -#define CONFIG_SYS_NS16550_COM1 0x44e09000 +#define CFG_SYS_NS16550_CLK 48000000 +#define CFG_SYS_NS16550_COM1 0x44e09000 /* NAND support */ #define CFG_SYS_NAND_ECCSIZE 512 diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index b758086b86d..2ba3c3bc87d 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -13,7 +13,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_UARTA_SDIO1 -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* NAND support */ diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index c9d384e2bdb..ffed71a2e82 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -22,7 +22,7 @@ * Colibri UART-C: NVIDIA UARTB */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f8ba4e82819..4f0188dd19e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -94,7 +94,7 @@ /* * Serial Driver info */ -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index e03a24adca4..24cf554649b 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -15,7 +15,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 93201be485d..e1d18a77830 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -27,9 +27,9 @@ #elif (CONFIG_CONS_INDEX == 3) #define CONSOLEDEV "ttyS2" #endif -#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ -#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ -#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ +#define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ +#define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ +#define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ #define CONFIG_SYS_OMAP_ABE_SYSCK diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index 0d61724db8c..a1400eba1ad 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -20,8 +20,8 @@ /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) -#define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_SYS_NS16550_COM1 0xb0000c00 +#define CFG_SYS_NS16550_CLK 40000000 +#define CFG_SYS_NS16550_COM1 0xb0000c00 #endif /* UART */ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index fe4b02c0ce2..211dab4d233 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -17,10 +17,10 @@ #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: keyboard satellite board UART, default */ -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #ifdef CONFIG_TEGRA_ENABLE_UARTA /* UARTA: debug board UART */ -#define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE #endif /* NAND support */ diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index bfc0fa5c442..1d7b171da75 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -28,7 +28,7 @@ /* * UART configuration */ -#define CONFIG_SYS_NS16550_CLK 33330000 +#define CFG_SYS_NS16550_CLK 33330000 /* * Ethernet PHY configuration diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index ce3cb20732d..9e092e16ea0 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -27,7 +27,7 @@ /* * UART configuration */ -#define CONFIG_SYS_NS16550_CLK 33330000 +#define CFG_SYS_NS16550_CLK 33330000 /* * Ethernet PHY configuration diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 69aa55f86c5..b846889541c 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -16,7 +16,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 7acdb0fa038..57b0fc90697 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -148,7 +148,7 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_CLK get_serial_clock() +#define CFG_SYS_NS16550_CLK get_serial_clock() /* * I2C diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 30ba6065253..e6e54fba898 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -330,8 +330,8 @@ * Retain non-DM serial port for debug purposes. */ #if !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500) #endif #ifndef __ASSEMBLY__ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 38860bfd5ca..7ed1f153c23 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -35,7 +35,7 @@ #define CONFIG_MALLOC_F_ADDR CFG_SYS_FSL_OCRAM_BASE /* serial port */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2) /* SPL */ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 5434c4f7679..1f642fbecc3 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -36,7 +36,7 @@ /* * Serial Driver info */ -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index b9c853d7dfe..28372d41590 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -20,8 +20,8 @@ /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) -#define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_SYS_NS16550_COM3 0xb0000e00 +#define CFG_SYS_NS16550_CLK 40000000 +#define CFG_SYS_NS16550_COM3 0xb0000e00 #endif diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 148598fab46..b57eb52d148 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -26,7 +26,7 @@ /* GPIO */ -#define CONFIG_SYS_NS16550_CLK (get_serial_clock()) +#define CFG_SYS_NS16550_CLK (get_serial_clock()) #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 3f2dfa640c9..3579f9c8437 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -47,7 +47,7 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_CLK get_serial_clock() +#define CFG_SYS_NS16550_CLK get_serial_clock() /* * I2C diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index bd2f74c1262..45665115f66 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -227,7 +227,7 @@ * Serial Port */ #ifndef CONFIG_LPUART -#define CONFIG_SYS_NS16550_CLK get_serial_clock() +#define CFG_SYS_NS16550_CLK get_serial_clock() #endif /* diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 8c43f652ab6..1e2db12a83f 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -60,7 +60,7 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* Serial Port */ -#define CONFIG_SYS_NS16550_CLK get_serial_clock() +#define CFG_SYS_NS16550_CLK get_serial_clock() /* I2C */ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 06830f401a3..323feb6e333 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -145,7 +145,7 @@ * Serial Port */ #ifndef CONFIG_LPUART -#define CONFIG_SYS_NS16550_CLK get_serial_clock() +#define CFG_SYS_NS16550_CLK get_serial_clock() #endif /* diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 7dd5649005b..587f23be587 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -28,7 +28,7 @@ /* I2C */ /* Serial Port */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2) /* Miscellaneous configurable options */ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 2fc06c1dd2d..6fc509af232 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -40,7 +40,7 @@ #define CPU_RELEASE_ADDR secondary_boot_addr /* Serial Port */ -#define CONFIG_SYS_NS16550_CLK (get_serial_clock()) +#define CFG_SYS_NS16550_CLK (get_serial_clock()) /* SD boot SPL */ #ifdef CONFIG_SD_BOOT diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 40b4cb964d1..8a3c87c6abd 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -40,7 +40,7 @@ #define CPU_RELEASE_ADDR secondary_boot_addr /* Serial Port */ -#define CONFIG_SYS_NS16550_CLK (get_serial_clock()) +#define CFG_SYS_NS16550_CLK (get_serial_clock()) /* SD boot SPL */ #ifdef CONFIG_SD_BOOT diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 5668e07d135..2117b081168 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -45,7 +45,7 @@ /* Serial Port */ -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) +#define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2) /* * During booting, IFC is mapped at the region of 0x30000000. diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 895c566fea2..c79a50795b8 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -37,7 +37,7 @@ /* I2C */ /* Serial Port */ -#define CONFIG_SYS_NS16550_CLK (get_serial_clock()) +#define CFG_SYS_NS16550_CLK (get_serial_clock()) /* * During booting, IFC is mapped at the region of 0x30000000. diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index b90a84da8ad..a8d8d8b09e0 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -16,7 +16,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index 1f733d112dd..e09e9c82eb8 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -22,8 +22,8 @@ /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) -#define CONFIG_SYS_NS16550_CLK 50000000 -#define CONFIG_SYS_NS16550_COM1 0xbe000c00 +#define CFG_SYS_NS16550_CLK 50000000 +#define CFG_SYS_NS16550_COM1 0xbe000c00 #endif /* Serial common */ diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index da16e3b21a4..bb12ebfe4fd 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -14,8 +14,8 @@ /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) -#define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_SYS_NS16550_COM1 0xb0000c00 +#define CFG_SYS_NS16550_CLK 40000000 +#define CFG_SYS_NS16550_COM1 0xb0000c00 #endif /* Serial common */ diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index eaffe0bf4c9..3da7619d78d 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -12,8 +12,8 @@ #include -#define CONFIG_SYS_NS16550_COM1 0x11005200 -#define CONFIG_SYS_NS16550_CLK 26000000 +#define CFG_SYS_NS16550_COM1 0x11005200 +#define CFG_SYS_NS16550_CLK 26000000 /* Environment settings */ #include diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 347598868bb..0f7981a5661 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -12,8 +12,8 @@ #include -#define CONFIG_SYS_NS16550_COM1 0x11005000 -#define CONFIG_SYS_NS16550_CLK 26000000 +#define CFG_SYS_NS16550_COM1 0x11005000 +#define CFG_SYS_NS16550_CLK 26000000 /* Environment settings */ #include diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index 4f1067c23bb..e870fc810cb 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -32,9 +32,9 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK #if !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE +#define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif #if defined(CONFIG_ARMADA_38X) && !defined(CONFIG_SYS_BAUDRATE_TABLE) diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 310bdde7cb5..2623f99f8d0 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -40,12 +40,12 @@ */ #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#define CFG_SYS_NS16550_CLK V_NS16550_CLK /* * select serial console configuration */ -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CFG_SYS_NS16550_COM3 OMAP34XX_UART3 #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index c59e1032439..baa452156ec 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -16,7 +16,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ #define CONFIG_SPI_FLASH_SIZE (4 << 20) diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index cce5556fe26..883cc0b99c9 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -28,7 +28,7 @@ #include -#define CONFIG_SYS_NS16550_COM3 UART3_BASE +#define CFG_SYS_NS16550_COM3 UART3_BASE /* MMC ENV related defines */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 81ca68de9bc..2b47d4ca376 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -91,7 +91,7 @@ /* * Serial Driver info */ -#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) +#define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 065820689ca..9fc22f0a6cb 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -319,13 +319,13 @@ * shorted - index 1 */ #undef CONFIG_SERIAL_SOFTWARE_FIFO -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#define CFG_SYS_NS16550_CLK get_bus_freq(0) #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) +#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) /* I2C */ #if !CONFIG_IS_ENABLED(DM_I2C) diff --git a/include/configs/paz00.h b/include/configs/paz00.h index c12f4d0937d..a945f4e9b28 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -17,7 +17,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h index ed3201aa3c4..71807837673 100644 --- a/include/configs/pdu001.h +++ b/include/configs/pdu001.h @@ -50,11 +50,11 @@ "\0" /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 UART0_BASE -#define CONFIG_SYS_NS16550_COM2 UART1_BASE -#define CONFIG_SYS_NS16550_COM3 UART2_BASE -#define CONFIG_SYS_NS16550_COM4 UART3_BASE -#define CONFIG_SYS_NS16550_COM5 UART4_BASE -#define CONFIG_SYS_NS16550_COM6 UART5_BASE +#define CFG_SYS_NS16550_COM1 UART0_BASE +#define CFG_SYS_NS16550_COM2 UART1_BASE +#define CFG_SYS_NS16550_COM3 UART2_BASE +#define CFG_SYS_NS16550_COM4 UART3_BASE +#define CFG_SYS_NS16550_COM5 UART4_BASE +#define CFG_SYS_NS16550_COM6 UART5_BASE #endif /* ! __CONFIG_PDU001_H */ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 09f0ed9b9a1..99db59c489e 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -16,7 +16,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index c7f03a1e754..4887747968f 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -22,7 +22,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5765f2ccb5e..c9dd7509cb2 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -38,9 +38,9 @@ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK (48000000) -#define CONFIG_SYS_NS16550_COM1 0x44e09000 -#define CONFIG_SYS_NS16550_COM4 0x481a6000 +#define CFG_SYS_NS16550_CLK (48000000) +#define CFG_SYS_NS16550_COM1 0x44e09000 +#define CFG_SYS_NS16550_COM4 0x481a6000 /* I2C Configuration */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index c29bc448eed..6054fa42c1a 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -52,8 +52,8 @@ * Serial */ -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CFG_SYS_NS16550_CLK V_NS16550_CLK +#define CFG_SYS_NS16550_COM3 OMAP34XX_UART3 #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \ 115200 } diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 029f898b64f..2b2d78b8c8e 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -75,7 +75,7 @@ /* * Serial / UART configurations */ -#define CONFIG_SYS_NS16550_CLK 100000000 +#define CFG_SYS_NS16550_CLK 100000000 /* * SDMMC configurations diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 1ed0a262bc6..cd2a74fb52d 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -19,16 +19,16 @@ /* ns16550 reg in the low bits of cpu reg */ #ifdef CONFIG_MACH_SUNIV /* suniv doesn't have apb2 and uart is connected to apb1 */ -#define CONFIG_SYS_NS16550_CLK 100000000 +#define CFG_SYS_NS16550_CLK 100000000 #else -#define CONFIG_SYS_NS16550_CLK 24000000 +#define CFG_SYS_NS16550_CLK 24000000 #endif #ifndef CONFIG_DM_SERIAL -# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE -# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE -# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE -# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE -# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE +# define CFG_SYS_NS16550_COM1 SUNXI_UART0_BASE +# define CFG_SYS_NS16550_COM2 SUNXI_UART1_BASE +# define CFG_SYS_NS16550_COM3 SUNXI_UART2_BASE +# define CFG_SYS_NS16550_COM4 SUNXI_UART3_BASE +# define CFG_SYS_NS16550_COM5 SUNXI_R_UART_BASE #endif /* CPU */ diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 38a43b726f0..92ee920346b 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -19,7 +19,7 @@ /* * UART configuration */ -#define CONFIG_SYS_NS16550_CLK 166666666 +#define CFG_SYS_NS16550_CLK 166666666 /* * Even though the board houses Realtek RTL8211E PHY diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index f8e741ab6fc..09879663701 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -14,7 +14,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/tec.h b/include/configs/tec.h index 2377b47e054..ddf753da4a9 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -16,7 +16,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 2915db7f8bf..92df457e818 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -26,7 +26,7 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#define CFG_SYS_NS16550_CLK V_NS16550_CLK #ifdef CONFIG_ARM64 #define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb" diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 60632c58c67..9614fe686f6 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -77,8 +77,8 @@ #define CONFIG_SYS_TIMERBASE 0x4802E000 /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK (48000000) -#define CONFIG_SYS_NS16550_COM1 0x48020000 /* Base EVM has UART0 */ +#define CFG_SYS_NS16550_CLK (48000000) +#define CFG_SYS_NS16550_COM1 0x48020000 /* Base EVM has UART0 */ /* CPU */ diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index f2dbe3544a5..1bd2a1874b8 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -30,8 +30,8 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK (48000000) -#define CONFIG_SYS_NS16550_COM1 0x48024000 /* Base EVM has UART2 */ +#define CFG_SYS_NS16550_CLK (48000000) +#define CFG_SYS_NS16550_COM1 0x48024000 /* Base EVM has UART2 */ /* allow overwriting serial config and ethaddr */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index fb017771688..00eb329faa8 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -17,7 +17,7 @@ #include /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK 48000000 +#define CFG_SYS_NS16550_CLK 48000000 /* * SPL related defines. The Public RAM memory map the ROM defines the diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index aaeea77281b..119b4c0410c 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -34,13 +34,13 @@ #define KEYSTONE_SRAM_SCRATCH_SPACE_END (TI_SRAM_SCRATCH_BOARD_EEPROM_END) /* UART Configuration */ -#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE -#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE +#define CFG_SYS_NS16550_COM1 KS2_UART0_BASE +#define CFG_SYS_NS16550_COM2 KS2_UART1_BASE #ifndef CONFIG_SOC_K2G -#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6) +#define CFG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6) #else -#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(uart_pll_clk) / 2 +#define CFG_SYS_NS16550_CLK ks_clk_get_rate(uart_pll_clk) / 2 #endif /* SPI Configuration */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 80d2a011f0f..d282c3956e0 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -26,15 +26,15 @@ /* NS16550 Configuration */ #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ -#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#define CFG_SYS_NS16550_CLK V_NS16550_CLK #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 115200} /* Select serial console configuration */ #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 -#define CONFIG_SYS_NS16550_COM2 OMAP34XX_UART2 -#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 +#define CFG_SYS_NS16550_COM1 OMAP34XX_UART1 +#define CFG_SYS_NS16550_COM2 OMAP34XX_UART2 +#define CFG_SYS_NS16550_COM3 OMAP34XX_UART3 #endif /* Physical Memory Map */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index eb930341c3a..ce50e35d8d4 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -27,9 +27,9 @@ /* * Hardware drivers */ -#define CONFIG_SYS_NS16550_CLK 48000000 +#define CFG_SYS_NS16550_CLK 48000000 #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_COM3 UART3_BASE +#define CFG_SYS_NS16550_COM3 UART3_BASE #endif /* TWL6030 */ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index a1efb57f1b0..c49c177390b 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -29,7 +29,7 @@ /* * Hardware drivers */ -#define CONFIG_SYS_NS16550_CLK 48000000 +#define CFG_SYS_NS16550_CLK 48000000 /* * Environment setup diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index b14726ad234..22d783c325b 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -14,7 +14,7 @@ /* * Serial Port */ -#define CONFIG_SYS_NS16550_CLK 40000000 +#define CFG_SYS_NS16550_CLK 40000000 /* * Command diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index b562d44a13b..e4cbc7da843 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -16,7 +16,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_TEGRA_UARTA_GPU -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 02ddc6fb6e0..338d8af8fb3 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -12,7 +12,7 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ +#define CFG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ) diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 03aa7adcc0d..b2dc04a975a 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -16,7 +16,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 0bd5a1e8522..f7a507768ec 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -15,7 +15,7 @@ /* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTD -#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 84e5ba39f14..2107bec6587 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -19,8 +19,8 @@ #define CONFIG_SYS_UBOOT_BASE 0 /* Serial SPL */ -#define CONFIG_SYS_NS16550_CLK 40000000 -#define CONFIG_SYS_NS16550_COM3 0xb0000e00 +#define CFG_SYS_NS16550_CLK 40000000 +#define CFG_SYS_NS16550_COM3 0xb0000e00 /* RAM */ diff --git a/include/configs/x530.h b/include/configs/x530.h index 318e3680a6e..a0162cab219 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -13,9 +13,9 @@ /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK #if !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE +#define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif /* diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 7090fcef680..b93451cbe07 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -127,10 +127,10 @@ /* Serial Driver Info */ /*====================*/ -#define CONFIG_SYS_NS16550_COM1 IOADDR(0x0D050020) /* Base address */ +#define CFG_SYS_NS16550_COM1 IOADDR(0x0D050020) /* Base address */ /* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */ -#define CONFIG_SYS_NS16550_CLK get_board_sys_clk() +#define CFG_SYS_NS16550_CLK get_board_sys_clk() /*======================*/ /* Ethernet Driver Info */ -- cgit v1.2.3 From cdc5ed8f1f2add27105151ecf61a07c5d4c3684a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:29 -0500 Subject: global: Move remaining CONFIG_SYS_NUM_* to CFG_SYS_NUM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NUM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/P2041RDB.h | 2 +- include/configs/T102xRDB.h | 2 +- include/configs/T104xRDB.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/T4240RDB.h | 2 +- include/configs/km/km-mpc83xx.h | 2 +- include/configs/km/pg-wcom-ls102xa.h | 2 +- include/configs/kmcent2.h | 2 +- include/e500.h | 2 +- include/fm_eth.h | 6 +++--- include/i2c.h | 2 +- 12 files changed, 14 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 132786a4236..6b83b021f77 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -30,7 +30,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index b8f3d70e595..c4fed68273b 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -15,7 +15,7 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 777a64eceee..1eec9454210 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -58,7 +58,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* * These can be toggled for performance analysis, otherwise use default. diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 710f105cfad..42a0926329e 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -22,7 +22,7 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 4c60364f7e7..941efdc243f 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -17,7 +17,7 @@ /* High Level Configuration Options */ -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS #ifdef CONFIG_RAMBOOT_PBL #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index ba4a989fc5f..5969854796e 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -39,7 +39,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* * These can be toggled for performance analysis, otherwise use default. diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index a658cbc07c2..ab0d0a721af 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -50,7 +50,7 @@ #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } /* I2C */ -#define CONFIG_SYS_NUM_I2C_BUSES 4 +#define CFG_SYS_NUM_I2C_BUSES 4 #define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \ {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 57b0fc90697..ad9853ab6b3 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -156,7 +156,7 @@ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_I2C_MAX_HOPS 1 -#define CONFIG_SYS_NUM_I2C_BUSES 3 +#define CFG_SYS_NUM_I2C_BUSES 3 #define I2C_MUX_PCA_ADDR 0x70 #define I2C_MUX_CH_DEFAULT 0x0 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index e6e54fba898..7af65737ff0 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -136,7 +136,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xebfffffc -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* Environment in parallel NOR-Flash */ #define CONFIG_ENV_TOTAL_SIZE 0x040000 diff --git a/include/e500.h b/include/e500.h index 255f46bf1e5..9f68a834c2f 100644 --- a/include/e500.h +++ b/include/e500.h @@ -19,7 +19,7 @@ typedef struct unsigned long freq_localbus; unsigned long freq_qe; #ifdef CONFIG_SYS_DPAA_FMAN - unsigned long freq_fman[CONFIG_SYS_NUM_FMAN]; + unsigned long freq_fman[CFG_SYS_NUM_FMAN]; #endif #ifdef CONFIG_SYS_DPAA_QBMAN unsigned long freq_qman; diff --git a/include/fm_eth.h b/include/fm_eth.h index 7475b515073..aeb640925ee 100644 --- a/include/fm_eth.h +++ b/include/fm_eth.h @@ -56,7 +56,7 @@ enum fm_eth_type { #define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xfc000) #endif #define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xfd000) -#if (CONFIG_SYS_NUM_FMAN == 2) +#if (CFG_SYS_NUM_FMAN == 2) #define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CFG_SYS_FSL_FM2_ADDR + 0xfc000) #define CONFIG_SYS_FM2_TGEC_MDIO_ADDR (CFG_SYS_FSL_FM2_ADDR + 0xfd000) #endif @@ -102,7 +102,7 @@ enum fm_eth_type { offsetof(struct ccsr_fman, memac[n-1]),\ } #else -#if (CONFIG_SYS_NUM_FMAN == 2) +#if (CFG_SYS_NUM_FMAN == 2) #define FM_TGEC_INFO_INITIALIZER(idx, n) \ { \ FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM2_TGEC_MDIO_ADDR) \ @@ -131,7 +131,7 @@ enum fm_eth_type { #endif #endif -#if (CONFIG_SYS_NUM_FM1_10GEC >= 3) +#if (CFG_SYS_NUM_FM1_10GEC >= 3) #define FM_TGEC_INFO_INITIALIZER2(idx, n) \ { \ FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \ diff --git a/include/i2c.h b/include/i2c.h index e0ee94e5504..c07e60b04bd 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -637,7 +637,7 @@ void i2c_early_init_f(void); /* no muxes used bus = i2c adapters */ #define CONFIG_SYS_I2C_DIRECT_BUS 1 #define CONFIG_SYS_I2C_MAX_HOPS 0 -#define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) +#define CFG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) #else /* we use i2c muxes */ #undef CONFIG_SYS_I2C_DIRECT_BUS -- cgit v1.2.3 From 3408d96e6cec9dac16fce1a32a522c5de8a182ae Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:31 -0500 Subject: Remove unused symbols This commit removes the following unused symbols: CONFIG_SYS_NVRAM_BASE_ADDR CONFIG_SYS_NVRAM_SIZE CONFIG_SYS_PAXE_BASE CONFIG_SYS_PCCNT CONFIG_SYS_PCDAT CONFIG_SYS_PCDDR CONFIG_SYS_PCI1_ADDR CONFIG_SYS_PCI2_ADDR CONFIG_SYS_PCI1_IO_BUS CONFIG_SYS_PCI1_IO_SIZE CONFIG_SYS_PCI1_MEM_BUS CONFIG_SYS_PCI1_MEM_SIZE CONFIG_SYS_PCIE3_ADDR CONFIG_SYS_PCIE4_ADDR CONFIG_SYS_PCIE3_IO_PHYS CONFIG_SYS_PCIE3_IO_VIRT CONFIG_SYS_PCIE4_IO_PHYS CONFIG_SYS_PCIE4_IO_VIRT CONFIG_SYS_PLL_SETTLING_TIME CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_SP_CENA_SIZE CONFIG_SYS_RCAR_I2C0_BASE CONFIG_SYS_RCAR_I2C1_BASE CONFIG_SYS_RCAR_I2C2_BASE CONFIG_SYS_RCAR_I2C3_BASE CONFIG_SYS_SATA CONFIG_SYS_SDRAM_BASE2 CONFIG_SYS_SGMII_REFCLK_MHZ CONFIG_SYS_SGMII_LINERATE_MHZ CONFIG_SYS_SGMII_RATESCALE CONFIG_SYS_SH_SDHI0_BASE CONFIG_SYS_SH_SDHI0_BASE CONFIG_SYS_SH_SDHI1_BASE CONFIG_SYS_SH_SDHI2_BASE CONFIG_SYS_SH_SDHI3_BASE CONFIG_SYS_SPI_ST_ENABLE_WP_PIN CONFIG_SYS_SPI_U_BOOT_SIZE CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT CONFIG_SYS_VCXK_BASE CONFIG_SYS_VCXK_DEFAULT_LINEALIGN CONFIG_SYS_VCXK_DOUBLEBUFFERED CONFIG_SYS_VCXK_ENABLE_DDR CONFIG_SYS_VCXK_ENABLE_PIN CONFIG_SYS_VCXK_ENABLE_PORT CONFIG_SYS_VCXK_INVERT_DDR CONFIG_SYS_VCXK_INVERT_PIN CONFIG_SYS_VCXK_INVERT_PORT CONFIG_SYS_VCXK_REQUEST_DDR CONFIG_SYS_VCXK_REQUEST_PIN CONFIG_SYS_VCXK_REQUEST_PORT CONFIG_SYS_VSC7385_BR_PRELIM CONFIG_SYS_VSC7385_OR_PRELIM Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/M5282EVB.h | 6 ------ include/configs/MPC8548CDS.h | 5 ----- include/configs/P2041RDB.h | 4 ---- include/configs/T102xRDB.h | 4 ---- include/configs/T104xRDB.h | 6 ------ include/configs/T208xQDS.h | 5 ----- include/configs/T208xRDB.h | 5 ----- include/configs/T4240RDB.h | 5 ----- include/configs/aristainetos2.h | 2 -- include/configs/eb_cpu5282.h | 30 ------------------------------ include/configs/highbank.h | 5 ----- include/configs/km/km-mpc8360.h | 1 - include/configs/km/km-mpc83xx.h | 1 - include/configs/ls1012a2g5rdb.h | 4 ---- include/configs/ls1012a_common.h | 4 ---- include/configs/ls1043aqds.h | 4 ---- include/configs/ls1046a_common.h | 5 ----- include/configs/p1_p2_rdb_pc.h | 6 ------ include/configs/phycore_am335x_r2.h | 6 ------ include/configs/r2dplus.h | 5 ----- include/configs/socrates.h | 8 ++------ include/configs/ti814x_evm.h | 2 -- include/configs/ti_armv7_keystone2.h | 5 ----- 23 files changed, 2 insertions(+), 126 deletions(-) (limited to 'include') diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index e191dc615bc..925d26eaf10 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -130,13 +130,7 @@ #define CONFIG_SYS_PBDDR 0x0000000 #define CONFIG_SYS_PBDAT 0x0000000 -#define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */ -#define CONFIG_SYS_PCDDR 0x0000000 -#define CONFIG_SYS_PCDAT 0x0000000 - #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ -#define CONFIG_SYS_PCDDR 0x0000000 -#define CONFIG_SYS_PCDAT 0x0000000 #define CONFIG_SYS_PEHLPAR 0xC0 #define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index bde8fa8df4d..c29e63c54ed 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -256,21 +256,16 @@ */ #define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCI1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCI1_MEM_PHYS 0xc00000000ull #else -#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 #define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 #endif -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 -#define CONFIG_SYS_PCI1_IO_BUS 0x00000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCI1_IO_PHYS 0xfe2000000ull #else #define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 #endif -#define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ #ifdef CONFIG_PCIE1 #define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 6b83b021f77..c8329810786 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -248,8 +248,6 @@ /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull /* Qman/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 @@ -276,9 +274,7 @@ #define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE #endif #define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE #define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ CONFIG_SYS_QMAN_CENA_SIZE) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index c4fed68273b..e21639a6951 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -349,8 +349,6 @@ #ifdef CONFIG_PCIE3 #define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull #endif #endif /* CONFIG_PCI */ @@ -391,9 +389,7 @@ #define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE #endif #define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE #define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ CONFIG_SYS_QMAN_CENA_SIZE) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 1eec9454210..a3d04882f0d 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -325,16 +325,12 @@ #ifdef CONFIG_PCIE3 #define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull #endif /* controller 4, Base address 203000 */ #ifdef CONFIG_PCIE4 #define CONFIG_SYS_PCIE4_MEM_VIRT 0xb0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000 -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull #endif #endif /* CONFIG_PCI */ @@ -364,9 +360,7 @@ #define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 #define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull #define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE #define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ CONFIG_SYS_QMAN_CENA_SIZE) diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 42a0926329e..72052be78a9 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -359,13 +359,10 @@ /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull /* controller 4, Base address 203000 */ #define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN @@ -385,9 +382,7 @@ #define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 #define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull #define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE #define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ CONFIG_SYS_QMAN_CENA_SIZE) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 941efdc243f..c798e4487a4 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -313,13 +313,10 @@ /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull /* controller 4, Base address 203000 */ #define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN @@ -339,9 +336,7 @@ #define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 #define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull #define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE #define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ CONFIG_SYS_QMAN_CENA_SIZE) diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 5969854796e..5777df8e507 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -121,13 +121,10 @@ /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull /* controller 4, Base address 203000 */ #define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull /* * Miscellaneous configurable options @@ -337,9 +334,7 @@ #define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 #define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull #define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE #define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ CONFIG_SYS_QMAN_CENA_SIZE) diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 1f2b3b58ca6..35e8840a92a 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -30,8 +30,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN - #ifdef CONFIG_IMX_HAB #define HAB_EXTRA_SETTINGS \ "hab_check_addr=" \ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index aaa2ef039d9..80a820c913b 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -137,13 +137,7 @@ #define CONFIG_SYS_PBDDR 0x0000000 #define CONFIG_SYS_PBDAT 0x0000000 -#define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */ -#define CONFIG_SYS_PCDDR 0x0000000 -#define CONFIG_SYS_PCDAT 0x0000000 - #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ -#define CONFIG_SYS_PCDDR 0x0000000 -#define CONFIG_SYS_PCDAT 0x0000000 #define CONFIG_SYS_PASPAR 0x0F0F #define CONFIG_SYS_PEHLPAR 0xC0 @@ -160,29 +154,5 @@ #define CONFIG_I2C_RTC_ADDR 0x68 #endif -/*----------------------------------------------------------------------- - * VIDEO configuration - */ - -#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2 -#define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1 -#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS2_BASE - -#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT -#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR -#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001 - -#define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT -#define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR -#define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002 - -#define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT -#define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR -#define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004 - -#define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE -#define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE -#define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2 - #endif /* _CONFIG_M5282EVB_H */ /*---------------------------------------------------------------------*/ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 5e2b50bbac1..a7d21a76dba 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -14,11 +14,6 @@ * Miscellaneous configurable options */ -/* Environment data setup -*/ -#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ -#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */ - #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/km/km-mpc8360.h b/include/configs/km/km-mpc8360.h index 92e046d02d7..fb43fb81bc0 100644 --- a/include/configs/km/km-mpc8360.h +++ b/include/configs/km/km-mpc8360.h @@ -72,4 +72,3 @@ * PAXE on the local bus CS3 */ #define CONFIG_SYS_PAXE_BASE 0xA0000000 -#define CONFIG_SYS_PAXE_SIZE 256 diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index ab0d0a721af..7d36a25dc23 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -8,7 +8,6 @@ * DDR Setup */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ -#define CONFIG_SYS_SDRAM_BASE2 (CONFIG_SYS_SDRAM_BASE + 0x10000000) /* +256M */ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index f0248e64646..196e024b57e 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -11,10 +11,6 @@ /* DDR */ #define CONFIG_SYS_SDRAM_SIZE 0x40000000 -/* SATA */ - -#define CONFIG_SYS_SATA AHCI_BASE_ADDR - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index b57eb52d148..809f9ae8c8d 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -18,10 +18,6 @@ /*SPI device */ #define CFG_SYS_FSL_QSPI_BASE 0x40000000 -/* SATA */ - -#define CONFIG_SYS_SATA AHCI_BASE_ADDR - /* I2C */ /* GPIO */ diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 3b51cb8f174..87751f786c8 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -35,10 +35,6 @@ #define QSGMII_CARD_PORT4_PHY_ADDR_S2 0xB #endif -/* SATA */ - -#define CONFIG_SYS_SATA AHCI_BASE_ADDR - /* * IFC Definitions */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 8a3c87c6abd..3934fbbb41d 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -65,11 +65,6 @@ /* I2C */ -/* SATA */ -#ifndef SPL_NO_SATA -#define CONFIG_SYS_SATA AHCI_BASE_ADDR -#endif - /* FMan ucode */ #ifndef SPL_NO_FMAN #define CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 9fc22f0a6cb..44e608536fe 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -279,12 +279,6 @@ #define CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BASE #endif -#define CONFIG_SYS_VSC7385_BR_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_VSC7385_BASE_PHYS) | BR_PS_8 | BR_V) -#define CONFIG_SYS_VSC7385_OR_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | \ - OR_GPCM_XACS | OR_GPCM_SCY_15 | OR_GPCM_SETA | \ - OR_GPCM_TRLX | OR_GPCM_EHTR | OR_GPCM_EAD) - /* The size of the VSC7385 firmware image */ #define CONFIG_VSC7385_IMAGE_SIZE 8192 #endif diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index c5817b010f8..43a60825b57 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -97,10 +97,4 @@ #endif /* !CONFIG_MTD_RAW_NAND */ -/* CPU */ - -#ifdef CONFIG_SPI_BOOT -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 -#endif - #endif /* ! __CONFIG_PHYCORE_AM335x_R2_H */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index ac39e11a99e..406ee6282c5 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -18,9 +18,4 @@ #define CONFIG_SYS_FLASH_BASE (0xA0000000) #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } -/* - * SuperH Clock setting - */ -#define CONFIG_SYS_PLL_SETTLING_TIME 100/* in us */ - #endif /* __CONFIG_H */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 388a4e42efb..9b106fc1c97 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -109,12 +109,8 @@ * Memory space is mapped 1-1. */ -#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_BASE 0xE2000000 -#define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE -#define CONFIG_SYS_PCI1_IO_SIZE 0x01000000 /* 16M */ +#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 +#define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 9614fe686f6..fc78077014b 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -84,8 +84,6 @@ /* Defines for SPL */ -#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 - /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM * 64 bytes before this address should be set aside for u-boot.img's diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 119b4c0410c..65abb187d96 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -46,11 +46,6 @@ /* SPI Configuration */ #define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) -/* Network Configuration */ -#define CONFIG_SYS_SGMII_REFCLK_MHZ 312 -#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250 -#define CONFIG_SYS_SGMII_RATESCALE 2 - /* Keystone net */ #define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR #define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE -- cgit v1.2.3 From 789bb9537a4427798e3e28ff0c6be2c27454315f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:32 -0500 Subject: Convert CONFIG_SYS_OMAP_ABE_SYSCK to Kconfig This converts the following to Kconfig: CONFIG_SYS_OMAP_ABE_SYSCK Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/am57xx_evm.h | 2 -- include/configs/dra7xx_evm.h | 2 -- 2 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index c3b6a3fbda2..84555f3b13d 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -20,8 +20,6 @@ #define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ -#define CONFIG_SYS_OMAP_ABE_SYSCK - #ifndef CONFIG_SPL_BUILD #define DFUARGS \ "dfu_bufsiz=0x10000\0" \ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index e1d18a77830..bb335a0a473 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -31,8 +31,6 @@ #define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ -#define CONFIG_SYS_OMAP_ABE_SYSCK - #ifndef CONFIG_SPL_BUILD #define DFUARGS \ "dfu_bufsiz=0x10000\0" \ -- cgit v1.2.3 From ecc8d425fd50d894dd0a06796c17030ef4a7942f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:33 -0500 Subject: global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/MPC837XERDB.h | 18 +++++++++--------- include/configs/MPC8548CDS.h | 24 ++++++++++++------------ include/configs/P1010RDB.h | 24 ++++++++++++------------ include/configs/P2041RDB.h | 20 ++++++++++---------- include/configs/T102xRDB.h | 20 ++++++++++---------- include/configs/T104xRDB.h | 24 ++++++++++++------------ include/configs/T208xQDS.h | 24 ++++++++++++------------ include/configs/T208xRDB.h | 24 ++++++++++++------------ include/configs/T4240RDB.h | 24 ++++++++++++------------ include/configs/kmcent2.h | 8 ++++---- include/configs/p1_p2_rdb_pc.h | 24 ++++++++++++------------ include/configs/socrates.h | 4 ++-- 12 files changed, 119 insertions(+), 119 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 059885ecb54..0e70b2853b2 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -177,15 +177,15 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCIE1_CFG_BASE 0xA0000000 -#define CONFIG_SYS_PCIE1_CFG_SIZE 0x08000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xA8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xB8000000 - -#define CONFIG_SYS_PCIE2_CFG_BASE 0xC0000000 -#define CONFIG_SYS_PCIE2_CFG_SIZE 0x08000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xC8000000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000 +#define CFG_SYS_PCIE1_CFG_BASE 0xA0000000 +#define CFG_SYS_PCIE1_CFG_SIZE 0x08000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xA8000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xB8000000 + +#define CFG_SYS_PCIE2_CFG_BASE 0xC0000000 +#define CFG_SYS_PCIE2_CFG_SIZE 0x08000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xC8000000 +#define CFG_SYS_PCIE2_IO_PHYS 0xD8000000 /* * TSEC diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index c29e63c54ed..c59a37646f4 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -254,31 +254,31 @@ * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCI1_MEM_VIRT 0x80000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCI1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCI1_MEM_PHYS 0xc00000000ull #else -#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 +#define CFG_SYS_PCI1_MEM_PHYS 0x80000000 #endif -#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 +#define CFG_SYS_PCI1_IO_VIRT 0xe2000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCI1_IO_PHYS 0xfe2000000ull +#define CFG_SYS_PCI1_IO_PHYS 0xfe2000000ull #else -#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 +#define CFG_SYS_PCI1_IO_PHYS 0xe2000000 #endif #ifdef CONFIG_PCIE1 -#define CONFIG_SYS_PCIE1_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE1_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE1_MEM_PHYS 0xc20000000ull #else -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xa0000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xa0000000 #endif -#define CONFIG_SYS_PCIE1_IO_VIRT 0xe3000000 +#define CFG_SYS_PCIE1_IO_VIRT 0xe3000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_IO_PHYS 0xfe3000000ull +#define CFG_SYS_PCIE1_IO_PHYS 0xfe3000000ull #else -#define CONFIG_SYS_PCIE1_IO_PHYS 0xe3000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xe3000000 #endif #endif diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 05c097759f6..f87e7597ad0 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -68,31 +68,31 @@ * Memory space is mapped 1-1, but I/O space must start from 0. */ /* controller 1, Slot 1, tgtid 1, Base address a000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull #else -#define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0x80000000 #endif -#define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000 +#define CFG_SYS_PCIE1_IO_VIRT 0xffc00000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc00000ull +#define CFG_SYS_PCIE1_IO_PHYS 0xfffc00000ull #else -#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 +#define CFG_SYS_PCIE1_IO_PHYS 0xffc00000 #endif /* controller 2, Slot 2, tgtid 2, Base address 9000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE2_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE2_MEM_PHYS 0xc20000000ull #else -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xa0000000 #endif -#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 +#define CFG_SYS_PCIE2_IO_VIRT 0xffc10000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull +#define CFG_SYS_PCIE2_IO_PHYS 0xfffc10000ull #else -#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 +#define CFG_SYS_PCIE2_IO_PHYS 0xffc10000 #endif #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index c8329810786..e996dbaa4de 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -234,20 +234,20 @@ */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull /* controller 2, Slot 2, tgtid 2, Base address 201000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#define CFG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CFG_SYS_PCIE2_IO_PHYS 0xff8010000ull /* controller 3, Slot 1, tgtid 1, Base address 202000 */ -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull +#define CFG_SYS_PCIE3_MEM_VIRT 0xc0000000 +#define CFG_SYS_PCIE3_MEM_PHYS 0xc40000000ull /* Qman/Bman */ #define CONFIG_SYS_BMAN_NUM_PORTALS 10 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e21639a6951..6d6e334bf00 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -331,24 +331,24 @@ #ifdef CONFIG_PCI /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #ifdef CONFIG_PCIE1 -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull #endif /* controller 2, Slot 2, tgtid 2, Base address 201000 */ #ifdef CONFIG_PCIE2 -#define CONFIG_SYS_PCIE2_MEM_VIRT 0x90000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc10000000ull -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#define CFG_SYS_PCIE2_MEM_VIRT 0x90000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xc10000000ull +#define CFG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CFG_SYS_PCIE2_IO_PHYS 0xff8010000ull #endif /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #ifdef CONFIG_PCIE3 -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE3_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE3_MEM_PHYS 0xc20000000ull #endif #endif /* CONFIG_PCI */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index a3d04882f0d..423ba816170 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -307,30 +307,30 @@ #ifdef CONFIG_PCI /* controller 1, direct to uli, tgtid 3, Base address 20000 */ #ifdef CONFIG_PCIE1 -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull #endif /* controller 2, Slot 2, tgtid 2, Base address 201000 */ #ifdef CONFIG_PCIE2 -#define CONFIG_SYS_PCIE2_MEM_VIRT 0x90000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc10000000ull -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#define CFG_SYS_PCIE2_MEM_VIRT 0x90000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xc10000000ull +#define CFG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CFG_SYS_PCIE2_IO_PHYS 0xff8010000ull #endif /* controller 3, Slot 1, tgtid 1, Base address 202000 */ #ifdef CONFIG_PCIE3 -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE3_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE3_MEM_PHYS 0xc20000000ull #endif /* controller 4, Base address 203000 */ #ifdef CONFIG_PCIE4 -#define CONFIG_SYS_PCIE4_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc30000000ull +#define CFG_SYS_PCIE4_MEM_VIRT 0xb0000000 +#define CFG_SYS_PCIE4_MEM_PHYS 0xc30000000ull #endif #endif /* CONFIG_PCI */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 72052be78a9..2efc2eb95c4 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -345,24 +345,24 @@ * Memory space is mapped 1-1, but I/O space must start from 0. */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull /* controller 2, Slot 2, tgtid 2, Base address 201000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#define CFG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CFG_SYS_PCIE2_IO_PHYS 0xff8010000ull /* controller 3, Slot 1, tgtid 1, Base address 202000 */ -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull +#define CFG_SYS_PCIE3_MEM_VIRT 0xb0000000 +#define CFG_SYS_PCIE3_MEM_PHYS 0xc30000000ull /* controller 4, Base address 203000 */ -#define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull +#define CFG_SYS_PCIE4_MEM_VIRT 0xc0000000 +#define CFG_SYS_PCIE4_MEM_PHYS 0xc40000000ull /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index c798e4487a4..ca8bfac0c69 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -299,24 +299,24 @@ * Memory space is mapped 1-1, but I/O space must start from 0. */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull /* controller 2, Slot 2, tgtid 2, Base address 201000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#define CFG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CFG_SYS_PCIE2_IO_PHYS 0xff8010000ull /* controller 3, Slot 1, tgtid 1, Base address 202000 */ -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull +#define CFG_SYS_PCIE3_MEM_VIRT 0xb0000000 +#define CFG_SYS_PCIE3_MEM_PHYS 0xc30000000ull /* controller 4, Base address 203000 */ -#define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull +#define CFG_SYS_PCIE4_MEM_VIRT 0xc0000000 +#define CFG_SYS_PCIE4_MEM_PHYS 0xc40000000ull /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 5777df8e507..091920dccfe 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -107,24 +107,24 @@ */ /* controller 1, direct to uli, tgtid 3, Base address 20000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull /* controller 2, Slot 2, tgtid 2, Base address 201000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#define CFG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CFG_SYS_PCIE2_IO_PHYS 0xff8010000ull /* controller 3, Slot 1, tgtid 1, Base address 202000 */ -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc40000000ull +#define CFG_SYS_PCIE3_MEM_VIRT 0xc0000000 +#define CFG_SYS_PCIE3_MEM_PHYS 0xc40000000ull /* controller 4, Base address 203000 */ -#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc60000000ull +#define CFG_SYS_PCIE4_MEM_BUS 0xe0000000 +#define CFG_SYS_PCIE4_MEM_PHYS 0xc60000000ull /* * Miscellaneous configurable options diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 7af65737ff0..1df90def673 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -346,10 +346,10 @@ int get_scl(void); * Memory space is mapped 1-1, but I/O space must start from 0. */ /* controller 1 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull #define CONFIG_SYS_BMAN_NUM_PORTALS 10 #define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 44e608536fe..6e8ac1b98df 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -343,31 +343,31 @@ */ /* controller 2, direct to uli, tgtid 2, Base address 9000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CFG_SYS_PCIE2_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CFG_SYS_PCIE2_MEM_PHYS 0xc20000000ull #else -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 +#define CFG_SYS_PCIE2_MEM_PHYS 0xa0000000 #endif -#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 +#define CFG_SYS_PCIE2_IO_VIRT 0xffc10000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull +#define CFG_SYS_PCIE2_IO_PHYS 0xfffc10000ull #else -#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 +#define CFG_SYS_PCIE2_IO_PHYS 0xffc10000 #endif /* controller 1, Slot 2, tgtid 1, Base address a000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CFG_SYS_PCIE1_MEM_VIRT 0x80000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CFG_SYS_PCIE1_MEM_PHYS 0xc00000000ull #else -#define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 +#define CFG_SYS_PCIE1_MEM_PHYS 0x80000000 #endif -#define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000 +#define CFG_SYS_PCIE1_IO_VIRT 0xffc00000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc00000ull +#define CFG_SYS_PCIE1_IO_PHYS 0xfffc00000ull #else -#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc00000 +#define CFG_SYS_PCIE1_IO_PHYS 0xffc00000 #endif #endif /* CONFIG_PCI */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 9b106fc1c97..a60ac6d1a3c 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -109,8 +109,8 @@ * Memory space is mapped 1-1. */ -#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 -#define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 +#define CFG_SYS_PCI1_MEM_PHYS 0x80000000 +#define CFG_SYS_PCI1_IO_PHYS 0xE2000000 #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" -- cgit v1.2.3 From 2db82bf2bd8fa5de2b55ad7c4c1c0afa58f171c2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:34 -0500 Subject: Convert CONFIG_SYS_PMAN et al to Kconfig This converts the following to Kconfig: CONFIG_NOBQFMAN CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME CONFIG_SYS_DPAA_RMAN CONFIG_SYS_PMAN Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/P2041RDB.h | 4 ---- include/configs/T102xRDB.h | 2 -- include/configs/T104xRDB.h | 3 --- include/configs/T208xQDS.h | 6 ------ include/configs/T208xRDB.h | 6 ------ include/configs/T4240RDB.h | 6 ------ include/configs/kmcent2.h | 3 --- include/configs/ls1043a_common.h | 1 - include/configs/ls1046a_common.h | 1 - 9 files changed, 32 deletions(-) (limited to 'include') diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e996dbaa4de..8c7b877bfb9 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -36,7 +36,6 @@ #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ #define CONFIG_SRIO_PCIE_BOOT_MASTER -#define CONFIG_SYS_DPAA_RMAN /* RMan */ #ifndef __ASSEMBLY__ #include @@ -281,9 +280,6 @@ #define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME - #ifdef CONFIG_FMAN_ENET #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 #define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 6d6e334bf00..154b2f174af 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -395,8 +395,6 @@ CONFIG_SYS_QMAN_CENA_SIZE) #define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 - -#define CONFIG_SYS_DPAA_FMAN #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 423ba816170..847cf65b409 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -366,9 +366,6 @@ CONFIG_SYS_QMAN_CENA_SIZE) #define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 - -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_FMAN_ENET diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 2efc2eb95c4..b49c2647768 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -388,12 +388,6 @@ CONFIG_SYS_QMAN_CENA_SIZE) #define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 - -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME -#define CONFIG_SYS_PMAN -#define CONFIG_SYS_DPAA_DCE -#define CONFIG_SYS_DPAA_RMAN /* RMan */ #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ca8bfac0c69..aae41a33925 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -342,12 +342,6 @@ CONFIG_SYS_QMAN_CENA_SIZE) #define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 - -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME -#define CONFIG_SYS_PMAN -#define CONFIG_SYS_DPAA_DCE -#define CONFIG_SYS_DPAA_RMAN /* RMan */ #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 091920dccfe..9dc45e397f9 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -340,12 +340,6 @@ CONFIG_SYS_QMAN_CENA_SIZE) #define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 - -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME -#define CONFIG_SYS_PMAN -#define CONFIG_SYS_DPAA_DCE -#define CONFIG_SYS_DPAA_RMAN #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 1df90def673..c8423fdfb0a 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -372,9 +372,6 @@ int get_scl(void); #define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) #define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME - /* Qman / Bman */ /* RGMII (FM1@DTESC5) is local managemant interface */ #define CONFIG_SYS_RGMII2_PHY_ADDR 0x11 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 6fc509af232..df6338298b4 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -103,7 +103,6 @@ /* FMan ucode */ #ifndef SPL_NO_FMAN -#define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #endif diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 3934fbbb41d..b09588f4796 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -67,7 +67,6 @@ /* FMan ucode */ #ifndef SPL_NO_FMAN -#define CONFIG_SYS_DPAA_FMAN #ifdef CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 #endif -- cgit v1.2.3 From f16b1a6c0082fc29371776096986d56c21851565 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:35 -0500 Subject: spl: Migrate SYS_SATA_FAT_BOOT_PARTITION to Kconfig This moves SYS_SATA_FAT_BOOT_PARTITION to Kconfig and enforces the current default via Kconfig rather than C code. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/imx6_spl.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 3afe418b67d..f34988fdd74 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -10,11 +10,6 @@ /* MMC support */ -/* SATA support */ -#if defined(CONFIG_SPL_SATA) -#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 -#endif - #endif #endif -- cgit v1.2.3 From aec118ebe63f7f0ab60916f9906fb3cb680abf7a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:36 -0500 Subject: imx6/imx7: Remove now empty imx6_spl.h and imx7_spl.h There are now no flags being set in these files, so remove them. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/apalis_imx6.h | 4 ---- include/configs/brppt2.h | 5 ----- include/configs/cl-som-imx7.h | 3 --- include/configs/cm_fx6.h | 3 --- include/configs/colibri_imx6.h | 4 ---- include/configs/dart_6ul.h | 3 --- include/configs/dh_imx6.h | 3 --- include/configs/display5.h | 2 -- include/configs/el6x_common.h | 4 ---- include/configs/embestmx6boards.h | 6 ------ include/configs/ge_b1x5v2.h | 2 -- include/configs/gw_ventana.h | 1 - include/configs/imx6-engicam.h | 5 ----- include/configs/imx6_logic.h | 4 ---- include/configs/imx6_spl.h | 15 --------------- include/configs/imx6dl-mamoj.h | 3 --- include/configs/imx6q-bosch-acc.h | 1 - include/configs/imx6ulz_smm_m2.h | 3 --- include/configs/imx7-cm.h | 3 --- include/configs/imx7_spl.h | 19 ------------------- include/configs/kontron-sl-mx6ul.h | 3 --- include/configs/kp_imx6q_tpc.h | 3 --- include/configs/liteboard.h | 3 --- include/configs/mccmon6.h | 2 -- include/configs/mx6cuboxi.h | 2 -- include/configs/mx6memcal.h | 1 - include/configs/mx6sabreauto.h | 4 ---- include/configs/mx6sabresd.h | 4 ---- include/configs/mx6slevk.h | 4 ---- include/configs/mx6sxsabresd.h | 4 ---- include/configs/mx6ul_14x14_evk.h | 3 --- include/configs/mys_6ulx.h | 3 --- include/configs/novena.h | 3 --- include/configs/npi_imx6ull.h | 3 --- include/configs/opos6uldev.h | 4 ---- include/configs/pcl063.h | 3 --- include/configs/pcl063_ull.h | 3 --- include/configs/pcm058.h | 4 ---- include/configs/pico-imx6.h | 8 -------- include/configs/pico-imx6ul.h | 7 ------- include/configs/pico-imx7d.h | 8 -------- include/configs/somlabs_visionsom_6ull.h | 4 ---- include/configs/tqma6.h | 7 ------- include/configs/udoo.h | 2 -- include/configs/udoo_neo.h | 2 -- include/configs/vining_2000.h | 4 ---- include/configs/wandboard.h | 2 -- include/configs/xpress.h | 3 --- 48 files changed, 196 deletions(-) delete mode 100644 include/configs/imx6_spl.h delete mode 100644 include/configs/imx7_spl.h (limited to 'include') diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 192c9cf0c30..30d32d27e3d 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -15,10 +15,6 @@ #include #include -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 0c7fe5f3abb..bdedf7ea2d7 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -86,9 +86,4 @@ BUR_COMMON_ENV \ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -/* SPL */ -#ifdef CONFIG_SPL -#include "imx6_spl.h" - -#endif /* CONFIG_SPL */ #endif /* __CONFIG_BRPP2_IMX6_H */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index cbf85341a64..fc45e597f6d 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -101,7 +101,4 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* SPL */ -#include "imx7_spl.h" - #endif /* __CONFIG_H */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 2cb09fa30da..25443629e20 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -143,9 +143,6 @@ /* misc */ -/* SPL */ -#include "imx6_spl.h" - /* Display */ #define CONFIG_IMX_HDMI diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 14fdf5b50e6..68d923c1ae1 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -15,10 +15,6 @@ #include #include -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index 6079596caec..b944d50663c 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -10,9 +10,6 @@ #include #include "mx6_common.h" -/* SPL options */ -#include "imx6_spl.h" - /* NAND pin conflicts with usdhc2 */ #ifdef CONFIG_CMD_NAND #define CFG_SYS_FSL_USDHC_NUM 1 diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 54b2192b4a8..e694dd7551a 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -21,9 +21,6 @@ * 0x12_0000-0x1f_ffff ... UNUSED */ -/* SPL */ -#include "imx6_spl.h" /* common IMX6 SPL configuration */ - /* Miscellaneous configurable options */ /* MMC Configs */ diff --git a/include/configs/display5.h b/include/configs/display5.h index eb65f17cbe4..0e5ecab9feb 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -34,8 +34,6 @@ #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 #define CONFIG_SYS_SPI_ARGS_SIZE 0x10000 -#include "imx6_spl.h" - #define CONFIG_MXC_UART_BASE UART5_BASE /* I2C Configs */ diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index affe20a1019..16d2648e11f 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -12,10 +12,6 @@ #include "mx6_common.h" -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 555239b8e81..a4891ddbc4f 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -49,12 +49,6 @@ #include "mx6_common.h" -#ifdef CONFIG_SPL -#include "imx6_spl.h" -/* RiOTboard */ - -#endif - /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, * 1M script, 1M pxe and the ramdisk at the end */ #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 176f80bb09b..c862f15ee2b 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -12,8 +12,6 @@ #include "mx6_common.h" -#include "imx6_spl.h" - /* PWM */ #define CONFIG_IMX6_PWM_PER_CLK 66000000 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index a9ef35ebeb6..645ca162a35 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -13,7 +13,6 @@ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#include "imx6_spl.h" /* common IMX6 SPL configuration */ #include "mx6_common.h" /* Serial */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index e430efad42e..b8eb5c82cf7 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -142,9 +142,4 @@ # define CONFIG_IMX_VIDEO_SKIP #endif -/* SPL */ -#ifdef CONFIG_SPL -# include "imx6_spl.h" -#endif - #endif /* __IMX6_ENGICAM_CONFIG_H */ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 7760c8c418a..6b822e72505 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -11,10 +11,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE #define CONSOLE_DEV "ttymxc0" -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #include "mx6_common.h" /* MMC Configs */ diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h deleted file mode 100644 index f34988fdd74..00000000000 --- a/include/configs/imx6_spl.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2014 Gateworks Corporation - * Author: Tim Harvey - */ -#ifndef __IMX6_SPL_CONFIG_H -#define __IMX6_SPL_CONFIG_H - -#ifdef CONFIG_SPL - -/* MMC support */ - -#endif - -#endif diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 909453cd66f..f7f8f33ed89 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -59,7 +59,4 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* SPL */ -#include "imx6_spl.h" - #endif /* __IMX6DL_MAMOJ_CONFIG_H */ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 5025ad9d9f2..15171d7ad67 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -91,7 +91,6 @@ /* SPL */ #ifdef CONFIG_SPL -#include "imx6_spl.h" #ifdef CONFIG_SPL_BUILD #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h index d42eb750d01..70b4b84215d 100644 --- a/include/configs/imx6ulz_smm_m2.h +++ b/include/configs/imx6ulz_smm_m2.h @@ -12,9 +12,6 @@ #include #include -/* SPL options */ -#include "imx6_spl.h" - #define CONFIG_MXC_UART_BASE UART4_BASE #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index caa6a11d407..c6db5e943ee 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -83,7 +83,4 @@ #define CONFIG_USBD_HS -/* SPL */ -#include "imx7_spl.h" - #endif /* __CONFIG_H */ diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h deleted file mode 100644 index 362b98075f0..00000000000 --- a/include/configs/imx7_spl.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * SPL definitions for the i.MX7 SPL - * - * (C) Copyright 2017 CompuLab, Ltd. http://www.compulab.com - * - * Author: Uri Mashiach - */ - -#ifndef __IMX7_SPL_CONFIG_H -#define __IMX7_SPL_CONFIG_H - -#ifdef CONFIG_SPL - -/* MMC support */ - -#endif /* CONFIG_SPL */ - -#endif /* __IMX7_SPL_CONFIG_H */ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index d3447a80ca5..b3e1fc2a864 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -11,9 +11,6 @@ #include #include "mx6_common.h" -#ifdef CONFIG_SPL_BUILD -#include "imx6_spl.h" -#endif /* RAM */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 1823a793988..b0e49ad6df0 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -12,9 +12,6 @@ #include "mx6_common.h" -/* SPL */ -#include "imx6_spl.h" /* common IMX6 SPL configuration */ - /* Miscellaneous configurable options */ /* FEC ethernet */ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index a784002158b..1d51b87b68b 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -13,9 +13,6 @@ #include #include "mx6_common.h" -/* SPL options */ -#include "imx6_spl.h" - #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 69ca7c52753..f9f0825f6f8 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -9,8 +9,6 @@ #include "mx6_common.h" -#include "imx6_spl.h" - #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000) /* diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index bc90b9563ad..1db4d6c01b1 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -11,8 +11,6 @@ #include "mx6_common.h" -#include "imx6_spl.h" - /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index ad53f17d671..a6cefab5508 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -11,7 +11,6 @@ /* SPL */ #include "mx6_common.h" -#include "imx6_spl.h" #ifdef CONFIG_SERIAL_CONSOLE_UART1 #if defined(CONFIG_MX6SL) diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 8176566f3f6..3fdf829e968 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -8,10 +8,6 @@ #ifndef __MX6SABREAUTO_CONFIG_H #define __MX6SABREAUTO_CONFIG_H -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #define CONFIG_MXC_UART_BASE UART4_BASE #define CONSOLE_DEV "ttymxc3" diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 49cd1512dc5..0d06b6dc467 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -8,10 +8,6 @@ #ifndef __MX6SABRESD_CONFIG_H #define __MX6SABRESD_CONFIG_H -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #define CONFIG_MXC_UART_BASE UART1_BASE #define CONSOLE_DEV "ttymxc0" diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 26b97bd3f2e..ca1d077437b 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,10 +10,6 @@ #include "mx6_common.h" -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* MMC Configs */ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 83779f09bfc..c655671ee1b 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -12,10 +12,6 @@ #include "mx6_common.h" -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #define CONFIG_MXC_UART_BASE UART1_BASE #ifdef CONFIG_IMX_BOOTAUX diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index d0e3d3f0284..65f0a5c9966 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -15,9 +15,6 @@ #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) -/* SPL options */ -#include "imx6_spl.h" - #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index e18d16cc99c..273f938554d 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -10,9 +10,6 @@ #include #include "mx6_common.h" -/* SPL options */ -#include "imx6_spl.h" - #define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ diff --git a/include/configs/novena.h b/include/configs/novena.h index f2a04ca6185..9dc05d80ec2 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -34,9 +34,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* SPL */ -#include "imx6_spl.h" /* common IMX6 SPL configuration */ - /* I2C */ #define CONFIG_I2C_MULTI_BUS diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 2a528850829..ea407c9f6f1 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -10,9 +10,6 @@ #include #include "mx6_common.h" -/* SPL options */ -#include "imx6_spl.h" - #define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 3e551e13aa6..b3cdd2f1ebe 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -10,10 +10,6 @@ #include "mx6_common.h" -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - /* Miscellaneous configurable options */ #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index bc04c508218..6267dc729ab 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -11,9 +11,6 @@ #include #include "mx6_common.h" -/* SPL options */ -#include "imx6_spl.h" - /* * There is a bug in some i.MX6UL processors that results in the initial * portion of OCRAM being unavailable when booting from (at least) an SD diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index 817fabfb97c..e13b5df0fab 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -13,9 +13,6 @@ #include #include "mx6_common.h" -/* SPL options */ -#include "imx6_spl.h" - #define CFG_SYS_FSL_USDHC_NUM 2 /* Environment settings */ diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 01190904cf6..14cbfde28bf 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -6,10 +6,6 @@ #ifndef __PCM058_CONFIG_H #define __PCM058_CONFIG_H -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #include "mx6_common.h" #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 687133b9bdd..f95beeb214a 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -10,14 +10,6 @@ #include "mx6_common.h" -#include "imx6_spl.h" - -#ifdef CONFIG_SPL_OS_BOOT -/* Falcon Mode */ - -/* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#endif - #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index d4f58b6a7b0..85772ba6e83 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -12,13 +12,6 @@ #include #include "mx6_common.h" #include -#include "imx6_spl.h" - -#ifdef CONFIG_SPL_OS_BOOT -/* Falcon Mode */ - -/* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#endif /* Network support */ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 159bf4c68ca..b3a38d8a940 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -10,14 +10,6 @@ #include "mx7_common.h" -#include "imx7_spl.h" - -#ifdef CONFIG_SPL_OS_BOOT -/* Falcon Mode */ - -/* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#endif - #define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR /* MMC Config */ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index 49672dfe7c3..dcb88a3a730 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -13,10 +13,6 @@ #include "mx6_common.h" #include -/* SPL options */ -#include "imx6_spl.h" - - /* MMC Configs */ #ifdef CONFIG_FSL_USDHC #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 2c589158952..a65ebfb4dea 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -11,13 +11,6 @@ #include #include -/* SPL */ -/* #if defined(CONFIG_SPL_BUILD) */ -/* common IMX6 SPL configuration */ -#include "imx6_spl.h" - -/* #endif */ - /* place code in last 4 MiB of RAM */ #include "mx6_common.h" diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 8af5151c503..268c737e7eb 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -10,8 +10,6 @@ #include "mx6_common.h" -#include "imx6_spl.h" - #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configuration */ diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 093e2e8dae7..147224806fc 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -12,8 +12,6 @@ #include "mx6_common.h" -#include "imx6_spl.h" - /* MMC Configuration */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index a4484fd3f8c..a0846b3f7c9 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -10,10 +10,6 @@ #include "mx6_common.h" -#ifdef CONFIG_SPL -#include "imx6_spl.h" -#endif - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 91c1f4b3b51..b4c757fd921 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -10,8 +10,6 @@ #include "mx6_common.h" -#include "imx6_spl.h" - #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index fc8ec3204b1..7d0402feead 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -10,9 +10,6 @@ #include "mx6_common.h" #include -/* SPL options */ -#include "imx6_spl.h" - #define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR /* MMC Configs */ -- cgit v1.2.3 From aa6e94deabb45154cea07ad44c4a5c047bca078b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:37 -0500 Subject: global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/10m50_devboard.h | 4 ++-- include/configs/3c120_devboard.h | 4 ++-- include/configs/M5208EVBE.h | 22 +++++++++---------- include/configs/M5235EVB.h | 12 +++++------ include/configs/M5249EVB.h | 12 +++++------ include/configs/M5253DEMO.h | 12 +++++------ include/configs/M5272C3.h | 12 +++++------ include/configs/M5275EVB.h | 12 +++++------ include/configs/M5282EVB.h | 12 +++++------ include/configs/M53017EVB.h | 22 +++++++++---------- include/configs/M5329EVB.h | 22 +++++++++---------- include/configs/M5373EVB.h | 22 +++++++++---------- include/configs/MCR3000.h | 4 ++-- include/configs/MPC837XERDB.h | 4 ++-- include/configs/MPC8548CDS.h | 2 +- include/configs/P1010RDB.h | 4 ++-- include/configs/P2041RDB.h | 4 ++-- include/configs/SBx81LIFKW.h | 2 +- include/configs/SBx81LIFXCAT.h | 2 +- include/configs/T102xRDB.h | 6 +++--- include/configs/T104xRDB.h | 4 ++-- include/configs/T208xQDS.h | 4 ++-- include/configs/T208xRDB.h | 4 ++-- include/configs/T4240RDB.h | 4 ++-- include/configs/am62x_evm.h | 2 +- include/configs/am64x_evm.h | 2 +- include/configs/am65x_evm.h | 2 +- include/configs/amcore.h | 4 ++-- include/configs/ap121.h | 2 +- include/configs/ap143.h | 2 +- include/configs/ap152.h | 2 +- include/configs/apalis-imx8.h | 2 +- include/configs/apalis_imx6.h | 2 +- include/configs/arbel.h | 4 ++-- include/configs/aristainetos2.h | 2 +- include/configs/aspeed-common.h | 2 +- include/configs/astro_mcf5373l.h | 12 +++++------ include/configs/at91sam9260ek.h | 4 ++-- include/configs/at91sam9261ek.h | 4 ++-- include/configs/at91sam9263ek.h | 28 ++++++++++++------------- include/configs/at91sam9m10g45ek.h | 4 ++-- include/configs/at91sam9n12ek.h | 4 ++-- include/configs/at91sam9rlek.h | 4 ++-- include/configs/at91sam9x5ek.h | 4 ++-- include/configs/ax25-ae350.h | 2 +- include/configs/axs10x.h | 4 ++-- include/configs/bcm947622.h | 2 +- include/configs/bcm94908.h | 2 +- include/configs/bcm94912.h | 2 +- include/configs/bcm963138.h | 2 +- include/configs/bcm963146.h | 2 +- include/configs/bcm963148.h | 2 +- include/configs/bcm963158.h | 2 +- include/configs/bcm963178.h | 2 +- include/configs/bcm96756.h | 2 +- include/configs/bcm96813.h | 2 +- include/configs/bcm96846.h | 2 +- include/configs/bcm96855.h | 2 +- include/configs/bcm96856.h | 2 +- include/configs/bcm96858.h | 2 +- include/configs/bcm96878.h | 2 +- include/configs/bcm_ns3.h | 2 +- include/configs/bcmstb.h | 2 +- include/configs/bitmain_antminer_s9.h | 4 ++-- include/configs/bk4r1.h | 2 +- include/configs/bmips_bcm3380.h | 2 +- include/configs/bmips_bcm6318.h | 2 +- include/configs/bmips_bcm63268.h | 2 +- include/configs/bmips_bcm6328.h | 2 +- include/configs/bmips_bcm6338.h | 2 +- include/configs/bmips_bcm6348.h | 2 +- include/configs/bmips_bcm6358.h | 2 +- include/configs/bmips_bcm6362.h | 2 +- include/configs/bmips_bcm6368.h | 2 +- include/configs/bmips_bcm6838.h | 2 +- include/configs/boston.h | 4 ++-- include/configs/brppt2.h | 2 +- include/configs/bur_am335x_common.h | 2 +- include/configs/capricorn-common.h | 2 +- include/configs/cgtqmx8.h | 2 +- include/configs/ci20.h | 2 +- include/configs/cl-som-imx7.h | 2 +- include/configs/cm_fx6.h | 2 +- include/configs/cobra5272.h | 12 +++++------ include/configs/colibri-imx6ull.h | 2 +- include/configs/colibri-imx8x.h | 2 +- include/configs/colibri_imx6.h | 2 +- include/configs/colibri_imx7.h | 2 +- include/configs/colibri_vf.h | 2 +- include/configs/corstone1000.h | 2 +- include/configs/corvus.h | 4 ++-- include/configs/da850evm.h | 2 +- include/configs/dart_6ul.h | 2 +- include/configs/devkit3250.h | 4 ++-- include/configs/dh_imx6.h | 2 +- include/configs/display5.h | 2 +- include/configs/dragonboard410c.h | 2 +- include/configs/dragonboard820c.h | 2 +- include/configs/durian.h | 2 +- include/configs/ea-lpc3250devkitv2.h | 2 +- include/configs/eb_cpu5282.h | 14 ++++++------- include/configs/el6x_common.h | 2 +- include/configs/embestmx6boards.h | 2 +- include/configs/emsdp.h | 4 ++-- include/configs/espresso7420.h | 2 +- include/configs/ethernut5.h | 4 ++-- include/configs/exynos5-common.h | 16 +++++++------- include/configs/exynos5250-common.h | 2 +- include/configs/exynos7420-common.h | 16 +++++++------- include/configs/exynos78x0-common.h | 26 +++++++++++------------ include/configs/gardena-smart-gateway-at91sam.h | 4 ++-- include/configs/gardena-smart-gateway-mt7688.h | 2 +- include/configs/gazerbeam.h | 6 +++--- include/configs/ge_b1x5v2.h | 2 +- include/configs/ge_bx50v3.h | 2 +- include/configs/grpeach.h | 4 ++-- include/configs/gw_ventana.h | 2 +- include/configs/gxp.h | 2 +- include/configs/highbank.h | 2 +- include/configs/hikey.h | 2 +- include/configs/hikey960.h | 2 +- include/configs/hsdk-4xd.h | 4 ++-- include/configs/hsdk.h | 4 ++-- include/configs/imgtec_xilfpga.h | 4 ++-- include/configs/imx27lite-common.h | 2 +- include/configs/imx6-engicam.h | 2 +- include/configs/imx6_logic.h | 2 +- include/configs/imx6dl-mamoj.h | 2 +- include/configs/imx6q-bosch-acc.h | 2 +- include/configs/imx6ulz_smm_m2.h | 2 +- include/configs/imx7-cm.h | 2 +- include/configs/imx8mm-cl-iot-gate.h | 2 +- include/configs/imx8mm_beacon.h | 2 +- include/configs/imx8mm_data_modul_edm_sbc.h | 2 +- include/configs/imx8mm_evk.h | 2 +- include/configs/imx8mm_icore_mx8mm.h | 2 +- include/configs/imx8mm_venice.h | 2 +- include/configs/imx8mn_beacon.h | 2 +- include/configs/imx8mn_bsh_smm_s2_common.h | 2 +- include/configs/imx8mn_evk.h | 2 +- include/configs/imx8mn_var_som.h | 2 +- include/configs/imx8mn_venice.h | 2 +- include/configs/imx8mp_dhcom_pdk2.h | 2 +- include/configs/imx8mp_evk.h | 2 +- include/configs/imx8mp_icore_mx8mp.h | 2 +- include/configs/imx8mp_rsb3720.h | 2 +- include/configs/imx8mp_venice.h | 2 +- include/configs/imx8mq_cm.h | 2 +- include/configs/imx8mq_evk.h | 2 +- include/configs/imx8mq_phanbell.h | 2 +- include/configs/imx8qm_mek.h | 2 +- include/configs/imx8qm_rom7720.h | 2 +- include/configs/imx8qxp_mek.h | 2 +- include/configs/imx8ulp_evk.h | 2 +- include/configs/imx93_evk.h | 2 +- include/configs/integrator-common.h | 2 +- include/configs/iot_devkit.h | 14 ++++++------- include/configs/j721e_evm.h | 2 +- include/configs/j721s2_evm.h | 2 +- include/configs/km/km-mpc83xx.h | 4 ++-- include/configs/km/pg-wcom-ls102xa.h | 2 +- include/configs/kmcent2.h | 4 ++-- include/configs/kontron-sl-mx6ul.h | 2 +- include/configs/kontron-sl-mx8mm.h | 2 +- include/configs/kontron_pitx_imx8m.h | 2 +- include/configs/kontron_sl28.h | 2 +- include/configs/kp_imx53.h | 2 +- include/configs/kp_imx6q_tpc.h | 2 +- include/configs/legoev3.h | 2 +- include/configs/librem5.h | 2 +- include/configs/linkit-smart-7688.h | 2 +- include/configs/liteboard.h | 2 +- include/configs/ls1012a2g5rdb.h | 2 +- include/configs/ls1012a_common.h | 2 +- include/configs/ls1012afrdm.h | 2 +- include/configs/ls1012aqds.h | 2 +- include/configs/ls1012ardb.h | 2 +- include/configs/ls1021aiot.h | 2 +- include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atsn.h | 2 +- include/configs/ls1021atwr.h | 2 +- include/configs/ls1028a_common.h | 2 +- include/configs/ls1043a_common.h | 2 +- include/configs/ls1046a_common.h | 2 +- include/configs/ls1088a_common.h | 2 +- include/configs/ls2080a_common.h | 2 +- include/configs/lx2160a_common.h | 4 ++-- include/configs/m53menlo.h | 2 +- include/configs/malta.h | 6 +++--- include/configs/maxbcm.h | 2 +- include/configs/mccmon6.h | 2 +- include/configs/meerkat96.h | 2 +- include/configs/meesc.h | 4 ++-- include/configs/meson64.h | 2 +- include/configs/microchip_mpfs_icicle.h | 2 +- include/configs/msc_sm2s_imx8mp.h | 2 +- include/configs/mt7620.h | 2 +- include/configs/mt7621.h | 2 +- include/configs/mt7622.h | 2 +- include/configs/mt7623.h | 2 +- include/configs/mt7628.h | 2 +- include/configs/mt7629.h | 2 +- include/configs/mt7981.h | 2 +- include/configs/mt7986.h | 2 +- include/configs/mt8518.h | 4 ++-- include/configs/mv-common.h | 2 +- include/configs/mvebu_alleycat-5.h | 2 +- include/configs/mvebu_armada-37xx.h | 2 +- include/configs/mvebu_armada-8k.h | 2 +- include/configs/mx23_olinuxino.h | 2 +- include/configs/mx23evk.h | 2 +- include/configs/mx28evk.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53cx9020.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/mx53ppd.h | 2 +- include/configs/mx6cuboxi.h | 2 +- include/configs/mx6memcal.h | 2 +- include/configs/mx6sabre_common.h | 2 +- include/configs/mx6slevk.h | 2 +- include/configs/mx6sllevk.h | 2 +- include/configs/mx6sxsabreauto.h | 2 +- include/configs/mx6sxsabresd.h | 2 +- include/configs/mx6ul_14x14_evk.h | 2 +- include/configs/mx6ullevk.h | 2 +- include/configs/mx7dsabresd.h | 2 +- include/configs/mx7ulp_com.h | 2 +- include/configs/mx7ulp_evk.h | 2 +- include/configs/mys_6ulx.h | 2 +- include/configs/nitrogen6x.h | 2 +- include/configs/nokia_rx51.h | 4 ++-- include/configs/novena.h | 2 +- include/configs/npi_imx6ull.h | 2 +- include/configs/nsim.h | 4 ++-- include/configs/o4-imx6ull-nano.h | 2 +- include/configs/octeon_common.h | 2 +- include/configs/octeontx2_common.h | 2 +- include/configs/octeontx_common.h | 2 +- include/configs/odroid.h | 4 ++-- include/configs/odroid_xu3.h | 2 +- include/configs/omapl138_lcdk.h | 2 +- include/configs/openpiton-riscv64.h | 2 +- include/configs/opos6uldev.h | 2 +- include/configs/origen.h | 4 ++-- include/configs/owl-common.h | 2 +- include/configs/p1_p2_rdb_pc.h | 8 +++---- include/configs/pcl063.h | 2 +- include/configs/pcl063_ull.h | 2 +- include/configs/pcm052.h | 2 +- include/configs/pcm058.h | 2 +- include/configs/peach-pi.h | 2 +- include/configs/peach-pit.h | 2 +- include/configs/phycore_imx8mm.h | 2 +- include/configs/phycore_imx8mp.h | 2 +- include/configs/pic32mzdask.h | 2 +- include/configs/pico-imx6.h | 2 +- include/configs/pico-imx6ul.h | 2 +- include/configs/pico-imx7d.h | 2 +- include/configs/pico-imx8mq.h | 2 +- include/configs/pm9261.h | 26 +++++++++++------------ include/configs/pm9263.h | 26 +++++++++++------------ include/configs/pm9g45.h | 4 ++-- include/configs/poleg.h | 2 +- include/configs/pomelo.h | 2 +- include/configs/presidio_asic.h | 2 +- include/configs/px30_common.h | 2 +- include/configs/qemu-arm.h | 2 +- include/configs/qemu-ppce500.h | 2 +- include/configs/qemu-riscv.h | 2 +- include/configs/r2dplus.h | 4 ++-- include/configs/rcar-gen2-common.h | 4 ++-- include/configs/rcar-gen3-common.h | 4 ++-- include/configs/rk3036_common.h | 2 +- include/configs/rk3066_common.h | 2 +- include/configs/rk3128_common.h | 2 +- include/configs/rk3188_common.h | 2 +- include/configs/rk322x_common.h | 2 +- include/configs/rk3288_common.h | 2 +- include/configs/rk3308_common.h | 2 +- include/configs/rk3328_common.h | 2 +- include/configs/rk3368_common.h | 2 +- include/configs/rk3399_common.h | 2 +- include/configs/rk3568_common.h | 2 +- include/configs/rpi.h | 4 ++-- include/configs/rv1108_common.h | 2 +- include/configs/s5p4418_nanopi2.h | 4 ++-- include/configs/s5p_goni.h | 4 ++-- include/configs/s5pc210_universal.h | 4 ++-- include/configs/sam9x60_curiosity.h | 4 ++-- include/configs/sam9x60ek.h | 4 ++-- include/configs/sama5d27_wlsom1_ek.h | 4 ++-- include/configs/sama5d2_icp.h | 4 ++-- include/configs/sama5d2_ptc_ek.h | 4 ++-- include/configs/sama5d3_xplained.h | 4 ++-- include/configs/sama5d3xek.h | 4 ++-- include/configs/sama5d4_xplained.h | 4 ++-- include/configs/sama5d4ek.h | 4 ++-- include/configs/sama7g5ek.h | 4 ++-- include/configs/sandbox.h | 4 ++-- include/configs/siemens-am33x-common.h | 2 +- include/configs/sifive-unleashed.h | 2 +- include/configs/sifive-unmatched.h | 2 +- include/configs/sipeed-maix.h | 4 ++-- include/configs/smartweb.h | 4 ++-- include/configs/smdk5420.h | 2 +- include/configs/smdkc100.h | 4 ++-- include/configs/smdkv310.h | 10 ++++----- include/configs/smegw01.h | 2 +- include/configs/snapper9g45.h | 4 ++-- include/configs/sniper.h | 2 +- include/configs/socfpga_common.h | 2 +- include/configs/socfpga_soc64_common.h | 2 +- include/configs/socrates.h | 4 ++-- include/configs/somlabs_visionsom_6ull.h | 2 +- include/configs/stih410-b2260.h | 2 +- include/configs/stm32mp13_common.h | 2 +- include/configs/stm32mp15_common.h | 2 +- include/configs/stmark2.h | 14 ++++++------- include/configs/stv0991.h | 2 +- include/configs/sunxi-common.h | 8 +++---- include/configs/synquacer.h | 2 +- include/configs/taurus.h | 4 ++-- include/configs/tb100.h | 4 ++-- include/configs/tbs2910.h | 2 +- include/configs/tegra-common.h | 2 +- include/configs/theadorable.h | 2 +- include/configs/thunderx_88xx.h | 4 ++-- include/configs/ti814x_evm.h | 2 +- include/configs/ti816x_evm.h | 2 +- include/configs/ti_armv7_common.h | 2 +- include/configs/total_compute.h | 2 +- include/configs/tplink_wdr4300.h | 2 +- include/configs/tqma6.h | 2 +- include/configs/trats.h | 4 ++-- include/configs/trats2.h | 4 ++-- include/configs/turris_mox.h | 2 +- include/configs/udoo.h | 2 +- include/configs/udoo_neo.h | 2 +- include/configs/usb_a9263.h | 4 ++-- include/configs/usbarmory.h | 2 +- include/configs/vcoreiii.h | 8 +++---- include/configs/verdin-imx8mm.h | 2 +- include/configs/verdin-imx8mp.h | 2 +- include/configs/vexpress_aemv8.h | 2 +- include/configs/vexpress_common.h | 2 +- include/configs/vf610twr.h | 2 +- include/configs/vinco.h | 4 ++-- include/configs/vining_2000.h | 2 +- include/configs/vocore2.h | 2 +- include/configs/wandboard.h | 2 +- include/configs/warp7.h | 2 +- include/configs/work_92105.h | 4 ++-- include/configs/xea.h | 2 +- include/configs/xenguest_arm64.h | 2 +- include/configs/xilinx_zynqmp_mini_nand.h | 4 ++-- include/configs/xpress.h | 2 +- include/configs/xtfpga.h | 10 ++++----- include/init.h | 4 ++-- include/system-constants.h | 2 +- 359 files changed, 616 insertions(+), 616 deletions(-) (limited to 'include') diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 719caf7b0c3..3a4fbc6eab8 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -30,8 +30,8 @@ * -The heap is placed below the monitor * -The stack is placed below the heap (&grows down). */ -#define CONFIG_SYS_SDRAM_BASE 0xc8000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0xc8000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_MONITOR_IS_IN_RAM #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index ad7bd133200..ab889180eed 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -26,8 +26,8 @@ * -The heap is placed below the monitor * -The stack is placed below the heap (&grows down). */ -#define CONFIG_SYS_SDRAM_BASE 0xD0000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0xD0000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_MONITOR_IS_IN_RAM #endif /* __CONFIG_H */ diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 25c3f22bea1..6dfa3dd0f02 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -60,22 +60,22 @@ /* * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x43711630 -#define CONFIG_SYS_SDRAM_CFG2 0x56670000 -#define CONFIG_SYS_SDRAM_CTRL 0xE1002000 -#define CONFIG_SYS_SDRAM_EMOD 0x80010000 -#define CONFIG_SYS_SDRAM_MODE 0x00CD0000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_CFG1 0x43711630 +#define CFG_SYS_SDRAM_CFG2 0x56670000 +#define CFG_SYS_SDRAM_CTRL 0xE1002000 +#define CFG_SYS_SDRAM_EMOD 0x80010000 +#define CFG_SYS_SDRAM_MODE 0x00CD0000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI @@ -100,8 +100,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index f200d706a92..e28662c6e59 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -70,10 +70,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ /* * For booting Linux, the board info and command line data @@ -81,7 +81,7 @@ * the maximum mapped by the Linux kernel during initialization ?? */ /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -109,8 +109,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DCM | \ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 9ff66d751c6..f1da278d515 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -52,10 +52,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) #if 0 /* test-only */ @@ -67,7 +67,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -90,8 +90,8 @@ #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ CF_ADDRMASK(2) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ACR1 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR1 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ CF_CACR_DBWE) diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index f7bfe598a80..bd3c57d1438 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -77,17 +77,17 @@ /* * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) @@ -117,8 +117,8 @@ #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ CF_ADDRMASK(8) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ACR1 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR1 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ CF_CACR_DBWE) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index dcd83650f22..7c3bc032bfe 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -71,10 +71,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE 0xffe00000 /* @@ -82,7 +82,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* * FLASH organization @@ -100,8 +100,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 9012794501a..4eb4abea725 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -73,10 +73,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE /* @@ -84,7 +84,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -101,8 +101,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 925d26eaf10..eda394467e9 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -72,10 +72,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE #define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 @@ -85,7 +85,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -105,8 +105,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DBWE | \ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 79a4e6171d2..159993a46bc 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -74,22 +74,22 @@ /* * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x43711630 -#define CONFIG_SYS_SDRAM_CFG2 0x56670000 -#define CONFIG_SYS_SDRAM_CTRL 0xE1092000 -#define CONFIG_SYS_SDRAM_EMOD 0x80010000 -#define CONFIG_SYS_SDRAM_MODE 0x00CD0000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_CFG1 0x43711630 +#define CFG_SYS_SDRAM_CFG2 0x56670000 +#define CFG_SYS_SDRAM_CTRL 0xE1092000 +#define CFG_SYS_SDRAM_EMOD 0x80010000 +#define CFG_SYS_SDRAM_MODE 0x00CD0000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -118,8 +118,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index fc21af56ec7..d7ece639349 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -68,22 +68,22 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x53722730 -#define CONFIG_SYS_SDRAM_CFG2 0x56670000 -#define CONFIG_SYS_SDRAM_CTRL 0xE1092000 -#define CONFIG_SYS_SDRAM_EMOD 0x40010000 -#define CONFIG_SYS_SDRAM_MODE 0x018D0000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_CFG1 0x53722730 +#define CFG_SYS_SDRAM_CFG2 0x56670000 +#define CFG_SYS_SDRAM_CTRL 0xE1092000 +#define CFG_SYS_SDRAM_EMOD 0x40010000 +#define CFG_SYS_SDRAM_MODE 0x018D0000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -117,8 +117,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index f7c09a2333c..b2fc6923e0d 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -70,22 +70,22 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x53722730 -#define CONFIG_SYS_SDRAM_CFG2 0x56670000 -#define CONFIG_SYS_SDRAM_CTRL 0xE1092000 -#define CONFIG_SYS_SDRAM_EMOD 0x40010000 -#define CONFIG_SYS_SDRAM_MODE 0x018D0000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_CFG1 0x53722730 +#define CFG_SYS_SDRAM_CFG2 0x56670000 +#define CFG_SYS_SDRAM_CTRL 0xE1092000 +#define CFG_SYS_SDRAM_EMOD 0x40010000 +#define CFG_SYS_SDRAM_MODE 0x018D0000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -117,8 +117,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index a5518d3d50f..2e7140cd86a 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -62,8 +62,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800) #define CONFIG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800) -/* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +/* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */ +#define CFG_SYS_SDRAM_BASE 0x00000000 /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE CONFIG_TEXT_BASE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 0e70b2853b2..d9627e393d9 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -59,7 +59,7 @@ /* * DDR Setup */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ +#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x03000000 #define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN) @@ -69,7 +69,7 @@ /* * Manually set up DDR parameters */ -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ #define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f #define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ | CSCONFIG_ODT_WR_ONLY_CURRENT \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index c59a37646f4..6a51149a949 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -40,7 +40,7 @@ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index f87e7597ad0..21491b9f97c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -110,9 +110,9 @@ #ifndef __ASSEMBLY__ extern unsigned long get_sdram_size(void); #endif -#define CONFIG_SYS_SDRAM_SIZE get_sdram_size() /* DDR size */ +#define CFG_SYS_SDRAM_SIZE get_sdram_size() /* DDR size */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8c7b877bfb9..d7e06d23ec4 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -69,10 +69,10 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x52 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ /* * Local Bus Definitions diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index 824190a4123..417b9ae7b24 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -7,7 +7,7 @@ #define _CONFIG_SBX81LIFKW_H /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* * NS16550 Configuration diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index e67da1fe1dc..87b68227a0d 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -7,7 +7,7 @@ #define _CONFIG_SBX81LIFXCAT_H /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* * NS16550 Configuration diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 154b2f174af..616387f4876 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -116,12 +116,12 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #if defined(CONFIG_TARGET_T1024RDB) #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ #elif defined(CONFIG_TARGET_T1023RDB) -#define CONFIG_SYS_SDRAM_SIZE 2048 +#define CFG_SYS_SDRAM_SIZE 2048 #endif /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 847cf65b409..37dfe32e21b 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -88,11 +88,11 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ /* * IFC Definitions diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index b49c2647768..8f56de40ce8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -86,8 +86,8 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index aae41a33925..e9db4a224f9 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -81,8 +81,8 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 9dc45e397f9..cc86c9d4a51 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -62,7 +62,7 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* * IFC Definitions @@ -154,7 +154,7 @@ #define SPD_EEPROM_ADDRESS2 0x54 #define SPD_EEPROM_ADDRESS3 0x56 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ /* * IFC Definitions diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h index 78201adc07f..57f3f37908d 100644 --- a/include/configs/am62x_evm.h +++ b/include/configs/am62x_evm.h @@ -13,7 +13,7 @@ #include /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 #define PARTS_DEFAULT \ /* Linux partitions */ \ diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index 140940730d0..25c71f00a20 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -16,7 +16,7 @@ #include /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 #define PARTS_DEFAULT \ /* Linux partitions */ \ diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 0345160787e..0307426e4ab 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -15,7 +15,7 @@ #include /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 #define PARTS_DEFAULT \ /* Linux partitions */ \ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index 2bda66fe033..eba78d3894c 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -33,8 +33,8 @@ /* size of internal SRAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 0x1000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 0x1000000 #define CONFIG_SYS_FLASH_BASE 0xffc00000 /* amcore design has flash data bytes wired swapped */ diff --git a/include/configs/ap121.h b/include/configs/ap121.h index 650140bb724..63c7dfc1feb 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 diff --git a/include/configs/ap143.h b/include/configs/ap143.h index 3114cf0c4fb..865aad2a3f9 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 diff --git a/include/configs/ap152.h b/include/configs/ap152.h index f0674456fd0..0464a69e823 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index e2e491bdb0a..cf23837863b 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -63,7 +63,7 @@ /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ #define CFG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 30d32d27e3d..356d4c35ee2 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -106,7 +106,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/arbel.h b/include/configs/arbel.h index f7deba4f566..ed32e772f8e 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -6,9 +6,9 @@ #ifndef __CONFIG_ARBEL_H #define __CONFIG_ARBEL_H -#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_SDRAM_BASE 0x0 #define CONFIG_SYS_BOOTMAPSZ (20 << 20) -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Default environemnt variables */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 35e8840a92a..90cf4705f4f 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -406,7 +406,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 5c9005805e1..cbd0d6cea01 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -14,7 +14,7 @@ /* Misc CPU related */ -#define CONFIG_SYS_SDRAM_BASE ASPEED_DRAM_BASE +#define CFG_SYS_SDRAM_BASE ASPEED_DRAM_BASE #ifdef CONFIG_PRE_CON_BUF_SZ #define CONFIG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE + CONFIG_PRE_CON_BUF_SZ) diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 58635df149b..b142ea3c335 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -57,7 +57,7 @@ #define CONFIG_SYS_CLK 80000000 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) -#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ /* * Define baudrate for UART1 (console output, tftp, ...) @@ -158,7 +158,7 @@ * (Set up by the startup code) * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* * Chipselect bank definitions @@ -195,8 +195,8 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ - (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ + (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ @@ -213,8 +213,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 574bfe37e9a..0d76f419db5 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -31,8 +31,8 @@ * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #ifdef CONFIG_AT91SAM9XE diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 2c785ad4264..dcc1cca4791 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -17,8 +17,8 @@ #include /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index bba8574b1c8..aefa9fc60c4 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -23,8 +23,8 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 @@ -100,22 +100,22 @@ /* Memory Device Register -> SDRAM */ #define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM #define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE -#define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH -#define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR -#define CONFIG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL -#define CONFIG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ -#define CONFIG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ #define CONFIG_SYS_SMC0_SETUP0_VAL \ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 3ce264a4a90..08cfee1a4e1 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -15,8 +15,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x70000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0x70000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 5e3ded241fa..76f87c16192 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -14,8 +14,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ /* Misc CPU related */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* DataFlash */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index b79c8ba5bf8..e1111b6dd38 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -17,8 +17,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 40ea4ed49e8..eb1d1ad60d1 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -20,8 +20,8 @@ */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ /* DataFlash */ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index e3b6956eb5a..83ac87b10a5 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -28,7 +28,7 @@ (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_0 /* * Serial console configuration diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 1932713f453..6d82712186d 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -20,8 +20,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_512M +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_512M /* * UART configuration diff --git a/include/configs/bcm947622.h b/include/configs/bcm947622.h index d0c46a2c823..b02ed1bfe0e 100644 --- a/include/configs/bcm947622.h +++ b/include/configs/bcm947622.h @@ -6,7 +6,7 @@ #ifndef __BCM947622_H #define __BCM947622_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define COUNTER_FREQUENCY 50000000 #endif diff --git a/include/configs/bcm94908.h b/include/configs/bcm94908.h index 1346ace4bf6..246feb66b29 100644 --- a/include/configs/bcm94908.h +++ b/include/configs/bcm94908.h @@ -6,6 +6,6 @@ #ifndef __BCM94908_H #define __BCM94908_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm94912.h b/include/configs/bcm94912.h index f3d17ddaacf..c428b1ab578 100644 --- a/include/configs/bcm94912.h +++ b/include/configs/bcm94912.h @@ -6,6 +6,6 @@ #ifndef __BCM94912_H #define __BCM94912_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm963138.h b/include/configs/bcm963138.h index 361569a8c5f..f1b68ba6733 100644 --- a/include/configs/bcm963138.h +++ b/include/configs/bcm963138.h @@ -6,7 +6,7 @@ #ifndef __BCM963138_H #define __BCM963138_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_HZ_CLOCK 500000000 #endif diff --git a/include/configs/bcm963146.h b/include/configs/bcm963146.h index edbdfc3c51a..90dfa98311d 100644 --- a/include/configs/bcm963146.h +++ b/include/configs/bcm963146.h @@ -6,6 +6,6 @@ #ifndef __BCM963146_H #define __BCM963146_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm963148.h b/include/configs/bcm963148.h index 5a24cccba10..54f6750c743 100644 --- a/include/configs/bcm963148.h +++ b/include/configs/bcm963148.h @@ -6,6 +6,6 @@ #ifndef __BCM963148_H #define __BCM963148_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm963158.h b/include/configs/bcm963158.h index b15c4111c96..2fdd22d1b0d 100644 --- a/include/configs/bcm963158.h +++ b/include/configs/bcm963158.h @@ -6,6 +6,6 @@ #ifndef __BCM963158_H #define __BCM963158_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm963178.h b/include/configs/bcm963178.h index b25f6a12819..32fc4a5e390 100644 --- a/include/configs/bcm963178.h +++ b/include/configs/bcm963178.h @@ -6,6 +6,6 @@ #ifndef __BCM963178_H #define __BCM963178_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96756.h b/include/configs/bcm96756.h index c8f32672b7d..c69d177da2e 100644 --- a/include/configs/bcm96756.h +++ b/include/configs/bcm96756.h @@ -6,6 +6,6 @@ #ifndef __BCM96756_H #define __BCM96756_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96813.h b/include/configs/bcm96813.h index 5d9e87b693a..37d2d91d96f 100644 --- a/include/configs/bcm96813.h +++ b/include/configs/bcm96813.h @@ -6,6 +6,6 @@ #ifndef __BCM96813_H #define __BCM96813_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96846.h b/include/configs/bcm96846.h index 1d6d5d61669..581fd559856 100644 --- a/include/configs/bcm96846.h +++ b/include/configs/bcm96846.h @@ -6,6 +6,6 @@ #ifndef __BCM96846_H #define __BCM96846_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96855.h b/include/configs/bcm96855.h index 6e420f2c66f..3fb1ab9230c 100644 --- a/include/configs/bcm96855.h +++ b/include/configs/bcm96855.h @@ -6,6 +6,6 @@ #ifndef __BCM96855_H #define __BCM96855_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96856.h b/include/configs/bcm96856.h index a7ae71eeaaf..5f5af321897 100644 --- a/include/configs/bcm96856.h +++ b/include/configs/bcm96856.h @@ -6,6 +6,6 @@ #ifndef __BCM96856_H #define __BCM96856_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96858.h b/include/configs/bcm96858.h index 4e584b41fb3..9a0d89a7519 100644 --- a/include/configs/bcm96858.h +++ b/include/configs/bcm96858.h @@ -6,6 +6,6 @@ #ifndef __BCM96858_H #define __BCM96858_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96878.h b/include/configs/bcm96878.h index 3e23e94ac4b..7702d1f5682 100644 --- a/include/configs/bcm96878.h +++ b/include/configs/bcm96878.h @@ -6,6 +6,6 @@ #ifndef __BCM96878_H #define __BCM96878_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 76189a4d31f..b5469880fe2 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -15,7 +15,7 @@ #define V2M_BASE 0x80000000 #define PHYS_SDRAM_1 V2M_BASE -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* * Initial SP before reloaction is placed at end of first DRAM bank, diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 9f51b9ca59d..9769a714092 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -81,7 +81,7 @@ extern phys_addr_t prior_stage_fdt_address; * MiB. However, BOLT can be configured to allow loading larger * initramfs images, in which case this limitation is eliminated. */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 /* diff --git a/include/configs/bitmain_antminer_s9.h b/include/configs/bitmain_antminer_s9.h index 829e816ad66..556bfa08ebb 100644 --- a/include/configs/bitmain_antminer_s9.h +++ b/include/configs/bitmain_antminer_s9.h @@ -6,8 +6,8 @@ #ifndef __CONFIG_BITMAIN_ANTMINER_S9_H #define __CONFIG_BITMAIN_ANTMINER_S9_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_EXTRA_ENV_SETTINGS \ "pxefile_addr_r=0x2000000\0" \ diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index ca2bc1907e3..a075a5b2f32 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -199,7 +199,7 @@ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (SZ_512M) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h index c328f414201..e40f110cac6 100644 --- a/include/configs/bmips_bcm3380.h +++ b/include/configs/bmips_bcm3380.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index d16d50e5ec2..508317f231e 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h index f69c46b11c4..c5bda16d2bc 100644 --- a/include/configs/bmips_bcm63268.h +++ b/include/configs/bmips_bcm63268.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h index acd021ecadc..32397c26e8a 100644 --- a/include/configs/bmips_bcm6328.h +++ b/include/configs/bmips_bcm6328.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h index fa9e5f02a08..18c99727a04 100644 --- a/include/configs/bmips_bcm6338.h +++ b/include/configs/bmips_bcm6338.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index bcf5c874d32..f8d7148d497 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index e31b8bc719e..d564a32ee52 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h index 6e707d341b7..f982a4363db 100644 --- a/include/configs/bmips_bcm6362.h +++ b/include/configs/bmips_bcm6362.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index bb72c8cb533..11d623c28b2 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6838.h b/include/configs/bmips_bcm6838.h index a1c992b7a6e..30965c85bfa 100644 --- a/include/configs/bmips_bcm6838.h +++ b/include/configs/bmips_bcm6838.h @@ -9,7 +9,7 @@ #include /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/boston.h b/include/configs/boston.h index a09e831c540..0033a7fb022 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -22,9 +22,9 @@ * Memory map */ #ifdef CONFIG_64BIT -# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 +# define CFG_SYS_SDRAM_BASE 0xffffffff80000000 #else -# define CONFIG_SYS_SDRAM_BASE 0x80000000 +# define CFG_SYS_SDRAM_BASE 0x80000000 #endif #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index bdedf7ea2d7..78b2000aa2e 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -76,7 +76,7 @@ BUR_COMMON_ENV \ /* RAM */ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 1bf6baf75c2..f1734aaca7f 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -45,7 +45,7 @@ * always, even when we have more. We always start at 0x80000000, * and we place the initial stack pointer in our SRAM. */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* * Our platforms make use of SPL to initalize the hardware (primarily diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index c4110f84c0b..474ad69d996 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -92,7 +92,7 @@ /* On CCP board, USDHC1 is for eMMC */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 /* DDR3 board total DDR is 1 GB */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index c395384c8d3..6f2b8245b98 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -111,7 +111,7 @@ #define CFG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index b7511adc09a..f268dfd0943 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -11,7 +11,7 @@ /* Memory configuration */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ +#define CFG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 /* NS16550-ish UARTs */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index fc45e597f6d..eb899c45578 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -82,7 +82,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 25443629e20..47c4aacc436 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -21,7 +21,7 @@ /* RAM */ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 52000b58b73..65b9074cd9c 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -30,7 +30,7 @@ */ #define CONFIG_SYS_CLK 66000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ /* --- * Define baudrate for UART1 (console output, tftp, ...) @@ -152,9 +152,9 @@ enter a valid image address in flash */ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* *------------------------------------------------------------------------- @@ -162,7 +162,7 @@ enter a valid image address in flash */ *----------------------------------------------------------------------- */ -/* #define CONFIG_SYS_SDRAM_SIZE 16 */ +/* #define CFG_SYS_SDRAM_SIZE 16 */ /* *----------------------------------------------------------------------- @@ -186,8 +186,8 @@ enter a valid image address in flash */ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index afe8badd650..ca8445a3d05 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -116,7 +116,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index d641fbf47e7..6002d8d5c9f 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -96,7 +96,7 @@ /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CFG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 68d923c1ae1..14278e9ca4f 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -100,7 +100,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index f9bf849ae98..c08095561d8 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -160,7 +160,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 0f6f99d244f..11283071397 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -85,7 +85,7 @@ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (256 * SZ_1M) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h index 8e0230c135e..8aec52d508e 100644 --- a/include/configs/corstone1000.h +++ b/include/configs/corstone1000.h @@ -22,7 +22,7 @@ #define PHYS_SDRAM_1 (V2M_BASE) #define PHYS_SDRAM_1_SIZE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 9d44e6723e2..c7a3e47437b 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -32,8 +32,8 @@ #define CONFIG_USART_ID ATMEL_ID_SYS /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 4f0188dd19e..e2e1cfedbde 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -166,7 +166,7 @@ /* Load U-Boot Image From MMC */ /* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 +#define CFG_SYS_SDRAM_BASE 0xc0000000 #include diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index b944d50663c..b16f3d48e38 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -42,7 +42,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_512M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 5244b9cf5cc..c473f3d86eb 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -15,8 +15,8 @@ /* * Memory configurations */ -#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_64M +#define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE +#define CFG_SYS_SDRAM_SIZE SZ_64M /* * DMA diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index e694dd7551a..ddc436d5019 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -72,7 +72,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/display5.h b/include/configs/display5.h index 0e5ecab9feb..0a7428b02ca 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -283,7 +283,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index c37b4c635b2..daf7ecd7975 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -17,7 +17,7 @@ #define PHYS_SDRAM_1 0x80000000 /* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */ #define PHYS_SDRAM_1_SIZE SZ_1G -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Environment */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 1fa5d05e7b4..31cd8536de4 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -19,7 +19,7 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE 0x5ea4ffff -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #include diff --git a/include/configs/durian.h b/include/configs/durian.h index 8f0e8be4330..001596c00a4 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -11,7 +11,7 @@ /* Sdram Bank #1 Address */ #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_1_SIZE 0x7B000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* BOOT */ diff --git a/include/configs/ea-lpc3250devkitv2.h b/include/configs/ea-lpc3250devkitv2.h index 1d655292d7e..fc1c2aed778 100644 --- a/include/configs/ea-lpc3250devkitv2.h +++ b/include/configs/ea-lpc3250devkitv2.h @@ -13,7 +13,7 @@ /* * RAM */ -#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE +#define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE /* * cmd diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 80a820c913b..80de73d15d5 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -66,13 +66,13 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE0 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE0 0x00000000 +#define CFG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 -#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 +#define CFG_SYS_SDRAM_BASE CFG_SYS_SDRAM_BASE0 +#define CFG_SYS_SDRAM_SIZE CFG_SYS_SDRAM_SIZE0 /* * For booting Linux, the board info and command line data @@ -103,8 +103,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DBWE | \ diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 16d2648e11f..d24bc56f34a 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -50,7 +50,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index a4891ddbc4f..e39bb94314f 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -27,7 +27,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index 60fab0419f5..c2b921e7cb8 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -8,8 +8,8 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x10000000 -#define CONFIG_SYS_SDRAM_SIZE SZ_16M +#define CFG_SYS_SDRAM_BASE 0x10000000 +#define CFG_SYS_SDRAM_SIZE SZ_16M /* * Environment diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 2f067a44248..b4f14a9a589 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -10,7 +10,7 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index f19e12d9090..97a8ffb4f61 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -26,8 +26,8 @@ #define CONFIG_SYS_INIT_RAM_SIZE (32 << 10) /* 128MB SDRAM in 1 bank */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE (128 << 20) +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE (128 << 20) /* 512kB on-chip NOR flash */ # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 44f5cb1e83f..dd322c2b3a7 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -29,21 +29,21 @@ #define CONFIG_RD_LVL -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_5 (CFG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_6 (CFG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_7 (CFG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_8 (CFG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE /* SPI */ diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index 8e2f135f934..cc0cf5ecbfb 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -9,7 +9,7 @@ #ifndef __CONFIG_5250_H #define __CONFIG_5250_H -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index a8bef860c2f..cff910c1bd5 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -23,21 +23,21 @@ /* select serial console configuration */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_5 (CFG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_6 (CFG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_7 (CFG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_8 (CFG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE /* Configuration of ENV Blocks */ diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index b05846d0b92..68c36dc2fd9 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -21,32 +21,32 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600} -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_5 (CFG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_6 (CFG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_7 (CFG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_8 (CFG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_9 (CONFIG_SYS_SDRAM_BASE + (8 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_9 (CFG_SYS_SDRAM_BASE + (8 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_9_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_10 (CONFIG_SYS_SDRAM_BASE + (9 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_10 (CFG_SYS_SDRAM_BASE + (9 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_10_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_11 (CONFIG_SYS_SDRAM_BASE + (10 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_11 (CFG_SYS_SDRAM_BASE + (10 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_11_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_12 (CONFIG_SYS_SDRAM_BASE + (11 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_12 (CFG_SYS_SDRAM_BASE + (11 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_12_SIZE SDRAM_BANK_SIZE #ifndef MEM_LAYOUT_ENV_SETTINGS diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index ba098316e08..f5353ec79a1 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -18,8 +18,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ /* NAND flash */ #define CFG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index a1400eba1ad..a7557144402 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -7,7 +7,7 @@ #define __CONFIG_GARDENA_SMART_GATEWAY_H /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index fa6f0e63ac5..6cdfe8c4c3c 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -12,9 +12,9 @@ /* * DDR Setup */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ -/* TODO: Check: Can this be unified with CONFIG_SYS_SDRAM_BASE? */ -#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ +/* TODO: Check: Can this be unified with CFG_SYS_SDRAM_BASE? */ +#define CONFIG_SYS_DDR_SDRAM_BASE CFG_SYS_SDRAM_BASE /* * Memory test diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index c862f15ee2b..85ceaf8ccb1 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -37,7 +37,7 @@ /* Memory */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index d519384d026..1dba2e92fb9 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -94,7 +94,7 @@ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index d2138c220f0..dd6b22de7ba 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -13,8 +13,8 @@ /* Miscellaneous */ /* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024) +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE (10 * 1024 * 1024) /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 645ca162a35..fe00272a1bd 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -53,7 +53,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/gxp.h b/include/configs/gxp.h index e3c97b20d51..2b0b04891cc 100644 --- a/include/configs/gxp.h +++ b/include/configs/gxp.h @@ -10,6 +10,6 @@ #ifndef _GXP_H_ #define _GXP_H_ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #endif diff --git a/include/configs/highbank.h b/include/configs/highbank.h index a7d21a76dba..0d281a3379a 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -14,7 +14,7 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x20000000\0" \ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 18c1e83aeb4..775f166f1d3 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -24,7 +24,7 @@ /* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/ #define PHYS_SDRAM_1_SIZE 0x3EFFFFFF -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index 973df8e4abc..914c3ad9ef0 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -16,7 +16,7 @@ #define PHYS_SDRAM_1 0x00000000 #define PHYS_SDRAM_1_SIZE 0xC0000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 1d7b171da75..fcb2dec54ec 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -22,8 +22,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_1G +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_1G /* * UART configuration diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 9e092e16ea0..0ae935208ca 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -21,8 +21,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_1G +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_1G /* * UART configuration diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h index 1fc45f9060b..f1ca28b7ca3 100644 --- a/include/configs/imgtec_xilfpga.h +++ b/include/configs/imgtec_xilfpga.h @@ -21,8 +21,8 @@ */ /* SDRAM Configuration (for final code, data, stack, heap) */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */ +#define CFG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */ /*---------------------------------------------------------------------- * Commands diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 974dff8f6f4..594aa4f75e7 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -130,5 +130,5 @@ "upd=run load update\0" \ /* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #endif /* __IMX27LITE_COMMON_CONFIG_H */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index b8eb5c82cf7..d4e2583ee8a 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -109,7 +109,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 6b822e72505..1b08c5e9a7e 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -105,7 +105,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index f7f8f33ed89..a074df5829b 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -55,7 +55,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 15171d7ad67..855af29ec96 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -85,7 +85,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h index 70b4b84215d..0a688afe6cd 100644 --- a/include/configs/imx6ulz_smm_m2.h +++ b/include/configs/imx6ulz_smm_m2.h @@ -63,7 +63,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index c6db5e943ee..e5118f11580 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -69,7 +69,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 917d567d2ec..e62f9c5462b 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -127,7 +127,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 8e088994580..143da001104 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -74,7 +74,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index dd9f93f35c2..c7669305f59 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -21,7 +21,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* Minimum 1 GiB DDR */ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index f1d1c1c9c3d..9937071874f 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -57,7 +57,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 9cdba70493b..cd47d842ffc 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -41,7 +41,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 065356341fc..58e165c35a7 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -32,7 +32,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 0ae3da12ad3..f532c1052f5 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -78,7 +78,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR) #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index d6959ac95a1..415248eadfc 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 9c75e3eec15..8857bc7c598 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -49,7 +49,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index a484d913649..628bb5813ff 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -46,7 +46,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index d5252abb218..a169be35a49 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index bf878251364..62bcef5eecd 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -14,7 +14,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x20000000 /* Minimum 512 MiB DDR */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 1b533e2c142..d394762e3bb 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -55,7 +55,7 @@ /* Totally 2GB DDR */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h index 7986d20eed1..3e995c97217 100644 --- a/include/configs/imx8mp_icore_mx8mp.h +++ b/include/configs/imx8mp_icore_mx8mp.h @@ -56,7 +56,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 /* Totally 2GB DDR */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 8f2b474817d..1943a24b79d 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -136,7 +136,7 @@ /* Totally 6GB or 4G DDR */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G) #define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index b1c213cc89b..7d360583c41 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 4b2107e4057..271376cb9fc 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -50,7 +50,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 2d4c8d78c67..672a9fa7a34 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -56,7 +56,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 1905e538c5b..dd354b0265d 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -88,7 +88,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 7f6d59db3aa..f1f907f3e5a 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -103,7 +103,7 @@ /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 67f19bc1922..fe27ac36a3b 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -108,7 +108,7 @@ */ #define CFG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 567351fcad6..19f1dba0470 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -103,7 +103,7 @@ /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 7bf0ce784c5..592df2795b1 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -54,7 +54,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index b2814664086..077a4d843dc 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -127,7 +127,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 512e0e61aa7..8d0458d1d63 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -30,7 +30,7 @@ */ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* * FLASH and environment organization diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index a2e50c3b8df..5a769e07871 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -32,12 +32,12 @@ * : : * : Specified explicitly by CONFIG_CUSTOM_SYS_INIT_SP_ADDR * : - * Specified explicitly by CONFIG_SYS_SDRAM_BASE + * Specified explicitly by CFG_SYS_SDRAM_BASE * * NOTES: * - Stack starts from CONFIG_CUSTOM_SYS_INIT_SP_ADDR and grows down, - * i.e. towards CONFIG_SYS_SDRAM_BASE but nothing stops it from crossing - * that CONFIG_SYS_SDRAM_BASE in which case data won't be really saved on + * i.e. towards CFG_SYS_SDRAM_BASE but nothing stops it from crossing + * that CFG_SYS_SDRAM_BASE in which case data won't be really saved on * stack any longer and values popped from stack will contain garbage * leading to unexpected behavior, typically but not limited to: * - "Returning" back to bogus caller function @@ -50,16 +50,16 @@ #define DCCM_BASE 0x80000000 #define DCCM_SIZE SZ_128K -#define CONFIG_SYS_SDRAM_BASE DCCM_BASE -#define CONFIG_SYS_SDRAM_SIZE DCCM_SIZE +#define CFG_SYS_SDRAM_BASE DCCM_BASE +#define CFG_SYS_SDRAM_SIZE DCCM_SIZE #define ROM_BASE CONFIG_SYS_MONITOR_BASE #define ROM_SIZE SZ_256K #define RAM_DATA_BASE SYS_INIT_SP_ADDR -#define RAM_DATA_SIZE CONFIG_SYS_SDRAM_SIZE - \ +#define RAM_DATA_SIZE CFG_SYS_SDRAM_SIZE - \ (SYS_INIT_SP_ADDR - \ - CONFIG_SYS_SDRAM_BASE) - \ + CFG_SYS_SDRAM_BASE) - \ CONFIG_SYS_MALLOC_LEN - \ CONFIG_ENV_SIZE #endif /* _CONFIG_IOT_DEVKIT_H_ */ diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 9f54f259994..2a0b0c7163a 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -16,7 +16,7 @@ #include /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 /* FLASH Configuration */ #define CONFIG_SYS_FLASH_BASE 0x000000000 diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 932d7d3c8cb..e690ef95906 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -17,7 +17,7 @@ #include /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 /* SPL Loader Configuration */ #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 7d36a25dc23..db1daee1363 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -7,7 +7,7 @@ /* * DDR Setup */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ +#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) @@ -17,7 +17,7 @@ /* * Manually set up DDR parameters */ -#define CONFIG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */ +#define CFG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */ /* * The reserved memory diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index ad9853ab6b3..b5913ed7000 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -20,7 +20,7 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x54 diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index c8423fdfb0a..dbf038cefa0 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -163,10 +163,10 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x54 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ /****************************************************************************** * (PRAM usage) diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index b3e1fc2a864..e2808ec02dc 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -14,7 +14,7 @@ /* RAM */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index a2aedefcec2..73b59517621 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -17,7 +17,7 @@ /* RAM */ #define PHYS_SDRAM DDR_CSD1_BASE_ADDR #define PHYS_SDRAM_SIZE (SZ_4G) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 6acd2f79253..9b452818c1e 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -64,7 +64,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 7ed1f153c23..bbf0761814b 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -21,7 +21,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL /* early stack pointer */ diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index c401fd32169..967de66f3c9 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -67,7 +67,7 @@ #define PHYS_SDRAM_1_SIZE (512 * SZ_1M) #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index b0e49ad6df0..de1fc0bfa4c 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -86,7 +86,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 1f642fbecc3..bee064c6f38 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -85,7 +85,7 @@ "bootscript=source ${bootscraddr}\0" /* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 +#define CFG_SYS_SDRAM_BASE 0xc0000000 #include diff --git a/include/configs/librem5.h b/include/configs/librem5.h index dbd7d107dae..3a2c508ffac 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -82,7 +82,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB LPDDR4 one Rank */ diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 28372d41590..b9134508853 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -7,7 +7,7 @@ #define __CONFIG_LINKIT_SMART_7688_H /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 1d51b87b68b..d1ebd99ae14 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -87,7 +87,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 196e024b57e..f0a9e9ab315 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -9,7 +9,7 @@ #include "ls1012a_common.h" /* DDR */ -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 0x40000000 #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 809f9ae8c8d..07124370775 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -12,7 +12,7 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL /*SPI device */ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 674bcbeb758..c19ed2f43ec 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -10,7 +10,7 @@ #include "ls1012a_common.h" /* DDR */ -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 9ad3a120118..54555b34dd4 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -10,7 +10,7 @@ #include "ls1012a_common.h" /* DDR */ -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 0x40000000 /* * QIXIS Definitions diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 4f77acdaede..d74936d1281 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -10,7 +10,7 @@ #include "ls1012a_common.h" /* DDR */ -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 0x40000000 /* * I2C IO expander diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 3579f9c8437..49a77fd6b6b 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -42,7 +42,7 @@ #define SDRAM_CFG_BI 0x00000001 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* * Serial Port diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 45665115f66..1f5a80ff085 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -20,7 +20,7 @@ #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 1e2db12a83f..49546066115 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -57,7 +57,7 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* Serial Port */ #define CFG_SYS_NS16550_CLK get_serial_clock() diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 323feb6e333..d77224934c0 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -60,7 +60,7 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* * IFC Definitions diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 587f23be587..064c4f069cb 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -15,7 +15,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL /* diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index df6338298b4..e940dff9988 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -34,7 +34,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL #define CPU_RELEASE_ADDR secondary_boot_addr diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index b09588f4796..ce254d8b3f1 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -34,7 +34,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL #define CPU_RELEASE_ADDR secondary_boot_addr diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 2117b081168..f8eaee881d0 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -32,7 +32,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL /* * SMP Definitinos diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index c79a50795b8..21c097ecbbd 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -19,7 +19,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL /* diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 8b2b7479c11..ad85e2de6ed 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -17,8 +17,8 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL -#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE 0x200000000UL +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 1734f323f92..cbdb2fa1357 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -20,7 +20,7 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/malta.h b/include/configs/malta.h index 2dd34ea7313..c9aee00cd35 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -22,11 +22,11 @@ */ #ifdef CONFIG_64BIT -# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 +# define CFG_SYS_SDRAM_BASE 0xffffffff80000000 #else -# define CONFIG_SYS_SDRAM_BASE 0x80000000 +# define CFG_SYS_SDRAM_BASE 0x80000000 #endif -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index db84302231a..5ad945b5589 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -47,6 +47,6 @@ */ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_SDRAM_SIZE SZ_1G +#define CFG_SYS_SDRAM_SIZE SZ_1G #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index f9f0825f6f8..8aa3b0cd808 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -214,7 +214,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h index c6ce8837474..2422cbf9f0b 100644 --- a/include/configs/meerkat96.h +++ b/include/configs/meerkat96.h @@ -17,7 +17,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/meesc.h b/include/configs/meesc.h index cd3910ee4ba..2e07886c194 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -44,8 +44,8 @@ #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM0 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 726f33c26c2..6331b7615db 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -36,7 +36,7 @@ #define STDIN_CFG "serial" #endif -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 /* ROM USB boot support, auto-execute boot.scr at scriptaddr */ #define BOOTENV_DEV_ROMUSB(devtypeu, devtypel, instance) \ diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 4c7cfac8af7..3def93d61e8 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -9,7 +9,7 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 diff --git a/include/configs/msc_sm2s_imx8mp.h b/include/configs/msc_sm2s_imx8mp.h index bd35378800b..ac5ff9289a5 100644 --- a/include/configs/msc_sm2s_imx8mp.h +++ b/include/configs/msc_sm2s_imx8mp.h @@ -49,7 +49,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ #define PHYS_SDRAM_2 0xc0000000 diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index c76e1fcaed9..65cd6f5bc4c 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_MT7620_H #define __CONFIG_MT7620_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index e09e9c82eb8..1211bb47488 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_MT7621_H #define __CONFIG_MT7621_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED 0x1c000000 diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index fd8e30acf59..e5d60e1cd2b 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -15,7 +15,7 @@ /* SPL -> Uboot */ #define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* Ethernet */ #define CONFIG_IPADDR 192.168.1.1 diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 73093f94d2b..39a7ba76633 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -21,7 +21,7 @@ #define MMC_SUPPORTS_TUNING /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* This is needed for kernel booting */ #define FDT_HIGH "0xac000000" diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index bb12ebfe4fd..9c5034f5f08 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_MT7628_H #define __CONFIG_MT7628_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x80000 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 668dc3c4f74..d330adbc01b 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -25,7 +25,7 @@ /* UBoot -> Kernel */ /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* Ethernet */ #define CONFIG_IPADDR 192.168.1.1 diff --git a/include/configs/mt7981.h b/include/configs/mt7981.h index 9f26b0ba7bb..249f0b9662d 100644 --- a/include/configs/mt7981.h +++ b/include/configs/mt7981.h @@ -16,6 +16,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #endif diff --git a/include/configs/mt7986.h b/include/configs/mt7986.h index 4fbd57a573d..990e411a640 100644 --- a/include/configs/mt7986.h +++ b/include/configs/mt7986.h @@ -16,6 +16,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #endif diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index 7cabbef9288..8a8bc85ca70 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -10,8 +10,8 @@ #define __MT8518_H /* DRAM definition */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* Uboot definition */ diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index e870fc810cb..e45bfd76b6e 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -27,7 +27,7 @@ */ /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* * NS16550 Configuration diff --git a/include/configs/mvebu_alleycat-5.h b/include/configs/mvebu_alleycat-5.h index 41bdfae6c31..9c4038be8b0 100644 --- a/include/configs/mvebu_alleycat-5.h +++ b/include/configs/mvebu_alleycat-5.h @@ -9,7 +9,7 @@ #include /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x200000000 +#define CFG_SYS_SDRAM_BASE 0x200000000 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 115200, 230400, 460800, 921600 } diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 6d3cb99b2df..7641b562219 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -13,7 +13,7 @@ */ /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 5debd9117c6..358e06fd207 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -12,7 +12,7 @@ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* auto boot */ diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index dd303a17d61..aa3d7a1a3fc 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -10,7 +10,7 @@ /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Status LED */ diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 4c0531212ed..f597cdb3056 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -13,7 +13,7 @@ /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Extra Environments */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 140f5e98c52..bc8c8933704 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -13,7 +13,7 @@ /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* UBI and NAND partitioning */ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 95afb350ec3..2229980db37 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -112,7 +112,7 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 77835639720..e84bac67ef7 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -60,7 +60,7 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 3c9b2ad58ee..9e837a38833 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -95,7 +95,7 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index b26613a2ea8..52ff7b00b43 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -96,7 +96,7 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 1db4d6c01b1..3c4ba095e4e 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -85,7 +85,7 @@ #include /* Physical Memory Map */ -#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR +#define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index a6cefab5508..9c160c41ece 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -27,7 +27,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index bc9fab12909..711b5a334aa 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -139,7 +139,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index ca1d077437b..3c2621d8c91 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -82,7 +82,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index 44a5eeff198..a3a12aeb390 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -82,7 +82,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_2G -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index a41e428eb8a..f0e239fdb6e 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -78,7 +78,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index c655671ee1b..a0f9c537e5d 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -106,7 +106,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 65f0a5c9966..8199b4b8319 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -108,7 +108,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 604923ec2b7..827385c65e2 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -102,7 +102,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index af176583814..c39b3572b84 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -81,7 +81,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 62e8e629911..362de482f57 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -26,7 +26,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM 0x60000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index e93824928b3..9ef1eea5e61 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -26,7 +26,7 @@ #define PHYS_SDRAM 0x60000000 #define PHYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index 273f938554d..cdd12866ac0 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -22,7 +22,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_256M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index ec5339d930a..9d098113164 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -90,7 +90,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 2623f99f8d0..9ad4f590697 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -161,7 +161,7 @@ * FLASH and environment organization */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 @@ -170,7 +170,7 @@ */ #define SDRAM_SIZE 0x10000000 /* 256 MB */ -#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE) +#define SDRAM_END (CFG_SYS_SDRAM_BASE + SDRAM_SIZE) #define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ #define KERNEL_OFFSET 0x40000 /* 256 kB */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 9dc05d80ec2..8d39d75a42b 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -30,7 +30,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index ea407c9f6f1..080c659b6ec 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -23,7 +23,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/nsim.h b/include/configs/nsim.h index d469ef83c24..b930a538640 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -13,8 +13,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_256M +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_256M /* * Console configuration diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h index 00f7d871271..5ac951a370a 100644 --- a/include/configs/o4-imx6ull-nano.h +++ b/include/configs/o4-imx6ull-nano.h @@ -7,7 +7,7 @@ #include "mx6_common.h" #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h index 0fa7490e7de..b475354bbc6 100644 --- a/include/configs/octeon_common.h +++ b/include/configs/octeon_common.h @@ -14,6 +14,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x00180000 #endif -#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 +#define CFG_SYS_SDRAM_BASE 0xffffffff80000000 #endif /* __OCTEON_COMMON_H__ */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index ab1eb787e70..03d1a8e7b5f 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -10,7 +10,7 @@ /** Maximum size of image supported for bootm (and bootable FIT images) */ /** Memory base address */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_TEXT_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_TEXT_BASE /** Stack starting address */ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 38f99ab2167..58275ccffa0 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -36,7 +36,7 @@ /** Maximum size of image supported for bootm (and bootable FIT images) */ /** Memory base address */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_TEXT_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_TEXT_BASE /** Stack starting address */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index babd3ca9631..ce8ea583fa1 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -17,9 +17,9 @@ #define CONFIG_SYS_PL310_BASE 0x10502000 #endif -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #include diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 15646297423..d2d7fca5445 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define TZPC_BASE_OFFSET 0x10000 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 2b47d4ca376..5b0d87a3367 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -154,7 +154,7 @@ /* defines for SPL */ /* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 +#define CFG_SYS_SDRAM_BASE 0xc0000000 #include diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 3ff8187b5df..5b097e9fef2 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -14,7 +14,7 @@ #include /* Environment options */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* --------------------------------------------------------------------- * Board boot configuration diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index b3cdd2f1ebe..53889d699b2 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -14,7 +14,7 @@ #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR /* Physical Memory Map */ -#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR +#define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/origen.h b/include/configs/origen.h index 36aaa7c14fb..6633d541a31 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -11,8 +11,8 @@ #include /* ORIGEN has 4 bank of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* Power Down Modes */ diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h index b0233b96b06..8d0311cfb3b 100644 --- a/include/configs/owl-common.h +++ b/include/configs/owl-common.h @@ -11,7 +11,7 @@ #define _OWL_COMMON_CONFIG_H_ /* SDRAM Definitions */ -#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_SDRAM_BASE 0x0 /* Some commands use this as the default load address */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 6e8ac1b98df..14d702e1efe 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -125,13 +125,13 @@ #define SPD_EEPROM_ADDRESS 0x52 #if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G +#define CFG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G #else -#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G +#define CFG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G #endif -#define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19)) +#define CFG_SYS_SDRAM_SIZE (1u << (CFG_SYS_SDRAM_SIZE_LAW - 19)) #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* Default settings for DDR3 */ #ifndef CONFIG_TARGET_P2020RDB diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 6267dc729ab..85cedde0988 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -34,7 +34,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_256M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index e13b5df0fab..f7e36f22ce8 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -36,7 +36,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_256M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index a04a03a7e18..586cddf4184 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -118,7 +118,7 @@ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * SZ_1M) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 14cbfde28bf..cf705dcb197 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -15,7 +15,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index 7a8d3c63d44..bfc0011fbf9 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -20,7 +20,7 @@ #include #include -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_POWER_TPS65090_EC diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index 2c749ac2143..09c6b4f8dd5 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -20,7 +20,7 @@ #include #include -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index c98393b7c75..ac68c933a06 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -64,7 +64,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 49cd9d4b3c6..aedaf806e5e 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -63,7 +63,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 4ea16d6115a..d9abbbc28b3 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -23,7 +23,7 @@ (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SYS_INIT_RAM_SIZE) /* SDRAM Configuration (for final code, data, stack, heap) */ -#define CONFIG_SYS_SDRAM_BASE 0x88000000 +#define CFG_SYS_SDRAM_BASE 0x88000000 /* Memory Test */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index f95beeb214a..fc2cab960c6 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -91,7 +91,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 85772ba6e83..22b4976d722 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -91,7 +91,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index b3a38d8a940..f5b9eed2bcd 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -93,7 +93,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 17af19d49dc..91baff96386 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -67,7 +67,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index adb2f43ea4d..3fbddd903a3 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -78,22 +78,22 @@ /* Memory Device Register -> SDRAM */ #define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM #define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE -#define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH -#define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR -#define CONFIG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL -#define CONFIG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ -#define CONFIG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ #define CONFIG_SYS_SMC0_SETUP0_VAL \ @@ -160,6 +160,6 @@ "flashboot=run ramargs;run addip;bootm 0x10050000\0" \ "" -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #endif diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 4352a242de3..c1f6334d6a1 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -90,22 +90,22 @@ /* Memory Device Register -> SDRAM */ #define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM #define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE -#define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH -#define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR -#define CONFIG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL -#define CONFIG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ -#define CONFIG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ #define CONFIG_SYS_SMC0_SETUP0_VAL \ @@ -184,6 +184,6 @@ "flashboot=run ramargs;run addip;bootm 0x10050000\0" \ "" -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #endif diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index a7deaa32137..4a0a16818ed 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -20,8 +20,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x70000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0x70000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 05253d59efd..365fdd30c08 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -11,7 +11,7 @@ #endif #define CONFIG_SYS_BOOTMAPSZ (0x30 << 20) -#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_SDRAM_BASE 0x0 /* Default environemnt variables */ #define CONFIG_SERVERIP 192.168.0.1 diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h index 2e206542f8d..1c11685f49e 100644 --- a/include/configs/pomelo.h +++ b/include/configs/pomelo.h @@ -9,7 +9,7 @@ #define __POMELO_CONFIG_H__ /* SDRAM Bank #1 start address */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* SIZE of malloc pool */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index f9decb2a4c2..bee1ef64948 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -36,7 +36,7 @@ #define DDR_BASE 0x00000000 #define PHYS_SDRAM_1 DDR_BASE #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2GB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Console I/O Buffer Size */ diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 8b151ef1883..99376155b49 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -14,7 +14,7 @@ #define GICD_BASE 0xff131000 #define GICC_BASE 0xff132000 -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index 535762ecb24..a67af73fd56 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -10,7 +10,7 @@ /* Physical memory map */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* GUIDs for capsule updatable firmware images */ #define QEMU_ARM_UBOOT_IMAGE_GUID \ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 9fc51fdfd76..e7c810957d6 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -31,7 +31,7 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_HWCONFIG diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index d81e5d6c862..72f35cc0542 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -8,7 +8,7 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 406ee6282c5..f6ee7201eba 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -6,8 +6,8 @@ /* SCIF */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x8C000000 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE 0x8C000000 +#define CFG_SYS_SDRAM_SIZE 0x04000000 /* Address of u-boot image in Flash */ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 3a38e0656de..61b9447ea5f 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -17,8 +17,8 @@ /* console */ #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } -#define CONFIG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE) -#define CONFIG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) +#define CFG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE) +#define CFG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) /* Timer */ #define CONFIG_TMU_TIMER diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 7432cffb5a5..58530725978 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -26,8 +26,8 @@ /* MEMORY */ #define DRAM_RSV_SIZE 0x08000000 -#define CONFIG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) -#define CONFIG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE) +#define CFG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) +#define CFG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE) #define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 6616396777a..b4c19727478 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -10,7 +10,7 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE) diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index 9297184bded..99c86edeaa4 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -11,7 +11,7 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (1024UL << 20UL) #define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 12d4bc65d7e..fac27a7d27c 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -14,7 +14,7 @@ /* RAW SD card / eMMC locations. */ -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_MAX_SIZE 0x80000000 /* usb mass storage */ diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 6fe1b2d9a2e..334fb3affa5 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -13,7 +13,7 @@ /* spl size 32kb sram - 2kb bootrom */ -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0x80000000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 4fb86b69a8e..6889ba591b3 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -12,7 +12,7 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE 0x80000000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 81f16edbad6..4aa7e0449db 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -15,7 +15,7 @@ /* RAW SD card / eMMC locations. */ -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0xfe000000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 263d1bd180c..4b510b13991 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -10,7 +10,7 @@ #define CONFIG_IRAM_BASE 0xfff80000 -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 1e214e4ebe1..132b7d0fe9b 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -11,7 +11,7 @@ #define CONFIG_IRAM_BASE 0xff090000 /* FAT sd card locations. */ -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define ENV_MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 37e0c1d936c..92cdc1a51fb 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -11,7 +11,7 @@ #include #include -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define CONFIG_IRAM_BASE 0xff8c0000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 2f9aee58197..78f624d31ca 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -21,7 +21,7 @@ /* RAW SD card / eMMC locations. */ /* FAT sd card locations. */ -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 15e81523402..d43dc2580e4 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,7 +10,7 @@ #define CONFIG_IRAM_BASE 0xfdcc0000 -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 #define ENV_MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/rpi.h b/include/configs/rpi.h index cd8fe8b518b..2c24944d9c3 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -23,7 +23,7 @@ #endif /* Memory layout */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* * The board really has 256M. However, the VC (VideoCore co-processor) shares @@ -31,7 +31,7 @@ * smaller amount of RAM is present in order to avoid stomping on the area * the VC uses. */ -#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CFG_SYS_SDRAM_SIZE SZ_128M /* Devices */ /* LCD */ diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 83c3167f38d..76836add302 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -15,7 +15,7 @@ #define CONFIG_SYS_TIMER_BASE 0x10350020 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 /* rockchip ohci host driver */ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index ae94f0ecc56..e071d4da5e8 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -18,7 +18,7 @@ /*----------------------------------------------------------------------- * System memory Configuration */ -#define CONFIG_SYS_SDRAM_BASE 0x71000000 +#define CFG_SYS_SDRAM_BASE 0x71000000 /* * "(0x40000000 - CONFIG_SYS_RESERVE_MEM_SIZE)" has been used in @@ -55,7 +55,7 @@ * Starting kernel ... * ... */ -#define CONFIG_SYS_SDRAM_SIZE (0xb0000000 - CONFIG_SYS_SDRAM_BASE) +#define CFG_SYS_SDRAM_SIZE (0xb0000000 - CFG_SYS_SDRAM_BASE) #define BMP_LOAD_ADDR 0x78000000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index de4510aa434..ed891ab22a9 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -14,7 +14,7 @@ #include /* get chip and board defs */ /* DRAM Base */ -#define CONFIG_SYS_SDRAM_BASE 0x30000000 +#define CFG_SYS_SDRAM_BASE 0x30000000 /* Text Base */ @@ -114,7 +114,7 @@ "dfu_alt_info=" CONFIG_DFU_ALT "\0" /* Goni has 3 banks of DRAM, but swap the bank */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 668b52600e8..614d04fda07 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -14,8 +14,8 @@ /* Keep L2 Cache Disabled */ /* Universal has 2 banks of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index afb1e3d0f10..75302bf5c05 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -17,7 +17,7 @@ #define CONFIG_USART_ID 0 /* ignored in arm */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x8000000 /* 128 MB */ +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x8000000 /* 128 MB */ #endif diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 7c5bfdb2e6d..22813d4c544 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -23,8 +23,8 @@ */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index de6c92ed7d4..f826eab9ff2 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -16,8 +16,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* SPL */ diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index ebdb39273ef..01ed1a3c8e7 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -15,8 +15,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h index 09cc4dddb2a..2e3c1ea4006 100644 --- a/include/configs/sama5d2_ptc_ek.h +++ b/include/configs/sama5d2_ptc_ek.h @@ -16,8 +16,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* NAND Flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 1c9af9b6759..4b13a101170 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -24,8 +24,8 @@ #define ATMEL_PMC_UHP (1 << 6) /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index afb9b9a2fbf..3f58928565f 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -31,8 +31,8 @@ #endif /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* SerialFlash */ diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 0daadec5536..084cb4def66 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -12,8 +12,8 @@ #include "at91-sama5_common.h" /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index d59899f0baa..cbc1c0f4651 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -12,8 +12,8 @@ #include "at91-sama5_common.h" /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 3f905bf2d77..68fa31fe76f 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -12,7 +12,7 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x60000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 0dcb2ebc316..5a7f5e135b5 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -13,8 +13,8 @@ /* Size of our emulated memory */ #define SB_CONCAT(x, y) x ## y #define SB_TO_UL(s) SB_CONCAT(s, UL) -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE \ +#define CFG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_SIZE \ (SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20) #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index c9dd7509cb2..31552f4619d 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -33,7 +33,7 @@ /* Physical Memory Map */ #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ -#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_DRAM_1 /* Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 2e5592cf94d..5ad2124bdda 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -11,7 +11,7 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 85fab927195..f4b1a16019e 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -11,7 +11,7 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h index 7159fc35d52..974531ea0d8 100644 --- a/include/configs/sipeed-maix.h +++ b/include/configs/sipeed-maix.h @@ -8,8 +8,8 @@ #include -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_SIZE SZ_8M +#define CFG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_SIZE SZ_8M #ifndef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 7c8f1676be2..d2bc73a400e 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -45,8 +45,8 @@ * SDRAM: 1 bank, 64 MB, base address 0x20000000 * Already initialized before u-boot gets started. */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE (64 * SZ_1M) /* * Perform a SDRAM Memtest from the start of SDRAM diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 12c2e1f6159..0392530c0ad 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -14,7 +14,7 @@ #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index ba562b23780..64963eebe5c 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -16,7 +16,7 @@ /* input clock of PLL: SMDKC100 has 12MHz input clock */ /* DRAM Base */ -#define CONFIG_SYS_SDRAM_BASE 0x30000000 +#define CFG_SYS_SDRAM_BASE 0x30000000 /* Text Base */ @@ -77,7 +77,7 @@ */ /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE (128 << 20) /* 0x8000000, 128 MB Bank #1 */ /*----------------------------------------------------------------------- diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 0b1f0c5f54c..af0c8200fc2 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -11,7 +11,7 @@ #include "exynos4-common.h" /* High Level Configuration Options */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* Handling Sleep Mode*/ #define S5P_CHECK_SLEEP 0x00000BAD @@ -23,13 +23,13 @@ /* SMDKV310 has 4 bank of DRAM */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE /* FLASH and environment organization */ diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index faa13c65216..44b9109d442 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -38,7 +38,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 7c35c912e59..9b1cb372ece 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -21,8 +21,8 @@ /* CPU */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 -#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6 +#define CFG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 6054fa42c1a..95516800793 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -32,7 +32,7 @@ * Memory */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* * I2C diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 70a24ed267e..2656c977673 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -38,7 +38,7 @@ * in U-Boot pre-reloc is higher than in SPL. */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* * U-Boot general configurations diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 2b2d78b8c8e..9403e2f4306 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -70,7 +70,7 @@ */ #define PHYS_SDRAM_1 0x0 #define PHYS_SDRAM_1_SIZE (1 * 1024 * 1024 * 1024) -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 /* * Serial / UART configurations diff --git a/include/configs/socrates.h b/include/configs/socrates.h index a60ac6d1a3c..c628860eac7 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -55,7 +55,7 @@ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_VERY_BIG_RAM /* I2C addresses of SPD EEPROMs */ @@ -73,7 +73,7 @@ #define CONFIG_SYS_DDR_CONFIG_2 0x04400000 #define CONFIG_SYS_DDR_CONFIG 0xC3008000 #define CONFIG_SYS_DDR_CLK_CONTROL 0x03800000 -#define CONFIG_SYS_SDRAM_SIZE 256 /* in Megs */ +#define CFG_SYS_SDRAM_SIZE 256 /* in Megs */ /* * Flash on the LocalBus diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index dcb88a3a730..008aa500107 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -53,7 +53,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 1e966a23227..806323e375d 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -11,7 +11,7 @@ /* ram memory-related information */ #define PHYS_SDRAM_1 0x40000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_1_SIZE 0x3E000000 #define CONFIG_SYS_HZ_CLOCK 750000000 /* 750 MHz */ diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index 07a5bfc8a86..d7111493142 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -13,7 +13,7 @@ /* * Configuration of the external SRAM memory used by U-Boot */ -#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE +#define CFG_SYS_SDRAM_BASE STM32_DDR_BASE /* * For booting Linux, use the first 256 MB of memory, since this is diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index b809f9322ad..f78ce41ed85 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -13,7 +13,7 @@ /* * Configuration of the external SRAM memory used by U-Boot */ -#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE +#define CFG_SYS_SDRAM_BASE STM32_DDR_BASE /* * For booting Linux, use the first 256 MB of memory, since this is diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index ba49075ce06..234327e017b 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -56,10 +56,10 @@ /* * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ #define CONFIG_SYS_DRAM_TEST @@ -75,8 +75,8 @@ * the maximum mapped by the Linux kernel during initialization ?? */ /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ - (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ + (CFG_SYS_SDRAM_SIZE << 20)) /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -89,8 +89,8 @@ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) -#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR2 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \ CF_CACR_ICINVA | CF_CACR_EUSP) diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 567aa1ffe43..b2dcb6058b1 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -10,7 +10,7 @@ /* ram memory-related information */ #define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_1_SIZE 0x00198000 /* user interface */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index cd2a74fb52d..e1a66f53ff5 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -42,13 +42,13 @@ */ #ifdef CONFIG_MACH_SUN9I #define SDRAM_OFFSET(x) 0x2##x -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 #elif defined(CONFIG_MACH_SUNIV) #define SDRAM_OFFSET(x) 0x8##x -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #else #define SDRAM_OFFSET(x) 0x4##x -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* V3s do not have enough memory to place code at 0x4a000000 */ #endif @@ -66,7 +66,7 @@ /* FIXME: this may be larger on some SoCs */ #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ -#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_0 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ /* mmc config */ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 63d897d090a..daa9bbec88a 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -11,7 +11,7 @@ /* * SDRAM (for initialize) */ -#define CONFIG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */ +#define CFG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */ #define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */ #define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index dd1fe0af7cd..1aba986e1e6 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -41,8 +41,8 @@ * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE (128 * SZ_1M) /* * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 92ee920346b..cd1309b3b88 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -13,8 +13,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_128M /* * UART configuration diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 7f197851d0a..2d8bde1cee8 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -13,7 +13,7 @@ /* General configuration */ /* Physical Memory Map */ -#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR +#define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 92df457e818..7e764b0000b 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -40,7 +40,7 @@ #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 655fcb0011b..76b496303f3 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -68,6 +68,6 @@ /* Defines for SPL */ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_SDRAM_SIZE SZ_2G +#define CFG_SYS_SDRAM_SIZE SZ_2G #endif /* _CONFIG_THEADORABLE_H */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index cf2efdbe230..1f60b9b4979 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -13,7 +13,7 @@ /* Link Definitions */ /* SMP Spin Table Definitions */ -#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#define CPU_RELEASE_ADDR (CFG_SYS_SDRAM_BASE + 0x7fff0) /* PL011 Serial Configuration */ @@ -30,7 +30,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Initial environment variables */ #define UBOOT_IMG_HEAD_SIZE 0x40 diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index fc78077014b..e5b23d2a54c 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -69,7 +69,7 @@ #define PHYS_DRAM_1_SIZE 0x20000000 /* 512MB */ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /** * Platform/Board specific defs diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 1bd2a1874b8..4a7c3d5b449 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -20,7 +20,7 @@ #define V_SCLK (V_OSCK >> 1) #define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /** * Platform/Board specific defs diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index b289b9e26a0..d54c208ef66 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -64,7 +64,7 @@ * initial stack pointer in our SRAM. Otherwise, we can define * CONFIG_NR_DRAM_BANKS before including this file. */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* If DM_I2C, enable non-DM I2C support */ diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index ab6cd063321..a609aa3a2aa 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -23,7 +23,7 @@ /* Top 48MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x03000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_2 0x8080000000 #define PHYS_SDRAM_2_SIZE 0x180000000 diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 22d783c325b..13789819917 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SDRAM_BASE 0xa0000000 +#define CFG_SYS_SDRAM_BASE 0xa0000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index a65ebfb4dea..f8e3a2d017a 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -268,7 +268,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/trats.h b/include/configs/trats.h index ca318687783..23dcf20c1f4 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -16,8 +16,8 @@ #endif /* TRATS has 4 banks of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* Tizen - partitions definitions */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index f324ea7ebeb..9c6433ccfd8 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -17,8 +17,8 @@ #endif /* TRATS2 has 4 banks of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* Tizen - partitions definitions */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index f549f9f7ad0..4ca8eafc914 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -8,7 +8,7 @@ #ifndef _CONFIG_TURRIS_MOX_H #define _CONFIG_TURRIS_MOX_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 268c737e7eb..c1e80b44c85 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -49,7 +49,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 147224806fc..f73092661a1 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -57,7 +57,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 2cdc3fbf737..d2fd23e1d91 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -25,8 +25,8 @@ */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index c381934f31a..e944e78603e 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -60,7 +60,7 @@ #define PHYS_SDRAM CSD0_BASE_ADDR #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 338d8af8fb3..d9e5dfaceaf 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -14,13 +14,13 @@ #define CFG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ) -#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) +#define CFG_SYS_SDRAM_SIZE (128 * SZ_1M) #elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT) -#define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M) +#define CFG_SYS_SDRAM_SIZE (256 * SZ_1M) #elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16) -#define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M) +#define CFG_SYS_SDRAM_SIZE (512 * SZ_1M) #else #error Unknown DDR size - please add! #endif diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index f513dade6aa..b209d97e5ec 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -60,7 +60,7 @@ /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #endif -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index fea4329d23c..1b9f2ca26f6 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -69,7 +69,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G) #define PHYS_SDRAM_2 0x100000000 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 0c11b6b3331..9a46d50c6f3 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -96,7 +96,7 @@ /* Top 16MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x01000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define PHYS_SDRAM_2 (0x880000000) diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 5d773060d82..ef136c75a83 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -135,7 +135,7 @@ #define PHYS_SDRAM_2_SIZE 0x20000000 /* 512 MB */ /* additions for new relocation code */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Basic environment settings */ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 215149af2e0..7b526f725af 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -123,7 +123,7 @@ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/vinco.h b/include/configs/vinco.h index a1572967618..df0e269b5d2 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -24,8 +24,8 @@ #define CONFIG_SYS_TIMER_COUNTER 0xfc06863c /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x4000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x4000000 /* MMC */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index a0846b3f7c9..7555d97c814 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -23,7 +23,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 2107bec6587..38b940d35ea 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -7,7 +7,7 @@ #define __VOCORE2_CONFIG_H__ /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index b4c757fd921..3acef221327 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -89,7 +89,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/warp7.h b/include/configs/warp7.h index a4b12dc55ed..cba215c379f 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -84,7 +84,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 054eb89d49c..32555c9b6af 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -16,8 +16,8 @@ /* * Memory configurations */ -#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE +#define CFG_SYS_SDRAM_SIZE SZ_128M #define CONFIG_RTC_DS1374 diff --git a/include/configs/xea.h b/include/configs/xea.h index 19ccf633c40..87f628d4ab8 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -23,7 +23,7 @@ /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Extra Environment */ #define CONFIG_HOSTNAME "xea" diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index 364dae0cd93..612436aeb48 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -11,7 +11,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_SYS_SDRAM_BASE +#undef CFG_SYS_SDRAM_BASE #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h index d2c0e91b32e..1b6e26ee396 100644 --- a/include/configs/xilinx_zynqmp_mini_nand.h +++ b/include/configs/xilinx_zynqmp_mini_nand.h @@ -12,7 +12,7 @@ #include -#define CONFIG_SYS_SDRAM_SIZE 0x1000000 -#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_SDRAM_SIZE 0x1000000 +#define CFG_SYS_SDRAM_BASE 0x0 #endif /* __CONFIG_ZYNQMP_MINI_NAND_H */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 7d0402feead..613ed959553 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -21,7 +21,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE (128 << 20) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index b93451cbe07..8739bb24841 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -42,12 +42,12 @@ */ #if XCHAL_HAVE_PTP_MMU || CONFIG_BOARD_SDRAM_SIZE < 0x10000000 -#define CONFIG_SYS_SDRAM_SIZE CONFIG_BOARD_SDRAM_SIZE +#define CFG_SYS_SDRAM_SIZE CONFIG_BOARD_SDRAM_SIZE #else -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 +#define CFG_SYS_SDRAM_SIZE 0x10000000 #endif -#define CONFIG_SYS_SDRAM_BASE MEMADDR(0x00000000) +#define CFG_SYS_SDRAM_BASE MEMADDR(0x00000000) /* Lx60 can only map 128kb memory (instead of 256kb) when running under OCD */ @@ -70,12 +70,12 @@ #endif #if defined(CONFIG_MAX_MEM_MAPPED) && \ - CONFIG_MAX_MEM_MAPPED < CONFIG_SYS_SDRAM_SIZE + CONFIG_MAX_MEM_MAPPED < CFG_SYS_SDRAM_SIZE #define XTENSA_SYS_TEXT_ADDR \ (MEMADDR(CONFIG_MAX_MEM_MAPPED) - CONFIG_SYS_MONITOR_LEN) #else #define XTENSA_SYS_TEXT_ADDR \ - (MEMADDR(CONFIG_SYS_SDRAM_SIZE) - CONFIG_SYS_MONITOR_LEN) + (MEMADDR(CFG_SYS_SDRAM_SIZE) - CONFIG_SYS_MONITOR_LEN) #endif /*==============================*/ diff --git a/include/init.h b/include/init.h index d40d11f33d2..699dc2482c0 100644 --- a/include/init.h +++ b/include/init.h @@ -90,8 +90,8 @@ int dram_init(void); * * If this is not provided, a default implementation will try to set up a * single bank. It will do this if CONFIG_NR_DRAM_BANKS and - * CONFIG_SYS_SDRAM_BASE are set. The bank will have a start address of - * CONFIG_SYS_SDRAM_BASE and the size will be determined by a call to + * CFG_SYS_SDRAM_BASE are set. The bank will have a start address of + * CFG_SYS_SDRAM_BASE and the size will be determined by a call to * get_effective_memsize(). * * Return: 0 if OK, -ve on error diff --git a/include/system-constants.h b/include/system-constants.h index 83b41b384f3..07c3505e8f5 100644 --- a/include/system-constants.h +++ b/include/system-constants.h @@ -12,7 +12,7 @@ #define SYS_INIT_SP_ADDR CONFIG_CUSTOM_SYS_INIT_SP_ADDR #else #ifdef CONFIG_MIPS -#define SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET) +#define SYS_INIT_SP_ADDR (CFG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET) #else #define SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -- cgit v1.2.3 From 3b8dfc42a239cbb1561e7ecbc116b69fb6913355 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:38 -0500 Subject: Convert CONFIG_SYS_TIMER_COUNTS_DOWN to Kconfig This converts the following to Kconfig: CONFIG_SYS_TIMER_COUNTS_DOWN Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/rcar-gen2-common.h | 1 - include/configs/socfpga_common.h | 1 - include/configs/vexpress_common.h | 1 - include/configs/zynq-common.h | 1 - 4 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 61b9447ea5f..606a0a7ecde 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -22,7 +22,6 @@ /* Timer */ #define CONFIG_TMU_TIMER -#define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ #define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 8) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 2656c977673..7ef7c5da828 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -55,7 +55,6 @@ */ #ifndef CONFIG_TIMER #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS -#define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) #ifndef CONFIG_SYS_TIMER_RATE #define CONFIG_SYS_TIMER_RATE 25000000 diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index ef136c75a83..de571f63ee1 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -114,7 +114,6 @@ #define CONFIG_SYS_TIMER_RATE 1000000 #define CONFIG_SYS_TIMER_COUNTER (V2M_TIMER01 + 0x4) -#define CONFIG_SYS_TIMER_COUNTS_DOWN /* PL011 Serial Configuration */ #define CONFIG_PL011_CLOCK 24000000 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 6574cf92e26..2d6522af81b 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -16,7 +16,6 @@ #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR -#define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) /* GUIDs for capsule updatable firmware images */ -- cgit v1.2.3 From 97396cc9ce9963ece8778b3a7c6f918745ef25b2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:39 -0500 Subject: Convert CONFIG_SYS_SRIO et al to Kconfig This converts the following to Kconfig: CONFIG_SRIO1 CONFIG_SRIO2 CONFIG_SRIO_PCIE_BOOT_MASTER CONFIG_SYS_SRIO Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/MPC8548CDS.h | 3 --- include/configs/P2041RDB.h | 5 ----- include/configs/T102xRDB.h | 2 -- include/configs/T208xQDS.h | 6 ------ include/configs/T208xRDB.h | 1 - 5 files changed, 17 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 6a51149a949..eb75f8b37d5 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -13,9 +13,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SRIO -#define CONFIG_SRIO1 /* SRIO port 1 */ - #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ #ifndef __ASSEMBLY__ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index d7e06d23ec4..be8d09f6dd7 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -32,11 +32,6 @@ #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_SYS_SRIO -#define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_SRIO2 /* SRIO port 2 */ -#define CONFIG_SRIO_PCIE_BOOT_MASTER - #ifndef __ASSEMBLY__ #include #endif diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 616387f4876..f9f9318448b 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -49,8 +49,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -/* PCIe Boot - Master */ -#define CONFIG_SRIO_PCIE_BOOT_MASTER /* * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 8f56de40ce8..acaad1bfc82 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -14,11 +14,6 @@ #include #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ -#if defined(CONFIG_ARCH_T2080) -#define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */ -#define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_SRIO2 /* SRIO port 2 */ -#endif /* High Level Configuration Options */ @@ -52,7 +47,6 @@ #endif /* CONFIG_RAMBOOT_PBL */ -#define CONFIG_SRIO_PCIE_BOOT_MASTER #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index e9db4a224f9..7315afa39f8 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -47,7 +47,6 @@ #endif /* CONFIG_RAMBOOT_PBL */ -#define CONFIG_SRIO_PCIE_BOOT_MASTER #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) -- cgit v1.2.3 From a322afc9f9b69dd52a9bc72937cd5adc18ea55c7 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:40 -0500 Subject: global: Move remaining CONFIG_*SRIO_* to CFG_* The rest of the unmigrated CONFIG symbols in the SRIO namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/MPC8548CDS.h | 8 ++++---- include/configs/P2041RDB.h | 46 ++++++++++++++++++++++---------------------- include/configs/T102xRDB.h | 38 ++++++++++++++++++------------------ include/configs/T208xQDS.h | 42 ++++++++++++++++++++-------------------- include/configs/T208xRDB.h | 42 ++++++++++++++++++++-------------------- 5 files changed, 88 insertions(+), 88 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index eb75f8b37d5..25b4fe0c7d4 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -282,13 +282,13 @@ /* * RapidIO MMU */ -#define CONFIG_SYS_SRIO1_MEM_VIRT 0xc0000000 +#define CFG_SYS_SRIO1_MEM_VIRT 0xc0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc40000000ull +#define CFG_SYS_SRIO1_MEM_PHYS 0xc40000000ull #else -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc0000000 +#define CFG_SYS_SRIO1_MEM_PHYS 0xc0000000 #endif -#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ +#define CFG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ #if defined(CONFIG_TSEC_ENET) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index be8d09f6dd7..c3ef2163335 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -18,9 +18,9 @@ #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) +#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) +#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ + (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif @@ -173,49 +173,49 @@ /* * RapidIO */ -#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 +#define CFG_SYS_SRIO1_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull +#define CFG_SYS_SRIO1_MEM_PHYS 0xc20000000ull #else -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xa0000000 +#define CFG_SYS_SRIO1_MEM_PHYS 0xa0000000 #endif -#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 +#define CFG_SYS_SRIO2_MEM_VIRT 0xb0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull +#define CFG_SYS_SRIO2_MEM_PHYS 0xc30000000ull #else -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xb0000000 +#define CFG_SYS_SRIO2_MEM_PHYS 0xb0000000 #endif -#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ /* * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ /* slave core release by master*/ -#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 -#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ +#define CFG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 +#define CFG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ /* * SRIO_PCIE_BOOT - SLAVE */ #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) +#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 +#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ + (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) #endif /* diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index f9f9318448b..b567b63980e 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -53,40 +53,40 @@ * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull #else -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xef200000 -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0xfff00000 +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xef200000 +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0xfff00000 #endif /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull #else -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xef100000 -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0xffe00000 +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xef100000 +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0xffe00000 #endif -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ /* slave core release by master*/ -#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 -#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ +#define CFG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 +#define CFG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ /* PCIe Boot - Slave */ #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) +#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 +#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ + (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) /* Set 1M boot space for PCIe boot */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) +#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) +#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ + (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index acaad1bfc82..798822e5031 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -49,9 +49,9 @@ #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) +#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) +#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ + (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif @@ -295,39 +295,39 @@ /* * RapidIO */ -#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_SYS_SRIO1_MEM_VIRT 0xa0000000 +#define CFG_SYS_SRIO1_MEM_PHYS 0xc20000000ull +#define CFG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_SYS_SRIO2_MEM_VIRT 0xb0000000 +#define CFG_SYS_SRIO2_MEM_PHYS 0xc30000000ull +#define CFG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ /* * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ /* slave core release by master*/ -#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 -#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ +#define CFG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 +#define CFG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ /* * SRIO_PCIE_BOOT - SLAVE */ #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) +#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 +#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ + (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) #endif /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 7315afa39f8..ea366b671c0 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -49,9 +49,9 @@ #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE /* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) +#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) +#define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ + (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif @@ -254,39 +254,39 @@ /* * RapidIO */ -#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_SYS_SRIO1_MEM_VIRT 0xa0000000 +#define CFG_SYS_SRIO1_MEM_PHYS 0xc20000000ull +#define CFG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ +#define CFG_SYS_SRIO2_MEM_VIRT 0xb0000000 +#define CFG_SYS_SRIO2_MEM_PHYS 0xc30000000ull +#define CFG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ /* * for slave u-boot IMAGE instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef200000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff00000ull +#define CFG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x100000 /* 1M */ +#define CFG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff00000ull /* * for slave UCODE and ENV instored in master memory space, * PHYS must be aligned based on the SIZE */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef100000ull +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull +#define CFG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ /* slave core release by master*/ -#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 -#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ +#define CFG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 +#define CFG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ /* * SRIO_PCIE_BOOT - SLAVE */ #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) +#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 +#define CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ + (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) #endif /* -- cgit v1.2.3 From 65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 16 Nov 2022 13:10:41 -0500 Subject: global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/config_fallbacks.h | 4 +- include/configs/M5208EVBE.h | 42 ++--- include/configs/M5235EVB.h | 52 +++--- include/configs/M5249EVB.h | 66 +++---- include/configs/M5253DEMO.h | 86 ++++----- include/configs/M5272C3.h | 48 ++--- include/configs/M5275EVB.h | 48 ++--- include/configs/M5282EVB.h | 68 +++---- include/configs/M53017EVB.h | 54 +++--- include/configs/M5329EVB.h | 56 +++--- include/configs/M5373EVB.h | 56 +++--- include/configs/MCR3000.h | 8 +- include/configs/MPC837XERDB.h | 60 +++--- include/configs/MPC8548CDS.h | 58 +++--- include/configs/P1010RDB.h | 146 +++++++-------- include/configs/P2041RDB.h | 132 ++++++------- include/configs/SBx81LIFKW.h | 4 +- include/configs/SBx81LIFXCAT.h | 4 +- include/configs/T102xRDB.h | 209 ++++++++++----------- include/configs/T104xRDB.h | 228 +++++++++++------------ include/configs/T208xQDS.h | 226 +++++++++++------------ include/configs/T208xRDB.h | 192 +++++++++---------- include/configs/T4240RDB.h | 206 ++++++++++----------- include/configs/am335x_evm.h | 4 +- include/configs/am3517_evm.h | 2 +- include/configs/am43xx_evm.h | 4 +- include/configs/am57xx_evm.h | 6 +- include/configs/amcore.h | 44 ++--- include/configs/ap121.h | 4 +- include/configs/ap143.h | 4 +- include/configs/ap152.h | 4 +- include/configs/apalis_imx6.h | 4 +- include/configs/arbel.h | 6 +- include/configs/aristainetos2.h | 6 +- include/configs/aspeed-common.h | 8 +- include/configs/astro_mcf5373l.h | 68 +++---- include/configs/at91-sama5_common.h | 4 +- include/configs/at91sam9260ek.h | 12 +- include/configs/at91sam9261ek.h | 10 +- include/configs/at91sam9263ek.h | 56 +++--- include/configs/at91sam9m10g45ek.h | 12 +- include/configs/at91sam9n12ek.h | 12 +- include/configs/at91sam9rlek.h | 8 +- include/configs/at91sam9x5ek.h | 12 +- include/configs/ax25-ae350.h | 8 +- include/configs/axs10x.h | 4 +- include/configs/bcm7260.h | 2 +- include/configs/bcm7445.h | 2 +- include/configs/bcm963138.h | 2 +- include/configs/bcmstb.h | 4 +- include/configs/bk4r1.h | 4 +- include/configs/blanche.h | 8 +- include/configs/bmips_bcm3380.h | 2 +- include/configs/bmips_bcm6318.h | 2 +- include/configs/bmips_bcm63268.h | 2 +- include/configs/bmips_bcm6328.h | 2 +- include/configs/bmips_bcm6338.h | 4 +- include/configs/bmips_bcm6348.h | 4 +- include/configs/bmips_bcm6358.h | 4 +- include/configs/bmips_bcm6362.h | 2 +- include/configs/bmips_bcm6368.h | 4 +- include/configs/bmips_bcm6838.h | 2 +- include/configs/bmips_common.h | 2 +- include/configs/boston.h | 2 +- include/configs/brppt2.h | 6 +- include/configs/bur_am335x_common.h | 2 +- include/configs/cgtqmx8.h | 2 +- include/configs/ci20.h | 2 +- include/configs/cl-som-imx7.h | 8 +- include/configs/cm_fx6.h | 6 +- include/configs/cm_t43.h | 4 +- include/configs/cobra5272.h | 48 ++--- include/configs/colibri-imx6ull.h | 4 +- include/configs/colibri_imx6.h | 4 +- include/configs/colibri_imx7.h | 4 +- include/configs/colibri_vf.h | 4 +- include/configs/corvus.h | 12 +- include/configs/da850evm.h | 36 ++-- include/configs/dart_6ul.h | 4 +- include/configs/devkit3250.h | 4 +- include/configs/dh_imx6.h | 4 +- include/configs/display5.h | 10 +- include/configs/dra7xx_evm.h | 10 +- include/configs/draak.h | 4 +- include/configs/dragonboard845c.h | 2 +- include/configs/eb_cpu5282.h | 86 ++++----- include/configs/ebisu.h | 4 +- include/configs/edison.h | 2 +- include/configs/el6x_common.h | 4 +- include/configs/embestmx6boards.h | 4 +- include/configs/etamin.h | 2 +- include/configs/ethernut5.h | 16 +- include/configs/evb_ast2500.h | 2 +- include/configs/evb_ast2600.h | 2 +- include/configs/exynos5-dt-common.h | 2 +- include/configs/exynos78x0-common.h | 2 +- include/configs/gardena-smart-gateway-at91sam.h | 12 +- include/configs/gardena-smart-gateway-mt7688.h | 8 +- include/configs/gazerbeam.h | 14 +- include/configs/ge_b1x5v2.h | 4 +- include/configs/ge_bx50v3.h | 6 +- include/configs/gw_ventana.h | 4 +- include/configs/highbank.h | 2 +- include/configs/hikey.h | 2 +- include/configs/hikey960.h | 2 +- include/configs/hsdk-4xd.h | 4 +- include/configs/hsdk.h | 4 +- include/configs/imx27lite-common.h | 2 +- include/configs/imx6-engicam.h | 4 +- include/configs/imx6_logic.h | 4 +- include/configs/imx6dl-mamoj.h | 4 +- include/configs/imx6q-bosch-acc.h | 4 +- include/configs/imx6ulz_smm_m2.h | 4 +- include/configs/imx7-cm.h | 4 +- include/configs/imx8mm-cl-iot-gate.h | 6 +- include/configs/imx8mm_beacon.h | 6 +- include/configs/imx8mm_data_modul_edm_sbc.h | 4 +- include/configs/imx8mm_evk.h | 8 +- include/configs/imx8mm_icore_mx8mm.h | 6 +- include/configs/imx8mm_venice.h | 6 +- include/configs/imx8mn_beacon.h | 6 +- include/configs/imx8mn_bsh_smm_s2_common.h | 6 +- include/configs/imx8mn_evk.h | 6 +- include/configs/imx8mn_var_som.h | 6 +- include/configs/imx8mn_venice.h | 6 +- include/configs/imx8mp_dhcom_pdk2.h | 4 +- include/configs/imx8mp_evk.h | 6 +- include/configs/imx8mp_icore_mx8mp.h | 6 +- include/configs/imx8mp_rsb3720.h | 6 +- include/configs/imx8mp_venice.h | 6 +- include/configs/imx8mq_cm.h | 4 +- include/configs/imx8mq_evk.h | 4 +- include/configs/imx8mq_phanbell.h | 4 +- include/configs/imx8qm_rom7720.h | 2 +- include/configs/imx8ulp_evk.h | 6 +- include/configs/imx93_evk.h | 6 +- include/configs/imxrt1020-evk.h | 2 +- include/configs/imxrt1050-evk.h | 2 +- include/configs/imxrt1170-evk.h | 2 +- include/configs/integrator-common.h | 4 +- include/configs/integratorap.h | 4 +- include/configs/integratorcp.h | 2 +- include/configs/j721e_evm.h | 6 +- include/configs/j721s2_evm.h | 4 +- include/configs/km/keymile-common.h | 2 +- include/configs/km/km-mpc832x.h | 32 ++-- include/configs/km/km-mpc8360.h | 32 ++-- include/configs/km/km-mpc83xx.h | 20 +- include/configs/km/pg-wcom-ls102xa.h | 86 ++++----- include/configs/kmcent2.h | 204 ++++++++++---------- include/configs/kmcoge5ne.h | 6 +- include/configs/kmeter1.h | 2 +- include/configs/kontron-sl-mx6ul.h | 6 +- include/configs/kontron-sl-mx8mm.h | 4 +- include/configs/kontron_pitx_imx8m.h | 4 +- include/configs/kontron_sl28.h | 8 +- include/configs/kp_imx53.h | 4 +- include/configs/kp_imx6q_tpc.h | 4 +- include/configs/lacie_kw.h | 2 +- include/configs/legoev3.h | 10 +- include/configs/librem5.h | 4 +- include/configs/linkit-smart-7688.h | 8 +- include/configs/liteboard.h | 4 +- include/configs/ls1012a_common.h | 6 +- include/configs/ls1012aqds.h | 4 +- include/configs/ls1021aiot.h | 10 +- include/configs/ls1021aqds.h | 174 ++++++++--------- include/configs/ls1021atsn.h | 10 +- include/configs/ls1021atwr.h | 74 ++++---- include/configs/ls1028a_common.h | 6 +- include/configs/ls1028aqds.h | 12 +- include/configs/ls1028ardb.h | 10 +- include/configs/ls1043a_common.h | 20 +- include/configs/ls1043aqds.h | 224 +++++++++++----------- include/configs/ls1043ardb.h | 146 +++++++-------- include/configs/ls1046a_common.h | 8 +- include/configs/ls1046afrwy.h | 22 +-- include/configs/ls1046aqds.h | 236 ++++++++++++------------ include/configs/ls1046ardb.h | 56 +++--- include/configs/ls1088a_common.h | 36 ++-- include/configs/ls1088aqds.h | 216 +++++++++++----------- include/configs/ls1088ardb.h | 80 ++++---- include/configs/ls2080a_common.h | 36 ++-- include/configs/ls2080aqds.h | 158 ++++++++-------- include/configs/ls2080ardb.h | 110 +++++------ include/configs/lx2160a_common.h | 40 ++-- include/configs/lx2160aqds.h | 2 +- include/configs/lx2160ardb.h | 2 +- include/configs/lx2162aqds.h | 2 +- include/configs/m53menlo.h | 10 +- include/configs/malta.h | 6 +- include/configs/mccmon6.h | 14 +- include/configs/meerkat96.h | 4 +- include/configs/meesc.h | 8 +- include/configs/microblaze-generic.h | 4 +- include/configs/msc_sm2s_imx8mp.h | 6 +- include/configs/mt7620.h | 6 +- include/configs/mt7621.h | 6 +- include/configs/mt7622.h | 4 +- include/configs/mt7628.h | 8 +- include/configs/mt7629.h | 2 +- include/configs/mt7981.h | 4 +- include/configs/mt7986.h | 4 +- include/configs/mt8512.h | 2 +- include/configs/mv-common.h | 6 +- include/configs/mvebu_alleycat-5.h | 4 +- include/configs/mvebu_armada-37xx.h | 2 +- include/configs/mvebu_armada-8k.h | 4 +- include/configs/mx51evk.h | 10 +- include/configs/mx53cx9020.h | 4 +- include/configs/mx53loco.h | 6 +- include/configs/mx53ppd.h | 6 +- include/configs/mx6_common.h | 2 +- include/configs/mx6cuboxi.h | 4 +- include/configs/mx6memcal.h | 4 +- include/configs/mx6sabre_common.h | 4 +- include/configs/mx6sabreauto.h | 4 +- include/configs/mx6slevk.h | 4 +- include/configs/mx6sllevk.h | 4 +- include/configs/mx6sxsabreauto.h | 4 +- include/configs/mx6sxsabresd.h | 4 +- include/configs/mx6ul_14x14_evk.h | 4 +- include/configs/mx6ullevk.h | 4 +- include/configs/mx7dsabresd.h | 4 +- include/configs/mx7ulp_com.h | 6 +- include/configs/mx7ulp_evk.h | 6 +- include/configs/mxs.h | 6 +- include/configs/mys_6ulx.h | 4 +- include/configs/nitrogen6x.h | 4 +- include/configs/nokia_rx51.h | 10 +- include/configs/novena.h | 4 +- include/configs/npi_imx6ull.h | 4 +- include/configs/nsim.h | 4 +- include/configs/o4-imx6ull-nano.h | 4 +- include/configs/octeon_common.h | 4 +- include/configs/odroid.h | 2 +- include/configs/omap3_beagle.h | 2 +- include/configs/omap3_evm.h | 2 +- include/configs/omap3_igep00x0.h | 4 +- include/configs/omap3_logic.h | 4 +- include/configs/omap5_uevm.h | 4 +- include/configs/omapl138_lcdk.h | 32 ++-- include/configs/opos6uldev.h | 4 +- include/configs/p1_p2_bootsrc.h | 6 +- include/configs/p1_p2_rdb_pc.h | 164 ++++++++-------- include/configs/pcl063.h | 4 +- include/configs/pcl063_ull.h | 4 +- include/configs/pcm052.h | 4 +- include/configs/pcm058.h | 4 +- include/configs/pg-wcom-expu1.h | 16 +- include/configs/pg-wcom-seli8.h | 16 +- include/configs/phycore_imx8mm.h | 6 +- include/configs/phycore_imx8mp.h | 6 +- include/configs/pic32mzdask.h | 6 +- include/configs/pico-imx6.h | 4 +- include/configs/pico-imx6ul.h | 4 +- include/configs/pico-imx7d.h | 4 +- include/configs/pico-imx8mq.h | 4 +- include/configs/pm9261.h | 52 +++--- include/configs/pm9263.h | 56 +++--- include/configs/pm9g45.h | 12 +- include/configs/poleg.h | 4 +- include/configs/presidio_asic.h | 16 +- include/configs/qcs404-evb.h | 2 +- include/configs/qemu-ppce500.h | 34 ++-- include/configs/r2dplus.h | 6 +- include/configs/rcar-gen2-common.h | 6 +- include/configs/rcar-gen3-common.h | 2 +- include/configs/rk3036_common.h | 2 +- include/configs/rk3128_common.h | 2 +- include/configs/rk322x_common.h | 2 +- include/configs/rk3288_common.h | 2 +- include/configs/rpi.h | 6 +- include/configs/rv1108_common.h | 6 +- include/configs/s5p_goni.h | 2 +- include/configs/s5pc210_universal.h | 2 +- include/configs/salvator-x.h | 4 +- include/configs/sam9x60_curiosity.h | 4 +- include/configs/sam9x60ek.h | 4 +- include/configs/sama5d27_som1_ek.h | 4 +- include/configs/sama5d27_wlsom1_ek.h | 4 +- include/configs/sama5d2_icp.h | 4 +- include/configs/sama5d2_ptc_ek.h | 4 +- include/configs/sama5d3xek.h | 2 +- include/configs/sama7g5ek.h | 4 +- include/configs/sandbox.h | 2 +- include/configs/sdm845.h | 2 +- include/configs/siemens-am33x-common.h | 2 +- include/configs/smartweb.h | 18 +- include/configs/smdkc100.h | 2 +- include/configs/smegw01.h | 4 +- include/configs/snapper9g45.h | 8 +- include/configs/sniper.h | 4 +- include/configs/socfpga_arria10_socdk.h | 2 +- include/configs/socfpga_arria5_secu1.h | 4 +- include/configs/socfpga_chameleonv3.h | 2 +- include/configs/socfpga_common.h | 24 +-- include/configs/socfpga_soc64_common.h | 4 +- include/configs/socrates.h | 66 +++---- include/configs/somlabs_visionsom_6ull.h | 4 +- include/configs/stemmy.h | 2 +- include/configs/stih410-b2260.h | 4 +- include/configs/stm32f429-discovery.h | 4 +- include/configs/stm32f429-evaluation.h | 6 +- include/configs/stm32f469-discovery.h | 6 +- include/configs/stm32f746-disco.h | 8 +- include/configs/stm32h743-disco.h | 6 +- include/configs/stm32h743-eval.h | 6 +- include/configs/stm32h750-art-pi.h | 6 +- include/configs/stm32mp13_common.h | 2 +- include/configs/stm32mp13_st_common.h | 2 +- include/configs/stm32mp15_common.h | 2 +- include/configs/stm32mp15_st_common.h | 2 +- include/configs/stmark2.h | 42 ++--- include/configs/stv0991.h | 6 +- include/configs/sunxi-common.h | 4 +- include/configs/synquacer.h | 8 +- include/configs/taurus.h | 18 +- include/configs/tb100.h | 4 +- include/configs/tbs2910.h | 6 +- include/configs/tegra-common.h | 10 +- include/configs/ten64.h | 2 +- include/configs/thunderx_88xx.h | 6 +- include/configs/ti814x_evm.h | 2 +- include/configs/ti816x_evm.h | 2 +- include/configs/ti_am335x_common.h | 2 +- include/configs/ti_armv7_keystone2.h | 8 +- include/configs/ti_omap3_common.h | 4 +- include/configs/ti_omap4_common.h | 4 +- include/configs/ti_omap5_common.h | 2 +- include/configs/total_compute.h | 2 +- include/configs/tplink_wdr4300.h | 4 +- include/configs/tqma6.h | 4 +- include/configs/tqma6_wru4.h | 4 +- include/configs/trats.h | 2 +- include/configs/trats2.h | 2 +- include/configs/turris_mox.h | 2 +- include/configs/udoo.h | 4 +- include/configs/udoo_neo.h | 4 +- include/configs/ulcb.h | 4 +- include/configs/uniphier.h | 6 +- include/configs/usb_a9263.h | 8 +- include/configs/usbarmory.h | 4 +- include/configs/vcoreiii.h | 2 +- include/configs/verdin-imx8mm.h | 6 +- include/configs/verdin-imx8mp.h | 6 +- include/configs/vexpress_aemv8.h | 4 +- include/configs/vexpress_common.h | 18 +- include/configs/vf610twr.h | 4 +- include/configs/vinco.h | 4 +- include/configs/vining_2000.h | 4 +- include/configs/vocore2.h | 6 +- include/configs/wandboard.h | 4 +- include/configs/warp7.h | 4 +- include/configs/work_92105.h | 2 +- include/configs/x530.h | 2 +- include/configs/x86-common.h | 2 +- include/configs/xea.h | 6 +- include/configs/xilinx_versal.h | 2 +- include/configs/xilinx_versal_net.h | 2 +- include/configs/xilinx_zynqmp.h | 8 +- include/configs/xilinx_zynqmp_r5.h | 6 +- include/configs/xpress.h | 4 +- include/configs/xtfpga.h | 40 ++-- include/configs/zynq-common.h | 20 +- include/configs/zynq_cse.h | 8 +- include/fsl-mc/fsl_mc.h | 2 +- include/fsl_ifc.h | 2 +- include/i2c.h | 16 +- include/mpc85xx.h | 34 ++-- include/mpc86xx.h | 6 +- include/mtd/cfi_flash.h | 4 +- include/mvebu_mmc.h | 2 +- include/post.h | 4 +- include/spl.h | 2 +- include/system-constants.h | 4 +- include/tca642x.h | 8 +- include/tsec.h | 4 +- 378 files changed, 3257 insertions(+), 3256 deletions(-) (limited to 'include') diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h index 17c76bcf3db..d60f494b58b 100644 --- a/include/config_fallbacks.h +++ b/include/config_fallbacks.h @@ -17,8 +17,8 @@ #endif #endif -#ifndef CONFIG_SYS_BAUDRATE_TABLE -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#ifndef CFG_SYS_BAUDRATE_TABLE +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #endif #endif /* __CONFIG_FALLBACKS_H */ diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 6dfa3dd0f02..246437a51e2 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -13,7 +13,7 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #define CONFIG_WATCHDOG_TIMEOUT 5000 @@ -41,11 +41,11 @@ #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */ -#define CONFIG_SYS_PLL_ODR 0x36 -#define CONFIG_SYS_PLL_FDR 0x7D +#define CFG_SYS_CLK 166666666 /* CPU Core Clock */ +#define CFG_SYS_PLL_ODR 0x36 +#define CFG_SYS_PLL_FDR 0x7D -#define CONFIG_SYS_MBAR 0xFC000000 +#define CFG_SYS_MBAR 0xFC000000 /* * Low Level Configuration Settings @@ -53,9 +53,9 @@ * You should know what you are doing if you make changes here. */ /* Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_RAM_CTRL 0x221 +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_CTRL 0x221 /* * Start addresses for the final memory configuration @@ -75,14 +75,14 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ +# define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #endif -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE /* * Configuration for environment @@ -95,15 +95,15 @@ /* Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ CF_CACR_CEIB | CF_CACR_DCM | \ CF_CACR_EUSP) @@ -117,8 +117,8 @@ * CS4 - Available * CS5 - Available */ -#define CONFIG_SYS_CS0_BASE 0 -#define CONFIG_SYS_CS0_MASK 0x007F0001 -#define CONFIG_SYS_CS0_CTRL 0x00001FA0 +#define CFG_SYS_CS0_BASE 0 +#define CFG_SYS_CS0_MASK 0x007F0001 +#define CFG_SYS_CS0_CTRL 0x00001FA0 #endif /* _M5208EVBE_H */ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index e28662c6e59..128ef50b476 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -18,14 +18,14 @@ * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ /* I2C */ -#define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) -#define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) -#define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) +#define CFG_SYS_I2C_PINMUX_REG (gpio->par_qspi) +#define CFG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) +#define CFG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) /* this must be included AFTER the definition of CONFIG COMMANDS (if any) */ #ifdef CONFIG_MCFFEC @@ -50,10 +50,10 @@ #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_CLK 75000000 -#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2 +#define CFG_SYS_CLK 75000000 +#define CFG_SYS_CPU_CLK CFG_SYS_CLK * 2 -#define CONFIG_SYS_MBAR 0x40000000 +#define CFG_SYS_MBAR 0x40000000 /* * Low Level Configuration Settings @@ -63,9 +63,9 @@ /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_RAM_CTRL 0x21 +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_CTRL 0x21 /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -81,16 +81,16 @@ * the maximum mapped by the Linux kernel during initialization ?? */ /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ +# define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #endif -#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) +#define CFG_SYS_FLASH_BASE (CFG_SYS_CS0_BASE) /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -104,15 +104,15 @@ * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINV) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DCM | \ CF_CACR_EUSP) @@ -130,13 +130,13 @@ * CS7 - Available */ #ifdef CONFIG_NORFLASH_PS32BIT -# define CONFIG_SYS_CS0_BASE 0xFFC00000 -# define CONFIG_SYS_CS0_MASK 0x003f0001 -# define CONFIG_SYS_CS0_CTRL 0x00001D00 +# define CFG_SYS_CS0_BASE 0xFFC00000 +# define CFG_SYS_CS0_MASK 0x003f0001 +# define CFG_SYS_CS0_CTRL 0x00001D00 #else -# define CONFIG_SYS_CS0_BASE 0xFFE00000 -# define CONFIG_SYS_CS0_MASK 0x001f0001 -# define CONFIG_SYS_CS0_CTRL 0x00001D80 +# define CFG_SYS_CS0_BASE 0xFFE00000 +# define CFG_SYS_CS0_MASK 0x001f0001 +# define CFG_SYS_CS0_CTRL 0x00001D80 #endif #endif /* _M5329EVB_H */ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index f1da278d515..0e38eeb4a36 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -18,7 +18,7 @@ * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ @@ -26,9 +26,9 @@ * Clock configuration: enable only one of the following options */ -#undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */ -#define CONFIG_SYS_FAST_CLK 1 /* MCF5249 can run at 140MHz */ -#define CONFIG_SYS_CLK 132025600 /* MCF5249 can run at 140MHz */ +#undef CFG_SYS_PLL_BYPASS /* bypass PLL for test purpose */ +#define CFG_SYS_FAST_CLK 1 /* MCF5249 can run at 140MHz */ +#define CFG_SYS_CLK 132025600 /* MCF5249 can run at 140MHz */ /* * Low Level Configuration Settings @@ -36,14 +36,14 @@ * You should know what you are doing if you make changes here. */ -#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ -#define CONFIG_SYS_MBAR2 0x80000000 +#define CFG_SYS_MBAR 0x10000000 /* Register Base Addrs */ +#define CFG_SYS_MBAR2 0x80000000 /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ #define LDS_BOARD_TEXT \ . = DEFINED(env_offset) ? env_offset : .; \ @@ -56,7 +56,7 @@ */ #define CFG_SYS_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) +#define CFG_SYS_FLASH_BASE (CFG_SYS_CS0_BASE) #if 0 /* test-only */ #define CONFIG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */ @@ -67,33 +67,33 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +# define CFG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ +# define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } #endif /*----------------------------------------------------------------------- * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_DCM) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_DCM) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_FLASH_BASE | \ CF_ADDRMASK(2) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ACR1 (CFG_SYS_SDRAM_BASE | \ +#define CFG_SYS_CACHE_ACR1 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ CF_CACR_DBWE) /*----------------------------------------------------------------------- @@ -101,25 +101,25 @@ */ /* CS0 - AMD Flash, address 0xffc00000 */ -#define CONFIG_SYS_CS0_BASE 0xffe00000 -#define CONFIG_SYS_CS0_CTRL 0x00001980 /* WS=0110, AA=1, PS=10 */ +#define CFG_SYS_CS0_BASE 0xffe00000 +#define CFG_SYS_CS0_CTRL 0x00001980 /* WS=0110, AA=1, PS=10 */ /** Note: There is a CSMR0/DRAM vector problem, need to disable C/I ***/ -#define CONFIG_SYS_CS0_MASK 0x003f0021 /* 4MB, AA=0, WP=0, C/I=1, V=1 */ +#define CFG_SYS_CS0_MASK 0x003f0021 /* 4MB, AA=0, WP=0, C/I=1, V=1 */ /* CS1 - FPGA, address 0xe0000000 */ -#define CONFIG_SYS_CS1_BASE 0xe0000000 -#define CONFIG_SYS_CS1_CTRL 0x00000d80 /* WS=0011, AA=1, PS=10 */ -#define CONFIG_SYS_CS1_MASK 0x00010001 /* 128kB, AA=0, WP=0, C/I=0, V=1*/ +#define CFG_SYS_CS1_BASE 0xe0000000 +#define CFG_SYS_CS1_CTRL 0x00000d80 /* WS=0011, AA=1, PS=10 */ +#define CFG_SYS_CS1_MASK 0x00010001 /* 128kB, AA=0, WP=0, C/I=0, V=1*/ /*----------------------------------------------------------------------- * Port configuration */ -#define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */ -#define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54*/ -#define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */ -#define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */ -#define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */ -#define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ -#define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */ +#define CFG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */ +#define CFG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54*/ +#define CFG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */ +#define CFG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */ +#define CFG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */ +#define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ +#define CFG_SYS_GPIO1_LED 0x00400000 /* user led */ #endif /* M5249 */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index bd3c57d1438..7e37c6d1199 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -8,7 +8,7 @@ #include -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) /* Configuration for environment @@ -20,7 +20,7 @@ env/embedded.o(.text*); #ifdef CONFIG_DRIVER_DM9000 -# define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300) +# define CONFIG_DM9000_BASE (CFG_SYS_CS1_BASE | 0x300) # define DM9000_IO CONFIG_DM9000_BASE # define DM9000_DATA (CONFIG_DM9000_BASE + 4) # undef CONFIG_DM9000_DEBUG @@ -45,18 +45,18 @@ #define CONFIG_HOSTNAME "M5253DEMO" /* I2C */ -#define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C)) -#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF) -#define CONFIG_SYS_I2C_PINMUX_SET (0) - -#undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */ -#define CONFIG_SYS_FAST_CLK -#ifdef CONFIG_SYS_FAST_CLK -# define CONFIG_SYS_PLLCR 0x1243E054 -# define CONFIG_SYS_CLK 140000000 +#define CFG_SYS_I2C_PINMUX_REG (*(u32 *) (CFG_SYS_MBAR+0x19C)) +#define CFG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF) +#define CFG_SYS_I2C_PINMUX_SET (0) + +#undef CFG_SYS_PLL_BYPASS /* bypass PLL for test purpose */ +#define CFG_SYS_FAST_CLK +#ifdef CFG_SYS_FAST_CLK +# define CFG_SYS_PLLCR 0x1243E054 +# define CFG_SYS_CLK 140000000 #else -# define CONFIG_SYS_PLLCR 0x135a4140 -# define CONFIG_SYS_CLK 70000000 +# define CFG_SYS_PLLCR 0x135a4140 +# define CFG_SYS_CLK 70000000 #endif /* @@ -65,14 +65,14 @@ * You should know what you are doing if you make changes here. */ -#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ -#define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */ +#define CFG_SYS_MBAR 0x10000000 /* Register Base Addrs */ +#define CFG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */ /* * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ /* * Start addresses for the final memory configuration @@ -87,10 +87,10 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ -#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) +#define CFG_SYS_FLASH_BASE (CFG_SYS_CS0_BASE) #define FLASH_SST6401B 0x200 #define SST_ID_xF6401B 0x236D236D @@ -101,45 +101,45 @@ * Amd/Atmel use 0x30 for sector erase, SST use 0x50. * 0x30 is block erase in SST */ -# define CONFIG_SYS_FLASH_SIZE 0x800000 +# define CFG_SYS_FLASH_SIZE 0x800000 #else -# define CONFIG_SYS_SST_SECT 2048 -# define CONFIG_SYS_SST_SECTSZ 0x1000 +# define CFG_SYS_SST_SECT 2048 +# define CFG_SYS_SST_SECTSZ 0x1000 #endif /* Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_DCM) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_DCM) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_FLASH_BASE | \ CF_ADDRMASK(8) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ACR1 (CFG_SYS_SDRAM_BASE | \ +#define CFG_SYS_CACHE_ACR1 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ CF_CACR_DBWE) -#define CONFIG_SYS_CS0_BASE 0xFF800000 -#define CONFIG_SYS_CS0_MASK 0x007F0021 -#define CONFIG_SYS_CS0_CTRL 0x00001D80 +#define CFG_SYS_CS0_BASE 0xFF800000 +#define CFG_SYS_CS0_MASK 0x007F0021 +#define CFG_SYS_CS0_CTRL 0x00001D80 -#define CONFIG_SYS_CS1_BASE 0xE0000000 -#define CONFIG_SYS_CS1_MASK 0x00000001 -#define CONFIG_SYS_CS1_CTRL 0x00003DD8 +#define CFG_SYS_CS1_BASE 0xE0000000 +#define CFG_SYS_CS1_MASK 0x00000001 +#define CFG_SYS_CS1_CTRL 0x00003DD8 /*----------------------------------------------------------------------- * Port configuration */ -#define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */ -#define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */ -#define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */ -#define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */ -#define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */ -#define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ -#define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */ +#define CFG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */ +#define CFG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */ +#define CFG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */ +#define CFG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */ +#define CFG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */ +#define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */ +#define CFG_SYS_GPIO1_LED 0x00400000 /* user led */ #endif /* _M5253DEMO_H */ diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 7c3bc032bfe..847b4c2593d 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -17,7 +17,7 @@ * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ @@ -51,22 +51,22 @@ "save\0" \ "" -#define CONFIG_SYS_CLK 66000000 +#define CFG_SYS_CLK 66000000 /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) * You should know what you are doing if you make changes here. */ -#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ -#define CONFIG_SYS_SCR 0x0003 -#define CONFIG_SYS_SPR 0xffff +#define CFG_SYS_MBAR 0x10000000 /* Register Base Addrs */ +#define CFG_SYS_SCR 0x0003 +#define CFG_SYS_SPR 0xffff /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -75,35 +75,35 @@ */ #define CFG_SYS_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ -#define CONFIG_SYS_FLASH_BASE 0xffe00000 +#define CFG_SYS_FLASH_BASE 0xffe00000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ +# define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #endif /*----------------------------------------------------------------------- * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ CF_CACR_CEIB | CF_CACR_DCM | \ CF_CACR_EUSP) @@ -111,11 +111,11 @@ /*----------------------------------------------------------------------- * Port configuration */ -#define CONFIG_SYS_PACNT 0x00000000 -#define CONFIG_SYS_PADDR 0x0000 -#define CONFIG_SYS_PADAT 0x0000 -#define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */ -#define CONFIG_SYS_PBDDR 0x0000 -#define CONFIG_SYS_PBDAT 0x0000 -#define CONFIG_SYS_PDCNT 0x00000000 +#define CFG_SYS_PACNT 0x00000000 +#define CFG_SYS_PADDR 0x0000 +#define CFG_SYS_PADAT 0x0000 +#define CFG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */ +#define CFG_SYS_PBDDR 0x0000 +#define CFG_SYS_PBDAT 0x0000 +#define CFG_SYS_PDCNT 0x00000000 #endif /* _M5272C3_H */ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 4eb4abea725..ff9f8535896 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -21,7 +21,7 @@ * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -34,9 +34,9 @@ /* Available command configuration */ /* I2C */ -#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) -#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) -#define CONFIG_SYS_I2C_PINMUX_SET (0x000F) +#define CFG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) +#define CFG_SYS_I2C_PINMUX_CLR (0xFFF0) +#define CFG_SYS_I2C_PINMUX_SET (0x000F) #ifdef CONFIG_MCFFEC # define CONFIG_OVERWRITE_ETHADDR_ONCE @@ -54,7 +54,7 @@ "save\0" \ "" -#define CONFIG_SYS_CLK 150000000 +#define CFG_SYS_CLK 150000000 /* * Low Level Configuration Settings @@ -62,13 +62,13 @@ * You should know what you are doing if you make changes here. */ -#define CONFIG_SYS_MBAR 0x40000000 +#define CFG_SYS_MBAR 0x40000000 /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -77,34 +77,34 @@ */ #define CFG_SYS_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_SYS_FLASH_SIZE 0x200000 +#define CFG_SYS_FLASH_SIZE 0x200000 /*----------------------------------------------------------------------- * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ CF_CACR_CEIB | CF_CACR_DCM | \ CF_CACR_EUSP) @@ -112,12 +112,12 @@ /*----------------------------------------------------------------------- * Memory bank definitions */ -#define CONFIG_SYS_CS0_BASE 0xffe00000 -#define CONFIG_SYS_CS0_CTRL 0x00001980 -#define CONFIG_SYS_CS0_MASK 0x001F0001 +#define CFG_SYS_CS0_BASE 0xffe00000 +#define CFG_SYS_CS0_CTRL 0x00001980 +#define CFG_SYS_CS0_MASK 0x001F0001 -#define CONFIG_SYS_CS1_BASE 0x30000000 -#define CONFIG_SYS_CS1_CTRL 0x00001900 -#define CONFIG_SYS_CS1_MASK 0x00070001 +#define CFG_SYS_CS1_BASE 0x30000000 +#define CFG_SYS_CS1_CTRL 0x00001900 +#define CFG_SYS_CS1_MASK 0x00070001 #endif /* _M5275EVB_H */ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index eda394467e9..bde9e770e52 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -17,7 +17,7 @@ * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ @@ -49,25 +49,25 @@ "save\0" \ "" -#define CONFIG_SYS_CLK 64000000 +#define CFG_SYS_CLK 64000000 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */ -#define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ -#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ +#define CFG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ +#define CFG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) * You should know what you are doing if you make changes here. */ -#define CONFIG_SYS_MBAR 0x40000000 +#define CFG_SYS_MBAR 0x40000000 /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -76,65 +76,65 @@ */ #define CFG_SYS_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -#define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 -#define CONFIG_SYS_INT_FLASH_ENABLE 0x21 +#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE +#define CFG_SYS_INT_FLASH_BASE 0xf0000000 +#define CFG_SYS_INT_FLASH_ENABLE 0x21 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +# define CFG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ +# define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } #endif /*----------------------------------------------------------------------- * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DBWE | \ CF_CACR_EUSP) /*----------------------------------------------------------------------- * Memory bank definitions */ -#define CONFIG_SYS_CS0_BASE 0xFFE00000 -#define CONFIG_SYS_CS0_CTRL 0x00001980 -#define CONFIG_SYS_CS0_MASK 0x001F0001 +#define CFG_SYS_CS0_BASE 0xFFE00000 +#define CFG_SYS_CS0_CTRL 0x00001980 +#define CFG_SYS_CS0_MASK 0x001F0001 /*----------------------------------------------------------------------- * Port configuration */ -#define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ -#define CONFIG_SYS_PADDR 0x0000000 -#define CONFIG_SYS_PADAT 0x0000000 +#define CFG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ +#define CFG_SYS_PADDR 0x0000000 +#define CFG_SYS_PADAT 0x0000000 -#define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ -#define CONFIG_SYS_PBDDR 0x0000000 -#define CONFIG_SYS_PBDAT 0x0000000 +#define CFG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ +#define CFG_SYS_PBDDR 0x0000000 +#define CFG_SYS_PBDAT 0x0000000 -#define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ +#define CFG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ -#define CONFIG_SYS_PEHLPAR 0xC0 -#define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */ -#define CONFIG_SYS_DDRUA 0x05 -#define CONFIG_SYS_PJPAR 0xFF +#define CFG_SYS_PEHLPAR 0xC0 +#define CFG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */ +#define CFG_SYS_DDRUA 0x05 +#define CFG_SYS_PJPAR 0xFF #endif /* _CONFIG_M5282EVB_H */ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 159993a46bc..0e9ba4c3ada 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -18,17 +18,17 @@ * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #define CONFIG_WATCHDOG_TIMEOUT 5000 #ifdef CONFIG_MCFFEC -# define CONFIG_SYS_TX_ETH_BUFFER 8 -# define CONFIG_SYS_FEC_BUF_USE_SRAM +# define CFG_SYS_TX_ETH_BUFFER 8 +# define CFG_SYS_FEC_BUF_USE_SRAM #endif -#define CONFIG_SYS_RTC_CNT (0x8000) -#define CONFIG_SYS_RTC_SETUP (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN) +#define CFG_SYS_RTC_CNT (0x8000) +#define CFG_SYS_RTC_SETUP (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN) /* I2C */ @@ -54,10 +54,10 @@ #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_CLK 80000000 -#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3 +#define CFG_SYS_CLK 80000000 +#define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 -#define CONFIG_SYS_MBAR 0xFC000000 +#define CFG_SYS_MBAR 0xFC000000 /* * Low Level Configuration Settings @@ -67,9 +67,9 @@ /* * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x20000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_RAM_CTRL 0x221 +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_SIZE 0x20000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_CTRL 0x221 /* * Start addresses for the final memory configuration @@ -89,17 +89,17 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_FLASH_SPANSION_S29WS_N 1 -# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ +# define CFG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ #endif -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -113,15 +113,15 @@ * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINVA) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) /*----------------------------------------------------------------------- @@ -135,12 +135,12 @@ * CS4 - Available * CS5 - Available */ -#define CONFIG_SYS_CS0_BASE 0 -#define CONFIG_SYS_CS0_MASK 0x00FF0001 -#define CONFIG_SYS_CS0_CTRL 0x00001FA0 +#define CFG_SYS_CS0_BASE 0 +#define CFG_SYS_CS0_MASK 0x00FF0001 +#define CFG_SYS_CS0_CTRL 0x00001FA0 -#define CONFIG_SYS_CS1_BASE 0xC0000000 -#define CONFIG_SYS_CS1_MASK 0x00070001 -#define CONFIG_SYS_CS1_CTRL 0x00001FA0 +#define CFG_SYS_CS1_BASE 0xC0000000 +#define CFG_SYS_CS1_MASK 0x00070001 +#define CFG_SYS_CS1_CTRL 0x00001FA0 #endif /* _M53017EVB_H */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d7ece639349..8f83810f165 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -18,7 +18,7 @@ * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ @@ -46,12 +46,12 @@ #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_CLK 80000000 -#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3 +#define CFG_SYS_CLK 80000000 +#define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 -#define CONFIG_SYS_MBAR 0xFC000000 +#define CFG_SYS_MBAR 0xFC000000 -#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000) +#define CFG_SYS_LATCH_ADDR (CFG_SYS_CS1_BASE + 0x80000) /* * Low Level Configuration Settings @@ -61,9 +61,9 @@ /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_RAM_CTRL 0x221 +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_CTRL 0x221 /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -83,22 +83,22 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ +# define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #endif #ifdef CONFIG_CMD_NAND -# define CFG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE +# define CFG_SYS_NAND_BASE CFG_SYS_CS2_BASE # define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 #endif -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -112,15 +112,15 @@ * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINVA) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) /*----------------------------------------------------------------------- @@ -134,18 +134,18 @@ * CS4 - Available * CS5 - Available */ -#define CONFIG_SYS_CS0_BASE 0 -#define CONFIG_SYS_CS0_MASK 0x007f0001 -#define CONFIG_SYS_CS0_CTRL 0x00001fa0 +#define CFG_SYS_CS0_BASE 0 +#define CFG_SYS_CS0_MASK 0x007f0001 +#define CFG_SYS_CS0_CTRL 0x00001fa0 -#define CONFIG_SYS_CS1_BASE 0x10000000 -#define CONFIG_SYS_CS1_MASK 0x001f0001 -#define CONFIG_SYS_CS1_CTRL 0x002A3780 +#define CFG_SYS_CS1_BASE 0x10000000 +#define CFG_SYS_CS1_MASK 0x001f0001 +#define CFG_SYS_CS1_CTRL 0x002A3780 #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_CS2_BASE 0x20000000 -#define CONFIG_SYS_CS2_MASK (16 << 20) -#define CONFIG_SYS_CS2_CTRL 0x00001f60 +#define CFG_SYS_CS2_BASE 0x20000000 +#define CFG_SYS_CS2_MASK (16 << 20) +#define CFG_SYS_CS2_CTRL 0x00001f60 #endif #endif /* _M5329EVB_H */ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index b2fc6923e0d..43c642edeb1 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -20,7 +20,7 @@ * (easy to change) */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ @@ -48,12 +48,12 @@ #define CONFIG_PRAM 512 /* 512 KB */ -#define CONFIG_SYS_CLK 80000000 -#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3 +#define CFG_SYS_CLK 80000000 +#define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 -#define CONFIG_SYS_MBAR 0xFC000000 +#define CFG_SYS_MBAR 0xFC000000 -#define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000) +#define CFG_SYS_LATCH_ADDR (CFG_SYS_CS1_BASE + 0x80000) /* * Low Level Configuration Settings @@ -63,9 +63,9 @@ /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_RAM_CTRL 0x221 +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_CTRL 0x221 /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -85,20 +85,20 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ +# define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ #endif -# define CFG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE +# define CFG_SYS_NAND_BASE CFG_SYS_CS2_BASE # define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE +#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -112,15 +112,15 @@ * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINVA) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) /*----------------------------------------------------------------------- @@ -134,16 +134,16 @@ * CS4 - Available * CS5 - Available */ -#define CONFIG_SYS_CS0_BASE 0 -#define CONFIG_SYS_CS0_MASK 0x007f0001 -#define CONFIG_SYS_CS0_CTRL 0x00001fa0 +#define CFG_SYS_CS0_BASE 0 +#define CFG_SYS_CS0_MASK 0x007f0001 +#define CFG_SYS_CS0_CTRL 0x00001fa0 -#define CONFIG_SYS_CS1_BASE 0x10000000 -#define CONFIG_SYS_CS1_MASK 0x001f0001 -#define CONFIG_SYS_CS1_CTRL 0x002A3780 +#define CFG_SYS_CS1_BASE 0x10000000 +#define CFG_SYS_CS1_MASK 0x001f0001 +#define CFG_SYS_CS1_CTRL 0x002A3780 -#define CONFIG_SYS_CS2_BASE 0x20000000 -#define CONFIG_SYS_CS2_MASK (16 << 20) -#define CONFIG_SYS_CS2_CTRL 0x00001f60 +#define CFG_SYS_CS2_BASE 0x20000000 +#define CFG_SYS_CS2_MASK (16 << 20) +#define CFG_SYS_CS2_CTRL 0x00001f60 #endif /* _M5373EVB_H */ diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 2e7140cd86a..232cf9e9984 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -59,21 +59,21 @@ /* Miscellaneous configurable options */ /* Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800) -#define CONFIG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800) +#define CFG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800) +#define CFG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800) /* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */ #define CFG_SYS_SDRAM_BASE 0x00000000 /* FLASH organization */ -#define CONFIG_SYS_FLASH_BASE CONFIG_TEXT_BASE +#define CFG_SYS_FLASH_BASE CONFIG_TEXT_BASE /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* Environment Configuration */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index d9627e393d9..85c080cf27a 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -25,20 +25,20 @@ */ /* System Clock Configuration Register */ -#define CONFIG_SYS_SCCR_TSEC1CM 1 /* eTSEC1 clock mode (0-3) */ -#define CONFIG_SYS_SCCR_TSEC2CM 1 /* eTSEC2 clock mode (0-3) */ -#define CONFIG_SYS_SCCR_SATACM SCCR_SATACM_2 /* SATA1-4 clock mode (0-3) */ +#define CFG_SYS_SCCR_TSEC1CM 1 /* eTSEC1 clock mode (0-3) */ +#define CFG_SYS_SCCR_TSEC2CM 1 /* eTSEC2 clock mode (0-3) */ +#define CFG_SYS_SCCR_SATACM SCCR_SATACM_2 /* SATA1-4 clock mode (0-3) */ /* * System IO Config */ -#define CONFIG_SYS_SICRH 0x08200000 -#define CONFIG_SYS_SICRL 0x00000000 +#define CFG_SYS_SICRH 0x08200000 +#define CFG_SYS_SICRL 0x00000000 /* * Output Buffer Impedance */ -#define CONFIG_SYS_OBIR 0x30100000 +#define CFG_SYS_OBIR 0x30100000 /* * Device configurations @@ -60,9 +60,9 @@ * DDR Setup */ #define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ -#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x03000000 +#define CFG_SYS_DDR_SDRAM_CLK_CNTL 0x03000000 -#define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN) +#define CFG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN) #undef CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert ODT to internal IOs */ @@ -70,14 +70,14 @@ * Manually set up DDR parameters */ #define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f -#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ +#define CFG_SYS_DDR_CS0_BNDS 0x0000000f +#define CFG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ | CSCONFIG_ODT_WR_ONLY_CURRENT \ | CSCONFIG_ROW_BIT_13 \ | CSCONFIG_COL_BIT_10) -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 -#define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ +#define CFG_SYS_DDR_TIMING_3 0x00000000 +#define CFG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ | (0 << TIMING_CFG0_WRT_SHIFT) \ | (0 << TIMING_CFG0_RRT_SHIFT) \ | (0 << TIMING_CFG0_WWT_SHIFT) \ @@ -86,7 +86,7 @@ | (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) \ | (2 << TIMING_CFG0_MRS_CYC_SHIFT)) /* 0x00260802 */ /* DDR400 */ -#define CONFIG_SYS_DDR_TIMING_1 ((3 << TIMING_CFG1_PRETOACT_SHIFT) \ +#define CFG_SYS_DDR_TIMING_1 ((3 << TIMING_CFG1_PRETOACT_SHIFT) \ | (9 << TIMING_CFG1_ACTTOPRE_SHIFT) \ | (3 << TIMING_CFG1_ACTTORW_SHIFT) \ | (7 << TIMING_CFG1_CASLAT_SHIFT) \ @@ -95,7 +95,7 @@ | (2 << TIMING_CFG1_ACTTOACT_SHIFT) \ | (2 << TIMING_CFG1_WRTORD_SHIFT)) /* 0x3937d322 */ -#define CONFIG_SYS_DDR_TIMING_2 ((0 << TIMING_CFG2_ADD_LAT_SHIFT) \ +#define CFG_SYS_DDR_TIMING_2 ((0 << TIMING_CFG2_ADD_LAT_SHIFT) \ | (5 << TIMING_CFG2_CPO_SHIFT) \ | (3 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) \ | (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) \ @@ -104,23 +104,23 @@ | (8 << TIMING_CFG2_FOUR_ACT_SHIFT)) /* 0x02984cc8 */ -#define CONFIG_SYS_DDR_INTERVAL ((1024 << SDRAM_INTERVAL_REFINT_SHIFT) \ +#define CFG_SYS_DDR_INTERVAL ((1024 << SDRAM_INTERVAL_REFINT_SHIFT) \ | (0 << SDRAM_INTERVAL_BSTOPRE_SHIFT)) /* 0x06090100 */ -#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SREN \ +#define CFG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SREN \ | SDRAM_CFG_SDRAM_TYPE_DDR2) /* 0x43000000 */ -#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */ -#define CONFIG_SYS_DDR_MODE ((0x0406 << SDRAM_MODE_ESD_SHIFT) \ +#define CFG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */ +#define CFG_SYS_DDR_MODE ((0x0406 << SDRAM_MODE_ESD_SHIFT) \ | (0x0442 << SDRAM_MODE_SD_SHIFT)) /* 0x04400442 */ /* DDR400 */ -#define CONFIG_SYS_DDR_MODE2 0x00000000 +#define CFG_SYS_DDR_MODE2 0x00000000 /* * Memory test */ -#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ +#undef CFG_SYS_DRAM_TEST /* memory test, takes time */ /* * The reserved memory @@ -129,14 +129,14 @@ /* * Initial RAM Base Address Setup */ -#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ +#define CFG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ -#define CONFIG_SYS_FLASH_SIZE 8 /* max FLASH size is 32M */ +#define CFG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ +#define CFG_SYS_FLASH_SIZE 8 /* max FLASH size is 32M */ /* * NAND Flash on the Local Bus @@ -146,14 +146,14 @@ /* Vitesse 7385 */ -#define CONFIG_SYS_VSC7385_BASE 0xF0000000 +#define CFG_SYS_VSC7385_BASE 0xF0000000 /* * Serial Port */ #define CFG_SYS_NS16550_CLK get_bus_freq(0) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} #define CFG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) @@ -165,13 +165,13 @@ #define CONFIG_FSL_SERDES2 0xe3100 /* I2C */ -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x51} } +#define CFG_SYS_I2C_NOPROBES { {0, 0x51} } /* * Config on-board RTC */ #define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */ -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ +#define CFG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ /* * General PCI @@ -198,7 +198,7 @@ #ifdef CONFIG_TSEC1 #define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_SYS_TSEC1_OFFSET 0x24000 +#define CFG_SYS_TSEC1_OFFSET 0x24000 #define TSEC1_PHY_ADDR 2 #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) #define TSEC1_PHYIDX 0 @@ -226,7 +226,7 @@ * have to be in the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ +#define CFG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ /* * Environment Configuration diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 25b4fe0c7d4..ff02c2cd847 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -28,16 +28,16 @@ * Only possible on E500 Version 2 or newer cores. */ -#define CONFIG_SYS_CCSRBAR 0xe0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CFG_SYS_CCSRBAR 0xe0000000 +#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ @@ -112,32 +112,32 @@ * 1111 1111 1000 0000 0110 1110 0110 0101 = ff806e65 ORx */ -#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ +#define CFG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS 0xfff000000ull +#define CFG_SYS_FLASH_BASE_PHYS 0xfff000000ull #else -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #endif -#define CONFIG_SYS_FLASH_BANKS_LIST \ - {CONFIG_SYS_FLASH_BASE_PHYS + 0x800000, CONFIG_SYS_FLASH_BASE_PHYS} +#define CFG_SYS_FLASH_BANKS_LIST \ + {CFG_SYS_FLASH_BASE_PHYS + 0x800000, CFG_SYS_FLASH_BASE_PHYS} #define CONFIG_HWCONFIG /* enable hwconfig */ /* * SDRAM on the Local Bus */ -#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ +#define CFG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_LBC_SDRAM_BASE_PHYS 0xff0000000ull +#define CFG_SYS_LBC_SDRAM_BASE_PHYS 0xff0000000ull #else -#define CONFIG_SYS_LBC_SDRAM_BASE_PHYS CONFIG_SYS_LBC_SDRAM_BASE +#define CFG_SYS_LBC_SDRAM_BASE_PHYS CFG_SYS_LBC_SDRAM_BASE #endif -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ +#define CFG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ /* * Base Register 2 and Option Register 2 configure SDRAM. - * The SDRAM base address, CONFIG_SYS_LBC_SDRAM_BASE, is 0xf0000000. + * The SDRAM base address, CFG_SYS_LBC_SDRAM_BASE, is 0xf0000000. * * For BR2, need: * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0 @@ -149,12 +149,12 @@ * 0 4 8 12 16 20 24 28 * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861 * - * FIXME: CONFIG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into + * FIXME: CFG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into * FIXME: the top 17 bits of BR2. */ /* - * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. + * The SDRAM size in MB, CFG_SYS_LBC_SDRAM_SIZE, is 64. * * For OR2, need: * 64MB mask for AM, OR2[0:7] = 1111 1100 @@ -167,10 +167,10 @@ * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 */ -#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ -#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ -#define CONFIG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/ +#define CFG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ +#define CFG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ +#define CFG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ +#define CFG_SYS_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/ /* * Common settings for all Local Bus SDRAM commands. @@ -178,7 +178,7 @@ * or BSMA1617 (for CPU 1.0) (old) * is OR'ed in too. */ -#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \ +#define CFG_SYS_LBC_LSDMR_COMMON ( LSDMR_RFCR16 \ | LSDMR_PRETOACT7 \ | LSDMR_ACTTORW7 \ | LSDMR_BL8 \ @@ -226,25 +226,25 @@ #define CADMUS_BASE_ADDR_PHYS CADMUS_BASE_ADDR #endif -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ +#define CFG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ +#define CFG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* Serial Port */ #define CFG_SYS_NS16550_CLK get_bus_freq(0) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x4500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x4600) /* * I2C */ #if !CONFIG_IS_ENABLED(DM_I2C) -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } +#define CFG_SYS_I2C_NOPROBES { {0, 0x69} } #endif /* @@ -326,7 +326,7 @@ * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ /* * Environment Configuration diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 21491b9f97c..a8af0a101c8 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -16,10 +16,10 @@ #include #ifdef CONFIG_SDCARD -#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) -#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CFG_SYS_MMC_U_BOOT_SIZE (512 << 10) +#define CFG_SYS_MMC_U_BOOT_DST (0x11000000) +#define CFG_SYS_MMC_U_BOOT_START (0x11000000) +#define CFG_SYS_MMC_U_BOOT_OFFS (96 << 10) #endif #ifdef CONFIG_SPIFLASH @@ -27,10 +27,10 @@ #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #else -#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) +#define CFG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) +#define CFG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) #endif #endif @@ -111,11 +111,11 @@ extern unsigned long get_sdram_size(void); #endif #define CFG_SYS_SDRAM_SIZE get_sdram_size() /* DDR size */ -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_CCSRBAR 0xffe00000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CFG_SYS_CCSRBAR 0xffe00000 +#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* * Memory map @@ -136,15 +136,15 @@ extern unsigned long get_sdram_size(void); */ /* NOR Flash on IFC */ -#define CONFIG_SYS_FLASH_BASE 0xee000000 +#define CFG_SYS_FLASH_BASE 0xee000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) +#define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) #else -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #endif -#define CFG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -161,7 +161,7 @@ extern unsigned long get_sdram_size(void); FTIM2_NOR_TWP(0x1c) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ /* CFI for NOR Flash */ @@ -237,85 +237,85 @@ extern unsigned long get_sdram_size(void); /* Set up IFC registers for boot location NOR/NAND */ #if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT) -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR1 CFG_SYS_NOR_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1 CFG_SYS_NOR_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 #else -#define CONFIG_SYS_CSPR0 CFG_SYS_NOR_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0 CFG_SYS_NOR_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif /* CPLD on IFC */ -#define CONFIG_SYS_CPLD_BASE 0xffb00000 +#define CFG_SYS_CPLD_BASE 0xffb00000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CPLD_BASE_PHYS 0xfffb00000ull +#define CFG_SYS_CPLD_BASE_PHYS 0xfffb00000ull #else -#define CONFIG_SYS_CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE +#define CFG_SYS_CPLD_BASE_PHYS CFG_SYS_CPLD_BASE #endif -#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \ +#define CFG_SYS_CSPR3 (CSPR_PHYS_ADDR(CFG_SYS_CPLD_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64*1024) -#define CONFIG_SYS_CSOR3 0x0 +#define CFG_SYS_AMASK3 IFC_AMASK(64*1024) +#define CFG_SYS_CSOR3 0x0 /* CPLD Timing parameters for IFC CS3 */ -#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ +#define CFG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) -#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ +#define CFG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) -#define CONFIG_SYS_CS3_FTIM3 0x0 +#define CFG_SYS_CS3_FTIM3 0x0 -#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */ +#define CFG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* * Config the L2 Cache as L2 SRAM */ #if defined(CONFIG_SPL_BUILD) #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) -#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 -#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CFG_SYS_INIT_L2_ADDR 0xD0000000 +#define CFG_SYS_INIT_L2_ADDR_PHYS CFG_SYS_INIT_L2_ADDR +#define CFG_SYS_INIT_L2_END (CFG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 -#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CFG_SYS_INIT_L2_ADDR 0xD0000000 +#define CFG_SYS_INIT_L2_ADDR_PHYS CFG_SYS_INIT_L2_ADDR +#define CFG_SYS_INIT_L2_END (CFG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #else -#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 -#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CFG_SYS_INIT_L2_ADDR 0xD0000000 +#define CFG_SYS_INIT_L2_ADDR_PHYS CFG_SYS_INIT_L2_ADDR +#define CFG_SYS_INIT_L2_END (CFG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #endif #endif #endif @@ -324,11 +324,11 @@ extern unsigned long get_sdram_size(void); #undef CONFIG_SERIAL_SOFTWARE_FIFO #define CFG_SYS_NS16550_CLK get_bus_freq(0) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x4500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x4600) /* I2C */ #define I2C_PCA9557_ADDR1 0x18 @@ -343,7 +343,7 @@ extern unsigned long get_sdram_size(void); /* RTC */ #define CONFIG_RTC_PT7C4338 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_I2C_RTC_ADDR 0x68 /* * SPI interface will not be available in case of NAND boot SPI CS0 will be @@ -393,7 +393,7 @@ extern unsigned long get_sdram_size(void); */ #if defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) +#define SPL_ENV_ADDR (CFG_SYS_INIT_L2_ADDR + (160 << 10)) #endif #endif @@ -410,7 +410,7 @@ extern unsigned long get_sdram_size(void); * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux */ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux */ /* * Environment Configuration diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index c3ef2163335..1e02855fefd 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -39,32 +39,32 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E +#define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ +#define CONFIG_POST CFG_SYS_POST_MEMORY /* test POST memory test */ /* * Config the L3 Cache as L3 SRAM */ -#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE +#define CFG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | \ +#define CFG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | \ CONFIG_RAMBOOT_TEXT_BASE) #else -#define CONFIG_SYS_INIT_L3_ADDR_PHYS CONFIG_SYS_INIT_L3_ADDR +#define CFG_SYS_INIT_L3_ADDR_PHYS CFG_SYS_INIT_L3_ADDR #endif #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#define CFG_SYS_DCSRBAR 0xf0000000 +#define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull #endif /* * DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x52 #define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ @@ -74,18 +74,18 @@ */ /* Set the local bus clock 1/8 of platform clock */ -#define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8 +#define CFG_SYS_LBC_LCRR LCRR_CLKDIV_8 /* * This board doesn't have a promjet connector. * However, it uses commone corenet board LAW and TLB. * It is necessary to use the same start address with proper offset. */ -#define CONFIG_SYS_FLASH_BASE 0xe0000000 +#define CFG_SYS_FLASH_BASE 0xe0000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull +#define CFG_SYS_FLASH_BASE_PHYS 0xfe0000000ull #else -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #endif #define CONFIG_FSL_CPLD @@ -130,28 +130,28 @@ | OR_FCM_EHTR) #endif /* CONFIG_NAND_FSL_ELBC */ -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS + 0x8000000} #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ +#define CFG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW CFG_SYS_INIT_RAM_ADDR /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) #else -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS +#define CFG_SYS_INIT_RAM_ADDR_PHYS CFG_SYS_INIT_RAM_ADDR +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW CFG_SYS_INIT_RAM_ADDR_PHYS #endif -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* Serial Port - controlled on board with jumper J8 * open - index 2 @@ -159,13 +159,13 @@ */ #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CFG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CFG_SYS_CCSRBAR+0x11D600) /* I2C */ @@ -244,52 +244,52 @@ #define CFG_SYS_PCIE3_MEM_PHYS 0xc40000000ull /* Qman/Bman */ -#define CONFIG_SYS_BMAN_NUM_PORTALS 10 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CFG_SYS_BMAN_NUM_PORTALS 10 +#define CFG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CFG_SYS_BMAN_MEM_PHYS 0xff4000000ull #else -#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE +#define CFG_SYS_BMAN_MEM_PHYS CFG_SYS_BMAN_MEM_BASE #endif -#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 10 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000 +#define CFG_SYS_BMAN_MEM_SIZE 0x00200000 +#define CFG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CFG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_BMAN_CENA_BASE CFG_SYS_BMAN_MEM_BASE +#define CFG_SYS_BMAN_CENA_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_CINH_BASE (CFG_SYS_BMAN_MEM_BASE + \ + CFG_SYS_BMAN_CENA_SIZE) +#define CFG_SYS_BMAN_CINH_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_NUM_PORTALS 10 +#define CFG_SYS_QMAN_MEM_BASE 0xf4200000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull +#define CFG_SYS_QMAN_MEM_PHYS 0xff4200000ull #else -#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE +#define CFG_SYS_QMAN_MEM_PHYS CFG_SYS_QMAN_MEM_BASE #endif -#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_MEM_SIZE 0x00200000 +#define CFG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_QMAN_CENA_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_CINH_BASE (CFG_SYS_QMAN_MEM_BASE + \ + CFG_SYS_QMAN_CENA_SIZE) +#define CFG_SYS_QMAN_CINH_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_SWP_ISDR_REG 0xE08 #ifdef CONFIG_FMAN_ENET -#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 -#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3 -#define CONFIG_SYS_FM1_DTSEC3_PHY_ADDR 0x4 -#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x1 -#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x0 +#define CFG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 +#define CFG_SYS_FM1_DTSEC2_PHY_ADDR 0x3 +#define CFG_SYS_FM1_DTSEC3_PHY_ADDR 0x4 +#define CFG_SYS_FM1_DTSEC4_PHY_ADDR 0x1 +#define CFG_SYS_FM1_DTSEC5_PHY_ADDR 0x0 -#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c -#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d -#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e -#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 0x1f +#define CFG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c +#define CFG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d +#define CFG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e +#define CFG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 0x1f -#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0 +#define CFG_SYS_FM1_10GEC1_PHY_ADDR 0 -#define CONFIG_SYS_TBIPA_VALUE 8 +#define CFG_SYS_TBIPA_VALUE 8 #endif #ifdef CONFIG_MMC @@ -305,7 +305,7 @@ * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */ /* * Environment Configuration diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index 417b9ae7b24..bad34d9771e 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -12,7 +12,7 @@ /* * NS16550 Configuration */ -#define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CFG_SYS_NS16550_CLK CFG_SYS_TCLK #define CFG_SYS_NS16550_COM1 KW_UART0_BASE /* @@ -32,7 +32,7 @@ * U-Boot bootcode configuration */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ /* size in bytes reserved for initial data */ diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 87b68227a0d..9a9663b34ba 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -12,7 +12,7 @@ /* * NS16550 Configuration */ -#define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CFG_SYS_NS16550_CLK CFG_SYS_TCLK #define CFG_SYS_NS16550_COM1 KW_UART0_BASE /* @@ -37,7 +37,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ /* size in bytes reserved for initial data */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index b567b63980e..b5fb0a9b529 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -29,18 +29,18 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC -#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) +#define CFG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) +#define CFG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SDCARD #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC -#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000) -#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) +#define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_MMC_U_BOOT_DST (0x30000000) +#define CFG_SYS_MMC_U_BOOT_START (0x30000000) +#define CFG_SYS_MMC_U_BOOT_OFFS (260 << 10) #endif #endif /* CONFIG_RAMBOOT_PBL */ @@ -93,7 +93,7 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E +#define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -101,20 +101,20 @@ /* * Config the L3 Cache as L3 SRAM */ -#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 +#define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#define CFG_SYS_DCSRBAR 0xf0000000 +#define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull #endif /* * DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #if defined(CONFIG_TARGET_T1024RDB) #define SPD_EEPROM_ADDRESS 0x51 #define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ @@ -125,15 +125,15 @@ /* * IFC Definitions */ -#define CONFIG_SYS_FLASH_BASE 0xe8000000 +#define CFG_SYS_FLASH_BASE 0xe8000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) +#define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) #else -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #endif -#define CONFIG_SYS_NOR0_CSPR_EXT (0xf) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR_EXT (0xf) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -160,30 +160,30 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} #ifdef CONFIG_TARGET_T1024RDB /* CPLD on IFC */ -#define CONFIG_SYS_CPLD_BASE 0xffdf0000 -#define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) -#define CONFIG_SYS_CSPR2_EXT (0xf) -#define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE) \ +#define CFG_SYS_CPLD_BASE 0xffdf0000 +#define CFG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CFG_SYS_CPLD_BASE) +#define CFG_SYS_CSPR2_EXT (0xf) +#define CFG_SYS_CSPR2 (CSPR_PHYS_ADDR(CFG_SYS_CPLD_BASE) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK2 IFC_AMASK(64*1024) -#define CONFIG_SYS_CSOR2 0x0 +#define CFG_SYS_AMASK2 IFC_AMASK(64*1024) +#define CFG_SYS_CSOR2 0x0 /* CPLD Timing parameters for IFC CS2 */ -#define CONFIG_SYS_CS2_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CS2_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ +#define CFG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) -#define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ +#define CFG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) -#define CONFIG_SYS_CS2_FTIM3 0x0 +#define CFG_SYS_CS2_FTIM3 0x0 #endif /* NAND Flash on IFC */ @@ -235,72 +235,72 @@ #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) #else -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS 0xfe03c000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS +#define CFG_SYS_INIT_RAM_ADDR_PHYS 0xfe03c000 /* Initial L1 address */ +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW CFG_SYS_INIT_RAM_ADDR_PHYS #endif -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* Serial Port */ #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CFG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CFG_SYS_CCSRBAR+0x11D600) /* I2C */ @@ -315,7 +315,7 @@ */ #define RTC #define CONFIG_RTC_DS1337 1 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_I2C_RTC_ADDR 0x68 /* * eSPI - Enhanced SPI @@ -363,36 +363,37 @@ /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_BMAN_NUM_PORTALS 10 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CFG_SYS_BMAN_NUM_PORTALS 10 +#define CFG_SYS_BMAN_MEM_BASE 0xf4000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CFG_SYS_BMAN_MEM_PHYS 0xff4000000ull #else -#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE +#define CFG_SYS_BMAN_MEM_PHYS CFG_SYS_BMAN_MEM_BASE #endif -#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 10 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 +#define CFG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CFG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_BMAN_CENA_BASE CFG_SYS_BMAN_MEM_BASE +#define CFG_SYS_BMAN_CENA_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_CINH_BASE (CFG_SYS_BMAN_MEM_BASE + \ + CFG_SYS_BMAN_CENA_SIZE) +#define CFG_SYS_BMAN_CINH_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_NUM_PORTALS 10 +#define CFG_SYS_QMAN_MEM_BASE 0xf6000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull +#define CFG_SYS_QMAN_MEM_PHYS 0xff6000000ull #else -#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE +#define CFG_SYS_QMAN_MEM_PHYS CFG_SYS_QMAN_MEM_BASE #endif -#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_QMAN_CENA_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_CINH_BASE (CFG_SYS_QMAN_MEM_BASE + \ + CFG_SYS_QMAN_CENA_SIZE) +#define CFG_SYS_QMAN_CINH_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_SWP_ISDR_REG 0xE08 + #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -421,7 +422,7 @@ * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ /* * Environment Configuration diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 37dfe32e21b..bee4b704a24 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -36,18 +36,18 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC -#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) +#define CFG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) +#define CFG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SDCARD #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC -#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000) -#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) +#define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_MMC_U_BOOT_DST (0x30000000) +#define CFG_SYS_MMC_U_BOOT_START (0x30000000) +#define CFG_SYS_MMC_U_BOOT_OFFS (260 << 10) #endif #endif @@ -63,7 +63,7 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E +#define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -71,24 +71,24 @@ /* * Config the L3 Cache as L3 SRAM */ -#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 +#define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 /* - * For Secure Boot CONFIG_SYS_INIT_L3_ADDR will be redefined and hence - * Physical address (CONFIG_SYS_INIT_L3_ADDR) and virtual address - * (CONFIG_SYS_INIT_L3_VADDR) will be different. + * For Secure Boot CFG_SYS_INIT_L3_ADDR will be redefined and hence + * Physical address (CFG_SYS_INIT_L3_ADDR) and virtual address + * (CFG_SYS_INIT_L3_VADDR) will be different. */ -#define CONFIG_SYS_INIT_L3_VADDR 0xFFFC0000 +#define CFG_SYS_INIT_L3_VADDR 0xFFFC0000 #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#define CFG_SYS_DCSRBAR 0xf0000000 +#define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull /* * DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x51 @@ -97,11 +97,11 @@ /* * IFC Definitions */ -#define CONFIG_SYS_FLASH_BASE 0xe8000000 -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) +#define CFG_SYS_FLASH_BASE 0xe8000000 +#define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) #define CFG_SYS_NOR_CSPR_EXT (0xf) -#define CFG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE) | \ +#define CFG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -128,7 +128,7 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} /* CPLD on IFC */ #define CPLD_LBMAP_MASK 0x3F @@ -157,25 +157,25 @@ #define CPLD_INT_MASK_TDMR2 0x01 #endif -#define CONFIG_SYS_CPLD_BASE 0xffdf0000 -#define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) -#define CONFIG_SYS_CSPR2_EXT (0xf) -#define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \ +#define CFG_SYS_CPLD_BASE 0xffdf0000 +#define CFG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CFG_SYS_CPLD_BASE) +#define CFG_SYS_CSPR2_EXT (0xf) +#define CFG_SYS_CSPR2 (CSPR_PHYS_ADDR(CFG_SYS_CPLD_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK2 IFC_AMASK(64*1024) -#define CONFIG_SYS_CSOR2 0x0 +#define CFG_SYS_AMASK2 IFC_AMASK(64*1024) +#define CFG_SYS_CSOR2 0x0 /* CPLD Timing parameters for IFC CS2 */ -#define CONFIG_SYS_CS2_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CS2_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ +#define CFG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) -#define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ +#define CFG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) -#define CONFIG_SYS_CS2_FTIM3 0x0 +#define CFG_SYS_CS2_FTIM3 0x0 /* NAND Flash on IFC */ #define CFG_SYS_NAND_BASE 0xff800000 @@ -213,55 +213,55 @@ #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NOR_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NOR_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NOR_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NOR_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 +#define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* Serial Port - controlled on board with jumper J8 * open - index 2 @@ -269,13 +269,13 @@ */ #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CFG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CFG_SYS_CCSRBAR+0x11D600) /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 @@ -289,7 +289,7 @@ */ #define RTC #define CONFIG_RTC_DS1337 1 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_I2C_RTC_ADDR 0x68 /*DVI encoder*/ #define CONFIG_HDMI_ENCODER_I2C_ADDR 0x75 @@ -344,58 +344,58 @@ /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_BMAN_NUM_PORTALS 10 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 10 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull -#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_BMAN_NUM_PORTALS 10 +#define CFG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CFG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CFG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CFG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_BMAN_CENA_BASE CFG_SYS_BMAN_MEM_BASE +#define CFG_SYS_BMAN_CENA_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_CINH_BASE (CFG_SYS_BMAN_MEM_BASE + \ + CFG_SYS_BMAN_CENA_SIZE) +#define CFG_SYS_BMAN_CINH_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_NUM_PORTALS 10 +#define CFG_SYS_QMAN_MEM_BASE 0xf6000000 +#define CFG_SYS_QMAN_MEM_PHYS 0xff6000000ull +#define CFG_SYS_QMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_QMAN_CENA_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_CINH_BASE (CFG_SYS_QMAN_MEM_BASE + \ + CFG_SYS_QMAN_CENA_SIZE) +#define CFG_SYS_QMAN_CINH_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_SWP_ISDR_REG 0xE08 #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_FMAN_ENET #if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB) -#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#define CFG_SYS_SGMII1_PHY_ADDR 0x03 #elif defined(CONFIG_TARGET_T1040D4RDB) -#define CONFIG_SYS_SGMII1_PHY_ADDR 0x01 +#define CFG_SYS_SGMII1_PHY_ADDR 0x01 #elif defined(CONFIG_TARGET_T1042D4RDB) -#define CONFIG_SYS_SGMII1_PHY_ADDR 0x02 -#define CONFIG_SYS_SGMII2_PHY_ADDR 0x03 -#define CONFIG_SYS_SGMII3_PHY_ADDR 0x01 +#define CFG_SYS_SGMII1_PHY_ADDR 0x02 +#define CFG_SYS_SGMII2_PHY_ADDR 0x03 +#define CFG_SYS_SGMII3_PHY_ADDR 0x01 #endif #if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB) -#define CONFIG_SYS_RGMII1_PHY_ADDR 0x04 -#define CONFIG_SYS_RGMII2_PHY_ADDR 0x05 +#define CFG_SYS_RGMII1_PHY_ADDR 0x04 +#define CFG_SYS_RGMII2_PHY_ADDR 0x05 #else -#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 -#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 +#define CFG_SYS_RGMII1_PHY_ADDR 0x01 +#define CFG_SYS_RGMII2_PHY_ADDR 0x02 #endif /* Enable VSC9953 L2 Switch driver on T1040 SoC */ #if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB) #define CONFIG_VSC9953 #ifdef CONFIG_TARGET_T1040RDB -#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 -#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 +#define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 +#define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 #else -#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x08 -#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x0c +#define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x08 +#define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x0c #endif #endif #endif @@ -409,7 +409,7 @@ * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ /* * Dynamic MTD Partition support with mtdparts diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 798822e5031..be8c30db26a 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -31,18 +31,18 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) +#define CFG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) +#define CFG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SDCARD #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000) -#define CONFIG_SYS_MMC_U_BOOT_START (0x00200000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) +#define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_MMC_U_BOOT_DST (0x00200000) +#define CFG_SYS_MMC_U_BOOT_START (0x00200000) +#define CFG_SYS_MMC_U_BOOT_OFFS (260 << 10) #endif #endif /* CONFIG_RAMBOOT_PBL */ @@ -69,18 +69,18 @@ /* * Config the L3 Cache as L3 SRAM */ -#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 +#define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#define CFG_SYS_DCSRBAR 0xf0000000 +#define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull /* * DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 @@ -90,16 +90,16 @@ /* * IFC Definitions */ -#define CONFIG_SYS_FLASH_BASE 0xe0000000 -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_NOR0_CSPR_EXT (0xf) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ +#define CFG_SYS_FLASH_BASE 0xe0000000 +#define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) +#define CFG_SYS_NOR0_CSPR_EXT (0xf) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR_EXT (0xf) -#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR1_CSPR_EXT (0xf) +#define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -121,8 +121,8 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS \ - + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \ + + 0x8000000, CFG_SYS_FLASH_BASE_PHYS} #define QIXIS_BASE 0xffdf0000 #define QIXIS_LBMAP_SWITCH 6 @@ -141,23 +141,23 @@ #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) -#define CONFIG_SYS_CSPR3_EXT (0xf) -#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ +#define CFG_SYS_CSPR3_EXT (0xf) +#define CFG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) -#define CONFIG_SYS_CSOR3 0x0 +#define CFG_SYS_AMASK3 IFC_AMASK(64 * 1024) +#define CFG_SYS_CSOR3 0x0 /* QIXIS Timing parameters for IFC CS3 */ -#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ +#define CFG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) -#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ +#define CFG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) -#define CONFIG_SYS_CS3_FTIM3 0x0 +#define CFG_SYS_CS3_FTIM3 0x0 /* NAND Flash on IFC */ #define CFG_SYS_NAND_BASE 0xff800000 @@ -195,81 +195,81 @@ #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #endif #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 +#define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* * Serial Port */ #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CFG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CFG_SYS_CCSRBAR+0x11D600) /* * I2C @@ -360,28 +360,28 @@ /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_BMAN_NUM_PORTALS 18 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 18 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull -#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_BMAN_NUM_PORTALS 18 +#define CFG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CFG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CFG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CFG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_BMAN_CENA_BASE CFG_SYS_BMAN_MEM_BASE +#define CFG_SYS_BMAN_CENA_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_CINH_BASE (CFG_SYS_BMAN_MEM_BASE + \ + CFG_SYS_BMAN_CENA_SIZE) +#define CFG_SYS_BMAN_CINH_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_NUM_PORTALS 18 +#define CFG_SYS_QMAN_MEM_BASE 0xf6000000 +#define CFG_SYS_QMAN_MEM_PHYS 0xff6000000ull +#define CFG_SYS_QMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_QMAN_CENA_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_CINH_BASE (CFG_SYS_QMAN_MEM_BASE + \ + CFG_SYS_QMAN_CENA_SIZE) +#define CFG_SYS_QMAN_CINH_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_SWP_ISDR_REG 0xE08 #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -418,7 +418,7 @@ * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ /* * Environment Configuration diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index ea366b671c0..795873f4233 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -31,18 +31,18 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) +#define CFG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) +#define CFG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10) #endif #ifdef CONFIG_SDCARD #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000) -#define CONFIG_SYS_MMC_U_BOOT_START (0x00200000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) +#define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_MMC_U_BOOT_DST (0x00200000) +#define CFG_SYS_MMC_U_BOOT_START (0x00200000) +#define CFG_SYS_MMC_U_BOOT_OFFS (260 << 10) #endif #endif /* CONFIG_RAMBOOT_PBL */ @@ -69,18 +69,18 @@ /* * Config the L3 Cache as L3 SRAM */ -#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 +#define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#define CFG_SYS_DCSRBAR 0xf0000000 +#define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull /* * DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 @@ -90,10 +90,10 @@ /* * IFC Definitions */ -#define CONFIG_SYS_FLASH_BASE 0xe8000000 -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_NOR0_CSPR_EXT (0xf) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_FLASH_BASE 0xe8000000 +#define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) +#define CFG_SYS_NOR0_CSPR_EXT (0xf) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -116,29 +116,29 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS } +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS } /* CPLD on IFC */ -#define CONFIG_SYS_CPLD_BASE 0xffdf0000 -#define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) -#define CONFIG_SYS_CSPR2_EXT (0xf) -#define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE) \ +#define CFG_SYS_CPLD_BASE 0xffdf0000 +#define CFG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CFG_SYS_CPLD_BASE) +#define CFG_SYS_CSPR2_EXT (0xf) +#define CFG_SYS_CSPR2 (CSPR_PHYS_ADDR(CFG_SYS_CPLD_BASE) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK2 IFC_AMASK(64*1024) -#define CONFIG_SYS_CSOR2 0x0 +#define CFG_SYS_AMASK2 IFC_AMASK(64*1024) +#define CFG_SYS_CSOR2 0x0 /* CPLD Timing parameters for IFC CS2 */ -#define CONFIG_SYS_CS2_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CS2_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ +#define CFG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) -#define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ +#define CFG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) -#define CONFIG_SYS_CS2_FTIM3 0x0 +#define CFG_SYS_CS2_FTIM3 0x0 /* NAND Flash on IFC */ #define CFG_SYS_NAND_BASE 0xff800000 @@ -176,65 +176,65 @@ #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 +#define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* * Serial Port */ #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CFG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CFG_SYS_CCSRBAR+0x11D600) /* * I2C @@ -319,28 +319,28 @@ /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_BMAN_NUM_PORTALS 18 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 18 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull -#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_BMAN_NUM_PORTALS 18 +#define CFG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CFG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CFG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CFG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_BMAN_CENA_BASE CFG_SYS_BMAN_MEM_BASE +#define CFG_SYS_BMAN_CENA_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_CINH_BASE (CFG_SYS_BMAN_MEM_BASE + \ + CFG_SYS_BMAN_CENA_SIZE) +#define CFG_SYS_BMAN_CINH_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_NUM_PORTALS 18 +#define CFG_SYS_QMAN_MEM_BASE 0xf6000000 +#define CFG_SYS_QMAN_MEM_PHYS 0xff6000000ull +#define CFG_SYS_QMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_QMAN_CENA_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_CINH_BASE (CFG_SYS_QMAN_MEM_BASE + \ + CFG_SYS_QMAN_CENA_SIZE) +#define CFG_SYS_QMAN_CINH_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_SWP_ISDR_REG 0xE08 #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN @@ -384,7 +384,7 @@ * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ /* * Environment Configuration diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index cc86c9d4a51..ffd56454939 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -24,10 +24,10 @@ #ifdef CONFIG_SDCARD #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC -#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST 0x00200000 -#define CONFIG_SYS_MMC_U_BOOT_START 0x00200000 -#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10) +#define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_MMC_U_BOOT_DST 0x00200000 +#define CFG_SYS_MMC_U_BOOT_START 0x00200000 +#define CFG_SYS_MMC_U_BOOT_OFFS (260 << 10) #endif #endif @@ -51,39 +51,39 @@ /* * Config the L3 Cache as L3 SRAM */ -#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 +#define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 #define SPL_ENV_ADDR (CONFIG_SPL_GD_ADDR + 4 * 1024) -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#define CFG_SYS_DCSRBAR 0xf0000000 +#define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull /* * DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE /* * IFC Definitions */ -#define CONFIG_SYS_FLASH_BASE 0xe0000000 -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) +#define CFG_SYS_FLASH_BASE 0xe0000000 +#define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 +#define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* Serial Port - controlled on board with jumper J8 * open - index 2 @@ -91,13 +91,13 @@ */ #define CFG_SYS_NS16550_CLK (get_bus_freq(0)/2) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CFG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CFG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x11C500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x11C600) +#define CFG_SYS_NS16550_COM3 (CFG_SYS_CCSRBAR+0x11D500) +#define CFG_SYS_NS16550_COM4 (CFG_SYS_CCSRBAR+0x11D600) /* I2C */ @@ -135,7 +135,7 @@ * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ /* * Environment Configuration @@ -159,14 +159,14 @@ /* * IFC Definitions */ -#define CONFIG_SYS_NOR0_CSPR_EXT (0xf) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ +#define CFG_SYS_NOR0_CSPR_EXT (0xf) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR_EXT (0xf) -#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR1_CSPR_EXT (0xf) +#define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -188,8 +188,8 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS \ - + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \ + + 0x8000000, CFG_SYS_FLASH_BASE_PHYS} /* NAND Flash on IFC */ #define CFG_SYS_NAND_BASE 0xff800000 @@ -227,71 +227,71 @@ #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 /* CPLD on IFC */ -#define CONFIG_SYS_CPLD_BASE 0xffdf0000 -#define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) -#define CONFIG_SYS_CSPR3_EXT (0xf) -#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \ +#define CFG_SYS_CPLD_BASE 0xffdf0000 +#define CFG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CFG_SYS_CPLD_BASE) +#define CFG_SYS_CSPR3_EXT (0xf) +#define CFG_SYS_CSPR3 (CSPR_PHYS_ADDR(CFG_SYS_CPLD_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) -#define CONFIG_SYS_CSOR3 0x0 +#define CFG_SYS_AMASK3 IFC_AMASK(64 * 1024) +#define CFG_SYS_CSOR3 0x0 /* CPLD Timing parameters for IFC CS3 */ -#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ +#define CFG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) -#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ +#define CFG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) -#define CONFIG_SYS_CS3_FTIM3 0x0 +#define CFG_SYS_CS3_FTIM3 0x0 /* I2C */ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ @@ -318,28 +318,28 @@ /* Qman/Bman */ #ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_BMAN_NUM_PORTALS 50 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 50 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull -#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_BMAN_NUM_PORTALS 50 +#define CFG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CFG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CFG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CFG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_BMAN_CENA_BASE CFG_SYS_BMAN_MEM_BASE +#define CFG_SYS_BMAN_CENA_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_CINH_BASE (CFG_SYS_BMAN_MEM_BASE + \ + CFG_SYS_BMAN_CENA_SIZE) +#define CFG_SYS_BMAN_CINH_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_NUM_PORTALS 50 +#define CFG_SYS_QMAN_MEM_BASE 0xf6000000 +#define CFG_SYS_QMAN_MEM_PHYS 0xff6000000ull +#define CFG_SYS_QMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_QMAN_CENA_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_CINH_BASE (CFG_SYS_QMAN_MEM_BASE + \ + CFG_SYS_QMAN_CENA_SIZE) +#define CFG_SYS_QMAN_CINH_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_SWP_ISDR_REG 0xE08 #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_SYS_DPAA_FMAN diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 25d9c96e164..69b8b048ce3 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -205,8 +205,8 @@ * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB) */ #if defined(CONFIG_NOR) -#define CONFIG_SYS_FLASH_BASE (0x08000000) -#define CONFIG_SYS_FLASH_SIZE 0x01000000 +#define CFG_SYS_FLASH_BASE (0x08000000) +#define CFG_SYS_FLASH_SIZE 0x01000000 #endif /* NOR support */ #endif /* ! __CONFIG_AM335X_EVM_H */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index a9a4c8d17fc..c57a0ddc21d 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -89,7 +89,7 @@ /* on one chip */ #if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE +#define CFG_SYS_FLASH_BASE NAND_BASE #endif #endif /* __CONFIG_H */ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 4ff8528cf8a..bcdff2e98ac 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -9,7 +9,7 @@ #define __CONFIG_AM43XX_EVM_H #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ -#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ +#define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include @@ -25,7 +25,7 @@ /* SPL defines. */ /* Enabling L2 Cache */ -#define CONFIG_SYS_PL310_BASE 0x48242000 +#define CFG_SYS_PL310_BASE 0x48242000 /* * When building U-Boot such that there is no previous loader diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 84555f3b13d..340a8ce6dc8 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -53,9 +53,9 @@ * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) * 0x9E0000 - 0x2000000 : USERLAND */ -#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 -#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 -#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 +#define CFG_SYS_SPI_KERNEL_OFFS 0x1E0000 +#define CFG_SYS_SPI_ARGS_OFFS 0x140000 +#define CFG_SYS_SPI_ARGS_SIZE 0x80000 /* SPI SPL */ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index eba78d3894c..ee0be972d24 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -10,7 +10,7 @@ #define CONFIG_HOSTNAME "AMCORE" -#define CONFIG_SYS_UART_PORT 0 +#define CFG_SYS_UART_PORT 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "upgrade_uboot=loady; " \ @@ -24,21 +24,21 @@ "erase 0xfff00000 0xffffffff; " \ "cp.b 0x20000 0xfff00000 ${filesize}\0" -#define CONFIG_SYS_CLK 45000000 -#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 2) +#define CFG_SYS_CLK 45000000 +#define CFG_SYS_CPU_CLK (CFG_SYS_CLK * 2) /* Register Base Addrs */ -#define CONFIG_SYS_MBAR 0x10000000 +#define CFG_SYS_MBAR 0x10000000 /* Definitions for initial stack pointer and data area (in DPRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 /* size of internal SRAM */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 #define CFG_SYS_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_SIZE 0x1000000 -#define CONFIG_SYS_FLASH_BASE 0xffc00000 +#define CFG_SYS_FLASH_BASE 0xffc00000 /* amcore design has flash data bytes wired swapped */ -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_WRITE_SWAPPED_DATA /* reserve 128-4KB */ #define LDS_BOARD_TEXT \ @@ -46,7 +46,7 @@ env/embedded.o(.text*); /* memory map space for linux boot data */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* * Cache Configuration @@ -56,25 +56,25 @@ * sdram - single region - no masks */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CF_ACR_CM_WT | CF_ACR_SM_ALL | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINVA) +#define CFG_SYS_CACHE_ACR0 (CF_ACR_CM_WT | CF_ACR_SM_ALL | \ CF_ACR_EN) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_DCM_P | CF_CACR_ESB | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_DCM_P | CF_CACR_ESB | \ CF_CACR_EC) /* CS0 - AMD Flash, address 0xffc00000 */ -#define CONFIG_SYS_CS0_BASE (CONFIG_SYS_FLASH_BASE>>16) +#define CFG_SYS_CS0_BASE (CFG_SYS_FLASH_BASE>>16) /* 4MB, AA=0,V=1 C/I BIT for errata */ -#define CONFIG_SYS_CS0_MASK 0x003f0001 +#define CFG_SYS_CS0_MASK 0x003f0001 /* WS=10, AA=1, PS=16bit (10) */ -#define CONFIG_SYS_CS0_CTRL 0x1980 +#define CFG_SYS_CS0_CTRL 0x1980 /* CS1 - DM9000 Ethernet Controller, address 0x30000000 */ -#define CONFIG_SYS_CS1_BASE 0x3000 -#define CONFIG_SYS_CS1_MASK 0x00070001 -#define CONFIG_SYS_CS1_CTRL 0x0100 +#define CFG_SYS_CS1_BASE 0x3000 +#define CFG_SYS_CS1_MASK 0x00070001 +#define CFG_SYS_CS1_CTRL 0x0100 #endif /* __AMCORE_CONFIG_H */ diff --git a/include/configs/ap121.h b/include/configs/ap121.h index 63c7dfc1feb..9c6f76383de 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -8,8 +8,8 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 +#define CFG_SYS_INIT_RAM_ADDR 0xbd000000 +#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* Miscellaneous configurable options */ diff --git a/include/configs/ap143.h b/include/configs/ap143.h index 865aad2a3f9..034cd7a7cdf 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -8,8 +8,8 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 +#define CFG_SYS_INIT_RAM_ADDR 0xbd000000 +#define CFG_SYS_INIT_RAM_SIZE 0x2000 /* * Serial Port diff --git a/include/configs/ap152.h b/include/configs/ap152.h index 0464a69e823..c56b35150a5 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -8,8 +8,8 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 +#define CFG_SYS_INIT_RAM_ADDR 0xbd000000 +#define CFG_SYS_INIT_RAM_SIZE 0x2000 /* * Serial Port diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 356d4c35ee2..c9375b4d162 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -107,7 +107,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #endif /* __CONFIG_H */ diff --git a/include/configs/arbel.h b/include/configs/arbel.h index ed32e772f8e..60758b0ca02 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -7,9 +7,9 @@ #define __CONFIG_ARBEL_H #define CFG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_BOOTMAPSZ (20 << 20) -#define CONFIG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 +#define CFG_SYS_BOOTMAPSZ (20 << 20) +#define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE +#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* Default environemnt variables */ #define CONFIG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 90cf4705f4f..c1eec5d06cc 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -20,7 +20,7 @@ #endif /* Framebuffer */ -#define CONFIG_SYS_LDB_CLOCK 28341000 +#define CFG_SYS_LDB_CLOCK 28341000 #include "mx6_common.h" @@ -407,8 +407,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index cbd0d6cea01..bb1bd50838a 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -17,11 +17,11 @@ #define CFG_SYS_SDRAM_BASE ASPEED_DRAM_BASE #ifdef CONFIG_PRE_CON_BUF_SZ -#define CONFIG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE + CONFIG_PRE_CON_BUF_SZ) -#define CONFIG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE - CONFIG_PRE_CON_BUF_SZ) +#define CFG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE + CONFIG_PRE_CON_BUF_SZ) +#define CFG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE - CONFIG_PRE_CON_BUF_SZ) #else -#define CONFIG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE) -#define CONFIG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE) +#define CFG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE) +#define CFG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE) #endif /* diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index b142ea3c335..f5922fc416e 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -55,19 +55,19 @@ * interface etc. */ -#define CONFIG_SYS_CLK 80000000 -#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) +#define CFG_SYS_CLK 80000000 +#define CFG_SYS_CPU_CLK (CFG_SYS_CLK * 3) #define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ /* * Define baudrate for UART1 (console output, tftp, ...) * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud - * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected + * CFG_SYS_BAUDRATE_TABLE defines values that can be selected * in u-boot command interface */ -#define CONFIG_SYS_UART_PORT (2) -#define CONFIG_SYS_UART2_ALT3_GPIO +#define CFG_SYS_UART_PORT (2) +#define CFG_SYS_UART2_ALT3_GPIO /* * Watchdog configuration; Watchdog is disabled for running from RAM @@ -125,7 +125,7 @@ * it needs non-blocking CFI routines. */ -#define CONFIG_SYS_FPGA_WAIT 1000 +#define CFG_SYS_FPGA_WAIT 1000 /* End of user parameters to be customized */ @@ -139,19 +139,19 @@ /* Base register address */ -#define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ +#define CFG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ /* System Conf. Reg. & System Protection Reg. */ -#define CONFIG_SYS_SCR 0x0003; -#define CONFIG_SYS_SPR 0xffff; +#define CFG_SYS_SCR 0x0003; +#define CFG_SYS_SPR 0xffff; /* * Definitions for initial stack pointer and data area (in internal SRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 -#define CONFIG_SYS_INIT_RAM_CTRL 0x221 +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_SIZE 0x8000 +#define CFG_SYS_INIT_RAM_CTRL 0x221 /* * Start addresses for the final memory configuration @@ -170,23 +170,23 @@ * CS4 - unused * CS5 - unused */ -#define CONFIG_SYS_CS0_BASE 0 -#define CONFIG_SYS_CS0_MASK 0x00ff0001 -#define CONFIG_SYS_CS0_CTRL 0x00001fc0 +#define CFG_SYS_CS0_BASE 0 +#define CFG_SYS_CS0_MASK 0x00ff0001 +#define CFG_SYS_CS0_CTRL 0x00001fc0 -#define CONFIG_SYS_CS1_BASE 0x01000000 -#define CONFIG_SYS_CS1_MASK 0x00ff0001 -#define CONFIG_SYS_CS1_CTRL 0x00001fc0 +#define CFG_SYS_CS1_BASE 0x01000000 +#define CFG_SYS_CS1_MASK 0x00ff0001 +#define CFG_SYS_CS1_CTRL 0x00001fc0 -#define CONFIG_SYS_CS2_BASE 0x20000000 -#define CONFIG_SYS_CS2_MASK 0x00ff0001 -#define CONFIG_SYS_CS2_CTRL 0x0000fec0 +#define CFG_SYS_CS2_BASE 0x20000000 +#define CFG_SYS_CS2_MASK 0x00ff0001 +#define CFG_SYS_CS2_CTRL 0x0000fec0 -#define CONFIG_SYS_CS3_BASE 0x21000000 -#define CONFIG_SYS_CS3_MASK 0x00ff0001 -#define CONFIG_SYS_CS3_CTRL 0x0000fec0 +#define CFG_SYS_CS3_BASE 0x21000000 +#define CFG_SYS_CS3_MASK 0x00ff0001 +#define CFG_SYS_CS3_CTRL 0x0000fec0 -#define CONFIG_SYS_FLASH_BASE 0x00000000 +#define CFG_SYS_FLASH_BASE 0x00000000 /* Reserve 256 kB for Monitor */ @@ -195,12 +195,12 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ -#define CONFIG_SYS_FLASH_SIZE 0x2000000 +#define CFG_SYS_FLASH_SIZE 0x2000000 #define LDS_BOARD_TEXT \ . = DEFINED(env_offset) ? env_offset : .; \ @@ -208,15 +208,15 @@ /* Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINVA) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) #endif /* _CONFIG_ASTRO_MCF5373L_H */ diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index 4631acfd664..4aa876a9f79 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -12,7 +12,7 @@ #include /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ #endif diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 0d76f419db5..b9cc7ba974d 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -24,8 +24,8 @@ */ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ /* * SDRAM: 1 bank, min 32, max 128 MB @@ -34,11 +34,11 @@ #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CFG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CFG_SYS_INIT_RAM_SIZE (16 * 1024) #ifdef CONFIG_AT91SAM9XE -# define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM +# define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM #else -# define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 +# define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 #endif /* NAND flash */ @@ -51,6 +51,6 @@ #endif /* USB */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ +#define CFG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ #endif diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index dcc1cca4791..56247e390bf 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -11,16 +11,16 @@ #define __CONFIG_H /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ #include /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x20000000 #define CFG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM +#define CFG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM /* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -42,6 +42,6 @@ #define CONFIG_DM9000_NO_SROM /* USB */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ +#define CFG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ #endif diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index aefa9fc60c4..afdb74785f8 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -19,20 +19,20 @@ #include /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* SDRAM */ #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CFG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 +#define CFG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* NOR flash, if populated */ #ifdef CONFIG_SYS_USE_NORFLASH #define PHYS_FLASH_1 0x10000000 -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 /* Address and size of Primary Environment Sector */ @@ -50,9 +50,9 @@ #define MASTER_PLL_OUT 3 /* clocks */ -#define CONFIG_SYS_MOR_VAL \ +#define CFG_SYS_MOR_VAL \ (AT91_PMC_MOR_MOSCEN | AT91_PMC_MOR_OSCOUNT(255)) -#define CONFIG_SYS_PLLAR_VAL \ +#define CFG_SYS_PLLAR_VAL \ (AT91_PMC_PLLAR_29 | \ AT91_PMC_PLLXR_OUT(MASTER_PLL_OUT) | \ AT91_PMC_PLLXR_PLLCOUNT(63) | \ @@ -60,31 +60,31 @@ AT91_PMC_PLLXR_DIV(MASTER_PLL_DIV)) /* PCK/2 = MCK Master Clock from PLLA */ -#define CONFIG_SYS_MCKR1_VAL \ +#define CFG_SYS_MCKR1_VAL \ (AT91_PMC_MCKR_CSS_SLOW | AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_2) /* PCK/2 = MCK Master Clock from PLLA */ -#define CONFIG_SYS_MCKR2_VAL \ +#define CFG_SYS_MCKR2_VAL \ (AT91_PMC_MCKR_CSS_PLLA | AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_2) /* define PDC[31:16] as DATA[31:16] */ -#define CONFIG_SYS_PIOD_PDR_VAL1 0xFFFF0000 +#define CFG_SYS_PIOD_PDR_VAL1 0xFFFF0000 /* no pull-up for D[31:16] */ -#define CONFIG_SYS_PIOD_PPUDR_VAL 0xFFFF0000 +#define CFG_SYS_PIOD_PPUDR_VAL 0xFFFF0000 /* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */ -#define CONFIG_SYS_MATRIX_EBICSA_VAL \ +#define CFG_SYS_MATRIX_EBICSA_VAL \ (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_VDDIOMSEL_3_3V | \ AT91_MATRIX_CSA_EBI_CS1A) /* SDRAM */ /* SDRAMC_MR Mode register */ -#define CONFIG_SYS_SDRC_MR_VAL1 0 +#define CFG_SYS_SDRC_MR_VAL1 0 /* SDRAMC_TR - Refresh Timer register */ -#define CONFIG_SYS_SDRC_TR_VAL1 0x13C +#define CFG_SYS_SDRC_TR_VAL1 0x13C /* SDRAMC_CR - Configuration register*/ -#define CONFIG_SYS_SDRC_CR_VAL \ +#define CFG_SYS_SDRC_CR_VAL \ (AT91_SDRAMC_NC_9 | \ AT91_SDRAMC_NR_13 | \ AT91_SDRAMC_NB_4 | \ @@ -98,10 +98,10 @@ (1 << 28)) /* Exit Self Refresh to Active Delay */ /* Memory Device Register -> SDRAM */ -#define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM -#define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE +#define CFG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM +#define CFG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE #define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH +#define CFG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH #define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ @@ -110,35 +110,35 @@ #define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR +#define CFG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR #define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL +#define CFG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL #define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ +#define CFG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ #define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ -#define CONFIG_SYS_SMC0_SETUP0_VAL \ +#define CFG_SYS_SMC0_SETUP0_VAL \ (AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) | \ AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10)) -#define CONFIG_SYS_SMC0_PULSE0_VAL \ +#define CFG_SYS_SMC0_PULSE0_VAL \ (AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) | \ AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11)) -#define CONFIG_SYS_SMC0_CYCLE0_VAL \ +#define CFG_SYS_SMC0_CYCLE0_VAL \ (AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22)) -#define CONFIG_SYS_SMC0_MODE0_VAL \ +#define CFG_SYS_SMC0_MODE0_VAL \ (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ AT91_SMC_MODE_DBW_16 | \ AT91_SMC_MODE_TDF | AT91_SMC_MODE_TDF_CYCLE(6)) /* user reset enable */ -#define CONFIG_SYS_RSTC_RMR_VAL \ +#define CFG_SYS_RSTC_RMR_VAL \ (AT91_RSTC_KEY | \ AT91_RSTC_MR_URSTEN | \ AT91_RSTC_MR_ERSTL(15)) /* Disable Watchdog */ -#define CONFIG_SYS_WDTC_WDMR_VAL \ +#define CFG_SYS_WDTC_WDMR_VAL \ (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \ AT91_WDT_MR_WDV(0xfff) | \ AT91_WDT_MR_WDDIS | \ @@ -160,6 +160,6 @@ #endif /* USB */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ +#define CFG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ #endif diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 08cfee1a4e1..2ceb8067d58 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -11,8 +11,8 @@ #define __CONFIG_H /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x70000000 @@ -41,9 +41,9 @@ 56, 57, 58, 59, 60, 61, 62, 63, } #endif -#define CONFIG_SYS_MASTER_CLOCK 132096000 -#define CONFIG_SYS_AT91_PLLA 0x20c73f03 -#define CONFIG_SYS_MCKR 0x1301 -#define CONFIG_SYS_MCKR_CSS 0x1302 +#define CFG_SYS_MASTER_CLOCK 132096000 +#define CFG_SYS_AT91_PLLA 0x20c73f03 +#define CFG_SYS_MCKR 0x1301 +#define CFG_SYS_MCKR_CSS 0x1302 #endif diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 76f87c16192..0f9e2cfb582 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -10,8 +10,8 @@ #define __AT91SAM9N12_CONFIG_H_ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ /* Misc CPU related */ #define CFG_SYS_SDRAM_BASE 0x20000000 @@ -35,9 +35,9 @@ /* SPL */ -#define CONFIG_SYS_MASTER_CLOCK 132096000 -#define CONFIG_SYS_AT91_PLLA 0x20953f03 -#define CONFIG_SYS_MCKR 0x1301 -#define CONFIG_SYS_MCKR_CSS 0x1302 +#define CFG_SYS_MASTER_CLOCK 132096000 +#define CFG_SYS_AT91_PLLA 0x20953f03 +#define CFG_SYS_MCKR 0x1301 +#define CFG_SYS_MCKR_CSS 0x1302 #endif diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index e1111b6dd38..cad00f647b6 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -13,15 +13,15 @@ #include /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CFG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM +#define CFG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index eb1d1ad60d1..509c458e5fa 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -9,8 +9,8 @@ #define __CONFIG_H__ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ /* general purpose I/O */ @@ -38,9 +38,9 @@ /* SPL */ -#define CONFIG_SYS_MASTER_CLOCK 132096000 -#define CONFIG_SYS_AT91_PLLA 0x20c73f03 -#define CONFIG_SYS_MCKR 0x1301 -#define CONFIG_SYS_MCKR_CSS 0x1302 +#define CFG_SYS_MASTER_CLOCK 132096000 +#define CFG_SYS_AT91_PLLA 0x20c73f03 +#define CFG_SYS_MCKR 0x1301 +#define CFG_SYS_MCKR_CSS 0x1302 #endif diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 83ac87b10a5..03e04e6e680 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -39,15 +39,15 @@ /* support JEDEC */ #define PHYS_FLASH_1 0x88000000 /* BANK 0 */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } +#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CFG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } /* max number of memory banks */ /* * There are 4 banks supported for this Controller, * but we have only 1 bank connected to flash on board */ -#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000} +#define CFG_SYS_FLASH_BANKS_SIZES {0x4000000} /* max number of sectors on one chip */ #define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) @@ -63,7 +63,7 @@ */ /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Increase max gunzip size */ /* Support autoboot from RAM (kernel image is loaded via debug port) */ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 6d82712186d..04dc50b1cb2 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -19,8 +19,8 @@ * Memory configuration */ -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE SZ_512M /* diff --git a/include/configs/bcm7260.h b/include/configs/bcm7260.h index cba109b74a9..43edc91b101 100644 --- a/include/configs/bcm7260.h +++ b/include/configs/bcm7260.h @@ -12,7 +12,7 @@ #define CFG_SYS_NS16550_COM1 0xf040c000 -#define CONFIG_SYS_INIT_RAM_ADDR 0x10200000 +#define CFG_SYS_INIT_RAM_ADDR 0x10200000 #include "bcmstb.h" diff --git a/include/configs/bcm7445.h b/include/configs/bcm7445.h index a07f1b7ad0f..114337294e0 100644 --- a/include/configs/bcm7445.h +++ b/include/configs/bcm7445.h @@ -12,7 +12,7 @@ #define CFG_SYS_NS16550_COM1 0xf040ab00 -#define CONFIG_SYS_INIT_RAM_ADDR 0x80200000 +#define CFG_SYS_INIT_RAM_ADDR 0x80200000 #include "bcmstb.h" diff --git a/include/configs/bcm963138.h b/include/configs/bcm963138.h index f1b68ba6733..c61acf6b86b 100644 --- a/include/configs/bcm963138.h +++ b/include/configs/bcm963138.h @@ -7,6 +7,6 @@ #define __BCM963138_H #define CFG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_HZ_CLOCK 500000000 +#define CFG_SYS_HZ_CLOCK 500000000 #endif diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 9769a714092..57360b60ca9 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -82,7 +82,7 @@ extern phys_addr_t prior_stage_fdt_address; * initramfs images, in which case this limitation is eliminated. */ #define CFG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x100000 +#define CFG_SYS_INIT_RAM_SIZE 0x100000 /* * CONFIG_SYS_LOAD_ADDR - 1 MiB. @@ -102,7 +102,7 @@ extern phys_addr_t prior_stage_fdt_address; /* * Serial console configuration. */ -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ +#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 115200} /* diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index a075a5b2f32..0842a4a8f54 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -200,7 +200,7 @@ #define PHYS_SDRAM_SIZE (SZ_512M) #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #endif /* __CONFIG_H */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 0b1fc91d9e1..cb28ae28dd3 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -26,10 +26,10 @@ #define CONFIG_SH_QSPI_BASE 0xE6B10000 #else #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ -#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } -#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) } +#define CFG_SYS_FLASH_BASE 0x00000000 +#define CFG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ +#define CFG_SYS_FLASH_BANKS_LIST { (CFG_SYS_FLASH_BASE) } +#define CFG_SYS_FLASH_BANKS_SIZES { (CFG_SYS_FLASH_SIZE) } #endif /* Board Clock */ diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h index e40f110cac6..0d254cd7f9c 100644 --- a/include/configs/bmips_bcm3380.h +++ b/include/configs/bmips_bcm3380.h @@ -14,7 +14,7 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif #endif /* __CONFIG_BMIPS_BCM3380_H */ diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index 508317f231e..7865b9c17e5 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -14,7 +14,7 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif #endif /* __CONFIG_BMIPS_BCM6318_H */ diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h index c5bda16d2bc..93426d2661d 100644 --- a/include/configs/bmips_bcm63268.h +++ b/include/configs/bmips_bcm63268.h @@ -14,7 +14,7 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif #endif /* __CONFIG_BMIPS_BCM63268_H */ diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h index 32397c26e8a..e992fe6a560 100644 --- a/include/configs/bmips_bcm6328.h +++ b/include/configs/bmips_bcm6328.h @@ -14,7 +14,7 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif #endif /* __CONFIG_BMIPS_BCM6328_H */ diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h index 18c99727a04..224b6977747 100644 --- a/include/configs/bmips_bcm6338.h +++ b/include/configs/bmips_bcm6338.h @@ -14,9 +14,9 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif -#define CONFIG_SYS_FLASH_BASE 0xbfc00000 +#define CFG_SYS_FLASH_BASE 0xbfc00000 #endif /* __CONFIG_BMIPS_BCM6338_H */ diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index f8d7148d497..3211d23049e 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -14,9 +14,9 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif -#define CONFIG_SYS_FLASH_BASE 0xbfc00000 +#define CFG_SYS_FLASH_BASE 0xbfc00000 #endif /* __CONFIG_BMIPS_BCM6348_H */ diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index d564a32ee52..7e2449ca24f 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -14,9 +14,9 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif -#define CONFIG_SYS_FLASH_BASE 0xbe000000 +#define CFG_SYS_FLASH_BASE 0xbe000000 #endif /* __CONFIG_BMIPS_BCM6358_H */ diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h index f982a4363db..443ee470107 100644 --- a/include/configs/bmips_bcm6362.h +++ b/include/configs/bmips_bcm6362.h @@ -14,7 +14,7 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif #endif /* __CONFIG_BMIPS_BCM6362_H */ diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index 11d623c28b2..c550f97b935 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -14,9 +14,9 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif -#define CONFIG_SYS_FLASH_BASE 0xb8000000 +#define CFG_SYS_FLASH_BASE 0xb8000000 #endif /* __CONFIG_BMIPS_BCM6368_H */ diff --git a/include/configs/bmips_bcm6838.h b/include/configs/bmips_bcm6838.h index 30965c85bfa..f2129140725 100644 --- a/include/configs/bmips_bcm6838.h +++ b/include/configs/bmips_bcm6838.h @@ -14,7 +14,7 @@ /* U-Boot */ #if defined(CONFIG_BMIPS_BOOT_RAM) -#define CONFIG_SYS_INIT_SP_OFFSET SZ_8K +#define CFG_SYS_INIT_SP_OFFSET SZ_8K #endif #endif /* __CONFIG_BMIPS_BCM6838_H */ diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index 7e358a6314b..3cdd0e47eae 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -9,7 +9,7 @@ #include /* UART */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } #endif /* __CONFIG_BMIPS_COMMON_H */ diff --git a/include/configs/boston.h b/include/configs/boston.h index 0033a7fb022..14ce8a4c0f3 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -27,7 +27,7 @@ # define CFG_SYS_SDRAM_BASE 0x80000000 #endif -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 /* * Console diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 78b2000aa2e..d35c7c4a591 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -13,7 +13,7 @@ /* -- i.mx6 specifica -- */ #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_PL310_BASE L2_PL310_BASE +#define CFG_SYS_PL310_BASE L2_PL310_BASE #endif /* !CONFIG_SYS_L2CACHE_OFF */ #define CONFIG_MXC_GPT_HCLK @@ -77,8 +77,8 @@ BUR_COMMON_ENV \ /* RAM */ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Ethernet */ #define CONFIG_FEC_FIXED_SPEED _1000BASET diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index f1734aaca7f..3e0b4250788 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -22,7 +22,7 @@ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ /* Timer information */ -#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ +#define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 6f2b8245b98..6f3396bad4c 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -19,7 +19,7 @@ /* Flat Device Tree Definitions */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CFG_SYS_BOOTMAPSZ (256 << 20) #define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 diff --git a/include/configs/ci20.h b/include/configs/ci20.h index f268dfd0943..3329c24fa68 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -12,7 +12,7 @@ /* Memory configuration */ #define CFG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 /* NS16550-ish UARTs */ #define CFG_SYS_NS16550_CLK 48000000 diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index eb899c45578..b1f9470d9ca 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -23,8 +23,8 @@ #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 #define CONFIG_PCA953X -#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20 -#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } +#define CFG_SYS_I2C_PCA953X_ADDR 0x20 +#define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } #undef CONFIG_EXTRA_ENV_SETTINGS @@ -83,8 +83,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* SPI Flash support */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 47c4aacc436..d5c03957975 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -22,8 +22,8 @@ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Serial console */ #define CONFIG_MXC_UART_BASE UART4_BASE @@ -139,7 +139,7 @@ #define CONFIG_MXC_USB_FLAGS 0 /* Boot */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* misc */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 8f058213e9e..8ad1cfb5ded 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -9,7 +9,7 @@ #define __CONFIG_CM_T43_H #define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */ -#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ +#define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include @@ -32,7 +32,7 @@ #define CONFIG_POWER_TPS65218 /* Enabling L2 Cache */ -#define CONFIG_SYS_PL310_BASE 0x48242000 +#define CFG_SYS_PL310_BASE 0x48242000 /* * Since SPL did pll and ddr initialization for us, diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 65b9074cd9c..01828ea2011 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -29,18 +29,18 @@ * --- */ -#define CONFIG_SYS_CLK 66000000 +#define CFG_SYS_CLK 66000000 #define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ /* --- * Define baudrate for UART1 (console output, tftp, ...) * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud - * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command + * CFG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command * interface * --- */ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) /* --- * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change @@ -133,21 +133,21 @@ enter a valid image address in flash */ * --- */ -#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ +#define CFG_SYS_MBAR 0x10000000 /* Register Base Addrs */ /* --- * System Conf. Reg. & System Protection Reg. * --- */ -#define CONFIG_SYS_SCR 0x0003 -#define CONFIG_SYS_SPR 0xffff +#define CFG_SYS_SCR 0x0003 +#define CFG_SYS_SPR 0xffff /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in internal SRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -168,28 +168,28 @@ enter a valid image address in flash */ *----------------------------------------------------------------------- */ -#define CONFIG_SYS_FLASH_BASE 0xffe00000 +#define CFG_SYS_FLASH_BASE 0xffe00000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /*----------------------------------------------------------------------- * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ CF_CACR_CEIB | CF_CACR_DCM | \ CF_CACR_EUSP) @@ -209,15 +209,15 @@ enter a valid image address in flash */ /*----------------------------------------------------------------------- * Port configuration (GPIO) */ -#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external +#define CFG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external GPIO*/ -#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs +#define CFG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs (1^=output, 0^=input) */ -#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */ -#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART +#define CFG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */ +#define CFG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART configuration */ -#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */ -#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */ -#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */ +#define CFG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */ +#define CFG_SYS_PBDAT 0x0000 /* PortB value reg. */ +#define CFG_SYS_PDCNT 0x00000000 /* PortD control reg. */ #endif /* _CONFIG_COBRA5272_H */ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index ca8445a3d05..12dc946fc78 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -117,8 +117,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #ifdef CONFIG_TARGET_COLIBRI_IMX6ULL_NAND /* NAND stuff */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 14278e9ca4f..c6a79debd6b 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -101,7 +101,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #endif /* __CONFIG_H */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index c08095561d8..32a79b02554 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -161,8 +161,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND /* NAND stuff */ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 11283071397..fa778ec9e2b 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -86,8 +86,8 @@ #define PHYS_SDRAM_SIZE (256 * SZ_1M) #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* USB Host Support */ diff --git a/include/configs/corvus.h b/include/configs/corvus.h index c7a3e47437b..8a61086ecc1 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -24,8 +24,8 @@ */ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* serial console */ #define CONFIG_USART_BASE ATMEL_BASE_DBGU @@ -63,10 +63,10 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } -#define CONFIG_SYS_MASTER_CLOCK 132096000 +#define CFG_SYS_MASTER_CLOCK 132096000 #define AT91_PLL_LOCK_TIMEOUT 1000000 -#define CONFIG_SYS_AT91_PLLA 0x20c73f03 -#define CONFIG_SYS_MCKR 0x1301 -#define CONFIG_SYS_MCKR_CSS 0x1302 +#define CFG_SYS_AT91_PLLA 0x20c73f03 +#define CFG_SYS_MCKR 0x1301 +#define CFG_SYS_MCKR_CSS 0x1302 #endif diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index e2e1cfedbde..578277fc75c 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -17,13 +17,13 @@ /* * SoC Configuration */ -#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_OSCIN_FREQ 24000000 -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CFG_SYS_EXCEPTION_VECTORS_HIGH +#define CFG_SYS_OSCIN_FREQ 24000000 +#define CFG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CFG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11) +#define CFG_SYS_DV_NOR_BOOT_CFG (0x11) #endif /* @@ -36,7 +36,7 @@ /* memtest will be run on 16MB */ -#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ +#define CFG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ DAVINCI_SYSCFG_SUSPSRC_UART2 | \ @@ -47,17 +47,17 @@ * PLL configuration */ -#define CONFIG_SYS_DA850_PLL0_PLLM 24 -#define CONFIG_SYS_DA850_PLL1_PLLM 21 +#define CFG_SYS_DA850_PLL0_PLLM 24 +#define CFG_SYS_DA850_PLL1_PLLM 21 /* * DDR2 memory configuration */ -#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ +#define CFG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ DV_DDR_PHY_EXT_STRBEN | \ (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT)) -#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ +#define CFG_SYS_DA850_DDR2_SDBCR ( \ (1 << DV_DDR_SDCR_MSDRAMEN_SHIFT) | \ (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ @@ -67,9 +67,9 @@ (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) /* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */ -#define CONFIG_SYS_DA850_DDR2_SDBCR2 0 +#define CFG_SYS_DA850_DDR2_SDBCR2 0 -#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ +#define CFG_SYS_DA850_DDR2_SDTIMR ( \ (14 << DV_DDR_SDTMR1_RFC_SHIFT) | \ (2 << DV_DDR_SDTMR1_RP_SHIFT) | \ (2 << DV_DDR_SDTMR1_RCD_SHIFT) | \ @@ -79,7 +79,7 @@ (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ (0 << DV_DDR_SDTMR1_WTR_SHIFT)) -#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ +#define CFG_SYS_DA850_DDR2_SDTIMR2 ( \ (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ (0 << DV_DDR_SDTMR2_XP_SHIFT) | \ (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ @@ -88,20 +88,20 @@ (0 << DV_DDR_SDTMR2_RTP_SHIFT) | \ (0 << DV_DDR_SDTMR2_CKE_SHIFT)) -#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000494 -#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30 +#define CFG_SYS_DA850_DDR2_SDRCR 0x00000494 +#define CFG_SYS_DA850_DDR2_PBBPR 0x30 /* * Serial Driver info */ #define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) +#define CFG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) /* * I2C Configuration */ -#define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 +#define CFG_SYS_I2C_EXPANDER_ADDR 0x20 /* * Flash & Environment @@ -125,7 +125,7 @@ #endif #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE +#define CFG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE #define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ #endif diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index b16f3d48e38..4b31bbf4e11 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -43,8 +43,8 @@ #define PHYS_SDRAM_SIZE SZ_512M #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index c473f3d86eb..66aa6d5c3c4 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -29,8 +29,8 @@ /* * NOR Flash */ -#define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE -#define CONFIG_SYS_FLASH_SIZE SZ_4M +#define CFG_SYS_FLASH_BASE EMC_CS0_BASE +#define CFG_SYS_FLASH_SIZE SZ_4M /* * NAND controller diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index ddc436d5019..f9b3d19480e 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -73,8 +73,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment */ diff --git a/include/configs/display5.h b/include/configs/display5.h index 0a7428b02ca..7636d2869a9 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -30,9 +30,9 @@ */ /* Below values are "dummy" - only to avoid build break */ -#define CONFIG_SYS_SPI_KERNEL_OFFS 0x150000 -#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 -#define CONFIG_SYS_SPI_ARGS_SIZE 0x10000 +#define CFG_SYS_SPI_KERNEL_OFFS 0x150000 +#define CFG_SYS_SPI_ARGS_OFFS 0x140000 +#define CFG_SYS_SPI_ARGS_SIZE 0x10000 #define CONFIG_MXC_UART_BASE UART5_BASE @@ -285,8 +285,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* ENV config */ #ifdef CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index bb335a0a473..8217712e390 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -63,9 +63,9 @@ * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) * 0x9E0000 - 0x2000000 : USERLAND */ -#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 -#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 -#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 +#define CFG_SYS_SPI_KERNEL_OFFS 0x1E0000 +#define CFG_SYS_SPI_ARGS_OFFS 0x140000 +#define CFG_SYS_SPI_ARGS_SIZE 0x80000 /* SPI SPL */ @@ -87,8 +87,8 @@ /* Parallel NOR Support */ #if defined(CONFIG_NOR) /* NOR: device related configs */ -#define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ -#define CONFIG_SYS_FLASH_BASE (0x08000000) +#define CFG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ +#define CFG_SYS_FLASH_BASE (0x08000000) /* Reduce SPL size by removing unlikey targets */ #endif /* NOR support */ diff --git a/include/configs/draak.h b/include/configs/draak.h index 8bfba78dc8e..8140bc469c5 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -14,7 +14,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } +#define CFG_SYS_WRITE_SWAPPED_DATA #endif /* __DRAAK_H */ diff --git a/include/configs/dragonboard845c.h b/include/configs/dragonboard845c.h index 677a4856230..bd88c42a3ba 100644 --- a/include/configs/dragonboard845c.h +++ b/include/configs/dragonboard845c.h @@ -11,7 +11,7 @@ #include #include -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } +#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x5000000\0" \ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 80de73d15d5..426155dbdbf 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -12,7 +12,7 @@ * High Level Configuration Options (easy to change) * *----------------------------------------------------------------------*/ -#define CONFIG_SYS_UART_PORT (0) +#define CFG_SYS_UART_PORT (0) #undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */ @@ -27,18 +27,18 @@ * Environment is in the second sector of the first 256k of flash * *----------------------------------------------------------------------*/ -/*#define CONFIG_SYS_DRAM_TEST 1 */ -#undef CONFIG_SYS_DRAM_TEST +/*#define CFG_SYS_DRAM_TEST 1 */ +#undef CFG_SYS_DRAM_TEST /*----------------------------------------------------------------------* * Clock and PLL Configuration * *----------------------------------------------------------------------*/ -#define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */ +#define CFG_SYS_CLK 80000000 /* 8MHz * 8 */ /* PLL Configuration: Ext Clock * 8 (see table 9-4 of MCF user manual) */ -#define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ -#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ +#define CFG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ +#define CFG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ /*----------------------------------------------------------------------* * Network * @@ -54,14 +54,14 @@ * You should know what you are doing if you make changes here. *-----------------------------------------------------------------------*/ -#define CONFIG_SYS_MBAR 0x40000000 +#define CFG_SYS_MBAR 0x40000000 /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) *-----------------------------------------------------------------------*/ -#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 +#define CFG_SYS_INIT_RAM_ADDR 0x20000000 +#define CFG_SYS_INIT_RAM_SIZE 0x10000 /*----------------------------------------------------------------------- * Start addresses for the final memory configuration @@ -79,34 +79,34 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /*----------------------------------------------------------------------- * FLASH organization */ #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000 -#define CONFIG_SYS_INT_FLASH_ENABLE 0x21 +#define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE +#define CFG_SYS_INT_FLASH_BASE 0xF0000000 +#define CFG_SYS_INT_FLASH_ENABLE 0x21 -#define CONFIG_SYS_FLASH_SIZE 16*1024*1024 +#define CFG_SYS_FLASH_SIZE 16*1024*1024 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } /*----------------------------------------------------------------------- * Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) -#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) +#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DBWE | \ CF_CACR_EUSP) @@ -114,36 +114,36 @@ * Memory bank definitions */ -#define CONFIG_SYS_CS0_BASE 0xFF000000 -#define CONFIG_SYS_CS0_CTRL 0x00001980 -#define CONFIG_SYS_CS0_MASK 0x00FF0001 +#define CFG_SYS_CS0_BASE 0xFF000000 +#define CFG_SYS_CS0_CTRL 0x00001980 +#define CFG_SYS_CS0_MASK 0x00FF0001 -#define CONFIG_SYS_CS2_BASE 0xE0000000 -#define CONFIG_SYS_CS2_CTRL 0x00001980 -#define CONFIG_SYS_CS2_MASK 0x000F0001 +#define CFG_SYS_CS2_BASE 0xE0000000 +#define CFG_SYS_CS2_CTRL 0x00001980 +#define CFG_SYS_CS2_MASK 0x000F0001 -#define CONFIG_SYS_CS3_BASE 0xE0100000 -#define CONFIG_SYS_CS3_CTRL 0x00001980 -#define CONFIG_SYS_CS3_MASK 0x000F0001 +#define CFG_SYS_CS3_BASE 0xE0100000 +#define CFG_SYS_CS3_CTRL 0x00001980 +#define CFG_SYS_CS3_MASK 0x000F0001 /*----------------------------------------------------------------------- * Port configuration */ -#define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ -#define CONFIG_SYS_PADDR 0x0000000 -#define CONFIG_SYS_PADAT 0x0000000 +#define CFG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ +#define CFG_SYS_PADDR 0x0000000 +#define CFG_SYS_PADAT 0x0000000 -#define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ -#define CONFIG_SYS_PBDDR 0x0000000 -#define CONFIG_SYS_PBDAT 0x0000000 +#define CFG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ +#define CFG_SYS_PBDDR 0x0000000 +#define CFG_SYS_PBDAT 0x0000000 -#define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ +#define CFG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ -#define CONFIG_SYS_PASPAR 0x0F0F -#define CONFIG_SYS_PEHLPAR 0xC0 -#define CONFIG_SYS_PUAPAR 0x0F -#define CONFIG_SYS_DDRUA 0x05 -#define CONFIG_SYS_PJPAR 0xFF +#define CFG_SYS_PASPAR 0x0F0F +#define CFG_SYS_PEHLPAR 0xC0 +#define CFG_SYS_PUAPAR 0x0F +#define CFG_SYS_DDRUA 0x05 +#define CFG_SYS_PJPAR 0xFF /*----------------------------------------------------------------------- * I2C diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index 597efd6745c..d1882a9646b 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -16,7 +16,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } +#define CFG_SYS_WRITE_SWAPPED_DATA #endif /* __EBISU_H */ diff --git a/include/configs/edison.h b/include/configs/edison.h index b05141ad645..455a889b64c 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -10,6 +10,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_STACK_SIZE (32 * 1024) +#define CFG_SYS_STACK_SIZE (32 * 1024) #endif diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index d24bc56f34a..141f9913e63 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -51,8 +51,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* environment organization */ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index e39bb94314f..29b7748e786 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -28,8 +28,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 6cae663cb8a..6647148c96f 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -16,7 +16,7 @@ /* NAND specific changes for etamin due to different page size */ #undef CFG_SYS_NAND_ECCPOS -#define CONFIG_SYS_ENV_SECT_SIZE (512 << 10) /* 512 KiB */ +#define CFG_SYS_ENV_SECT_SIZE (512 << 10) /* 512 KiB */ #define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 97a8ffb4f61..52eb0be6761 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -18,19 +18,19 @@ /* CPU information */ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ /* 32kB internal SRAM */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x00300000 /*AT91SAM9XE_SRAM_BASE */ -#define CONFIG_SYS_INIT_RAM_SIZE (32 << 10) +#define CFG_SYS_INIT_RAM_ADDR 0x00300000 /*AT91SAM9XE_SRAM_BASE */ +#define CFG_SYS_INIT_RAM_SIZE (32 << 10) /* 128MB SDRAM in 1 bank */ #define CFG_SYS_SDRAM_BASE 0x20000000 #define CFG_SYS_SDRAM_SIZE (128 << 20) /* 512kB on-chip NOR flash */ -# define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */ +# define CFG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */ /* bootstrap + u-boot + env + linux in dataflash on CS0 */ @@ -53,16 +53,16 @@ /* MMC */ #ifdef CONFIG_CMD_MMC -#define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 +#define CFG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 #endif /* RTC */ #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP) -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 +#define CFG_SYS_I2C_RTC_ADDR 0x51 #endif /* I2C */ -#define CONFIG_SYS_MAX_I2C_BUS 1 +#define CFG_SYS_MAX_I2C_BUS 1 #define I2C_SOFT_DECLARATIONS diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h index cd6cb062eca..bec1660cf48 100644 --- a/include/configs/evb_ast2500.h +++ b/include/configs/evb_ast2500.h @@ -11,7 +11,7 @@ #include -#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* Misc */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h index ecd05fe15ce..c9c988b9374 100644 --- a/include/configs/evb_ast2600.h +++ b/include/configs/evb_ast2600.h @@ -8,7 +8,7 @@ #include -#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* Misc */ #define STR_HELPER(s) #s diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index a94f5a15f0d..c9e0c13172c 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -15,7 +15,7 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" -#define CONFIG_SYS_SPI_BASE 0x12D30000 +#define CFG_SYS_SPI_BASE 0x12D30000 #define FLASH_SIZE (4 << 20) #define CONFIG_SPI_BOOTING diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 68c36dc2fd9..8672b9e9527 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -18,7 +18,7 @@ #define CPU_RELEASE_ADDR secondary_boot_addr -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600} #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index f5353ec79a1..89e531649a6 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -14,8 +14,8 @@ #endif /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x20000000 @@ -32,10 +32,10 @@ /* SPL */ -#define CONFIG_SYS_MASTER_CLOCK 132096000 -#define CONFIG_SYS_AT91_PLLA 0x20c73f03 -#define CONFIG_SYS_MCKR 0x1301 -#define CONFIG_SYS_MCKR_CSS 0x1302 +#define CFG_SYS_MASTER_CLOCK 132096000 +#define CFG_SYS_AT91_PLLA 0x20c73f03 +#define CFG_SYS_MCKR 0x1301 +#define CFG_SYS_MCKR_CSS 0x1302 #define CFG_SYS_NAND_U_BOOT_SIZE 0xa0000 #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index a7557144402..0ba4efe67ac 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -9,14 +9,14 @@ /* RAM */ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ -#define CONFIG_SYS_UBOOT_BASE 0 +#define CFG_SYS_UBOOT_BASE 0 /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) @@ -25,7 +25,7 @@ #endif /* UART */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 921600 } /* RAM */ diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 6cdfe8c4c3c..36dcee87c5f 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -14,7 +14,7 @@ */ #define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ /* TODO: Check: Can this be unified with CFG_SYS_SDRAM_BASE? */ -#define CONFIG_SYS_DDR_SDRAM_BASE CFG_SYS_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE CFG_SYS_SDRAM_BASE /* * Memory test @@ -28,16 +28,16 @@ /* * Initial RAM Base Address Setup */ -#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ +#define CFG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ -#define CONFIG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ +#define CFG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ +#define CFG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} /* @@ -49,7 +49,7 @@ * have to be in the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ +#define CFG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ /* * Environment Configuration diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 85ceaf8ccb1..97fe76cfa8e 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -38,8 +38,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Command definition */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 1dba2e92fb9..cbaf03c2a22 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -92,11 +92,11 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ +#define CFG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* environment organization */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index fe00272a1bd..b855bbc25fb 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -54,8 +54,8 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* * MTD Command for mtdparts diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 0d281a3379a..4aef0b4abd1 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_BOOTMAPSZ (16 << 20) +#define CFG_SYS_BOOTMAPSZ (16 << 20) #define CONFIG_PL011_CLOCK 150000000 diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 775f166f1d3..c5ef2f99b0f 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -26,7 +26,7 @@ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0xf6801000 diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index 914c3ad9ef0..fad1f980481 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -18,7 +18,7 @@ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0xe82b1000 diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index fcb2dec54ec..59ea8960071 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -21,8 +21,8 @@ * Memory configuration */ -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE SZ_1G /* diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 0ae935208ca..fbfcded4712 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -20,8 +20,8 @@ * Memory configuration */ -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE SZ_1G /* diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 594aa4f75e7..b0abd548826 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -80,7 +80,7 @@ /* CS2 Base address */ #define PHYS_FLASH_1 0xc0000000 /* Flash Base for U-Boot */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 /* Address and size of Redundant Environment Sector */ /* diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index d4e2583ee8a..1f30798550c 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -110,8 +110,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* UART */ #ifdef CONFIG_MXC_UART diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 1b08c5e9a7e..4e23f1a2dc5 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -106,8 +106,8 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index a074df5829b..402f83c18ea 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -56,7 +56,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #endif /* __IMX6DL_MAMOJ_CONFIG_H */ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 855af29ec96..99da081cdae 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -86,8 +86,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* SPL */ #ifdef CONFIG_SPL diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h index 0a688afe6cd..2d9d3c34b0d 100644 --- a/include/configs/imx6ulz_smm_m2.h +++ b/include/configs/imx6ulz_smm_m2.h @@ -64,8 +64,8 @@ #define PHYS_SDRAM_SIZE SZ_128M #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index e5118f11580..76771fd66ce 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -70,8 +70,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Config*/ #define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index e62f9c5462b..c228cf7f37b 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -11,7 +11,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -123,8 +123,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 143da001104..03325e6c3a7 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -9,7 +9,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -71,8 +71,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index c7669305f59..80321cf2d8d 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -18,8 +18,8 @@ #endif /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 9937071874f..8a694c88a53 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -15,10 +15,10 @@ #define UBOOT_ITB_OFFSET_FSPI \ (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE) #ifdef CONFIG_FSPI_CONF_HEADER -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI) #else -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #endif @@ -53,8 +53,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index cd47d842ffc..41ab9307793 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -38,8 +38,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_2M #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 58e165c35a7..28ce834769c 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -9,7 +9,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -29,8 +29,8 @@ "splblk=0x42\0" \ BOOTENV -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_2M #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index f532c1052f5..85fd5e2371f 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -9,7 +9,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) /* Initial environment variables */ @@ -75,8 +75,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index 415248eadfc..204fc4b3164 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #define MEM_LAYOUT_ENV_SETTINGS \ @@ -23,8 +23,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_512K #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 8857bc7c598..024b86c7f1d 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #define BOOT_TARGET_DEVICES(func) \ @@ -45,8 +45,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 628bb5813ff..4633843d1bb 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #define BOOT_TARGET_DEVICES(func) \ @@ -43,8 +43,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_512K #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index a169be35a49..a585cbf87e4 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -9,7 +9,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) /* Enable Distro Boot */ @@ -23,8 +23,8 @@ "splblk=0x40\0" \ BOOTENV -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_2M #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 62bcef5eecd..5443022b04c 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -11,8 +11,8 @@ #include /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index d394762e3bb..738677ff37c 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ @@ -50,8 +50,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 /* Totally 2GB DDR */ diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h index 3e995c97217..d67bad8971d 100644 --- a/include/configs/imx8mp_icore_mx8mp.h +++ b/include/configs/imx8mp_icore_mx8mp.h @@ -11,7 +11,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ @@ -52,8 +52,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 /* Totally 2GB DDR */ #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 1943a24b79d..58f7dc6518c 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -12,7 +12,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) /* GUIDs for capsule updatable firmware images */ #define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \ @@ -131,8 +131,8 @@ "fi;\0" /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 /* Totally 6GB or 4G DDR */ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index 7d360583c41..e79aa570753 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -9,7 +9,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) /* Enable Distro Boot */ @@ -23,8 +23,8 @@ "splblk=0x40\0" \ BOOTENV -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_2M #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 271376cb9fc..4df98e3f373 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -46,8 +46,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 672a9fa7a34..aa29e7884f9 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -52,8 +52,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index dd354b0265d..3b4cd656223 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -84,8 +84,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index fe27ac36a3b..2e2e5ed43cd 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CFG_SYS_BOOTMAPSZ (256 << 20) #define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 592df2795b1..d313bdc2a44 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -9,7 +9,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD #define CONFIG_MALLOC_F_ADDR 0x22040000 @@ -50,8 +50,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index 077a4d843dc..895c50f6025 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -124,8 +124,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 #define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM 0x80000000 diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h index a2c004880a7..e180387c687 100644 --- a/include/configs/imxrt1020-evk.h +++ b/include/configs/imxrt1020-evk.h @@ -22,6 +22,6 @@ * Configuration of the external SDRAM memory */ -#define CONFIG_SYS_UBOOT_START 0x800023FD +#define CFG_SYS_UBOOT_START 0x800023FD #endif /* __IMXRT1020_EVK_H */ diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index d1a7dab37c5..84228676c7f 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -29,6 +29,6 @@ * Configuration of the external SDRAM memory */ -#define CONFIG_SYS_UBOOT_START 0x800023FD +#define CFG_SYS_UBOOT_START 0x800023FD #endif /* __IMXRT1050_EVK_H */ diff --git a/include/configs/imxrt1170-evk.h b/include/configs/imxrt1170-evk.h index 2459fe24e24..f83429082ac 100644 --- a/include/configs/imxrt1170-evk.h +++ b/include/configs/imxrt1170-evk.h @@ -23,7 +23,7 @@ #define DMAMEM_BASE (PHYS_SDRAM + PHYS_SDRAM_SIZE - \ DMAMEM_SZ_ALL) /* For SPL */ -#define CONFIG_SYS_UBOOT_START 0x202403FD +#define CFG_SYS_UBOOT_START 0x202403FD /* For SPL ends */ #endif /* __IMXRT1170_EVK_H */ diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 8d0458d1d63..7a55c6aeefc 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -6,7 +6,7 @@ * Common ARM Integrator configuration settings */ -#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ +#define CFG_SYS_TIMERBASE 0x13000100 /* Timer1 */ /* * The ARM boot monitor initializes the board. @@ -41,6 +41,6 @@ * - SIB block * - U-Boot environment */ -#define CONFIG_SYS_FLASH_BASE 0x24000000 +#define CFG_SYS_FLASH_BASE 0x24000000 /* Timeout values in ticks */ diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index c8457d97161..6bee098d6a8 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -17,10 +17,10 @@ #include "integrator-common.h" /* Integrator/AP-specific configuration */ -#define CONFIG_SYS_HZ_CLOCK 24000000 /* Timer 1 is clocked at 24Mhz */ +#define CFG_SYS_HZ_CLOCK 24000000 /* Timer 1 is clocked at 24Mhz */ /* Flash settings */ -#define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */ +#define CFG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */ /*----------------------------------------------------------------------- * PCI definitions diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index bf09510d02f..25bb41ebc46 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -17,7 +17,7 @@ #include "integrator-common.h" /* Integrator CP-specific configuration */ -#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ +#define CFG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ #define CONFIG_SERVERIP 192.168.1.100 #define CONFIG_IPADDR 192.168.1.104 diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 2a0b0c7163a..e66f994a375 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -18,14 +18,14 @@ /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 /* FLASH Configuration */ -#define CONFIG_SYS_FLASH_BASE 0x000000000 +#define CFG_SYS_FLASH_BASE 0x000000000 /* SPL Loader Configuration */ #if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) -#define CONFIG_SYS_UBOOT_BASE 0x50280000 +#define CFG_SYS_UBOOT_BASE 0x50280000 /* Image load address in RAM for DFU boot*/ #else -#define CONFIG_SYS_UBOOT_BASE 0x50080000 +#define CFG_SYS_UBOOT_BASE 0x50080000 #endif /* HyperFlash related configuration */ diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index e690ef95906..ab204c62b7d 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -21,10 +21,10 @@ /* SPL Loader Configuration */ #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) -#define CONFIG_SYS_UBOOT_BASE 0x50280000 +#define CFG_SYS_UBOOT_BASE 0x50280000 /* Image load address in RAM for DFU boot*/ #else -#define CONFIG_SYS_UBOOT_BASE 0x50080000 +#define CFG_SYS_UBOOT_BASE 0x50080000 #endif /* U-Boot general configuration */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 35cf27a2eb9..cc5ec219b8d 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -13,7 +13,7 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } #ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS #define CONFIG_KM_DEF_ENV_BOOTPARAMS \ diff --git a/include/configs/km/km-mpc832x.h b/include/configs/km/km-mpc832x.h index 888bb2981f7..f64c0eee1bb 100644 --- a/include/configs/km/km-mpc832x.h +++ b/include/configs/km/km-mpc832x.h @@ -1,34 +1,34 @@ /* * System IO Config */ -#define CONFIG_SYS_SICRL SICRL_IRQ_CKS +#define CFG_SYS_SICRL SICRL_IRQ_CKS -#define CONFIG_SYS_DDRCDR (\ +#define CFG_SYS_DDRCDR (\ DDRCDR_EN | \ DDRCDR_PZ_MAXZ | \ DDRCDR_NZ_MAXZ | \ DDRCDR_M_ODR) -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000007f -#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SDRAM_TYPE_DDR2 | \ +#define CFG_SYS_DDR_CS0_BNDS 0x0000007f +#define CFG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SDRAM_TYPE_DDR2 | \ SDRAM_CFG_32_BE | \ SDRAM_CFG_SREN | \ SDRAM_CFG_HSE) -#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 -#define CONFIG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) -#define CONFIG_SYS_DDR_INTERVAL ((0x064 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \ +#define CFG_SYS_DDR_SDRAM_CFG2 0x00401000 +#define CFG_SYS_DDR_CLK_CNTL (DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) +#define CFG_SYS_DDR_INTERVAL ((0x064 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \ (0x200 << SDRAM_INTERVAL_REFINT_SHIFT)) -#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \ +#define CFG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \ CSCONFIG_ODT_WR_CFG | \ CSCONFIG_ROW_BIT_13 | \ CSCONFIG_COL_BIT_10) -#define CONFIG_SYS_DDR_MODE 0x47860242 -#define CONFIG_SYS_DDR_MODE2 0x8080c000 +#define CFG_SYS_DDR_MODE 0x47860242 +#define CFG_SYS_DDR_MODE2 0x8080c000 -#define CONFIG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \ +#define CFG_SYS_DDR_TIMING_0 ((2 << TIMING_CFG0_MRS_CYC_SHIFT) | \ (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \ (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) | \ (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) | \ @@ -37,7 +37,7 @@ (0 << TIMING_CFG0_WRT_SHIFT) | \ (0 << TIMING_CFG0_RWT_SHIFT)) -#define CONFIG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_40) | \ +#define CFG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_40) | \ (2 << TIMING_CFG1_WRTORD_SHIFT) | \ (2 << TIMING_CFG1_ACTTOACT_SHIFT) | \ (3 << TIMING_CFG1_WRREC_SHIFT) | \ @@ -46,7 +46,7 @@ (7 << TIMING_CFG1_ACTTOPRE_SHIFT) | \ (3 << TIMING_CFG1_PRETOACT_SHIFT)) -#define CONFIG_SYS_DDR_TIMING_2 ((8 << TIMING_CFG2_FOUR_ACT_SHIFT) | \ +#define CFG_SYS_DDR_TIMING_2 ((8 << TIMING_CFG2_FOUR_ACT_SHIFT) | \ (3 << TIMING_CFG2_CKE_PLS_SHIFT) | \ (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) | \ (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) | \ @@ -54,7 +54,7 @@ (0 << TIMING_CFG2_ADD_LAT_SHIFT) | \ (5 << TIMING_CFG2_CPO_SHIFT)) -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 +#define CFG_SYS_DDR_TIMING_3 0x00000000 -#define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000 -#define CONFIG_SYS_KMBEC_FPGA_SIZE 128 +#define CFG_SYS_KMBEC_FPGA_BASE 0xE8000000 +#define CFG_SYS_KMBEC_FPGA_SIZE 128 diff --git a/include/configs/km/km-mpc8360.h b/include/configs/km/km-mpc8360.h index fb43fb81bc0..5c9f912383d 100644 --- a/include/configs/km/km-mpc8360.h +++ b/include/configs/km/km-mpc8360.h @@ -1,6 +1,6 @@ /* KMBEC FPGA (PRIO) */ -#define CONFIG_SYS_KMBEC_FPGA_BASE 0xE8000000 -#define CONFIG_SYS_KMBEC_FPGA_SIZE 64 +#define CFG_SYS_KMBEC_FPGA_BASE 0xE8000000 +#define CFG_SYS_KMBEC_FPGA_SIZE 64 /* * High Level Configuration Options @@ -9,34 +9,34 @@ /* * System IO Setup */ -#define CONFIG_SYS_SICRH (SICRH_UC1EOBI | SICRH_UC2E1OBI) +#define CFG_SYS_SICRH (SICRH_UC1EOBI | SICRH_UC2E1OBI) /** * DDR RAM settings */ -#define CONFIG_SYS_DDR_SDRAM_CFG (\ +#define CFG_SYS_DDR_SDRAM_CFG (\ SDRAM_CFG_SDRAM_TYPE_DDR2 | \ SDRAM_CFG_SREN | \ SDRAM_CFG_HSE) -#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000 +#define CFG_SYS_DDR_SDRAM_CFG2 0x00401000 -#define CONFIG_SYS_DDR_CLK_CNTL (\ +#define CFG_SYS_DDR_CLK_CNTL (\ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) -#define CONFIG_SYS_DDR_INTERVAL (\ +#define CFG_SYS_DDR_INTERVAL (\ (0x080 << SDRAM_INTERVAL_BSTOPRE_SHIFT) | \ (0x203 << SDRAM_INTERVAL_REFINT_SHIFT)) -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000007f +#define CFG_SYS_DDR_CS0_BNDS 0x0000007f -#define CONFIG_SYS_DDRCDR (\ +#define CFG_SYS_DDRCDR (\ DDRCDR_EN | \ DDRCDR_Q_DRN) -#define CONFIG_SYS_DDR_MODE 0x47860452 -#define CONFIG_SYS_DDR_MODE2 0x8080c000 +#define CFG_SYS_DDR_MODE 0x47860452 +#define CFG_SYS_DDR_MODE2 0x8080c000 -#define CONFIG_SYS_DDR_TIMING_0 (\ +#define CFG_SYS_DDR_TIMING_0 (\ (2 << TIMING_CFG0_MRS_CYC_SHIFT) | \ (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) | \ (6 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) | \ @@ -46,7 +46,7 @@ (0 << TIMING_CFG0_WRT_SHIFT) | \ (0 << TIMING_CFG0_RWT_SHIFT)) -#define CONFIG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_50) | \ +#define CFG_SYS_DDR_TIMING_1 ((TIMING_CFG1_CASLAT_50) | \ (2 << TIMING_CFG1_WRTORD_SHIFT) | \ (2 << TIMING_CFG1_ACTTOACT_SHIFT) | \ (3 << TIMING_CFG1_WRREC_SHIFT) | \ @@ -55,7 +55,7 @@ (8 << TIMING_CFG1_ACTTOPRE_SHIFT) | \ (3 << TIMING_CFG1_PRETOACT_SHIFT)) -#define CONFIG_SYS_DDR_TIMING_2 (\ +#define CFG_SYS_DDR_TIMING_2 (\ (0xa << TIMING_CFG2_FOUR_ACT_SHIFT) | \ (3 << TIMING_CFG2_CKE_PLS_SHIFT) | \ (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) | \ @@ -64,11 +64,11 @@ (5 << TIMING_CFG2_CPO_SHIFT) | \ (0 << TIMING_CFG2_ADD_LAT_SHIFT)) -#define CONFIG_SYS_DDR_TIMING_3 0x00000000 +#define CFG_SYS_DDR_TIMING_3 0x00000000 /* EEprom support */ /* * PAXE on the local bus CS3 */ -#define CONFIG_SYS_PAXE_BASE 0xA0000000 +#define CFG_SYS_PAXE_BASE 0xA0000000 diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index db1daee1363..e6a3613b7a2 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -9,7 +9,7 @@ */ #define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ -#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ +#define CFG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) #define CFG_83XX_DDR_USES_CS0 @@ -22,15 +22,15 @@ /* * The reserved memory */ -#define CONFIG_SYS_FLASH_BASE 0xF0000000 +#define CFG_SYS_FLASH_BASE 0xF0000000 /* Reserve 768 kB for Mon */ /* * Initial RAM Base Address Setup */ -#define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ +#define CFG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ /* * Init Local Bus Memory Controller: * @@ -44,21 +44,21 @@ /* * FLASH on the Local Bus */ -#define CONFIG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ +#define CFG_SYS_FLASH_SIZE 256 /* max FLASH size is 256M */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } /* I2C */ #define CFG_SYS_NUM_I2C_BUSES 4 -#define CONFIG_SYS_I2C_MAX_HOPS 1 -#define CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \ +#define CFG_SYS_I2C_MAX_HOPS 1 +#define CFG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \ {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ {1, {I2C_NULL_HOP} } } #if defined(CONFIG_CMD_NAND) #define CONFIG_NAND_KMETER1 -#define CFG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE +#define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE #endif /* @@ -66,7 +66,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* * Environment diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index b5913ed7000..7307c495c38 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -9,8 +9,8 @@ /* include common defines/options for all Keymile boards */ #include "keymile-common.h" -#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE #define CONFIG_PRAM ((CONFIG_KM_PNVRAM + \ CONFIG_KM_PHRAM + \ @@ -19,24 +19,24 @@ #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x54 /* POST memory regions test */ -#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) +#define CONFIG_POST (CFG_SYS_POST_MEM_REGIONS) #define CONFIG_POST_EXTERNAL_WORD_FUNCS /* * IFC Definitions */ /* NOR Flash Definitions */ -#define CONFIG_SYS_FLASH_BASE 0x60000000 -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE 0x60000000 +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_TE | \ CSPR_MSEL_NOR | \ @@ -63,18 +63,18 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS } -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_WRITE_SWAPPED_DATA -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 /* NAND Flash Definitions */ #define CFG_SYS_NAND_BASE 0x68000000 @@ -110,40 +110,40 @@ FTIM2_NAND_TWHRE(0x3c)) #define CFG_SYS_NAND_FTIM3 (FTIM3_NAND_TWW(0x1e)) -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } /* QRIO FPGA Definitions */ -#define CONFIG_SYS_QRIO_BASE 0x70000000 -#define CONFIG_SYS_QRIO_BASE_PHYS CONFIG_SYS_QRIO_BASE +#define CFG_SYS_QRIO_BASE 0x70000000 +#define CFG_SYS_QRIO_BASE_PHYS CFG_SYS_QRIO_BASE -#define CONFIG_SYS_CSPR2_EXT (0x00) -#define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_QRIO_BASE) | \ +#define CFG_SYS_CSPR2_EXT (0x00) +#define CFG_SYS_CSPR2 (CSPR_PHYS_ADDR(CFG_SYS_QRIO_BASE) | \ CSPR_PORT_SIZE_8 | \ CSPR_TE | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_AMASK2 IFC_AMASK(64 * 1024) -#define CONFIG_SYS_CSOR2 (CSOR_GPCM_ADM_SHIFT(0x4) | \ +#define CFG_SYS_AMASK2 IFC_AMASK(64 * 1024) +#define CFG_SYS_CSOR2 (CSOR_GPCM_ADM_SHIFT(0x4) | \ CSOR_GPCM_TRHZ_20 | \ CSOR_GPCM_BCTLD) -#define CONFIG_SYS_CS2_FTIM0 (FTIM0_GPCM_TACSE(0x2) | \ +#define CFG_SYS_CS2_FTIM0 (FTIM0_GPCM_TACSE(0x2) | \ FTIM0_GPCM_TEADC(0x8) | \ FTIM0_GPCM_TEAHC(0x2)) -#define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x2) | \ +#define CFG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x2) | \ FTIM1_GPCM_TRAD(0x6)) -#define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x1) | \ +#define CFG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x1) | \ FTIM2_GPCM_TCH(0x1) | \ FTIM2_GPCM_TWP(0x7)) -#define CONFIG_SYS_CS2_FTIM3 0x04000000 +#define CFG_SYS_CS2_FTIM3 0x04000000 /* * Serial Port @@ -155,11 +155,11 @@ */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_MAX_HOPS 1 +#define CFG_SYS_I2C_MAX_HOPS 1 #define CFG_SYS_NUM_I2C_BUSES 3 #define I2C_MUX_PCA_ADDR 0x70 #define I2C_MUX_CH_DEFAULT 0x0 -#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ +#define CFG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ {0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \ {1, {I2C_NULL_HOP} }, \ } @@ -205,12 +205,12 @@ __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize} && " \ "protect on " __stringify(CONFIG_SYS_MONITOR_BASE) \ " +${filesize}\0" \ - "update-nor=protect off " __stringify(CONFIG_SYS_FLASH_BASE) \ + "update-nor=protect off " __stringify(CFG_SYS_FLASH_BASE) \ " +${filesize} && " \ - "erase " __stringify(CONFIG_SYS_FLASH_BASE) \ + "erase " __stringify(CFG_SYS_FLASH_BASE) \ " +${filesize} && " \ "cp.b ${load_addr_r} " \ - __stringify(CONFIG_SYS_FLASH_BASE) " ${filesize} && " \ + __stringify(CFG_SYS_FLASH_BASE) " ${filesize} && " \ "protect on " __stringify(CONFIG_SYS_MONITOR_BASE) \ " +" __stringify(CONFIG_SYS_MONITOR_LEN)"\0" \ "set_fdthigh=true\0" \ @@ -238,6 +238,6 @@ "ethrotate=no\0" \ "" -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Increase map for Linux */ +#define CFG_SYS_BOOTMAPSZ (256 << 20) /* Increase map for Linux */ #endif diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index dbf038cefa0..e152714b116 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -25,10 +25,10 @@ #define SYS_LAWAPP_BASE_PHYS (0xf00000000ull | SYS_LAWAPP_BASE) /* Application IFC CS4 MRAM */ -#define CONFIG_SYS_MRAM_BASE SYS_LAWAPP_BASE +#define CFG_SYS_MRAM_BASE SYS_LAWAPP_BASE #define SYS_MRAM_BASE_PHYS SYS_LAWAPP_BASE_PHYS #define SYS_MRAM_CSPR_EXT (0x0f) -#define SYS_MRAM_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_MRAM_BASE) | \ +#define SYS_MRAM_CSPR (CSPR_PHYS_ADDR(CFG_SYS_MRAM_BASE) | \ CSPR_PORT_SIZE_8 | /* 8 bit */ \ CSPR_MSEL_GPCM | /* msel = gpcm */ \ CSPR_V /* bank is valid */) @@ -44,14 +44,14 @@ FTIM2_GPCM_TCH(0x2) | \ FTIM2_GPCM_TWP(0x8)) #define SYS_MRAM_FTIM3 0x04000000 -#define CONFIG_SYS_CSPR4_EXT SYS_MRAM_CSPR_EXT -#define CONFIG_SYS_CSPR4 SYS_MRAM_CSPR -#define CONFIG_SYS_AMASK4 SYS_MRAM_AMASK -#define CONFIG_SYS_CSOR4 SYS_MRAM_CSOR -#define CONFIG_SYS_CS4_FTIM0 SYS_MRAM_FTIM0 -#define CONFIG_SYS_CS4_FTIM1 SYS_MRAM_FTIM1 -#define CONFIG_SYS_CS4_FTIM2 SYS_MRAM_FTIM2 -#define CONFIG_SYS_CS4_FTIM3 SYS_MRAM_FTIM3 +#define CFG_SYS_CSPR4_EXT SYS_MRAM_CSPR_EXT +#define CFG_SYS_CSPR4 SYS_MRAM_CSPR +#define CFG_SYS_AMASK4 SYS_MRAM_AMASK +#define CFG_SYS_CSOR4 SYS_MRAM_CSOR +#define CFG_SYS_CS4_FTIM0 SYS_MRAM_FTIM0 +#define CFG_SYS_CS4_FTIM1 SYS_MRAM_FTIM1 +#define CFG_SYS_CS4_FTIM2 SYS_MRAM_FTIM2 +#define CFG_SYS_CS4_FTIM3 SYS_MRAM_FTIM3 /* Application IFC CS6: BFTIC */ #define SYS_BFTIC_BASE 0xd0000000 @@ -73,20 +73,20 @@ FTIM2_GPCM_TCH(0x1) | \ FTIM2_GPCM_TWP(0x12)) #define SYS_BFTIC_FTIM3 0x04000000 -#define CONFIG_SYS_CSPR6_EXT SYS_BFTIC_CSPR_EXT -#define CONFIG_SYS_CSPR6 SYS_BFTIC_CSPR -#define CONFIG_SYS_AMASK6 SYS_BFTIC_AMASK -#define CONFIG_SYS_CSOR6 SYS_BFTIC_CSOR -#define CONFIG_SYS_CS6_FTIM0 SYS_BFTIC_FTIM0 -#define CONFIG_SYS_CS6_FTIM1 SYS_BFTIC_FTIM1 -#define CONFIG_SYS_CS6_FTIM2 SYS_BFTIC_FTIM2 -#define CONFIG_SYS_CS6_FTIM3 SYS_BFTIC_FTIM3 +#define CFG_SYS_CSPR6_EXT SYS_BFTIC_CSPR_EXT +#define CFG_SYS_CSPR6 SYS_BFTIC_CSPR +#define CFG_SYS_AMASK6 SYS_BFTIC_AMASK +#define CFG_SYS_CSOR6 SYS_BFTIC_CSOR +#define CFG_SYS_CS6_FTIM0 SYS_BFTIC_FTIM0 +#define CFG_SYS_CS6_FTIM1 SYS_BFTIC_FTIM1 +#define CFG_SYS_CS6_FTIM2 SYS_BFTIC_FTIM2 +#define CFG_SYS_CS6_FTIM3 SYS_BFTIC_FTIM3 /* Application IFC CS7 PAXE */ -#define CONFIG_SYS_PAXE_BASE 0xd8000000 -#define SYS_PAXE_BASE_PHYS (0xf00000000ull | CONFIG_SYS_PAXE_BASE) +#define CFG_SYS_PAXE_BASE 0xd8000000 +#define SYS_PAXE_BASE_PHYS (0xf00000000ull | CFG_SYS_PAXE_BASE) #define SYS_PAXE_CSPR_EXT (0x0f) -#define SYS_PAXE_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_PAXE_BASE) | \ +#define SYS_PAXE_CSPR (CSPR_PHYS_ADDR(CFG_SYS_PAXE_BASE) | \ CSPR_PORT_SIZE_8 | /* Port size = 8 bit */\ CSPR_MSEL_GPCM | /* MSEL = GPCM */\ CSPR_V) /* valid */ @@ -102,14 +102,14 @@ FTIM2_GPCM_TCH(0x1) | \ FTIM2_GPCM_TWP(0x12)) #define SYS_PAXE_FTIM3 0x04000000 -#define CONFIG_SYS_CSPR7_EXT SYS_PAXE_CSPR_EXT -#define CONFIG_SYS_CSPR7 SYS_PAXE_CSPR -#define CONFIG_SYS_AMASK7 SYS_PAXE_AMASK -#define CONFIG_SYS_CSOR7 SYS_PAXE_CSOR -#define CONFIG_SYS_CS7_FTIM0 SYS_PAXE_FTIM0 -#define CONFIG_SYS_CS7_FTIM1 SYS_PAXE_FTIM1 -#define CONFIG_SYS_CS7_FTIM2 SYS_PAXE_FTIM2 -#define CONFIG_SYS_CS7_FTIM3 SYS_PAXE_FTIM3 +#define CFG_SYS_CSPR7_EXT SYS_PAXE_CSPR_EXT +#define CFG_SYS_CSPR7 SYS_PAXE_CSPR +#define CFG_SYS_AMASK7 SYS_PAXE_AMASK +#define CFG_SYS_CSOR7 SYS_PAXE_CSOR +#define CFG_SYS_CS7_FTIM0 SYS_PAXE_FTIM0 +#define CFG_SYS_CS7_FTIM1 SYS_PAXE_FTIM1 +#define CFG_SYS_CS7_FTIM2 SYS_PAXE_FTIM2 +#define CFG_SYS_CS7_FTIM3 SYS_PAXE_FTIM3 /* PRST */ #define KM_BFTIC4_RST 0 @@ -145,25 +145,25 @@ /* * These can be toggled for performance analysis, otherwise use default. */ -#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E +#define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E /* POST memory regions test */ -#define CONFIG_POST CONFIG_SYS_POST_MEM_REGIONS +#define CONFIG_POST CFG_SYS_POST_MEM_REGIONS /* * Config the L3 Cache as L3 SRAM */ -#define CONFIG_SYS_INIT_L3_ADDR 0xFFFC0000 +#define CFG_SYS_INIT_L3_ADDR 0xFFFC0000 -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull +#define CFG_SYS_DCSRBAR 0xf0000000 +#define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull /* * DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x54 #define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ @@ -189,12 +189,12 @@ * IFC Definitions */ /* NOR flash on IFC CS0 */ -#define CONFIG_SYS_FLASH_BASE 0xe8000000 -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | \ - CONFIG_SYS_FLASH_BASE) +#define CFG_SYS_FLASH_BASE 0xe8000000 +#define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | \ + CFG_SYS_FLASH_BASE) #define CFG_SYS_NOR_CSPR_EXT (0x0f) -#define CFG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE) | \ +#define CFG_SYS_NOR_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE) | \ CSPR_PORT_SIZE_16 | /* Port size = 16 bit */\ 0x00000010 | /* drive TE high */\ CSPR_MSEL_NOR | /* MSEL = NOR */\ @@ -217,18 +217,18 @@ FTIM2_NOR_TWPH(0x6)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NOR_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NOR_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 /* More NOR Flash params */ -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} /* NAND Flash on IFC CS1*/ #define CFG_SYS_NAND_BASE 0xfa000000 @@ -266,23 +266,23 @@ FTIM2_NAND_TWHRE(0x3c)) #define CFG_SYS_NAND_FTIM3 (FTIM3_NAND_TWW(0x1e)) -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 /* More NAND Flash Params */ #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } /* QRIO on IFC CS2 */ -#define CONFIG_SYS_QRIO_BASE 0xfb000000 -#define CONFIG_SYS_QRIO_BASE_PHYS (0xf00000000ull | CONFIG_SYS_QRIO_BASE) +#define CFG_SYS_QRIO_BASE 0xfb000000 +#define CFG_SYS_QRIO_BASE_PHYS (0xf00000000ull | CFG_SYS_QRIO_BASE) #define SYS_QRIO_CSPR_EXT (0x0f) -#define SYS_QRIO_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_QRIO_BASE) | \ +#define SYS_QRIO_CSPR (CSPR_PHYS_ADDR(CFG_SYS_QRIO_BASE) | \ CSPR_PORT_SIZE_8 | /* Port size = 8 bit */\ 0x00000010 | /* drive TE high */\ CSPR_MSEL_GPCM | /* MSEL = GPCM */\ @@ -300,28 +300,28 @@ FTIM2_GPCM_TCH(0x1) | \ FTIM2_GPCM_TWP(0x7)) #define SYS_QRIO_FTIM3 0x04000000 -#define CONFIG_SYS_CSPR2_EXT SYS_QRIO_CSPR_EXT -#define CONFIG_SYS_CSPR2 SYS_QRIO_CSPR -#define CONFIG_SYS_AMASK2 SYS_QRIO_AMASK -#define CONFIG_SYS_CSOR2 SYS_QRIO_CSOR -#define CONFIG_SYS_CS2_FTIM0 SYS_QRIO_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 SYS_QRIO_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 SYS_QRIO_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 SYS_QRIO_FTIM3 +#define CFG_SYS_CSPR2_EXT SYS_QRIO_CSPR_EXT +#define CFG_SYS_CSPR2 SYS_QRIO_CSPR +#define CFG_SYS_AMASK2 SYS_QRIO_AMASK +#define CFG_SYS_CSOR2 SYS_QRIO_CSOR +#define CFG_SYS_CS2_FTIM0 SYS_QRIO_FTIM0 +#define CFG_SYS_CS2_FTIM1 SYS_QRIO_FTIM1 +#define CFG_SYS_CS2_FTIM2 SYS_QRIO_FTIM2 +#define CFG_SYS_CS2_FTIM3 SYS_QRIO_FTIM3 #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 +#define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* * Serial Port - controlled on board with jumper J8 @@ -331,7 +331,7 @@ */ #if !defined(CONFIG_DM_SERIAL) #define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2) -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR + 0x11C500) #endif #ifndef __ASSEMBLY__ @@ -351,30 +351,30 @@ int get_scl(void); #define CFG_SYS_PCIE1_IO_VIRT 0xf8000000 #define CFG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#define CONFIG_SYS_BMAN_NUM_PORTALS 10 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 10 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull -#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_BMAN_NUM_PORTALS 10 +#define CFG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CFG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CFG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_BMAN_CENA_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_CINH_BASE (CFG_SYS_BMAN_MEM_BASE + \ + CFG_SYS_BMAN_CENA_SIZE) +#define CFG_SYS_BMAN_CINH_SIZE (CFG_SYS_BMAN_MEM_SIZE >> 1) +#define CFG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CFG_SYS_QMAN_NUM_PORTALS 10 +#define CFG_SYS_QMAN_MEM_BASE 0xf6000000 +#define CFG_SYS_QMAN_MEM_PHYS 0xff6000000ull +#define CFG_SYS_QMAN_MEM_SIZE 0x02000000 +#define CFG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CFG_SYS_QMAN_CENA_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_CINH_BASE (CFG_SYS_QMAN_MEM_BASE + \ + CFG_SYS_QMAN_CENA_SIZE) +#define CFG_SYS_QMAN_CINH_SIZE (CFG_SYS_QMAN_MEM_SIZE >> 1) +#define CFG_SYS_QMAN_SWP_ISDR_REG 0xE08 /* Qman / Bman */ /* RGMII (FM1@DTESC5) is local managemant interface */ -#define CONFIG_SYS_RGMII2_PHY_ADDR 0x11 +#define CFG_SYS_RGMII2_PHY_ADDR 0x11 /* * Hardware Watchdog @@ -387,7 +387,7 @@ int get_scl(void); * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ /* * Environment Configuration @@ -412,12 +412,12 @@ int get_scl(void); __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize} && " \ "protect on " __stringify(CONFIG_SYS_MONITOR_BASE) \ " +${filesize}\0" \ - "update-nor=protect off " __stringify(CONFIG_SYS_FLASH_BASE) \ + "update-nor=protect off " __stringify(CFG_SYS_FLASH_BASE) \ " +${filesize} && " \ - "erase " __stringify(CONFIG_SYS_FLASH_BASE) \ + "erase " __stringify(CFG_SYS_FLASH_BASE) \ " +${filesize} && " \ "cp.b ${load_addr_r} " \ - __stringify(CONFIG_SYS_FLASH_BASE) " ${filesize} && " \ + __stringify(CFG_SYS_FLASH_BASE) " ${filesize} && " \ "protect on " __stringify(CONFIG_SYS_MONITOR_BASE) \ " +" __stringify(CONFIG_SYS_MONITOR_LEN) "\0" \ "set_fdthigh=true\0" \ diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index b9540298747..2be996aaaf0 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -12,7 +12,7 @@ #define CONFIG_NAND_ECC_BCH #define CONFIG_NAND_KMETER1 #define NAND_MAX_CHIPS 1 -#define CFG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */ +#define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */ #define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" #define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" @@ -26,7 +26,7 @@ /** * KMCOGE5NE has 512 MB RAM */ -#define CONFIG_SYS_DDR_CS0_CONFIG (\ +#define CFG_SYS_DDR_CS0_CONFIG (\ CSCONFIG_EN | \ CSCONFIG_AP | \ CSCONFIG_ODT_WR_ONLY_CURRENT | \ @@ -35,7 +35,7 @@ CSCONFIG_COL_BIT_10) /* enable POST tests */ -#define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) +#define CONFIG_POST (CFG_SYS_POST_MEMORY|CFG_SYS_POST_MEM_REGIONS) #define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ #define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END #define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */ diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 4245875e39e..910fc1b2cb2 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -16,7 +16,7 @@ #include "km/km-mpc83xx.h" #include "km/km-mpc8360.h" -#define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \ +#define CFG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN | CSCONFIG_AP | \ CSCONFIG_ROW_BIT_13 | \ CSCONFIG_COL_BIT_10 | \ CSCONFIG_ODT_WR_ONLY_CURRENT) diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index e2808ec02dc..6fcacdb0c66 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -16,10 +16,10 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* Board and environment settings */ #define CONFIG_MXC_UART_BASE UART4_BASE diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 73b59517621..80a32304606 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -19,8 +19,8 @@ #define PHYS_SDRAM_SIZE (SZ_4G) #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x200000 /* Board and environment settings */ #define CONFIG_HOSTNAME "kontron-mx8mm" diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 9b452818c1e..2abcb849a28 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -61,8 +61,8 @@ BOOTENV -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index bbf0761814b..9c3174d0e02 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -12,17 +12,17 @@ /* we don't have secure memory unless we have a BL31 */ #ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT -#undef CONFIG_SYS_MEM_RESERVE_SECURE +#undef CFG_SYS_MEM_RESERVE_SECURE #endif /* DDR */ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL /* early stack pointer */ diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index 967de66f3c9..c551585a206 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -68,8 +68,8 @@ #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) +#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) /* environment organization */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index de1fc0bfa4c..136e228682a 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -87,8 +87,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment */ diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 9b70eed46f7..828f9109634 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -31,7 +31,7 @@ #ifdef CONFIG_CMD_I2C /* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */ #if defined(CONFIG_NET2BIG_V2) -#define CONFIG_SYS_I2C_G762_ADDR 0x3e +#define CFG_SYS_I2C_G762_ADDR 0x3e #endif #endif /* CONFIG_CMD_I2C */ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index bee064c6f38..2664982715f 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -17,10 +17,10 @@ /* * SoC Configuration */ -#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH -#define CONFIG_SYS_OSCIN_FREQ 24000000 -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CFG_SYS_EXCEPTION_VECTORS_HIGH +#define CFG_SYS_OSCIN_FREQ 24000000 +#define CFG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CFG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) /* * Memory Info @@ -38,7 +38,7 @@ */ #define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) +#define CFG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID) /* * U-Boot general configuration diff --git a/include/configs/librem5.h b/include/configs/librem5.h index 3a2c508ffac..11b3fa6c857 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -79,8 +79,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index b9134508853..f16c7e91221 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -9,14 +9,14 @@ /* RAM */ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ -#define CONFIG_SYS_UBOOT_BASE 0 +#define CFG_SYS_UBOOT_BASE 0 /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) @@ -26,7 +26,7 @@ #endif /* UART */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 921600 } /* RAM */ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index d1ebd99ae14..721da818633 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -88,8 +88,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* FLASH and environment organization */ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 07124370775..7598e54ed2b 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -10,10 +10,10 @@ #include #include -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_BLOCK2_BASE 0x880000000ULL /*SPI device */ #define CFG_SYS_FSL_QSPI_BASE 0x40000000 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 54555b34dd4..e772c019077 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -17,7 +17,7 @@ */ #ifdef CONFIG_FSL_QIXIS -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_BRDCFG_REG 0x04 #define QIXIS_LBMAP_SWITCH 6 #define QIXIS_LBMAP_MASK 0x08 @@ -47,7 +47,7 @@ * RTC configuration */ #define RTC -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ +#define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ /* Voltage monitor on channel 2*/ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 49a77fd6b6b..b058308ecdb 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -7,8 +7,8 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE /* * DDR: 800 MHz ( 1600 MT/s data rate ) @@ -41,8 +41,8 @@ #define SDRAM_CFG2_FRC_SR 0x80000000 #define SDRAM_CFG_BI 0x00000001 -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE /* * Serial Port @@ -104,7 +104,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CFG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 1f5a80ff085..5494b71e2b2 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -7,8 +7,8 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE #ifdef CONFIG_NAND_BOOT #define CFG_SYS_NAND_U_BOOT_SIZE (400 << 10) @@ -19,8 +19,8 @@ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef @@ -30,16 +30,16 @@ * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_FLASH_BASE 0x60000000 -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE 0x60000000 +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR_EXT (0x0) -#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ +#define CFG_SYS_NOR1_CSPR_EXT (0x0) +#define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ @@ -61,10 +61,10 @@ #define CFG_SYS_NOR_FTIM3 0 #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_WRITE_SWAPPED_DATA -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ - CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \ + CFG_SYS_FLASH_BASE_PHYS + 0x8000000} /* * NAND Flash Definitions @@ -111,7 +111,7 @@ #ifdef CONFIG_FSL_QIXIS #define QIXIS_BASE 0x7fb00000 #define QIXIS_BASE_PHYS QIXIS_BASE -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 6 #define QIXIS_LBMAP_MASK 0x0f #define QIXIS_LBMAP_SHIFT 0 @@ -131,96 +131,96 @@ #define QIXIS_PWR_CTL2 0x21 #define QIXIS_PWR_CTL2_PCTL 0x2 -#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) -#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ +#define CFG_SYS_FPGA_CSPR_EXT (0x0) +#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CFG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ CSOR_NOR_NOR_MODE_AVD_NOR | \ CSOR_NOR_TRHZ_80) /* * QIXIS Timing parameters for IFC GPCM */ -#define CONFIG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xe) | \ +#define CFG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xe) | \ FTIM0_GPCM_TEADC(0xe) | \ FTIM0_GPCM_TEAHC(0xe)) -#define CONFIG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0xe) | \ +#define CFG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0xe) | \ FTIM1_GPCM_TRAD(0x1f)) -#define CONFIG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0xe) | \ +#define CFG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0xe) | \ FTIM2_GPCM_TCH(0xe) | \ FTIM2_GPCM_TWP(0xf0)) -#define CONFIG_SYS_FPGA_FTIM3 0x0 +#define CFG_SYS_FPGA_FTIM3 0x0 #endif #if defined(CONFIG_NAND_BOOT) -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK3 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS3_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS3_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS3_FTIM3 CFG_SYS_FPGA_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK3 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS3_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS3_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS3_FTIM3 CFG_SYS_FPGA_FTIM3 #endif /* @@ -296,7 +296,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CFG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 49546066115..bc9eac700e9 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -6,8 +6,8 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE /* XHCI Support - enabled by default */ @@ -56,8 +56,8 @@ #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE /* Serial Port */ #define CFG_SYS_NS16550_CLK get_serial_clock() @@ -141,7 +141,7 @@ "bootm $load_addr#$board\0" /* Miscellaneous configurable options */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CFG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index d77224934c0..f1ccb5fc084 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -7,8 +7,8 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE #define DDR_SDRAM_CFG 0x470c0008 #define DDR_CS0_BNDS 0x008000bf @@ -59,18 +59,18 @@ #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE /* * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_FLASH_BASE 0x60000000 -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE 0x60000000 +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -94,52 +94,52 @@ #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS } -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_WRITE_SWAPPED_DATA #endif /* CPLD */ -#define CONFIG_SYS_CPLD_BASE 0x7fb00000 -#define CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE +#define CFG_SYS_CPLD_BASE 0x7fb00000 +#define CPLD_BASE_PHYS CFG_SYS_CPLD_BASE -#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) -#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ +#define CFG_SYS_FPGA_CSPR_EXT (0x0) +#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CFG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ CSOR_NOR_NOR_MODE_AVD_NOR | \ CSOR_NOR_TRHZ_80) /* CPLD Timing parameters for IFC GPCM */ -#define CONFIG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xf) | \ +#define CFG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xf) | \ FTIM0_GPCM_TEADC(0xf) | \ FTIM0_GPCM_TEAHC(0xf)) -#define CONFIG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ +#define CFG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) -#define CONFIG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ +#define CFG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ FTIM2_GPCM_TCH(0xf) | \ FTIM2_GPCM_TWP(0xff)) -#define CONFIG_SYS_FPGA_FTIM3 0x0 -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK1 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR1 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_FPGA_FTIM3 0x0 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_FPGA_FTIM3 /* * Serial Port @@ -298,7 +298,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) +#define CFG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 064c4f069cb..bdd3951e85f 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -13,10 +13,10 @@ /* Link Definitions */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL /* * SMP Definitinos diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 25391151866..228fb122f5f 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -17,7 +17,7 @@ #ifdef CONFIG_FSL_QIXIS #define QIXIS_BASE 0x7fb00000 #define QIXIS_BASE_PHYS QIXIS_BASE -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 1 #define QIXIS_LBMAP_MASK 0x0f #define QIXIS_LBMAP_SHIFT 5 @@ -35,19 +35,19 @@ #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_RST_FORCE_MEM 0x01 -#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) -#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ +#define CFG_SYS_FPGA_CSPR_EXT (0x0) +#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CFG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ CSOR_NOR_NOR_MODE_AVD_NOR | \ CSOR_NOR_TRHZ_80) #endif /* RTC */ -#define CONFIG_SYS_RTC_BUS_NUM 1 +#define CFG_SYS_RTC_BUS_NUM 1 #define I2C_MUX_CH_RTC 0xB /* Store environment at top of flash */ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index e7b2543b730..5c134612576 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -10,7 +10,7 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) -#define CONFIG_SYS_RTC_BUS_NUM 0 +#define CFG_SYS_RTC_BUS_NUM 0 /* Store environment at top of flash */ @@ -21,7 +21,7 @@ #ifdef CONFIG_FSL_QIXIS #define QIXIS_BASE 0x7fb00000 #define QIXIS_BASE_PHYS QIXIS_BASE -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 2 #define QIXIS_LBMAP_MASK 0xe0 #define QIXIS_LBMAP_SHIFT 0x5 @@ -39,12 +39,12 @@ #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_RST_FORCE_MEM 0x01 -#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) -#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ +#define CFG_SYS_FPGA_CSPR_EXT (0x0) +#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ CSOR_NOR_NOR_MODE_AVD_NOR | \ CSOR_NOR_TRHZ_80) #endif diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index e940dff9988..b4048744b1e 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -32,10 +32,10 @@ /* Link Definitions */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_BLOCK2_BASE 0x880000000ULL #define CPU_RELEASE_ADDR secondary_boot_addr @@ -82,14 +82,14 @@ #if defined(CONFIG_TFABOOT) || \ (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)) /* - * CONFIG_SYS_FLASH_BASE has the final address (core view) - * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) - * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address + * CFG_SYS_FLASH_BASE has the final address (core view) + * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view) + * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address * CONFIG_TEXT_BASE is linked to 0x60000000 for booting */ -#define CONFIG_SYS_FLASH_BASE 0x60000000 -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 +#define CFG_SYS_FLASH_BASE 0x60000000 +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 #ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ @@ -104,7 +104,7 @@ /* FMan ucode */ #ifndef SPL_NO_FMAN #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_FM_MURAM_SIZE 0x60000 +#define CFG_SYS_FM_MURAM_SIZE 0x60000 #endif #endif diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 87751f786c8..dab57382edd 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -39,13 +39,13 @@ * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR_EXT (0x0) -#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ +#define CFG_SYS_NOR1_CSPR_EXT (0x0) +#define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ @@ -66,10 +66,10 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ - CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \ + CFG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_WRITE_SWAPPED_DATA /* * NAND Flash Definitions @@ -125,7 +125,7 @@ #ifdef CONFIG_FSL_QIXIS #define QIXIS_BASE 0x7fb00000 #define QIXIS_BASE_PHYS QIXIS_BASE -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 6 #define QIXIS_LBMAP_MASK 0x0f #define QIXIS_LBMAP_SHIFT 0 @@ -143,130 +143,130 @@ #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 -#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) -#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ +#define CFG_SYS_FPGA_CSPR_EXT (0x0) +#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CFG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ CSOR_NOR_NOR_MODE_AVD_NOR | \ CSOR_NOR_TRHZ_80) /* * QIXIS Timing parameters for IFC GPCM */ -#define CONFIG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xc) | \ +#define CFG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xc) | \ FTIM0_GPCM_TEADC(0x20) | \ FTIM0_GPCM_TEAHC(0x10)) -#define CONFIG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0x50) | \ +#define CFG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0x50) | \ FTIM1_GPCM_TRAD(0x1f)) -#define CONFIG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0x8) | \ +#define CFG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0x8) | \ FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0xf0)) -#define CONFIG_SYS_FPGA_FTIM3 0x0 +#define CFG_SYS_FPGA_FTIM3 0x0 #endif #ifdef CONFIG_TFABOOT -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK3 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS3_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS3_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS3_FTIM3 CFG_SYS_FPGA_FTIM3 #else #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK3 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS3_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS3_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS3_FTIM3 CFG_SYS_FPGA_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK3 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS3_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS3_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS3_FTIM3 CFG_SYS_FPGA_FTIM3 #endif #endif diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 76251fde57c..12c4853ea96 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -21,7 +21,7 @@ #define CFG_SYS_NOR_CSPR_EXT (0x0) #define CFG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #define CFG_SYS_NOR_CSPR \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -41,11 +41,11 @@ FTIM2_NOR_TWPH(0x8) | \ FTIM2_NOR_TWP(0x10)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_SYS_IFC_CCR 0x01000000 +#define CFG_SYS_IFC_CCR 0x01000000 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS } -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_WRITE_SWAPPED_DATA /* * NAND Flash Definitions @@ -91,97 +91,97 @@ /* * CPLD */ -#define CONFIG_SYS_CPLD_BASE 0x7fb00000 -#define CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE +#define CFG_SYS_CPLD_BASE 0x7fb00000 +#define CPLD_BASE_PHYS CFG_SYS_CPLD_BASE -#define CONFIG_SYS_CPLD_CSPR_EXT (0x0) -#define CONFIG_SYS_CPLD_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ +#define CFG_SYS_CPLD_CSPR_EXT (0x0) +#define CFG_SYS_CPLD_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_CPLD_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_CPLD_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CFG_SYS_CPLD_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_CPLD_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ CSOR_NOR_NOR_MODE_AVD_NOR | \ CSOR_NOR_TRHZ_80) /* CPLD Timing parameters for IFC GPCM */ -#define CONFIG_SYS_CPLD_FTIM0 (FTIM0_GPCM_TACSE(0xf) | \ +#define CFG_SYS_CPLD_FTIM0 (FTIM0_GPCM_TACSE(0xf) | \ FTIM0_GPCM_TEADC(0xf) | \ FTIM0_GPCM_TEAHC(0xf)) -#define CONFIG_SYS_CPLD_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ +#define CFG_SYS_CPLD_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) -#define CONFIG_SYS_CPLD_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ +#define CFG_SYS_CPLD_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ FTIM2_GPCM_TCH(0xf) | \ FTIM2_GPCM_TWP(0xff)) -#define CONFIG_SYS_CPLD_FTIM3 0x0 +#define CFG_SYS_CPLD_FTIM3 0x0 /* IFC Timing Params */ #ifdef CONFIG_TFABOOT -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NOR_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NOR_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 - -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 + +#define CFG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #else #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 - -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NOR_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NOR_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 + +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NOR_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NOR_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 - -#define CONFIG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR1 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 + +#define CFG_SYS_CSPR1_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif #endif -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_CPLD_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_CPLD_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_CPLD_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_CPLD_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_CPLD_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_CPLD_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_CPLD_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_CPLD_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_CPLD_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_CPLD_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_CPLD_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_CPLD_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_CPLD_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_CPLD_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_CPLD_FTIM3 /* * Environment diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index ce254d8b3f1..cac30e4679e 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -32,10 +32,10 @@ /* Link Definitions */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_BLOCK2_BASE 0x880000000ULL #define CPU_RELEASE_ADDR secondary_boot_addr @@ -68,7 +68,7 @@ /* FMan ucode */ #ifndef SPL_NO_FMAN #ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_FM_MURAM_SIZE 0x60000 +#define CFG_SYS_FM_MURAM_SIZE 0x60000 #endif #endif diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 8402eac4184..58ae0fb0a6c 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -8,7 +8,7 @@ #include "ls1046a_common.h" -#define CONFIG_SYS_UBOOT_BASE 0x40100000 +#define CFG_SYS_UBOOT_BASE 0x40100000 /* * NAND Flash Definitions @@ -48,14 +48,14 @@ #define CONFIG_MTD_NAND_VERIFY_WRITE /* IFC Timing Params */ -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 /* EEPROM */ #define I2C_RETIMER_ADDR 0x18 @@ -67,8 +67,8 @@ /* RTC */ #define RTC -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 0 I2C bus 0*/ -#define CONFIG_SYS_RTC_BUS_NUM 0 +#define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 0 I2C bus 0*/ +#define CFG_SYS_RTC_BUS_NUM 0 /* * Environment diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index d565492f1d1..553ae841cab 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -33,14 +33,14 @@ /* IFC */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) /* - * CONFIG_SYS_FLASH_BASE has the final address (core view) - * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) - * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address + * CFG_SYS_FLASH_BASE has the final address (core view) + * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view) + * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address * CONFIG_TEXT_BASE is linked to 0x60000000 for booting */ -#define CONFIG_SYS_FLASH_BASE 0x60000000 -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 +#define CFG_SYS_FLASH_BASE 0x60000000 +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 #ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ @@ -58,13 +58,13 @@ * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR_EXT (0x0) -#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ +#define CFG_SYS_NOR1_CSPR_EXT (0x0) +#define CFG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ @@ -86,10 +86,10 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ - CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \ + CFG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_WRITE_SWAPPED_DATA /* * NAND Flash Definitions @@ -145,7 +145,7 @@ #ifdef CONFIG_FSL_QIXIS #define QIXIS_BASE 0x7fb00000 #define QIXIS_BASE_PHYS QIXIS_BASE -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 6 #define QIXIS_LBMAP_MASK 0x0f #define QIXIS_LBMAP_SHIFT 0 @@ -163,130 +163,130 @@ #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 -#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) -#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ +#define CFG_SYS_FPGA_CSPR_EXT (0x0) +#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ +#define CFG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ CSOR_NOR_NOR_MODE_AVD_NOR | \ CSOR_NOR_TRHZ_80) /* * QIXIS Timing parameters for IFC GPCM */ -#define CONFIG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xc) | \ +#define CFG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xc) | \ FTIM0_GPCM_TEADC(0x20) | \ FTIM0_GPCM_TEAHC(0x10)) -#define CONFIG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0x50) | \ +#define CFG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0x50) | \ FTIM1_GPCM_TRAD(0x1f)) -#define CONFIG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0x8) | \ +#define CFG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0x8) | \ FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0xf0)) -#define CONFIG_SYS_FPGA_FTIM3 0x0 +#define CFG_SYS_FPGA_FTIM3 0x0 #endif #ifdef CONFIG_TFABOOT -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK3 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS3_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS3_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS3_FTIM3 CFG_SYS_FPGA_FTIM3 #else #ifdef CONFIG_NAND_BOOT -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK3 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS3_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS3_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS3_FTIM3 CFG_SYS_FPGA_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR1_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_AMASK3 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 CFG_SYS_FPGA_FTIM0 +#define CFG_SYS_CS3_FTIM1 CFG_SYS_FPGA_FTIM1 +#define CFG_SYS_CS3_FTIM2 CFG_SYS_FPGA_FTIM2 +#define CFG_SYS_CS3_FTIM3 CFG_SYS_FPGA_FTIM3 #endif #endif diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 0df68915989..f3904e7b3f7 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -16,7 +16,7 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #if defined(CONFIG_QSPI_BOOT) -#define CONFIG_SYS_UBOOT_BASE 0x40100000 +#define CFG_SYS_UBOOT_BASE 0x40100000 #endif #define CFG_SYS_NAND_BASE 0x7e800000 @@ -55,46 +55,46 @@ /* * CPLD */ -#define CONFIG_SYS_CPLD_BASE 0x7fb00000 -#define CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE +#define CFG_SYS_CPLD_BASE 0x7fb00000 +#define CPLD_BASE_PHYS CFG_SYS_CPLD_BASE -#define CONFIG_SYS_CPLD_CSPR_EXT (0x0) -#define CONFIG_SYS_CPLD_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ +#define CFG_SYS_CPLD_CSPR_EXT (0x0) +#define CFG_SYS_CPLD_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_CPLD_AMASK IFC_AMASK(64 * 1024) -#define CONFIG_SYS_CPLD_CSOR CSOR_NOR_ADM_SHIFT(16) +#define CFG_SYS_CPLD_AMASK IFC_AMASK(64 * 1024) +#define CFG_SYS_CPLD_CSOR CSOR_NOR_ADM_SHIFT(16) /* CPLD Timing parameters for IFC GPCM */ -#define CONFIG_SYS_CPLD_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CPLD_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CPLD_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ +#define CFG_SYS_CPLD_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) -#define CONFIG_SYS_CPLD_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ +#define CFG_SYS_CPLD_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ FTIM2_GPCM_TCH(0xf) | \ FTIM2_GPCM_TWP(0x3E)) -#define CONFIG_SYS_CPLD_FTIM3 0x0 +#define CFG_SYS_CPLD_FTIM3 0x0 /* IFC Timing Params */ -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 - -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_CPLD_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_CPLD_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_CPLD_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_CPLD_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_CPLD_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_CPLD_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_CPLD_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 + +#define CFG_SYS_CSPR2_EXT CFG_SYS_CPLD_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_CPLD_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_CPLD_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_CPLD_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_CPLD_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_CPLD_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_CPLD_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_CPLD_FTIM3 /* EEPROM */ #define I2C_RETIMER_ADDR 0x18 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index f8eaee881d0..bacc84f629a 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -30,10 +30,10 @@ #define CFG_SYS_FSL_QSPI_BASE 0x20000000 #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL /* * SMP Definitinos */ @@ -64,18 +64,18 @@ * 0x5_C000_0000..0x5_ffff_ffff IFC CS1 1GB (NOR/Promjet) * * For e.g. NOR flash at CS0 will be mapped to 0x580000000 after relocation. - * CONFIG_SYS_FLASH_BASE has the final address (core view) - * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) - * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address + * CFG_SYS_FLASH_BASE has the final address (core view) + * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view) + * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address * CONFIG_TEXT_BASE is linked to 0x30000000 for booting */ -#define CONFIG_SYS_FLASH_BASE 0x580000000ULL -#define CONFIG_SYS_FLASH_BASE_PHYS 0x80000000 -#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 +#define CFG_SYS_FLASH_BASE 0x580000000ULL +#define CFG_SYS_FLASH_BASE_PHYS 0x80000000 +#define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 -#define CONFIG_SYS_FLASH1_BASE_PHYS 0xC0000000 -#define CONFIG_SYS_FLASH1_BASE_PHYS_EARLY 0x8000000 +#define CFG_SYS_FLASH1_BASE_PHYS 0xC0000000 +#define CFG_SYS_FLASH1_BASE_PHYS_EARLY 0x8000000 #ifndef __ASSEMBLY__ unsigned long long get_qixis_addr(void); @@ -92,12 +92,12 @@ unsigned long long get_qixis_addr(void); /* MC firmware */ /* TODO Actual DPL max length needs to be confirmed with the MC FW team */ -#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 -#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 -#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 -#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 -#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 -#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 +#define CFG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 +#define CFG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 +#define CFG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 +#define CFG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 +#define CFG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 +#define CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 /* * Carve out a DDR region which will not be used by u-boot/Linux @@ -107,7 +107,7 @@ unsigned long long get_qixis_addr(void); */ #if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) +#define CFG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif /* Miscellaneous configurable options */ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index b75d4ccf5cf..d84622f3225 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -22,27 +22,27 @@ * IFC Definitions */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR_EXT (0x0) #define CFG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #define CFG_SYS_NOR_AMASK_EARLY IFC_AMASK(64*1024*1024) -#define CONFIG_SYS_NOR0_CSPR \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR0_CSPR_EARLY \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS_EARLY) | \ +#define CFG_SYS_NOR0_CSPR_EARLY \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS_EARLY) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH1_BASE_PHYS) | \ +#define CFG_SYS_NOR1_CSPR \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH1_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR_EARLY \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH1_BASE_PHYS_EARLY) | \ +#define CFG_SYS_NOR1_CSPR_EARLY \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH1_BASE_PHYS_EARLY) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -59,13 +59,13 @@ FTIM2_NOR_TWPH(0xe) | \ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x04000000 -#define CONFIG_SYS_IFC_CCR 0x01000000 +#define CFG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ - CONFIG_SYS_FLASH_BASE + 0x40000000} +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ + CFG_SYS_FLASH_BASE + 0x40000000} #endif #endif @@ -101,7 +101,7 @@ #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 6 #define QIXIS_QMAP_MASK 0xe0 #define QIXIS_QMAP_SHIFT 5 @@ -127,8 +127,8 @@ #define QIXIS_SDID_MASK 0x07 #define QIXIS_ESDHC_NO_ADAPTER 0x7 -#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) -#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ +#define CFG_SYS_FPGA_CSPR_EXT (0x0) +#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) @@ -139,9 +139,9 @@ #define SYS_FPGA_AMASK IFC_AMASK(64 * 1024) #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(0) +#define CFG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(0) #else -#define CONFIG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(12) +#define CFG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(12) #endif /* QIXIS Timing parameters*/ #define SYS_FPGA_CS_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ @@ -155,102 +155,102 @@ #define SYS_FPGA_CS_FTIM3 0x0 #ifdef CONFIG_TFABOOT -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY -#define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR_EARLY -#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK_EARLY -#define CONFIG_SYS_AMASK1_FINAL CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL -#define CONFIG_SYS_AMASK3 SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 SYS_FPGA_CS_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 SYS_FPGA_CS_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR_EARLY +#define CFG_SYS_CSPR0_FINAL CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR_EARLY +#define CFG_SYS_CSPR1_FINAL CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK_EARLY +#define CFG_SYS_AMASK1_FINAL CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL +#define CFG_SYS_AMASK3 SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 SYS_FPGA_CS_FTIM0 +#define CFG_SYS_CS3_FTIM1 SYS_FPGA_CS_FTIM1 +#define CFG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2 +#define CFG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3 #else #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL -#define CONFIG_SYS_AMASK2 SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS2_FTIM0 SYS_FPGA_CS_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 SYS_FPGA_CS_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 SYS_FPGA_CS_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 SYS_FPGA_CS_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_FPGA_CSPR +#define CFG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL +#define CFG_SYS_AMASK2 SYS_FPGA_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS2_FTIM0 SYS_FPGA_CS_FTIM0 +#define CFG_SYS_CS2_FTIM1 SYS_FPGA_CS_FTIM1 +#define CFG_SYS_CS2_FTIM2 SYS_FPGA_CS_FTIM2 +#define CFG_SYS_CS2_FTIM3 SYS_FPGA_CS_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY -#define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR_EARLY -#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK_EARLY -#define CONFIG_SYS_AMASK1_FINAL CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL -#define CONFIG_SYS_AMASK3 SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS3_FTIM0 SYS_FPGA_CS_FTIM0 -#define CONFIG_SYS_CS3_FTIM1 SYS_FPGA_CS_FTIM1 -#define CONFIG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2 -#define CONFIG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR_EARLY +#define CFG_SYS_CSPR0_FINAL CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR_EARLY +#define CFG_SYS_CSPR1_FINAL CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK_EARLY +#define CFG_SYS_AMASK1_FINAL CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR3_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR3 CFG_SYS_FPGA_CSPR +#define CFG_SYS_CSPR3_FINAL SYS_FPGA_CSPR_FINAL +#define CFG_SYS_AMASK3 SYS_FPGA_AMASK +#define CFG_SYS_CSOR3 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS3_FTIM0 SYS_FPGA_CS_FTIM0 +#define CFG_SYS_CS3_FTIM1 SYS_FPGA_CS_FTIM1 +#define CFG_SYS_CS3_FTIM2 SYS_FPGA_CS_FTIM2 +#define CFG_SYS_CS3_FTIM3 SYS_FPGA_CS_FTIM3 #endif #endif -#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CFG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 /* * I2C bus multiplexer @@ -281,7 +281,7 @@ * RTC configuration */ #define RTC -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ +#define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ #ifdef CONFIG_FSL_DSPI #if !defined(CONFIG_TFABOOT) && \ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 27510adae67..187b3072f02 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -20,17 +20,17 @@ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR_EXT (0x0) #define CFG_SYS_NOR_AMASK IFC_AMASK(128 * 1024 * 1024) #define CFG_SYS_NOR_AMASK_EARLY IFC_AMASK(64 * 1024 * 1024) -#define CONFIG_SYS_NOR0_CSPR \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR0_CSPR_EARLY \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS_EARLY) | \ +#define CFG_SYS_NOR0_CSPR_EARLY \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS_EARLY) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -44,12 +44,12 @@ FTIM2_NOR_TCH(0x0) | \ FTIM2_NOR_TWP(0x1)) #define CFG_SYS_NOR_FTIM3 0x04000000 -#define CONFIG_SYS_IFC_CCR 0x01000000 +#define CFG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } #endif #endif @@ -85,7 +85,7 @@ #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_BRDCFG4_OFFSET 0x54 #define QIXIS_LBMAP_SWITCH 2 #define QIXIS_QMAP_MASK 0xe0 @@ -107,8 +107,8 @@ #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 #define QIXIS_RST_FORCE_MEM 0x01 -#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) -#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ +#define CFG_SYS_FPGA_CSPR_EXT (0x0) +#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) @@ -117,8 +117,8 @@ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64*1024) -#define CONFIG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(0) +#define CFG_SYS_FPGA_AMASK IFC_AMASK(64*1024) +#define CFG_SYS_FPGA_CSOR CSOR_GPCM_ADM_SHIFT(0) /* QIXIS Timing parameters*/ #define SYS_FPGA_CS_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ @@ -132,36 +132,36 @@ #if defined(CONFIG_TFABOOT) || \ defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_FPGA_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_FPGA_CSPR -#define CONFIG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL -#define CONFIG_SYS_AMASK2 CONFIG_SYS_FPGA_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_FPGA_CSOR -#define CONFIG_SYS_CS2_FTIM0 SYS_FPGA_CS_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 SYS_FPGA_CS_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 SYS_FPGA_CS_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 SYS_FPGA_CS_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_FPGA_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_FPGA_CSPR +#define CFG_SYS_CSPR2_FINAL SYS_FPGA_CSPR_FINAL +#define CFG_SYS_AMASK2 CFG_SYS_FPGA_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_FPGA_CSOR +#define CFG_SYS_CS2_FTIM0 SYS_FPGA_CS_FTIM0 +#define CFG_SYS_CS2_FTIM1 SYS_FPGA_CS_FTIM1 +#define CFG_SYS_CS2_FTIM2 SYS_FPGA_CS_FTIM2 +#define CFG_SYS_CS2_FTIM3 SYS_FPGA_CS_FTIM3 #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY -#define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR_EARLY +#define CFG_SYS_CSPR0_FINAL CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 #endif -#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CFG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 #define I2C_MUX_CH_VOL_MONITOR 0xA /* Voltage monitor on channel 2*/ @@ -191,7 +191,7 @@ * RTC configuration */ #define RTC -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ +#define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ #endif #ifndef SPL_NO_ENV diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 21c097ecbbd..18defd5e5a6 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -17,10 +17,10 @@ /* Link Definitions */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL /* * SMP Definitinos @@ -56,18 +56,18 @@ * 0x5_C000_0000..0x5_ffff_ffff IFC CS1 1GB (NOR/Promjet) * * For e.g. NOR flash at CS0 will be mapped to 0x580000000 after relocation. - * CONFIG_SYS_FLASH_BASE has the final address (core view) - * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) - * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address + * CFG_SYS_FLASH_BASE has the final address (core view) + * CFG_SYS_FLASH_BASE_PHYS has the final address (IFC view) + * CFG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address * CONFIG_TEXT_BASE is linked to 0x30000000 for booting */ -#define CONFIG_SYS_FLASH_BASE 0x580000000ULL -#define CONFIG_SYS_FLASH_BASE_PHYS 0x80000000 -#define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 +#define CFG_SYS_FLASH_BASE 0x580000000ULL +#define CFG_SYS_FLASH_BASE_PHYS 0x80000000 +#define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 -#define CONFIG_SYS_FLASH1_BASE_PHYS 0xC0000000 -#define CONFIG_SYS_FLASH1_BASE_PHYS_EARLY 0x8000000 +#define CFG_SYS_FLASH1_BASE_PHYS 0xC0000000 +#define CFG_SYS_FLASH1_BASE_PHYS_EARLY 0x8000000 #ifndef __ASSEMBLY__ unsigned long long get_qixis_addr(void); @@ -84,13 +84,13 @@ unsigned long long get_qixis_addr(void); /* MC firmware */ /* TODO Actual DPL max length needs to be confirmed with the MC FW team */ -#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 -#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 -#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 -#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 +#define CFG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 +#define CFG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 +#define CFG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 +#define CFG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 /* For LS2085A */ -#define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 -#define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 +#define CFG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 +#define CFG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 /* * Carve out a DDR region which will not be used by u-boot/Linux @@ -99,7 +99,7 @@ unsigned long long get_qixis_addr(void); * 512MB aligned, so the min size to hide is 512MB. */ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) +#define CFG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (128UL * 1024 * 1024) #endif /* Miscellaneous configurable options */ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 7315790f1fe..067587b53c5 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -10,10 +10,10 @@ #include "ls2080a_common.h" #ifdef CONFIG_FSL_QSPI -#define CONFIG_SYS_I2C_IFDR_DIV 0x7e +#define CFG_SYS_I2C_IFDR_DIV 0x7e #endif -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) #define CONFIG_MEM_INIT_VALUE 0xdeadbeef @@ -25,27 +25,27 @@ #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR_EXT (0x0) #define CFG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #define CFG_SYS_NOR_AMASK_EARLY IFC_AMASK(64*1024*1024) -#define CONFIG_SYS_NOR0_CSPR \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR0_CSPR_EARLY \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS_EARLY) | \ +#define CFG_SYS_NOR0_CSPR_EARLY \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS_EARLY) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH1_BASE_PHYS) | \ +#define CFG_SYS_NOR1_CSPR \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH1_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR1_CSPR_EARLY \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH1_BASE_PHYS_EARLY) | \ +#define CFG_SYS_NOR1_CSPR_EARLY \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH1_BASE_PHYS_EARLY) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -61,13 +61,13 @@ FTIM2_NOR_TWPH(0x0E) | \ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x04000000 -#define CONFIG_SYS_IFC_CCR 0x01000000 +#define CFG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ - CONFIG_SYS_FLASH_BASE + 0x40000000} +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ + CFG_SYS_FLASH_BASE + 0x40000000} #endif #define CFG_SYS_NAND_CSPR_EXT (0x0) @@ -119,92 +119,92 @@ #define QIXIS_RCW_SRC_QSPI 0x62 #define QIXIS_RST_FORCE_MEM 0x01 -#define CONFIG_SYS_CSPR3_EXT (0x0) -#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ +#define CFG_SYS_CSPR3_EXT (0x0) +#define CFG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_CSPR3_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ +#define CFG_SYS_CSPR3_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64*1024) -#define CONFIG_SYS_CSOR3 CSOR_GPCM_ADM_SHIFT(12) +#define CFG_SYS_AMASK3 IFC_AMASK(64*1024) +#define CFG_SYS_CSOR3 CSOR_GPCM_ADM_SHIFT(12) /* QIXIS Timing parameters for IFC CS3 */ -#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ +#define CFG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) -#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ +#define CFG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ FTIM2_GPCM_TCH(0xf) | \ FTIM2_GPCM_TWP(0x3E)) -#define CONFIG_SYS_CS3_FTIM3 0x0 +#define CFG_SYS_CS3_FTIM3 0x0 #if defined(CONFIG_SPL) #if defined(CONFIG_NAND_BOOT) -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR_EARLY -#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR1_CSPR_EARLY -#define CONFIG_SYS_CSPR2_FINAL CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NOR_AMASK_EARLY -#define CONFIG_SYS_AMASK2_FINAL CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR0_CSPR_EARLY +#define CFG_SYS_CSPR1_FINAL CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NOR1_CSPR_EARLY +#define CFG_SYS_CSPR2_FINAL CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NOR_AMASK_EARLY +#define CFG_SYS_AMASK2_FINAL CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CFG_SYS_NAND_U_BOOT_SIZE (640 * 1024) #endif #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY -#define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR_EARLY -#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CFG_SYS_NOR_AMASK_EARLY -#define CONFIG_SYS_AMASK1_FINAL CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR_EARLY +#define CFG_SYS_CSPR0_FINAL CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR1_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR1 CFG_SYS_NOR1_CSPR_EARLY +#define CFG_SYS_CSPR1_FINAL CFG_SYS_NOR1_CSPR +#define CFG_SYS_AMASK1 CFG_SYS_NOR_AMASK_EARLY +#define CFG_SYS_AMASK1_FINAL CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR1 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS1_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS1_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS1_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS1_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #endif -#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CFG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 /* * I2C @@ -229,7 +229,7 @@ */ #define RTC #define CONFIG_RTC_DS3231 1 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_I2C_RTC_ADDR 0x68 /* Initial environment variables */ #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index daca3be16c5..32a11948723 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -32,17 +32,17 @@ #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT) -#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) +#define CFG_SYS_NOR0_CSPR_EXT (0x0) #define CFG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) #define CFG_SYS_NOR_AMASK_EARLY IFC_AMASK(64*1024*1024) -#define CONFIG_SYS_NOR0_CSPR \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ +#define CFG_SYS_NOR0_CSPR \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) -#define CONFIG_SYS_NOR0_CSPR_EARLY \ - (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS_EARLY) | \ +#define CFG_SYS_NOR0_CSPR_EARLY \ + (CSPR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS_EARLY) | \ CSPR_PORT_SIZE_16 | \ CSPR_MSEL_NOR | \ CSPR_V) @@ -58,13 +58,13 @@ FTIM2_NOR_TWPH(0x0E) | \ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x04000000 -#define CONFIG_SYS_IFC_CCR 0x01000000 +#define CFG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ - CONFIG_SYS_FLASH_BASE + 0x40000000} +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ + CFG_SYS_FLASH_BASE + 0x40000000} #endif #define CFG_SYS_NAND_CSPR_EXT (0x0) @@ -113,70 +113,70 @@ #define QIXIS_RCW_SRC_NAND 0x119 #define QIXIS_RST_FORCE_MEM 0x01 -#define CONFIG_SYS_CSPR3_EXT (0x0) -#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ +#define CFG_SYS_CSPR3_EXT (0x0) +#define CFG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS_EARLY) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_CSPR3_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ +#define CFG_SYS_CSPR3_FINAL (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64*1024) -#define CONFIG_SYS_CSOR3 CSOR_GPCM_ADM_SHIFT(12) +#define CFG_SYS_AMASK3 IFC_AMASK(64*1024) +#define CFG_SYS_CSOR3 CSOR_GPCM_ADM_SHIFT(12) /* QIXIS Timing parameters for IFC CS3 */ -#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ +#define CFG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ FTIM0_GPCM_TEADC(0x0e) | \ FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ +#define CFG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) -#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ +#define CFG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ FTIM2_GPCM_TCH(0xf) | \ FTIM2_GPCM_TWP(0x3E)) -#define CONFIG_SYS_CS3_FTIM3 0x0 +#define CFG_SYS_CS3_FTIM3 0x0 #if defined(CONFIG_SPL) && defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR0_CSPR_EARLY -#define CONFIG_SYS_CSPR2_FINAL CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NOR0_CSPR_EARLY +#define CFG_SYS_CSPR2_FINAL CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NAND_FTIM3 #define CFG_SYS_NAND_U_BOOT_SIZE (512 * 1024) #else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY -#define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CFG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CFG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CFG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CFG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CFG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 +#define CFG_SYS_CSPR0_EXT CFG_SYS_NOR0_CSPR_EXT +#define CFG_SYS_CSPR0 CFG_SYS_NOR0_CSPR_EARLY +#define CFG_SYS_CSPR0_FINAL CFG_SYS_NOR0_CSPR +#define CFG_SYS_AMASK0 CFG_SYS_NOR_AMASK +#define CFG_SYS_CSOR0 CFG_SYS_NOR_CSOR +#define CFG_SYS_CS0_FTIM0 CFG_SYS_NOR_FTIM0 +#define CFG_SYS_CS0_FTIM1 CFG_SYS_NOR_FTIM1 +#define CFG_SYS_CS0_FTIM2 CFG_SYS_NOR_FTIM2 +#define CFG_SYS_CS0_FTIM3 CFG_SYS_NOR_FTIM3 +#define CFG_SYS_CSPR2_EXT CFG_SYS_NAND_CSPR_EXT +#define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR +#define CFG_SYS_AMASK2 CFG_SYS_NAND_AMASK +#define CFG_SYS_CSOR2 CFG_SYS_NAND_CSOR +#define CFG_SYS_CS2_FTIM0 CFG_SYS_NAND_FTIM0 +#define CFG_SYS_CS2_FTIM1 CFG_SYS_NAND_FTIM1 +#define CFG_SYS_CS2_FTIM2 CFG_SYS_NAND_FTIM2 +#define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #endif #endif -#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CFG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 #ifdef CONFIG_TARGET_LS2081ARDB #define QIXIS_QMAP_MASK 0x07 @@ -197,7 +197,7 @@ * I2C */ #ifdef CONFIG_TARGET_LS2081ARDB -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 #endif #define I2C_MUX_PCA_ADDR 0x75 #define I2C_MUX_PCA_ADDR_PRI 0x75 /* Primary Mux*/ @@ -212,10 +212,10 @@ */ #define RTC #ifdef CONFIG_TARGET_LS2081ARDB -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 +#define CFG_SYS_I2C_RTC_ADDR 0x51 #else #define CONFIG_RTC_DS3231 1 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_I2C_RTC_ADDR 0x68 #endif #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index ad85e2de6ed..bbee9df404a 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -10,15 +10,15 @@ #include #include -#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CFG_SYS_FLASH_BASE 0x20000000 /* DDR */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL +#define CFG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL #define CFG_SYS_SDRAM_SIZE 0x200000000UL -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 @@ -42,22 +42,22 @@ /* Serial Port */ #define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4) -#define CONFIG_SYS_SERIAL0 0x21c0000 -#define CONFIG_SYS_SERIAL1 0x21d0000 -#define CONFIG_SYS_SERIAL2 0x21e0000 -#define CONFIG_SYS_SERIAL3 0x21f0000 +#define CFG_SYS_SERIAL0 0x21c0000 +#define CFG_SYS_SERIAL1 0x21d0000 +#define CFG_SYS_SERIAL2 0x21e0000 +#define CFG_SYS_SERIAL3 0x21f0000 /*below might needs to be removed*/ -#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ - (void *)CONFIG_SYS_SERIAL1, \ - (void *)CONFIG_SYS_SERIAL2, \ - (void *)CONFIG_SYS_SERIAL3 } +#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ + (void *)CFG_SYS_SERIAL1, \ + (void *)CFG_SYS_SERIAL2, \ + (void *)CFG_SYS_SERIAL3 } /* MC firmware */ -#define CONFIG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 -#define CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 -#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 -#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 -#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CFG_SYS_LS_MC_DPC_MAX_LENGTH 0x20000 +#define CFG_SYS_LS_MC_DRAM_DPC_OFFSET 0x00F00000 +#define CFG_SYS_LS_MC_DPL_MAX_LENGTH 0x20000 +#define CFG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 +#define CFG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 /* * Carve out a DDR region which will not be used by u-boot/Linux @@ -66,7 +66,7 @@ * 512MB aligned, so the min size to hide is 512MB. */ #ifdef CONFIG_FSL_MC_ENET -#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) +#define CFG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024) #endif /* I2C bus multiplexer */ @@ -75,10 +75,10 @@ /* RTC */ #define RTC -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ +#define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ /* Qixis */ -#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define CFG_SYS_I2C_FPGA_ADDR 0x66 /* USB */ diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index 4e8a9048596..9f891064bd5 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -9,7 +9,7 @@ #include "lx2160a_common.h" /* RTC */ -#define CONFIG_SYS_RTC_BUS_NUM 0 +#define CFG_SYS_RTC_BUS_NUM 0 /* MAC/PHY configuration */ diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index bb9239cc599..58c0ff36571 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -9,7 +9,7 @@ #include "lx2160a_common.h" /* RTC */ -#define CONFIG_SYS_RTC_BUS_NUM 4 +#define CFG_SYS_RTC_BUS_NUM 4 /* EMC2305 */ #define I2C_MUX_CH_EMC2305 0x09 diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index b70abb013f4..157688ef7d7 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -11,7 +11,7 @@ /* USB */ /* RTC */ -#define CONFIG_SYS_RTC_BUS_NUM 0 +#define CFG_SYS_RTC_BUS_NUM 0 /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index cbdb2fa1357..f87bbf7ccf3 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -21,8 +21,8 @@ #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) +#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) /* * U-Boot general configurations @@ -58,13 +58,13 @@ #define CONFIG_FEC_MXC_PHYADDR 0x0 #endif -#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ +#define CFG_SYS_RTC_BUS_NUM 1 /* I2C2 */ /* * RTC */ #ifdef CONFIG_CMD_DATE -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_I2C_RTC_ADDR 0x68 #endif /* @@ -77,7 +77,7 @@ #endif /* LVDS display */ -#define CONFIG_SYS_LDB_CLOCK 33260000 +#define CFG_SYS_LDB_CLOCK 33260000 #define CONFIG_IMX_VIDEO_SKIP /* IIM Fuses */ diff --git a/include/configs/malta.h b/include/configs/malta.h index c9aee00cd35..65f4b05649b 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -28,7 +28,7 @@ #endif #define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 /* * Serial driver @@ -38,9 +38,9 @@ * Flash configuration */ #ifdef CONFIG_64BIT -# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 +# define CFG_SYS_FLASH_BASE 0xffffffffbe000000 #else -# define CONFIG_SYS_FLASH_BASE 0xbe000000 +# define CFG_SYS_FLASH_BASE 0xbe000000 #endif /* diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 8aa3b0cd808..7c401a2cfd6 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -9,7 +9,7 @@ #include "mx6_common.h" -#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000) +#define CFG_SYS_UBOOT_BASE (CFG_SYS_FLASH_BASE + 0x80000) /* * Below defines are set but NOT really used since we by @@ -24,12 +24,12 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* NOR 16-bit mode */ -#define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR +#define CFG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR #define CONFIG_FLASH_VERIFY /* NOR Flash MTD */ -#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } -#define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } +#define CFG_SYS_FLASH_BANKS_LIST { (CFG_SYS_FLASH_BASE) } +#define CFG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } /* Ethernet Configuration */ #define CONFIG_FEC_MXC_PHYADDR 1 @@ -116,7 +116,7 @@ "nor_img_addr=0x11000000\0" \ "nor_img_file=core-image-lwn-mccmon6.nor\0" \ "emmc_img_file=core-image-lwn-mccmon6.ext4\0" \ - "nor_bank_start=" __stringify(CONFIG_SYS_FLASH_BASE) "\0" \ + "nor_bank_start=" __stringify(CFG_SYS_FLASH_BASE) "\0" \ "nor_img_size=0x02000000\0" \ "factory_script_file=factory.scr\0" \ "factory_load_script=" \ @@ -215,8 +215,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h index 2422cbf9f0b..9e480fe0558 100644 --- a/include/configs/meerkat96.h +++ b/include/configs/meerkat96.h @@ -18,8 +18,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment configs */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 2e07886c194..d190e4b5039 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -28,8 +28,8 @@ */ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ +#define CFG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ /* Misc CPU related */ @@ -47,8 +47,8 @@ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CFG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM0 -#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM0 +#define CFG_SYS_INIT_RAM_SIZE (16 * 1024) /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 139b5bca108..edd2466caa9 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -13,7 +13,7 @@ /* uart */ /* The following table includes the supported baudrates */ -# define CONFIG_SYS_BAUDRATE_TABLE \ +# define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} #define CONFIG_HOSTNAME "microblaze-generic" @@ -95,6 +95,6 @@ /* SPL part */ -#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE #endif /* __CONFIG_H */ diff --git a/include/configs/msc_sm2s_imx8mp.h b/include/configs/msc_sm2s_imx8mp.h index ac5ff9289a5..cfe926c0a14 100644 --- a/include/configs/msc_sm2s_imx8mp.h +++ b/include/configs/msc_sm2s_imx8mp.h @@ -14,7 +14,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 1 @@ -46,8 +46,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index 65cd6f5bc4c..d5bd4926348 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -10,13 +10,13 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ -#define CONFIG_SYS_UBOOT_BASE 0 +#define CFG_SYS_UBOOT_BASE 0 #endif /* __CONFIG_MT7620_H */ diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index 1211bb47488..7c8c67f4469 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -13,7 +13,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED 0x1c000000 -#define CONFIG_SYS_INIT_SP_OFFSET 0x800000 +#define CFG_SYS_INIT_SP_OFFSET 0x800000 /* MMC */ #define MMC_SUPPORTS_TUNING @@ -27,10 +27,10 @@ #endif /* Serial common */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 921600 } /* Dummy value */ -#define CONFIG_SYS_UBOOT_BASE 0 +#define CFG_SYS_UBOOT_BASE 0 #endif /* __CONFIG_MT7621_H */ diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index e5d60e1cd2b..8c297266d8b 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -10,10 +10,10 @@ #define __MT7622_H /* Uboot definition */ -#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* SPL -> Uboot */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 9c5034f5f08..9df2715fc7d 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -10,7 +10,7 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_OFFSET 0x80000 +#define CFG_SYS_INIT_SP_OFFSET 0x80000 /* Serial SPL */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) @@ -19,14 +19,14 @@ #endif /* Serial common */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 921600 } /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ -#define CONFIG_SYS_UBOOT_BASE 0 +#define CFG_SYS_UBOOT_BASE 0 #endif /* __CONFIG_MT7628_H */ diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index d330adbc01b..bfa44aacc72 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -18,7 +18,7 @@ /* Defines for SPL */ #define CONFIG_SPI_ADDR 0x30000000 -#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) +#define CFG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) /* SPL -> Uboot */ diff --git a/include/configs/mt7981.h b/include/configs/mt7981.h index 249f0b9662d..14c885ec55c 100644 --- a/include/configs/mt7981.h +++ b/include/configs/mt7981.h @@ -10,10 +10,10 @@ #define __MT7981_H /* Uboot definition */ -#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* SPL -> Uboot */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mt7986.h b/include/configs/mt7986.h index 990e411a640..0c41af1fc32 100644 --- a/include/configs/mt7986.h +++ b/include/configs/mt7986.h @@ -10,10 +10,10 @@ #define __MT7986_H /* Uboot definition */ -#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* SPL -> Uboot */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index d15941660ab..3a35527da10 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -10,7 +10,7 @@ #define __MT8512_H /* Uboot definition */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE #define ENV_BOOT_READ_IMAGE \ "boot_rd_img=mmc dev 0" \ diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index e45bfd76b6e..fa275d61d18 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -32,13 +32,13 @@ /* * NS16550 Configuration */ -#define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CFG_SYS_NS16550_CLK CFG_SYS_TCLK #if !defined(CONFIG_DM_SERIAL) #define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif -#if defined(CONFIG_ARMADA_38X) && !defined(CONFIG_SYS_BAUDRATE_TABLE) -#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ +#if defined(CONFIG_ARMADA_38X) && !defined(CFG_SYS_BAUDRATE_TABLE) +#define CFG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ 921600, 1000000, 1152000, 1500000, \ diff --git a/include/configs/mvebu_alleycat-5.h b/include/configs/mvebu_alleycat-5.h index 9c4038be8b0..5c9620371e3 100644 --- a/include/configs/mvebu_alleycat-5.h +++ b/include/configs/mvebu_alleycat-5.h @@ -11,7 +11,7 @@ /* additions for new ARM relocation support */ #define CFG_SYS_SDRAM_BASE 0x200000000 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 115200, 230400, 460800, 921600 } /* Default Env vars */ @@ -37,6 +37,6 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_SYS_TCLK 325000000 +#define CFG_SYS_TCLK 325000000 #endif /* _CONFIG_MVEBU_ALLEYCAY_5_H */ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 7641b562219..9bfc48c52d9 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -15,7 +15,7 @@ /* additions for new ARM relocation support */ #define CFG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ +#define CFG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ 921600, 1000000, 1152000, 1500000, \ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 358e06fd207..beac3ae6496 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -9,14 +9,14 @@ /* * High Level Configuration Options (easy to change) */ -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ +#define CFG_SYS_TCLK 250000000 /* 250MHz */ /* additions for new ARM relocation support */ #define CFG_SYS_SDRAM_BASE 0x00000000 /* auto boot */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 115200, 230400, 460800, 921600 } /* diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 2229980db37..3c99b70a2bb 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -113,12 +113,12 @@ #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) +#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) -#define CONFIG_SYS_DDR_CLKSEL 0 -#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 -#define CONFIG_SYS_MAIN_PWR_ON +#define CFG_SYS_DDR_CLKSEL 0 +#define CFG_SYS_CLKTL_CBCDR 0x59E35100 +#define CFG_SYS_MAIN_PWR_ON /*----------------------------------------------------------------------- * environment organization diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index e84bac67ef7..2bc462cc37e 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -61,8 +61,8 @@ #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) +#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) /* environment organization */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 9e837a38833..b52e70c95a0 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -24,7 +24,7 @@ /* PMIC Controller */ #define CONFIG_POWER_FSL #define CONFIG_POWER_FSL_MC13892 -#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 +#define CFG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 #define CFG_SYS_FSL_PMIC_I2C_ADDR 0x8 /* Command definition */ @@ -96,8 +96,8 @@ #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) +#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) /* Framebuffer and LCD */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 52ff7b00b43..7160654eb30 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -87,7 +87,7 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ +#define CFG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ /* Physical Memory Map */ #define PHYS_SDRAM_1 CSD0_BASE_ADDR @@ -97,8 +97,8 @@ #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) -#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) -#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) +#define CFG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CFG_SYS_INIT_RAM_SIZE (IRAM_SIZE) /* FLASH and environment organization */ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 43145567544..245530aa640 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -12,7 +12,7 @@ #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ #else #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_PL310_BASE L2_PL310_BASE +#define CFG_SYS_PL310_BASE L2_PL310_BASE #endif #endif diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 3c4ba095e4e..12741c08de5 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -86,8 +86,8 @@ /* Physical Memory Map */ #define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index 9c160c41ece..f6d3b2eeb9c 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -28,8 +28,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 711b5a334aa..5e95e430c49 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -140,8 +140,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 3fdf829e968..1a2160cce59 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -16,7 +16,7 @@ #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_PCA953X -#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } +#define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } #include "mx6sabre_common.h" @@ -26,7 +26,7 @@ #endif #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR +#define CFG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR #endif #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 3c2621d8c91..358d9f47c0f 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -83,8 +83,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index a3a12aeb390..6632e4ea29c 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -83,8 +83,8 @@ #define PHYS_SDRAM_SIZE SZ_2G #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index f0e239fdb6e..0dd40563c29 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -79,8 +79,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index a0f9c537e5d..6f5dffe4fbb 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -107,8 +107,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 8199b4b8319..cb1019bd56a 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -109,8 +109,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* environment organization */ diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 827385c65e2..4154d328ded 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -103,8 +103,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* environment organization */ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index c39b3572b84..6c165521f7a 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -82,8 +82,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* environment organization */ diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 362de482f57..85922fa436c 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -18,7 +18,7 @@ /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE -#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */ +#define CFG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */ /* UART */ #define LPUART_BASE LPUART4_RBASE @@ -48,8 +48,8 @@ "bootz ${loadaddr} - ${fdt_addr}; " \ "fi;\0" \ -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE SZ_256K #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 9ef1eea5e61..99e01896c71 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -15,7 +15,7 @@ /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG1_RBASE -#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */ +#define CFG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */ /* UART */ #define LPUART_BASE LPUART4_RBASE @@ -92,7 +92,7 @@ "bootz; " \ "fi;\0" \ -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE SZ_256K #endif /* __CONFIG_H */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 9d6b3d40484..5df080ade4a 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -46,11 +46,11 @@ /* Memory sizes */ /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 +#define CFG_SYS_INIT_RAM_ADDR 0x00000000 #if defined(CONFIG_MX23) -#define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024) +#define CFG_SYS_INIT_RAM_SIZE (32 * 1024) #elif defined(CONFIG_MX28) -#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) +#define CFG_SYS_INIT_RAM_SIZE (128 * 1024) #endif /* Point initial SP in SRAM so SPL can use it too. */ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index cdd12866ac0..a32fcd57f8f 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -23,8 +23,8 @@ #define PHYS_SDRAM_SIZE SZ_256M #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ #define CFG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 9d098113164..dd7f9513199 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -91,8 +91,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 9ad4f590697..9c364adc636 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -47,7 +47,7 @@ */ #define CFG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } +#define CFG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } /* USB device configuration */ #define CONFIG_USB_DEVICE @@ -64,7 +64,7 @@ * Board ONENAND Info. */ -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP +#define CFG_SYS_ONENAND_BASE ONENAND_MAP /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -150,7 +150,7 @@ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CFG_SYS_TIMERBASE (OMAP34XX_GPT2) /* * Physical Memory Map @@ -162,8 +162,8 @@ */ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 -#define CONFIG_SYS_INIT_RAM_SIZE 0x800 +#define CFG_SYS_INIT_RAM_ADDR 0x4020f800 +#define CFG_SYS_INIT_RAM_SIZE 0x800 /* * Attached kernel image diff --git a/include/configs/novena.h b/include/configs/novena.h index 8d39d75a42b..6f588f99c34 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -31,8 +31,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* I2C */ #define CONFIG_I2C_MULTI_BUS diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 080c659b6ec..09c4ddb6646 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -24,8 +24,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ #define CFG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/nsim.h b/include/configs/nsim.h index b930a538640..013a3491a39 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -12,8 +12,8 @@ * Memory configuration */ -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE SZ_256M /* diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h index 5ac951a370a..ea1edab9fc1 100644 --- a/include/configs/o4-imx6ull-nano.h +++ b/include/configs/o4-imx6ull-nano.h @@ -8,8 +8,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #if IS_ENABLED(CONFIG_CMD_USB) # define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h index b475354bbc6..c0ea9e852dc 100644 --- a/include/configs/octeon_common.h +++ b/include/configs/octeon_common.h @@ -8,10 +8,10 @@ #define __OCTEON_COMMON_H__ #if defined(CONFIG_RAM_OCTEON) -#define CONFIG_SYS_INIT_SP_OFFSET 0x20180000 +#define CFG_SYS_INIT_SP_OFFSET 0x20180000 #else /* No DDR init -> run in L2 cache with limited resources */ -#define CONFIG_SYS_INIT_SP_OFFSET 0x00180000 +#define CFG_SYS_INIT_SP_OFFSET 0x00180000 #endif #define CFG_SYS_SDRAM_BASE 0xffffffff80000000 diff --git a/include/configs/odroid.h b/include/configs/odroid.h index ce8ea583fa1..8b00a279215 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -14,7 +14,7 @@ #include #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_PL310_BASE 0x10502000 +#define CFG_SYS_PL310_BASE 0x10502000 #endif #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 0890f51eff2..f4e23bbb0f3 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -20,7 +20,7 @@ /* NAND */ #if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE +#define CFG_SYS_FLASH_BASE NAND_BASE #define CFG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} #define CFG_SYS_NAND_ECCSIZE 512 diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 6eec955e88f..8bb8521f1c1 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -25,7 +25,7 @@ /* NAND */ #if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_SYS_FLASH_BASE NAND_BASE +#define CFG_SYS_FLASH_BASE NAND_BASE #define CFG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13} #define CFG_SYS_NAND_ECCSIZE 512 diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 10f6ba63601..a6b5e55b541 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -66,8 +66,8 @@ BOOTENV /* OneNAND config */ -#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP -#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024) +#define CFG_SYS_ONENAND_BASE ONENAND_MAP +#define CFG_SYS_ONENAND_BLOCK_SIZE (128*1024) /* NAND config */ #define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 6001037ae88..38955377510 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -144,9 +144,9 @@ /* **** PISMO SUPPORT *** */ #if defined(CONFIG_CMD_NAND) -#define CONFIG_SYS_FLASH_BASE 0x10000000 +#define CFG_SYS_FLASH_BASE 0x10000000 #endif -#define CONFIG_SYS_FLASH_SIZE 0x4000000 +#define CFG_SYS_FLASH_SIZE 0x4000000 #endif /* __CONFIG_H */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 883cc0b99c9..1634db86064 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -37,8 +37,8 @@ /* Required support for the TCA642X GPIO we have on the uEVM */ #define CONFIG_TCA642X -#define CONFIG_SYS_I2C_TCA642X_BUS_NUM 4 -#define CONFIG_SYS_I2C_TCA642X_ADDR 0x22 +#define CFG_SYS_I2C_TCA642X_BUS_NUM 4 +#define CFG_SYS_I2C_TCA642X_ADDR 0x22 /* Enabled commands */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 5b0d87a3367..788a1113868 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -17,9 +17,9 @@ /* * SoC Configuration */ -#define CONFIG_SYS_OSCIN_FREQ 24000000 -#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE -#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) +#define CFG_SYS_OSCIN_FREQ 24000000 +#define CFG_SYS_TIMERBASE DAVINCI_TIMER0_BASE +#define CFG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) /* * Memory Info @@ -32,7 +32,7 @@ /* memtest will be run on 16MB */ -#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ +#define CFG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ DAVINCI_SYSCFG_SUSPSRC_SPI1 | \ DAVINCI_SYSCFG_SUSPSRC_UART2 | \ @@ -44,17 +44,17 @@ */ /* Requires CONFIG_SYS_DA850_PLL0_POSTDIV=0, set in Kconfig */ -#define CONFIG_SYS_DA850_PLL0_PLLM 18 -#define CONFIG_SYS_DA850_PLL1_PLLM 21 +#define CFG_SYS_DA850_PLL0_PLLM 18 +#define CFG_SYS_DA850_PLL1_PLLM 21 /* * DDR2 memory configuration */ -#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ +#define CFG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \ DV_DDR_PHY_EXT_STRBEN | \ (0x5 << DV_DDR_PHY_RD_LATENCY_SHIFT)) -#define CONFIG_SYS_DA850_DDR2_SDBCR ( \ +#define CFG_SYS_DA850_DDR2_SDBCR ( \ (1 << DV_DDR_SDCR_DDR2EN_SHIFT) | \ (1 << DV_DDR_SDCR_DDREN_SHIFT) | \ (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) | \ @@ -64,9 +64,9 @@ (2 << DV_DDR_SDCR_PAGESIZE_SHIFT)) /* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */ -#define CONFIG_SYS_DA850_DDR2_SDBCR2 0 +#define CFG_SYS_DA850_DDR2_SDBCR2 0 -#define CONFIG_SYS_DA850_DDR2_SDTIMR ( \ +#define CFG_SYS_DA850_DDR2_SDTIMR ( \ (19 << DV_DDR_SDTMR1_RFC_SHIFT) | \ (1 << DV_DDR_SDTMR1_RP_SHIFT) | \ (1 << DV_DDR_SDTMR1_RCD_SHIFT) | \ @@ -76,7 +76,7 @@ (1 << DV_DDR_SDTMR1_RRD_SHIFT) | \ (1 << DV_DDR_SDTMR1_WTR_SHIFT)) -#define CONFIG_SYS_DA850_DDR2_SDTIMR2 ( \ +#define CFG_SYS_DA850_DDR2_SDTIMR2 ( \ (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) | \ (2 << DV_DDR_SDTMR2_XP_SHIFT) | \ (0 << DV_DDR_SDTMR2_ODT_SHIFT) | \ @@ -85,21 +85,21 @@ (1 << DV_DDR_SDTMR2_RTP_SHIFT) | \ (2 << DV_DDR_SDTMR2_CKE_SHIFT)) -#define CONFIG_SYS_DA850_DDR2_SDRCR 0x00000492 -#define CONFIG_SYS_DA850_DDR2_PBBPR 0x30 +#define CFG_SYS_DA850_DDR2_SDRCR 0x00000492 +#define CFG_SYS_DA850_DDR2_PBBPR 0x30 /* * Serial Driver info */ #define CFG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) -#define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE -#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) +#define CFG_SYS_SPI_BASE DAVINCI_SPI1_BASE +#define CFG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) /* * I2C Configuration */ -#define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 +#define CFG_SYS_I2C_EXPANDER_ADDR 0x20 /* * Flash & Environment diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 53889d699b2..e42a736136b 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -15,8 +15,8 @@ /* Physical Memory Map */ #define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* USB */ #ifdef CONFIG_USB_EHCI_MX6 diff --git a/include/configs/p1_p2_bootsrc.h b/include/configs/p1_p2_bootsrc.h index d155e553e20..c96deda61d7 100644 --- a/include/configs/p1_p2_bootsrc.h +++ b/include/configs/p1_p2_bootsrc.h @@ -7,11 +7,11 @@ #include -#if !defined(CONFIG_SYS_SPD_BUS_NUM) || !defined(CONFIG_SYS_I2C_PCA9557_ADDR) -#error "CONFIG_SYS_SPD_BUS_NUM and CONFIG_SYS_I2C_PCA9557_ADDR are required" +#if !defined(CONFIG_SYS_SPD_BUS_NUM) || !defined(CFG_SYS_I2C_PCA9557_ADDR) +#error "CONFIG_SYS_SPD_BUS_NUM and CFG_SYS_I2C_PCA9557_ADDR are required" #endif -#define __BOOTSRC_CMD(src, msk) i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 1 src 1; i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 msk 1 +#define __BOOTSRC_CMD(src, msk) i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CFG_SYS_I2C_PCA9557_ADDR 1 src 1; i2c mw CFG_SYS_I2C_PCA9557_ADDR 3 msk 1 #define __VAR_CMD(var, cmd) __stringify(var=cmd\0) #define __VAR_CMD_RST(var, cmd) __VAR_CMD(var, cmd; reset) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 14d702e1efe..e8b752785b4 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -83,19 +83,19 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_MMC_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_MMC_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_MMC_U_BOOT_START CONFIG_TEXT_BASE #ifdef CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR -#define CONFIG_SYS_MMC_U_BOOT_OFFS (CONFIG_SPL_PAD_TO - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA*512) +#define CFG_SYS_MMC_U_BOOT_OFFS (CONFIG_SPL_PAD_TO - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA*512) #else -#define CONFIG_SYS_MMC_U_BOOT_OFFS CONFIG_SPL_PAD_TO +#define CFG_SYS_MMC_U_BOOT_OFFS CONFIG_SPL_PAD_TO #endif #elif defined(CONFIG_SPIFLASH) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_TEXT_BASE -#define CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_TEXT_BASE -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SPL_PAD_TO +#define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) +#define CFG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_TEXT_BASE +#define CFG_SYS_SPI_FLASH_U_BOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SPL_PAD_TO #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CFG_SYS_NAND_U_BOOT_SIZE (832 << 10) @@ -118,8 +118,8 @@ */ #define CONFIG_L2_CACHE -#define CONFIG_SYS_CCSRBAR 0xffe00000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CFG_SYS_CCSRBAR 0xffe00000 +#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ #define SPD_EEPROM_ADDRESS 0x52 @@ -130,40 +130,40 @@ #define CFG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G #endif #define CFG_SYS_SDRAM_SIZE (1u << (CFG_SYS_SDRAM_SIZE_LAW - 19)) -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE /* Default settings for DDR3 */ #ifndef CONFIG_TARGET_P2020RDB -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302 -#define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 -#define CONFIG_SYS_DDR_CS1_BNDS 0x0040007f -#define CONFIG_SYS_DDR_CS1_CONFIG 0x80014302 -#define CONFIG_SYS_DDR_CS1_CONFIG_2 0x00000000 - -#define CONFIG_SYS_DDR_INIT_ADDR 0x00000000 -#define CONFIG_SYS_DDR_INIT_EXT_ADDR 0x00000000 -#define CONFIG_SYS_DDR_MODE_CONTROL 0x00000000 - -#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600 -#define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8655A608 -#define CONFIG_SYS_DDR_SR_CNTR 0x00000000 -#define CONFIG_SYS_DDR_RCW_1 0x00000000 -#define CONFIG_SYS_DDR_RCW_2 0x00000000 -#define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ -#define CONFIG_SYS_DDR_CONTROL_2 0x04401050 -#define CONFIG_SYS_DDR_TIMING_4 0x00220001 -#define CONFIG_SYS_DDR_TIMING_5 0x03402400 - -#define CONFIG_SYS_DDR_TIMING_3 0x00020000 -#define CONFIG_SYS_DDR_TIMING_0 0x00330004 -#define CONFIG_SYS_DDR_TIMING_1 0x6f6B4846 -#define CONFIG_SYS_DDR_TIMING_2 0x0FA8C8CF -#define CONFIG_SYS_DDR_CLK_CTRL 0x03000000 -#define CONFIG_SYS_DDR_MODE_1 0x40461520 -#define CONFIG_SYS_DDR_MODE_2 0x8000c000 -#define CONFIG_SYS_DDR_INTERVAL 0x0C300000 +#define CFG_SYS_DDR_CS0_BNDS 0x0000003f +#define CFG_SYS_DDR_CS0_CONFIG 0x80014302 +#define CFG_SYS_DDR_CS0_CONFIG_2 0x00000000 +#define CFG_SYS_DDR_CS1_BNDS 0x0040007f +#define CFG_SYS_DDR_CS1_CONFIG 0x80014302 +#define CFG_SYS_DDR_CS1_CONFIG_2 0x00000000 + +#define CFG_SYS_DDR_INIT_ADDR 0x00000000 +#define CFG_SYS_DDR_INIT_EXT_ADDR 0x00000000 +#define CFG_SYS_DDR_MODE_CONTROL 0x00000000 + +#define CFG_SYS_DDR_ZQ_CONTROL 0x89080600 +#define CFG_SYS_DDR_WRLVL_CONTROL 0x8655A608 +#define CFG_SYS_DDR_SR_CNTR 0x00000000 +#define CFG_SYS_DDR_RCW_1 0x00000000 +#define CFG_SYS_DDR_RCW_2 0x00000000 +#define CFG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ +#define CFG_SYS_DDR_CONTROL_2 0x04401050 +#define CFG_SYS_DDR_TIMING_4 0x00220001 +#define CFG_SYS_DDR_TIMING_5 0x03402400 + +#define CFG_SYS_DDR_TIMING_3 0x00020000 +#define CFG_SYS_DDR_TIMING_0 0x00330004 +#define CFG_SYS_DDR_TIMING_1 0x6f6B4846 +#define CFG_SYS_DDR_TIMING_2 0x0FA8C8CF +#define CFG_SYS_DDR_CLK_CTRL 0x03000000 +#define CFG_SYS_DDR_MODE_1 0x40461520 +#define CFG_SYS_DDR_MODE_2 0x8000c000 +#define CFG_SYS_DDR_INTERVAL 0x0C300000 #endif /* @@ -186,23 +186,23 @@ * Local Bus Definitions */ #if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_SYS_FLASH_BASE 0xec000000 +#define CFG_SYS_FLASH_BASE 0xec000000 #else -#define CONFIG_SYS_FLASH_BASE 0xef000000 +#define CFG_SYS_FLASH_BASE 0xef000000 #endif #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) +#define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) #else -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE +#define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #endif -#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \ +#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) \ | BR_PS_16 | BR_V) #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7 -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ /* Nand Flash */ @@ -241,42 +241,42 @@ #endif #endif /* CONFIG_NAND_FSL_ELBC */ -#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ +#define CFG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW CFG_SYS_INIT_RAM_ADDR /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) #else /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS CONFIG_SYS_INIT_RAM_ADDR -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS +#define CFG_SYS_INIT_RAM_ADDR_PHYS CFG_SYS_INIT_RAM_ADDR +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0 +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW CFG_SYS_INIT_RAM_ADDR_PHYS #endif /* Size of used area in RAM */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_CPLD_BASE 0xffa00000 +#define CFG_SYS_CPLD_BASE 0xffa00000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CPLD_BASE_PHYS 0xfffa00000ull +#define CFG_SYS_CPLD_BASE_PHYS 0xfffa00000ull #else -#define CONFIG_SYS_CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE +#define CFG_SYS_CPLD_BASE_PHYS CFG_SYS_CPLD_BASE #endif /* CPLD config size: 1Mb */ /* Vsc7385 switch */ #ifdef CONFIG_VSC7385_ENET #define __VSCFW_ADDR "vscfw_addr=ef000000\0" -#define CONFIG_SYS_VSC7385_BASE 0xffb00000 +#define CFG_SYS_VSC7385_BASE 0xffb00000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_VSC7385_BASE_PHYS 0xfffb00000ull +#define CFG_SYS_VSC7385_BASE_PHYS 0xfffb00000ull #else -#define CONFIG_SYS_VSC7385_BASE_PHYS CONFIG_SYS_VSC7385_BASE +#define CFG_SYS_VSC7385_BASE_PHYS CFG_SYS_VSC7385_BASE #endif /* The size of the VSC7385 firmware image */ @@ -292,18 +292,18 @@ */ #if defined(CONFIG_SPL_BUILD) #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) -#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 -#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CFG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CFG_SYS_INIT_L2_ADDR_PHYS CFG_SYS_INIT_L2_ADDR +#define CFG_SYS_INIT_L2_END (CFG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 -#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CFG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CFG_SYS_INIT_L2_ADDR_PHYS CFG_SYS_INIT_L2_ADDR +#define CFG_SYS_INIT_L2_END (CFG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #else -#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 -#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR -#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CFG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CFG_SYS_INIT_L2_ADDR_PHYS CFG_SYS_INIT_L2_ADDR +#define CFG_SYS_INIT_L2_END (CFG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #endif /* CONFIG_TPL_BUILD */ #endif #endif @@ -315,15 +315,15 @@ #undef CONFIG_SERIAL_SOFTWARE_FIFO #define CFG_SYS_NS16550_CLK get_bus_freq(0) -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CFG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CFG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) +#define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR+0x4500) +#define CFG_SYS_NS16550_COM2 (CFG_SYS_CCSRBAR+0x4600) /* I2C */ #if !CONFIG_IS_ENABLED(DM_I2C) -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } +#define CFG_SYS_I2C_NOPROBES { {0, 0x29} } #endif /* @@ -331,8 +331,8 @@ */ #define CONFIG_RTC_PT7C4338 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_I2C_PCA9557_ADDR 0x18 +#define CFG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_I2C_PCA9557_ADDR 0x18 /* enable read and write access to EEPROM */ @@ -397,7 +397,7 @@ */ #if defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD -#define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) +#define SPL_ENV_ADDR (CFG_SYS_INIT_L2_ADDR + (160 << 10)) #endif #endif @@ -418,7 +418,7 @@ * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux*/ /* * Environment Configuration diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 85cedde0988..2a1660bf188 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -35,8 +35,8 @@ #define PHYS_SDRAM_SIZE SZ_256M #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ #define CFG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index f7e36f22ce8..4421e740d9e 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -37,8 +37,8 @@ #define PHYS_SDRAM_SIZE SZ_256M #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* NAND */ #define CFG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 586cddf4184..5c2ff5d02ee 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -119,8 +119,8 @@ #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * SZ_1M) #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* environment organization */ diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index cf705dcb197..3674e4cddae 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -16,8 +16,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ #define ENV_MMC \ diff --git a/include/configs/pg-wcom-expu1.h b/include/configs/pg-wcom-expu1.h index e08d9414129..1b72739d143 100644 --- a/include/configs/pg-wcom-expu1.h +++ b/include/configs/pg-wcom-expu1.h @@ -13,23 +13,23 @@ #define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" /* CLIPS FPGA Definitions */ -#define CONFIG_SYS_CSPR3_EXT (0x00) -#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CLIPS_BASE) | \ +#define CFG_SYS_CSPR3_EXT (0x00) +#define CFG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CLIPS_BASE) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) -#define CONFIG_SYS_CSOR3 (CSOR_GPCM_ADM_SHIFT(0x4) | \ +#define CFG_SYS_AMASK3 IFC_AMASK(64 * 1024) +#define CFG_SYS_CSOR3 (CSOR_GPCM_ADM_SHIFT(0x4) | \ CSOR_GPCM_TRHZ_40) -#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x6) | \ +#define CFG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x6) | \ FTIM0_GPCM_TEADC(0x7) | \ FTIM0_GPCM_TEAHC(0x2)) -#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x2) | \ +#define CFG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x2) | \ FTIM1_GPCM_TRAD(0x12)) -#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x3) | \ +#define CFG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x3) | \ FTIM2_GPCM_TCH(0x1) | \ FTIM2_GPCM_TWP(0x12)) -#define CONFIG_SYS_CS3_FTIM3 0x04000000 +#define CFG_SYS_CS3_FTIM3 0x04000000 /* PRST */ #define WCOM_CLIPS_RST 0 diff --git a/include/configs/pg-wcom-seli8.h b/include/configs/pg-wcom-seli8.h index 9a7669c940b..e4bcae5bb5e 100644 --- a/include/configs/pg-wcom-seli8.h +++ b/include/configs/pg-wcom-seli8.h @@ -12,23 +12,23 @@ #define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" /* PAXK FPGA Definitions */ -#define CONFIG_SYS_CSPR3_EXT (0x00) -#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_PAX_BASE) | \ +#define CFG_SYS_CSPR3_EXT (0x00) +#define CFG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_PAX_BASE) | \ CSPR_PORT_SIZE_8 | \ CSPR_MSEL_GPCM | \ CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(64 * 1024) -#define CONFIG_SYS_CSOR3 (CSOR_GPCM_ADM_SHIFT(0x4) | \ +#define CFG_SYS_AMASK3 IFC_AMASK(64 * 1024) +#define CFG_SYS_CSOR3 (CSOR_GPCM_ADM_SHIFT(0x4) | \ CSOR_GPCM_TRHZ_40) -#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x6) | \ +#define CFG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x6) | \ FTIM0_GPCM_TEADC(0x7) | \ FTIM0_GPCM_TEAHC(0x2)) -#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x2) | \ +#define CFG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x2) | \ FTIM1_GPCM_TRAD(0x12)) -#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x3) | \ +#define CFG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x3) | \ FTIM2_GPCM_TCH(0x1) | \ FTIM2_GPCM_TWP(0x12)) -#define CONFIG_SYS_CS3_FTIM3 0x04000000 +#define CFG_SYS_CS3_FTIM3 0x04000000 /* PRST */ #define KM_LIU_RST 0 diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index ac68c933a06..7f73117ac1c 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -11,7 +11,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -60,8 +60,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_512K #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index aedaf806e5e..11a833bb127 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -10,7 +10,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -59,8 +59,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_512K #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index d9abbbc28b3..3cc2a693cee 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -18,9 +18,9 @@ * Memory Layout */ /* Initial RAM for temporary stack, global data */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 -#define CONFIG_SYS_INIT_RAM_ADDR \ - (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SYS_INIT_RAM_SIZE) +#define CFG_SYS_INIT_RAM_SIZE 0x10000 +#define CFG_SYS_INIT_RAM_ADDR \ + (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CFG_SYS_INIT_RAM_SIZE) /* SDRAM Configuration (for final code, data, stack, heap) */ #define CFG_SYS_SDRAM_BASE 0x88000000 diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index fc2cab960c6..9e6c210c40b 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -92,8 +92,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 22b4976d722..8af8883fad6 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -92,8 +92,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #ifdef CONFIG_VIDEO #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index f5b9eed2bcd..7028264d722 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -94,8 +94,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* PMIC */ #define CONFIG_POWER_PFUZE3000 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 91baff96386..f9301a5524b 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -63,8 +63,8 @@ /* Link Definitions */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x80000 +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 3fbddd903a3..a233fb8ed74 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -22,47 +22,47 @@ #define MASTER_PLL_DIV 15 #define MASTER_PLL_MUL 162 #define MAIN_PLL_DIV 2 -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 18432000 /* clocks */ /* CKGR_MOR - enable main osc. */ -#define CONFIG_SYS_MOR_VAL \ +#define CFG_SYS_MOR_VAL \ (AT91_PMC_MOR_MOSCEN | \ (255 << 8)) /* Main Oscillator Start-up Time */ -#define CONFIG_SYS_PLLAR_VAL \ +#define CFG_SYS_PLLAR_VAL \ (AT91_PMC_PLLAR_29 | /* Bit 29 must be 1 when prog */ \ AT91_PMC_PLLXR_OUT(3) | \ ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV)) /* PCK/2 = MCK Master Clock from PLLA */ -#define CONFIG_SYS_MCKR1_VAL \ +#define CFG_SYS_MCKR1_VAL \ (AT91_PMC_MCKR_CSS_SLOW | \ AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_2) /* PCK/2 = MCK Master Clock from PLLA */ -#define CONFIG_SYS_MCKR2_VAL \ +#define CFG_SYS_MCKR2_VAL \ (AT91_PMC_MCKR_CSS_PLLA | \ AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_2) /* define PDC[31:16] as DATA[31:16] */ -#define CONFIG_SYS_PIOC_PDR_VAL1 0xFFFF0000 +#define CFG_SYS_PIOC_PDR_VAL1 0xFFFF0000 /* no pull-up for D[31:16] */ -#define CONFIG_SYS_PIOC_PPUDR_VAL 0xFFFF0000 +#define CFG_SYS_PIOC_PPUDR_VAL 0xFFFF0000 /* EBI_CSA, no pull-ups for D[15:0], CS1 SDRAM, CS3 NAND Flash */ -#define CONFIG_SYS_MATRIX_EBICSA_VAL \ +#define CFG_SYS_MATRIX_EBICSA_VAL \ (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_EBI_CS1A) /* SDRAM */ /* SDRAMC_MR Mode register */ -#define CONFIG_SYS_SDRC_MR_VAL1 AT91_SDRAMC_MODE_NORMAL +#define CFG_SYS_SDRC_MR_VAL1 AT91_SDRAMC_MODE_NORMAL /* SDRAMC_TR - Refresh Timer register */ -#define CONFIG_SYS_SDRC_TR_VAL1 0x13C +#define CFG_SYS_SDRC_TR_VAL1 0x13C /* SDRAMC_CR - Configuration register*/ -#define CONFIG_SYS_SDRC_CR_VAL \ +#define CFG_SYS_SDRC_CR_VAL \ (AT91_SDRAMC_NC_9 | \ AT91_SDRAMC_NR_13 | \ AT91_SDRAMC_NB_4 | \ @@ -76,10 +76,10 @@ (1 << 28)) /* Exit Self Refresh to Active Delay */ /* Memory Device Register -> SDRAM */ -#define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM -#define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE +#define CFG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM +#define CFG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE #define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH +#define CFG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH #define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ @@ -88,37 +88,37 @@ #define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR +#define CFG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR #define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL +#define CFG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL #define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ +#define CFG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ #define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ -#define CONFIG_SYS_SMC0_SETUP0_VAL \ +#define CFG_SYS_SMC0_SETUP0_VAL \ (AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) | \ AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10)) -#define CONFIG_SYS_SMC0_PULSE0_VAL \ +#define CFG_SYS_SMC0_PULSE0_VAL \ (AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) | \ AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11)) -#define CONFIG_SYS_SMC0_CYCLE0_VAL \ +#define CFG_SYS_SMC0_CYCLE0_VAL \ (AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22)) -#define CONFIG_SYS_SMC0_MODE0_VAL \ +#define CFG_SYS_SMC0_MODE0_VAL \ (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ AT91_SMC_MODE_DBW_16 | \ AT91_SMC_MODE_TDF | \ AT91_SMC_MODE_TDF_CYCLE(6)) /* user reset enable */ -#define CONFIG_SYS_RSTC_RMR_VAL \ +#define CFG_SYS_RSTC_RMR_VAL \ (AT91_RSTC_KEY | \ AT91_RSTC_CR_PROCRST | \ AT91_RSTC_MR_ERSTL(1) | \ AT91_RSTC_MR_ERSTL(2)) /* Disable Watchdog */ -#define CONFIG_SYS_WDTC_WDMR_VAL \ +#define CFG_SYS_WDTC_WDMR_VAL \ (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \ AT91_WDT_MR_WDV(0xfff) | \ AT91_WDT_MR_WDDIS | \ @@ -139,10 +139,10 @@ /* NOR flash */ #define PHYS_FLASH_1 0x10000000 -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 /* USB */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 +#define CFG_SYS_USB_OHCI_REGS_BASE 0x00500000 #define CONFIG_EXTRA_ENV_SETTINGS \ "partition=nand0,0\0" \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index c1f6334d6a1..9fd897958a4 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -22,14 +22,14 @@ #define MASTER_PLL_DIV 6 #define MASTER_PLL_MUL 65 #define MAIN_PLL_DIV 2 /* 2 or 4 */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 18432000 +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ /* clocks */ -#define CONFIG_SYS_MOR_VAL \ +#define CFG_SYS_MOR_VAL \ (AT91_PMC_MOR_MOSCEN | \ (255 << 8)) /* Main Oscillator Start-up Time */ -#define CONFIG_SYS_PLLAR_VAL \ +#define CFG_SYS_PLLAR_VAL \ (AT91_PMC_PLLAR_29 | /* Bit 29 must be 1 when prog */ \ AT91_PMC_PLLXR_OUT(3) | \ AT91_PMC_PLLXR_PLLCOUNT(0x3f) | /* PLL Counter */\ @@ -38,43 +38,43 @@ #if (MAIN_PLL_DIV == 2) /* PCK/2 = MCK Master Clock from PLLA */ -#define CONFIG_SYS_MCKR1_VAL \ +#define CFG_SYS_MCKR1_VAL \ (AT91_PMC_MCKR_CSS_SLOW | \ AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_2) /* PCK/2 = MCK Master Clock from PLLA */ -#define CONFIG_SYS_MCKR2_VAL \ +#define CFG_SYS_MCKR2_VAL \ (AT91_PMC_MCKR_CSS_PLLA | \ AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_2) #else /* PCK/4 = MCK Master Clock from PLLA */ -#define CONFIG_SYS_MCKR1_VAL \ +#define CFG_SYS_MCKR1_VAL \ (AT91_PMC_MCKR_CSS_SLOW | \ AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_4) /* PCK/4 = MCK Master Clock from PLLA */ -#define CONFIG_SYS_MCKR2_VAL \ +#define CFG_SYS_MCKR2_VAL \ (AT91_PMC_MCKR_CSS_PLLA | \ AT91_PMC_MCKR_PRES_1 | \ AT91_PMC_MCKR_MDIV_4) #endif /* define PDC[31:16] as DATA[31:16] */ -#define CONFIG_SYS_PIOD_PDR_VAL1 0xFFFF0000 +#define CFG_SYS_PIOD_PDR_VAL1 0xFFFF0000 /* no pull-up for D[31:16] */ -#define CONFIG_SYS_PIOD_PPUDR_VAL 0xFFFF0000 +#define CFG_SYS_PIOD_PPUDR_VAL 0xFFFF0000 /* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */ -#define CONFIG_SYS_MATRIX_EBI0CSA_VAL \ +#define CFG_SYS_MATRIX_EBI0CSA_VAL \ (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_VDDIOMSEL_3_3V | \ AT91_MATRIX_CSA_EBI_CS1A) /* SDRAM */ /* SDRAMC_MR Mode register */ -#define CONFIG_SYS_SDRC_MR_VAL1 0 +#define CFG_SYS_SDRC_MR_VAL1 0 /* SDRAMC_TR - Refresh Timer register */ -#define CONFIG_SYS_SDRC_TR_VAL1 0x3AA +#define CFG_SYS_SDRC_TR_VAL1 0x3AA /* SDRAMC_CR - Configuration register*/ -#define CONFIG_SYS_SDRC_CR_VAL \ +#define CFG_SYS_SDRC_CR_VAL \ (AT91_SDRAMC_NC_9 | \ AT91_SDRAMC_NR_13 | \ AT91_SDRAMC_NB_4 | \ @@ -88,10 +88,10 @@ (8 << 28)) /* tXSR - Exit Self Refresh to Active Delay */ /* Memory Device Register -> SDRAM */ -#define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM -#define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE +#define CFG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM +#define CFG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE #define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH +#define CFG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH #define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ @@ -100,37 +100,37 @@ #define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ #define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR +#define CFG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR #define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL +#define CFG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL #define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ +#define CFG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ #define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ -#define CONFIG_SYS_SMC0_SETUP0_VAL \ +#define CFG_SYS_SMC0_SETUP0_VAL \ (AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) | \ AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10)) -#define CONFIG_SYS_SMC0_PULSE0_VAL \ +#define CFG_SYS_SMC0_PULSE0_VAL \ (AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) | \ AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11)) -#define CONFIG_SYS_SMC0_CYCLE0_VAL \ +#define CFG_SYS_SMC0_CYCLE0_VAL \ (AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22)) -#define CONFIG_SYS_SMC0_MODE0_VAL \ +#define CFG_SYS_SMC0_MODE0_VAL \ (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ AT91_SMC_MODE_DBW_16 | \ AT91_SMC_MODE_TDF | \ AT91_SMC_MODE_TDF_CYCLE(6)) /* user reset enable */ -#define CONFIG_SYS_RSTC_RMR_VAL \ +#define CFG_SYS_RSTC_RMR_VAL \ (AT91_RSTC_KEY | \ AT91_RSTC_CR_PROCRST | \ AT91_RSTC_MR_ERSTL(1) | \ AT91_RSTC_MR_ERSTL(2)) /* Disable Watchdog */ -#define CONFIG_SYS_WDTC_WDMR_VAL \ +#define CFG_SYS_WDTC_WDMR_VAL \ (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \ AT91_WDT_MR_WDV(0xfff) | \ AT91_WDT_MR_WDDIS | \ @@ -142,7 +142,7 @@ /* NOR flash, if populated */ #define PHYS_FLASH_1 0x10000000 -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 /* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -166,7 +166,7 @@ AT91_MATRIX_SCFG_SLOT_CYCLE(255)) /* USB */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ +#define CFG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ #define CONFIG_EXTRA_ENV_SETTINGS \ "partition=nand0,0\0" \ diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 4a0a16818ed..686411eee2e 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -16,8 +16,8 @@ #define __CONFIG_H /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x70000000 @@ -53,9 +53,9 @@ 56, 57, 58, 59, 60, 61, 62, 63, } #endif -#define CONFIG_SYS_MASTER_CLOCK 132096000 -#define CONFIG_SYS_AT91_PLLA 0x20c73f03 -#define CONFIG_SYS_MCKR 0x1301 -#define CONFIG_SYS_MCKR_CSS 0x1302 +#define CFG_SYS_MASTER_CLOCK 132096000 +#define CFG_SYS_AT91_PLLA 0x20c73f03 +#define CFG_SYS_MCKR 0x1301 +#define CFG_SYS_MCKR_CSS 0x1302 #endif diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 365fdd30c08..518d7a3639c 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -7,10 +7,10 @@ #define __CONFIG_POLEG_H #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_PL310_BASE 0xF03FC000 /* L2 - Cache Regs Base (4k Space)*/ +#define CFG_SYS_PL310_BASE 0xF03FC000 /* L2 - Cache Regs Base (4k Space)*/ #endif -#define CONFIG_SYS_BOOTMAPSZ (0x30 << 20) +#define CFG_SYS_BOOTMAPSZ (0x30 << 20) #define CFG_SYS_SDRAM_BASE 0x0 /* Default environemnt variables */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index bee1ef64948..2b25c31b1d8 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -9,8 +9,8 @@ #define __PRESIDIO_ASIC_H /* Generic Timer Definitions */ -#define CONFIG_SYS_TIMER_RATE 25000000 -#define CONFIG_SYS_TIMER_COUNTER 0xf4321008 +#define CFG_SYS_TIMER_RATE 25000000 +#define CFG_SYS_TIMER_COUNTER 0xf4321008 /* note: arch/arm/cpu/armv8/start.S which references GICD_BASE/GICC_BASE * does not yet support DT. Thus define it here. @@ -18,7 +18,7 @@ #define GICD_BASE 0xf7011000 #define GICC_BASE 0xf7012000 -#define CONFIG_SYS_TIMER_BASE 0xf4321000 +#define CFG_SYS_TIMER_BASE 0xf4321000 /* Use external clock source */ #define PRESIDIO_APB_CLK 125000000 @@ -26,11 +26,11 @@ /* Cortina Serial Configuration */ #define CORTINA_UART_CLOCK (PRESIDIO_APB_CLK) -#define CORTINA_SERIAL_PORTS {(void *)CONFIG_SYS_SERIAL0, \ - (void *)CONFIG_SYS_SERIAL1} +#define CORTINA_SERIAL_PORTS {(void *)CFG_SYS_SERIAL0, \ + (void *)CFG_SYS_SERIAL1} -#define CONFIG_SYS_SERIAL0 PER_UART0_CFG -#define CONFIG_SYS_SERIAL1 PER_UART1_CFG +#define CFG_SYS_SERIAL0 PER_UART0_CFG +#define CFG_SYS_SERIAL1 PER_UART1_CFG /* SDRAM Bank #1 */ #define DDR_BASE 0x00000000 @@ -58,7 +58,7 @@ /* nand driver parameters */ #ifdef CONFIG_TARGET_PRESIDIO_ASIC - #define CFG_SYS_NAND_BASE CONFIG_SYS_FLASH_BASE + #define CFG_SYS_NAND_BASE CFG_SYS_FLASH_BASE #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #endif diff --git a/include/configs/qcs404-evb.h b/include/configs/qcs404-evb.h index 58020ae95b1..c41bb341d82 100644 --- a/include/configs/qcs404-evb.h +++ b/include/configs/qcs404-evb.h @@ -11,7 +11,7 @@ #include #include -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } +#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x5000000\0" \ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index e7c810957d6..aa9cae017d9 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -12,39 +12,39 @@ /* Needed to fill the ccsrbar pointer */ /* Virtual address to CCSRBAR */ -#define CONFIG_SYS_CCSRBAR 0xe0000000 +#define CFG_SYS_CCSRBAR 0xe0000000 /* Physical address should be a function call */ #ifndef __ASSEMBLY__ extern unsigned long long get_phys_ccsrbar_addr_early(void); -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32) -#define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early() +#define CFG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32) +#define CFG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early() #else -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CFG_SYS_CCSRBAR_PHYS_HIGH 0x0 +#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR #endif /* Virtual address to a temporary map if we need it (max 128MB) */ -#define CONFIG_SYS_TMPVIRT 0xe8000000 +#define CFG_SYS_TMPVIRT 0xe8000000 /* * DDR Setup */ #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CONFIG_HWCONFIG -#define CONFIG_SYS_INIT_RAM_ADDR 0x00100000 -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0 -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000 +#define CFG_SYS_INIT_RAM_ADDR 0x00100000 +#define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0 +#define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000 /* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 +#define CFG_SYS_INIT_RAM_ADDR_PHYS \ + ((CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CFG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CFG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* RTC */ #define CONFIG_RTC_PT7C4338 @@ -58,7 +58,7 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); * have to be in the first 64 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ /* * Environment Configuration diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index f6ee7201eba..bad74cc620d 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -10,12 +10,12 @@ #define CFG_SYS_SDRAM_SIZE 0x04000000 /* Address of u-boot image in Flash */ -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) +#define CFG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* * NOR Flash ( Spantion S29GL256P ) */ -#define CONFIG_SYS_FLASH_BASE (0xA0000000) -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#define CFG_SYS_FLASH_BASE (0xA0000000) +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } #endif /* __CONFIG_H */ diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 606a0a7ecde..a86180ead57 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -15,14 +15,14 @@ #endif /* console */ -#define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } +#define CFG_SYS_BAUDRATE_TABLE { 38400, 115200 } #define CFG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE) #define CFG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) /* Timer */ #define CONFIG_TMU_TIMER -#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ -#define CONFIG_SYS_TIMER_RATE (get_board_sys_clk() / 8) +#define CFG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ +#define CFG_SYS_TIMER_RATE (get_board_sys_clk() / 8) #endif /* __RCAR_GEN2_COMMON_H */ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 58530725978..e9cbd253824 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -18,7 +18,7 @@ #define GICC_BASE 0xF1020000 /* console */ -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } +#define CFG_SYS_BAUDRATE_TABLE { 115200, 38400 } /* PHY needs a longer autoneg timeout */ #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index b4c19727478..a4cae697181 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -8,7 +8,7 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_HZ_CLOCK 24000000 +#define CFG_SYS_HZ_CLOCK 24000000 #define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (512UL << 20UL) diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index fac27a7d27c..302546630ac 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -8,7 +8,7 @@ #include "rockchip-common.h" -#define CONFIG_SYS_HZ_CLOCK 24000000 +#define CFG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 6889ba591b3..58ad62afe16 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -8,7 +8,7 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_HZ_CLOCK 24000000 +#define CFG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 4aa7e0449db..6b55c57dd77 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -9,7 +9,7 @@ #include #include "rockchip-common.h" -#define CONFIG_SYS_HZ_CLOCK 24000000 +#define CFG_SYS_HZ_CLOCK 24000000 #define CONFIG_IRAM_BASE 0xff700000 diff --git a/include/configs/rpi.h b/include/configs/rpi.h index 2c24944d9c3..e3549275138 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -17,14 +17,14 @@ /* Use SoC timer for AArch32, but architected timer for AArch64 */ #ifndef CONFIG_ARM64 -#define CONFIG_SYS_TIMER_RATE 1000000 -#define CONFIG_SYS_TIMER_COUNTER \ +#define CFG_SYS_TIMER_RATE 1000000 +#define CFG_SYS_TIMER_COUNTER \ (&((struct bcm2835_timer_regs *)BCM2835_TIMER_PHYSADDR)->clo) #endif /* Memory layout */ #define CFG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* * The board really has 256M. However, the VC (VideoCore co-processor) shares * the RAM, and uses a configurable portion at the top. We tell U-Boot that a diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 76836add302..84a5ae6965d 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -10,10 +10,10 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) +#define CFG_SYS_TIMER_RATE (24 * 1000 * 1000) /* TIMER1,initialized by ddr initialize code */ -#define CONFIG_SYS_TIMER_BASE 0x10350020 -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) +#define CFG_SYS_TIMER_BASE 0x10350020 +#define CFG_SYS_TIMER_COUNTER (CFG_SYS_TIMER_BASE + 8) #define CFG_SYS_SDRAM_BASE 0x60000000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index ed891ab22a9..3d49d52b381 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -124,6 +124,6 @@ /* FLASH and environment organization */ #define CONFIG_MMC_DEFAULT_DEV 0 -#define CONFIG_SYS_ONENAND_BASE 0xB0000000 +#define CFG_SYS_ONENAND_BASE 0xB0000000 #endif /* __CONFIG_H */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 614d04fda07..06be9c0f652 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -87,7 +87,7 @@ "mmcrootpart=3\0" \ "opts=always_resume=1" -#define CONFIG_SYS_ONENAND_BASE 0x0C000000 +#define CFG_SYS_ONENAND_BASE 0x0C000000 #ifndef __ASSEMBLY__ void universal_spi_scl(int bit); diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 41e52546ed3..2e422cd241e 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -14,7 +14,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } +#define CFG_SYS_WRITE_SWAPPED_DATA #endif /* __SALVATOR_X_H */ diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index 75302bf5c05..f44ce909b91 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -10,8 +10,8 @@ #ifndef __CONFIG_H__ #define __CONFIG_H__ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID 0 /* ignored in arm */ diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 22813d4c544..27b39ebf417 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -11,8 +11,8 @@ #define __CONFIG_H__ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID 0 /* ignored in arm */ diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index 79f354d2e6c..d62146e7797 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -11,8 +11,8 @@ #include "at91-sama5_common.h" -#undef CONFIG_SYS_AT91_MAIN_CLOCK -#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ +#undef CFG_SYS_AT91_MAIN_CLOCK +#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SPL */ diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index f826eab9ff2..1979cb366e5 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -12,8 +12,8 @@ #include "at91-sama5_common.h" -#undef CONFIG_SYS_AT91_MAIN_CLOCK -#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ +#undef CFG_SYS_AT91_MAIN_CLOCK +#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index 01ed1a3c8e7..a072b21dfb8 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -11,8 +11,8 @@ #include "at91-sama5_common.h" -#undef CONFIG_SYS_AT91_MAIN_CLOCK -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ +#undef CFG_SYS_AT91_MAIN_CLOCK +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h index 2e3c1ea4006..bf3c92bdf39 100644 --- a/include/configs/sama5d2_ptc_ek.h +++ b/include/configs/sama5d2_ptc_ek.h @@ -12,8 +12,8 @@ #include "at91-sama5_common.h" -#undef CONFIG_SYS_AT91_MAIN_CLOCK -#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ +#undef CFG_SYS_AT91_MAIN_CLOCK +#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 3f58928565f..4f579ad9c56 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -27,7 +27,7 @@ /* NOR flash */ #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_SYS_FLASH_BASE 0x10000000 +#define CFG_SYS_FLASH_BASE 0x10000000 #endif /* SDRAM */ diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 68fa31fe76f..59f13edbc85 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -9,8 +9,8 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x60000000 #define CFG_SYS_SDRAM_SIZE 0x20000000 diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 5a7f5e135b5..1081e0bbc49 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -17,7 +17,7 @@ #define CFG_SYS_SDRAM_SIZE \ (SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20) -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ +#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} #ifndef SANDBOX_NO_SDL diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index af5fe27e68b..f7cdd5a1956 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -11,7 +11,7 @@ #include #include -#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } +#define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } #define CONFIG_EXTRA_ENV_SETTINGS \ "bootm_size=0x4000000\0" \ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 31552f4619d..5a001716fb0 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -35,7 +35,7 @@ #define CFG_SYS_SDRAM_BASE PHYS_DRAM_1 /* Platform/Board specific defs */ -#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ +#define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ /* NS16550 Configuration */ #define CFG_SYS_NS16550_CLK (48000000) diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index d2bc73a400e..794475942a2 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -36,8 +36,8 @@ */ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */ /* misc settings */ @@ -87,8 +87,8 @@ * leaving the correct space for initial global data structure above that * address while providing maximum stack area below. */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 +#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* Defines for SPL */ @@ -102,11 +102,11 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } -#define CONFIG_SYS_MASTER_CLOCK (198656000/2) +#define CFG_SYS_MASTER_CLOCK (198656000/2) #define AT91_PLL_LOCK_TIMEOUT 1000000 -#define CONFIG_SYS_AT91_PLLA 0x2060bf09 -#define CONFIG_SYS_MCKR 0x100 -#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) -#define CONFIG_SYS_AT91_PLLB 0x10483f0e +#define CFG_SYS_AT91_PLLA 0x2060bf09 +#define CFG_SYS_MCKR 0x100 +#define CFG_SYS_MCKR_CSS (0x02 | CFG_SYS_MCKR) +#define CFG_SYS_AT91_PLLB 0x10483f0e #endif /* __CONFIG_H */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 64963eebe5c..ffa1a1fcb0e 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -88,7 +88,7 @@ * Boot configuration */ -#define CONFIG_SYS_ONENAND_BASE 0xE7100000 +#define CFG_SYS_ONENAND_BASE 0xE7100000 /* * Ethernet Contoller driver diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 44b9109d442..14f9cf56028 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -39,7 +39,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #endif diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 9b1cb372ece..b7aa49ce435 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -15,16 +15,16 @@ #include /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* CPU */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6 #define CFG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM +#define CFG_SYS_INIT_RAM_SIZE 0x1000 +#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM /* Mem test settings */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 95516800793..afca7e18e9b 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -15,7 +15,7 @@ * Clocks */ -#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 +#define CFG_SYS_TIMERBASE OMAP34XX_GPT2 #define V_NS16550_CLK 48000000 #define V_OSCK 26000000 @@ -55,7 +55,7 @@ #define CFG_SYS_NS16550_CLK V_NS16550_CLK #define CFG_SYS_NS16550_COM3 OMAP34XX_UART3 -#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \ +#define CFG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \ 115200 } /* diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index 49883ea7a3c..35c777b774e 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -18,7 +18,7 @@ /* * Serial / UART configurations */ -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} /* * L4 OSC1 Timer 0 diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 261ae56c1dc..29b4b22b398 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -10,7 +10,7 @@ #include /* Eternal oscillator */ -#define CONFIG_SYS_TIMER_RATE 40000000 +#define CFG_SYS_TIMER_RATE 40000000 /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512MiB on SECU1 */ @@ -21,7 +21,7 @@ * the last two bytes of the 128 bytes large NVRAM in the * RTC which begin at address 0x20 */ -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_I2C_RTC_ADDR 0x68 /* Environment settings */ diff --git a/include/configs/socfpga_chameleonv3.h b/include/configs/socfpga_chameleonv3.h index 7012097276c..aa13878177e 100644 --- a/include/configs/socfpga_chameleonv3.h +++ b/include/configs/socfpga_chameleonv3.h @@ -17,7 +17,7 @@ /* * Serial / UART configurations */ -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} +#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} #define CONFIG_EXTRA_ENV_SETTINGS \ "autoload=no\0" \ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 7ef7c5da828..bbbdea6664c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -12,12 +12,12 @@ */ #define PHYS_SDRAM_1 0x0 #if defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 -#define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR 0xFFFF0000 +#define CFG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 +#define CFG_SYS_INIT_RAM_ADDR 0xFFE00000 /* SPL memory allocation configuration, this is for FAT implementation */ -#define CONFIG_SYS_INIT_RAM_SIZE (SOCFPGA_PHYS_OCRAM_SIZE - \ +#define CFG_SYS_INIT_RAM_SIZE (SOCFPGA_PHYS_OCRAM_SIZE - \ CONFIG_SYS_SPL_MALLOC_SIZE) #endif @@ -27,9 +27,9 @@ * at this address to not overwrite the bootcounter by checking, if the * bootcounter address is located in the internal SRAM. */ -#if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ - (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE))) +#if ((CONFIG_SYS_BOOTCOUNT_ADDR > CFG_SYS_INIT_RAM_ADDR) && \ + (CONFIG_SYS_BOOTCOUNT_ADDR < (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE))) #endif /* @@ -48,16 +48,16 @@ /* * Cache */ -#define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS +#define CFG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS /* * L4 OSC1 Timer 0 */ #ifndef CONFIG_TIMER -#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) -#ifndef CONFIG_SYS_TIMER_RATE -#define CONFIG_SYS_TIMER_RATE 25000000 +#define CFG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS +#define CFG_SYS_TIMER_COUNTER (CFG_SYS_TIMERBASE + 0x4) +#ifndef CFG_SYS_TIMER_RATE +#define CFG_SYS_TIMER_RATE 25000000 #endif #endif diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 9403e2f4306..47089f312d2 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -26,8 +26,8 @@ /* * U-Boot run time memory configurations */ -#define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x40000 +#define CFG_SYS_INIT_RAM_ADDR 0xFFE00000 +#define CFG_SYS_INIT_RAM_SIZE 0x40000 /* * U-Boot environment configurations diff --git a/include/configs/socrates.h b/include/configs/socrates.h index c628860eac7..0a2d5815170 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -42,20 +42,20 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ +#define CFG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ -#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ +#undef CFG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_CCSRBAR 0xE0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +#define CFG_SYS_CCSRBAR 0xE0000000 +#define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CONFIG_VERY_BIG_RAM /* I2C addresses of SPD EEPROMs */ @@ -63,46 +63,46 @@ /* Hardcoded values, to use instead of SPD */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80010102 -#define CONFIG_SYS_DDR_TIMING_0 0x00260802 -#define CONFIG_SYS_DDR_TIMING_1 0x3935D322 -#define CONFIG_SYS_DDR_TIMING_2 0x14904CC8 -#define CONFIG_SYS_DDR_MODE 0x00480432 -#define CONFIG_SYS_DDR_INTERVAL 0x030C0100 -#define CONFIG_SYS_DDR_CONFIG_2 0x04400000 -#define CONFIG_SYS_DDR_CONFIG 0xC3008000 -#define CONFIG_SYS_DDR_CLK_CONTROL 0x03800000 +#define CFG_SYS_DDR_CS0_BNDS 0x0000000f +#define CFG_SYS_DDR_CS0_CONFIG 0x80010102 +#define CFG_SYS_DDR_TIMING_0 0x00260802 +#define CFG_SYS_DDR_TIMING_1 0x3935D322 +#define CFG_SYS_DDR_TIMING_2 0x14904CC8 +#define CFG_SYS_DDR_MODE 0x00480432 +#define CFG_SYS_DDR_INTERVAL 0x030C0100 +#define CFG_SYS_DDR_CONFIG_2 0x04400000 +#define CFG_SYS_DDR_CONFIG 0xC3008000 +#define CFG_SYS_DDR_CLK_CONTROL 0x03800000 #define CFG_SYS_SDRAM_SIZE 256 /* in Megs */ /* * Flash on the LocalBus */ -#define CONFIG_SYS_FLASH0 0xFE000000 -#define CONFIG_SYS_FLASH1 0xFC000000 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH1, CONFIG_SYS_FLASH0 } +#define CFG_SYS_FLASH0 0xFE000000 +#define CFG_SYS_FLASH1 0xFC000000 +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH1, CFG_SYS_FLASH0 } -#define CONFIG_SYS_LBC_FLASH_BASE CONFIG_SYS_FLASH1 /* Localbus flash start */ -#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LBC_FLASH_BASE /* start of FLASH */ +#define CFG_SYS_LBC_FLASH_BASE CFG_SYS_FLASH1 /* Localbus flash start */ +#define CFG_SYS_FLASH_BASE CFG_SYS_LBC_FLASH_BASE /* start of FLASH */ -#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ -#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ -#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ +#define CFG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ +#define CFG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ +#define CFG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ +#define CFG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size used area in RAM*/ +#define CFG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ +#define CFG_SYS_INIT_RAM_SIZE 0x4000 /* Size used area in RAM*/ -#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) /* FPGA and NAND */ -#define CONFIG_SYS_FPGA_BASE 0xc0000000 -#define CONFIG_SYS_FPGA_SIZE 0x00100000 /* 1 MB */ +#define CFG_SYS_FPGA_BASE 0xc0000000 +#define CFG_SYS_FPGA_SIZE 0x00100000 /* 1 MB */ -#define CFG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70) +#define CFG_SYS_NAND_BASE (CFG_SYS_FPGA_BASE + 0x70) /* LIME GDC */ -#define CONFIG_SYS_LIME_BASE 0xc8000000 +#define CFG_SYS_LIME_BASE 0xc8000000 /* * General PCI @@ -137,7 +137,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ +#define CFG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index 008aa500107..de0f48b79a1 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -54,8 +54,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* environment organization */ diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index 3c70856fc70..a5987c5e17a 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -15,7 +15,7 @@ */ /* FIXME: This should be loaded from device tree... */ -#define CONFIG_SYS_PL310_BASE 0xa0412000 +#define CFG_SYS_PL310_BASE 0xa0412000 /* Linux does not boot if FDT / initrd is loaded to end of RAM */ #define BOOT_ENV \ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 806323e375d..9294d57ca84 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -14,7 +14,7 @@ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_1_SIZE 0x3E000000 -#define CONFIG_SYS_HZ_CLOCK 750000000 /* 750 MHz */ +#define CFG_SYS_HZ_CLOCK 750000000 /* 750 MHz */ /* Environment */ @@ -22,7 +22,7 @@ * For booting Linux, use the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ SZ_256M +#define CFG_SYS_BOOTMAPSZ SZ_256M #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 51f69010b17..afd7d50428b 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -7,13 +7,13 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CFG_SYS_FLASH_BASE 0x08000000 /* * Configuration of the external SDRAM memory */ -#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ +#define CFG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \ diff --git a/include/configs/stm32f429-evaluation.h b/include/configs/stm32f429-evaluation.h index 221b7abe1ad..c8aad47966f 100644 --- a/include/configs/stm32f429-evaluation.h +++ b/include/configs/stm32f429-evaluation.h @@ -10,15 +10,15 @@ #include /* For booting Linux, use the first 16MB of memory */ -#define CONFIG_SYS_BOOTMAPSZ SZ_16M +#define CFG_SYS_BOOTMAPSZ SZ_16M -#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CFG_SYS_FLASH_BASE 0x08000000 /* * Configuration of the external SDRAM memory */ -#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ +#define CFG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h index 55e70ce9250..573a6b17956 100644 --- a/include/configs/stm32f469-discovery.h +++ b/include/configs/stm32f469-discovery.h @@ -10,15 +10,15 @@ #include /* For booting Linux, use the first 12MB of memory */ -#define CONFIG_SYS_BOOTMAPSZ SZ_8M + SZ_4M +#define CFG_SYS_BOOTMAPSZ SZ_8M + SZ_4M -#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CFG_SYS_FLASH_BASE 0x08000000 /* * Configuration of the external SDRAM memory */ -#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ +#define CFG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index c7d6d9368a2..14e883a3589 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -10,15 +10,15 @@ #include /* For booting Linux, use the first 6MB of memory */ -#define CONFIG_SYS_BOOTMAPSZ SZ_4M + SZ_2M +#define CFG_SYS_BOOTMAPSZ SZ_4M + SZ_2M -#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CFG_SYS_FLASH_BASE 0x08000000 /* * Configuration of the external SDRAM memory */ -#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ +#define CFG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) @@ -33,7 +33,7 @@ "ramdisk_addr_r=0xC0438000\0" \ BOOTENV -#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ +#define CFG_SYS_UBOOT_BASE (CFG_SYS_FLASH_BASE + \ CONFIG_SPL_PAD_TO) /* For splashcreen */ diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h index f959fcf26f3..67e6a3a19d2 100644 --- a/include/configs/stm32h743-disco.h +++ b/include/configs/stm32h743-disco.h @@ -11,11 +11,11 @@ #include /* For booting Linux, use the first 16MB of memory */ -#define CONFIG_SYS_BOOTMAPSZ SZ_16M +#define CFG_SYS_BOOTMAPSZ SZ_16M -#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CFG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_HZ_CLOCK 1000000 +#define CFG_SYS_HZ_CLOCK 1000000 #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h index c8688e9ca7b..4786eb001bc 100644 --- a/include/configs/stm32h743-eval.h +++ b/include/configs/stm32h743-eval.h @@ -11,11 +11,11 @@ #include /* For booting Linux, use the first 16MB of memory */ -#define CONFIG_SYS_BOOTMAPSZ SZ_16M +#define CFG_SYS_BOOTMAPSZ SZ_16M -#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CFG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_HZ_CLOCK 1000000 +#define CFG_SYS_HZ_CLOCK 1000000 #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32h750-art-pi.h b/include/configs/stm32h750-art-pi.h index f7fa8c51d8e..e667fe6f6ac 100644 --- a/include/configs/stm32h750-art-pi.h +++ b/include/configs/stm32h750-art-pi.h @@ -11,11 +11,11 @@ #include /* For booting Linux, use the first 16MB of memory */ -#define CONFIG_SYS_BOOTMAPSZ (SZ_16M + SZ_8M) +#define CFG_SYS_BOOTMAPSZ (SZ_16M + SZ_8M) -#define CONFIG_SYS_FLASH_BASE 0x90000000 +#define CFG_SYS_FLASH_BASE 0x90000000 -#define CONFIG_SYS_HZ_CLOCK 1000000 +#define CFG_SYS_HZ_CLOCK 1000000 #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index d7111493142..c259a616133 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -19,7 +19,7 @@ * For booting Linux, use the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ SZ_256M +#define CFG_SYS_BOOTMAPSZ SZ_256M /* NAND support */ diff --git a/include/configs/stm32mp13_st_common.h b/include/configs/stm32mp13_st_common.h index c51022b40d2..ad8126f6103 100644 --- a/include/configs/stm32mp13_st_common.h +++ b/include/configs/stm32mp13_st_common.h @@ -15,7 +15,7 @@ #include /* uart with on-board st-link */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 921600, \ 1000000, 2000000, 4000000} diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index f78ce41ed85..c9cfadd9ce0 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -19,7 +19,7 @@ * For booting Linux, use the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ SZ_256M +#define CFG_SYS_BOOTMAPSZ SZ_256M /* NAND support */ diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h index 6bdc286cfca..38b5aa7319c 100644 --- a/include/configs/stm32mp15_st_common.h +++ b/include/configs/stm32mp15_st_common.h @@ -14,7 +14,7 @@ #include /* uart with on-board st-link */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ +#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 921600, \ 1000000, 2000000 } diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 234327e017b..faff8d6ed6d 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -10,7 +10,7 @@ #define CONFIG_HOSTNAME "stmark2" -#define CONFIG_SYS_UART_PORT 0 +#define CFG_SYS_UART_PORT 0 #define LDS_BOARD_TEXT \ board/sysam/stmark2/sbf_dram_init.o (.text*) @@ -34,24 +34,24 @@ "sf write ${loadaddr} 0x00800000 ${filesize}\0" \ "" -#define CONFIG_SYS_SBFHDR_SIZE 0x7 +#define CFG_SYS_SBFHDR_SIZE 0x7 /* Input, PCI, Flexbus, and VCO */ #define CONFIG_PRAM 2048 /* 2048 KB */ -#define CONFIG_SYS_MBAR 0xFC000000 +#define CFG_SYS_MBAR 0xFC000000 /* * Definitions for initial stack pointer and data area (in internal SRAM) */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 +#define CFG_SYS_INIT_RAM_ADDR 0x80000000 /* End of used area in internal SRAM */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 -#define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_INIT_SP_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \ +#define CFG_SYS_INIT_RAM_SIZE 0x10000 +#define CFG_SYS_INIT_RAM_CTRL 0x221 +#define CFG_SYS_INIT_SP_OFFSET ((CFG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) - 32) -#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) +#define CFG_SYS_SBFHDR_DATA_OFFSET (CFG_SYS_INIT_RAM_SIZE - 32) /* * Start addresses for the final memory configuration @@ -61,7 +61,7 @@ #define CFG_SYS_SDRAM_BASE 0x40000000 #define CFG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ -#define CONFIG_SYS_DRAM_TEST +#define CFG_SYS_DRAM_TEST #if defined(CONFIG_CF_SBF) #define CONFIG_SERIAL_BOOT @@ -75,7 +75,7 @@ * the maximum mapped by the Linux kernel during initialization ?? */ /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ +#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ (CFG_SYS_SDRAM_SIZE << 20)) /* Configuration for environment @@ -83,22 +83,22 @@ */ /* Cache Configuration */ -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) -#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) -#define CONFIG_SYS_CACHE_ACR2 (CFG_SYS_SDRAM_BASE | \ +#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 8) +#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 4) +#define CFG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) +#define CFG_SYS_DCACHE_INV (CF_CACR_DCINVA) +#define CFG_SYS_CACHE_ACR2 (CFG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \ +#define CFG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \ CF_CACR_ICINVA | CF_CACR_EUSP) -#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \ +#define CFG_SYS_CACHE_DCACR ((CFG_SYS_CACHE_ICACR | \ CF_CACR_DEC | CF_CACR_DDCM_P | \ CF_CACR_DCINVA) & ~CF_CACR_ICINVA) -#define CACR_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 12) +#define CACR_STATUS (CFG_SYS_INIT_RAM_ADDR + \ + CFG_SYS_INIT_RAM_SIZE - 12) #endif /* __STMARK2_CONFIG_H */ diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index b2dcb6058b1..7eadb6d421e 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_STV0991_H #define __CONFIG_STV0991_H -#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH +#define CFG_SYS_EXCEPTION_VECTORS_HIGH /* ram memory-related information */ #define PHYS_SDRAM_1 0x00000000 @@ -16,8 +16,8 @@ /* user interface */ /* MISC */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 -#define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 +#define CFG_SYS_INIT_RAM_SIZE 0x8000 +#define CFG_SYS_INIT_RAM_ADDR 0x00190000 /* U-Boot Load Address */ /* Misc configuration */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index e1a66f53ff5..1677aafad03 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -62,9 +62,9 @@ * is known yet. * H6 has SRAM A1 at 0x00020000. */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS +#define CFG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS /* FIXME: this may be larger on some SoCs */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ +#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ #define PHYS_SDRAM_0 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index daa9bbec88a..69926890010 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -6,7 +6,7 @@ #define __CONFIG_H /* Timers for fasp(TIMCLK) */ -#define CONFIG_SYS_TIMERBASE 0x31080000 /* AP Timer 1 (ARM-SP804) */ +#define CFG_SYS_TIMERBASE 0x31080000 /* AP Timer 1 (ARM-SP804) */ /* * SDRAM (for initialize) @@ -28,7 +28,7 @@ */ /* RTC */ -#define CONFIG_SYS_I2C_RTC_ADDR 0x51 +#define CFG_SYS_I2C_RTC_ADDR 0x51 /* Serial (pl011) */ #define UART_CLK (62500000) @@ -36,8 +36,8 @@ #define CONFIG_PL01x_PORTS {(void *)(0x2a400000)} /* Support MTD */ -#define CONFIG_SYS_FLASH_BASE (0x08000000) -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE} +#define CFG_SYS_FLASH_BASE (0x08000000) +#define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE} /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 1aba986e1e6..baaf94e2dd5 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -29,8 +29,8 @@ */ /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ +#define CFG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ /* Misc CPU related */ @@ -49,8 +49,8 @@ * leaving the correct space for initial global data structure above * that address while providing maximum stack area below. */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 +#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -136,11 +136,11 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } -#define CONFIG_SYS_MASTER_CLOCK 132096000 +#define CFG_SYS_MASTER_CLOCK 132096000 #define AT91_PLL_LOCK_TIMEOUT 1000000 -#define CONFIG_SYS_AT91_PLLA 0x202A3F01 -#define CONFIG_SYS_MCKR 0x1300 -#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) -#define CONFIG_SYS_AT91_PLLB 0x10193F05 +#define CFG_SYS_AT91_PLLA 0x202A3F01 +#define CFG_SYS_MCKR 0x1300 +#define CFG_SYS_MCKR_CSS (0x02 | CFG_SYS_MCKR) +#define CFG_SYS_AT91_PLLB 0x10193F05 #endif diff --git a/include/configs/tb100.h b/include/configs/tb100.h index cd1309b3b88..1318f5e5ee4 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -12,8 +12,8 @@ * Memory configuration */ -#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE SZ_128M /* diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 2d8bde1cee8..f6544f6226c 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -15,10 +15,10 @@ /* Physical Memory Map */ #define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_BOOTMAPSZ 0x10000000 +#define CFG_SYS_BOOTMAPSZ 0x10000000 /* Framebuffer */ #define CONFIG_IMX_HDMI diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 7e764b0000b..66cf7ae5847 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -17,8 +17,8 @@ /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */ #ifndef CONFIG_ARM64 -#define CONFIG_SYS_TIMER_RATE 1000000 -#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE +#define CFG_SYS_TIMER_RATE 1000000 +#define CFG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE #endif /* Environment */ @@ -42,11 +42,11 @@ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ +#define CFG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ #ifndef CONFIG_ARM64 -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE -#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN +#define CFG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE +#define CFG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN /* Defines for SPL */ #endif diff --git a/include/configs/ten64.h b/include/configs/ten64.h index 04772c9e4ef..57724719a9d 100644 --- a/include/configs/ten64.h +++ b/include/configs/ten64.h @@ -10,7 +10,7 @@ #include "ls1088a_common.h" -#define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 +#define CFG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd" #define SD_BOOTCOMMAND "run distro_bootcmd" diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 1f60b9b4979..7becf1eb7cb 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -8,7 +8,7 @@ #define MEM_BASE 0x00500000 -#define CONFIG_SYS_LOWMEM_BASE MEM_BASE +#define CFG_SYS_LOWMEM_BASE MEM_BASE /* Link Definitions */ @@ -22,8 +22,8 @@ /* Generic Interrupt Controller Definitions */ #define GICD_BASE (0x801000000000) #define GICR_BASE (0x801000002000) -#define CONFIG_SYS_SERIAL0 0x87e024000000 -#define CONFIG_SYS_SERIAL1 0x87e025000000 +#define CFG_SYS_SERIAL0 0x87e024000000 +#define CFG_SYS_SERIAL1 0x87e025000000 /* Miscellaneous configurable options */ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index e5b23d2a54c..03849adb5ab 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -74,7 +74,7 @@ /** * Platform/Board specific defs */ -#define CONFIG_SYS_TIMERBASE 0x4802E000 +#define CFG_SYS_TIMERBASE 0x4802E000 /* NS16550 Configuration */ #define CFG_SYS_NS16550_CLK (48000000) diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 4a7c3d5b449..7b04292d218 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -25,7 +25,7 @@ /** * Platform/Board specific defs */ -#define CONFIG_SYS_TIMERBASE 0x4802E000 +#define CFG_SYS_TIMERBASE 0x4802E000 /* * NS16550 Configuration diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 00eb329faa8..ed17b429209 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -12,7 +12,7 @@ #define __CONFIG_TI_AM335X_COMMON_H__ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ -#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ +#define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 65abb187d96..ea45bba409c 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -14,7 +14,7 @@ /* SoC Configuration */ /* Memory Configuration */ -#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000 +#define CFG_SYS_LPAE_SDRAM_BASE 0x800000000 #define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ #ifdef CONFIG_SYS_MALLOC_F_LEN @@ -44,7 +44,7 @@ #endif /* SPI Configuration */ -#define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) +#define CFG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) /* Keystone net */ #define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR @@ -176,9 +176,9 @@ #include #include #ifndef CONFIG_SOC_K2G -#define CONFIG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6) +#define CFG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6) #else -#define CONFIG_SYS_HZ_CLOCK get_external_clk(sys_clk) +#define CFG_SYS_HZ_CLOCK get_external_clk(sys_clk) #endif #endif /* __CONFIG_KS2_EVM_H */ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index d282c3956e0..36a05b6896e 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -27,7 +27,7 @@ /* NS16550 Configuration */ #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ #define CFG_SYS_NS16550_CLK V_NS16550_CLK -#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ +#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \ 115200} /* Select serial console configuration */ @@ -46,7 +46,7 @@ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). * This rate is divided by a local divisor. */ -#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) +#define CFG_SYS_TIMERBASE (OMAP34XX_GPT2) /* SPL */ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index ce50e35d8d4..9a068e26140 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -12,7 +12,7 @@ #define __CONFIG_TI_OMAP4_COMMON_H #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_PL310_BASE 0x48242000 +#define CFG_SYS_PL310_BASE 0x48242000 #endif /* Get CPU defs */ @@ -20,7 +20,7 @@ #include /* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT2_BASE +#define CFG_SYS_TIMERBASE GPT2_BASE #include diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index c49c177390b..37ab2e44672 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -17,7 +17,7 @@ #define __CONFIG_TI_OMAP5_COMMON_H /* Use General purpose timer 1 */ -#define CONFIG_SYS_TIMERBASE GPT2_BASE +#define CFG_SYS_TIMERBASE GPT2_BASE #include diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index a609aa3a2aa..0f28690612a 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -41,6 +41,6 @@ * Else boot FIT image. */ -#define CONFIG_SYS_FLASH_BASE 0x0C000000 +#define CFG_SYS_FLASH_BASE 0x0C000000 #endif /* __TOTAL_COMPUTE_H */ diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 13789819917..24943c8dcfb 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -8,8 +8,8 @@ #define CFG_SYS_SDRAM_BASE 0xa0000000 -#define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 +#define CFG_SYS_INIT_RAM_ADDR 0xbd000000 +#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* * Serial Port diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index f8e3a2d017a..9c3454add46 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -269,8 +269,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* * All the defines above are for the TQMa6 SoM diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 999130600cc..ce897fcd932 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -17,8 +17,8 @@ /* Config on-board RTC */ #define CONFIG_RTC_DS1337 -#define CONFIG_SYS_RTC_BUS_NUM 2 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CFG_SYS_RTC_BUS_NUM 2 +#define CFG_SYS_I2C_RTC_ADDR 0x68 /* Turn off RTC square-wave output to save battery */ #define CONFIG_RTC_DS1337_NOOSC diff --git a/include/configs/trats.h b/include/configs/trats.h index 23dcf20c1f4..5bd0ca2a964 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -12,7 +12,7 @@ #include #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_PL310_BASE 0x10502000 +#define CFG_SYS_PL310_BASE 0x10502000 #endif /* TRATS has 4 banks of DRAM */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 9c6433ccfd8..cef563696bd 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -13,7 +13,7 @@ #include #ifndef CONFIG_SYS_L2CACHE_OFF -#define CONFIG_SYS_PL310_BASE 0x10502000 +#define CFG_SYS_PL310_BASE 0x10502000 #endif /* TRATS2 has 4 banks of DRAM */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 4ca8eafc914..fdb420ed874 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -9,7 +9,7 @@ #define _CONFIG_TURRIS_MOX_H #define CFG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ +#define CFG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ 921600, 1000000, 1152000, 1500000, \ diff --git a/include/configs/udoo.h b/include/configs/udoo.h index c1e80b44c85..fac8c1eeb4e 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -50,8 +50,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index f73092661a1..0e0d5b5b3e4 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -58,8 +58,8 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* PMIC */ #define CONFIG_POWER_PFUZE3000 diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index a977271c1e6..ab199bc726a 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -14,7 +14,7 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } -#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } +#define CFG_SYS_WRITE_SWAPPED_DATA #endif /* __ULCB_H */ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index a57ecffd596..8cd81f1cddd 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -37,7 +37,7 @@ #if !defined(CONFIG_ARM64) /* Time clock 1MHz */ -#define CONFIG_SYS_TIMER_RATE 1000000 +#define CFG_SYS_TIMER_RATE 1000000 #endif #define CFG_SYS_NAND_REGS_BASE 0x68100000 @@ -162,11 +162,11 @@ LINUXBOOT_ENV_SETTINGS \ BOOTENV -#define CONFIG_SYS_BOOTMAPSZ 0x20000000 +#define CFG_SYS_BOOTMAPSZ 0x20000000 /* only for SPL */ /* subtract sizeof(struct legacy_img_hdr) */ -#define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40) +#define CFG_SYS_UBOOT_BASE (0x130000 - 0x40) #endif /* __CONFIG_UNIPHIER_H__ */ diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index d2fd23e1d91..657dbadd339 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -17,8 +17,8 @@ #include /* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ -#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ +#define CFG_SYS_AT91_SLOW_CLOCK 32768 /* * Hardware drivers @@ -28,8 +28,8 @@ #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 #define CFG_SYS_SDRAM_SIZE 0x04000000 -#define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) -#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 +#define CFG_SYS_INIT_RAM_SIZE (16 * 1024) +#define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index e944e78603e..da68d7a0da9 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -61,7 +61,7 @@ #define PHYS_SDRAM_SIZE (gd->ram_size) #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #endif /* __CONFIG_H */ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index d9e5dfaceaf..b03159805c1 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -10,7 +10,7 @@ /* Onboard devices */ -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 #define CFG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index b209d97e5ec..18ac6b2b089 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -9,7 +9,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -53,8 +53,8 @@ "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \ "${blkcnt}; fi\0" -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_2M #if defined(CONFIG_ENV_IS_IN_MMC) /* Environment in eMMC, before config block at the end of 1st "boot sector" */ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 1b9f2ca26f6..88839a6e561 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -9,7 +9,7 @@ #include #include -#define CONFIG_SYS_UBOOT_BASE \ +#define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD @@ -65,8 +65,8 @@ "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \ "${blkcnt}; fi\0" -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE SZ_512K /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */ #define CFG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 9a46d50c6f3..30c1f5025b0 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -254,9 +254,9 @@ BOOTENV #ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CFG_SYS_FLASH_BASE 0x08000000 #else -#define CONFIG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000) +#define CFG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000) #endif #endif /* __VEXPRESS_AEMV8_H */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index de571f63ee1..e8b6acf8b8f 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -112,16 +112,16 @@ #define SCTL_BASE V2M_SYSCTL #define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0) -#define CONFIG_SYS_TIMER_RATE 1000000 -#define CONFIG_SYS_TIMER_COUNTER (V2M_TIMER01 + 0x4) +#define CFG_SYS_TIMER_RATE 1000000 +#define CFG_SYS_TIMER_COUNTER (V2M_TIMER01 + 0x4) /* PL011 Serial Configuration */ #define CONFIG_PL011_CLOCK 24000000 -#define CONFIG_PL01x_PORTS {(void *)CONFIG_SYS_SERIAL0, \ - (void *)CONFIG_SYS_SERIAL1} +#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ + (void *)CFG_SYS_SERIAL1} -#define CONFIG_SYS_SERIAL0 V2M_UART0 -#define CONFIG_SYS_SERIAL1 V2M_UART1 +#define CFG_SYS_SERIAL0 V2M_UART0 +#define CFG_SYS_SERIAL1 V2M_UART1 /* Miscellaneous configurable options */ #define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000) @@ -135,7 +135,7 @@ /* additions for new relocation code */ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Basic environment settings */ #define BOOT_TARGET_DEVICES(func) \ @@ -164,7 +164,7 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" /* FLASH and environment organization */ -#define CONFIG_SYS_FLASH_SIZE 0x04000000 +#define CFG_SYS_FLASH_SIZE 0x04000000 /* Timeout values in ticks */ @@ -177,6 +177,6 @@ */ /* Store environment at top of flash */ -#define CONFIG_SYS_FLASH_BANKS_LIST { V2M_NOR0, V2M_NOR1 } +#define CFG_SYS_FLASH_BANKS_LIST { V2M_NOR0, V2M_NOR1 } #endif /* VEXPRESS_COMMON_H */ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 7b526f725af..14e6b2bac91 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -124,7 +124,7 @@ #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #endif diff --git a/include/configs/vinco.h b/include/configs/vinco.h index df0e269b5d2..9f72bdde816 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -21,7 +21,7 @@ #define CONFIG_USART_ID 30 /* Timer */ -#define CONFIG_SYS_TIMER_COUNTER 0xfc06863c +#define CFG_SYS_TIMER_COUNTER 0xfc06863c /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x20000000 @@ -31,7 +31,7 @@ #ifdef CONFIG_CMD_MMC #define ATMEL_BASE_MMCI 0xfc000000 -#define CONFIG_SYS_MMC_CLK_OD 500000 +#define CFG_SYS_MMC_CLK_OD 500000 /* For generating MMC partitions */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 7555d97c814..ab5cd5cf636 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -24,8 +24,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 38b940d35ea..43050d61c37 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -9,14 +9,14 @@ /* RAM */ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 +#define CFG_SYS_INIT_SP_OFFSET 0x400000 /* SPL */ -#define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE +#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE /* Dummy value */ -#define CONFIG_SYS_UBOOT_BASE 0 +#define CFG_SYS_UBOOT_BASE 0 /* Serial SPL */ #define CFG_SYS_NS16550_CLK 40000000 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 3acef221327..23027b1d3d9 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -90,8 +90,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment organization */ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index cba215c379f..56c90aa1032 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -85,8 +85,8 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* environment organization */ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 32555c9b6af..065006f912c 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -42,7 +42,7 @@ */ /* driver configuration */ -#define CONFIG_SYS_MAX_NAND_CHIPS 1 +#define CFG_SYS_MAX_NAND_CHIPS 1 #define CFG_SYS_NAND_BASE MLC_NAND_BASE /* diff --git a/include/configs/x530.h b/include/configs/x530.h index a0162cab219..dee87cb7732 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -13,7 +13,7 @@ /* * NS16550 Configuration */ -#define CFG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CFG_SYS_NS16550_CLK CFG_SYS_TCLK #if !defined(CONFIG_DM_SERIAL) #define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index f76c1f8be0f..3e17b53dde2 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -30,7 +30,7 @@ * CPU Features */ -#define CONFIG_SYS_STACK_SIZE (32 * 1024) +#define CFG_SYS_STACK_SIZE (32 * 1024) /*----------------------------------------------------------------------- * Environment configuration diff --git a/include/configs/xea.h b/include/configs/xea.h index 87f628d4ab8..b432ab2dc8e 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -16,9 +16,9 @@ /* SPL */ -#define CONFIG_SYS_SPI_KERNEL_OFFS SZ_1M -#define CONFIG_SYS_SPI_ARGS_OFFS SZ_512K -#define CONFIG_SYS_SPI_ARGS_SIZE SZ_32K +#define CFG_SYS_SPI_KERNEL_OFFS SZ_1M +#define CFG_SYS_SPI_ARGS_OFFS SZ_512K +#define CFG_SYS_SPI_ARGS_SIZE SZ_32K /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 8caf5394ed4..ee3130ed327 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -15,7 +15,7 @@ #define GICR_BASE 0xF9080000 /* Serial setup */ -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } /* GUID for capsule updatable firmware image */ diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h index 0ccd38b7e69..7d77189693e 100644 --- a/include/configs/xilinx_versal_net.h +++ b/include/configs/xilinx_versal_net.h @@ -20,7 +20,7 @@ #define GICR_BASE 0xF9060000 /* Serial setup */ -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } #if defined(CONFIG_CMD_DFU) diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 60f007a10fc..efe241df97e 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -15,7 +15,7 @@ #define GICC_BASE 0xF9020000 /* Serial setup */ -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } /* GUIDs for capsule updatable firmware images */ @@ -192,9 +192,9 @@ #endif #if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) -# define CONFIG_SYS_SPI_KERNEL_OFFS 0x80000 -# define CONFIG_SYS_SPI_ARGS_OFFS 0xa0000 -# define CONFIG_SYS_SPI_ARGS_SIZE 0xa0000 +# define CFG_SYS_SPI_KERNEL_OFFS 0x80000 +# define CFG_SYS_SPI_ARGS_OFFS 0xa0000 +# define CFG_SYS_SPI_ARGS_SIZE 0xa0000 #endif /* u-boot is like dtb */ diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index b6bc402a7e9..3a7b7e03d6a 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -10,13 +10,13 @@ /* Serial drivers */ /* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} /* Boot configuration */ -#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CFG_SYS_INIT_RAM_ADDR 0xFFFF0000 +#define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Extend size of kernel image for uncompression */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 613ed959553..3e604894ad4 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -22,8 +22,8 @@ #define PHYS_SDRAM_SIZE (128 << 20) #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR -#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Environment is in stored in the eMMC boot partition */ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 8739bb24841..9201dac7abc 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -21,12 +21,12 @@ /*===================*/ #if XCHAL_HAVE_PTP_MMU -#define CONFIG_SYS_MEMORY_BASE \ +#define CFG_SYS_MEMORY_BASE \ (XCHAL_VECBASE_RESET_VADDR - XCHAL_VECBASE_RESET_PADDR) -#define CONFIG_SYS_IO_BASE 0xf0000000 +#define CFG_SYS_IO_BASE 0xf0000000 #else -#define CONFIG_SYS_MEMORY_BASE 0x60000000 -#define CONFIG_SYS_IO_BASE 0x90000000 +#define CFG_SYS_MEMORY_BASE 0x60000000 +#define CFG_SYS_IO_BASE 0x90000000 #define CONFIG_MAX_MEM_MAPPED 0x10000000 #endif @@ -100,16 +100,16 @@ */ /* FPGA core clock frequency in Hz (also input to UART) */ -#define CONFIG_SYS_FPGAREG_FREQ IOADDR(0x0D020004) /* CPU clock frequency*/ +#define CFG_SYS_FPGAREG_FREQ IOADDR(0x0D020004) /* CPU clock frequency*/ /* * DIP switch (left=sw1=lsb=bit0, right=sw8=msb=bit7; off=0, on=1): * Bits 0..5 set the lower 6 bits of the default ethernet MAC. * Bit 6 is reserved for future use by Tensilica. - * Bit 7 maps the first 128KB of ROM address space at CONFIG_SYS_ROM_BASE to + * Bit 7 maps the first 128KB of ROM address space at CFG_SYS_ROM_BASE to * the base of flash * (when on/1) or to the base of RAM (when off/0). */ -#define CONFIG_SYS_FPGAREG_DIPSW IOADDR(0x0D02000C) +#define CFG_SYS_FPGAREG_DIPSW IOADDR(0x0D02000C) #define FPGAREG_MAC_SHIFT 0 /* Ethernet MAC bits 0..5 */ #define FPGAREG_MAC_WIDTH 6 #define FPGAREG_MAC_MASK 0x3f @@ -120,8 +120,8 @@ #define FPGAREG_BOOT_FLASH (1<cspr_cs[i].cspr_ext)) diff --git a/include/i2c.h b/include/i2c.h index c07e60b04bd..51390f8fd84 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -633,10 +633,10 @@ void i2c_early_init_f(void); */ #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ -#if !defined(CONFIG_SYS_I2C_MAX_HOPS) +#if !defined(CFG_SYS_I2C_MAX_HOPS) /* no muxes used bus = i2c adapters */ #define CONFIG_SYS_I2C_DIRECT_BUS 1 -#define CONFIG_SYS_I2C_MAX_HOPS 0 +#define CFG_SYS_I2C_MAX_HOPS 0 #define CFG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) #else /* we use i2c muxes */ @@ -644,8 +644,8 @@ void i2c_early_init_f(void); #endif /* define the I2C bus number for RTC and DTT if not already done */ -#if !defined(CONFIG_SYS_RTC_BUS_NUM) -#define CONFIG_SYS_RTC_BUS_NUM 0 +#if !defined(CFG_SYS_RTC_BUS_NUM) +#define CFG_SYS_RTC_BUS_NUM 0 #endif struct i2c_adapter { @@ -705,7 +705,7 @@ struct i2c_next_hop { struct i2c_bus_hose { int adapter; - struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS]; + struct i2c_next_hop next_hop[CFG_SYS_I2C_MAX_HOPS]; }; #define I2C_NULL_HOP {{-1, ""}, 0, 0} extern struct i2c_bus_hose i2c_bus[]; @@ -931,12 +931,12 @@ unsigned int i2c_get_bus_speed(void); * completely to new multibus support. */ #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) -# if !defined(CONFIG_SYS_MAX_I2C_BUS) -# define CONFIG_SYS_MAX_I2C_BUS 2 +# if !defined(CFG_SYS_MAX_I2C_BUS) +# define CFG_SYS_MAX_I2C_BUS 2 # endif # define I2C_MULTI_BUS 1 #else -# define CONFIG_SYS_MAX_I2C_BUS 1 +# define CFG_SYS_MAX_I2C_BUS 1 # define I2C_MULTI_BUS 0 #endif diff --git a/include/mpc85xx.h b/include/mpc85xx.h index 053b68a10a4..636734dd3c6 100644 --- a/include/mpc85xx.h +++ b/include/mpc85xx.h @@ -26,38 +26,38 @@ * Define default values for some CCSR macros to make header files cleaner* * * To completely disable CCSR relocation in a board header file, define - * CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE. This will force CONFIG_SYS_CCSRBAR_PHYS - * to a value that is the same as CONFIG_SYS_CCSRBAR. + * CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE. This will force CFG_SYS_CCSRBAR_PHYS + * to a value that is the same as CFG_SYS_CCSRBAR. */ -#ifdef CONFIG_SYS_CCSRBAR_PHYS -#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly. Use \ -CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead." +#ifdef CFG_SYS_CCSRBAR_PHYS +#error "Do not define CFG_SYS_CCSRBAR_PHYS directly. Use \ +CFG_SYS_CCSRBAR_PHYS_LOW and/or CFG_SYS_CCSRBAR_PHYS_HIGH instead." #endif #if CONFIG_IS_ENABLED(SYS_CCSR_DO_NOT_RELOCATE) -#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH -#undef CONFIG_SYS_CCSRBAR_PHYS_LOW -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 +#undef CFG_SYS_CCSRBAR_PHYS_HIGH +#undef CFG_SYS_CCSRBAR_PHYS_LOW +#define CFG_SYS_CCSRBAR_PHYS_HIGH 0 #endif -#ifndef CONFIG_SYS_CCSRBAR -#define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT +#ifndef CFG_SYS_CCSRBAR +#define CFG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT #endif -#ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH +#ifndef CFG_SYS_CCSRBAR_PHYS_HIGH #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0xf +#define CFG_SYS_CCSRBAR_PHYS_HIGH 0xf #else -#define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0 +#define CFG_SYS_CCSRBAR_PHYS_HIGH 0 #endif #endif -#ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT +#ifndef CFG_SYS_CCSRBAR_PHYS_LOW +#define CFG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT #endif -#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ - CONFIG_SYS_CCSRBAR_PHYS_LOW) +#define CFG_SYS_CCSRBAR_PHYS ((CFG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ + CFG_SYS_CCSRBAR_PHYS_LOW) #endif /* __MPC85xx_H__ */ diff --git a/include/mpc86xx.h b/include/mpc86xx.h index 9fe47480325..ea8d17d557e 100644 --- a/include/mpc86xx.h +++ b/include/mpc86xx.h @@ -16,9 +16,9 @@ * platform register addresses */ -#define GUTS_SVR (CONFIG_SYS_CCSRBAR + 0xE00A4) -#define MCM_ABCR (CONFIG_SYS_CCSRBAR + 0x01000) -#define MCM_DBCR (CONFIG_SYS_CCSRBAR + 0x01008) +#define GUTS_SVR (CFG_SYS_CCSRBAR + 0xE00A4) +#define MCM_ABCR (CFG_SYS_CCSRBAR + 0x01000) +#define MCM_DBCR (CFG_SYS_CCSRBAR + 0x01008) /* * l2cr values. Look in config_.h for the actual setup diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index 1321da19102..52cd1c4dbc4 100644 --- a/include/mtd/cfi_flash.h +++ b/include/mtd/cfi_flash.h @@ -147,8 +147,8 @@ struct cfi_pri_hdr { u8 minor_version; } __attribute__((packed)); -#ifndef CONFIG_SYS_FLASH_BANKS_LIST -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#ifndef CFG_SYS_FLASH_BANKS_LIST +#define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } #endif /* diff --git a/include/mvebu_mmc.h b/include/mvebu_mmc.h index e75c3fa3289..0f6f5c23dee 100644 --- a/include/mvebu_mmc.h +++ b/include/mvebu_mmc.h @@ -21,7 +21,7 @@ #define MVEBU_MMC_CLOCKRATE_MAX 50000000 #define MVEBU_MMC_BASE_DIV_MAX 0x7ff -#define MVEBU_MMC_BASE_FAST_CLOCK CONFIG_SYS_TCLK +#define MVEBU_MMC_BASE_FAST_CLOCK CFG_SYS_TCLK #define MVEBU_MMC_BASE_FAST_CLK_100 100000000 #define MVEBU_MMC_BASE_FAST_CLK_200 200000000 diff --git a/include/post.h b/include/post.h index ec03556e917..867a66f3007 100644 --- a/include/post.h +++ b/include/post.h @@ -142,7 +142,7 @@ extern int memory_post_test(int flags); #define CONFIG_SYS_POST_RTC 0x00000001 #define CONFIG_SYS_POST_WATCHDOG 0x00000002 -#define CONFIG_SYS_POST_MEMORY 0x00000004 +#define CFG_SYS_POST_MEMORY 0x00000004 #define CONFIG_SYS_POST_CPU 0x00000008 #define CONFIG_SYS_POST_I2C 0x00000010 #define CONFIG_SYS_POST_CACHE 0x00000020 @@ -163,7 +163,7 @@ extern int memory_post_test(int flags); #define CONFIG_SYS_POST_CODEC 0x00200000 #define CONFIG_SYS_POST_COPROC 0x00400000 #define CONFIG_SYS_POST_FLASH 0x00800000 -#define CONFIG_SYS_POST_MEM_REGIONS 0x01000000 +#define CFG_SYS_POST_MEM_REGIONS 0x01000000 #endif /* CONFIG_POST */ diff --git a/include/spl.h b/include/spl.h index 3eb27de6166..fb8c279d726 100644 --- a/include/spl.h +++ b/include/spl.h @@ -470,7 +470,7 @@ void spl_set_bd(void); * spl_set_header_raw_uboot() - Set up a standard SPL image structure * * This sets up the given spl_image which the standard values obtained from - * config options: CONFIG_SYS_MONITOR_LEN, CONFIG_SYS_UBOOT_START, + * config options: CONFIG_SYS_MONITOR_LEN, CFG_SYS_UBOOT_START, * CONFIG_TEXT_BASE. * * @spl_image: Image description to set up diff --git a/include/system-constants.h b/include/system-constants.h index 07c3505e8f5..0d6b71b35a0 100644 --- a/include/system-constants.h +++ b/include/system-constants.h @@ -12,10 +12,10 @@ #define SYS_INIT_SP_ADDR CONFIG_CUSTOM_SYS_INIT_SP_ADDR #else #ifdef CONFIG_MIPS -#define SYS_INIT_SP_ADDR (CFG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET) +#define SYS_INIT_SP_ADDR (CFG_SYS_SDRAM_BASE + CFG_SYS_INIT_SP_OFFSET) #else #define SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) + (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #endif #endif diff --git a/include/tca642x.h b/include/tca642x.h index bda86c1ed88..c0a3cef5bd5 100644 --- a/include/tca642x.h +++ b/include/tca642x.h @@ -41,13 +41,13 @@ enum { #define TCA642X_DIR_IN 1 /* Default to an address that hopefully won't corrupt other i2c devices */ -#ifndef CONFIG_SYS_I2C_TCA642X_ADDR -#define CONFIG_SYS_I2C_TCA642X_ADDR (~0) +#ifndef CFG_SYS_I2C_TCA642X_ADDR +#define CFG_SYS_I2C_TCA642X_ADDR (~0) #endif /* Default to an address that hopefully won't corrupt other i2c devices */ -#ifndef CONFIG_SYS_I2C_TCA642X_BUS_NUM -#define CONFIG_SYS_I2C_TCA642X_BUS_NUM (0) +#ifndef CFG_SYS_I2C_TCA642X_BUS_NUM +#define CFG_SYS_I2C_TCA642X_BUS_NUM (0) #endif struct tca642x_bank_info { diff --git a/include/tsec.h b/include/tsec.h index 72f34851ad1..de279b21171 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -124,8 +124,8 @@ #define RCTRL_PROM 0x00000008 -#ifndef CONFIG_SYS_TBIPA_VALUE -# define CONFIG_SYS_TBIPA_VALUE 0x1f +#ifndef CFG_SYS_TBIPA_VALUE +# define CFG_SYS_TBIPA_VALUE 0x1f #endif #define MRBLR_INIT_SETTINGS PKTSIZE_ALIGN -- cgit v1.2.3 From 2a776c79dbfadeac094cd420d2d7b22937aac0c9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:09 -0500 Subject: Convert CONFIG_FSL_CADMUS to Kconfig This converts the following to Kconfig: CONFIG_FSL_CADMUS Signed-off-by: Tom Rini --- include/configs/MPC8548CDS.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index ff02c2cd847..e41b8e0843a 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -217,8 +217,6 @@ * 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7 */ -#define CONFIG_FSL_CADMUS - #define CADMUS_BASE_ADDR 0xf8000000 #ifdef CONFIG_PHYS_64BIT #define CADMUS_BASE_ADDR_PHYS 0xff8000000ull -- cgit v1.2.3 From 345c09de5e7ca2c015faaf58c1e6c6b15883a63b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:10 -0500 Subject: Convert CONFIG_FSL_DEVICE_DISABLE to Kconfig This converts the following to Kconfig: CONFIG_FSL_DEVICE_DISABLE Signed-off-by: Tom Rini --- include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/ls1021aiot.h | 2 -- include/configs/ls1021aqds.h | 2 -- include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 2 -- 5 files changed, 9 deletions(-) (limited to 'include') diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 7307c495c38..6ccb4f07e3b 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -168,7 +168,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 -#define CONFIG_FSL_DEVICE_DISABLE /* * Miscellaneous configurable options diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index b058308ecdb..3063635592e 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -95,8 +95,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 -#define CONFIG_FSL_DEVICE_DISABLE - #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ "initrd_high=0xffffffff\0" diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 5494b71e2b2..137d459c291 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -279,8 +279,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 -#define CONFIG_FSL_DEVICE_DISABLE - #ifdef CONFIG_LPUART #define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index bc9eac700e9..052a15658d7 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -70,8 +70,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 -#define CONFIG_FSL_DEVICE_DISABLE - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index f1ccb5fc084..f39c7c08844 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -160,8 +160,6 @@ #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 -#define CONFIG_FSL_DEVICE_DISABLE - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(USB, usb, 0) \ -- cgit v1.2.3 From 060613f119837fafc7c90a5dcc1aa1bf81ff319b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:11 -0500 Subject: Convert CONFIG_FSL_IIM to Kconfig This converts the following to Kconfig: CONFIG_FSL_IIM Signed-off-by: Tom Rini --- include/configs/m53menlo.h | 3 --- include/configs/mx51evk.h | 1 - include/configs/mx53ppd.h | 2 -- include/configs/usbarmory.h | 3 --- 4 files changed, 9 deletions(-) (limited to 'include') diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index f87bbf7ccf3..eca86a94519 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -80,9 +80,6 @@ #define CFG_SYS_LDB_CLOCK 33260000 #define CONFIG_IMX_VIDEO_SKIP -/* IIM Fuses */ -#define CONFIG_FSL_IIM - /* Watchdog */ /* diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 3c99b70a2bb..6d9b954587e 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -17,7 +17,6 @@ /* * Hardware drivers */ -#define CONFIG_FSL_IIM #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 7160654eb30..913bc1996d4 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -102,8 +102,6 @@ /* FLASH and environment organization */ -#define CONFIG_FSL_IIM - /* Backlight Control */ #define CONFIG_IMX6_PWM_PER_CLK 66666000 diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index da68d7a0da9..a2bc3cd23a5 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -27,9 +27,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Fuse */ -#define CONFIG_FSL_IIM - /* Linux boot */ #define CONFIG_HOSTNAME "usbarmory" -- cgit v1.2.3 From 5cafaedeac41c966b8f554182944d9dc0b531190 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:13 -0500 Subject: Convert CONFIG_FSL_SERDES to Kconfig This converts the following to Kconfig: CONFIG_FSL_SERDES Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 85c080cf27a..717320c34ae 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -160,7 +160,6 @@ #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) /* SERDES */ -#define CONFIG_FSL_SERDES #define CONFIG_FSL_SERDES1 0xe3000 #define CONFIG_FSL_SERDES2 0xe3100 -- cgit v1.2.3 From 022dc9e505ea70ea5e5c81f78a629a6016d4fd9d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:14 -0500 Subject: Convert CONFIG_HIKEY_GPIO et al to Kconfig This converts the following to Kconfig: CONFIG_HIKEY_GPIO CONFIG_TCA642X Signed-off-by: Tom Rini --- include/configs/hikey.h | 2 -- include/configs/omap5_uevm.h | 1 - 2 files changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/hikey.h b/include/configs/hikey.h index c5ef2f99b0f..eefdbd6ed11 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -32,8 +32,6 @@ #define GICD_BASE 0xf6801000 #define GICC_BASE 0xf6802000 -#define CONFIG_HIKEY_GPIO - /* Initial environment variables */ /* diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 1634db86064..d7fa2d43914 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -36,7 +36,6 @@ #define CONFIG_HSMMC2_8BIT /* Required support for the TCA642X GPIO we have on the uEVM */ -#define CONFIG_TCA642X #define CFG_SYS_I2C_TCA642X_BUS_NUM 4 #define CFG_SYS_I2C_TCA642X_ADDR 0x22 -- cgit v1.2.3 From d9feb83505b3a7c06487a1748db4f20ad189e33a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:15 -0500 Subject: Convert CONFIG_POWER_LTC3676 et al to Kconfig This converts the following to Kconfig: CONFIG_POWER_FSL CONFIG_POWER_FSL_MC13892 CONFIG_POWER_HI6553 CONFIG_POWER_LTC3676 CONFIG_POWER_PFUZE100 CONFIG_POWER_PFUZE3000 CONFIG_POWER_SPI CONFIG_POWER_TPS65090_EC CONFIG_POWER_TPS65218 CONFIG_POWER_TPS65910 Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 3 --- include/configs/am335x_sl50.h | 7 ------- include/configs/am43xx_evm.h | 8 -------- include/configs/baltos.h | 3 --- include/configs/cl-som-imx7.h | 1 - include/configs/cm_t43.h | 3 --- include/configs/el6x_common.h | 1 - include/configs/gw_ventana.h | 2 -- include/configs/hikey.h | 2 -- include/configs/imx8mq_evk.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/mx51evk.h | 2 -- include/configs/mx53loco.h | 2 -- include/configs/mx6sabreauto.h | 1 - include/configs/mx6sabresd.h | 1 - include/configs/novena.h | 1 - include/configs/peach-pi.h | 2 -- include/configs/phycore_am335x_r2.h | 2 -- include/configs/pico-imx7d.h | 1 - include/configs/tqma6.h | 1 - include/configs/udoo_neo.h | 1 - include/configs/vining_2000.h | 1 - 22 files changed, 47 deletions(-) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 69b8b048ce3..755f7fae3e4 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -165,9 +165,6 @@ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ -/* PMIC support */ -#define CONFIG_POWER_TPS65910 - #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ /* NAND: driver related configs */ diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 4af9edafca8..342a068c855 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -43,11 +43,4 @@ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ -/* PMIC support */ -#define CONFIG_POWER_TPS65910 - -/* SPL */ - -/* Network. */ - #endif /* ! __CONFIG_AM335X_SL50_H */ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index bcdff2e98ac..7659c1cc061 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -16,14 +16,6 @@ /* NS16550 Configuration */ #define CFG_SYS_NS16550_CLK 48000000 -/* I2C Configuration */ - -/* Power */ -#define CONFIG_POWER_TPS65218 -#define CONFIG_POWER_TPS62362 - -/* SPL defines. */ - /* Enabling L2 Cache */ #define CFG_SYS_PL310_BASE 0x48242000 diff --git a/include/configs/baltos.h b/include/configs/baltos.h index f29729d09ba..6f6552e6dc3 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -188,9 +188,6 @@ #define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ #define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ -/* PMIC support */ -#define CONFIG_POWER_TPS65910 - /* SPL */ #ifndef CONFIG_NOR_BOOT diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index b1f9470d9ca..4aaa52f2698 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -19,7 +19,6 @@ #define IMX_FEC_BASE ENET_IPS_BASE_ADDR /* PMIC */ -#define CONFIG_POWER_PFUZE3000 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 #define CONFIG_PCA953X diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 8ad1cfb5ded..fcc17fc6b7c 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -28,9 +28,6 @@ 42, 43, 44, 45, 46, 47, 48, 49, \ 50, 51, 52, 53, 54, 55, 56, 57, } -/* Power */ -#define CONFIG_POWER_TPS65218 - /* Enabling L2 Cache */ #define CFG_SYS_PL310_BASE 0x48242000 diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 141f9913e63..89e071c0df6 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -17,7 +17,6 @@ #define CFG_SYS_FSL_USDHC_NUM 2 /* PMIC */ -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 /* Commands */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index b855bbc25fb..65283afd2a0 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -30,9 +30,7 @@ /* * PMIC */ -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 -#define CONFIG_POWER_LTC3676 #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c /* Various command support */ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index eefdbd6ed11..d4280decc9f 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -13,8 +13,6 @@ #include -#define CONFIG_POWER_HI6553 - /* Physical Memory Map */ /* CONFIG_TEXT_BASE needs to align with where ATF loads bl33.bin */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index aa29e7884f9..688c0bf7008 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -18,7 +18,6 @@ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 #endif diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 2abcb849a28..17c63d83410 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -20,7 +20,6 @@ /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 #endif diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 6d9b954587e..d9d76d7c08d 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -21,8 +21,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* PMIC Controller */ -#define CONFIG_POWER_SPI -#define CONFIG_POWER_FSL #define CONFIG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index b52e70c95a0..d0107fcc8cb 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -22,8 +22,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* PMIC Controller */ -#define CONFIG_POWER_FSL -#define CONFIG_POWER_FSL_MC13892 #define CFG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 #define CFG_SYS_FSL_PMIC_I2C_ADDR 0x8 diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 1a2160cce59..f5f95a1bd1c 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -37,7 +37,6 @@ /* DMA stuff, needed for GPMI/MXS NAND support */ /* PMIC */ -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 #endif /* __MX6SABREAUTO_CONFIG_H */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 0d06b6dc467..78a554d0ccb 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -25,7 +25,6 @@ #endif /* PMIC */ -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 /* USB Configs */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 6f588f99c34..16a89b97b06 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -50,7 +50,6 @@ #endif /* PMIC */ -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 /* UART */ diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index bfc0011fbf9..fb6eb572cfa 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -22,8 +22,6 @@ #define CFG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_POWER_TPS65090_EC - /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index 43a60825b57..f922491637d 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -79,8 +79,6 @@ #define V_OSCK 25000000 /* Clock output from T2 */ #define V_SCLK V_OSCK -#define CONFIG_POWER_TPS65910 - #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ /* NAND: driver related configs */ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 7028264d722..83907b06ebb 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -98,7 +98,6 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* PMIC */ -#define CONFIG_POWER_PFUZE3000 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 /* FLASH and environment organization */ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 9c3454add46..7a1ad9544a3 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -31,7 +31,6 @@ #define CONFIG_I2C_MULTI_BUS #if !defined(CONFIG_DM_PMIC) -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 #define TQMA6_PFUZE100_I2C_BUS 2 #endif diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 0e0d5b5b3e4..d4c92233aca 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -62,7 +62,6 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* PMIC */ -#define CONFIG_POWER_PFUZE3000 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 #define PFUZE3000_I2C_BUS 0 diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index ab5cd5cf636..1a71b300fc5 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -31,7 +31,6 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* PMIC */ -#define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 /* Network */ -- cgit v1.2.3 From 19b4040df03813ffeb3af77d4f44b1b08013bf77 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:16 -0500 Subject: Convert CONFIG_HWCONFIG to Kconfig This converts the following to Kconfig: CONFIG_HWCONFIG Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 2 -- include/configs/MPC8548CDS.h | 2 -- include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 2 -- include/configs/T102xRDB.h | 2 -- include/configs/T104xRDB.h | 2 -- include/configs/T208xQDS.h | 2 -- include/configs/T208xRDB.h | 2 -- include/configs/T4240RDB.h | 2 -- include/configs/da850evm.h | 1 - include/configs/gw_ventana.h | 1 - include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/kmcent2.h | 2 -- include/configs/legoev3.h | 1 - include/configs/ls1012a_common.h | 1 - include/configs/ls1021aiot.h | 1 - include/configs/ls1021aqds.h | 1 - include/configs/ls1021atsn.h | 1 - include/configs/ls1021atwr.h | 1 - include/configs/ls1028a_common.h | 1 - include/configs/ls1043a_common.h | 1 - include/configs/ls1046a_common.h | 1 - include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 1 - include/configs/lx2160a_common.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/qemu-ppce500.h | 2 -- 27 files changed, 37 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 717320c34ae..2796adbdcd8 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -14,8 +14,6 @@ * High Level Configuration Options */ -#define CONFIG_HWCONFIG - /* * On-board devices */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index e41b8e0843a..75ac2695707 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -122,8 +122,6 @@ #define CFG_SYS_FLASH_BANKS_LIST \ {CFG_SYS_FLASH_BASE_PHYS + 0x800000, CFG_SYS_FLASH_BASE_PHYS} -#define CONFIG_HWCONFIG /* enable hwconfig */ - /* * SDRAM on the Local Bus */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index a8af0a101c8..0a1b932e94e 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -96,7 +96,6 @@ #endif #endif -#define CONFIG_HWCONFIG /* * These can be toggled for performance analysis, otherwise use default. */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 1e02855fefd..acbd43419f2 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -132,8 +132,6 @@ #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_HWCONFIG - /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index b5fb0a9b529..e394237daf0 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -270,8 +270,6 @@ #define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif -#define CONFIG_HWCONFIG - /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index bee4b704a24..f681a218229 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -248,8 +248,6 @@ #define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif -#define CONFIG_HWCONFIG - /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index be8c30db26a..a93e05dd4d2 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -246,8 +246,6 @@ #define CFG_SYS_CS2_FTIM3 CFG_SYS_NAND_FTIM3 #endif -#define CONFIG_HWCONFIG - /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 795873f4233..cf65a0da188 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -211,8 +211,6 @@ #define CFG_SYS_CS1_FTIM3 CFG_SYS_NAND_FTIM3 #endif -#define CONFIG_HWCONFIG - /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index ffd56454939..b51762264ad 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -70,8 +70,6 @@ #define CFG_SYS_FLASH_BASE 0xe0000000 #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) -#define CONFIG_HWCONFIG - /* define to use L1 as initial stack */ #define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 578277fc75c..a818a4b39f8 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -137,7 +137,6 @@ * Linux Information */ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_HWCONFIG /* enable hwconfig */ #define DEFAULT_LINUX_BOOT_ENV \ "loadaddr=0xc0700000\0" \ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 65283afd2a0..6c5ca0a5205 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -45,7 +45,6 @@ #define CONFIG_IMX_VIDEO_SKIP /* Miscellaneous configurable options */ -#define CONFIG_HWCONFIG /* Memory configuration */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 6ccb4f07e3b..bbd2b36c45a 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -166,7 +166,6 @@ #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 /* diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index e152714b116..89c5a24ee90 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -309,8 +309,6 @@ #define CFG_SYS_CS2_FTIM2 SYS_QRIO_FTIM2 #define CFG_SYS_CS2_FTIM3 SYS_QRIO_FTIM3 -#define CONFIG_HWCONFIG - /* define to use L1 as initial stack */ #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 2664982715f..abe470fe890 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -48,7 +48,6 @@ * Linux Information */ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_HWCONFIG /* enable hwconfig */ #define CONFIG_SETUP_INITRD_TAG #define CONFIG_EXTRA_ENV_SETTINGS \ "bootenvfile=uEnv.txt\0" \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 7598e54ed2b..9e4f949016e 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -24,7 +24,6 @@ #define CFG_SYS_NS16550_CLK (get_serial_clock()) -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 3063635592e..a9680149807 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -92,7 +92,6 @@ #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 137d459c291..34d4c2fdecc 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -276,7 +276,6 @@ #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 #ifdef CONFIG_LPUART diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 052a15658d7..a5b7364435d 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -67,7 +67,6 @@ /* PCIe */ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index f39c7c08844..059941e713a 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -157,7 +157,6 @@ #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 256 #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index bdd3951e85f..b190bfe9c8e 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -34,7 +34,6 @@ /* Physical Memory Map */ -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index b4048744b1e..a3fa92d1ff4 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -110,7 +110,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 #ifndef SPL_NO_MISC diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index cac30e4679e..4ed5481c3e7 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -74,7 +74,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index bacc84f629a..57429d4bbe3 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -114,7 +114,6 @@ unsigned long long get_qixis_addr(void); /* Physical Memory Map */ -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 #ifndef SPL_NO_ENV diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 18defd5e5a6..e82456fd814 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -107,7 +107,6 @@ unsigned long long get_qixis_addr(void); /* Physical Memory Map */ /* fixme: these need to be checked against the board */ -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 /* Initial environment variables */ diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index bbee9df404a..ff85d966e66 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -84,7 +84,6 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) -#define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 /* Initial environment variables */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index e8b752785b4..eda2d43d0c1 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -112,7 +112,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#define CONFIG_HWCONFIG /* * These can be toggled for performance analysis, otherwise use default. */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index aa9cae017d9..d1b20da24a8 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -33,8 +33,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -#define CONFIG_HWCONFIG - #define CFG_SYS_INIT_RAM_ADDR 0x00100000 #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0 #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000 -- cgit v1.2.3 From 4eea76574062e9079b6a267229962d6ec0be910a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:18 -0500 Subject: pwm: imx: Remove unused references to CONFIG_IMX6_PWM_PER_CLK On platforms that use DM_PWM, we do not need to define this value anymore, so remove it from config files. Signed-off-by: Tom Rini --- include/configs/aristainetos2.h | 2 -- include/configs/ge_b1x5v2.h | 3 --- include/configs/ge_bx50v3.h | 2 -- include/configs/mx53ppd.h | 3 --- 4 files changed, 10 deletions(-) (limited to 'include') diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index c1eec5d06cc..b1ec8ef269c 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -424,8 +424,6 @@ /* check this console not needed, after test remove it */ #define CONFIG_IMX_VIDEO_SKIP -#define CONFIG_IMX6_PWM_PER_CLK 66000000 - #define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mw,serial#:sw,board_type:sw," \ "sysnum:dw,panel:sw,ipaddr:iw,serverip:iw" diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 97fe76cfa8e..a8a6229f526 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -12,9 +12,6 @@ #include "mx6_common.h" -/* PWM */ -#define CONFIG_IMX6_PWM_PER_CLK 66000000 - /* UART */ #define CONFIG_MXC_UART_BASE UART3_BASE diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index cbaf03c2a22..705cb763a66 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -106,6 +106,4 @@ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP -#define CONFIG_IMX6_PWM_PER_CLK 66000000 - #endif /* __GE_BX50V3_CONFIG_H */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 913bc1996d4..963dd92dd70 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -102,9 +102,6 @@ /* FLASH and environment organization */ -/* Backlight Control */ -#define CONFIG_IMX6_PWM_PER_CLK 66666000 - #define CONFIG_IMX_VIDEO_SKIP #endif /* __CONFIG_H */ -- cgit v1.2.3 From 0ea156ba00f34b3b9c8735d25c8ec7b8dffffb45 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:19 -0500 Subject: Convert CONFIG_IMX_VIDEO_SKIP et al to Kconfig This converts the following to Kconfig: CONFIG_IMX_VIDEO_SKIP CONFIG_IMX_HDMI Signed-off-by: Tom Rini --- include/configs/apalis_imx6.h | 2 -- include/configs/aristainetos2.h | 4 ---- include/configs/cm_fx6.h | 3 --- include/configs/colibri_imx6.h | 4 ---- include/configs/embestmx6boards.h | 4 ---- include/configs/ge_b1x5v2.h | 3 --- include/configs/ge_bx50v3.h | 4 ---- include/configs/gw_ventana.h | 4 ---- include/configs/imx6-engicam.h | 10 ---------- include/configs/m53menlo.h | 1 - include/configs/mx53cx9020.h | 3 --- include/configs/mx53ppd.h | 2 -- include/configs/mx6cuboxi.h | 4 ---- include/configs/mx6sabre_common.h | 4 ---- include/configs/nitrogen6x.h | 4 ---- include/configs/novena.h | 4 ---- include/configs/pico-imx6.h | 4 ---- include/configs/tbs2910.h | 4 ---- include/configs/wandboard.h | 4 ---- 19 files changed, 72 deletions(-) (limited to 'include') diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index c9375b4d162..a3c86545f07 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -32,8 +32,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP /* Command definition */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index b1ec8ef269c..6faf544d21b 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -420,10 +420,6 @@ /* UBI support */ -/* Framebuffer */ -/* check this console not needed, after test remove it */ -#define CONFIG_IMX_VIDEO_SKIP - #define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mw,serial#:sw,board_type:sw," \ "sysnum:dw,panel:sw,ipaddr:iw,serverip:iw" diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index d5c03957975..9df8baa8a96 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -143,9 +143,6 @@ /* misc */ -/* Display */ -#define CONFIG_IMX_HDMI - /* EEPROM */ #endif /* __CONFIG_CM_FX6_H */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index c6a79debd6b..60a3862a4d1 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -28,10 +28,6 @@ /* Client */ #define CONFIG_USBD_HS -/* Framebuffer and LCD */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - /* Command definition */ #undef CONFIG_IPADDR diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 29b7748e786..22e0fa5aabf 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -43,10 +43,6 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #endif -/* Framebuffer */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - #include "mx6_common.h" /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index a8a6229f526..1458b187de2 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -28,9 +28,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USBD_HS -/* Video */ -#define CONFIG_IMX_VIDEO_SKIP - /* Memory */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 705cb763a66..f62b8f175e1 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -102,8 +102,4 @@ #define CFG_SYS_FSL_USDHC_NUM 3 -/* Framebuffer */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - #endif /* __GE_BX50V3_CONFIG_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 6c5ca0a5205..4d0a78c6269 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -40,10 +40,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USBD_HS -/* Framebuffer and LCD */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - /* Miscellaneous configurable options */ /* Memory configuration */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 1f30798550c..36b6b95b84d 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -132,14 +132,4 @@ /* MTD device */ #endif -/* Falcon Mode */ -#ifdef CONFIG_SPL_OS_BOOT -/* MMC support: args@1MB kernel@2MB */ -#endif - -/* Framebuffer */ -#ifdef CONFIG_VIDEO_IPUV3 -# define CONFIG_IMX_VIDEO_SKIP -#endif - #endif /* __IMX6_ENGICAM_CONFIG_H */ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index eca86a94519..66591390d90 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -78,7 +78,6 @@ /* LVDS display */ #define CFG_SYS_LDB_CLOCK 33260000 -#define CONFIG_IMX_VIDEO_SKIP /* Watchdog */ diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 2bc462cc37e..cd806cb698e 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -66,7 +66,4 @@ /* environment organization */ -/* Framebuffer and LCD */ -#define CONFIG_IMX_VIDEO_SKIP - #endif /* __CONFIG_H */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 963dd92dd70..9464d6e44ae 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -102,6 +102,4 @@ /* FLASH and environment organization */ -#define CONFIG_IMX_VIDEO_SKIP - #endif /* __CONFIG_H */ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 12741c08de5..f7f209c20b5 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -14,10 +14,6 @@ /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -/* Framebuffer */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 5e95e430c49..6294fd1e2c4 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -145,10 +145,6 @@ /* Environment organization */ -/* Framebuffer */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - #define CONFIG_USBD_HS #endif /* __MX6QSABRE_COMMON_CONFIG_H */ diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index dd7f9513199..5020b3bb71d 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -26,10 +26,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Framebuffer and LCD */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - #ifdef CONFIG_CMD_MMC #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) #else diff --git a/include/configs/novena.h b/include/configs/novena.h index 16a89b97b06..4e46dfc526c 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -63,10 +63,6 @@ #define CONFIG_USBD_HS #endif -/* Video output */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - /* Extra U-Boot environment. */ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 9e6c210c40b..6d7873daa0a 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -100,8 +100,4 @@ /* Ethernet Configuration */ #define CONFIG_FEC_MXC_PHYADDR 1 -/* Framebuffer */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - #endif /* __CONFIG_H * */ diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index f6544f6226c..fcc96749422 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -20,10 +20,6 @@ #define CFG_SYS_BOOTMAPSZ 0x10000000 -/* Framebuffer */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - /* PCI */ #ifdef CONFIG_CMD_PCI #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 23027b1d3d9..6923009d459 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -20,10 +20,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Framebuffer */ -#define CONFIG_IMX_HDMI -#define CONFIG_IMX_VIDEO_SKIP - #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc0\0" \ "splashpos=m,m\0" \ -- cgit v1.2.3 From 500dfebf22cbf0adbef02b80c75a93892ee861ec Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:20 -0500 Subject: mpc8548cds: Migrate CONFIG_INTERRUPTS to Kconfig Only this platform sets this option, define it in the board Kconfig file. Signed-off-by: Tom Rini --- include/configs/MPC8548CDS.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 75ac2695707..83eb18c3b7a 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -13,8 +13,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ - #ifndef __ASSEMBLY__ #include #endif -- cgit v1.2.3 From d5c77533b422eabc469e9f55d14afc3ac9ac49f6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:21 -0500 Subject: Convert CONFIG_IODELAY_RECALIBRATION to Kconfig This converts the following to Kconfig: CONFIG_IODELAY_RECALIBRATION Signed-off-by: Tom Rini --- include/configs/am57xx_evm.h | 2 -- include/configs/dra7xx_evm.h | 2 -- 2 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index 340a8ce6dc8..dacfd41cced 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -14,8 +14,6 @@ #include #include -#define CONFIG_IODELAY_RECALIBRATION - #define CFG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ #define CFG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ #define CFG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 8217712e390..ac3fcacc68e 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -13,8 +13,6 @@ #include -#define CONFIG_IODELAY_RECALIBRATION - #define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED 0x80000000 -- cgit v1.2.3 From c136a861054e698dec86f5f7b2a326ad38cd197f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:22 -0500 Subject: Convert CONFIG_IOMUX_SHARE_CONF_REG et al to Kconfig This converts the following to Kconfig: CONFIG_IOMUX_LPSR CONFIG_IOMUX_SHARE_CONF_REG Signed-off-by: Tom Rini --- include/configs/colibri-imx6ull.h | 1 - include/configs/mx6sllevk.h | 2 -- include/configs/mx6ullevk.h | 2 -- include/configs/mx7_common.h | 3 --- 4 files changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 12dc946fc78..c0c3b4e0359 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -11,7 +11,6 @@ #define __COLIBRI_IMX6ULL_CONFIG_H #include "mx6_common.h" -#define CONFIG_IOMUX_LPSR #define PHYS_SDRAM_SIZE SZ_1G diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index 6632e4ea29c..8731f6a3e4a 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -92,8 +92,6 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define CFG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_IOMUX_LPSR - /* USB Configs */ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 4154d328ded..0e986093f35 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -108,8 +108,6 @@ /* environment organization */ -#define CONFIG_IOMUX_LPSR - #ifdef CONFIG_CMD_NET #define CONFIG_FEC_ENET_DEV 1 #endif diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 4704276a74d..d5af6990107 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -17,9 +17,6 @@ #define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ -/* Enable iomux-lpsr support */ -#define CONFIG_IOMUX_LPSR - /* Miscellaneous configurable options */ /* UART */ -- cgit v1.2.3 From 68e54040ccc3c5432be720e0cc6da3489eaceef6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:23 -0500 Subject: sandbox: Move CONFIG_IO_TRACE to Kconfig This is only used on sandbox, so select it there. Cc: Simon Glass Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/sandbox.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 1081e0bbc49..1779f1894e7 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_IO_TRACE - #define CONFIG_MALLOC_F_ADDR 0x0010000 /* Size of our emulated memory */ -- cgit v1.2.3 From d5596cbc6e4d189e006f0422b162cd12e07c5b97 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:24 -0500 Subject: arm: lpc32xx: Remove unused hsuart driver This driver is not enabled in any config currently, remove it. Cc: Trevor Woerner Signed-off-by: Tom Rini --- include/dm/platform_data/lpc32xx_hsuart.h | 18 ------------------ 1 file changed, 18 deletions(-) delete mode 100644 include/dm/platform_data/lpc32xx_hsuart.h (limited to 'include') diff --git a/include/dm/platform_data/lpc32xx_hsuart.h b/include/dm/platform_data/lpc32xx_hsuart.h deleted file mode 100644 index 6f41e0e734a..00000000000 --- a/include/dm/platform_data/lpc32xx_hsuart.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2015 Vladimir Zapolskiy - */ - -#ifndef _LPC32XX_HSUART_PLAT_H -#define _LPC32XX_HSUART_PLAT_H - -/** - * struct lpc32xx_hsuart_plat - NXP LPC32xx HSUART platform data - * - * @base: Base register address - */ -struct lpc32xx_hsuart_plat { - unsigned long base; -}; - -#endif -- cgit v1.2.3 From 00faea644a0afb8eccb332af446c4ca9d0abe095 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:25 -0500 Subject: arm: ls102xa: Migrate LS102XA_STREAM_ID This symbol appears to be globally used in the architecture, select it. Signed-off-by: Tom Rini --- include/configs/km/pg-wcom-ls102xa.h | 6 ------ include/configs/ls1021aiot.h | 2 -- include/configs/ls1021aqds.h | 2 -- include/configs/ls1021atsn.h | 2 -- include/configs/ls1021atwr.h | 2 -- 5 files changed, 14 deletions(-) (limited to 'include') diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index bbd2b36c45a..c1174b87ab7 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -168,12 +168,6 @@ #define HWCONFIG_BUFFER_SIZE 256 -/* - * Miscellaneous configurable options - */ - -#define CONFIG_LS102XA_STREAM_ID - /* * Environment */ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index a9680149807..024a7185275 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -103,8 +103,6 @@ */ #define CFG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_LS102XA_STREAM_ID - #include #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 34d4c2fdecc..5a91cc3efec 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -295,8 +295,6 @@ */ #define CFG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_LS102XA_STREAM_ID - /* * Environment */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index a5b7364435d..5612c60ae90 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -140,8 +140,6 @@ /* Miscellaneous configurable options */ #define CFG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_LS102XA_STREAM_ID - /* Environment */ #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 059941e713a..3c4c207edd0 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -297,8 +297,6 @@ */ #define CFG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_LS102XA_STREAM_ID - /* * Environment */ -- cgit v1.2.3 From 4982e123b293b1fd44164b6760ee3647720d72ba Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:26 -0500 Subject: arm: samsung: Move CONFIG_MISC_COMMON to Kconfig This option controls using board/samsung/common/misc.c, so add a Kconfig file there as well and select it from the boards which use this functionality. Signed-off-by: Tom Rini Reviewed-by: Simon Glass Reviewed-by: Minkyu Kang --- include/configs/odroid.h | 6 ------ include/configs/odroid_xu3.h | 1 - include/configs/s5p_goni.h | 2 -- include/configs/s5pc210_universal.h | 3 --- include/configs/trats.h | 3 --- include/configs/trats2.h | 3 --- 6 files changed, 18 deletions(-) (limited to 'include') diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 8b00a279215..f252b349437 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -143,10 +143,4 @@ "kernel_addr_r=0x41000000\0" \ BOOTENV -/* - * Supported Odroid boards: X3, U3 - * TODO: Add Odroid X support - */ -#define CONFIG_MISC_COMMON - #endif /* __CONFIG_H */ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index d2d7fca5445..5bbe7aadcb2 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -57,7 +57,6 @@ "params.bin raw 0x1880 0x20\0" /* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */ -#define CONFIG_MISC_COMMON #define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) /* Set soc_rev, soc_id, board_rev, board_name, fdtfile */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 3d49d52b381..fdade1ee66f 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -61,8 +61,6 @@ #define COMMON_BOOT "${console} ${meminfo} ${mtdparts}" -#define CONFIG_MISC_COMMON - #define CONFIG_EXTRA_ENV_SETTINGS \ "updateb=" \ "onenand erase 0x0 0x100000;" \ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 06be9c0f652..80d3fc9258c 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -95,9 +95,6 @@ void universal_spi_sda(int bit); int universal_spi_read(void); #endif -/* Common misc for Samsung */ -#define CONFIG_MISC_COMMON - /* Download menu - definitions for check keys */ #ifndef __ASSEMBLY__ diff --git a/include/configs/trats.h b/include/configs/trats.h index 5bd0ca2a964..ec18842bbe8 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -125,9 +125,6 @@ /* GPT */ -/* Common misc for Samsung */ -#define CONFIG_MISC_COMMON - /* Download menu - definitions for check keys */ #ifndef __ASSEMBLY__ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index cef563696bd..0aa331e3935 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -115,9 +115,6 @@ /* GPT */ -/* Common misc for Samsung */ -#define CONFIG_MISC_COMMON - /* Download menu - definitions for check keys */ #ifndef __ASSEMBLY__ -- cgit v1.2.3 From 2568bd6db760b384f7c17f5afdfc1cb63b17ed53 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:27 -0500 Subject: arm: Remove unused mx27 code We no longer have any i.MX27 platforms, remove the remaining support code. Signed-off-by: Tom Rini --- include/configs/imx27lite-common.h | 134 ------------------------------------- 1 file changed, 134 deletions(-) delete mode 100644 include/configs/imx27lite-common.h (limited to 'include') diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h deleted file mode 100644 index b0abd548826..00000000000 --- a/include/configs/imx27lite-common.h +++ /dev/null @@ -1,134 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2010 Heiko Schocher - * - * based on: - * Copyright (C) 2009 Ilya Yanok - */ - -#ifndef __IMX27LITE_COMMON_CONFIG_H -#define __IMX27LITE_COMMON_CONFIG_H - -/* - * SoC Configuration - */ -#define CONFIG_MX27 -#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */ - -/* - * Lowlevel configuration - */ -#define SDRAM_ESDCFG_REGISTER_VAL(cas) \ - (ESDCFG_TRC(10) | \ - ESDCFG_TRCD(3) | \ - ESDCFG_TCAS(cas) | \ - ESDCFG_TRRD(1) | \ - ESDCFG_TRAS(5) | \ - ESDCFG_TWR | \ - ESDCFG_TMRD(2) | \ - ESDCFG_TRP(2) | \ - ESDCFG_TXP(3)) - -#define SDRAM_ESDCTL_REGISTER_VAL \ - (ESDCTL_PRCT(0) | \ - ESDCTL_BL | \ - ESDCTL_PWDT(0) | \ - ESDCTL_SREFR(3) | \ - ESDCTL_DSIZ_32 | \ - ESDCTL_COL10 | \ - ESDCTL_ROW13 | \ - ESDCTL_SDE) - -#define SDRAM_ALL_VAL 0xf00 - -#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */ -#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000 - -#define MPCTL0_VAL 0x1ef15d5 - -#define SPCTL0_VAL 0x043a1c09 - -#define CSCR_VAL 0x33f08107 - -#define PCDR0_VAL 0x120470c3 -#define PCDR1_VAL 0x03030303 -#define PCCR0_VAL 0xffffffff -#define PCCR1_VAL 0xfffffffc - -#define AIPI1_PSR0_VAL 0x20040304 -#define AIPI1_PSR1_VAL 0xdffbfcfb -#define AIPI2_PSR0_VAL 0x07ffc200 -#define AIPI2_PSR1_VAL 0xffffffff - -/* - * Memory Info - */ -/* memtest start address */ -#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */ -#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ - -/* - * Serial Driver info - */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) - -/* - * Flash & Environment - */ -/* Use buffered writes (~10x faster) */ -/* Use hardware sector protection */ -/* CS2 Base address */ -#define PHYS_FLASH_1 0xc0000000 -/* Flash Base for U-Boot */ -#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 -/* Address and size of Redundant Environment Sector */ - -/* - * Ethernet - */ -#define CONFIG_FEC_MXC_PHYADDR 0x1f - -/* - * MTD - */ - -/* - * NAND - */ -#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000 -#define CFG_SYS_NAND_BASE 0xd8000000 -#define CONFIG_MXC_NAND_HWECC - -/* - * U-Boot general configuration - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addtty=setenv bootargs ${bootargs}" \ - " console=ttymxc0,${baudrate}\0" \ - "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "addmisc=setenv bootargs ${bootargs}\0" \ - "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \ - "kernel_addr_r=a0800000\0" \ - "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ - "rootpath=/opt/eldk-4.2-arm/arm\0" \ - "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ - "run nfsargs addip addtty addmtd addmisc;" \ - "bootm\0" \ - "bootcmd=run net_nfs\0" \ - "load=tftp ${loadaddr} ${u-boot}\0" \ - "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\ - " +${filesize};cp.b ${fileaddr} " \ - __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \ - "upd=run load update\0" \ - -/* additions for new relocation code, must be added to all boards */ -#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#endif /* __IMX27LITE_COMMON_CONFIG_H */ -- cgit v1.2.3 From 6c03a652755ca415e3a1fa92525b5a8c230c9289 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:28 -0500 Subject: Convert CONFIG_MXS_OCOTP to Kconfig This converts the following to Kconfig: CONFIG_MXS_OCOTP Signed-off-by: Tom Rini --- include/configs/mxs.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 5df080ade4a..30f27e7f0c1 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -86,11 +86,6 @@ #define CFG_SYS_NAND_BASE 0x60000000 #endif -/* OCOTP */ -#ifdef CONFIG_CMD_FUSE -#define CONFIG_MXS_OCOTP -#endif - /* SPI */ #ifdef CONFIG_CMD_SPI #define CONFIG_SPI_HALF_DUPLEX -- cgit v1.2.3 From 9200011e9563c2deb71eae3c6769a92ea4e6c733 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:29 -0500 Subject: Convert CONFIG_NAND_KMETER1 et al to Kconfig This converts the following to Kconfig: CONFIG_NAND_ECC_BCH CONFIG_NAND_KIRKWOOD CONFIG_NAND_KMETER1 Signed-off-by: Tom Rini --- include/configs/km/km-mpc83xx.h | 1 - include/configs/kmcoge5ne.h | 2 -- 2 files changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index e6a3613b7a2..840a4d5401f 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -57,7 +57,6 @@ {1, {I2C_NULL_HOP} } } #if defined(CONFIG_CMD_NAND) -#define CONFIG_NAND_KMETER1 #define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE #endif diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index 2be996aaaf0..c24d6ad8bc2 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -9,8 +9,6 @@ #define __CONFIG_H #define CONFIG_HOSTNAME "kmcoge5ne" -#define CONFIG_NAND_ECC_BCH -#define CONFIG_NAND_KMETER1 #define NAND_MAX_CHIPS 1 #define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */ -- cgit v1.2.3 From c3187fb1448baf142d43fcc3d6f0e88e082050b9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:30 -0500 Subject: Convert CONFIG_PCA953X to Kconfig This converts the following to Kconfig: CONFIG_PCA953X Cc: Uri Mashiach Signed-off-by: Tom Rini --- include/configs/cl-som-imx7.h | 1 - include/configs/imx8qxp_mek.h | 4 ---- include/configs/mx6sabreauto.h | 1 - 3 files changed, 6 deletions(-) (limited to 'include') diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 4aaa52f2698..5c9004cbd93 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -21,7 +21,6 @@ /* PMIC */ #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 -#define CONFIG_PCA953X #define CFG_SYS_I2C_PCA953X_ADDR 0x20 #define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 19f1dba0470..d75b8bf0c18 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -110,10 +110,6 @@ /* LPDDR4 board total DDR is 3GB */ #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */ -#ifndef CONFIG_DM_PCA953X -#define CONFIG_PCA953X -#endif - /* Misc configuration */ #endif /* __IMX8QXP_MEK_H */ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index f5f95a1bd1c..888da7ce365 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -15,7 +15,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_PCA953X #define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } #include "mx6sabre_common.h" -- cgit v1.2.3 From ea467ea1cda0c9f6b85be34b5e1bbb6f905fa814 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:31 -0500 Subject: Convert CONFIG_RTC_DS1337 et al to Kconfig This converts the following to Kconfig: CONFIG_RTC_DS1337 CONFIG_RTC_DS1337_NOOSC CONFIG_RTC_DS1338 CONFIG_RTC_DS1374 CONFIG_RTC_DS3231 CONFIG_RTC_MC13XXX CONFIG_RTC_MXS CONFIG_RTC_PT7C4338 Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 1 - include/configs/P1010RDB.h | 1 - include/configs/T102xRDB.h | 2 -- include/configs/T104xRDB.h | 2 -- include/configs/eb_cpu5282.h | 1 - include/configs/ls1012aqds.h | 1 - include/configs/ls1046afrwy.h | 1 - include/configs/ls1088aqds.h | 1 - include/configs/ls1088ardb.h | 3 --- include/configs/ls2080aqds.h | 2 -- include/configs/ls2080ardb.h | 2 -- include/configs/lx2160a_common.h | 1 - include/configs/mx28evk.h | 5 ----- include/configs/mx51evk.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/qemu-ppce500.h | 3 --- include/configs/tqma6_wru4.h | 2 -- include/configs/work_92105.h | 2 -- 18 files changed, 32 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 2796adbdcd8..de63a0f1993 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -167,7 +167,6 @@ /* * Config on-board RTC */ -#define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */ #define CFG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ /* diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 0a1b932e94e..c0805f979be 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -341,7 +341,6 @@ extern unsigned long get_sdram_size(void); /* enable read and write access to EEPROM */ /* RTC */ -#define CONFIG_RTC_PT7C4338 #define CFG_SYS_I2C_RTC_ADDR 0x68 /* diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e394237daf0..623d4cf5562 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -311,8 +311,6 @@ /* * RTC configuration */ -#define RTC -#define CONFIG_RTC_DS1337 1 #define CFG_SYS_I2C_RTC_ADDR 0x68 /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index f681a218229..d3fd10526bd 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -285,8 +285,6 @@ /* * RTC configuration */ -#define RTC -#define CONFIG_RTC_DS1337 1 #define CFG_SYS_I2C_RTC_ADDR 0x68 /*DVI encoder*/ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 426155dbdbf..21eab9b3a47 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -150,7 +150,6 @@ */ #ifdef CONFIG_CMD_DATE -#define CONFIG_RTC_DS1338 #define CONFIG_I2C_RTC_ADDR 0x68 #endif diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index e772c019077..495bb3911b3 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -46,7 +46,6 @@ /* * RTC configuration */ -#define RTC #define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 58ae0fb0a6c..1759d25f3a3 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -66,7 +66,6 @@ #define I2C_MUX_CH_RTC 0x1 /* Channel 0*/ /* RTC */ -#define RTC #define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 0 I2C bus 0*/ #define CFG_SYS_RTC_BUS_NUM 0 diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index d84622f3225..a35045d640f 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -280,7 +280,6 @@ /* * RTC configuration */ -#define RTC #define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ #ifdef CONFIG_FSL_DSPI diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 187b3072f02..7bc4fc6a665 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -186,13 +186,10 @@ #define I2C_MUX_CH_DEFAULT 0x8 #define I2C_MUX_CH5 0xD -#ifndef SPL_NO_RTC /* * RTC configuration */ -#define RTC #define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ -#endif #ifndef SPL_NO_ENV /* Initial environment variables */ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 067587b53c5..924d4057d93 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -227,8 +227,6 @@ /* * RTC configuration */ -#define RTC -#define CONFIG_RTC_DS3231 1 #define CFG_SYS_I2C_RTC_ADDR 0x68 /* Initial environment variables */ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 32a11948723..c50b6030680 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -210,11 +210,9 @@ /* * RTC configuration */ -#define RTC #ifdef CONFIG_TARGET_LS2081ARDB #define CFG_SYS_I2C_RTC_ADDR 0x51 #else -#define CONFIG_RTC_DS3231 1 #define CFG_SYS_I2C_RTC_ADDR 0x68 #endif diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index ff85d966e66..a469c83fa4e 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -74,7 +74,6 @@ #define I2C_MUX_CH_DEFAULT 0x8 /* RTC */ -#define RTC #define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ /* Qixis */ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index bc8c8933704..c740d853327 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -17,11 +17,6 @@ /* UBI and NAND partitioning */ -/* RTC */ -#ifdef CONFIG_CMD_DATE -#define CONFIG_RTC_MXS -#endif - /* Extra Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ "ubifs_file=filesystem.ubifs\0" \ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index d9d76d7c08d..ddd37b3936f 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -26,7 +26,6 @@ #define CONFIG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CONFIG_FSL_PMIC_BITLEN 32 -#define CONFIG_RTC_MC13XXX /* * MMC Configs diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index eda2d43d0c1..c8acce8b06b 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -329,7 +329,6 @@ * I2C2 EEPROM */ -#define CONFIG_RTC_PT7C4338 #define CFG_SYS_I2C_RTC_ADDR 0x68 #define CFG_SYS_I2C_PCA9557_ADDR 0x18 diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index d1b20da24a8..30a9eae8523 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -44,9 +44,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CFG_SYS_INIT_SP_OFFSET (CFG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -/* RTC */ -#define CONFIG_RTC_PT7C4338 - /* * Miscellaneous configurable options */ diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index ce897fcd932..4d8839b6e60 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -16,11 +16,9 @@ /* Watchdog */ /* Config on-board RTC */ -#define CONFIG_RTC_DS1337 #define CFG_SYS_RTC_BUS_NUM 2 #define CFG_SYS_I2C_RTC_ADDR 0x68 /* Turn off RTC square-wave output to save battery */ -#define CONFIG_RTC_DS1337_NOOSC /* LED */ diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 065006f912c..010da1531ff 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -19,8 +19,6 @@ #define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CFG_SYS_SDRAM_SIZE SZ_128M -#define CONFIG_RTC_DS1374 - /* * U-Boot General Configurations */ -- cgit v1.2.3 From 1c34f7885d7dc109b3ffa6e2c071bf777ed917e8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:32 -0500 Subject: Convert CONFIG_SH_GPIO_PFC et al to Kconfig This converts the following to Kconfig: CONFIG_SH_GPIO_PFC CONFIG_TMU_TIMER Signed-off-by: Tom Rini --- include/configs/rcar-gen2-common.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index a86180ead57..291c2a43d4d 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -10,10 +10,6 @@ #include -#ifndef CONFIG_PINCTRL_PFC -#define CONFIG_SH_GPIO_PFC -#endif - /* console */ #define CFG_SYS_BAUDRATE_TABLE { 38400, 115200 } @@ -21,7 +17,6 @@ #define CFG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) /* Timer */ -#define CONFIG_TMU_TIMER #define CFG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */ #define CFG_SYS_TIMER_RATE (get_board_sys_clk() / 8) -- cgit v1.2.3 From d91365203c06e0fbfa329e707196e9aa51241e4c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:33 -0500 Subject: Convert CONFIG_SMSC_LPC47M et al to Kconfig This converts the following to Kconfig: CONFIG_SMSC_LPC47M CONFIG_SMSC_SIO1007 Signed-off-by: Tom Rini --- include/configs/cougarcanyon2.h | 2 -- include/configs/crownbay.h | 2 -- 2 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h index efd0b778435..b64c7df1b25 100644 --- a/include/configs/cougarcanyon2.h +++ b/include/configs/cougarcanyon2.h @@ -8,8 +8,6 @@ #include -#define CONFIG_SMSC_SIO1007 - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index e8a8af7e649..ff74deb3d40 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -12,8 +12,6 @@ #include -#define CONFIG_SMSC_LPC47M - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" -- cgit v1.2.3 From 8ce59b5932946b10d5abdd4b06577e7413bbec13 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:34 -0500 Subject: Convert CONFIG_SPD_EEPROM to Kconfig This converts the following to Kconfig: CONFIG_SPD_EEPROM Cc: Stefan Roese Signed-off-by: Tom Rini --- include/configs/MPC8548CDS.h | 1 - include/configs/db-mv784mp-gp.h | 3 --- include/configs/socrates.h | 1 - 3 files changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 83eb18c3b7a..780ee5ae865 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -30,7 +30,6 @@ #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 7b305955c96..bf8b35102ad 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -45,7 +45,4 @@ /* SPL */ /* Defines for SPL */ -/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SPD_EEPROM 0x4e - #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 0a2d5815170..95393d3ab25 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -50,7 +50,6 @@ #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef -- cgit v1.2.3 From fcd7ba655e24c736c7f3a1d12fb98f1c9c2705b6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:35 -0500 Subject: Convert CONFIG_TPS6586X_POWER et al to Kconfig This converts the following to Kconfig: CONFIG_TPS6586X_POWER CONFIG_TWL6030_POWER Signed-off-by: Tom Rini --- include/configs/seaboard.h | 1 - include/configs/ti_omap4_common.h | 3 --- 2 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 4887747968f..73b738bd099 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -12,7 +12,6 @@ /* LP0 suspend / resume */ #define CONFIG_TEGRA_LP0 #define CONFIG_TEGRA_PMU -#define CONFIG_TPS6586X_POWER #define CONFIG_TEGRA_CLOCK_SCALING #include "tegra20-common.h" diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 9a068e26140..64ec59d78eb 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -32,9 +32,6 @@ #define CFG_SYS_NS16550_COM3 UART3_BASE #endif -/* TWL6030 */ -#define CONFIG_TWL6030_POWER 1 - /* * Environment setup */ -- cgit v1.2.3 From b43295a27712c136afc68b0cf272e0356474642c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:36 -0500 Subject: Convert CONFIG_TEGRA_CLOCK_SCALING et al to Kconfig This converts the following to Kconfig: CONFIG_TEGRA_CLOCK_SCALING CONFIG_TEGRA_LP0 CONFIG_TEGRA_PMU Signed-off-by: Tom Rini --- include/configs/seaboard.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 73b738bd099..f272fe9bf8f 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -9,11 +9,6 @@ #include -/* LP0 suspend / resume */ -#define CONFIG_TEGRA_LP0 -#define CONFIG_TEGRA_PMU -#define CONFIG_TEGRA_CLOCK_SCALING - #include "tegra20-common.h" /* High-level configuration options */ -- cgit v1.2.3 From 08d01cda45d60af377e94fca05445d2fac232b8d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:37 -0500 Subject: Nokia RX-51: Migrate legacy USB device options to Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move a number of legacy USB UDC options to Kconfig, over from the config header. Cc: Pali Rohár Signed-off-by: Tom Rini --- include/configs/nokia_rx51.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'include') diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 9c364adc636..caaa9ed86b3 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -49,15 +49,6 @@ #define CFG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } -/* USB device configuration */ -#define CONFIG_USB_DEVICE -#define CONFIG_USB_TTY -#define CONFIG_USBD_VENDORID 0x0421 -#define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8 -#define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8 -#define CONFIG_USBD_MANUFACTURER "Nokia" -#define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)" - #define GPIO_SLIDE 71 /* -- cgit v1.2.3 From a9c3bce3626686efc9528c048e9296bb734d988c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:38 -0500 Subject: Convert CONFIG_USB_GADGET_AT91 to Kconfig This converts the following to Kconfig: CONFIG_USB_GADGET_AT91 Signed-off-by: Tom Rini --- include/configs/smartweb.h | 4 ---- include/configs/taurus.h | 4 ---- 2 files changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 794475942a2..b988b96e58d 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -64,10 +64,6 @@ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS -/* USB DFU support */ - -#define CONFIG_USB_GADGET_AT91 - /* DFU class support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index baaf94e2dd5..30f84255820 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -62,10 +62,6 @@ #endif #if defined(CONFIG_BOARD_TAURUS) -/* USB DFU support */ - -#define CONFIG_USB_GADGET_AT91 - /* DFU class support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 #endif -- cgit v1.2.3 From be3bea2ba33bc731dbca72576f8b30c587c2e3b3 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:39 -0500 Subject: Convert CONFIG_VSC7385_ENET et al to Kconfig This converts the following to Kconfig: CONFIG_VSC7385_ENET CONFIG_VSC9953 Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 5 ----- include/configs/T104xRDB.h | 1 - include/configs/p1_p2_rdb_pc.h | 3 --- 3 files changed, 9 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index de63a0f1993..95a90199a42 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -14,11 +14,6 @@ * High Level Configuration Options */ -/* - * On-board devices - */ -#define CONFIG_VSC7385_ENET - /* System performance - define the value i.e. CONFIG_SYS_XXX */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index d3fd10526bd..b6938056bbe 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -385,7 +385,6 @@ /* Enable VSC9953 L2 Switch driver on T1040 SoC */ #if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB) -#define CONFIG_VSC9953 #ifdef CONFIG_TARGET_T1040RDB #define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 #define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index c8acce8b06b..9738e9fa9cb 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -13,7 +13,6 @@ #include #if defined(CONFIG_TARGET_P1020RDB_PC) -#define CONFIG_VSC7385_ENET #define CONFIG_SLIC #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0x5c @@ -43,7 +42,6 @@ * 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off */ #if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_VSC7385_ENET #define CONFIG_SLIC #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0x64 @@ -63,7 +61,6 @@ #endif #if defined(CONFIG_TARGET_P2020RDB) -#define CONFIG_VSC7385_ENET #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0xc8 #define __SW_BOOT_SPI 0x28 -- cgit v1.2.3 From 17f13e7119cc628bc26edf12252794770247df63 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:42 -0500 Subject: scripts/config_whitelist.txt: Remove more referenced symbols Perform some deeper investigation on the remaining symbols listed in this file and remove more. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/P1010RDB.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index c0805f979be..b1d6b15811d 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -173,8 +173,6 @@ extern unsigned long get_sdram_size(void); #define CFG_SYS_NAND_BASE_PHYS CFG_SYS_NAND_BASE #endif -#define CONFIG_MTD_PARTITION - #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_NAND \ -- cgit v1.2.3 From d948c8988c212bc8fe94db556b7ef265d2e96452 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:43 -0500 Subject: sandbox: Rework how SDL is enabled / disabled Given that we can use Kconfig logic directly to see if we have a program available on the host or not, change from passing NO_SDL to instead controlling CONFIG_SANDBOX_SDL in Kconfig directly. Introduce CONFIG_HOST_HAS_SDL as the way to test for sdl2-config and default CONFIG_SANDBOX_SDL on if we have that, or not. Cc: Simon Glass Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/sandbox.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 1779f1894e7..8d9af7f088d 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -18,8 +18,4 @@ #define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} -#ifndef SANDBOX_NO_SDL -#define CONFIG_SANDBOX_SDL -#endif - #endif -- cgit v1.2.3 From 9cebc4ad8ebe6832c6d0eca786a85533a3b54ce4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:44 -0500 Subject: post: Migrate to Kconfig We move the existing CONFIG_POST_* functionality over to CFG_POST and then introduce CONFIG_POST to Kconfig. Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- include/configs/P2041RDB.h | 2 +- include/configs/km/pg-wcom-ls102xa.h | 4 ++-- include/configs/kmcent2.h | 2 +- include/configs/kmcoge5ne.h | 4 ++-- include/post.h | 4 ++-- include/serial.h | 4 ++-- 6 files changed, 10 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index acbd43419f2..8b901ca47a0 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -41,7 +41,7 @@ */ #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_POST CFG_SYS_POST_MEMORY /* test POST memory test */ +#define CFG_POST CFG_SYS_POST_MEMORY /* test POST memory test */ /* * Config the L3 Cache as L3 SRAM diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index c1174b87ab7..dfa81c037f4 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -25,8 +25,8 @@ #define SPD_EEPROM_ADDRESS 0x54 /* POST memory regions test */ -#define CONFIG_POST (CFG_SYS_POST_MEM_REGIONS) -#define CONFIG_POST_EXTERNAL_WORD_FUNCS +#define CFG_POST (CFG_SYS_POST_MEM_REGIONS) +#define CFG_POST_EXTERNAL_WORD_FUNCS /* * IFC Definitions diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 89c5a24ee90..527f0383bc6 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -148,7 +148,7 @@ #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E /* POST memory regions test */ -#define CONFIG_POST CFG_SYS_POST_MEM_REGIONS +#define CFG_POST CFG_SYS_POST_MEM_REGIONS /* * Config the L3 Cache as L3 SRAM diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index c24d6ad8bc2..6b30fb4b617 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -33,8 +33,8 @@ CSCONFIG_COL_BIT_10) /* enable POST tests */ -#define CONFIG_POST (CFG_SYS_POST_MEMORY|CFG_SYS_POST_MEM_REGIONS) -#define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ +#define CFG_POST (CFG_SYS_POST_MEMORY|CFG_SYS_POST_MEM_REGIONS) +#define CFG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ #define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END #define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */ #define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ diff --git a/include/post.h b/include/post.h index 867a66f3007..e68d5c89020 100644 --- a/include/post.h +++ b/include/post.h @@ -16,7 +16,7 @@ #if defined(CONFIG_POST) -#ifndef CONFIG_POST_EXTERNAL_WORD_FUNCS +#ifndef CFG_POST_EXTERNAL_WORD_FUNCS #ifdef CONFIG_SYS_POST_WORD_ADDR #define _POST_WORD_ADDR CONFIG_SYS_POST_WORD_ADDR #else @@ -51,7 +51,7 @@ static inline void post_word_store (ulong value) extern ulong post_word_load(void); extern void post_word_store(ulong value); -#endif /* CONFIG_POST_EXTERNAL_WORD_FUNCS */ +#endif /* CFG_POST_EXTERNAL_WORD_FUNCS */ #endif /* defined (CONFIG_POST) */ #endif /* __ASSEMBLY__ */ diff --git a/include/serial.h b/include/serial.h index fe01bcfadb9..f4d7dc58a9e 100644 --- a/include/serial.h +++ b/include/serial.h @@ -14,7 +14,7 @@ struct serial_device { int (*tstc)(void); void (*putc)(const char c); void (*puts)(const char *s); -#if CONFIG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CONFIG_SYS_POST_UART void (*loop)(int); #endif struct serial_device *next; @@ -242,7 +242,7 @@ struct dm_serial_ops { * @return 0 if OK, -ve on error */ int (*clear)(struct udevice *dev); -#if CONFIG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CONFIG_SYS_POST_UART /** * loop() - Control serial device loopback mode * -- cgit v1.2.3 From 7102d324f6b41741ee74587d43d77b302b1bbd96 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sat, 19 Nov 2022 18:45:45 -0500 Subject: m68k: Rename CONFIG_WATCHDOG_TIMEOUT to CONFIG_WATCHDOG_TIMEOUT_MSECS In practice, it is clear that the usage in m68k of CONFIG_WATCHDOG_TIMEOUT is setting a value in milliseconds. Rename this to the existing symbol and move to Kconfig. Signed-off-by: Tom Rini --- include/configs/M5208EVBE.h | 2 -- include/configs/M5235EVB.h | 2 -- include/configs/M5272C3.h | 2 -- include/configs/M53017EVB.h | 2 -- include/configs/M5329EVB.h | 2 -- include/configs/M5373EVB.h | 2 -- include/configs/astro_mcf5373l.h | 10 ---------- include/configs/cobra5272.h | 12 ------------ 8 files changed, 34 deletions(-) (limited to 'include') diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 246437a51e2..b360238b332 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -15,8 +15,6 @@ */ #define CFG_SYS_UART_PORT (0) -#define CONFIG_WATCHDOG_TIMEOUT 5000 - /* I2C */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 128ef50b476..ed45eccb62c 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -20,8 +20,6 @@ #define CFG_SYS_UART_PORT (0) -#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ - /* I2C */ #define CFG_SYS_I2C_PINMUX_REG (gpio->par_qspi) #define CFG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 847b4c2593d..a9339e50525 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -19,8 +19,6 @@ #define CFG_SYS_UART_PORT (0) -#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ - #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ /* Configuration for environment diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 0e9ba4c3ada..42b74aeb9b5 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -20,8 +20,6 @@ #define CFG_SYS_UART_PORT (0) -#define CONFIG_WATCHDOG_TIMEOUT 5000 - #ifdef CONFIG_MCFFEC # define CFG_SYS_TX_ETH_BUFFER 8 # define CFG_SYS_FEC_BUF_USE_SRAM diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 8f83810f165..72f0c63a1e2 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -20,8 +20,6 @@ #define CFG_SYS_UART_PORT (0) -#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ - /* I2C */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 43c642edeb1..4e8b54e01f4 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -22,8 +22,6 @@ #define CFG_SYS_UART_PORT (0) -#define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ - /* I2C */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index f5922fc416e..62aa99342a0 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -69,16 +69,6 @@ #define CFG_SYS_UART_PORT (2) #define CFG_SYS_UART2_ALT3_GPIO -/* - * Watchdog configuration; Watchdog is disabled for running from RAM - * and set to highest possible value else. Beware there is no check - * in the watchdog code to validate the timeout value set here! - */ - -#ifndef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ -#endif - /* * Configuration for environment * Environment is located in the last sector of the flash diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 01828ea2011..6d6e2fc6962 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -42,18 +42,6 @@ #define CFG_SYS_UART_PORT (0) -/* --- - * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change - * timeout acc. to your needs - * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000 - * for 10 sec - * --- - */ - -#if 0 -#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ -#endif - /* --- * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different * bootloader residing in flash ('chainloading'); if you want to use -- cgit v1.2.3 From 2f420f135ffdc7d30834d640efb504261426afa3 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 27 Nov 2022 10:25:04 -0500 Subject: net: tsec: Remove non-DM_ETH support code As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Doing this removes some board support code which was also unused. Finally, this removes some CONFIG symbols that otherwise needed to be migrated to Kconfig, but were unused in code now. Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 27 ------------------- include/configs/MPC8548CDS.h | 27 ------------------- include/configs/P1010RDB.h | 31 ---------------------- include/configs/ls1021aiot.h | 21 --------------- include/configs/ls1021aqds.h | 26 ------------------ include/configs/p1_p2_rdb_pc.h | 21 --------------- include/configs/socrates.h | 16 ----------- include/tsec.h | 60 ------------------------------------------ 8 files changed, 229 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 95a90199a42..f312ffb37e2 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -41,8 +41,6 @@ #ifdef CONFIG_VSC7385_ENET -#define CONFIG_TSEC2 - /* The flash address and size of the VSC7385 firmware image */ #define CONFIG_VSC7385_IMAGE 0xFE7FE000 #define CONFIG_VSC7385_IMAGE_SIZE 8192 @@ -178,31 +176,6 @@ #define CFG_SYS_PCIE2_MEM_PHYS 0xC8000000 #define CFG_SYS_PCIE2_IO_PHYS 0xD8000000 -/* - * TSEC - */ -#ifdef CONFIG_TSEC_ENET - -#define CONFIG_GMII /* MII PHY management */ - -#define CONFIG_TSEC1 - -#ifdef CONFIG_TSEC1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CFG_SYS_TSEC1_OFFSET 0x24000 -#define TSEC1_PHY_ADDR 2 -#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC1_PHYIDX 0 -#endif - -#ifdef CONFIG_TSEC2 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC2_PHY_ADDR 0x1c -#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC2_PHYIDX 0 -#endif -#endif - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC_PIN_MUX #define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC83xx_ESDHC_ADDR diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 780ee5ae865..34b876f829e 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -283,33 +283,6 @@ #endif #define CFG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ -#if defined(CONFIG_TSEC_ENET) - -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "eTSEC0" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "eTSEC1" -#define CONFIG_TSEC3 1 -#define CONFIG_TSEC3_NAME "eTSEC2" -#define CONFIG_TSEC4 -#define CONFIG_TSEC4_NAME "eTSEC3" -#undef CONFIG_MPC85XX_FEC - -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 -#define TSEC3_PHY_ADDR 2 -#define TSEC4_PHY_ADDR 3 - -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC3_PHYIDX 0 -#define TSEC4_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC2_FLAGS TSEC_GIGABIT -#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#endif /* CONFIG_TSEC_ENET */ - /* * Miscellaneous configurable options */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index b1d6b15811d..4418d516956 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -349,37 +349,6 @@ extern unsigned long get_sdram_size(void); /* eSPI - Enhanced SPI */ #endif -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "eTSEC1" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "eTSEC2" -#define CONFIG_TSEC3 1 -#define CONFIG_TSEC3_NAME "eTSEC3" - -#define TSEC1_PHY_ADDR 1 -#define TSEC2_PHY_ADDR 0 -#define TSEC3_PHY_ADDR 2 - -#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC3_PHYIDX 0 - -/* TBI PHY configuration for SGMII mode */ -#define CONFIG_TSEC_TBICR_SETTINGS ( \ - TBICR_PHY_RESET \ - | TBICR_ANEG_ENABLE \ - | TBICR_FULL_DUPLEX \ - | TBICR_SPEED1_SET \ - ) - -#endif /* CONFIG_TSEC_ENET */ - #ifdef CONFIG_MMC #define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 024a7185275..179c5128e3b 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -66,27 +66,6 @@ /* SPI */ -/* - * eTSEC - */ - -#ifdef CONFIG_TSEC_ENET -#define CONFIG_MII_DEFAULT_TSEC 1 -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "eTSEC1" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "eTSEC2" - -#define TSEC1_PHY_ADDR 1 -#define TSEC2_PHY_ADDR 3 - -#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#endif - #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" #define CONFIG_PEN_ADDR_BIG_ENDIAN diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 5a91cc3efec..d6681e85987 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -247,32 +247,6 @@ * MMC */ -/* - * eTSEC - */ - -#ifdef CONFIG_TSEC_ENET -#define CONFIG_MII_DEFAULT_TSEC 3 -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "eTSEC1" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "eTSEC2" -#define CONFIG_TSEC3 1 -#define CONFIG_TSEC3_NAME "eTSEC3" - -#define TSEC1_PHY_ADDR 1 -#define TSEC2_PHY_ADDR 2 -#define TSEC3_PHY_ADDR 3 - -#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC3_PHYIDX 0 -#endif - #define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 9738e9fa9cb..49c5aef3059 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -366,27 +366,6 @@ #endif #endif /* CONFIG_PCI */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_TSEC1 -#define CONFIG_TSEC1_NAME "eTSEC1" -#define CONFIG_TSEC2 -#define CONFIG_TSEC2_NAME "eTSEC2" -#define CONFIG_TSEC3 -#define CONFIG_TSEC3_NAME "eTSEC3" - -#define TSEC1_PHY_ADDR 2 -#define TSEC2_PHY_ADDR 0 -#define TSEC3_PHY_ADDR 1 - -#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) -#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC3_PHYIDX 0 -#endif /* CONFIG_TSEC_ENET */ - /* * Environment */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 95393d3ab25..2a076716023 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -111,22 +111,6 @@ #define CFG_SYS_PCI1_MEM_PHYS 0x80000000 #define CFG_SYS_PCI1_IO_PHYS 0xE2000000 -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_TSEC3 1 -#define CONFIG_TSEC3_NAME "TSEC1" -#undef CONFIG_MPC85XX_FEC - -#define TSEC1_PHY_ADDR 0 -#define TSEC3_PHY_ADDR 1 - -#define TSEC1_PHYIDX 0 -#define TSEC3_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC3_FLAGS TSEC_GIGABIT - -/* Options are: TSEC[0,1] */ - /* * Miscellaneous configurable options */ diff --git a/include/tsec.h b/include/tsec.h index de279b21171..153337837a9 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -19,56 +19,6 @@ #define TSEC_MDIO_REGS_OFFSET 0x520 -#ifndef CONFIG_DM_ETH - -#ifdef CONFIG_ARCH_LS1021A -#define TSEC_SIZE 0x40000 -#define TSEC_MDIO_OFFSET 0x40000 -#else -#define TSEC_SIZE 0x01000 -#define TSEC_MDIO_OFFSET 0x01000 -#endif - -#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + TSEC_MDIO_REGS_OFFSET) - -#define TSEC_GET_REGS(num, offset) \ - (struct tsec __iomem *)\ - (TSEC_BASE_ADDR + (((num) - 1) * (offset))) - -#define TSEC_GET_REGS_BASE(num) \ - TSEC_GET_REGS((num), TSEC_SIZE) - -#define TSEC_GET_MDIO_REGS(num, offset) \ - (struct tsec_mii_mng __iomem *)\ - (CONFIG_SYS_MDIO_BASE_ADDR + ((num) - 1) * (offset)) - -#define TSEC_GET_MDIO_REGS_BASE(num) \ - TSEC_GET_MDIO_REGS((num), TSEC_MDIO_OFFSET) - -#define DEFAULT_MII_NAME "FSL_MDIO" - -#define STD_TSEC_INFO(num) \ -{ \ - .regs = TSEC_GET_REGS_BASE(num), \ - .miiregs_sgmii = TSEC_GET_MDIO_REGS_BASE(num), \ - .devname = CONFIG_TSEC##num##_NAME, \ - .phyaddr = TSEC##num##_PHY_ADDR, \ - .flags = TSEC##num##_FLAGS, \ - .mii_devname = DEFAULT_MII_NAME \ -} - -#define SET_STD_TSEC_INFO(x, num) \ -{ \ - x.regs = TSEC_GET_REGS_BASE(num); \ - x.miiregs_sgmii = TSEC_GET_MDIO_REGS_BASE(num); \ - x.devname = CONFIG_TSEC##num##_NAME; \ - x.phyaddr = TSEC##num##_PHY_ADDR; \ - x.flags = TSEC##num##_FLAGS;\ - x.mii_devname = DEFAULT_MII_NAME;\ -} - -#endif /* CONFIG_DM_ETH */ - #define MAC_ADDR_LEN 6 /* #define TSEC_TIMEOUT 1000000 */ @@ -414,11 +364,7 @@ struct tsec_private { u32 flags; uint rx_idx; /* index of the current RX buffer */ uint tx_idx; /* index of the current TX buffer */ -#ifndef CONFIG_DM_ETH - struct eth_device *dev; -#else struct udevice *dev; -#endif }; struct tsec_info_struct { @@ -431,10 +377,4 @@ struct tsec_info_struct { u32 flags; }; -#ifndef CONFIG_DM_ETH -int tsec_standard_init(struct bd_info *bis); -int tsec_eth_init(struct bd_info *bis, struct tsec_info_struct *tsec_info, - int num); -#endif - #endif /* __TSEC_H */ -- cgit v1.2.3 From ecca44805d9a00e8e9ac6c14d9e7293565900981 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 27 Nov 2022 10:25:11 -0500 Subject: net: ethoc: Remove non-DM_ETH code As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Signed-off-by: Tom Rini --- include/dm/platform_data/net_ethoc.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/dm/platform_data/net_ethoc.h b/include/dm/platform_data/net_ethoc.h index 855e9999a0a..44547d14f53 100644 --- a/include/dm/platform_data/net_ethoc.h +++ b/include/dm/platform_data/net_ethoc.h @@ -8,13 +8,9 @@ #include -#ifdef CONFIG_DM_ETH - struct ethoc_eth_pdata { struct eth_pdata eth_pdata; phys_addr_t packet_base; }; -#endif - #endif /* _ETHOC_H */ -- cgit v1.2.3 From 36af92ba85ad45dfb07f1d17e8b7d6945c1ac0b4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 27 Nov 2022 10:25:20 -0500 Subject: net: phy: Remove non-DM_ETH code As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Signed-off-by: Tom Rini --- include/phy.h | 41 ----------------------------------------- 1 file changed, 41 deletions(-) (limited to 'include') diff --git a/include/phy.h b/include/phy.h index ff69536fca7..87aa86c2e78 100644 --- a/include/phy.h +++ b/include/phy.h @@ -138,12 +138,8 @@ struct phy_device { struct phy_driver *drv; void *priv; -#ifdef CONFIG_DM_ETH struct udevice *dev; ofnode node; -#else - struct eth_device *dev; -#endif /* forced speed & duplex (no autoneg) * partner speed & duplex & pause (autoneg) @@ -233,8 +229,6 @@ static inline struct phy_device *fixed_phy_create(ofnode node) #endif -#ifdef CONFIG_DM_ETH - /** * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices * @phydev: PHY device @@ -293,41 +287,6 @@ static inline ofnode phy_get_ofnode(struct phy_device *phydev) else return dev_ofnode(phydev->dev); } -#else - -/** - * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices - * @phydev: PHY device - * @dev: Ethernet device - * @interface: type of MAC-PHY interface - */ -void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev, - phy_interface_t interface); - -/** - * phy_connect() - Creates a PHY device for the Ethernet interface - * Creates a PHY device for the PHY at the given address, if one doesn't exist - * already, and associates it with the Ethernet device. - * The function may be called with addr <= 0, in this case addr value is ignored - * and the bus is scanned to detect a PHY. Scanning should only be used if only - * one PHY is expected to be present on the MDIO bus, otherwise it is undefined - * which PHY is returned. - * - * @bus: MII/MDIO bus that hosts the PHY - * @addr: PHY address on MDIO bus - * @dev: Ethernet device to associate to the PHY - * @interface: type of MAC-PHY interface - * @return: pointer to phy_device if a PHY is found, or NULL otherwise - */ -struct phy_device *phy_connect(struct mii_dev *bus, int addr, - struct eth_device *dev, - phy_interface_t interface); - -static inline ofnode phy_get_ofnode(struct phy_device *phydev) -{ - return ofnode_null(); -} -#endif int phy_read(struct phy_device *phydev, int devad, int regnum); int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val); -- cgit v1.2.3 From b8daa6e9ee079fea7f9772e40b56147274c5726b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 27 Nov 2022 10:25:33 -0500 Subject: usb: eth: Remove non-DM_ETH code As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code fro usb_ether itself. Signed-off-by: Tom Rini --- include/usb.h | 15 --------------- include/usb_ether.h | 44 +------------------------------------------- 2 files changed, 1 insertion(+), 58 deletions(-) (limited to 'include') diff --git a/include/usb.h b/include/usb.h index 7e3796bd5ba..80cb8467203 100644 --- a/include/usb.h +++ b/include/usb.h @@ -808,21 +808,6 @@ struct dm_usb_ops { #define usb_get_ops(dev) ((struct dm_usb_ops *)(dev)->driver->ops) #define usb_get_emul_ops(dev) ((struct dm_usb_ops *)(dev)->driver->ops) -/** - * usb_get_dev_index() - look up a device index number - * - * Look up devices using their index number (starting at 0). This works since - * in U-Boot device addresses are allocated starting at 1 with no gaps. - * - * TODO(sjg@chromium.org): Remove this function when usb_ether.c is modified - * to work better with driver model. - * - * @bus: USB bus to check - * @index: Index number of device to find (0=first). This is just the - * device address less 1. - */ -struct usb_device *usb_get_dev_index(struct udevice *bus, int index); - /** * usb_setup_device() - set up a device ready for use * diff --git a/include/usb_ether.h b/include/usb_ether.h index 8c7bd069064..18d7184711b 100644 --- a/include/usb_ether.h +++ b/include/usb_ether.h @@ -8,19 +8,13 @@ #include -/* TODO(sjg@chromium.org): Remove @pusb_dev when all boards use CONFIG_DM_ETH */ +/* TODO(sjg@chromium.org): Remove @pusb_dev now that all boards use CONFIG_DM_ETH */ struct ueth_data { /* eth info */ -#ifdef CONFIG_DM_ETH uint8_t *rxbuf; int rxsize; int rxlen; /* Total bytes available in rxbuf */ int rxptr; /* Current position in rxbuf */ -#else - struct eth_device eth_dev; /* used with eth_register */ - /* driver private */ - void *dev_priv; -#endif int phy_id; /* mii phy id */ /* usb info */ @@ -34,7 +28,6 @@ struct ueth_data { unsigned char irqinterval; /* Intervall for IRQ Pipe */ }; -#ifdef CONFIG_DM_ETH /** * usb_ether_register() - register a new USB ethernet device * @@ -92,40 +85,5 @@ int usb_ether_get_rx_bytes(struct ueth_data *ueth, uint8_t **ptrp); * @num_bytes: Number of bytes to skip, or -1 to skip all bytes */ void usb_ether_advance_rxbuf(struct ueth_data *ueth, int num_bytes); -#else -/* - * Function definitions for each USB ethernet driver go here - * (declaration is unconditional, compilation is conditional) - */ -void asix_eth_before_probe(void); -int asix_eth_probe(struct usb_device *dev, unsigned int ifnum, - struct ueth_data *ss); -int asix_eth_get_info(struct usb_device *dev, struct ueth_data *ss, - struct eth_device *eth); - -void ax88179_eth_before_probe(void); -int ax88179_eth_probe(struct usb_device *dev, unsigned int ifnum, - struct ueth_data *ss); -int ax88179_eth_get_info(struct usb_device *dev, struct ueth_data *ss, - struct eth_device *eth); - -void mcs7830_eth_before_probe(void); -int mcs7830_eth_probe(struct usb_device *dev, unsigned int ifnum, - struct ueth_data *ss); -int mcs7830_eth_get_info(struct usb_device *dev, struct ueth_data *ss, - struct eth_device *eth); - -void smsc95xx_eth_before_probe(void); -int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, - struct ueth_data *ss); -int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, - struct eth_device *eth); - -void r8152_eth_before_probe(void); -int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum, - struct ueth_data *ss); -int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss, - struct eth_device *eth); -#endif #endif /* __USB_ETHER_H__ */ -- cgit v1.2.3 From e524f3a449f58e2ef967fb9b64b01db3d099a27a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 27 Nov 2022 10:25:36 -0500 Subject: net: Remove eth_legacy.c As there are no more non-DM_ETH cases for networking, remove this legacy file and update the Makefile to match current usage. Signed-off-by: Tom Rini --- include/net.h | 71 ----------------------------------------------------------- 1 file changed, 71 deletions(-) (limited to 'include') diff --git a/include/net.h b/include/net.h index 1a99009959d..ee08f3307ec 100644 --- a/include/net.h +++ b/include/net.h @@ -101,7 +101,6 @@ enum eth_state_t { ETH_STATE_ACTIVE }; -#ifdef CONFIG_DM_ETH /** * struct eth_pdata - Platform data for Ethernet MAC controllers * @@ -180,76 +179,6 @@ unsigned char *eth_get_ethaddr(void); /* get the current device MAC */ int eth_is_active(struct udevice *dev); /* Test device for active state */ int eth_init_state_only(void); /* Set active state */ void eth_halt_state_only(void); /* Set passive state */ -#endif - -#ifndef CONFIG_DM_ETH -struct eth_device { -#define ETH_NAME_LEN 20 - char name[ETH_NAME_LEN]; - unsigned char enetaddr[ARP_HLEN]; - phys_addr_t iobase; - int state; - - int (*init)(struct eth_device *eth, struct bd_info *bd); - int (*send)(struct eth_device *, void *packet, int length); - int (*recv)(struct eth_device *); - void (*halt)(struct eth_device *); - int (*mcast)(struct eth_device *, const u8 *enetaddr, int join); - int (*write_hwaddr)(struct eth_device *eth); - struct eth_device *next; - int index; - void *priv; -}; - -int eth_register(struct eth_device *dev);/* Register network device */ -int eth_unregister(struct eth_device *dev);/* Remove network device */ - -extern struct eth_device *eth_current; - -static __always_inline struct eth_device *eth_get_dev(void) -{ - return eth_current; -} -struct eth_device *eth_get_dev_by_name(const char *devname); -struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */ - -/* get the current device MAC */ -static inline unsigned char *eth_get_ethaddr(void) -{ - if (eth_current) - return eth_current->enetaddr; - return NULL; -} - -/* Used only when NetConsole is enabled */ -int eth_is_active(struct eth_device *dev); /* Test device for active state */ -/* Set active state */ -static __always_inline int eth_init_state_only(void) -{ - eth_get_dev()->state = ETH_STATE_ACTIVE; - - return 0; -} -/* Set passive state */ -static __always_inline void eth_halt_state_only(void) -{ - eth_get_dev()->state = ETH_STATE_PASSIVE; -} - -/* - * Set the hardware address for an ethernet interface based on 'eth%daddr' - * environment variable (or just 'ethaddr' if eth_number is 0). - * Args: - * base_name - base name for device (normally "eth") - * eth_number - value of %d (0 for first device of this type) - * Returns: - * 0 is success, non-zero is error status from driver. - */ -int eth_write_hwaddr(struct eth_device *dev, const char *base_name, - int eth_number); - -int usb_eth_initialize(struct bd_info *bi); -#endif int eth_initialize(void); /* Initialize network subsystem */ void eth_try_another(int first_restart); /* Change the device */ -- cgit v1.2.3 From 28f924f2650ed2229fd712620c36a41dc0610fcb Mon Sep 17 00:00:00 2001 From: Marc Kleine-Budde Date: Wed, 23 Nov 2022 12:55:33 +0100 Subject: tools: mkimage: add new image type "fdt_legacy" If the user select the image type "flat_dt" a FIT image will be build. This breaks the legacy use case of putting a Flat Device Tree into a legacy u-boot image. Add a new image type "fdt_legacy" to build a legacy u-boot image with a "flat_dt" type. Link: https://lore.kernel.org/all/20221028155205.ojw6tcso2fofgnhm@pengutronix.de Signed-off-by: Marc Kleine-Budde Reviewed-by: Sean Anderson --- include/image.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/image.h b/include/image.h index 6f21dafba8c..b6a809834ad 100644 --- a/include/image.h +++ b/include/image.h @@ -229,6 +229,7 @@ enum image_type_t { IH_TYPE_COPRO, /* Coprocessor Image for remoteproc*/ IH_TYPE_SUNXI_EGON, /* Allwinner eGON Boot Image */ IH_TYPE_SUNXI_TOC0, /* Allwinner TOC0 Boot Image */ + IH_TYPE_FDT_LEGACY, /* Binary Flat Device Tree Blob in a Legacy Image */ IH_TYPE_COUNT, /* Number of image types */ }; -- cgit v1.2.3 From de32a2a32aec6ba82fc60c15bef4750ee6729826 Mon Sep 17 00:00:00 2001 From: Balamanikandan Gunasundar Date: Tue, 25 Oct 2022 16:21:03 +0530 Subject: mfd: syscon: Add atmel-matrix registers definition This file is copied from Linux. AT91 SoCs have a memory range reserved for internal bus configuration. Expose those registers so that drivers can make use of the matrix syscon declared in at91 DTs. Signed-off-by: Balamanikandan Gunasundar --- include/linux/mfd/syscon/atmel-matrix.h | 112 ++++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) create mode 100644 include/linux/mfd/syscon/atmel-matrix.h (limited to 'include') diff --git a/include/linux/mfd/syscon/atmel-matrix.h b/include/linux/mfd/syscon/atmel-matrix.h new file mode 100644 index 00000000000..dd228cab67a --- /dev/null +++ b/include/linux/mfd/syscon/atmel-matrix.h @@ -0,0 +1,112 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014 Atmel Corporation. + * + * Memory Controllers (MATRIX, EBI) - System peripherals registers. + */ + +#ifndef _LINUX_MFD_SYSCON_ATMEL_MATRIX_H +#define _LINUX_MFD_SYSCON_ATMEL_MATRIX_H + +#define AT91SAM9260_MATRIX_MCFG 0x00 +#define AT91SAM9260_MATRIX_SCFG 0x40 +#define AT91SAM9260_MATRIX_PRS 0x80 +#define AT91SAM9260_MATRIX_MRCR 0x100 +#define AT91SAM9260_MATRIX_EBICSA 0x11c + +#define AT91SAM9261_MATRIX_MRCR 0x0 +#define AT91SAM9261_MATRIX_SCFG 0x4 +#define AT91SAM9261_MATRIX_TCR 0x24 +#define AT91SAM9261_MATRIX_EBICSA 0x30 +#define AT91SAM9261_MATRIX_USBPUCR 0x34 + +#define AT91SAM9263_MATRIX_MCFG 0x00 +#define AT91SAM9263_MATRIX_SCFG 0x40 +#define AT91SAM9263_MATRIX_PRS 0x80 +#define AT91SAM9263_MATRIX_MRCR 0x100 +#define AT91SAM9263_MATRIX_TCR 0x114 +#define AT91SAM9263_MATRIX_EBI0CSA 0x120 +#define AT91SAM9263_MATRIX_EBI1CSA 0x124 + +#define AT91SAM9RL_MATRIX_MCFG 0x00 +#define AT91SAM9RL_MATRIX_SCFG 0x40 +#define AT91SAM9RL_MATRIX_PRS 0x80 +#define AT91SAM9RL_MATRIX_MRCR 0x100 +#define AT91SAM9RL_MATRIX_TCR 0x114 +#define AT91SAM9RL_MATRIX_EBICSA 0x120 + +#define AT91SAM9G45_MATRIX_MCFG 0x00 +#define AT91SAM9G45_MATRIX_SCFG 0x40 +#define AT91SAM9G45_MATRIX_PRS 0x80 +#define AT91SAM9G45_MATRIX_MRCR 0x100 +#define AT91SAM9G45_MATRIX_TCR 0x110 +#define AT91SAM9G45_MATRIX_DDRMPR 0x118 +#define AT91SAM9G45_MATRIX_EBICSA 0x128 + +#define AT91SAM9N12_MATRIX_MCFG 0x00 +#define AT91SAM9N12_MATRIX_SCFG 0x40 +#define AT91SAM9N12_MATRIX_PRS 0x80 +#define AT91SAM9N12_MATRIX_MRCR 0x100 +#define AT91SAM9N12_MATRIX_EBICSA 0x118 + +#define AT91SAM9X5_MATRIX_MCFG 0x00 +#define AT91SAM9X5_MATRIX_SCFG 0x40 +#define AT91SAM9X5_MATRIX_PRS 0x80 +#define AT91SAM9X5_MATRIX_MRCR 0x100 +#define AT91SAM9X5_MATRIX_EBICSA 0x120 + +#define SAMA5D3_MATRIX_MCFG 0x00 +#define SAMA5D3_MATRIX_SCFG 0x40 +#define SAMA5D3_MATRIX_PRS 0x80 +#define SAMA5D3_MATRIX_MRCR 0x100 + +#define AT91_MATRIX_MCFG(o, x) ((o) + ((x) * 0x4)) +#define AT91_MATRIX_ULBT GENMASK(2, 0) +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) +#define AT91_MATRIX_ULBT_FOUR (2 << 0) +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) + +#define AT91_MATRIX_SCFG(o, x) ((o) + ((x) * 0x4)) +#define AT91_MATRIX_SLOT_CYCLE GENMASK(7, 0) +#define AT91_MATRIX_DEFMSTR_TYPE GENMASK(17, 16) +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) +#define AT91_MATRIX_FIXED_DEFMSTR GENMASK(20, 18) +#define AT91_MATRIX_ARBT GENMASK(25, 24) +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) + +#define AT91_MATRIX_ITCM_SIZE GENMASK(3, 0) +#define AT91_MATRIX_ITCM_0 (0 << 0) +#define AT91_MATRIX_ITCM_16 (5 << 0) +#define AT91_MATRIX_ITCM_32 (6 << 0) +#define AT91_MATRIX_ITCM_64 (7 << 0) +#define AT91_MATRIX_DTCM_SIZE GENMASK(7, 4) +#define AT91_MATRIX_DTCM_0 (0 << 4) +#define AT91_MATRIX_DTCM_16 (5 << 4) +#define AT91_MATRIX_DTCM_32 (6 << 4) +#define AT91_MATRIX_DTCM_64 (7 << 4) + +#define AT91_MATRIX_PRAS(o, x) ((o) + ((x) * 0x8)) +#define AT91_MATRIX_PRBS(o, x) ((o) + ((x) * 0x8) + 0x4) +#define AT91_MATRIX_MPR(x) GENMASK(((x) * 0x4) + 1, ((x) * 0x4)) + +#define AT91_MATRIX_RCB(x) BIT(x) + +#define AT91_MATRIX_CSA(cs, val) ((val) << (cs)) +#define AT91_MATRIX_DBPUC BIT(8) +#define AT91_MATRIX_DBPDC BIT(9) +#define AT91_MATRIX_VDDIOMSEL BIT(16) +#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) +#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) +#define AT91_MATRIX_EBI_IOSR BIT(17) +#define AT91_MATRIX_DDR_IOSR BIT(18) +#define AT91_MATRIX_NFD0_SELECT BIT(24) +#define AT91_MATRIX_DDR_MP_EN BIT(25) + +#define AT91_MATRIX_USBPUCR_PUON BIT(30) + +#endif /* _LINUX_MFD_SYSCON_ATMEL_MATRIX_H */ -- cgit v1.2.3 From 2dc1b8fe17b283db4e4485f01ba10dff6b37d693 Mon Sep 17 00:00:00 2001 From: Balamanikandan Gunasundar Date: Tue, 25 Oct 2022 16:21:05 +0530 Subject: mfd: syscon: atmel-smc: Add new helpers to ease SMC regs manipulation Add helper functions for atmel Static Memory Controller. The functions are required to configure SMC. This file is inherited from the work done by Boris Brezillon for Linux Signed-off-by: Balamanikandan Gunasundar --- include/linux/mfd/syscon/atmel-smc.h | 119 +++++++++++++++++++++++++++++++++++ 1 file changed, 119 insertions(+) create mode 100644 include/linux/mfd/syscon/atmel-smc.h (limited to 'include') diff --git a/include/linux/mfd/syscon/atmel-smc.h b/include/linux/mfd/syscon/atmel-smc.h new file mode 100644 index 00000000000..74be5a199fe --- /dev/null +++ b/include/linux/mfd/syscon/atmel-smc.h @@ -0,0 +1,119 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Atmel SMC (Static Memory Controller) register offsets and bit definitions. + * + * Copyright (C) 2014 Atmel + * Copyright (C) 2014 Free Electrons + * + * Author: Boris Brezillon + */ + +#ifndef _LINUX_MFD_SYSCON_ATMEL_SMC_H_ +#define _LINUX_MFD_SYSCON_ATMEL_SMC_H_ + +#include +#include +#include + +#define ATMEL_SMC_SETUP(cs) (((cs) * 0x10)) +#define ATMEL_HSMC_SETUP(layout, cs) \ + ((layout)->timing_regs_offset + ((cs) * 0x14)) +#define ATMEL_SMC_PULSE(cs) (((cs) * 0x10) + 0x4) +#define ATMEL_HSMC_PULSE(layout, cs) \ + ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x4) +#define ATMEL_SMC_CYCLE(cs) (((cs) * 0x10) + 0x8) +#define ATMEL_HSMC_CYCLE(layout, cs) \ + ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x8) +#define ATMEL_SMC_NWE_SHIFT 0 +#define ATMEL_SMC_NCS_WR_SHIFT 8 +#define ATMEL_SMC_NRD_SHIFT 16 +#define ATMEL_SMC_NCS_RD_SHIFT 24 + +#define ATMEL_SMC_MODE(cs) (((cs) * 0x10) + 0xc) +#define ATMEL_HSMC_MODE(layout, cs) \ + ((layout)->timing_regs_offset + ((cs) * 0x14) + 0x10) +#define ATMEL_SMC_MODE_READMODE_MASK BIT(0) +#define ATMEL_SMC_MODE_READMODE_NCS (0 << 0) +#define ATMEL_SMC_MODE_READMODE_NRD (1 << 0) +#define ATMEL_SMC_MODE_WRITEMODE_MASK BIT(1) +#define ATMEL_SMC_MODE_WRITEMODE_NCS (0 << 1) +#define ATMEL_SMC_MODE_WRITEMODE_NWE (1 << 1) +#define ATMEL_SMC_MODE_EXNWMODE_MASK GENMASK(5, 4) +#define ATMEL_SMC_MODE_EXNWMODE_DISABLE (0 << 4) +#define ATMEL_SMC_MODE_EXNWMODE_FROZEN (2 << 4) +#define ATMEL_SMC_MODE_EXNWMODE_READY (3 << 4) +#define ATMEL_SMC_MODE_BAT_MASK BIT(8) +#define ATMEL_SMC_MODE_BAT_SELECT (0 << 8) +#define ATMEL_SMC_MODE_BAT_WRITE (1 << 8) +#define ATMEL_SMC_MODE_DBW_MASK GENMASK(13, 12) +#define ATMEL_SMC_MODE_DBW_8 (0 << 12) +#define ATMEL_SMC_MODE_DBW_16 (1 << 12) +#define ATMEL_SMC_MODE_DBW_32 (2 << 12) +#define ATMEL_SMC_MODE_TDF_MASK GENMASK(19, 16) +#define ATMEL_SMC_MODE_TDF(x) (((x) - 1) << 16) +#define ATMEL_SMC_MODE_TDF_MAX 16 +#define ATMEL_SMC_MODE_TDF_MIN 1 +#define ATMEL_SMC_MODE_TDFMODE_OPTIMIZED BIT(20) +#define ATMEL_SMC_MODE_PMEN BIT(24) +#define ATMEL_SMC_MODE_PS_MASK GENMASK(29, 28) +#define ATMEL_SMC_MODE_PS_4 (0 << 28) +#define ATMEL_SMC_MODE_PS_8 (1 << 28) +#define ATMEL_SMC_MODE_PS_16 (2 << 28) +#define ATMEL_SMC_MODE_PS_32 (3 << 28) + +#define ATMEL_HSMC_TIMINGS(layout, cs) \ + ((layout)->timing_regs_offset + ((cs) * 0x14) + 0xc) +#define ATMEL_HSMC_TIMINGS_OCMS BIT(12) +#define ATMEL_HSMC_TIMINGS_RBNSEL(x) ((x) << 28) +#define ATMEL_HSMC_TIMINGS_NFSEL BIT(31) +#define ATMEL_HSMC_TIMINGS_TCLR_SHIFT 0 +#define ATMEL_HSMC_TIMINGS_TADL_SHIFT 4 +#define ATMEL_HSMC_TIMINGS_TAR_SHIFT 8 +#define ATMEL_HSMC_TIMINGS_TRR_SHIFT 16 +#define ATMEL_HSMC_TIMINGS_TWB_SHIFT 24 + +struct atmel_hsmc_reg_layout { + unsigned int timing_regs_offset; +}; + +/** + * struct atmel_smc_cs_conf - SMC CS config as described in the datasheet. + * @setup: NCS/NWE/NRD setup timings (not applicable to at91rm9200) + * @pulse: NCS/NWE/NRD pulse timings (not applicable to at91rm9200) + * @cycle: NWE/NRD cycle timings (not applicable to at91rm9200) + * @timings: advanced NAND related timings (only applicable to HSMC) + * @mode: all kind of config parameters (see the fields definition above). + * The mode fields are different on at91rm9200 + */ +struct atmel_smc_cs_conf { + u32 setup; + u32 pulse; + u32 cycle; + u32 timings; + u32 mode; +}; + +void atmel_smc_cs_conf_init(struct atmel_smc_cs_conf *conf); +int atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf, + unsigned int shift, + unsigned int ncycles); +int atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf, + unsigned int shift, unsigned int ncycles); +int atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf, + unsigned int shift, unsigned int ncycles); +int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf, + unsigned int shift, unsigned int ncycles); +void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs, + const struct atmel_smc_cs_conf *conf); +void atmel_hsmc_cs_conf_apply(struct regmap *regmap, + const struct atmel_hsmc_reg_layout *reglayout, + int cs, const struct atmel_smc_cs_conf *conf); +void atmel_smc_cs_conf_get(struct regmap *regmap, int cs, + struct atmel_smc_cs_conf *conf); +void atmel_hsmc_cs_conf_get(struct regmap *regmap, + const struct atmel_hsmc_reg_layout *reglayout, + int cs, struct atmel_smc_cs_conf *conf); +const struct atmel_hsmc_reg_layout * +atmel_hsmc_get_reg_layout(ofnode np); + +#endif /* _LINUX_MFD_SYSCON_ATMEL_SMC_H_ */ -- cgit v1.2.3 From c41e05bab0b025691741d819ff372c08e285b99a Mon Sep 17 00:00:00 2001 From: Balamanikandan Gunasundar Date: Tue, 25 Oct 2022 16:21:09 +0530 Subject: board: sam9x60ek: remove nand init from board file Move this out of board file as this is done by the DM based NAND flash driver. The EBI chip select configuration, iomux and timings are handled by the driver Signed-off-by: Balamanikandan Gunasundar --- include/configs/sam9x60ek.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'include') diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 27b39ebf417..cb7f35c7ca4 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -26,13 +26,4 @@ #define CFG_SYS_SDRAM_BASE 0x20000000 #define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ -/* NAND flash */ -#ifdef CONFIG_CMD_NAND -#define CFG_SYS_NAND_BASE 0x40000000 -#define CFG_SYS_NAND_MASK_ALE BIT(21) -#define CFG_SYS_NAND_MASK_CLE BIT(22) -#define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 -#define CFG_SYS_NAND_READY_PIN AT91_PIN_PD5 -#endif - #endif -- cgit v1.2.3 From 640aecb416cff52cf8a89d786d41e6eee54c94ff Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Tue, 22 Nov 2022 12:54:52 -0500 Subject: rtc: Add fallbacks for dm functions This adds fallbacks for the various dm_rtc_* functions. This allows common code to use these functions without ifdefs. Fixes: c8ce7ba87d1 ("misc: Add support for nvmem cells") Reviewed-by: Simon Glass Signed-off-by: Sean Anderson --- include/rtc.h | 32 +++++++++++++++++++++++++++++--- 1 file changed, 29 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/rtc.h b/include/rtc.h index 10104e3bf5a..b6fdbb60dc2 100644 --- a/include/rtc.h +++ b/include/rtc.h @@ -15,13 +15,12 @@ #include #include +#include typedef int64_t time64_t; - -#ifdef CONFIG_DM_RTC - struct udevice; +#if CONFIG_IS_ENABLED(DM_RTC) struct rtc_ops { /** * get() - get the current time @@ -222,6 +221,33 @@ int rtc_enable_32khz_output(int busnum, int chip_addr); #endif #else +static inline int dm_rtc_get(struct udevice *dev, struct rtc_time *time) +{ + return -ENOSYS; +} + +static inline int dm_rtc_set(struct udevice *dev, struct rtc_time *time) +{ + return -ENOSYS; +} + +static inline int dm_rtc_reset(struct udevice *dev) +{ + return -ENOSYS; +} + +static inline int dm_rtc_read(struct udevice *dev, unsigned int reg, u8 *buf, + unsigned int len) +{ + return -ENOSYS; +} + +static inline int dm_rtc_write(struct udevice *dev, unsigned int reg, + const u8 *buf, unsigned int len) +{ + return -ENOSYS; +} + int rtc_get (struct rtc_time *); int rtc_set (struct rtc_time *); void rtc_reset (void); -- cgit v1.2.3 From 253802912a65fde6ba9328462ef4b8574932c8f3 Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Thu, 3 Nov 2022 19:13:51 -0500 Subject: arm: dts: introduce am62a7 dtbs from linux kernel Introduce the basic am62a7 SoC dtbs from the v6.1-rc3 tag of the linux kernel along with the new am62a specific pinmux definition that we will use to generate the dtbs for the u-boot-spl and u-boot binaries Co-developed-by: Vignesh Raghavendra Signed-off-by: Vignesh Raghavendra Signed-off-by: Bryan Brattlof --- include/dt-bindings/pinctrl/k3.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h index a5204ab91d3..e8418318eb9 100644 --- a/include/dt-bindings/pinctrl/k3.h +++ b/include/dt-bindings/pinctrl/k3.h @@ -44,4 +44,7 @@ #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + #endif -- cgit v1.2.3 From b6cbcd61556e0d9de4c389071e3a826e577b9f43 Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Thu, 3 Nov 2022 19:13:56 -0500 Subject: arm: mach-k3: am62a: introduce auto-generated SoC data Introduce the auto-generated clock tree and power domain data needed to attach the am62a into the power-domain and clock frameworks of uboot Signed-off-by: Bryan Brattlof --- include/k3-clk.h | 1 + include/k3-dev.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/k3-clk.h b/include/k3-clk.h index 371f077c447..49ba53d20f7 100644 --- a/include/k3-clk.h +++ b/include/k3-clk.h @@ -175,6 +175,7 @@ extern const struct ti_k3_clk_platdata j721e_clk_platdata; extern const struct ti_k3_clk_platdata j7200_clk_platdata; extern const struct ti_k3_clk_platdata j721s2_clk_platdata; extern const struct ti_k3_clk_platdata am62x_clk_platdata; +extern const struct ti_k3_clk_platdata am62ax_clk_platdata; struct clk *clk_register_ti_pll(const char *name, const char *parent_name, void __iomem *reg); diff --git a/include/k3-dev.h b/include/k3-dev.h index 87e873b9ced..d288ae3be73 100644 --- a/include/k3-dev.h +++ b/include/k3-dev.h @@ -79,6 +79,7 @@ extern const struct ti_k3_pd_platdata j721e_pd_platdata; extern const struct ti_k3_pd_platdata j7200_pd_platdata; extern const struct ti_k3_pd_platdata j721s2_pd_platdata; extern const struct ti_k3_pd_platdata am62x_pd_platdata; +extern const struct ti_k3_pd_platdata am62ax_pd_platdata; u8 ti_pd_state(struct ti_pd *pd); u8 lpsc_get_state(struct ti_lpsc *lpsc); -- cgit v1.2.3 From 719bd650c30e86d43c9a6c1e289e82db802b0d3c Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Thu, 3 Nov 2022 19:13:58 -0500 Subject: configs: introduce configs for the am62a Introduce the minimum configs, only SD-MMC and UART boot related settings, to serve as a good starting point for the am62a as we add more functionality. Signed-off-by: Bryan Brattlof [trini: Disable CONFIG_NET as it's not used, in both platforms] Signed-off-by: Tom Rini --- include/configs/am62ax_evm.h | 68 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 include/configs/am62ax_evm.h (limited to 'include') diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h new file mode 100644 index 00000000000..5406c39350f --- /dev/null +++ b/include/configs/am62ax_evm.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration header file for K3 AM62Ax SoC family + * + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#ifndef __CONFIG_AM62AX_EVM_H +#define __CONFIG_AM62AX_EVM_H + +#include +#include +#include +#include + +/* DDR Configuration */ +#define CFG_SYS_SDRAM_BASE1 0x880000000 + +#define PARTS_DEFAULT \ + /* Linux partitions */ \ + "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ + +/* U-Boot general configuration */ +#define EXTRA_ENV_AM62A7_BOARD_SETTINGS \ + "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "findfdt=" \ + "setenv name_fdt ${default_device_tree};" \ + "setenv fdtfile ${name_fdt}\0" \ + "name_kern=Image\0" \ + "console=ttyS2,115200n8\0" \ + "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \ + "${mtdparts}\0" \ + "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" + +/* U-Boot MMC-specific configuration */ +#define EXTRA_ENV_AM62A7_BOARD_SETTINGS_MMC \ + "boot=mmc\0" \ + "mmcdev=1\0" \ + "bootpart=1:2\0" \ + "bootdir=/boot\0" \ + "rd_spec=-\0" \ + "init_mmc=run args_all args_mmc\0" \ + "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \ + "get_overlay_mmc=" \ + "fdt address ${fdtaddr};" \ + "fdt resize 0x100000;" \ + "for overlay in $name_overlays;" \ + "do;" \ + "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \ + "fdt apply ${dtboaddr};" \ + "done;\0" \ + "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ + "${bootdir}/${name_kern}\0" \ + "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \ + "${bootdir}/${name_fit}\0" \ + "partitions=" PARTS_DEFAULT + +/* Incorporate settings into the U-Boot environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + DEFAULT_MMC_TI_ARGS \ + EXTRA_ENV_AM62A7_BOARD_SETTINGS \ + EXTRA_ENV_AM62A7_BOARD_SETTINGS_MMC \ + +/* Now for the remaining common defines */ +#include + +#endif /* __CONFIG_AM62A7_EVM_H */ -- cgit v1.2.3 From a5dacef7380e4414e7fe5831298e31122d24b18d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 28 Oct 2022 11:01:19 +0200 Subject: cmd: pxe: support INITRD and FDT selection with FIT Since the commit d5ba6188dfbf ("cmd: pxe_utils: Check fdtcontroladdr in label_boot") the FDT or the FDTDIR label is required in extlinux.conf and the fallback done by bootm command when only the device tree present in this command parameters is no more performed when FIT is used for kernel. When the label FDT or FDTDIR are absent or if the device tree file is absent, the PXE command in U-Boot uses the default U-Boot device tree selected by fdtcontroladdr = gd->fdt_blob, it is the "Scenario 3". With this scenario the bootm FIP fallback is no more possible with the extlinux.conf when only "kernel" label is present and is a FIP: kernel #[##[##[##[# Reviewed-by: Neil Armstrong --- include/pxe_utils.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/pxe_utils.h b/include/pxe_utils.h index 4a73b2aace3..1e5e8424f53 100644 --- a/include/pxe_utils.h +++ b/include/pxe_utils.h @@ -28,6 +28,7 @@ * Create these with the 'label_create' function given below. * * name - the name of the menu as given on the 'menu label' line. + * kernel_label - the kernel label, including FIT config if present. * kernel - the path to the kernel file to use for this label. * append - kernel command line to use when booting this label * initrd - path to the initrd to use for this label. @@ -40,6 +41,7 @@ struct pxe_label { char num[4]; char *name; char *menu; + char *kernel_label; char *kernel; char *config; char *append; -- cgit v1.2.3 From 828d7e6022f2ae827aa278fc6bc15efee0d0a6b6 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 7 Dec 2022 09:26:40 +0100 Subject: configs: am333x_guardian: move MTDIDS_DEFAULT in defconfif Replace MTDIDS_DEFAULT in config include file by CONFIG_MTDIDS_DEFAULT in defonfig to complete the Kconfig migration Signed-off-by: Patrick Delaunay --- include/configs/am335x_guardian.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 7c5e7ce475e..a5b83b0c25d 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -115,7 +115,6 @@ } #define CFG_SYS_NAND_ECCSIZE 512 #define CFG_SYS_NAND_ECCBYTES 26 -#define MTDIDS_DEFAULT "nand0=nand.0" #endif /* CONFIG_MTD_RAW_NAND */ -- cgit v1.2.3 From bde4a407ea89704e5d2dd6d77140a4d2616c171d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 7 Dec 2022 09:26:41 +0100 Subject: configs: x530: move MTDPART/MTDIDS_DEFAULT in defconfig Replace MTDIDS_DEFAULT and MTDPARTS_DEFAULT in the config include file by CONFIG_MTDIDS_DEFAULT and CONFIG_MTDPARTS_DEFAULT in defconfig to complete the Kconfig migration. Signed-off-by: Patrick Delaunay --- include/configs/x530.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/x530.h b/include/configs/x530.h index dee87cb7732..c213dc6074b 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -32,8 +32,6 @@ /* SPI NOR flash default params, used by sf commands */ -#define MTDIDS_DEFAULT "nand0=nand" -#define MTDPARTS_DEFAULT "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)" #define MTDPARTS_MTDOOPS "errlog" /* Partition support */ -- cgit v1.2.3 From 91b9551fb3c877f5c35324f31736787b4c7228cd Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 7 Dec 2022 09:26:42 +0100 Subject: configs: SBx81LIFXCAT: move MTDPART_DEFAULT in defconfig Replace MTDPARTS_DEFAULT in the config include file by CONFIG_MTDPARTS_DEFAULT in defconfig to complete the Kconfig migration. Signed-off-by: Patrick Delaunay --- include/configs/SBx81LIFXCAT.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 9a9663b34ba..23d37394e07 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -21,7 +21,6 @@ * for your console driver. */ -#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)" #define MTDPARTS_MTDOOPS "errlog" /* -- cgit v1.2.3 From 72e79f998e79626a551d22c637abf4c5786e8046 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 7 Dec 2022 09:26:43 +0100 Subject: configs: SBx81LIFKW: move MTDPART_DEFAULT in defconfig Replace MTDPARTS_DEFAULT in the config include file by CONFIG_MTDPARTS_DEFAULT in defconfig to complete the Kconfig migration. Signed-off-by: Patrick Delaunay --- include/configs/SBx81LIFKW.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index bad34d9771e..d5c9c05767a 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -21,7 +21,6 @@ * for your console driver. */ -#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)" #define MTDPARTS_MTDOOPS "errlog" /* -- cgit v1.2.3 From 553d7607c681806a40550696d56e15dcd9a2b0e6 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Fri, 2 Dec 2022 18:22:37 +0100 Subject: board/km: move ls102xa boards to environment text files Create a common.env which we can use later on also for other boards. Signed-off-by: Holger Brunck --- include/configs/km/pg-wcom-ls102xa.h | 65 ------------------------------- include/configs/pg-wcom-expu1.h | 4 -- include/configs/pg-wcom-seli8.h | 5 --- include/environment/pg-wcom/common.env | 68 +++++++++++++++++++++++++++++++++ include/environment/pg-wcom/ls102xa.env | 29 ++++++++++++++ 5 files changed, 97 insertions(+), 74 deletions(-) create mode 100644 include/environment/pg-wcom/common.env create mode 100644 include/environment/pg-wcom/ls102xa.env (limited to 'include') diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index dfa81c037f4..7fe2ece8403 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -6,9 +6,6 @@ #ifndef __CONFIG_PG_WCOM_LS102XA_H #define __CONFIG_PG_WCOM_LS102XA_H -/* include common defines/options for all Keymile boards */ -#include "keymile-common.h" - #define CFG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE @@ -168,68 +165,6 @@ #define HWCONFIG_BUFFER_SIZE 256 -/* - * Environment - */ - -#define CONFIG_ENV_TOTAL_SIZE 0x40000 -#define ENV_DEL_ADDR CONFIG_ENV_ADDR_REDUND /* direct for newenv */ - -#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */ -#define CONFIG_KM_DEF_ENV -#endif - -#ifndef CONFIG_KM_DEF_BOOT_ARGS_CPU -#define CONFIG_KM_DEF_BOOT_ARGS_CPU "" -#endif - -#define CONFIG_KM_DEF_ENV_CPU \ - "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \ - "cramfsloadfdt=" \ - "cramfsload ${fdt_addr_r} " \ - "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ - "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \ - "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize} && " \ - "erase " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize} && " \ - "cp.b ${load_addr_r} " \ - __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize} && " \ - "protect on " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize}\0" \ - "update-nor=protect off " __stringify(CFG_SYS_FLASH_BASE) \ - " +${filesize} && " \ - "erase " __stringify(CFG_SYS_FLASH_BASE) \ - " +${filesize} && " \ - "cp.b ${load_addr_r} " \ - __stringify(CFG_SYS_FLASH_BASE) " ${filesize} && " \ - "protect on " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +" __stringify(CONFIG_SYS_MONITOR_LEN)"\0" \ - "set_fdthigh=true\0" \ - "checkfdt=true\0" \ - "" - -#define CONFIG_KM_NEW_ENV \ - "newenv=protect off " __stringify(ENV_DEL_ADDR) \ - " +" __stringify(CONFIG_ENV_TOTAL_SIZE) " && " \ - "erase " __stringify(ENV_DEL_ADDR) \ - " +" __stringify(CONFIG_ENV_TOTAL_SIZE) " && " \ - "protect on " __stringify(ENV_DEL_ADDR) \ - " +" __stringify(CONFIG_ENV_TOTAL_SIZE) "\0" - -#define CONFIG_HW_ENV_SETTINGS \ - "hwconfig=devdis:esdhc,usb3,usb2,sata,sec,dcu,duart2,qspi," \ - "can1,can2_4,ftm2_8,i2c2_3,sai1_4,lpuart2_6," \ - "asrc,spdif,lpuart1,ftm1\0" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_KM_NEW_ENV \ - CONFIG_KM_DEF_ENV \ - CONFIG_HW_ENV_SETTINGS \ - "EEprom_ivm=pca9547:70:9\0" \ - "ethrotate=no\0" \ - "" - #define CFG_SYS_BOOTMAPSZ (256 << 20) /* Increase map for Linux */ #endif diff --git a/include/configs/pg-wcom-expu1.h b/include/configs/pg-wcom-expu1.h index 1b72739d143..2c38cffa8a0 100644 --- a/include/configs/pg-wcom-expu1.h +++ b/include/configs/pg-wcom-expu1.h @@ -7,10 +7,6 @@ #define __CONFIG_PG_WCOM_EXPU1_H #define WCOM_EXPU1 -#define CONFIG_HOSTNAME "EXPU1" - -#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" -#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" /* CLIPS FPGA Definitions */ #define CFG_SYS_CSPR3_EXT (0x00) diff --git a/include/configs/pg-wcom-seli8.h b/include/configs/pg-wcom-seli8.h index e4bcae5bb5e..9474d3bd7bd 100644 --- a/include/configs/pg-wcom-seli8.h +++ b/include/configs/pg-wcom-seli8.h @@ -6,11 +6,6 @@ #ifndef __CONFIG_PG_WCOM_SELI8_H #define __CONFIG_PG_WCOM_SELI8_H -#define CONFIG_HOSTNAME "SELI8" - -#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" -#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" - /* PAXK FPGA Definitions */ #define CFG_SYS_CSPR3_EXT (0x00) #define CFG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_PAX_BASE) | \ diff --git a/include/environment/pg-wcom/common.env b/include/environment/pg-wcom/common.env new file mode 100644 index 00000000000..4b660cebd67 --- /dev/null +++ b/include/environment/pg-wcom/common.env @@ -0,0 +1,68 @@ + +#ifndef WCOM_UBI_PARTITION_APP +/* one flash chip only called boot */ +# define WCOM_UBI_LINUX_MTD ubi.mtd=ubi0 +ubiattach=ubi part ubi0 +#else /* WCOM_UBI_PARTITION_APP */ +/* two flash chips called boot and app */ +# define WCOM_UBI_LINUX_MTD ubi.mtd=ubi0 ubi.mtd=ubi1 +ubiattach=if test ${boot_bank} -eq 0; + then; + ubi part ubi0; + else; + ubi part ubi1; + fi +#endif /* WCOMC_UBI_PARTITION_APP */ + +actual_bank=0 + +add_default=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off: + console=ttyS0,${baudrate} mem=${kernelmem} init=${init} + phram.phram=phvar,${varaddr},CONFIG_KM_PHRAM + WCOM_UBI_LINUX_MTD + +addpanic=setenv bootargs ${bootargs} panic=1 panic_on_oops=1 +altbootcmd=run bootcmd +backup_bank=0 +boot=bootm ${load_addr_r} - ${fdt_addr_r} + +bootcmd=km_checkbidhwk && + setenv bootcmd 'if km_checktestboot; + then; + setenv boot_bank ${test_bank}; + else; + setenv boot_bank ${actual_bank}; + fi; + run ${subbootcmds}; reset' && + setenv altbootcmd 'setenv boot_bank ${backup_bank}; + run ${subbootcmds}; + reset' && + saveenv && + saveenv && + boot + +cramfsaddr=CONFIG_KM_CRAMFS_ADDR +cramfsloadfdt=cramfsload ${fdt_addr_r} fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb +cramfsloadkernel=cramfsload ${load_addr_r} ${uimage} + +develop=tftp ${load_addr_r} scripts/develop-${arch}.txt && + env import -t ${load_addr_r} ${filesize} && + run setup_debug_env + +env_version=1 +fdt_addr_r=CONFIG_KM_FDT_ADDR +flashargs=setenv bootargs root=mtdblock:rootfs${boot_bank} rootfstype=squashfs ro +init=/sbin/init-overlay.sh +load=tftpboot ${load_addr_r} ${hostname}/u-boot.bin +load_addr_r=CONFIG_KM_KERNEL_ADDR +pnvramsize=CONFIG_KM_PNVRAM + +ramfs=tftp ${load_addr_r} scripts/ramfs-${arch}.txt && + env import -t ${load_addr_r} ${filesize} && + run setup_debug_env + +release=run newenv; reset +subbootcmds=ubiattach ubicopy checkfdt cramfsloadfdt set_fdthigh + cramfsloadkernel flashargs add_default addpanic boot +testbootcmd=setenv boot_bank ${test_bank}; run ${subbootcmds}; reset +ubicopy=ubi read ${cramfsaddr} bootfs${boot_bank} diff --git a/include/environment/pg-wcom/ls102xa.env b/include/environment/pg-wcom/ls102xa.env new file mode 100644 index 00000000000..5b5bda95e28 --- /dev/null +++ b/include/environment/pg-wcom/ls102xa.env @@ -0,0 +1,29 @@ +#define WCOM_UBI_PARTITION_APP + +#include + +EEprom_ivm=pca9547:70:9 +boot=bootm $load_addr_r - $fdt_addr_r +checkfdt=true +cramfsloadfdt=cramfsload $fdt_addr_r fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb +ethrotate=no +hwconfig=devdis:esdhc,usb3,usb2,sata,sec,dcu,duart2,qspi,can1,can2_4,ftm2_8,i2c2_3,sai1_4,lpuart2_6,asrc,spdif,lpuart1,ftm1 +netdev=eth2 + +newenv=protect off CONFIG_ENV_ADDR_REDUND +0x40000 && + erase CONFIG_ENV_ADDR_REDUND +0x40000 && + protect on CONFIG_ENV_ADDR_REDUND +0x40000 + +set_fdthigh=true + +update=protect off CONFIG_SYS_MONITOR_BASE +${filesize} && + erase CONFIG_SYS_MONITOR_BASE +${filesize} && + cp.b ${load_addr_r} CONFIG_SYS_MONITOR_BASE ${filesize} && + protect on CONFIG_SYS_MONITOR_BASE +${filesize} + +update-nor=protect off CONFIG_SYS_FLASH_BASE +${filesize} && + erase CONFIG_SYS_FLASH_BASE +${filesize} && + cp.b ${load_addr_r} CONFIG_SYS_FLASH_BASE ${filesize} && + protect on CONFIG_SYS_MONITOR_BASE +0x100000 + +uimage=uImage -- cgit v1.2.3 From 0cc0c098c8fbbf61378081df9681e660829c48eb Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Fri, 2 Dec 2022 18:22:38 +0100 Subject: km/powerpc: migrate to env.txt file Use already present common.env file and add a powerpc specific env so that we can move all the environment defines to text files. Signed-off-by: Holger Brunck --- include/configs/km/km-mpc83xx.h | 24 ----------------- include/configs/km/km-powerpc.h | 46 --------------------------------- include/configs/kmcoge5ne.h | 6 ----- include/configs/kmeter1.h | 4 --- include/configs/kmopti2.h | 7 ----- include/configs/kmsupx5.h | 7 ----- include/configs/kmtepr2.h | 7 ----- include/configs/tuge1.h | 7 ----- include/configs/tuxx1.h | 7 ----- include/environment/pg-wcom/powerpc.env | 14 ++++++++++ 10 files changed, 14 insertions(+), 115 deletions(-) delete mode 100644 include/configs/km/km-powerpc.h create mode 100644 include/environment/pg-wcom/powerpc.env (limited to 'include') diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 840a4d5401f..7f1839f463d 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -67,30 +67,6 @@ */ #define CFG_SYS_BOOTMAPSZ (8 << 20) -/* - * Environment - */ - -/* - * Environment Configuration - */ -#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */ -#define CONFIG_KM_DEF_ENV "km-common=empty\0" -#endif - -#ifndef CONFIG_KM_DEF_ARCH -#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_KM_DEF_ENV \ - CONFIG_KM_DEF_ARCH \ - "newenv=" \ - "prot off " __stringify(CONFIG_ENV_ADDR) " +0x40000 && " \ - "era " __stringify(CONFIG_ENV_ADDR) " +0x40000\0" \ - "unlock=yes\0" \ - "" - /* * QE UEC ethernet configuration */ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h deleted file mode 100644 index 424caa0df97..00000000000 --- a/include/configs/km/km-powerpc.h +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2011 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - */ - -#ifndef __CONFIG_KEYMILE_POWERPC_H -#define __CONFIG_KEYMILE_POWERPC_H - -/* Do boardspecific init for all boards */ - -/* Increase max size of compressed kernel */ - -/****************************************************************************** - * (PRAM usage) - * ... ------------------------------------------------------- - * ... |ROOTFSSIZE | PNVRAM |PHRAM |RESERVED_PRAM | END_OF_RAM - * ... |<------------------- pram -------------------------->| - * ... ------------------------------------------------------- - * @END_OF_RAM: - * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose - * @CONFIG_KM_PHRAM: address for /var - * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) - */ - -/* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable - * is not valid yet, which is the case for when u-boot copies itself to RAM */ -#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM)>>10) - -/* architecture specific default bootargs */ -#define CONFIG_KM_DEF_BOOT_ARGS_CPU "" - -#define CONFIG_KM_DEF_ENV_CPU \ - "u-boot="CONFIG_HOSTNAME "/u-boot.bin\0" \ - "update=" \ - "protect off " __stringify(BOOTFLASH_START) " +${filesize} && "\ - "erase " __stringify(BOOTFLASH_START) " +${filesize} && "\ - "cp.b ${load_addr_r} " __stringify(BOOTFLASH_START) \ - " ${filesize} && " \ - "protect on " __stringify(BOOTFLASH_START) " +${filesize}\0"\ - "set_fdthigh=true\0" \ - "checkfdt=true\0" \ - "bootm_mapsize=" __stringify(CONFIG_SYS_BOOTM_LEN) "\0" \ - "" - -#endif /* __CONFIG_KEYMILE_POWERPC_H */ diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index 6b30fb4b617..e0f94aead79 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -8,16 +8,10 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_HOSTNAME "kmcoge5ne" #define NAND_MAX_CHIPS 1 #define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */ -#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" -#define CONFIG_KM_UBI_PARTITION_NAME_APP "ubi1" - /* include common defines/options for all Keymile boards */ -#include "km/keymile-common.h" -#include "km/km-powerpc.h" #include "km/km-mpc83xx.h" #include "km/km-mpc8360.h" diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 910fc1b2cb2..6f67e5a98ab 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -8,11 +8,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_HOSTNAME "kmeter1" - /* include common defines/options for all Keymile boards */ -#include "km/keymile-common.h" -#include "km/km-powerpc.h" #include "km/km-mpc83xx.h" #include "km/km-mpc8360.h" diff --git a/include/configs/kmopti2.h b/include/configs/kmopti2.h index 5050c703039..d6a3844bcc5 100644 --- a/include/configs/kmopti2.h +++ b/include/configs/kmopti2.h @@ -20,14 +20,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - */ -#define CONFIG_HOSTNAME "kmopti2" - /* include common defines/options for all Keymile boards */ -#include "km/keymile-common.h" -#include "km/km-powerpc.h" #include "km/km-mpc83xx.h" #include "km/km-mpc832x.h" diff --git a/include/configs/kmsupx5.h b/include/configs/kmsupx5.h index e3de6c61e71..d6a3844bcc5 100644 --- a/include/configs/kmsupx5.h +++ b/include/configs/kmsupx5.h @@ -20,14 +20,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - */ -#define CONFIG_HOSTNAME "kmsupx5" - /* include common defines/options for all Keymile boards */ -#include "km/keymile-common.h" -#include "km/km-powerpc.h" #include "km/km-mpc83xx.h" #include "km/km-mpc832x.h" diff --git a/include/configs/kmtepr2.h b/include/configs/kmtepr2.h index a4ceb1c50d6..d6a3844bcc5 100644 --- a/include/configs/kmtepr2.h +++ b/include/configs/kmtepr2.h @@ -20,14 +20,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - */ -#define CONFIG_HOSTNAME "kmtepr2" - /* include common defines/options for all Keymile boards */ -#include "km/keymile-common.h" -#include "km/km-powerpc.h" #include "km/km-mpc83xx.h" #include "km/km-mpc832x.h" diff --git a/include/configs/tuge1.h b/include/configs/tuge1.h index d43ccbe8dd9..d6a3844bcc5 100644 --- a/include/configs/tuge1.h +++ b/include/configs/tuge1.h @@ -20,14 +20,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - */ -#define CONFIG_HOSTNAME "tuge1" - /* include common defines/options for all Keymile boards */ -#include "km/keymile-common.h" -#include "km/km-powerpc.h" #include "km/km-mpc83xx.h" #include "km/km-mpc832x.h" diff --git a/include/configs/tuxx1.h b/include/configs/tuxx1.h index 7eed31c35f0..d6a3844bcc5 100644 --- a/include/configs/tuxx1.h +++ b/include/configs/tuxx1.h @@ -20,14 +20,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - */ -#define CONFIG_HOSTNAME "tuxx1" - /* include common defines/options for all Keymile boards */ -#include "km/keymile-common.h" -#include "km/km-powerpc.h" #include "km/km-mpc83xx.h" #include "km/km-mpc832x.h" diff --git a/include/environment/pg-wcom/powerpc.env b/include/environment/pg-wcom/powerpc.env new file mode 100644 index 00000000000..a57fd93092d --- /dev/null +++ b/include/environment/pg-wcom/powerpc.env @@ -0,0 +1,14 @@ +arch=ppc_82xx +bootm_mapsize=CONFIG_SYS_BOOTM_LEN +checkfdt=true +set_fdthigh=true + +update=protect off BOOTFLASH_START +${filesize} && + erase BOOTFLASH_START +${filesize} && + cp.b ${load_addr_r} BOOTFLASH_START ${filesize} && + protect on BOOTFLASH_START +${filesize} + +newenv=prot off CONFIG_ENV_ADDR +0x40000 && + era CONFIG_ENV_ADDR +0x40000 + +unlock=yes -- cgit v1.2.3 From 6f7c936fbdd40071716730d07083c7f596700478 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Fri, 2 Dec 2022 18:22:39 +0100 Subject: board/km/cent2: migrate to environment text file Use like the other boards a text file for the environment. As this is the last user of keymile-common.h we can now remove this file completely. Signed-off-by: Holger Brunck --- include/configs/km/keymile-common.h | 174 ------------------------------------ include/configs/kmcent2.h | 74 --------------- 2 files changed, 248 deletions(-) delete mode 100644 include/configs/km/keymile-common.h (limited to 'include') diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h deleted file mode 100644 index cc5ec219b8d..00000000000 --- a/include/configs/km/keymile-common.h +++ /dev/null @@ -1,174 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2008-2011 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - */ - -#ifndef __CONFIG_KEYMILE_H -#define __CONFIG_KEYMILE_H - -#include - -/* - * Miscellaneous configurable options - */ - -#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } - -#ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS -#define CONFIG_KM_DEF_ENV_BOOTPARAMS \ - "actual_bank=0\0" -#endif - -#ifndef CONFIG_KM_UBI_PARTITION_NAME_BOOT -#define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" -#endif /* CONFIG_KM_UBI_PARTITION_NAME_BOOT */ - -#ifndef CONFIG_KM_UBI_PART_BOOT_OPTS -#define CONFIG_KM_UBI_PART_BOOT_OPTS "" -#endif /* CONFIG_KM_UBI_PART_BOOT_OPTS */ - -#ifndef CONFIG_KM_UBI_PARTITION_NAME_APP -/* one flash chip only called boot */ -/* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */ -# define CONFIG_KM_UBI_LINUX_MTD \ - "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT \ - CONFIG_KM_UBI_PART_BOOT_OPTS -# define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI \ - "ubiattach=ubi part " CONFIG_KM_UBI_PARTITION_NAME_BOOT "\0" -#else /* CONFIG_KM_UBI_PARTITION_NAME_APP */ -/* two flash chips called boot and app */ -/* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */ -/* app: CONFIG_KM_UBI_PARTITION_NAME_APP */ -# define CONFIG_KM_UBI_LINUX_MTD \ - "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT \ - CONFIG_KM_UBI_PART_BOOT_OPTS " " \ - "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_APP -# define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI \ - "ubiattach=if test ${boot_bank} -eq 0; then; " \ - "ubi part " CONFIG_KM_UBI_PARTITION_NAME_BOOT "; else; " \ - "ubi part " CONFIG_KM_UBI_PARTITION_NAME_APP "; fi\0" -#endif /* CONFIG_KM_UBI_PARTITION_NAME_APP */ - -#ifdef CONFIG_NAND_ECC_BCH -#define CONFIG_KM_UIMAGE_NAME "ecc_bch_uImage\0" -#define CONFIG_KM_ECC_MODE " eccmode=bch" -#else -#define CONFIG_KM_UIMAGE_NAME "uImage\0" -#define CONFIG_KM_ECC_MODE -#endif - -/* - * boottargets - * - set 'subbootcmds' - * - set 'bootcmd' and 'altbootcmd' - * available targets: - * - 'release': for a standalone system kernel/rootfs from flash - */ -#define CONFIG_KM_DEF_ENV_BOOTTARGETS \ - "subbootcmds=ubiattach ubicopy checkfdt cramfsloadfdt " \ - "set_fdthigh cramfsloadkernel flashargs add_default " \ - "addpanic boot\0" \ - "develop=" \ - "tftp ${load_addr_r} scripts/develop-${arch}.txt && " \ - "env import -t ${load_addr_r} ${filesize} && " \ - "run setup_debug_env\0" \ - "ramfs=" \ - "tftp ${load_addr_r} scripts/ramfs-${arch}.txt && " \ - "env import -t ${load_addr_r} ${filesize} && " \ - "run setup_debug_env\0" \ - "" - -/* - * bootargs - * - modify 'bootargs' - * - * - 'add_default': default bootargs common for all arm/ppc boards - * - 'addpanic': add kernel panic options - * - 'flashargs': defaults arguments for flash base boot - * - */ -#define CONFIG_KM_DEF_ENV_BOOTARGS \ - "add_default=" \ - "setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off:" \ - " console=" CONFIG_KM_CONSOLE_TTY ",${baudrate}" \ - " mem=${kernelmem} init=${init}" \ - CONFIG_KM_ECC_MODE \ - " phram.phram=phvar,${varaddr}," __stringify(CONFIG_KM_PHRAM)\ - " " CONFIG_KM_UBI_LINUX_MTD " " \ - CONFIG_KM_DEF_BOOT_ARGS_CPU \ - "\0" \ - "addpanic=" \ - "setenv bootargs ${bootargs} panic=1 panic_on_oops=1\0" \ - "flashargs=" \ - "setenv bootargs " \ - "root=mtdblock:rootfs${boot_bank} " \ - "rootfstype=squashfs ro\0" \ - "" - -/* - * flash_boot - * - commands for booting from flash - * - * - 'cramfsloadkernel': copy kernel from a cramfs to ram - * - 'ubiattach': attach ubi partition - * - 'ubicopy': copy ubi volume to ram - * - volume names: bootfs0, bootfs1, bootfs2, ... - * - * processor specific settings - * - 'cramfsloadfdt': copy fdt from a cramfs to ram - */ -#define CONFIG_KM_DEF_ENV_FLASH_BOOT \ - "cramfsaddr=" __stringify(CONFIG_KM_CRAMFS_ADDR) "\0" \ - "cramfsloadkernel=cramfsload ${load_addr_r} ${uimage}\0" \ - "ubicopy=ubi read ${cramfsaddr} bootfs${boot_bank}\0" \ - "uimage=" CONFIG_KM_UIMAGE_NAME \ - CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI - -/* - * constants - * - KM specific constants and commands - * - * - 'default': setup default environment - */ -#define CONFIG_KM_DEF_ENV_CONSTANTS \ - "backup_bank=0\0" \ - "release=run newenv; reset\0" \ - "pnvramsize=" __stringify(CONFIG_KM_PNVRAM) "\0" \ - "testbootcmd=setenv boot_bank ${test_bank}; " \ - "run ${subbootcmds}; reset\0" \ - "env_version=1\0" \ - "" - -#ifndef CONFIG_KM_DEF_ENV -#define CONFIG_KM_DEF_ENV \ - CONFIG_KM_DEF_ENV_BOOTPARAMS \ - "netdev=" __stringify(CONFIG_KM_DEF_NETDEV) "\0" \ - CONFIG_KM_DEF_ENV_CPU \ - CONFIG_KM_DEF_ENV_BOOTTARGETS \ - CONFIG_KM_DEF_ENV_BOOTARGS \ - CONFIG_KM_DEF_ENV_FLASH_BOOT \ - CONFIG_KM_DEF_ENV_CONSTANTS \ - "altbootcmd=run bootcmd\0" \ - "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \ - "bootcmd=km_checkbidhwk && " \ - "setenv bootcmd \'if km_checktestboot; then; " \ - "setenv boot_bank ${test_bank}; else; " \ - "setenv boot_bank ${actual_bank}; fi;" \ - "run ${subbootcmds}; reset\' && " \ - "setenv altbootcmd \'setenv boot_bank ${backup_bank}; " \ - "run ${subbootcmds}; reset\' && " \ - "saveenv && saveenv && boot\0" \ - "cramfsloadfdt=" \ - "cramfsload ${fdt_addr_r} " \ - "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ - "fdt_addr_r=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \ - "init=/sbin/init-overlay.sh\0" \ - "load_addr_r=" __stringify(CONFIG_KM_KERNEL_ADDR) "\0" \ - "load=tftpboot ${load_addr_r} ${u-boot}\0" \ - "" -#endif /* CONFIG_KM_DEF_ENV */ - -#endif /* __CONFIG_KEYMILE_H */ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 527f0383bc6..532370e9184 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -8,18 +8,6 @@ #ifndef __KMCENT2_H #define __KMCENT2_H -#define CONFIG_HOSTNAME "kmcent2" -#define KM_BOARD_NAME CONFIG_HOSTNAME - -/* - * The Linux fsl_fman driver needs to be able to process frames with more - * than just the VLAN tag (i.e. eDSA tag). It is passed as a kernel boot - * parameters - */ -#define CONFIG_KM_DEF_BOOT_ARGS_CPU "fsl_dpaa_fman.fsl_fm_max_frm=1558" - -#include "km/keymile-common.h" - /* Application IFC chip selects */ #define SYS_LAWAPP_BASE 0xc0000000 #define SYS_LAWAPP_BASE_PHYS (0xf00000000ull | SYS_LAWAPP_BASE) @@ -387,66 +375,4 @@ int get_scl(void); */ #define CFG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -/* - * Environment Configuration - */ -#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */ -#define CONFIG_KM_DEF_ENV -#endif - -#define __USB_PHY_TYPE utmi - -#define CONFIG_KM_DEF_ENV_CPU \ - "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \ - "cramfsloadfdt=" \ - "cramfsload ${fdt_addr_r} " \ - "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ - "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \ - "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize} && " \ - "erase " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize} && " \ - "cp.b ${load_addr_r} " \ - __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize} && " \ - "protect on " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize}\0" \ - "update-nor=protect off " __stringify(CFG_SYS_FLASH_BASE) \ - " +${filesize} && " \ - "erase " __stringify(CFG_SYS_FLASH_BASE) \ - " +${filesize} && " \ - "cp.b ${load_addr_r} " \ - __stringify(CFG_SYS_FLASH_BASE) " ${filesize} && " \ - "protect on " __stringify(CONFIG_SYS_MONITOR_BASE) \ - " +" __stringify(CONFIG_SYS_MONITOR_LEN) "\0" \ - "set_fdthigh=true\0" \ - "checkfdt=true\0" \ - "fpgacfg=true\0" \ - "" - -#define CONFIG_HW_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=cacheline\0" \ - "usb_phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ - "usb_dr_mode=host\0" - -#define CONFIG_KM_NEW_ENV \ - "newenv=protect off " __stringify(ENV_DEL_ADDR) \ - " +" __stringify(CONFIG_ENV_TOTAL_SIZE) " && " \ - "erase " __stringify(ENV_DEL_ADDR) \ - " +" __stringify(CONFIG_ENV_TOTAL_SIZE) " && " \ - "protect on " __stringify(ENV_DEL_ADDR) \ - " +" __stringify(CONFIG_ENV_TOTAL_SIZE) "\0" - -/* ppc_82xx is the equivalent to ppc_6xx, the generic ppc toolchain */ -#ifndef CONFIG_KM_DEF_ARCH -#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_KM_DEF_ENV \ - CONFIG_KM_DEF_ARCH \ - CONFIG_KM_NEW_ENV \ - CONFIG_HW_ENV_SETTINGS \ - "EEprom_ivm=pca9547:70:9\0" \ - "" - #endif /* __KMCENT2_H */ -- cgit v1.2.3 From 3bcf9c08a3de030438fcb91b27bf38e3235aafc5 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Fri, 2 Dec 2022 18:22:40 +0100 Subject: board/km/secu: migrate to use environment text files Instead of having these defines in a header file, move them to a simple text file. Signed-off-by: Holger Brunck --- include/configs/socfpga_arria5_secu1.h | 53 ---------------------------------- 1 file changed, 53 deletions(-) (limited to 'include') diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 29b4b22b398..55168c2fb8f 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -7,7 +7,6 @@ #define __CONFIG_SOCFPGA_SECU1_H__ #include -#include /* Eternal oscillator */ #define CFG_SYS_TIMER_RATE 40000000 @@ -23,58 +22,6 @@ */ #define CFG_SYS_I2C_RTC_ADDR 0x68 -/* Environment settings */ - -/* - * FPGA Remote Update related environment - * - * Note that since those commands access the FPGA, the HPS-to-FPGA - * bridges MUST have been previously enabled (for example - * with 'bridge enable'). - */ -#define FPGA_RMTU_ENV \ - "rmtu_page=0xFF29000C\0" \ - "rmtu_reconfig=0xFF290018\0" \ - "fpga_safebase=0x0\0" \ - "fpga_userbase=0x2000000\0" \ - "_fpga_loaduser=echo Loading FPGA USER image..." \ - " && mw ${rmtu_page} ${fpga_userbase} && mw ${rmtu_reconfig} 1\0" \ - "_fpga_loadsafe=echo Loading FPGA SAFE image..." \ - " && mw ${rmtu_page} ${fpga_safebase} && mw ${rmtu_reconfig} 1\0" \ - -#define CONFIG_KM_NEW_ENV \ - "newenv=" \ - "nand erase 0x100000 0x40000\0" - -#define CONFIG_KM_DEF_ENV_BOOTTARGETS \ - "release=" \ - "run newenv; reset\0" \ - "develop=" \ - "tftp 0x200000 scripts/develop-secu.txt && env import -t 0x200000 ${filesize} && saveenv && reset\0" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - FPGA_RMTU_ENV \ - CONFIG_KM_DEF_ENV_BOOTTARGETS \ - CONFIG_KM_NEW_ENV \ - "socfpga_legacy_reset_compat=1\0" \ - "altbootcmd=run bootcmd;\0" \ - "bootlimit=6\0" \ - "bootnum=1\0" \ - "bootretry=" __stringify(CONFIG_BOOT_RETRY_TIME) "\0" \ - "fdt_addr=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \ - "load=tftpboot ${loadaddr} u-boot-with-nand-spl.sfp\0" \ - "loadaddr=" __stringify(CONFIG_KM_KERNEL_ADDR) "\0" \ - "update=nand erase 0x0 0x00100000 && nand write ${loadaddr} 0x0 ${filesize}\0" \ - "userload=ubi part nand.ubi &&" \ - "ubi check rootfs$bootnum &&" \ - "ubi read $fdt_addr dtb$bootnum &&" \ - "ubi read $loadaddr kernel$bootnum\0" \ - "userboot=setenv bootargs " CONFIG_BOOTARGS \ - " ubi.mtd=1 ubi.block=0,rootfs$bootnum root=/dev/ubiblock0_$ubivolid" \ - " ro rootfstype=squashfs init=sbin/preinit;" \ - "bootz ${loadaddr} - ${fdt_addr}\0" \ - "verify=y\0" - /* The rest of the configuration is shared */ #include -- cgit v1.2.3 From 31464f9455ca16b6dd98e5469213c33d78fc0137 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Fri, 2 Dec 2022 18:22:42 +0100 Subject: km/ppc: migrate all mpc83xx to DM_I2C Enable DM_I2C and I2C mux to get rid of the usage of the legacy i2c driver. Signed-off-by: Holger Brunck --- include/configs/km/km-mpc83xx.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 7f1839f463d..1f03f95acef 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -48,14 +48,6 @@ #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } -/* I2C */ -#define CFG_SYS_NUM_I2C_BUSES 4 -#define CFG_SYS_I2C_MAX_HOPS 1 -#define CFG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP} }, \ - {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ - {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ - {1, {I2C_NULL_HOP} } } - #if defined(CONFIG_CMD_NAND) #define CFG_SYS_NAND_BASE CFG_SYS_KMBEC_FPGA_BASE #endif -- cgit v1.2.3 From aeb13924f4579bd200d538fcb82628101822a833 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Fri, 2 Dec 2022 18:22:43 +0100 Subject: km/mpc8360: remove unused CONFIG_SYS_PAXE defines These are unused defines and can be dropped. Signed-off-by: Holger Brunck --- include/configs/km/km-mpc8360.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include') diff --git a/include/configs/km/km-mpc8360.h b/include/configs/km/km-mpc8360.h index 5c9f912383d..04d3d352ee2 100644 --- a/include/configs/km/km-mpc8360.h +++ b/include/configs/km/km-mpc8360.h @@ -66,9 +66,3 @@ #define CFG_SYS_DDR_TIMING_3 0x00000000 -/* EEprom support */ - -/* - * PAXE on the local bus CS3 - */ -#define CFG_SYS_PAXE_BASE 0xA0000000 -- cgit v1.2.3 From f2d6c888f471837c565719097ca96f8f2b9dd215 Mon Sep 17 00:00:00 2001 From: Eugen Hristev Date: Fri, 25 Nov 2022 09:54:51 +0200 Subject: dt-bindings: mfd: add at91-usart.h from Linux Copy include file dt-bindings/mfd/at91-usart.h from Linux Signed-off-by: Eugen Hristev Reviewed-by: Claudiu Beznea --- include/dt-bindings/mfd/at91-usart.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 include/dt-bindings/mfd/at91-usart.h (limited to 'include') diff --git a/include/dt-bindings/mfd/at91-usart.h b/include/dt-bindings/mfd/at91-usart.h new file mode 100644 index 00000000000..2de5bc312e1 --- /dev/null +++ b/include/dt-bindings/mfd/at91-usart.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides macros for AT91 USART DT bindings. + * + * Copyright (C) 2018 Microchip Technology + * + * Author: Radu Pirea + * + */ + +#ifndef __DT_BINDINGS_AT91_USART_H__ +#define __DT_BINDINGS_AT91_USART_H__ + +#define AT91_USART_MODE_SERIAL 0 +#define AT91_USART_MODE_SPI 1 + +#endif /* __DT_BINDINGS_AT91_USART_H__ */ -- cgit v1.2.3 From 4475d017c57f93dca61c08563b3ff4202d38a127 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:12 -0500 Subject: arm: exynos5: Migrate USB_BOOTING to Kconfig This symbol is enabled for all exynos5 platforms, move to Kconfig and select it. Cc: Jaehoon Chung Cc: Minkyu Kang Signed-off-by: Tom Rini --- include/configs/exynos5-common.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index dd322c2b3a7..9b5c329bda1 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -58,7 +58,6 @@ /* USB */ /* USB boot mode */ -#define CONFIG_USB_BOOTING #define EXYNOS_COPY_USB_FNPTR_ADDR 0x02020070 #define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002 #define EXYNOS_IRAM_SECONDARY_BASE 0x02020018 -- cgit v1.2.3 From b41eb5a27e8cf6d32e68ea70ab0b5226329db154 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:13 -0500 Subject: p1_p2_rdb: Remove unused environment sections The CONFIG_USB_FAT_BOOT, CONFIG_USB_EXT2_BOOT and CONFIG_NORBOOT defines are not referenced anywhere, so remove them. Signed-off-by: Tom Rini --- include/configs/p1_p2_rdb_pc.h | 25 ------------------------- 1 file changed, 25 deletions(-) (limited to 'include') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 49c5aef3059..f86b96b2141 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -441,29 +441,4 @@ RST_PCIE_CMD(pciboot) \ RST_DEF_CMD(defboot) \ "" -#define CONFIG_USB_FAT_BOOT \ -"setenv bootargs root=/dev/ram rw " \ -"console=$consoledev,$baudrate $othbootargs " \ -"ramdisk_size=$ramdisk_size;" \ -"usb start;" \ -"fatload usb 0:2 $loadaddr $bootfile;" \ -"fatload usb 0:2 $fdtaddr $fdtfile;" \ -"fatload usb 0:2 $ramdiskaddr $ramdiskfile;" \ -"bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_USB_EXT2_BOOT \ -"setenv bootargs root=/dev/ram rw " \ -"console=$consoledev,$baudrate $othbootargs " \ -"ramdisk_size=$ramdisk_size;" \ -"usb start;" \ -"ext2load usb 0:4 $loadaddr $bootfile;" \ -"ext2load usb 0:4 $fdtaddr $fdtfile;" \ -"ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \ -"bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_NORBOOT \ -"setenv bootargs root=/dev/$jffs2nor rw " \ -"console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;" \ -"bootm $norbootaddr - $norfdtaddr" - #endif /* __CONFIG_H */ -- cgit v1.2.3 From 5732cf24ddfe010cd18de2233b9f175fa11f004f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:14 -0500 Subject: x530: Remove unused symbols The symbols CONFIG_UBI_PART and CONFIG_UBIFS_VOLUME are not referenced anywhere, drop them. Signed-off-by: Tom Rini --- include/configs/x530.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/x530.h b/include/configs/x530.h index c213dc6074b..4cf41f52fd7 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -51,7 +51,4 @@ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" -#define CONFIG_UBI_PART user -#define CONFIG_UBIFS_VOLUME user - #endif /* _CONFIG_X530_H */ -- cgit v1.2.3 From 5125e136a9a667ace526fbb968500ff39011e6b4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:15 -0500 Subject: arm: trats2: Set mmcdev directly Only this platform sets mmcdev via CONFIG_MMC_DEFAULT_DEV so we hard-code that default directly. Signed-off-by: Tom Rini --- include/configs/exynos4-common.h | 3 --- include/configs/s5p_goni.h | 3 --- include/configs/trats2.h | 2 +- 3 files changed, 1 insertion(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 81f450cde6c..bf965e5cedb 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -10,9 +10,6 @@ #include "exynos-common.h" -/* SD/MMC configuration */ -#define CONFIG_MMC_DEFAULT_DEV 0 - #define DFU_DEFAULT_POLL_TIMEOUT 300 /* USB Samsung's IDs */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index fdade1ee66f..97f5dd0e473 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -119,9 +119,6 @@ #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ -/* FLASH and environment organization */ -#define CONFIG_MMC_DEFAULT_DEV 0 - #define CFG_SYS_ONENAND_BASE 0xB0000000 #endif /* __CONFIG_H */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 0aa331e3935..4d39b4005bd 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -81,7 +81,7 @@ "${kernelname}\0" \ "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \ "${fdtfile}\0" \ - "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \ + "mmcdev=0\0" \ "mmcbootpart=2\0" \ "mmcrootpart=5\0" \ "opts=always_resume=1\0" \ -- cgit v1.2.3 From 2440b5bb523b004af43a1090e1a4134231702416 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:16 -0500 Subject: Convert CONFIG_HSMMC2_8BIT to Kconfig This converts the following to Kconfig: CONFIG_HSMMC2_8BIT Signed-off-by: Tom Rini --- include/configs/am335x_shc.h | 2 -- include/configs/am57xx_evm.h | 3 --- include/configs/cm_t43.h | 2 -- include/configs/dra7xx_evm.h | 3 --- include/configs/omap5_uevm.h | 3 --- 5 files changed, 13 deletions(-) (limited to 'include') diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 452887d6995..70645edcb14 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -20,8 +20,6 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#define CONFIG_HSMMC2_8BIT - #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index dacfd41cced..ba91f2b0545 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -35,9 +35,6 @@ #include -/* Enhance our eMMC support / experience. */ -#define CONFIG_HSMMC2_8BIT - /* CPSW Ethernet */ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index fcc17fc6b7c..8a18d6f97ab 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -36,8 +36,6 @@ * we don't need to do it twice. */ -#define CONFIG_HSMMC2_8BIT - #include #define V_OSCK 24000000 /* Clock output from T2 */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index ac3fcacc68e..b8f518612ee 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -48,9 +48,6 @@ #include -/* Enhance our eMMC support / experience. */ -#define CONFIG_HSMMC2_8BIT - /* * Default to using SPI for environment, etc. * 0x000000 - 0x040000 : QSPI.SPL (256KiB) diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index d7fa2d43914..39d0b403139 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -32,9 +32,6 @@ /* MMC ENV related defines */ -/* Enhance our eMMC support / experience. */ -#define CONFIG_HSMMC2_8BIT - /* Required support for the TCA642X GPIO we have on the uEVM */ #define CFG_SYS_I2C_TCA642X_BUS_NUM 4 #define CFG_SYS_I2C_TCA642X_ADDR 0x22 -- cgit v1.2.3 From 6bd2372094ab4827547ec0d3e5a258b72810cafd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:17 -0500 Subject: env: Rework ENV_IS_EMBEDDED and related logic slightly - Drop CONFIG_BUILD_ENVCRC as this is never set directly but instead means ENV_IS_EMBEDDED, so reference that in code and rename the Makefile usage to BUILD_ENVCRC. - Remove extra-$(CONFIG_ENV_IS_EMBEDDED) line as it could never be true, and likely why there is an extra- line for CONFIG_ENV_IS_IN_FLASH (the only use case today of embedded environments). - With these slight changes we can then see that using the calculated symbol of ENV_IS_EMBEDDED is the right thing to use in any code which needs to know this situation and can remove CONFIG_ENV_IS_EMBEDDED entirely. Signed-off-by: Tom Rini --- include/env_internal.h | 23 +---------------------- 1 file changed, 1 insertion(+), 22 deletions(-) (limited to 'include') diff --git a/include/env_internal.h b/include/env_internal.h index f30fd6159d8..aee6b3e48fa 100644 --- a/include/env_internal.h +++ b/include/env_internal.h @@ -41,10 +41,6 @@ (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) # define ENV_IS_EMBEDDED # endif -# ifdef CONFIG_ENV_IS_EMBEDDED -# error "do not define CONFIG_ENV_IS_EMBEDDED in your board config" -# error "it is calculated automatically for you" -# endif #endif /* CONFIG_ENV_IS_IN_FLASH */ #if defined(CONFIG_ENV_IS_IN_NAND) @@ -57,23 +53,6 @@ extern unsigned long nand_env_oob_offset; # endif /* CONFIG_ENV_OFFSET_OOB */ #endif /* CONFIG_ENV_IS_IN_NAND */ -/* - * For the flash types where embedded env is supported, but it cannot be - * calculated automatically (i.e. NAND), take the board opt-in. - */ -#if defined(CONFIG_ENV_IS_EMBEDDED) && !defined(ENV_IS_EMBEDDED) -# define ENV_IS_EMBEDDED -#endif - -/* The build system likes to know if the env is embedded */ -#ifdef DO_DEPS_ONLY -# ifdef ENV_IS_EMBEDDED -# ifndef CONFIG_ENV_IS_EMBEDDED -# define CONFIG_ENV_IS_EMBEDDED -# endif -# endif -#endif - #include "compiler.h" #ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT @@ -88,7 +67,7 @@ extern unsigned long nand_env_oob_offset; * If the environment is in RAM, allocate extra space for it in the malloc * region. */ -#if defined(CONFIG_ENV_IS_EMBEDDED) +#if defined(ENV_IS_EMBEDDED) #define TOTAL_MALLOC_LEN CONFIG_SYS_MALLOC_LEN #elif (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE < CONFIG_SYS_MONITOR_BASE) || \ (CONFIG_ENV_ADDR >= CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) || \ -- cgit v1.2.3 From 9b0240f8c6a1caa42da73835090fcb6db60f3d23 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:18 -0500 Subject: Convert CONFIG_DM9000_BYTE_SWAPPED et al to Kconfig This converts the following to Kconfig: CONFIG_DM9000_BYTE_SWAPPED CONFIG_DM9000_NO_SROM CONFIG_DM9000_USE_16BIT CONFIG_DM9000_DEBUG CONFIG_MXC_GPT_HCLK CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC Signed-off-by: Tom Rini --- include/configs/M5253DEMO.h | 6 ------ include/configs/at91sam9261ek.h | 7 ------- include/configs/brppt2.h | 2 -- include/configs/ci20.h | 7 ------- include/configs/devkit8000.h | 11 ----------- include/configs/mx6_common.h | 1 - include/configs/mx7_common.h | 1 - include/configs/omapl138_lcdk.h | 1 - 8 files changed, 36 deletions(-) (limited to 'include') diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 7e37c6d1199..ad55938348e 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -20,12 +20,6 @@ env/embedded.o(.text*); #ifdef CONFIG_DRIVER_DM9000 -# define CONFIG_DM9000_BASE (CFG_SYS_CS1_BASE | 0x300) -# define DM9000_IO CONFIG_DM9000_BASE -# define DM9000_DATA (CONFIG_DM9000_BASE + 4) -# undef CONFIG_DM9000_DEBUG -# define CONFIG_DM9000_BYTE_SWAPPED - # define CONFIG_OVERWRITE_ETHADDR_ONCE # define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 56247e390bf..39f6ff8a725 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -34,13 +34,6 @@ #endif -/* Ethernet */ -#define CONFIG_DM9000_BASE 0x30000000 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE + 4) -#define CONFIG_DM9000_USE_16BIT -#define CONFIG_DM9000_NO_SROM - /* USB */ #define CFG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index d35c7c4a591..80104b2d319 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -16,8 +16,6 @@ #define CFG_SYS_PL310_BASE L2_PL310_BASE #endif /* !CONFIG_SYS_L2CACHE_OFF */ -#define CONFIG_MXC_GPT_HCLK - /* MMC */ /* Boot */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 3329c24fa68..446d5c4f3da 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -17,11 +17,4 @@ /* NS16550-ish UARTs */ #define CFG_SYS_NS16550_CLK 48000000 -/* Ethernet: davicom DM9000 */ -#define CONFIG_DM9000_BASE 0xb6000000 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE + 2) - -/* Miscellaneous configuration options */ - #endif /* __CONFIG_CI20_H__ */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 46410595c2b..e3621fd6f9c 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -16,17 +16,6 @@ #include -/* Hardware drivers */ -/* DM9000 */ -#define CONFIG_DM9000_BASE 0x2c000000 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE + 0x400) -#define CONFIG_DM9000_USE_16BIT 1 -#define CONFIG_DM9000_NO_SROM 1 -#undef CONFIG_DM9000_DEBUG - -/* TWL4030 */ - /* BOOTP/DHCP options */ #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 245530aa640..dd8cabc2e93 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -16,7 +16,6 @@ #endif #endif -#define CONFIG_MXC_GPT_HCLK #include #include diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index d5af6990107..6e14b4fbf05 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -14,7 +14,6 @@ #include /* Timer settings */ -#define CONFIG_MXC_GPT_HCLK #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ /* Miscellaneous configurable options */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 788a1113868..f19211fe647 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -109,7 +109,6 @@ #define CFG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE #define CFG_SYS_NAND_MASK_CLE 0x10 #define CFG_SYS_NAND_MASK_ALE 0x8 -#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC #define CFG_SYS_NAND_U_BOOT_SIZE SZ_512K #define CFG_SYS_NAND_U_BOOT_DST 0xc1080000 #define CFG_SYS_NAND_U_BOOT_START CFG_SYS_NAND_U_BOOT_DST -- cgit v1.2.3 From 21491883d2af674f698a94699a5a8b7356d02adf Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:19 -0500 Subject: fec_mxc: Remove CONFIG_FEC_FIXED_SPEED support This option is only used on one platform currently. However, with PHYLIB enabled, which this platform also does, this option is not checked and the functional use case is handled. Remove this code. Signed-off-by: Tom Rini --- include/configs/brppt2.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 80104b2d319..984602c2cf7 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -78,9 +78,6 @@ BUR_COMMON_ENV \ #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* Ethernet */ -#define CONFIG_FEC_FIXED_SPEED _1000BASET - /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -- cgit v1.2.3 From 98fbad631f9973eb763d83571ec8dde00a94a76c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:20 -0500 Subject: Convert CONFIG_FLASH_SHOW_PROGRESS to Kconfig This converts the following to Kconfig: CONFIG_FLASH_SHOW_PROGRESS Signed-off-by: Tom Rini --- include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 2 -- include/configs/T102xRDB.h | 2 -- include/configs/T104xRDB.h | 2 -- include/configs/T208xQDS.h | 2 -- include/configs/T208xRDB.h | 2 -- include/configs/T4240RDB.h | 2 -- include/configs/blanche.h | 1 - include/configs/draak.h | 1 - include/configs/eb_cpu5282.h | 1 - include/configs/ebisu.h | 1 - include/configs/km/pg-wcom-ls102xa.h | 2 -- include/configs/ls1021aqds.h | 1 - include/configs/ls1021atwr.h | 2 -- include/configs/ls1043a_common.h | 4 ---- include/configs/ls1046aqds.h | 4 ---- include/configs/ls1088aqds.h | 2 -- include/configs/ls1088ardb.h | 2 -- include/configs/ls2080aqds.h | 2 -- include/configs/ls2080ardb.h | 2 -- include/configs/p1_p2_rdb_pc.h | 1 - include/configs/salvator-x.h | 1 - include/configs/ulcb.h | 1 - include/configs/zynq-common.h | 3 --- 24 files changed, 44 deletions(-) (limited to 'include') diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 4418d516956..f79c62adba3 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -161,7 +161,6 @@ extern unsigned long get_sdram_size(void); #define CFG_SYS_NOR_FTIM3 0x0 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ /* CFI for NOR Flash */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8b901ca47a0..707157e4a9a 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -101,8 +101,6 @@ #define PIXIS_LBMAP_SHIFT 4 #define PIXIS_LBMAP_ALTBANK 0x40 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC #define CFG_SYS_NAND_BASE 0xffa00000 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 623d4cf5562..b590f127392 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -158,8 +158,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} #ifdef CONFIG_TARGET_T1024RDB diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index b6938056bbe..9d805f446b4 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -126,8 +126,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} /* CPLD on IFC */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a93e05dd4d2..804b7ec4c1c 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -119,8 +119,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000, CFG_SYS_FLASH_BASE_PHYS} diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index cf65a0da188..d8213b4662f 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -114,8 +114,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS } /* CPLD on IFC */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index b51762264ad..958933689d3 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -184,8 +184,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0x0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS \ + 0x8000000, CFG_SYS_FLASH_BASE_PHYS} diff --git a/include/configs/blanche.h b/include/configs/blanche.h index cb28ae28dd3..fe09997e178 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -25,7 +25,6 @@ #if !defined(CONFIG_MTD_NOR_FLASH) #define CONFIG_SH_QSPI_BASE 0xE6B10000 #else -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BASE 0x00000000 #define CFG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ #define CFG_SYS_FLASH_BANKS_LIST { (CFG_SYS_FLASH_BASE) } diff --git a/include/configs/draak.h b/include/configs/draak.h index 8140bc469c5..946f1d96469 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -13,7 +13,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 21eab9b3a47..717f49ca29d 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -84,7 +84,6 @@ /*----------------------------------------------------------------------- * FLASH organization */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BASE CFG_SYS_CS0_BASE #define CFG_SYS_INT_FLASH_BASE 0xF0000000 diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index d1882a9646b..ad5944230a6 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -15,7 +15,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 7fe2ece8403..8d5b24d827d 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -58,8 +58,6 @@ FTIM2_NOR_TWP(0xb)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index d6681e85987..e49588489c1 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -60,7 +60,6 @@ FTIM2_NOR_TWP(0x1c)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_WRITE_SWAPPED_DATA #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS, \ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 3c4c207edd0..b07978a999e 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -92,8 +92,6 @@ FTIM2_NOR_TWPH(0x0e)) #define CFG_SYS_NOR_FTIM3 0 -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE_PHYS } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index a3fa92d1ff4..e54e903a8a9 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -90,10 +90,6 @@ #define CFG_SYS_FLASH_BASE 0x60000000 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 - -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#endif #endif #endif diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 553ae841cab..e9b8ad0c0b7 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -41,10 +41,6 @@ #define CFG_SYS_FLASH_BASE 0x60000000 #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #define CFG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 - -#ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#endif #endif /* LPUART */ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index a35045d640f..dc9cded49fd 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -62,8 +62,6 @@ #define CFG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ CFG_SYS_FLASH_BASE + 0x40000000} #endif diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 7bc4fc6a665..e2444cd8eb4 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -47,8 +47,6 @@ #define CFG_SYS_IFC_CCR 0x01000000 #ifndef SYS_NO_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE } #endif #endif diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 924d4057d93..4e6d40afbf1 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -64,8 +64,6 @@ #define CFG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ CFG_SYS_FLASH_BASE + 0x40000000} #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index c50b6030680..8f36958f710 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -61,8 +61,6 @@ #define CFG_SYS_IFC_CCR 0x01000000 #ifdef CONFIG_MTD_NOR_FLASH -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - #define CFG_SYS_FLASH_BANKS_LIST { CFG_SYS_FLASH_BASE,\ CFG_SYS_FLASH_BASE + 0x40000000} #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f86b96b2141..eb2c5a2d837 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -199,7 +199,6 @@ #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ /* Nand Flash */ #ifdef CONFIG_NAND_FSL_ELBC diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 2e422cd241e..8dc6702de48 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -13,7 +13,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index ab199bc726a..6e03375c6c3 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -13,7 +13,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_FLASH_SHOW_PROGRESS 45 #define CFG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CFG_SYS_WRITE_SWAPPED_DATA diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b8c142fed37..37b54289073 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -35,9 +35,6 @@ /* Ethernet driver */ /* NOR */ -#ifdef CONFIG_MTD_NOR_FLASH -# define CONFIG_FLASH_SHOW_PROGRESS 10 -#endif #ifdef CONFIG_USB_EHCI_ZYNQ # define DFU_DEFAULT_POLL_TIMEOUT 300 -- cgit v1.2.3 From 3a581af21af0bceb7e47650a19e3ddd3de87148a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:21 -0500 Subject: Convert CONFIG_FLASH_SPANSION_S29WS_N et al to Kconfig This converts the following to Kconfig: CONFIG_FLASH_SPANSION_S29WS_N CONFIG_FLASH_VERIFY CONFIG_FSL_FM_10GEC_REGULAR_NOTATION CONFIG_FSL_ISBC_KEY_EXT CONFIG_FSL_TRUST_ARCH_v1 CONFIG_FSL_SDHC_V2_3 CONFIG_MAX_DSP_CPUS CONFIG_MIU_2BIT_INTERLEAVED CONFIG_SERIAL_BOOT CONFIG_SPI_BOOTING CONFIG_X86EMU_RAW_IO Signed-off-by: Tom Rini --- include/configs/M53017EVB.h | 1 - include/configs/conga-qeval20-qa3-e3845.h | 1 - include/configs/dfi-bt700.h | 1 - include/configs/exynos5-dt-common.h | 1 - include/configs/mccmon6.h | 1 - include/configs/minnowmax.h | 1 - include/configs/smdkv310.h | 3 --- include/configs/som-db5800-som-6867.h | 1 - include/configs/stmark2.h | 4 ---- include/configs/theadorable-x86-common.h | 1 - include/configs/x86-chromebook.h | 1 - 11 files changed, 16 deletions(-) (limited to 'include') diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 42b74aeb9b5..439ed93a237 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -93,7 +93,6 @@ * FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI -# define CONFIG_FLASH_SPANSION_S29WS_N 1 # define CFG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ #endif diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 823d37fc38c..e9b85b4e1c7 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -17,7 +17,6 @@ "stderr=serial\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 52f2d50118a..154c4f4f13f 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -21,7 +21,6 @@ "stderr=serial\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index c9e0c13172c..8f2dac61cba 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -17,6 +17,5 @@ #define CFG_SYS_SPI_BASE 0x12D30000 #define FLASH_SIZE (4 << 20) -#define CONFIG_SPI_BOOTING #endif diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 7c401a2cfd6..a7f55076926 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -25,7 +25,6 @@ /* NOR 16-bit mode */ #define CFG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR -#define CONFIG_FLASH_VERIFY /* NOR Flash MTD */ #define CFG_SYS_FLASH_BANKS_LIST { (CFG_SYS_FLASH_BASE) } diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 50c52f8839b..6c15c72efda 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -18,6 +18,5 @@ "usb_pgood_delay=40\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #endif /* __CONFIG_H */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index af0c8200fc2..601c16ea453 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -34,9 +34,6 @@ /* FLASH and environment organization */ -/* MIU (Memory Interleaving Unit) */ -#define CONFIG_MIU_2BIT_INTERLEAVED - #define RESERVE_BLOCK_SIZE (512) #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h index ee038d83bc0..f0970921367 100644 --- a/include/configs/som-db5800-som-6867.h +++ b/include/configs/som-db5800-som-6867.h @@ -17,6 +17,5 @@ "stderr=serial,vidconsole\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #endif /* __CONFIG_H */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index faff8d6ed6d..f81cef0a2c4 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -63,10 +63,6 @@ #define CFG_SYS_DRAM_TEST -#if defined(CONFIG_CF_SBF) -#define CONFIG_SERIAL_BOOT -#endif - /* Reserve 256 kB for Monitor */ /* diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index af0a095dfc8..b57b1beaafe 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -16,7 +16,6 @@ "stderr=serial\0" #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO /* Environment settings */ diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index ec87eddd4c7..9df3bfd527f 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -11,7 +11,6 @@ #define CONFIG_X86_REFCODE_RUN_ADDR 0 #define VIDEO_IO_OFFSET 0 -#define CONFIG_X86EMU_RAW_IO #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ -- cgit v1.2.3 From 5388aa28511c75be387f6bfe868e03fa7505792a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:22 -0500 Subject: Convert CONFIG_FSL_ESDHC_PIN_MUX to Kconfig This converts the following to Kconfig: CONFIG_FSL_ESDHC_PIN_MUX Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index f312ffb37e2..dbfcdfb738b 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -177,7 +177,6 @@ #define CFG_SYS_PCIE2_IO_PHYS 0xD8000000 #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC_PIN_MUX #define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC83xx_ESDHC_ADDR #endif -- cgit v1.2.3 From b95de034c51bfeabde26e8ca6a11f25e91f2405b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:25 -0500 Subject: meson64: Fix missing CFG_SYS_BAUDRATE_TABLE migration CONFIG_SYS_BAUDRATE_TABLE has already been migrated to CFG_SYS but this instance was missed, correct. Signed-off-by: Tom Rini --- include/configs/meson64.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 6331b7615db..a22f7a81b00 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -18,7 +18,7 @@ /* Serial drivers */ /* The following table includes the supported baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE \ +#define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, \ 230400, 250000, 460800, 500000, 1000000, 2000000, 4000000, \ 8000000 } -- cgit v1.2.3 From 3f7a4965319920d0d029318399bbc0fe51ab0c08 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:26 -0500 Subject: Convert CONFIG_POWER_PCA9450 to Kconfig This converts the following to Kconfig: CONFIG_POWER_PCA9450 Signed-off-by: Tom Rini --- include/configs/imx8mp_evk.h | 8 -------- include/configs/imx8mp_icore_mx8mp.h | 7 ------- include/configs/phycore_imx8mp.h | 6 ------ include/configs/verdin-imx8mp.h | 3 --- 4 files changed, 24 deletions(-) (limited to 'include') diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 738677ff37c..137bd3b0952 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -12,14 +12,6 @@ #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD -/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ - - -#define CONFIG_POWER_PCA9450 - -#endif - #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 1 diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h index d67bad8971d..b261a81e44a 100644 --- a/include/configs/imx8mp_icore_mx8mp.h +++ b/include/configs/imx8mp_icore_mx8mp.h @@ -13,13 +13,6 @@ #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD -/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ - -#define CONFIG_POWER_PCA9450 - -#endif - #if defined(CONFIG_CMD_NET) #define CONFIG_FEC_MXC_PHYADDR 1 diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 11a833bb127..7a38382034a 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -13,12 +13,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD - -#define CONFIG_POWER_PCA9450 - -#endif - #define CONFIG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ "console=ttymxc0,115200\0" \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 88839a6e561..22dc364223c 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -19,9 +19,6 @@ #define CONFIG_MALLOC_F_ADDR 0x184000 /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_PCA9450 - -#define CONFIG_SYS_I2C #endif /* CONFIG_SPL_BUILD */ #define MEM_LAYOUT_ENV_SETTINGS \ -- cgit v1.2.3 From 54f80dd2908af0b851816cf062edf2d454948397 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:27 -0500 Subject: Convert CONFIG_HOSTNAME et al to Kconfig This converts the following to Kconfig: CONFIG_GATEWAYIP CONFIG_HOSTNAME CONFIG_IPADDR CONFIG_NETMASK CONFIG_ROOTPATH CONFIG_SERVERIP CONFIG_UBOOTPATH To do this, we introduce a CONFIG_USE_ form of each of the above and change include/env_default.h to test for that to be set before setting a value. Further, we don't want to stringify the IP address related values as they are now properly strings via Kconfig. Signed-off-by: Tom Rini --- include/configs/M5208EVBE.h | 8 -------- include/configs/M5235EVB.h | 9 +-------- include/configs/M5253DEMO.h | 2 -- include/configs/M5272C3.h | 8 -------- include/configs/M5282EVB.h | 8 -------- include/configs/M53017EVB.h | 8 -------- include/configs/M5329EVB.h | 8 -------- include/configs/M5373EVB.h | 8 -------- include/configs/MCR3000.h | 4 ---- include/configs/MPC837XERDB.h | 4 ---- include/configs/MPC8548CDS.h | 12 +----------- include/configs/P1010RDB.h | 5 +---- include/configs/P2041RDB.h | 4 +--- include/configs/T102xRDB.h | 4 +--- include/configs/T104xRDB.h | 4 +--- include/configs/T208xQDS.h | 4 +--- include/configs/T208xRDB.h | 4 +--- include/configs/T4240RDB.h | 4 +--- include/configs/amcore.h | 2 -- include/configs/apalis-imx8.h | 3 --- include/configs/apalis-tk1.h | 6 ------ include/configs/apalis_imx6.h | 6 ------ include/configs/aristainetos2.h | 2 -- include/configs/bcm_ns3.h | 2 -- include/configs/cobra5272.h | 3 --- include/configs/colibri-imx6ull.h | 4 ---- include/configs/colibri-imx8x.h | 4 ---- include/configs/colibri_imx6.h | 6 ------ include/configs/colibri_imx7.h | 4 ---- include/configs/colibri_vf.h | 4 ---- include/configs/controlcenterdc.h | 3 --- include/configs/gazerbeam.h | 4 ---- include/configs/gw_ventana.h | 2 -- include/configs/integratorcp.h | 3 --- include/configs/kontron-sl-mx6ul.h | 1 - include/configs/kontron-sl-mx8mm.h | 1 - include/configs/m53menlo.h | 1 - include/configs/microblaze-generic.h | 2 -- include/configs/mt7622.h | 2 -- include/configs/mt7623.h | 2 -- include/configs/mt7629.h | 2 -- include/configs/mvebu_alleycat-5.h | 5 ----- include/configs/novena.h | 1 - include/configs/npi_imx6ull.h | 2 -- include/configs/opos6uldev.h | 2 -- include/configs/p1_p2_rdb_pc.h | 5 +---- include/configs/poleg.h | 3 --- include/configs/qemu-ppce500.h | 2 -- include/configs/siemens-am33x-common.h | 2 -- include/configs/socfpga_vining_fpga.h | 1 - include/configs/stm32mp15_common.h | 3 --- include/configs/stmark2.h | 2 -- include/configs/uniphier.h | 6 ------ include/configs/usbarmory.h | 1 - include/configs/x86-common.h | 2 -- include/configs/xea.h | 1 - include/env_default.h | 22 +++++++++++----------- 57 files changed, 21 insertions(+), 216 deletions(-) (limited to 'include') diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index b360238b332..e14650fe0d4 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -17,14 +17,6 @@ /* I2C */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* CONFIG_MCFFEC */ - -#define CONFIG_HOSTNAME "M5208EVBe" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index ed45eccb62c..220524bfaed 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -26,14 +26,7 @@ #define CFG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) /* this must be included AFTER the definition of CONFIG COMMANDS (if any) */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* FEC_ENET */ - -#define CONFIG_HOSTNAME "M5235EVB" + #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index ad55938348e..65a7aa04086 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -36,8 +36,6 @@ "" #endif -#define CONFIG_HOSTNAME "M5253DEMO" - /* I2C */ #define CFG_SYS_I2C_PINMUX_REG (*(u32 *) (CFG_SYS_MBAR+0x19C)) #define CFG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index a9339e50525..c58d19c810f 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -29,14 +29,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* CONFIG_MCFFEC */ - -#define CONFIG_HOSTNAME "M5272C3" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index bde9e770e52..e23439fd782 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -29,14 +29,6 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*); -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* CONFIG_MCFFEC */ - -#define CONFIG_HOSTNAME "M5282EVB" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 439ed93a237..ac2bd0b2241 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -30,14 +30,6 @@ /* I2C */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* FEC_ENET */ - -#define CONFIG_HOSTNAME "M53017" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 72f0c63a1e2..a86a117fd8f 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -22,14 +22,6 @@ /* I2C */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* FEC_ENET */ - -#define CONFIG_HOSTNAME "M5329EVB" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 4e8b54e01f4..b2ad03cc3cb 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -24,14 +24,6 @@ /* I2C */ -#ifdef CONFIG_MCFFEC -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 -#endif /* FEC_ENET */ - -#define CONFIG_HOSTNAME "M5373EVB" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 232cf9e9984..f8368823aac 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -52,10 +52,6 @@ "${ofl_args}; " \ "bootm ${loadaddr} - 0xf00000\0" -#define CONFIG_IPADDR 192.168.0.3 -#define CONFIG_SERVERIP 192.168.0.1 -#define CONFIG_NETMASK 255.0.0.0 - /* Miscellaneous configurable options */ /* Definitions for initial stack pointer and data area (in DPRAM) */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index dbfcdfb738b..7dff3cc6913 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -197,10 +197,6 @@ #define CONFIG_NETDEV "eth1" -#define CONFIG_HOSTNAME "mpc837x_rdb" -#define CONFIG_ROOTPATH "/nfsroot" - /* U-Boot image on TFTP server */ -#define CONFIG_UBOOTPATH "u-boot.bin" #define CONFIG_FDTFILE "mpc8379_rdb.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 34b876f829e..1f1eacdb691 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -298,20 +298,10 @@ * Environment Configuration */ -#define CONFIG_IPADDR 192.168.1.253 - -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_UBOOTPATH 8548cds/u-boot.bin /* TFTP server */ - -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ecc=off\0" \ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ "protect off " __stringify(CONFIG_TEXT_BASE) \ " +$filesize; " \ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index f79c62adba3..d83563d6181 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -380,13 +380,10 @@ extern unsigned long get_sdram_size(void); * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "loadaddr=1000000\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=2000000\0" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 707157e4a9a..0f0cdb3a681 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -306,8 +306,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin #define __USB_PHY_TYPE utmi @@ -315,7 +313,7 @@ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ "bank_intlv=cs0_cs1\0" \ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index b590f127392..e815d9f81a1 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -421,8 +421,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi #ifdef CONFIG_ARCH_T1024 @@ -441,7 +439,7 @@ ARCH_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "bootargs=root=/dev/ram rw console=ttyS0,115200\0" \ "netdev=eth0\0" \ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9d805f446b4..6fe0bd68280 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -411,8 +411,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define __USB_PHY_TYPE utmi #define RAMDISKFILE "t104xrdb/ramdisk.uboot" @@ -434,7 +432,7 @@ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ "usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 804b7ec4c1c..79b3d7af4ea 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -419,8 +419,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi @@ -430,7 +428,7 @@ "bank_intlv=auto;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index d8213b4662f..2a32fe37aa9 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -385,8 +385,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi @@ -396,7 +394,7 @@ "bank_intlv=auto;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 958933689d3..d8c4de5b3d7 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -138,8 +138,6 @@ /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define HVBOOT \ "setenv bootargs config-addr=0x60000000; " \ @@ -386,7 +384,7 @@ "bank_intlv=auto;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "uboot=" CONFIG_UBOOTPATH "\0" \ "ubootaddr=" __stringify(CONFIG_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ "protect off $ubootaddr +$filesize && " \ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ee0be972d24..ca29346fe64 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -8,8 +8,6 @@ #ifndef __AMCORE_CONFIG_H #define __AMCORE_CONFIG_H -#define CONFIG_HOSTNAME "AMCORE" - #define CFG_SYS_UART_PORT 0 #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index cf23837863b..aa3dcf4a881 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -14,9 +14,6 @@ #define USDHC2_BASE_ADDR 0x5b020000 /* Networking */ -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x84000000\0" \ diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index f0a02ae1795..1d478078b2c 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -33,12 +33,6 @@ func(PXE, pxe, na) \ func(DHCP, dhcp, na) -#undef CONFIG_IPADDR -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#undef CONFIG_SERVERIP -#define CONFIG_SERVERIP 192.168.10.1 - #define DFU_ALT_EMMC_INFO "apalis-tk1.img raw 0x0 0x500 mmcpart 1; " \ "boot part 0 1 mmcpart 0; " \ "rootfs part 0 2 mmcpart 0; " \ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index a3c86545f07..25a84458f55 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -35,12 +35,6 @@ /* Command definition */ -#undef CONFIG_IPADDR -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#undef CONFIG_SERVERIP -#define CONFIG_SERVERIP 192.168.10.1 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 6faf544d21b..85413545715 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -11,8 +11,6 @@ #ifndef __ARISTAINETOS2_CONFIG_H #define __ARISTAINETOS2_CONFIG_H -#define CONFIG_HOSTNAME "aristainetos2" - #if (CONFIG_SYS_BOARD_VERSION == 5) #define CONSOLE_DEV "ttymxc1" #elif (CONFIG_SYS_BOARD_VERSION == 6) diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index b5469880fe2..fc176dc2014 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -9,8 +9,6 @@ #include -#define CONFIG_HOSTNAME "NS3" - /* Physical Memory Map */ #define V2M_BASE 0x80000000 #define PHYS_SDRAM_1 V2M_BASE diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 6d6e2fc6962..8c83c3ac06a 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -91,9 +91,6 @@ enter a valid image address in flash */ /* User network settings */ -#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */ -#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */ - #endif /*---*/ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index c0c3b4e0359..2f09a264cbe 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -20,10 +20,6 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 #define CFG_SYS_FSL_USDHC_NUM 1 -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - #if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC) #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 6002d8d5c9f..215c633a4c9 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -14,10 +14,6 @@ #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x83000000\0" \ "kernel_addr_r=0x81000000\0" \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 60a3862a4d1..19daad21cb5 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -30,12 +30,6 @@ /* Command definition */ -#undef CONFIG_IPADDR -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#undef CONFIG_SERVERIP -#define CONFIG_SERVERIP 192.168.10.1 - #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 32a79b02554..48c3f015473 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -21,10 +21,6 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #endif -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - #if defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC) #define UBOOT_UPDATE \ "uboot_hwpart=1\0" \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index fa778ec9e2b..8a790400b46 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -16,10 +16,6 @@ /* NAND support */ -#define CONFIG_IPADDR 192.168.10.2 -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_SERVERIP 192.168.10.1 - #define CONFIG_FDTADDR 0x84000000 #define MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 5da2778b67b..119a834fe74 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -21,9 +21,6 @@ * Environment Configuration */ -#define CONFIG_HOSTNAME "ccdc" -#define CONFIG_ROOTPATH "/opt/nfsroot" - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth1\0" \ "consoledev=ttyS1\0" \ diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 36dcee87c5f..671b75e6986 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -55,10 +55,6 @@ * Environment Configuration */ -/* TODO: Turn into string option and migrate to Kconfig */ -#define CONFIG_HOSTNAME "gazerbeam" -#define CONFIG_ROOTPATH "/opt/nfsroot" - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS1\0" \ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 4d0a78c6269..298a8f5aa2a 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -57,7 +57,5 @@ /* Persistent Environment Config */ /* Environment */ -#define CONFIG_IPADDR 192.168.1.1 -#define CONFIG_SERVERIP 192.168.1.146 #endif /* __CONFIG_H */ diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 25bb41ebc46..596e4ff8c3b 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -19,9 +19,6 @@ /* Integrator CP-specific configuration */ #define CFG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ -#define CONFIG_SERVERIP 192.168.1.100 -#define CONFIG_IPADDR 192.168.1.104 - /* * Miscellaneous configurable options */ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 6fcacdb0c66..7c5f673c0f4 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -23,7 +23,6 @@ /* Board and environment settings */ #define CONFIG_MXC_UART_BASE UART4_BASE -#define CONFIG_HOSTNAME "kontron-mx6ul" #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index 80a32304606..beb1926c12a 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -23,7 +23,6 @@ #define CFG_SYS_INIT_RAM_SIZE 0x200000 /* Board and environment settings */ -#define CONFIG_HOSTNAME "kontron-mx8mm" #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 66591390d90..189b2113f75 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -84,7 +84,6 @@ /* * Extra Environments */ -#define CONFIG_HOSTNAME "m53menlo" #define CONFIG_EXTRA_ENV_SETTINGS \ "consdev=ttymxc0\0" \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index edd2466caa9..b8b08974c7e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -16,8 +16,6 @@ # define CFG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -#define CONFIG_HOSTNAME "microblaze-generic" - /* architecture dependent code */ #if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP) #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na) diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index 8c297266d8b..65415129534 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -18,7 +18,5 @@ #define CFG_SYS_SDRAM_BASE 0x40000000 /* Ethernet */ -#define CONFIG_IPADDR 192.168.1.1 -#define CONFIG_SERVERIP 192.168.1.3 #endif diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 39a7ba76633..93161bd24f0 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -33,8 +33,6 @@ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" /* Ethernet */ -#define CONFIG_IPADDR 192.168.1.1 -#define CONFIG_SERVERIP 192.168.1.2 #ifdef CONFIG_DISTRO_DEFAULTS diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index bfa44aacc72..99b09ad41e7 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -28,7 +28,5 @@ #define CFG_SYS_SDRAM_BASE 0x40000000 /* Ethernet */ -#define CONFIG_IPADDR 192.168.1.1 -#define CONFIG_SERVERIP 192.168.1.2 #endif diff --git a/include/configs/mvebu_alleycat-5.h b/include/configs/mvebu_alleycat-5.h index 5c9620371e3..3ad3aefa755 100644 --- a/include/configs/mvebu_alleycat-5.h +++ b/include/configs/mvebu_alleycat-5.h @@ -15,11 +15,6 @@ 115200, 230400, 460800, 921600 } /* Default Env vars */ -#define CONFIG_IPADDR 0.0.0.0 /* In order to cause an error */ -#define CONFIG_SERVERIP 0.0.0.0 /* In order to cause an error */ -#define CONFIG_NETMASK 255.255.255.0 -#define CONFIG_GATEWAYIP 0.0.0.0 -#define CONFIG_ROOTPATH "/srv/nfs/" /* Default Dir for NFS */ #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ diff --git a/include/configs/novena.h b/include/configs/novena.h index 4e46dfc526c..6e4bdce1c08 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -25,7 +25,6 @@ */ /* Booting Linux */ -#define CONFIG_HOSTNAME "novena" /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 09c4ddb6646..2eebd0c9a45 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -18,8 +18,6 @@ /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_NETMASK 255.255.255.0 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index e42a736136b..5c44b9dcb20 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -27,6 +27,4 @@ /* LCD */ #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR -#define CONFIG_ROOTPATH "/tftpboot/opos6ul-root" - #endif /* __OPOS6ULDEV_CONFIG_H */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index eb2c5a2d837..ee25990b034 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -396,15 +396,12 @@ /* * Environment Configuration */ -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #include "p1_p2_bootsrc.h" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ -"uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ +"uboot=" CONFIG_UBOOTPATH "\0" \ "loadaddr=1000000\0" \ "bootfile=uImage\0" \ "tftpflash=tftpboot $loadaddr $uboot; " \ diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 518d7a3639c..075729e5d37 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -14,9 +14,6 @@ #define CFG_SYS_SDRAM_BASE 0x0 /* Default environemnt variables */ -#define CONFIG_SERVERIP 192.168.0.1 -#define CONFIG_IPADDR 192.168.0.2 -#define CONFIG_NETMASK 255.255.255.0 #define CONFIG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \ "stdout=serial\0" \ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 30a9eae8523..d0561899586 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -58,7 +58,5 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); /* * Environment Configuration */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #endif /* __QEMU_PPCE500_H */ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 5a001716fb0..1b1787a3d3c 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -17,8 +17,6 @@ /* commands to include */ -#define CONFIG_ROOTPATH "/opt/eldk" - /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 70d9f3607a6..d88b07bc159 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -13,7 +13,6 @@ /* Booting Linux */ /* Extra Environment */ -#define CONFIG_HOSTNAME "socfpga_vining_fpga" /* * Active LOW GPIO buttons: diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index c9cfadd9ce0..9715dfad1c9 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -24,9 +24,6 @@ /* NAND support */ /* Ethernet need */ -#ifdef CONFIG_DWC_ETH_QOS -#define CONFIG_SERVERIP 192.168.1.1 -#endif #define STM32MP_FIP_IMAGE_GUID \ EFI_GUID(0x19d5df83, 0x11b0, 0x457b, 0xbe, 0x2c, \ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index f81cef0a2c4..ce941d832a5 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -8,8 +8,6 @@ #ifndef __STMARK2_CONFIG_H #define __STMARK2_CONFIG_H -#define CONFIG_HOSTNAME "stmark2" - #define CFG_SYS_UART_PORT 0 #define LDS_BOARD_TEXT \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 8cd81f1cddd..7fee64029d8 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -46,10 +46,6 @@ /* * Network Configuration */ -#define CONFIG_SERVERIP 192.168.11.1 -#define CONFIG_IPADDR 192.168.11.10 -#define CONFIG_GATEWAYIP 192.168.11.1 -#define CONFIG_NETMASK 255.255.255.0 #if defined(CONFIG_ARM64) /* ARM Trusted Firmware */ @@ -62,8 +58,6 @@ "third_image=u-boot.bin\0" #endif -#define CONFIG_ROOTPATH "/nfs/root/path" - #ifdef CONFIG_FIT #define KERNEL_ADDR_R_OFFSET "0x05100000" #define LINUXBOOT_ENV_SETTINGS \ diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index a2bc3cd23a5..7f79c6342fc 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -28,7 +28,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* Linux boot */ -#define CONFIG_HOSTNAME "usbarmory" #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0) diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 3e17b53dde2..9bf2462010d 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -41,8 +41,6 @@ */ /* Default environment */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_HOSTNAME "x86" #define CONFIG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) #define CONFIG_OTHBOOTARGS "othbootargs=\0" diff --git a/include/configs/xea.h b/include/configs/xea.h index b432ab2dc8e..a3dc0c74ebb 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -26,7 +26,6 @@ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Extra Environment */ -#define CONFIG_HOSTNAME "xea" #define CONFIG_EXTRA_ENV_SETTINGS \ "bootmode=update\0" \ diff --git a/include/env_default.h b/include/env_default.h index 7c9c00a9692..3b7685ee26c 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -53,11 +53,11 @@ const char default_environment[] = { #ifdef CONFIG_ETHPRIME "ethprime=" CONFIG_ETHPRIME "\0" #endif -#ifdef CONFIG_IPADDR - "ipaddr=" __stringify(CONFIG_IPADDR) "\0" +#ifdef CONFIG_USE_IPADDR + "ipaddr=" CONFIG_IPADDR "\0" #endif -#ifdef CONFIG_SERVERIP - "serverip=" __stringify(CONFIG_SERVERIP) "\0" +#ifdef CONFIG_USE_SERVERIP + "serverip=" CONFIG_SERVERIP "\0" #endif #ifdef CONFIG_SYS_DISABLE_AUTOLOAD "autoload=0\0" @@ -65,17 +65,17 @@ const char default_environment[] = { #ifdef CONFIG_PREBOOT_DEFINED "preboot=" CONFIG_PREBOOT "\0" #endif -#ifdef CONFIG_ROOTPATH +#ifdef CONFIG_USE_ROOTPATH "rootpath=" CONFIG_ROOTPATH "\0" #endif -#ifdef CONFIG_GATEWAYIP - "gatewayip=" __stringify(CONFIG_GATEWAYIP) "\0" +#ifdef CONFIG_USE_GATEWAYIP + "gatewayip=" CONFIG_GATEWAYIP "\0" #endif -#ifdef CONFIG_NETMASK - "netmask=" __stringify(CONFIG_NETMASK) "\0" +#ifdef CONFIG_USE_NETMASK + "netmask=" CONFIG_NETMASK "\0" #endif -#ifdef CONFIG_HOSTNAME - "hostname=" CONFIG_HOSTNAME "\0" +#ifdef CONFIG_USE_HOSTNAME + "hostname=" CONFIG_HOSTNAME "\0" #endif #ifdef CONFIG_USE_BOOTFILE "bootfile=" CONFIG_BOOTFILE "\0" -- cgit v1.2.3 From b5f7d8816225f869e3fd63d78d017308af0ac224 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:28 -0500 Subject: arm: samsung: Rename CONFIG_G_DNL_*_NUM variables Following how g_dnl_bind_fixup is used on other platforms, rename the unchanging defines used here to be prefixed with EXYNOS rather than Samsung, and define them here. Cc: Minkyu Kang Cc: Jaehoon Chung Signed-off-by: Tom Rini --- include/configs/dh_imx6.h | 4 ---- include/configs/exynos4-common.h | 6 ------ include/configs/odroid_xu3.h | 8 -------- include/configs/s5p_goni.h | 7 ------- include/configs/socfpga_common.h | 4 ---- 5 files changed, 29 deletions(-) (limited to 'include') diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index f9b3d19480e..3aed6299ed5 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -38,10 +38,6 @@ /* USB Gadget (DFU, UMS) */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) #define DFU_DEFAULT_POLL_TIMEOUT 300 - -/* USB IDs */ -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 #endif #endif diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index bf965e5cedb..e8c182bc2f3 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -12,12 +12,6 @@ #define DFU_DEFAULT_POLL_TIMEOUT 300 -/* USB Samsung's IDs */ -#define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8 -#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 - /* Common environment variables */ #define ENV_ITB \ "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 5bbe7aadcb2..bf63a4de076 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -20,14 +20,6 @@ #define DFU_DEFAULT_POLL_TIMEOUT 300 #define DFU_MANIFEST_POLL_TIMEOUT 25000 -/* THOR */ -#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_USB_GADGET_VENDOR_NUM -#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D - -/* UMS */ -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 - #define CONFIG_DFU_ALT_SYSTEM \ "uImage fat 0 1;" \ "zImage fat 0 1;" \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 97f5dd0e473..da83db1f68a 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -24,13 +24,6 @@ /* USB Composite download gadget - g_dnl */ #define DFU_DEFAULT_POLL_TIMEOUT 300 -/* USB Samsung's IDs */ - -#define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8 -#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 - /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ /* partitions definitions */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bbbdea6664c..088cd4d4f7f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -83,10 +83,6 @@ */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) #define DFU_DEFAULT_POLL_TIMEOUT 300 - -/* USB IDs */ -#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 -#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 #endif /* -- cgit v1.2.3 From 1353b25ec58eba4cd26f4101ebb1b6047838a105 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:30 -0500 Subject: i2c: Remove CONFIG_I2C_MULTI_BUS This functionality is part of the legacy I2C subsystem and is currently unused anywhere. Remove the remaining references. Signed-off-by: Tom Rini --- include/configs/display5.h | 3 --- include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/novena.h | 3 --- 3 files changed, 7 deletions(-) (limited to 'include') diff --git a/include/configs/display5.h b/include/configs/display5.h index 7636d2869a9..5cbeb9224c3 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -36,9 +36,6 @@ #define CONFIG_MXC_UART_BASE UART5_BASE -/* I2C Configs */ -#define CONFIG_I2C_MULTI_BUS - /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 8d5b24d827d..ffd394691a0 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -149,7 +149,6 @@ * I2C */ -#define CONFIG_I2C_MULTI_BUS #define CFG_SYS_I2C_MAX_HOPS 1 #define CFG_SYS_NUM_I2C_BUSES 3 #define I2C_MUX_PCA_ADDR 0x70 diff --git a/include/configs/novena.h b/include/configs/novena.h index 6e4bdce1c08..79e49c74f85 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -33,9 +33,6 @@ #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE -/* I2C */ -#define CONFIG_I2C_MULTI_BUS - /* I2C EEPROM */ /* MMC Configs */ -- cgit v1.2.3 From 308520b8f2b11b3427fe8a02171839992bc85da6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:31 -0500 Subject: global: Remove unused CONFIG symbols This removes the following unreferenced CONFIG symbols: CONFIG_FDTADDR CONFIG_FDTFILE CONFIG_FLASH_SECTOR_SIZE CONFIG_FSL_CPLD CONFIG_HDMI_ENCODER_I2C_ADDR CONFIG_I2C_MVTWSI CONFIG_I2C_RTC_ADDR CONFIG_IRAM_END CONFIG_IRAM_SIZE CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE CONFIG_L1_INIT_RAM CONFIG_MACB_SEARCH_PHY CONFIG_MIU_2BIT_21_7_INTERLEAVED CONFIG_MTD_NAND_VERIFY_WRITE CONFIG_MVGBE_PORTS CONFIG_NETDEV CONFIG_NUM_DSP_CPUS CONFIG_PHY_BASE_ADR CONFIG_PHY_INTERFACE_MODE CONFIG_PSRAM_SCFG CONFIG_RAMBOOT_SPIFLASH CONFIG_RAMBOOT_TEXT_BASE CONFIG_RD_LVL CONFIG_ROCKCHIP_SDHCI_MAX_FREQ CONFIG_SETUP_INITRD_TAG CONFIG_SH_QSPI_BASE CONFIG_SMDK5420 CONFIG_SOCRATES CONFIG_SPI_ADDR CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX CONFIG_SPI_N25Q256A_RESET CONFIG_TEGRA_SLINK_CTRLS CONFIG_TPM_TIS_BASE_ADDRESS CONFIG_UBOOT_SECTOR_COUNT CONFIG_UBOOT_SECTOR_START CONFIG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM And also: BL1_SIZE PHY_NO RESERVE_BLOCK_SIZE Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 8 +++----- include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 9 ++------- include/configs/SBx81LIFKW.h | 9 --------- include/configs/SBx81LIFXCAT.h | 9 --------- include/configs/T102xRDB.h | 2 -- include/configs/T104xRDB.h | 4 ---- include/configs/T208xQDS.h | 2 -- include/configs/T208xRDB.h | 2 -- include/configs/T4240RDB.h | 3 --- include/configs/alt.h | 3 --- include/configs/ax25-ae350.h | 3 --- include/configs/beaver.h | 4 ---- include/configs/blanche.h | 4 +--- include/configs/cardhu.h | 4 ---- include/configs/cei-tk1-som.h | 3 --- include/configs/colibri_vf.h | 4 ---- include/configs/dalmore.h | 3 --- include/configs/dns325.h | 7 ------- include/configs/dockstar.h | 6 ------ include/configs/dra7xx_evm.h | 1 - include/configs/dreamplug.h | 6 ------ include/configs/ds109.h | 8 -------- include/configs/eb_cpu5282.h | 8 -------- include/configs/efi-x86_app.h | 2 -- include/configs/embestmx6boards.h | 6 +++--- include/configs/ethernut5.h | 1 - include/configs/exynos5-common.h | 2 -- include/configs/exynos5420-common.h | 2 -- include/configs/exynos7420-common.h | 4 ---- include/configs/goflexhome.h | 6 ------ include/configs/guruplug.h | 8 -------- include/configs/ib62x0.h | 8 -------- include/configs/iconnect.h | 10 ---------- include/configs/jetson-tk1.h | 5 ----- include/configs/k2e_evm.h | 1 - include/configs/k2g_evm.h | 1 - include/configs/k2l_evm.h | 1 - include/configs/kmcent2.h | 1 - include/configs/kontron_sl28.h | 1 - include/configs/lacie_kw.h | 7 ------- include/configs/legoev3.h | 1 - include/configs/ls1028a_common.h | 1 - include/configs/ls1043a_common.h | 1 - include/configs/ls1043aqds.h | 1 - include/configs/ls1043ardb.h | 1 - include/configs/ls1046a_common.h | 1 - include/configs/ls1046afrwy.h | 1 - include/configs/ls1046aqds.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/ls1088a_common.h | 1 - include/configs/ls1088aqds.h | 1 - include/configs/ls1088ardb.h | 1 - include/configs/ls2080a_common.h | 1 - include/configs/ls2080aqds.h | 1 - include/configs/ls2080ardb.h | 1 - include/configs/lx2160a_common.h | 1 - include/configs/malta.h | 2 -- include/configs/mt7621.h | 1 - include/configs/mt7629.h | 5 +---- include/configs/mxs.h | 5 ----- include/configs/nas220.h | 12 ------------ include/configs/nsa310s.h | 4 ---- include/configs/nyan-big.h | 3 --- include/configs/openrd.h | 22 ---------------------- include/configs/origen.h | 6 ------ include/configs/p2371-0000.h | 3 --- include/configs/p2371-2180.h | 3 --- include/configs/p2571.h | 3 --- include/configs/p3450-0000.h | 3 --- include/configs/pm9263.h | 5 ----- include/configs/pogo_e02.h | 6 ------ include/configs/pogo_v4.h | 6 ------ include/configs/porter.h | 3 --- include/configs/qemu-ppce500.h | 1 - include/configs/rcar-gen3-common.h | 1 - include/configs/rk3399_common.h | 10 ---------- include/configs/sheevaplug.h | 6 ------ include/configs/silk.h | 3 --- include/configs/smdk5420.h | 2 -- include/configs/smdkv310.h | 3 --- include/configs/socfpga_sr1500.h | 6 ------ include/configs/socrates.h | 4 ---- include/configs/stout.h | 3 --- include/configs/synquacer.h | 1 - include/configs/tec-ng.h | 6 ------ include/configs/venice2.h | 3 --- include/configs/vinco.h | 3 --- include/configs/x86-common.h | 16 ---------------- include/configs/xpress.h | 7 ++----- 90 files changed, 12 insertions(+), 350 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 7dff3cc6913..7b932eb3890 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -195,12 +195,10 @@ * Environment Configuration */ -#define CONFIG_NETDEV "eth1" - -#define CONFIG_FDTFILE "mpc8379_rdb.dtb" +#define FDTFILE "mpc8379_rdb.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=" CONFIG_NETDEV "\0" \ + "netdev=eth1\0" \ "uboot=" CONFIG_UBOOTPATH "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ "protect off " __stringify(CONFIG_TEXT_BASE) \ @@ -214,7 +212,7 @@ "cmp.b $loadaddr " __stringify(CONFIG_TEXT_BASE) \ " $filesize\0" \ "fdtaddr=780000\0" \ - "fdtfile=" CONFIG_FDTFILE "\0" \ + "fdtfile=" FDTFILE "\0" \ "ramdiskaddr=1000000\0" \ "ramdiskfile=rootfs.ext2.gz.uboot\0" \ "console=ttyS0\0" \ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index d83563d6181..02d49c3d340 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -24,7 +24,6 @@ #ifdef CONFIG_SPIFLASH #ifdef CONFIG_NXP_ESBC -#define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #else #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 0f0cdb3a681..1a157a7da05 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -12,7 +12,6 @@ #define __CONFIG_H #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #endif @@ -46,10 +45,9 @@ /* * Config the L3 Cache as L3 SRAM */ -#define CFG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE +#define CFG_SYS_INIT_L3_ADDR CONFIG_TEXT_BASE #ifdef CONFIG_PHYS_64BIT -#define CFG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | \ - CONFIG_RAMBOOT_TEXT_BASE) +#define CFG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | CONFIG_TEXT_BASE) #else #define CFG_SYS_INIT_L3_ADDR_PHYS CFG_SYS_INIT_L3_ADDR #endif @@ -62,7 +60,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -88,7 +85,6 @@ #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #endif -#define CONFIG_FSL_CPLD #define CPLD_BASE 0xffdf0000 /* CPLD registers */ #ifdef CONFIG_PHYS_64BIT #define CPLD_BASE_PHYS 0xfffdf0000ull @@ -131,7 +127,6 @@ #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS + 0x8000000} /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #ifdef CONFIG_PHYS_64BIT #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index d5c9c05767a..19ae6399476 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -36,14 +36,5 @@ /* size in bytes reserved for initial data */ #include -/* There is no PHY directly connected so don't ask it for link status */ - -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ -#define CONFIG_PHY_BASE_ADR 0x01 -#endif /* CONFIG_CMD_NET */ #endif /* _CONFIG_SBX81LIFKW_H */ diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 23d37394e07..bdbf9d4758b 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -41,14 +41,5 @@ /* size in bytes reserved for initial data */ #include -/* There is no PHY directly connected so don't ask it for link status */ - -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */ -#define CONFIG_PHY_BASE_ADR 0x01 -#endif /* CONFIG_CMD_NET */ #endif /* _CONFIG_SBX81LIFXCAT_H */ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index e815d9f81a1..4b443c75042 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -112,7 +112,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #if defined(CONFIG_TARGET_T1024RDB) @@ -269,7 +268,6 @@ #endif /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #ifdef CONFIG_PHYS_64BIT #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 6fe0bd68280..dfad76e16f1 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -86,7 +86,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -247,7 +246,6 @@ #endif /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 @@ -285,8 +283,6 @@ */ #define CFG_SYS_I2C_RTC_ADDR 0x68 -/*DVI encoder*/ -#define CONFIG_HDMI_ENCODER_I2C_ADDR 0x75 #endif /* diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 79b3d7af4ea..24c1daf9985 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -78,7 +78,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ @@ -245,7 +244,6 @@ #endif /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 2a32fe37aa9..c825e7fa0c6 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -78,7 +78,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE #define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ @@ -210,7 +209,6 @@ #endif /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index d8c4de5b3d7..95735f3fcb1 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -16,7 +16,6 @@ #ifdef CONFIG_RAMBOOT_PBL #ifndef CONFIG_SDCARD -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define RESET_VECTOR_OFFSET 0x27FFC @@ -60,7 +59,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE @@ -71,7 +69,6 @@ #define CFG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CFG_SYS_FLASH_BASE) /* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM #define CFG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ #define CFG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf #define CFG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe03c000 diff --git a/include/configs/alt.h b/include/configs/alt.h index fe303fda78a..f2774001692 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -20,9 +20,6 @@ #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) -/* FLASH */ -#define CONFIG_SPI_FLASH_QUAD - /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 03e04e6e680..d70f0382300 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -49,9 +49,6 @@ */ #define CFG_SYS_FLASH_BANKS_SIZES {0x4000000} -/* max number of sectors on one chip */ -#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2) - /* environments */ /* SPI FLASH */ diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 6b5f650811b..7078c2745c8 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -20,10 +20,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index fe09997e178..d4e0f677e67 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -22,9 +22,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* FLASH */ -#if !defined(CONFIG_MTD_NOR_FLASH) -#define CONFIG_SH_QSPI_BASE 0xE6B10000 -#else +#if defined(CONFIG_MTD_NOR_FLASH) #define CFG_SYS_FLASH_BASE 0x00000000 #define CFG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ #define CFG_SYS_FLASH_BANKS_LIST { (CFG_SYS_FLASH_BASE) } diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 35c5a4f1226..5cca1e18348 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -24,10 +24,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 55e2d744c4a..e3519ed7516 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -22,9 +22,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 8a790400b46..e8918df69e0 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -14,10 +14,6 @@ #include #include -/* NAND support */ - -#define CONFIG_FDTADDR 0x84000000 - #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ "fdt_addr_r=0x82000000\0" \ diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 24cf554649b..82b2efdfe89 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -19,9 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 015bc78648f..1bfb741346a 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -16,13 +16,6 @@ /* Remove or override few declarations from mv-common.h */ -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#endif - /* * Enable GPI0 support */ diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 33ae7d654b0..a6c1e9c6d02 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -28,10 +28,4 @@ "initrd=/boot/uInitrd\0" \ "bootargs_root=ubi.mtd=1 root=ubi0:root rootfstype=ubifs ro\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_DOCKSTAR_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index b8f518612ee..f8afcc7826e 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -13,7 +13,6 @@ #include -#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED 0x80000000 #ifndef CONFIG_QSPI_BOOT diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index fbd83d629c0..98322a54f63 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -24,10 +24,4 @@ "x_bootargs=console=ttyS0,115200\0" \ "x_bootargs_root=root=/dev/sda2 rootdelay=10\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_DREAMPLUG_H */ diff --git a/include/configs/ds109.h b/include/configs/ds109.h index 8553ea0b95f..8e7a86e0626 100644 --- a/include/configs/ds109.h +++ b/include/configs/ds109.h @@ -35,12 +35,4 @@ "ipaddr=192.168.1.5\0" \ "usb0Mode=host\0" -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable one port */ -#define CONFIG_PHY_BASE_ADR 8 -#endif /* CONFIG_CMD_NET */ - #endif /* _CONFIG_DS109_H */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 717f49ca29d..029f13dad36 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -144,13 +144,5 @@ #define CFG_SYS_DDRUA 0x05 #define CFG_SYS_PJPAR 0xFF -/*----------------------------------------------------------------------- - * I2C - */ - -#ifdef CONFIG_CMD_DATE -#define CONFIG_I2C_RTC_ADDR 0x68 -#endif - #endif /* _CONFIG_M5282EVB_H */ /*---------------------------------------------------------------------*/ diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h index 6061a6db0a4..17a78514026 100644 --- a/include/configs/efi-x86_app.h +++ b/include/configs/efi-x86_app.h @@ -8,8 +8,6 @@ #include -#undef CONFIG_TPM_TIS_BASE_ADDRESS - #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=vidconsole\0" \ "stderr=vidconsole\0" diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 22e0fa5aabf..1742b1192fb 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -35,11 +35,11 @@ #if defined(CONFIG_ENV_IS_IN_MMC) /* RiOTboard */ -#define CONFIG_FDTFILE "imx6dl-riotboard.dtb" +#define FDTFILE "imx6dl-riotboard.dtb" #define CFG_SYS_FSL_USDHC_NUM 3 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) /* MarSBoard */ -#define CONFIG_FDTFILE "imx6q-marsboard.dtb" +#define FDTFILE "imx6q-marsboard.dtb" #define CFG_SYS_FSL_USDHC_NUM 2 #endif @@ -79,7 +79,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ - "fdtfile=" CONFIG_FDTFILE "\0" \ + "fdtfile=" FDTFILE "\0" \ "finduuid=part uuid mmc 0:1 uuid\0" \ BOOTENV diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 52eb0be6761..3fd58d6bd4a 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -49,7 +49,6 @@ /* Ethernet */ #define CONFIG_PHY_ID 0 -#define CONFIG_MACB_SEARCH_PHY /* MMC */ #ifdef CONFIG_CMD_MMC diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 9b5c329bda1..8e277ce7ff2 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -27,8 +27,6 @@ /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 -#define CONFIG_RD_LVL - #define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE #define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 7a9307ccc3d..934a4ef9d1f 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -8,8 +8,6 @@ #ifndef __CONFIG_EXYNOS5420_H #define __CONFIG_EXYNOS5420_H -#define CONFIG_VAR_SIZE_SPL - #define CONFIG_IRAM_TOP 0x02074000 #define CONFIG_PHY_IRAM_BASE 0x02020000 diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index cff910c1bd5..e22dd036ccb 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -15,10 +15,6 @@ /* select serial console configuration */ -/* IRAM Layout */ -#define CONFIG_IRAM_BASE 0x02100000 -#define CONFIG_IRAM_SIZE 0x58000 -#define CONFIG_IRAM_END (CONFIG_IRAM_BASE + CONFIG_IRAM_SIZE) #define CPU_RELEASE_ADDR secondary_boot_addr /* select serial console configuration */ diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 66eed9e14f8..1c86dcb1f6d 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -36,10 +36,4 @@ "kernel=/boot/uImage\0" \ "bootargs_root=ubi.mtd=root root=ubi0:root rootfstype=ubifs ro\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_GOFLEXHOME_H */ diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index 4954c5ca080..d196c4eda53 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -30,12 +30,4 @@ "fdt=/boot/guruplug-server-plus.dtb\0" \ "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ -#define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ - #endif /* _CONFIG_GURUPLUG_H */ diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 05192218d22..76fc4ac8b66 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -24,14 +24,6 @@ "fdt=/boot/ib62x0.dtb\0" \ "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" -/* - * Ethernet driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 -#endif /* CONFIG_CMD_NET */ - /* * SATA driver configuration */ diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index f2e3608d3a3..6d2104b3a1c 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -16,14 +16,4 @@ "kernel=/boot/uImage\0" \ "bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0" -/* - * Ethernet driver configuration - * - * This board has PCIe Wifi card, so allow Ethernet to be disabled - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 11 -#endif /* CONFIG_CMD_NET */ - #endif /* _CONFIG_ICONNECT_H */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index b846889541c..ea4964b13d6 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -18,11 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* Environment in eMMC, at the end of 2nd "boot sector" */ - -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index bbc58be511e..174a91c83e1 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -39,6 +39,5 @@ /* Network */ #define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 9 -#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE #endif /* __CONFIG_K2E_EVM_H */ diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index bb91751d5d9..dc06d5943e5 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -53,7 +53,6 @@ /* Network */ #define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 2 -#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE #define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */ #define SPI_MTD_PARTS KEYSTONE_SPI1_MTD_PARTS diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index a18158a7eb3..5d629452bae 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -39,6 +39,5 @@ /* Network */ #define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 5 -#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE #endif /* __CONFIG_K2L_EVM_H */ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 532370e9184..80bff4b8937 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -149,7 +149,6 @@ /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 9c3174d0e02..f7bb97aa0e6 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -18,7 +18,6 @@ /* DDR */ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 828f9109634..7a66df548a3 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -14,13 +14,6 @@ * Enable platform initialisation via misc_init_r() function */ -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#endif - /* * Enable GPI0 support */ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index abe470fe890..794c1fcbed0 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -48,7 +48,6 @@ * Linux Information */ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_SETUP_INITRD_TAG #define CONFIG_EXTRA_ENV_SETTINGS \ "bootenvfile=uEnv.txt\0" \ "fdtfile=da850-lego-ev3.dtb\0" \ diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index b190bfe9c8e..2ccb20192d4 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -12,7 +12,6 @@ /* Link Definitions */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index e54e903a8a9..d0380b33732 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -31,7 +31,6 @@ /* Link Definitions */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index dab57382edd..1dca7f0aa6b 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -107,7 +107,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #endif #ifdef CONFIG_NAND_BOOT diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 12c4853ea96..043904197f0 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -82,7 +82,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #ifdef CONFIG_NAND_BOOT #define CFG_SYS_NAND_U_BOOT_SIZE (1024 << 10) diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 4ed5481c3e7..250891e9e30 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -31,7 +31,6 @@ /* Link Definitions */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 1759d25f3a3..5e03a962d10 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -45,7 +45,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE /* IFC Timing Params */ #define CFG_SYS_CSPR0_EXT CFG_SYS_NAND_CSPR_EXT diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index e9b8ad0c0b7..c4e5f4928d2 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -123,7 +123,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #endif #ifdef CONFIG_NAND_BOOT diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index f3904e7b3f7..ad766b034b1 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -50,7 +50,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE /* * CPLD diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 57429d4bbe3..bcba8d81c04 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -29,7 +29,6 @@ /* Link Definitions */ #define CFG_SYS_FSL_QSPI_BASE 0x20000000 -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index dc9cded49fd..49ad1469262 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -97,7 +97,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_SWITCH 6 diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index e2444cd8eb4..9033f6e937c 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -81,7 +81,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #define CFG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_BRDCFG4_OFFSET 0x54 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index e82456fd814..bd78bdb793a 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -16,7 +16,6 @@ /* Link Definitions */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 4e6d40afbf1..7d3e8912c3b 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -98,7 +98,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 8f36958f710..4573906115e 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -95,7 +95,6 @@ #define CFG_SYS_NAND_FTIM3 0x0 #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } -#define CONFIG_MTD_NAND_VERIFY_WRITE #define QIXIS_LBMAP_SWITCH 0x06 #define QIXIS_LBMAP_MASK 0x0f diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index a469c83fa4e..3347920f03f 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -13,7 +13,6 @@ #define CFG_SYS_FLASH_BASE 0x20000000 /* DDR */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL diff --git a/include/configs/malta.h b/include/configs/malta.h index 65f4b05649b..8ba04b4e6c3 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -11,8 +11,6 @@ */ #define CONFIG_MALTA -#define CONFIG_MEMSIZE_IN_BYTES - /* * CPU Configuration */ diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index 7c8c67f4469..b6e680bcc78 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -10,7 +10,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED 0x1c000000 #define CFG_SYS_INIT_SP_OFFSET 0x800000 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 99b09ad41e7..f6ab486fa29 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -15,10 +15,7 @@ /* Environment */ -/* Defines for SPL */ - -#define CONFIG_SPI_ADDR 0x30000000 -#define CFG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) +#define CFG_SYS_UBOOT_BASE (0x30000000 + CONFIG_SPL_PAD_TO) /* SPL -> Uboot */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 30f27e7f0c1..32e0e06617e 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -86,9 +86,4 @@ #define CFG_SYS_NAND_BASE 0x60000000 #endif -/* SPI */ -#ifdef CONFIG_CMD_SPI -#define CONFIG_SPI_HALF_DUPLEX -#endif - #endif /* __CONFIGS_MXS_H__ */ diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 1b7eb343348..85691ca94f0 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -39,16 +39,4 @@ "bootargs=console=ttyS0,115200\0" \ "autostart=no\0" -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 8 -#endif /* CONFIG_CMD_NET */ - -/* - * EFI partition - */ - #endif /* _CONFIG_NAS220_H */ diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index 62f07011809..e2ad77072cd 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -46,8 +46,4 @@ #endif /* CONFIG_SPL_BUILD */ -/* Ethernet driver configuration */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 1 - #endif /* _CONFIG_NSA310S_H */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index baa452156ec..21002f99dc8 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -18,9 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 006f06e6af5..2cec20ca425 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -33,26 +33,4 @@ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=ubi0:rootfs rootfstype=ubifs\0" -/* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -# ifdef CONFIG_BOARD_IS_OPENRD_BASE -# define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -# else -# define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ -# endif -# ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE -# define CONFIG_PHY_BASE_ADR 0x0 -# define PHY_NO "88E1121" -# else -# define CONFIG_PHY_BASE_ADR 0x8 -# define PHY_NO "88E1116" -# endif -#endif /* CONFIG_CMD_NET */ - -/* - * SATA Driver configuration - */ - #endif /* _CONFIG_OPENRD_BASE_H */ diff --git a/include/configs/origen.h b/include/configs/origen.h index 6633d541a31..a608df44e80 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -38,10 +38,4 @@ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ "source ${loadaddr}\0" -/* MIU (Memory Interleaving Unit) */ -#define CONFIG_MIU_2BIT_21_7_INTERLEAVED - -#define RESERVE_BLOCK_SIZE (512) -#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ - #endif /* __CONFIG_H */ diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index ecd0405d297..653b4c583ad 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -19,9 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* _P2371_0000_H */ diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 7f942888e74..2913d5304be 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -19,9 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* _P2371_2180_H */ diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 50cddb4a4ac..e78e3c4d6b0 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -19,9 +19,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* _P2571_H */ diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h index ec1a8634e71..bab02dc2d6e 100644 --- a/include/configs/p3450-0000.h +++ b/include/configs/p3450-0000.h @@ -23,9 +23,6 @@ func(PXE, pxe, na) \ func(DHCP, dhcp, na) -/* Environment at end of QSPI, in the VER partition */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #define BOARD_EXTRA_ENV_SETTINGS \ "preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \ "load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 9fd897958a4..fa08744b6fe 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -159,11 +159,6 @@ /* PSRAM */ #define PHYS_PSRAM 0x70000000 #define PHYS_PSRAM_SIZE 0x00400000 /* 4MB */ -/* Slave EBI1, PSRAM connected */ -#define CONFIG_PSRAM_SCFG (AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY | \ - AT91_MATRIX_SCFG_FIXED_DEFMSTR(5) | \ - AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED | \ - AT91_MATRIX_SCFG_SLOT_CYCLE(255)) /* USB */ #define CFG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 085732214e5..fc9f113dee6 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -23,10 +23,4 @@ "bootcmd_usb=usb start; ext2load usb 0:1 0x00800000 /uImage; " \ "ext2load usb 0:1 0x01100000 /uInitrd\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_POGO_E02_H */ diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h index b5ce2dd13d0..239d33d8e9d 100644 --- a/include/configs/pogo_v4.h +++ b/include/configs/pogo_v4.h @@ -69,10 +69,4 @@ BOOTENV #endif /* CONFIG_SPL_BUILD */ -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_POGO_V4_H */ diff --git a/include/configs/porter.h b/include/configs/porter.h index 88fa65e0ffc..e0f77f358b9 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -21,9 +21,6 @@ #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024) -/* FLASH */ -#define CONFIG_SPI_FLASH_QUAD - /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index d0561899586..20be4af4628 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -29,7 +29,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); /* * DDR Setup */ -#define CONFIG_VERY_BIG_RAM #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index e9cbd253824..86012adfb36 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -28,7 +28,6 @@ #define DRAM_RSV_SIZE 0x08000000 #define CFG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) #define CFG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE) -#define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) /* ENV setting */ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index e4595817156..a721f27ec00 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -10,16 +10,6 @@ #define CONFIG_IRAM_BASE 0xff8c0000 -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) -#else -/* BSS setup */ -#endif - -/* MMC/SD IP block */ -#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 - -/* RAW SD card / eMMC locations. */ - /* FAT sd card locations. */ #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index 19701ccce22..d7923967a72 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -21,10 +21,4 @@ "x_bootcmd_usb=usb start\0" \ "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0" -/* - * Ethernet Driver configuration - */ -#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ -#define CONFIG_PHY_BASE_ADR 0 - #endif /* _CONFIG_SHEEVAPLUG_H */ diff --git a/include/configs/silk.h b/include/configs/silk.h index 58613effaf4..6d605edf788 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -21,9 +21,6 @@ #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) -/* FLASH */ -#define CONFIG_SPI_FLASH_QUAD - /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 0392530c0ad..0cb70762d92 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -12,8 +12,6 @@ #include #include -#define CONFIG_SMDK5420 /* which is in a SMDK5420 */ - #define CFG_SYS_SDRAM_BASE 0x20000000 /* DRAM Memory Banks */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 601c16ea453..38de1fa9849 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -34,9 +34,6 @@ /* FLASH and environment organization */ -#define RESERVE_BLOCK_SIZE (512) -#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ - /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET #define CONFIG_ENV_SROM_BANK 1 diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index 432144cb40c..caff0cf2523 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -11,15 +11,9 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */ /* Ethernet on SoC (EMAC) */ -#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII /* The PHY is autodetected, so no MII PHY address is needed here */ #define PHY_ANEG_TIMEOUT 8000 -/* Enable SPI NOR flash reset, needed for SPI booting */ -#define CONFIG_SPI_N25Q256A_RESET - -/* Environment setting for SPI flash */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 2a076716023..11d84022331 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -16,9 +16,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_SOCRATES 1 - /* * Only possible on E500 Version 2 or newer cores. */ @@ -55,7 +52,6 @@ #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -#define CONFIG_VERY_BIG_RAM /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */ diff --git a/include/configs/stout.h b/include/configs/stout.h index f49e88cb17c..977c0adc5f0 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -25,9 +25,6 @@ /* SCIF */ #define CONFIG_SCIF_A -/* SPI */ -#define CONFIG_SPI_FLASH_QUAD - /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 69926890010..a2b6a1f57d7 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -14,7 +14,6 @@ #define CFG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */ #define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */ -#define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */ #define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE #define SQ_DRAMINFO_BASE (0x2e00ffc0) /* DRAM info from TF-A */ diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index 09879663701..c98322cf084 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -16,12 +16,6 @@ #define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -/* Environment in eMMC, at the end of 2nd "boot sector" */ - -/* SPI */ -#define CONFIG_TEGRA_SLINK_CTRLS 6 -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/venice2.h b/include/configs/venice2.h index b2dc04a975a..a4eb4bf4aaf 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -20,9 +20,6 @@ /* Environment in eMMC, at the end of 2nd "boot sector" */ -/* SPI */ -#define CONFIG_SPI_FLASH_SIZE (4 << 20) - #include "tegra-common-post.h" #endif /* __CONFIG_H */ diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 9f72bdde816..1c1789ac3fb 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -39,9 +39,6 @@ /* USB device */ -/* Ethernet Hardware */ -#define CONFIG_MACB_SEARCH_PHY - #ifdef CONFIG_SPI_BOOT /* bootstrap + u-boot + env + linux in serial flash */ /* Use our own mapping for the VInCo platform */ diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 9bf2462010d..d71108dd318 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -10,22 +10,6 @@ #ifndef __CONFIG_X86_COMMON_H #define __CONFIG_X86_COMMON_H -/* - * High Level Configuration Options - * (easy to change) - */ - -/* Generic TPM interfaced through LPC bus */ -#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 - -/*----------------------------------------------------------------------- - * Serial Configuration - */ - -/* - * Miscellaneous configurable options - */ - /*----------------------------------------------------------------------- * CPU Features */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 3e604894ad4..9f1f2d90dbe 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -34,9 +34,6 @@ #define CONFIG_FEC_ENET_DEV 0 #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_UBOOT_SECTOR_START 0x2 -#define CONFIG_UBOOT_SECTOR_COUNT 0x3fe - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -75,8 +72,8 @@ "bootz; " \ "fi;\0" \ "uboot=ccv/u-boot.imx\0" \ - "uboot_start="__stringify(CONFIG_UBOOT_SECTOR_START)"\0" \ - "uboot_size="__stringify(CONFIG_UBOOT_SECTOR_COUNT)"\0" \ + "uboot_start=0x2\0" \ + "uboot_size=0x3fe\0" \ "update_uboot=if tftp ${uboot}; then " \ "if itest ${filesize} > 0; then " \ "mmc dev 0 1;" \ -- cgit v1.2.3 From acdf89ec060931ae4c87780ab0e65a6783ccd94b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:32 -0500 Subject: Convert CONFIG_KSNET_NETCP_V1_0 et al to Kconfig This converts the following to Kconfig: CONFIG_KSNET_NETCP_V1_0 CONFIG_KSNET_NETCP_V1_5 Signed-off-by: Tom Rini --- include/configs/k2e_evm.h | 1 - include/configs/k2g_evm.h | 1 - include/configs/k2hk_evm.h | 1 - include/configs/k2l_evm.h | 1 - 4 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index 174a91c83e1..1283f450b32 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -37,7 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 9 #endif /* __CONFIG_K2E_EVM_H */ diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index dc06d5943e5..fd3708ba81a 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -51,7 +51,6 @@ "name_fs=arago-base-tisdk-image-k2g-evm.cpio\0" /* Network */ -#define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 2 #define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */ diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index 68cbe98b553..36e3c59d1c5 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -37,7 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_NETCP_V1_0 #define CONFIG_KSNET_CPSW_NUM_PORTS 5 #endif /* __CONFIG_K2HK_EVM_H */ diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index 5d629452bae..cb7b0367810 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -37,7 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_NETCP_V1_5 #define CONFIG_KSNET_CPSW_NUM_PORTS 5 #endif /* __CONFIG_K2L_EVM_H */ -- cgit v1.2.3 From 960379d4501fcb64ca20810c4fc4fe74806ede7b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:33 -0500 Subject: Convert CONFIG_L2_CACHE to Kconfig This converts the following to Kconfig: CONFIG_L2_CACHE Signed-off-by: Tom Rini --- include/configs/MPC8548CDS.h | 5 ----- include/configs/P1010RDB.h | 5 ----- include/configs/p1_p2_rdb_pc.h | 5 ----- include/configs/socrates.h | 5 ----- 4 files changed, 20 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 1f1eacdb691..3d0c2192ee1 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -17,11 +17,6 @@ #include #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - /* * Only possible on E500 Version 2 or newer cores. */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 02d49c3d340..c398ece7845 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -95,11 +95,6 @@ #endif #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - /* DDR Setup */ #define SPD_EEPROM_ADDRESS 0x52 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index ee25990b034..c05904a813d 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -109,11 +109,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE - #define CFG_SYS_CCSRBAR 0xffe00000 #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 11d84022331..0547ed02563 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -34,11 +34,6 @@ * in the README.mpc85xxads. */ -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ - #define CFG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ #undef CFG_SYS_DRAM_TEST /* memory test, takes time */ -- cgit v1.2.3 From 2cc61a631bb8ae1acfadac9840abaa803091b7ac Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:34 -0500 Subject: malta: Rename CONFIG_MALTA to CONFIG_TARGET_MALTA Fixup this last remnant of CONFIG_MALTA. Cc: Paul Burton Signed-off-by: Tom Rini --- include/configs/malta.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/malta.h b/include/configs/malta.h index 8ba04b4e6c3..c17a4a4a8e5 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -9,7 +9,6 @@ /* * System configuration */ -#define CONFIG_MALTA /* * CPU Configuration -- cgit v1.2.3 From 829e9d223657f5779668bb7a46e902a85e09b664 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:35 -0500 Subject: ddr: fsl: Remove CONFIG_MEM_INIT_VALUE The way all of the memory init code here works is that we pass 0xDEADBEEF around for the initial value (as it's a well known 'poison' value and so easily recognized in debuggers, etc). The only point of this CONFIG symbol was to pass in a different value for that purpose. Drop this symbol and cleanup the code slightly. Signed-off-by: Tom Rini --- include/configs/MPC8548CDS.h | 2 -- include/configs/P1010RDB.h | 2 -- include/configs/T102xRDB.h | 3 --- include/configs/T104xRDB.h | 3 --- include/configs/T208xQDS.h | 7 ------- include/configs/T208xRDB.h | 7 ------- include/configs/T4240RDB.h | 7 ------- include/configs/kontron_sl28.h | 3 --- include/configs/ls1021aqds.h | 4 ---- include/configs/ls1043aqds.h | 4 ---- include/configs/ls1043ardb.h | 6 ------ include/configs/ls1046aqds.h | 4 ---- include/configs/ls1046ardb.h | 2 -- include/configs/ls1088aqds.h | 1 - include/configs/ls1088ardb.h | 1 - include/configs/ls2080aqds.h | 1 - include/configs/ls2080ardb.h | 1 - include/configs/lx2160a_common.h | 1 - include/configs/socrates.h | 3 --- 19 files changed, 62 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 3d0c2192ee1..1e3ba6de6e7 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -26,8 +26,6 @@ /* DDR Setup */ -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index c398ece7845..2267a7a9c8b 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -98,8 +98,6 @@ /* DDR Setup */ #define SPD_EEPROM_ADDRESS 0x52 -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - #ifndef __ASSEMBLY__ extern unsigned long get_sdram_size(void); #endif diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 4b443c75042..4794c5a84d1 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -94,9 +94,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif /* * Config the L3 Cache as L3 SRAM diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index dfad76e16f1..5bdc2105f56 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -64,9 +64,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CFG_SYS_INIT_L2CSR0 L2CSR0_L2E -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif /* * Config the L3 Cache as L3 SRAM diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 24c1daf9985..4b6bdaa3440 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -59,13 +59,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - /* * Config the L3 Cache as L3 SRAM */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index c825e7fa0c6..fab40f792af 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -59,13 +59,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - /* * Config the L3 Cache as L3 SRAM */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 95735f3fcb1..41565f284c6 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -40,13 +40,6 @@ #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - /* * Config the L3 Cache as L3 SRAM */ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index f7bb97aa0e6..a073a06c827 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -15,9 +15,6 @@ #undef CFG_SYS_MEM_RESERVE_SECURE #endif -/* DDR */ -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef - #define CFG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index e49588489c1..fead9edeccd 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -22,10 +22,6 @@ #define CFG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - /* * IFC Definitions */ diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 1dca7f0aa6b..7ccbb20bf2e 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -12,10 +12,6 @@ #define SPD_EEPROM_ADDRESS 0x51 -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - #ifdef CONFIG_SYS_DPAA_FMAN #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 043904197f0..c8a6f0146aa 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -9,12 +9,6 @@ #include "ls1043a_common.h" -/* Physical Memory Map */ - -#ifndef CONFIG_SPL -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - /* * NOR Flash Definitions */ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index c4e5f4928d2..4b4bd7cbe48 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -12,10 +12,6 @@ #define SPD_EEPROM_ADDRESS 0x51 -#ifdef CONFIG_DDR_ECC -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - #ifdef CONFIG_SYS_DPAA_FMAN #define RGMII_PHY1_ADDR 0x1 #define RGMII_PHY2_ADDR 0x2 diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index ad766b034b1..0e42a51fc59 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -13,8 +13,6 @@ #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef - #if defined(CONFIG_QSPI_BOOT) #define CFG_SYS_UBOOT_BASE 0x40100000 #endif diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 49ad1469262..3391540c6e3 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -14,7 +14,6 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 9033f6e937c..1ddf0687f43 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -15,7 +15,6 @@ #define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */ -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 7d3e8912c3b..4a52fcdfddb 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -16,7 +16,6 @@ #define CFG_SYS_I2C_FPGA_ADDR 0x66 #define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS3 0x53 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 4573906115e..b8ab501c98e 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -21,7 +21,6 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk()/4) -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS3 0x53 diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 3347920f03f..c1a98fd3e4c 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -18,7 +18,6 @@ #define CFG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL #define CFG_SYS_SDRAM_SIZE 0x200000000UL #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS3 0x53 diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 0547ed02563..4c752091fb5 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -42,9 +42,6 @@ #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - #define CFG_SYS_DDR_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE -- cgit v1.2.3 From e52fca2236153341c495bff3c5631fcced291ffe Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:36 -0500 Subject: Convert CONFIG_MONITOR_IS_IN_RAM to Kconfig This converts the following to Kconfig: CONFIG_MONITOR_IS_IN_RAM As part of this, reword some of the documentation slightly to reflect that this is in Kconfig and not a define now. Signed-off-by: Tom Rini --- include/configs/10m50_devboard.h | 1 - include/configs/3c120_devboard.h | 1 - include/configs/M5249EVB.h | 2 -- include/configs/M5272C3.h | 2 -- include/configs/M5282EVB.h | 2 -- include/configs/astro_mcf5373l.h | 25 ------------------------- include/configs/cobra5272.h | 21 --------------------- include/configs/eb_cpu5282.h | 2 -- 8 files changed, 56 deletions(-) (limited to 'include') diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 3a4fbc6eab8..b898ec0cc3e 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -32,6 +32,5 @@ */ #define CFG_SYS_SDRAM_BASE 0xc8000000 #define CFG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_MONITOR_IS_IN_RAM #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index ab889180eed..e67338c202c 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -28,6 +28,5 @@ */ #define CFG_SYS_SDRAM_BASE 0xD0000000 #define CFG_SYS_SDRAM_SIZE 0x08000000 -#define CONFIG_MONITOR_IS_IN_RAM #endif /* __CONFIG_H */ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 0e38eeb4a36..c71130909fc 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -20,8 +20,6 @@ #define CFG_SYS_UART_PORT (0) -#undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ - /* * Clock configuration: enable only one of the following options */ diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index c58d19c810f..6aae584afda 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -19,8 +19,6 @@ #define CFG_SYS_UART_PORT (0) -#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ - /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index e23439fd782..7cfe7a2da3e 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -19,8 +19,6 @@ #define CFG_SYS_UART_PORT (0) -#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ - /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 62aa99342a0..6aef3bd86f7 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -38,16 +38,6 @@ #error No card type defined! #endif -/* - * CONFIG_RAM defines if u-boot is loaded via BDM (or started from - * a different bootloader that has already performed RAM setup) or - * started directly from flash, which is the regular case for production - * boards. - */ -#ifdef CONFIG_RAM -#define CONFIG_MONITOR_IS_IN_RAM -#endif - /* I2C */ /* @@ -69,21 +59,6 @@ #define CFG_SYS_UART_PORT (2) #define CFG_SYS_UART2_ALT3_GPIO -/* - * Configuration for environment - * Environment is located in the last sector of the flash - */ - -#ifndef CONFIG_MONITOR_IS_IN_RAM -#else -/* - * environment in RAM - This is used to use a single PC-based application - * to load an image, load U-Boot, load an environment and then start U-Boot - * to execute the commands from the environment. Feedback is done via setting - * and reading memory locations. - */ -#endif - /* here we put our FPGA configuration... */ /* Define user parameters that have to be customized most likely */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 8c83c3ac06a..cd50ffe98d0 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -42,27 +42,6 @@ #define CFG_SYS_UART_PORT (0) -/* --- - * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different - * bootloader residing in flash ('chainloading'); if you want to use - * chainloading or want to compile a u-boot binary that can be loaded into - * RAM via BDM set - * "#if 0" to "#if 1" - * You will need a first stage bootloader then, e. g. colilo or a working BDM - * cable (Background Debug Mode) - * - * Setting #if 0: u-boot will start from flash and relocate itself to RAM - * - * Please do not forget to modify the setting of CONFIG_TEXT_BASE - * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000) - * - * --- - */ - -#if 0 -#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */ -#endif - /* --- * Configuration for environment * Environment is embedded in u-boot in the second sector of the flash diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 029f13dad36..b267b74b159 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -14,8 +14,6 @@ #define CFG_SYS_UART_PORT (0) -#undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */ - /*----------------------------------------------------------------------* * Options * *----------------------------------------------------------------------*/ -- cgit v1.2.3 From 71894173bb15fffacb166bdc04168a0fcb86cbbf Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:37 -0500 Subject: Convert CONFIG_MXC_NAND_HWECC to Kconfig This converts the following to Kconfig: CONFIG_MXC_NAND_HWECC Signed-off-by: Tom Rini --- include/configs/m53menlo.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 189b2113f75..d42ad9acb40 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -48,7 +48,6 @@ #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI #define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR #define CFG_SYS_NAND_LARGEPAGE -#define CONFIG_MXC_NAND_HWECC #endif /* -- cgit v1.2.3 From 3348c6b6a5cbf71bde837bf80cf962ee6aaeff20 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:38 -0500 Subject: etamin: Rework CONFIG_NAND_CS_INIT Enable this in the board Kconfig file, but then check for it via CONFIG_IS_ENABLED so that it will only be true in the non-SPL case, as is done today. As part of this we move some defines local to where they are used as it's board specific. Cc: Samuel Egli Signed-off-by: Tom Rini --- include/configs/etamin.h | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) (limited to 'include') diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 6647148c96f..811c7cb9618 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -127,16 +127,6 @@ "bootm ${kloadaddr} - ${loadaddr}\0" \ COMMON_ENV_NAND_CMDS -#ifndef CONFIG_SPL_BUILD - -#define CONFIG_NAND_CS_INIT -#define ETAMIN_NAND_GPMC_CONFIG1 0x00000800 -#define ETAMIN_NAND_GPMC_CONFIG2 0x001e1e00 -#define ETAMIN_NAND_GPMC_CONFIG3 0x001e1e00 -#define ETAMIN_NAND_GPMC_CONFIG4 0x16051807 -#define ETAMIN_NAND_GPMC_CONFIG5 0x00151e1e -#define ETAMIN_NAND_GPMC_CONFIG6 0x16000f80 - /* Default env settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "hostname=etamin\0" \ @@ -147,5 +137,5 @@ CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 -#endif /* CONFIG_SPL_BUILD */ + #endif /* ! __CONFIG_ETAMIN_H */ -- cgit v1.2.3 From 0a69d6afcab9b2fa364cd78aa67340185c5f75a0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:39 -0500 Subject: Convert CONFIG_OVERWRITE_ETHADDR_ONCE to Kconfig This converts the following to Kconfig: CONFIG_OVERWRITE_ETHADDR_ONCE Signed-off-by: Tom Rini --- include/configs/M5253DEMO.h | 2 -- include/configs/M5275EVB.h | 4 ---- include/configs/eb_cpu5282.h | 4 ---- 3 files changed, 10 deletions(-) (limited to 'include') diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 65a7aa04086..bc156df20d5 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -20,8 +20,6 @@ env/embedded.o(.text*); #ifdef CONFIG_DRIVER_DM9000 -# define CONFIG_OVERWRITE_ETHADDR_ONCE - # define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index ff9f8535896..41974cff410 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -38,10 +38,6 @@ #define CFG_SYS_I2C_PINMUX_CLR (0xFFF0) #define CFG_SYS_I2C_PINMUX_SET (0x000F) -#ifdef CONFIG_MCFFEC -# define CONFIG_OVERWRITE_ETHADDR_ONCE -#endif /* FEC_ENET */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index b267b74b159..26e4ade34ee 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -42,10 +42,6 @@ * Network * *----------------------------------------------------------------------*/ -#ifdef CONFIG_MCFFEC -#define CONFIG_OVERWRITE_ETHADDR_ONCE -#endif - /*------------------------------------------------------------------------- * Low Level Configuration Settings * (address mappings, register initial values, etc.) -- cgit v1.2.3 From 2b210540b13ab528fbccc0122605ef07a57881af Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:40 -0500 Subject: Convert CONFIG_PEN_ADDR_BIG_ENDIAN to Kconfig This converts the following to Kconfig: CONFIG_PEN_ADDR_BIG_ENDIAN Signed-off-by: Tom Rini --- include/configs/ls1021aiot.h | 1 - include/configs/ls1021aqds.h | 1 - include/configs/ls1021atwr.h | 1 - 3 files changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 179c5128e3b..0e3ff3c5b7a 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -68,7 +68,6 @@ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" -#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index fead9edeccd..76e75335c58 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -242,7 +242,6 @@ * MMC */ -#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index b07978a999e..281b26fa2ba 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -152,7 +152,6 @@ /* GPIO */ -#define CONFIG_PEN_ADDR_BIG_ENDIAN #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 -- cgit v1.2.3 From f55281665af3980e5151552fd126fb7293253e96 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:41 -0500 Subject: arm: ti814x: Remove remaining support code When the ti814x_evm config was removed most, but not all, of the relevant support code was remove. Get rid of what was missed. Fixes: 50b532686849 ("ti814x: Remove platform") Signed-off-by: Tom Rini --- include/configs/ti814x_evm.h | 102 ------------------------------------------- 1 file changed, 102 deletions(-) delete mode 100644 include/configs/ti814x_evm.h (limited to 'include') diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h deleted file mode 100644 index 03849adb5ab..00000000000 --- a/include/configs/ti814x_evm.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * ti814x_evm.h - * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __CONFIG_TI814X_EVM_H -#define __CONFIG_TI814X_EVM_H - -#include - -/* commands to include */ - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x80200000\0" \ - "fdtaddr=0x80F80000\0" \ - "rdaddr=0x81000000\0" \ - "bootfile=/boot/uImage\0" \ - "fdtfile=\0" \ - "console=ttyO0,115200n8\0" \ - "optargs=\0" \ - "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 ro\0" \ - "mmcrootfstype=ext4 rootwait\0" \ - "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ - "ramrootfstype=ext2\0" \ - "mmcargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=${mmcroot} " \ - "rootfstype=${mmcrootfstype}\0" \ - "bootenv=uEnv.txt\0" \ - "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ - "importbootenv=echo Importing environment from mmc ...; " \ - "env import -t $loadaddr $filesize\0" \ - "ramargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=${ramroot} " \ - "rootfstype=${ramrootfstype}\0" \ - "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ - "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \ - "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootm ${loadaddr}\0" \ - "ramboot=echo Booting from ramdisk ...; " \ - "run ramargs; " \ - "bootm ${loadaddr}\0" \ - "fdtfile=ti814x-evm.dtb\0" \ - -/* Clock Defines */ -#define V_OSCK 24000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) - - -/* Console I/O Buffer Size */ - -/** - * Physical Memory Map - */ -#define PHYS_DRAM_1_SIZE 0x20000000 /* 512MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */ - -#define CFG_SYS_SDRAM_BASE 0x80000000 - -/** - * Platform/Board specific defs - */ -#define CFG_SYS_TIMERBASE 0x4802E000 - -/* NS16550 Configuration */ -#define CFG_SYS_NS16550_CLK (48000000) -#define CFG_SYS_NS16550_COM1 0x48020000 /* Base EVM has UART0 */ - -/* CPU */ - -/* Defines for SPL */ - -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80800000 should not be used for any - * other needs. - */ - -/* - * Since SPL did pll and ddr initialization for us, - * we don't need to do it twice. - */ - -/* Ethernet */ -#define CONFIG_PHY_ET1011C_TX_CLK_FIX - -#endif /* ! __CONFIG_TI814X_EVM_H */ -- cgit v1.2.3 From 32b7e39db4d3af0d94f1387a7641152f375b23ac Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:44 -0500 Subject: Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig This converts the following to Kconfig: CONFIG_STANDALONE_LOAD_ADDR Signed-off-by: Tom Rini --- include/configs/display5.h | 2 -- include/configs/microchip_mpfs_icicle.h | 2 -- include/configs/opos6uldev.h | 1 - include/configs/qemu-riscv.h | 2 -- include/configs/sifive-unleashed.h | 2 -- include/configs/sifive-unmatched.h | 2 -- include/configs/sunxi-common.h | 3 --- include/configs/xtfpga.h | 16 ---------------- 8 files changed, 30 deletions(-) (limited to 'include') diff --git a/include/configs/display5.h b/include/configs/display5.h index 5cbeb9224c3..4401515a65e 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -276,8 +276,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_STANDALONE_LOAD_ADDR 0x10001000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CFG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 3def93d61e8..c73c5a1d9fe 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -11,8 +11,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - /* Environment options */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 5c44b9dcb20..459134b93f8 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -11,7 +11,6 @@ #include "mx6_common.h" /* Miscellaneous configurable options */ -#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR /* Physical Memory Map */ #define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index 72f35cc0542..35172da3ff1 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -10,8 +10,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - #define RISCV_MMODE_TIMERBASE 0x2000000 #define RISCV_MMODE_TIMER_FREQ 1000000 diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 5ad2124bdda..4a453a9df40 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -13,8 +13,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - #define RISCV_MMODE_TIMERBASE 0x2000000 #define RISCV_MMODE_TIMER_FREQ 1000000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index f4b1a16019e..ac42108620f 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -13,8 +13,6 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 - /* Environment options */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 496139f3463..5d82e7e560f 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -73,9 +73,6 @@ * Miscellaneous configurable options */ -/* standalone support */ -#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR - /* FLASH and environment organization */ /* diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 9201dac7abc..e0189c58f04 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -53,22 +53,6 @@ /* Memory test is destructive so default must not overlap vectors or U-Boot*/ -/* Load address for stand-alone applications. - * MEMADDR cannot be used here, because the definition needs to be - * a plain number as it's used as -Ttext argument for ld in standalone - * example makefile. - * Handle noMMU vs MMUv2 vs MMUv3 distinction here manually. - */ -#if XCHAL_HAVE_PTP_MMU -#if XCHAL_VECBASE_RESET_VADDR == XCHAL_VECBASE_RESET_PADDR -#define CONFIG_STANDALONE_LOAD_ADDR 0x00800000 -#else -#define CONFIG_STANDALONE_LOAD_ADDR 0xd0800000 -#endif -#else -#define CONFIG_STANDALONE_LOAD_ADDR 0x60800000 -#endif - #if defined(CONFIG_MAX_MEM_MAPPED) && \ CONFIG_MAX_MEM_MAPPED < CFG_SYS_SDRAM_SIZE #define XTENSA_SYS_TEXT_ADDR \ -- cgit v1.2.3 From d14f3f272519a5525d93ec98cbdd4d9eec7db6e9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:45 -0500 Subject: Convert CONFIG_TEGRA_ENABLE_UARTA et al to Kconfig This converts the following to Kconfig: CONFIG_TEGRA_ENABLE_UARTA CONFIG_TEGRA_ENABLE_UARTB CONFIG_TEGRA_ENABLE_UARTC CONFIG_TEGRA_ENABLE_UARTD CONFIG_TEGRA_SPI CONFIG_TEGRA_UARTA_GPU CONFIG_TEGRA_UARTA_SDIO1 CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 Signed-off-by: Tom Rini --- include/configs/apalis-tk1.h | 1 - include/configs/apalis_t30.h | 1 - include/configs/beaver.h | 4 ---- include/configs/cardhu.h | 4 ---- include/configs/cei-tk1-som.h | 1 - include/configs/colibri_t20.h | 2 -- include/configs/colibri_t30.h | 1 - include/configs/dalmore.h | 1 - include/configs/harmony.h | 1 - include/configs/jetson-tk1.h | 1 - include/configs/medcom-wide.h | 1 - include/configs/nyan-big.h | 1 - include/configs/p2371-0000.h | 1 - include/configs/p2371-2180.h | 1 - include/configs/p2571.h | 1 - include/configs/p3450-0000.h | 1 - include/configs/paz00.h | 1 - include/configs/plutux.h | 1 - include/configs/seaboard.h | 1 - include/configs/tec-ng.h | 1 - include/configs/tec.h | 1 - include/configs/tegra-common-post.h | 4 ---- include/configs/trimslice.h | 2 -- include/configs/venice2.h | 1 - include/configs/ventana.h | 1 - 25 files changed, 36 deletions(-) (limited to 'include') diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 1d478078b2c..71d4727ca98 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -13,7 +13,6 @@ #include "tegra124-common.h" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define FDT_MODULE "apalis-v1.2" diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 4f00b3bad3f..80204d706d1 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -20,7 +20,6 @@ * Apalis UART3: NVIDIA UARTB * Apalis UART4: NVIDIA UARTC */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define UBOOT_UPDATE \ diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 7078c2745c8..7e0e4779607 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -10,14 +10,10 @@ #include "tegra30-common.h" -/* VDD core PMIC */ -#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 - /* High-level configuration options */ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #include "tegra-common-post.h" diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 5cca1e18348..64d713a1969 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -10,9 +10,6 @@ #include "tegra30-common.h" -/* VDD core PMIC */ -#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 - /* High-level configuration options */ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu" @@ -21,7 +18,6 @@ "fdtfile=tegra30-cardhu-a04.dtb\0" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #include "tegra-common-post.h" diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index e3519ed7516..e49eb602081 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -19,7 +19,6 @@ #define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #include "tegra-common-post.h" diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 2ba3c3bc87d..ea7d648eb6a 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -11,8 +11,6 @@ #include "tegra20-common.h" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_TEGRA_UARTA_SDIO1 #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* NAND support */ diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index ffed71a2e82..7edb2c0b26d 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -21,7 +21,6 @@ * Colibri UART-B: NVIDIA UARTD * Colibri UART-C: NVIDIA UARTB */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #define UBOOT_UPDATE \ diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index 82b2efdfe89..c9009e39623 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -14,7 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 211dab4d233..a1a66bfb64e 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -14,7 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: keyboard satellite board UART, default */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index ea4964b13d6..aa9e1d811a5 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #include "tegra-common-post.h" diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index a8d8d8b09e0..efac0febdf8 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index 21002f99dc8..e885526e625 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE #include "tegra-common-post.h" diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index 653b4c583ad..f426889e1c4 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-0000" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 2913d5304be..24adf4e13f0 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-2180" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/p2571.h b/include/configs/p2571.h index e78e3c4d6b0..8a1e7d9b968 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h index bab02dc2d6e..078d35dde2c 100644 --- a/include/configs/p3450-0000.h +++ b/include/configs/p3450-0000.h @@ -14,7 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA /* Only MMC/PXE/DHCP for now, add USB back in later when supported */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index a945f4e9b28..898167009f6 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -16,7 +16,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Compal Paz00" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 99db59c489e..1d8ac618c0b 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Plutux" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index f272fe9bf8f..e5d672746b1 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index c98322cf084..ae879abe3f8 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -13,7 +13,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE #include "tegra-common-post.h" diff --git a/include/configs/tec.h b/include/configs/tec.h index ddf753da4a9..e8a9df756d5 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD /* UARTD: debug UART */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* NAND support */ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 69acabf19fd..2c668e0611b 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -73,8 +73,4 @@ BOOTENV \ BOARD_EXTRA_ENV_SETTINGS -#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI) -#define CONFIG_TEGRA_SPI -#endif - #endif /* __TEGRA_COMMON_POST_H */ diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index e4cbc7da843..b5bf9912201 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -14,8 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_TEGRA_UARTA_GPU #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* SPI */ diff --git a/include/configs/venice2.h b/include/configs/venice2.h index a4eb4bf4aaf..970893ca17b 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -15,7 +15,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTA #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/ventana.h b/include/configs/ventana.h index f7a507768ec..e7b7b911d9b 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -14,7 +14,6 @@ #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Ventana" /* Board-specific serial config */ -#define CONFIG_TEGRA_ENABLE_UARTD #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE /* Environment in eMMC, at the end of 2nd "boot sector" */ -- cgit v1.2.3 From 60910a3f0267ccf2f87f1205aa3fb76491e674b5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:46 -0500 Subject: Convert CONFIG_THOR_RESET_OFF to Kconfig This converts the following to Kconfig: CONFIG_THOR_RESET_OFF Signed-off-by: Tom Rini --- include/configs/xilinx_versal.h | 1 - include/configs/xilinx_versal_net.h | 1 - include/configs/xilinx_zynqmp.h | 1 - include/configs/zynq-common.h | 1 - 4 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index ee3130ed327..6ee6786e054 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -25,7 +25,6 @@ #if defined(CONFIG_CMD_DFU) #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_THOR_RESET_OFF #endif /* Ethernet driver */ diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h index 7d77189693e..37bdb214629 100644 --- a/include/configs/xilinx_versal_net.h +++ b/include/configs/xilinx_versal_net.h @@ -25,7 +25,6 @@ #if defined(CONFIG_CMD_DFU) #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_THOR_RESET_OFF #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ "setenv dfu_alt_info " \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index efe241df97e..f71cd660993 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -31,7 +31,6 @@ #if defined(CONFIG_ZYNQMP_USB) #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_THOR_RESET_OFF # define PARTS_DEFAULT \ "partitions=uuid_disk=${uuid_gpt_disk};" \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 37b54289073..d95178eb642 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -38,7 +38,6 @@ #ifdef CONFIG_USB_EHCI_ZYNQ # define DFU_DEFAULT_POLL_TIMEOUT 300 -# define CONFIG_THOR_RESET_OFF #endif /* enable preboot to be loaded before CONFIG_BOOTDELAY */ -- cgit v1.2.3 From 4fd9373bbb3f160c2975fc9de2fab49040141833 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:47 -0500 Subject: net: Remove more legacy functions Remove some of the board and arch specific non-DM_ETH helper code. Signed-off-by: Tom Rini --- include/configs/km/km-mpc83xx.h | 5 ----- include/fm_eth.h | 1 - include/netdev.h | 1 - 3 files changed, 7 deletions(-) (limited to 'include') diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 1f03f95acef..c939caf2a1f 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -58,8 +58,3 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CFG_SYS_BOOTMAPSZ (8 << 20) - -/* - * QE UEC ethernet configuration - */ -#define CONFIG_UEC_ETH diff --git a/include/fm_eth.h b/include/fm_eth.h index aeb640925ee..6012a449fd2 100644 --- a/include/fm_eth.h +++ b/include/fm_eth.h @@ -202,7 +202,6 @@ struct memac_mdio_info { int fm_tgec_mdio_init(struct bd_info *bis, struct tgec_mdio_info *info); int fm_memac_mdio_init(struct bd_info *bis, struct memac_mdio_info *info); -int fm_standard_init(struct bd_info *bis); void fman_enet_init(void); void fdt_fixup_fman_ethernet(void *fdt); phy_interface_t fm_info_get_enet_if(enum fm_port port); diff --git a/include/netdev.h b/include/netdev.h index b3f8584e900..2b4e474ed08 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -70,7 +70,6 @@ int sh_eth_initialize(struct bd_info *bis); int skge_initialize(struct bd_info *bis); int smc91111_initialize(u8 dev_num, phys_addr_t base_addr); int smc911x_initialize(u8 dev_num, phys_addr_t base_addr); -int uec_standard_init(struct bd_info *bis); int uli526x_initialize(struct bd_info *bis); int armada100_fec_register(unsigned long base_addr); -- cgit v1.2.3 From 0c3a6d443f4751b681566e8a752d12e04f4369f4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:49 -0500 Subject: usb: Remove CONFIG_USBD_HS This define is not enabled by the only platform which currently enables the legacy option of CONFIG_USB_DEVICE. We can drop this code. Signed-off-by: Tom Rini --- include/configs/apalis_imx6.h | 2 -- include/configs/colibri-imx6ull.h | 2 -- include/configs/colibri_imx6.h | 2 -- include/configs/colibri_imx7.h | 2 -- include/configs/ge_b1x5v2.h | 1 - include/configs/gw_ventana.h | 1 - include/configs/imx7-cm.h | 2 -- include/configs/librem5.h | 2 -- include/configs/mx6sabre_common.h | 2 -- include/configs/mx7dsabresd.h | 2 -- include/configs/nitrogen6x.h | 2 -- include/configs/novena.h | 2 -- include/configs/pico-imx6ul.h | 2 -- include/configs/siemens-am33x-common.h | 3 --- include/configs/tbs2910.h | 3 --- include/configs/warp7.h | 2 -- include/usbdescriptors.h | 15 --------------- include/usbdevice.h | 19 ------------------- 18 files changed, 66 deletions(-) (limited to 'include') diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 25a84458f55..07587c7609b 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -28,8 +28,6 @@ /* Host */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Client */ -#define CONFIG_USBD_HS /* Framebuffer and LCD */ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 2f09a264cbe..6f3524deb56 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -126,8 +126,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS - /* USB Device Firmware Update support */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 19daad21cb5..4e51df123a6 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -25,8 +25,6 @@ /* Host */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Client */ -#define CONFIG_USBD_HS /* Command definition */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 48c3f015473..89546b857fe 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -170,6 +170,4 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS - #endif diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 1458b187de2..1aaa3e67d60 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -26,7 +26,6 @@ /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS /* Memory */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 298a8f5aa2a..5a78c68e2fc 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -38,7 +38,6 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS /* Miscellaneous configurable options */ diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 76771fd66ce..8e9dbefc496 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -81,6 +81,4 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USBD_HS - #endif /* __CONFIG_H */ diff --git a/include/configs/librem5.h b/include/configs/librem5.h index 11b3fa6c857..377e3e7b3fa 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -27,8 +27,6 @@ #define CFG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_USBD_HS - #define CONSOLE_ON_UART1 #ifdef CONSOLE_ON_UART1 diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 6294fd1e2c4..96a48a97a30 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -145,6 +145,4 @@ /* Environment organization */ -#define CONFIG_USBD_HS - #endif /* __MX6QSABRE_COMMON_CONFIG_H */ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 6c165521f7a..bd70b62bd20 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -101,6 +101,4 @@ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USBD_HS - #endif /* __CONFIG_H */ diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 5020b3bb71d..1d101977c28 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -11,8 +11,6 @@ #include "mx6_common.h" -#define CONFIG_USBD_HS - #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configs */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 79e49c74f85..b0d473eeee3 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -55,8 +55,6 @@ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Gadget part */ -#define CONFIG_USBD_HS #endif /* Extra U-Boot environment. */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 8af8883fad6..faf11d5a72a 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -26,8 +26,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_USBD_HS - #define DFU_DEFAULT_POLL_TIMEOUT 300 #define CONFIG_DFU_ENV_SETTINGS \ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 1b1787a3d3c..406a179842e 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -70,9 +70,6 @@ * we don't need to do it twice. */ -/* USB DRACO ID as default */ -#define CONFIG_USBD_HS - /* USB Device Firmware Update support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index fcc96749422..689914cb187 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -28,9 +28,6 @@ /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#ifdef CONFIG_CMD_USB_MASS_STORAGE -#define CONFIG_USBD_HS -#endif /* CONFIG_CMD_USB_MASS_STORAGE */ #endif /* CONFIG_CMD_USB */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 56c90aa1032..a985c6f28f3 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -95,8 +95,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_USBD_HS - /* USB Device Firmware Update support */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/usbdescriptors.h b/include/usbdescriptors.h index 9a503874511..641b4a3e6f2 100644 --- a/include/usbdescriptors.h +++ b/include/usbdescriptors.h @@ -227,21 +227,6 @@ struct usb_device_descriptor { u8 bNumConfigurations; } __attribute__ ((packed)); -#if defined(CONFIG_USBD_HS) -struct usb_qualifier_descriptor { - u8 bLength; - u8 bDescriptorType; - - u16 bcdUSB; - u8 bDeviceClass; - u8 bDeviceSubClass; - u8 bDeviceProtocol; - u8 bMaxPacketSize0; - u8 bNumConfigurations; - u8 breserved; -} __attribute__ ((packed)); -#endif - struct usb_string_descriptor { u8 bLength; u8 bDescriptorType; /* 0x03 */ diff --git a/include/usbdevice.h b/include/usbdevice.h index 611cd6e4abf..80c5af0cbcd 100644 --- a/include/usbdevice.h +++ b/include/usbdevice.h @@ -196,10 +196,6 @@ struct usb_bus_instance; #define USB_DT_INTERFACE 0x04 #define USB_DT_ENDPOINT 0x05 -#if defined(CONFIG_USBD_HS) -#define USB_DT_QUAL 0x06 -#endif - #define USB_DT_HID (USB_TYPE_CLASS | 0x01) #define USB_DT_REPORT (USB_TYPE_CLASS | 0x02) #define USB_DT_PHYSICAL (USB_TYPE_CLASS | 0x03) @@ -279,11 +275,7 @@ struct usb_bus_instance; * USB Spec Release number */ -#if defined(CONFIG_USBD_HS) -#define USB_BCD_VERSION 0x0200 -#else #define USB_BCD_VERSION 0x0110 -#endif /* @@ -552,9 +544,6 @@ struct usb_device_instance { /* generic */ char *name; struct usb_device_descriptor *device_descriptor; /* per device descriptor */ -#if defined(CONFIG_USBD_HS) - struct usb_qualifier_descriptor *qualifier_descriptor; -#endif void (*event) (struct usb_device_instance *device, usb_device_event_t event, int data); @@ -644,14 +633,6 @@ struct usb_string_descriptor *usbd_get_string (u8); struct usb_device_descriptor *usbd_device_device_descriptor(struct usb_device_instance *, int); -#if defined(CONFIG_USBD_HS) -/* - * is_usbd_high_speed routine needs to be defined by specific gadget driver - * It returns true if device enumerates at High speed - * Retuns false otherwise - */ -int is_usbd_high_speed(void); -#endif int usbd_endpoint_halted (struct usb_device_instance *device, int endpoint); void usbd_rcv_complete(struct usb_endpoint_instance *endpoint, int len, int urb_bad); void usbd_tx_complete (struct usb_endpoint_instance *endpoint); -- cgit v1.2.3 From 46df77669ec4d8f04b0faf770d661f79971775a6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:50 -0500 Subject: nxp: Rename CONFIG_U_BOOT_HDR_SIZE to FSL_U_BOOT_HDR_SIZE This is always defined to 16K, so we move this over to include/fsl_validate.h to start with. Next, we rename this from CONFIG_ to FSL_. Coalesce the various comments around this definition to be in fsl_validate.h as well to explain the usage. Signed-off-by: Tom Rini --- include/configs/T104xRDB.h | 8 +------- include/configs/ls1021atsn.h | 15 --------------- include/configs/ls1021atwr.h | 19 ------------------- include/configs/ls1043a_common.h | 27 --------------------------- include/configs/ls1046a_common.h | 13 ------------- include/configs/ls1088a_common.h | 13 ------------- include/fsl_validate.h | 7 +++++++ 7 files changed, 8 insertions(+), 94 deletions(-) (limited to 'include') diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 5bdc2105f56..7a5bf937e4c 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -20,13 +20,7 @@ #ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. - */ -#define CFG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + \ - CONFIG_U_BOOT_HDR_SIZE) +#define CFG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + (16 << 10)) #else #define CFG_SYS_NAND_U_BOOT_SIZE (768 << 10) #endif diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 5612c60ae90..b15c4a238bc 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -38,21 +38,6 @@ #define SDRAM_CFG2_FRC_SR 0x80000000 #define SDRAM_CFG_BI 0x00000001 -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -#endif /* ifdef CONFIG_NXP_ESBC */ - -#ifdef CONFIG_U_BOOT_HDR_SIZE -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw U-Boot image instead of FIT image. - */ -#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ -#endif - #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 281b26fa2ba..9b22a2db21a 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -37,25 +37,6 @@ #define SDRAM_CFG2_FRC_SR 0x80000000 #define SDRAM_CFG_BI 0x00000001 -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_NXP_ESBC -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. - */ -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -#endif /* ifdef CONFIG_NXP_ESBC */ - -#ifdef CONFIG_U_BOOT_HDR_SIZE -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ -#endif - #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index d0380b33732..685e7e65d15 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -41,37 +41,10 @@ /* Serial Port */ #define CFG_SYS_NS16550_CLK (get_serial_clock()) -/* SD boot SPL */ -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_NXP_ESBC */ -#endif - /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE - -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -#endif /* ifdef CONFIG_NXP_ESBC */ - -#ifdef CONFIG_U_BOOT_HDR_SIZE -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ - #endif /* GPIO */ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 250891e9e30..ae9dc0c73b0 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -41,19 +41,6 @@ /* Serial Port */ #define CFG_SYS_NS16550_CLK (get_serial_clock()) -/* SD boot SPL */ -#ifdef CONFIG_SD_BOOT -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_NXP_ESBC */ -#endif - /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index bcba8d81c04..86c5d48c0de 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -133,17 +133,4 @@ unsigned long long get_qixis_addr(void); " 0x580e00000 \0" #endif -#ifdef CONFIG_SPL -#ifdef CONFIG_NXP_ESBC -#define CONFIG_U_BOOT_HDR_SIZE (16 << 10) -/* - * HDR would be appended at end of image and copied to DDR along - * with U-Boot image. Here u-boot max. size is 512K. So if binary - * size increases then increase this size in case of secure boot as - * it uses raw u-boot image instead of fit image. - */ -#endif /* ifdef CONFIG_NXP_ESBC */ - -#endif - #endif /* __LS1088_COMMON_H */ diff --git a/include/fsl_validate.h b/include/fsl_validate.h index 252d499e7b1..fbcbd424967 100644 --- a/include/fsl_validate.h +++ b/include/fsl_validate.h @@ -280,4 +280,11 @@ int fsl_setenv_chain_of_trust(void); * Architecture header (appended to U-boot image). */ void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr); + +/* + * This header is appended at end of image and copied to DDR along + * with the U-Boot image and later used as part of the validation + * flow + */ +#define FSL_U_BOOT_HDR_SIZE (16 << 10) #endif -- cgit v1.2.3 From 8214b772cf213f1f02e5e33f4a5158f52d9d2c23 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 2 Dec 2022 16:42:51 -0500 Subject: T104xRDB: Remove non-TARGET_T1042D4RDB variants At this point only the TARGET_T1042D4RDB variant of this is supported in tree, so remove the remaining parts of the other platforms. Signed-off-by: Tom Rini --- include/configs/T104xRDB.h | 52 ++++------------------------------------------ 1 file changed, 4 insertions(+), 48 deletions(-) (limited to 'include') diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 7a5bf937e4c..cfde8ecf9c6 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -127,24 +127,10 @@ #define CPLD_LBMAP_RESET 0xFF #define CPLD_LBMAP_SHIFT 0x03 -#if defined(CONFIG_TARGET_T1042RDB_PI) -#define CPLD_DIU_SEL_DFP 0x80 -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define CPLD_DIU_SEL_DFP 0xc0 #endif -#if defined(CONFIG_TARGET_T1040D4RDB) -#define CPLD_INT_MASK_ALL 0xFF -#define CPLD_INT_MASK_THERM 0x80 -#define CPLD_INT_MASK_DVI_DFP 0x40 -#define CPLD_INT_MASK_QSGMII1 0x20 -#define CPLD_INT_MASK_QSGMII2 0x10 -#define CPLD_INT_MASK_SGMI1 0x08 -#define CPLD_INT_MASK_SGMI2 0x04 -#define CPLD_INT_MASK_TDMR1 0x02 -#define CPLD_INT_MASK_TDMR2 0x01 -#endif - #define CFG_SYS_CPLD_BASE 0xffdf0000 #define CFG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CFG_SYS_CPLD_BASE) #define CFG_SYS_CSPR2_EXT (0xf) @@ -266,9 +252,7 @@ #define I2C_MUX_PCA_ADDR 0x70 #define I2C_MUX_CH_DEFAULT 0x8 -#if defined(CONFIG_TARGET_T1042RDB_PI) || \ - defined(CONFIG_TARGET_T1040D4RDB) || \ - defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) /* * RTC configuration */ @@ -350,36 +334,16 @@ #endif /* CONFIG_NOBQFMAN */ #ifdef CONFIG_FMAN_ENET -#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB) -#define CFG_SYS_SGMII1_PHY_ADDR 0x03 -#elif defined(CONFIG_TARGET_T1040D4RDB) -#define CFG_SYS_SGMII1_PHY_ADDR 0x01 -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define CFG_SYS_SGMII1_PHY_ADDR 0x02 #define CFG_SYS_SGMII2_PHY_ADDR 0x03 #define CFG_SYS_SGMII3_PHY_ADDR 0x01 #endif -#if defined(CONFIG_TARGET_T1040D4RDB) || defined(CONFIG_TARGET_T1042D4RDB) -#define CFG_SYS_RGMII1_PHY_ADDR 0x04 -#define CFG_SYS_RGMII2_PHY_ADDR 0x05 -#else #define CFG_SYS_RGMII1_PHY_ADDR 0x01 #define CFG_SYS_RGMII2_PHY_ADDR 0x02 #endif -/* Enable VSC9953 L2 Switch driver on T1040 SoC */ -#if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1040D4RDB) -#ifdef CONFIG_TARGET_T1040RDB -#define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x04 -#define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x08 -#else -#define CFG_SYS_FM1_QSGMII11_PHY_ADDR 0x08 -#define CFG_SYS_FM1_QSGMII21_PHY_ADDR 0x0c -#endif -#endif -#endif - /* * Miscellaneous configurable options */ @@ -402,15 +366,7 @@ #define __USB_PHY_TYPE utmi #define RAMDISKFILE "t104xrdb/ramdisk.uboot" -#ifdef CONFIG_TARGET_T1040RDB -#define FDTFILE "t1040rdb/t1040rdb.dtb" -#elif defined(CONFIG_TARGET_T1042RDB_PI) -#define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" -#elif defined(CONFIG_TARGET_T1042RDB) -#define FDTFILE "t1042rdb/t1042rdb.dtb" -#elif defined(CONFIG_TARGET_T1040D4RDB) -#define FDTFILE "t1042rdb/t1040d4rdb.dtb" -#elif defined(CONFIG_TARGET_T1042D4RDB) +#if defined(CONFIG_TARGET_T1042D4RDB) #define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif -- cgit v1.2.3 From 7ee2f977b7913ac7c1eda11051fe7401ab73ab89 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:28 -0500 Subject: Convert CONFIG_NEVER_ASSERT_ODT_TO_CPU to Kconfig This converts the following to Kconfig: CONFIG_NEVER_ASSERT_ODT_TO_CPU Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 7b932eb3890..e0ac9338d32 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -55,8 +55,6 @@ #define CFG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN) -#undef CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert ODT to internal IOs */ - /* * Manually set up DDR parameters */ -- cgit v1.2.3 From 2c065aeeee8c4033f41836eafef0d949c94bf769 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:30 -0500 Subject: mtd: ubi: Finish moving configuration to Kconfig We have some unused and undefined symbols to remove references to, so do that. Move the final things that we do set (or need to keep unset) to Kconfig instead. Signed-off-by: Tom Rini --- include/ubi_uboot.h | 22 ---------------------- 1 file changed, 22 deletions(-) (limited to 'include') diff --git a/include/ubi_uboot.h b/include/ubi_uboot.h index 0770228cd89..6da348eb628 100644 --- a/include/ubi_uboot.h +++ b/include/ubi_uboot.h @@ -34,28 +34,6 @@ #include -/* configurable */ -#define CONFIG_MTD_UBI_BEB_RESERVE 1 - -/* debug options (Linux: drivers/mtd/ubi/Kconfig.debug) */ -#undef CONFIG_MTD_UBI_DEBUG -#undef CONFIG_MTD_UBI_DEBUG_PARANOID -#undef CONFIG_MTD_UBI_DEBUG_MSG -#undef CONFIG_MTD_UBI_DEBUG_MSG_EBA -#undef CONFIG_MTD_UBI_DEBUG_MSG_WL -#undef CONFIG_MTD_UBI_DEBUG_MSG_IO -#undef CONFIG_MTD_UBI_DEBUG_MSG_BLD - -#undef CONFIG_MTD_UBI_BLOCK - -/* ubi_init() disables returning error codes when built into the Linux - * kernel so that it doesn't hang the Linux kernel boot process. Since - * the U-Boot driver code depends on getting valid error codes from this - * function we just tell the UBI layer that we are building as a module - * (which only enables the additional error reporting). - */ -#define CONFIG_MTD_UBI_MODULE - /* build.c */ #define get_device(...) #define put_device(...) -- cgit v1.2.3 From dc2c451a94e11e0b5ac006fd603b746632734d5c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:32 -0500 Subject: valgrind: Rework test for unsupported platforms Change things so that on an unsupported platform we will #error rather than undef the feature. Signed-off-by: Tom Rini --- include/valgrind/valgrind.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/valgrind/valgrind.h b/include/valgrind/valgrind.h index e59a7fde321..5d4fa5f43b4 100644 --- a/include/valgrind/valgrind.h +++ b/include/valgrind/valgrind.h @@ -121,7 +121,9 @@ #else /* If we're not compiling for our target platform, don't generate any inline asms. */ -# undef CONFIG_VALGRIND +# if IS_ENABLED(CONFIG_VALGRIND) +# error "Unsupported platform for valgrind" +# endif #endif -- cgit v1.2.3 From 218ce3695bfd02f048443f888137e134dbcfcbfc Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:34 -0500 Subject: global: Remove undef CONFIG_... for unused values We have a number of places that undef CONFIG_... while we never reference CONFIG_... in the first place. Remove these lines. Signed-off-by: Tom Rini --- include/configs/P1010RDB.h | 1 - include/configs/p1_p2_rdb_pc.h | 1 - include/configs/s5p4418_nanopi2.h | 2 -- 3 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 2267a7a9c8b..afb602c5bce 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -309,7 +309,6 @@ extern unsigned long get_sdram_size(void); #endif /* Serial Port */ -#undef CONFIG_SERIAL_SOFTWARE_FIFO #define CFG_SYS_NS16550_CLK get_bus_freq(0) #define CFG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index c05904a813d..74627b2e630 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -302,7 +302,6 @@ * open - index 2 * shorted - index 1 */ -#undef CONFIG_SERIAL_SOFTWARE_FIFO #define CFG_SYS_NS16550_CLK get_bus_freq(0) #define CFG_SYS_BAUDRATE_TABLE \ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index e071d4da5e8..b4b2dbd0386 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -66,8 +66,6 @@ /*----------------------------------------------------------------------- * High Level System Configuration */ -/* Not used: not need IRQ/FIQ stuff */ -#undef CONFIG_USE_IRQ /* decrementer freq: 1ms ticks */ /*----------------------------------------------------------------------- -- cgit v1.2.3 From 04501ecca26d0f3ad10065775c1bddda02a02db0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:36 -0500 Subject: global: Migrate CONFIG_ARM_GIC_BASE_ADDRESS to CFG Perform a simple rename of CONFIG_ARM_GIC_BASE_ADDRESS to CFG_ARM_GIC_BASE_ADDRESS Signed-off-by: Tom Rini --- include/configs/arndale.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 7a244769e30..8acc525b11c 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -19,6 +19,6 @@ #define CONFIG_SMP_PEN_ADDR 0x02020000 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ -#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 +#define CFG_ARM_GIC_BASE_ADDRESS 0x10480000 #endif /* __CONFIG_H */ -- cgit v1.2.3 From b8089c6d688dd031d07274fc07678a2005b466e9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:38 -0500 Subject: global: Migrate CONFIG_DFU_ALT et al to CFG Perform simple renames of: CONFIG_DFU_ALT to CFG_DFU_ALT CONFIG_DFU_ALT_BOOT_EMMC to CFG_DFU_ALT_BOOT_EMMC CONFIG_DFU_ALT_BOOT_SD to CFG_DFU_ALT_BOOT_SD CONFIG_DFU_ALT_SYSTEM to CFG_DFU_ALT_SYSTEM CONFIG_DFU_ENV_SETTINGS to CFG_DFU_ENV_SETTINGS Signed-off-by: Tom Rini --- include/configs/mx7dsabresd.h | 4 ++-- include/configs/odroid.h | 8 ++++---- include/configs/odroid_xu3.h | 8 ++++---- include/configs/pico-imx6.h | 4 ++-- include/configs/pico-imx6ul.h | 4 ++-- include/configs/pico-imx7d.h | 4 ++-- include/configs/s5p_goni.h | 4 ++-- include/configs/trats.h | 4 ++-- include/configs/trats2.h | 4 ++-- include/configs/warp7.h | 4 ++-- 10 files changed, 24 insertions(+), 24 deletions(-) (limited to 'include') diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index bd70b62bd20..e56b6101af4 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -44,7 +44,7 @@ "initrd_high=0xffffffff\0" \ "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ -#define CONFIG_DFU_ENV_SETTINGS \ +#define CFG_DFU_ENV_SETTINGS \ "dfu_alt_info=image raw 0 0x800000;"\ "u-boot raw 0 0x4000;"\ "bootimg part 0 1;"\ @@ -53,7 +53,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ UPDATE_M4_ENV \ CONFIG_MFG_ENV_SETTINGS \ - CONFIG_DFU_ENV_SETTINGS \ + CFG_DFU_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index f252b349437..e2331e45cdf 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -27,7 +27,7 @@ #define PARTS_BOOT "boot" #define PARTS_ROOT "platform" -#define CONFIG_DFU_ALT \ +#define CFG_DFU_ALT \ "uImage fat 0 1;" \ "zImage fat 0 1;" \ "Image.itb fat 0 1;" \ @@ -39,13 +39,13 @@ #define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) -#define CONFIG_DFU_ALT_BOOT_EMMC \ +#define CFG_DFU_ALT_BOOT_EMMC \ "u-boot raw 0x3e 0x800 mmcpart 1;" \ "bl1 raw 0x0 0x1e mmcpart 1;" \ "bl2 raw 0x1e 0x1d mmcpart 1;" \ "tzsw raw 0x83e 0x138 mmcpart 1\0" -#define CONFIG_DFU_ALT_BOOT_SD \ +#define CFG_DFU_ALT_BOOT_SD \ "u-boot raw 0x3f 0x800;" \ "bl1 raw 0x1 0x1e;" \ "bl2 raw 0x1f 0x1d;" \ @@ -132,7 +132,7 @@ "mmcbootpart=1\0" \ "mmcrootdev=0\0" \ "mmcrootpart=2\0" \ - "dfu_alt_system="CONFIG_DFU_ALT \ + "dfu_alt_system="CFG_DFU_ALT \ "dfu_alt_info=Please reset the board\0" \ "consoleon=set console console=ttySAC1,115200n8; save; reset\0" \ "consoleoff=set console console=ram; save; reset\0" \ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index bf63a4de076..e4a81499a72 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -20,7 +20,7 @@ #define DFU_DEFAULT_POLL_TIMEOUT 300 #define DFU_MANIFEST_POLL_TIMEOUT 25000 -#define CONFIG_DFU_ALT_SYSTEM \ +#define CFG_DFU_ALT_SYSTEM \ "uImage fat 0 1;" \ "zImage fat 0 1;" \ "Image.itb fat 0 1;" \ @@ -34,14 +34,14 @@ "boot part 0 1;" \ "root part 0 2\0" -#define CONFIG_DFU_ALT_BOOT_EMMC \ +#define CFG_DFU_ALT_BOOT_EMMC \ "u-boot raw 0x3e 0x800 mmcpart 1;" \ "bl1 raw 0x0 0x1e mmcpart 1;" \ "bl2 raw 0x1e 0x1d mmcpart 1;" \ "tzsw raw 0x83e 0x200 mmcpart 1;" \ "params.bin raw 0x1880 0x20\0" -#define CONFIG_DFU_ALT_BOOT_SD \ +#define CFG_DFU_ALT_BOOT_SD \ "u-boot raw 0x3f 0x800;" \ "bl1 raw 0x1 0x1e;" \ "bl2 raw 0x1f 0x1d;" \ @@ -75,7 +75,7 @@ "mmcrootdev=0\0" \ "mmcbootpart=1\0" \ "mmcrootpart=2\0" \ - "dfu_alt_system="CONFIG_DFU_ALT_SYSTEM \ + "dfu_alt_system="CFG_DFU_ALT_SYSTEM \ "dfu_alt_info=Autoset by THOR/DFU command run.\0" #endif /* __CONFIG_H */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 6d7873daa0a..719b7014405 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -21,7 +21,7 @@ #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_DFU_ENV_SETTINGS \ +#define CFG_DFU_ENV_SETTINGS \ "dfu_alt_info=" \ "spl raw 0x2 0x400;" \ "u-boot raw 0x8a 0x1000;" \ @@ -47,7 +47,7 @@ "fdt_addr_r=0x18000000\0" \ "fdt_addr=0x18000000\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ - CONFIG_DFU_ENV_SETTINGS \ + CFG_DFU_ENV_SETTINGS \ "finduuid=part uuid mmc 0:1 uuid\0" \ "findfdt="\ "if test $baseboard = hobbit && test $board_rev = MX6Q ; then " \ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index faf11d5a72a..36f648f6340 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -28,7 +28,7 @@ #define DFU_DEFAULT_POLL_TIMEOUT 300 -#define CONFIG_DFU_ENV_SETTINGS \ +#define CFG_DFU_ENV_SETTINGS \ "dfu_alt_info=" \ "spl raw 0x2 0x400;" \ "u-boot raw 0x8a 0x400;" \ @@ -63,7 +63,7 @@ "ramdiskaddr=0x83000000\0" \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "mmcautodetect=yes\0" \ - CONFIG_DFU_ENV_SETTINGS \ + CFG_DFU_ENV_SETTINGS \ "findfdt=" \ "if test $fdtfile = ask ; then " \ "bootmenu -1; fi;" \ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 83907b06ebb..58192151042 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -15,7 +15,7 @@ /* MMC Config */ #define CFG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_DFU_ENV_SETTINGS \ +#define CFG_DFU_ENV_SETTINGS \ "dfu_alt_info=" \ "spl raw 0x2 0x400;" \ "u-boot raw 0x8a 0x1000;" \ @@ -67,7 +67,7 @@ "ramdisk_addr_r=0x83000000\0" \ "ramdiskaddr=0x83000000\0" \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ - CONFIG_DFU_ENV_SETTINGS \ + CFG_DFU_ENV_SETTINGS \ "findfdt=" \ "if test $fdtfile = ask ; then " \ "bootmenu -1; fi;" \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index da83db1f68a..555bedb93d6 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -35,7 +35,7 @@ #define PARTS_CSC "csc" #define PARTS_UMS "ums" -#define CONFIG_DFU_ALT \ +#define CFG_DFU_ALT \ "u-boot raw 0x80 0x400;" \ "uImage ext4 0 2;" \ "exynos3-goni.dtb ext4 0 2;" \ @@ -102,7 +102,7 @@ "ubiblock=8\0" \ "ubi=enabled\0" \ "opts=always_resume=1\0" \ - "dfu_alt_info=" CONFIG_DFU_ALT "\0" + "dfu_alt_info=" CFG_DFU_ALT "\0" /* Goni has 3 banks of DRAM, but swap the bank */ #define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ diff --git a/include/configs/trats.h b/include/configs/trats.h index ec18842bbe8..3eac66539df 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -39,7 +39,7 @@ "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ -#define CONFIG_DFU_ALT \ +#define CFG_DFU_ALT \ "u-boot raw 0x80 0x400;" \ "/uImage ext4 0 2;" \ "/modem.bin ext4 0 2;" \ @@ -98,7 +98,7 @@ "mmcrootpart=5\0" \ "opts=always_resume=1\0" \ "partitions=" PARTS_DEFAULT \ - "dfu_alt_info=" CONFIG_DFU_ALT \ + "dfu_alt_info=" CFG_DFU_ALT \ "spladdr=0x40000100\0" \ "splsize=0x200\0" \ "splfile=falcon.bin\0" \ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 4d39b4005bd..18fca09a380 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -40,7 +40,7 @@ "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \ "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \ -#define CONFIG_DFU_ALT \ +#define CFG_DFU_ALT \ "u-boot raw 0x80 0x800;" \ "/uImage ext4 0 2;" \ "/modem.bin ext4 0 2;" \ @@ -86,7 +86,7 @@ "mmcrootpart=5\0" \ "opts=always_resume=1\0" \ "partitions=" PARTS_DEFAULT \ - "dfu_alt_info=" CONFIG_DFU_ALT \ + "dfu_alt_info=" CFG_DFU_ALT \ "uartpath=ap\0" \ "usbpath=ap\0" \ "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index a985c6f28f3..188180da54e 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -16,7 +16,7 @@ /* MMC Config*/ #define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_DFU_ENV_SETTINGS \ +#define CFG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ /* When booting with FIT specify the node entry containing boot.scr */ @@ -27,7 +27,7 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_DFU_ENV_SETTINGS \ + CFG_DFU_ENV_SETTINGS \ "script=boot.scr\0" \ "bootscr_fitimage_name=bootscr\0" \ "script_signed=boot.scr.imx-signed\0" \ -- cgit v1.2.3 From 42119de8b51ca703d5e6c489b59c99aa3db7ab30 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:39 -0500 Subject: global: Migrate CONFIG_DW_WDT_CLOCK_KHZ to CFG Perform a simple rename of CONFIG_DW_WDT_CLOCK_KHZ to CFG_DW_WDT_CLOCK_KHZ Signed-off-by: Tom Rini --- include/configs/socfpga_common.h | 2 +- include/configs/socfpga_soc64_common.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 088cd4d4f7f..d0f5331d451 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -64,7 +64,7 @@ /* * L4 Watchdog */ -#define CONFIG_DW_WDT_CLOCK_KHZ 25000 +#define CFG_DW_WDT_CLOCK_KHZ 25000 /* * NAND Support diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 47089f312d2..df3927297bb 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -90,10 +90,10 @@ #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 #ifndef __ASSEMBLY__ unsigned int cm_get_l4_sys_free_clk_hz(void); -#define CONFIG_DW_WDT_CLOCK_KHZ (cm_get_l4_sys_free_clk_hz() / 1000) +#define CFG_DW_WDT_CLOCK_KHZ (cm_get_l4_sys_free_clk_hz() / 1000) #endif #else -#define CONFIG_DW_WDT_CLOCK_KHZ 100000 +#define CFG_DW_WDT_CLOCK_KHZ 100000 #endif /* -- cgit v1.2.3 From acf29d8ccb56e1c366a8c360cfa7cc8f44d4d281 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:40 -0500 Subject: global: Migrate CONFIG_ENV_FLAGS_LIST_STATIC to CFG Perform a simple rename of CONFIG_ENV_FLAGS_LIST_STATIC to CFG_ENV_FLAGS_LIST_STATIC Signed-off-by: Tom Rini --- include/configs/aristainetos2.h | 2 +- include/configs/imx6q-bosch-acc.h | 2 +- include/env_flags.h | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 85413545715..ff213a41b8f 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -418,7 +418,7 @@ /* UBI support */ -#define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mw,serial#:sw,board_type:sw," \ +#define CFG_ENV_FLAGS_LIST_STATIC "ethaddr:mw,serial#:sw,board_type:sw," \ "sysnum:dw,panel:sw,ipaddr:iw,serverip:iw" #endif /* __ARISTAINETOS2_CONFIG_H */ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 99da081cdae..392f97050a6 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -45,7 +45,7 @@ "save_env=env save; env save\0" \ "altbootcmd=run handle_ustate; run switch_bootset; run save_env; run bootcmd\0" -#define CONFIG_ENV_FLAGS_LIST_STATIC \ +#define CFG_ENV_FLAGS_LIST_STATIC \ "bootset:bw," \ "clone_pending:bw," \ "endurance_test:bw," \ diff --git a/include/env_flags.h b/include/env_flags.h index 718d72773ca..6bd574c2bdb 100644 --- a/include/env_flags.h +++ b/include/env_flags.h @@ -35,8 +35,8 @@ enum env_flags_varaccess { #define ENV_FLAGS_VARTYPE_LOC 0 #define ENV_FLAGS_VARACCESS_LOC 1 -#ifndef CONFIG_ENV_FLAGS_LIST_STATIC -#define CONFIG_ENV_FLAGS_LIST_STATIC "" +#ifndef CFG_ENV_FLAGS_LIST_STATIC +#define CFG_ENV_FLAGS_LIST_STATIC "" #endif #ifdef CONFIG_NET @@ -87,7 +87,7 @@ enum env_flags_varaccess { NET_FLAGS \ NET6_FLAGS \ SERIAL_FLAGS \ - CONFIG_ENV_FLAGS_LIST_STATIC + CFG_ENV_FLAGS_LIST_STATIC #ifdef CONFIG_CMD_ENV_FLAGS /* -- cgit v1.2.3 From 7c5b8c7c643be917230c1b75da4267d76f484443 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:41 -0500 Subject: global: Migrate CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS to CFG Perform a simple rename of CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS to CFG_ENV_SETTINGS_BUTTONS_AND_LEDS Signed-off-by: Tom Rini --- include/configs/draco.h | 4 ++-- include/configs/etamin.h | 4 ++-- include/configs/pxm2.h | 4 ++-- include/configs/rastaban.h | 4 ++-- include/configs/thuban.h | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/draco.h b/include/configs/draco.h index 4869008da44..d1c7abe1b39 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -19,7 +19,7 @@ #define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */ #define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ -#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ +#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "button_dfu0=27\0" \ "led0=103,1,0\0" \ "led1=64,0,1\0" @@ -34,7 +34,7 @@ "nand_img_size=0x400000\0" \ "optargs=\0" \ "preboot=draco_led 0\0" \ - CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 811c7cb9618..8bfc9c9f629 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -56,7 +56,7 @@ #define BOARD_DFU_BUTTON_GPIO 27 #define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ /* In dfu mode keep led1 on */ -#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ +#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "button_dfu0=27\0" \ "button_dfu1=87\0" \ "led0=3,0,1\0" \ @@ -134,7 +134,7 @@ "nand_img_size=0x400000\0" \ "optargs=\0" \ "preboot=draco_led 0\0" \ - CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 586a7edcbb5..eafa6ae9a9a 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -18,7 +18,7 @@ #define DDR_IOCTRL_VAL 0x18b #define DDR_PLL_FREQ 266 -#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ +#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "button_dfu0=59\0" \ "led0=117,0,1\0" \ @@ -34,7 +34,7 @@ "nand_img_size=0x500000\0" \ "optargs=\0" \ "preboot=draco_led 0\0" \ - CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "splashpos=m,m\0" \ CONFIG_ENV_SETTINGS_V1 \ CONFIG_ENV_SETTINGS_NAND_V1 \ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 49cd11c17b4..2e002faf2e6 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -21,7 +21,7 @@ #define BOARD_DFU_BUTTON_GPIO 27 #define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ /* In dfu mode keep led1 on */ -#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ +#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "button_dfu0=27\0" \ "button_dfu1=87\0" \ "led0=3,0,1\0" \ @@ -44,7 +44,7 @@ "nand_img_size=0x400000\0" \ "optargs=\0" \ "preboot=draco_led 0\0" \ - CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 diff --git a/include/configs/thuban.h b/include/configs/thuban.h index 696306e4659..25c5a8ccd20 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -19,7 +19,7 @@ #define BOARD_DFU_BUTTON_GPIO 27 /* Use as default */ #define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ -#define CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ +#define CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "button_dfu0=27\0" \ "led0=103,1,0\0" \ "led1=64,0,1\0" @@ -37,7 +37,7 @@ "nand_img_size=0x400000\0" \ "optargs=\0" \ "preboot=draco_led 0\0" \ - CONFIG_ENV_SETTINGS_BUTTONS_AND_LEDS \ + CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ CONFIG_ENV_SETTINGS_NAND_V2 -- cgit v1.2.3 From fe5a5393bdf4cd2acad715b1ffa80f37c304b843 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:42 -0500 Subject: global: Migrate CONFIG_ENV_SETTINGS_NAND_V1 to CFG Perform a simple rename of CONFIG_ENV_SETTINGS_NAND_V1 to CFG_ENV_SETTINGS_NAND_V1 Signed-off-by: Tom Rini --- include/configs/pxm2.h | 2 +- include/configs/rut.h | 2 +- include/configs/siemens-am33x-common.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index eafa6ae9a9a..c6a01270a54 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -37,7 +37,7 @@ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "splashpos=m,m\0" \ CONFIG_ENV_SETTINGS_V1 \ - CONFIG_ENV_SETTINGS_NAND_V1 \ + CFG_ENV_SETTINGS_NAND_V1 \ "mmc_dev=0\0" \ "mmc_root=/dev/mmcblk0p2 rw\0" \ "mmc_root_fs_type=ext4 rootwait\0" \ diff --git a/include/configs/rut.h b/include/configs/rut.h index ac48372b6c0..f51771f9ca4 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -34,7 +34,7 @@ "splashpos=m,m\0" \ "optargs=fixrtc --no-log consoleblank=0 \0" \ CONFIG_ENV_SETTINGS_V1 \ - CONFIG_ENV_SETTINGS_NAND_V1 \ + CFG_ENV_SETTINGS_NAND_V1 \ "mmc_dev=0\0" \ "mmc_root=/dev/mmcblk0p2 rw\0" \ "mmc_root_fs_type=ext4 rootwait\0" \ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 406a179842e..296ac34da63 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -196,7 +196,7 @@ "kernel_b part 0 8;" \ "rootfs partubi 0 10" -#define CONFIG_ENV_SETTINGS_NAND_V1 \ +#define CFG_ENV_SETTINGS_NAND_V1 \ "nand_active_ubi_vol=rootfs_a\0" \ "nand_active_ubi_vol_A=rootfs_a\0" \ "nand_active_ubi_vol_B=rootfs_b\0" \ -- cgit v1.2.3 From 4a609781d514456980654079407dad0a801ff485 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:43 -0500 Subject: global: Migrate CONFIG_ENV_SETTINGS_NAND_V2 to CFG Perform a simple rename of CONFIG_ENV_SETTINGS_NAND_V2 to CFG_ENV_SETTINGS_NAND_V2 Signed-off-by: Tom Rini --- include/configs/draco.h | 2 +- include/configs/etamin.h | 6 +++--- include/configs/rastaban.h | 2 +- include/configs/siemens-am33x-common.h | 2 +- include/configs/thuban.h | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/draco.h b/include/configs/draco.h index d1c7abe1b39..5b0daec11a6 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -36,6 +36,6 @@ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ - CONFIG_ENV_SETTINGS_NAND_V2 + CFG_ENV_SETTINGS_NAND_V2 #endif /* ! __CONFIG_DRACO_H */ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 8bfc9c9f629..c68d0df02a2 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -93,8 +93,8 @@ "u-boot.env1 mtddev;" \ "rootfs mtddevubi" \ -#undef CONFIG_ENV_SETTINGS_NAND_V2 -#define CONFIG_ENV_SETTINGS_NAND_V2 \ +#undef CFG_ENV_SETTINGS_NAND_V2 +#define CFG_ENV_SETTINGS_NAND_V2 \ "nand_active_ubi_vol=rootfs_a\0" \ "rootfs_name=rootfs\0" \ "kernel_name=uImage\0"\ @@ -136,6 +136,6 @@ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ - CONFIG_ENV_SETTINGS_NAND_V2 + CFG_ENV_SETTINGS_NAND_V2 #endif /* ! __CONFIG_ETAMIN_H */ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 2e002faf2e6..f3435b2b8c6 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -46,6 +46,6 @@ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ - CONFIG_ENV_SETTINGS_NAND_V2 + CFG_ENV_SETTINGS_NAND_V2 #endif /* ! __CONFIG_RASTABAN_H */ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 296ac34da63..7e9a55ec610 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -273,7 +273,7 @@ "u-boot.env1 part 0 7;" \ "rootfs partubi 0 9" \ -#define CONFIG_ENV_SETTINGS_NAND_V2 \ +#define CFG_ENV_SETTINGS_NAND_V2 \ "nand_active_ubi_vol=rootfs_a\0" \ "rootfs_name=rootfs\0" \ "kernel_name=uImage\0"\ diff --git a/include/configs/thuban.h b/include/configs/thuban.h index 25c5a8ccd20..960b42dffd0 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -39,6 +39,6 @@ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ CONFIG_ENV_SETTINGS_V2 \ - CONFIG_ENV_SETTINGS_NAND_V2 + CFG_ENV_SETTINGS_NAND_V2 #endif /* ! __CONFIG_THUBAN_H */ -- cgit v1.2.3 From 10bb746127f2bf8d7b4475dd7528b10712e07d8e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:44 -0500 Subject: global: Migrate CONFIG_ENV_SETTINGS_V1 to CFG Perform a simple rename of CONFIG_ENV_SETTINGS_V1 to CFG_ENV_SETTINGS_V1 Signed-off-by: Tom Rini --- include/configs/pxm2.h | 2 +- include/configs/rut.h | 2 +- include/configs/siemens-am33x-common.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index c6a01270a54..48f49906b84 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -36,7 +36,7 @@ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ "splashpos=m,m\0" \ - CONFIG_ENV_SETTINGS_V1 \ + CFG_ENV_SETTINGS_V1 \ CFG_ENV_SETTINGS_NAND_V1 \ "mmc_dev=0\0" \ "mmc_root=/dev/mmcblk0p2 rw\0" \ diff --git a/include/configs/rut.h b/include/configs/rut.h index f51771f9ca4..b07d0c50604 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -33,7 +33,7 @@ "nand_img_size=0x500000\0" \ "splashpos=m,m\0" \ "optargs=fixrtc --no-log consoleblank=0 \0" \ - CONFIG_ENV_SETTINGS_V1 \ + CFG_ENV_SETTINGS_V1 \ CFG_ENV_SETTINGS_NAND_V1 \ "mmc_dev=0\0" \ "mmc_root=/dev/mmcblk0p2 rw\0" \ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 7e9a55ec610..4f277f08a44 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -229,7 +229,7 @@ "${nand_img_size}; bootm ${kloadaddr}\0" \ COMMON_ENV_NAND_CMDS -#define CONFIG_ENV_SETTINGS_V1 \ +#define CFG_ENV_SETTINGS_V1 \ COMMON_ENV_SETTINGS \ "net_args=run bootargs_defaults;" \ "mtdparts default;" \ -- cgit v1.2.3 From d6ae6c7076b3f34b7e40b3570ccc7bdf8a0937f7 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:45 -0500 Subject: global: Migrate CONFIG_ENV_SETTINGS_V2 to CFG Perform a simple rename of CONFIG_ENV_SETTINGS_V2 to CFG_ENV_SETTINGS_V2 Signed-off-by: Tom Rini --- include/configs/draco.h | 2 +- include/configs/etamin.h | 2 +- include/configs/rastaban.h | 2 +- include/configs/siemens-am33x-common.h | 2 +- include/configs/thuban.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/draco.h b/include/configs/draco.h index 5b0daec11a6..ab3cf10d779 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -35,7 +35,7 @@ "optargs=\0" \ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - CONFIG_ENV_SETTINGS_V2 \ + CFG_ENV_SETTINGS_V2 \ CFG_ENV_SETTINGS_NAND_V2 #endif /* ! __CONFIG_DRACO_H */ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index c68d0df02a2..57f619f55ff 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -135,7 +135,7 @@ "optargs=\0" \ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - CONFIG_ENV_SETTINGS_V2 \ + CFG_ENV_SETTINGS_V2 \ CFG_ENV_SETTINGS_NAND_V2 #endif /* ! __CONFIG_ETAMIN_H */ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index f3435b2b8c6..59d56d66624 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -45,7 +45,7 @@ "optargs=\0" \ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - CONFIG_ENV_SETTINGS_V2 \ + CFG_ENV_SETTINGS_V2 \ CFG_ENV_SETTINGS_NAND_V2 #endif /* ! __CONFIG_RASTABAN_H */ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 4f277f08a44..7def657bcd1 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -306,7 +306,7 @@ "bootm ${kloadaddr} - ${loadaddr}\0" \ COMMON_ENV_NAND_CMDS -#define CONFIG_ENV_SETTINGS_V2 \ +#define CFG_ENV_SETTINGS_V2 \ COMMON_ENV_SETTINGS \ "net_args=run bootargs_defaults;" \ "mtdparts default;" \ diff --git a/include/configs/thuban.h b/include/configs/thuban.h index 960b42dffd0..c8b27263e85 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -38,7 +38,7 @@ "optargs=\0" \ "preboot=draco_led 0\0" \ CFG_ENV_SETTINGS_BUTTONS_AND_LEDS \ - CONFIG_ENV_SETTINGS_V2 \ + CFG_ENV_SETTINGS_V2 \ CFG_ENV_SETTINGS_NAND_V2 #endif /* ! __CONFIG_THUBAN_H */ -- cgit v1.2.3 From 3673a47b55c67359dc883bdf7be372d32ae6dbe6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:46 -0500 Subject: global: Migrate CONFIG_ENV_SROM_BANK to CFG Perform a simple rename of CONFIG_ENV_SROM_BANK to CFG_ENV_SROM_BANK Signed-off-by: Tom Rini --- include/configs/exynos5-common.h | 2 +- include/configs/smdkc100.h | 2 +- include/configs/smdkv310.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 8e277ce7ff2..43ea34db7b6 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -48,7 +48,7 @@ /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET -#define CONFIG_ENV_SROM_BANK 1 +#define CFG_ENV_SROM_BANK 1 #endif /*CONFIG_CMD_NET*/ /* Enable Time Command */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index ffa1a1fcb0e..ccb7ec38d03 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -94,7 +94,7 @@ * Ethernet Contoller driver */ #ifdef CONFIG_CMD_NET -#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/ +#define CFG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/ #endif /* CONFIG_CMD_NET */ #endif /* __CONFIG_H */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 38de1fa9849..f0604195ad9 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -36,7 +36,7 @@ /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET -#define CONFIG_ENV_SROM_BANK 1 +#define CFG_ENV_SROM_BANK 1 #endif /*CONFIG_CMD_NET*/ #endif /* __CONFIG_H */ -- cgit v1.2.3 From ef2e1745da9151083c197d6077d0a14498eec13b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:47 -0500 Subject: global: Migrate CONFIG_ENV_TOTAL_SIZE to CFG Perform a simple rename of CONFIG_ENV_TOTAL_SIZE to CFG_ENV_TOTAL_SIZE Signed-off-by: Tom Rini --- include/configs/kmcent2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 80bff4b8937..a4b6a6e555d 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -127,7 +127,7 @@ #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS /* Environment in parallel NOR-Flash */ -#define CONFIG_ENV_TOTAL_SIZE 0x040000 +#define CFG_ENV_TOTAL_SIZE 0x040000 #define ENV_DEL_ADDR 0xebf00000 /*direct for newenv*/ /* -- cgit v1.2.3 From b9abcb8c9fc196ef502eb8b2909bbb92a109deab Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:48 -0500 Subject: global: Migrate CONFIG_ET1100_BASE to CFG Perform a simple rename of CONFIG_ET1100_BASE to CFG_ET1100_BASE Signed-off-by: Tom Rini --- include/configs/meesc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/meesc.h b/include/configs/meesc.h index d190e4b5039..38da55c70bf 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -60,6 +60,6 @@ #endif /* hw-controller addresses */ -#define CONFIG_ET1100_BASE 0x70000000 +#define CFG_ET1100_BASE 0x70000000 #endif -- cgit v1.2.3 From fb55ac2cfe017b5f83d97f25e3ed2ceaa9946405 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:49 -0500 Subject: global: Migrate CONFIG_ETHBASE to CFG Perform a simple rename of CONFIG_ETHBASE to CFG_ETHBASE Signed-off-by: Tom Rini --- include/configs/xtfpga.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index e0189c58f04..83a0539d8f2 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -120,7 +120,7 @@ /* Ethernet Driver Info */ /*======================*/ -#define CONFIG_ETHBASE 00:50:C2:13:6f:00 +#define CFG_ETHBASE 00:50:C2:13:6f:00 #define CFG_SYS_ETHOC_BASE IOADDR(0x0d030000) #define CFG_SYS_ETHOC_BUFFER_ADDR IOADDR(0x0D800000) -- cgit v1.2.3 From 0613c36a7a5973d58a50b764ee647099e80cc97d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:50 -0500 Subject: global: Migrate CONFIG_EXTRA_ENV_SETTINGS to CFG Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS Signed-off-by: Tom Rini --- include/configs/M5208EVBE.h | 2 +- include/configs/M5235EVB.h | 2 +- include/configs/M5253DEMO.h | 2 +- include/configs/M5272C3.h | 2 +- include/configs/M5275EVB.h | 2 +- include/configs/M5282EVB.h | 2 +- include/configs/M53017EVB.h | 2 +- include/configs/M5329EVB.h | 2 +- include/configs/M5373EVB.h | 2 +- include/configs/MCR3000.h | 2 +- include/configs/MPC837XERDB.h | 2 +- include/configs/MPC8548CDS.h | 2 +- include/configs/P1010RDB.h | 2 +- include/configs/P2041RDB.h | 2 +- include/configs/T102xRDB.h | 2 +- include/configs/T104xRDB.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/T4240RDB.h | 2 +- include/configs/alt.h | 2 +- include/configs/am335x_evm.h | 2 +- include/configs/am335x_guardian.h | 2 +- include/configs/am335x_igep003x.h | 2 +- include/configs/am335x_shc.h | 2 +- include/configs/am335x_sl50.h | 2 +- include/configs/am3517_evm.h | 2 +- include/configs/am43xx_evm.h | 2 +- include/configs/am62ax_evm.h | 2 +- include/configs/am62x_evm.h | 2 +- include/configs/am64x_evm.h | 2 +- include/configs/am65x_evm.h | 2 +- include/configs/amcore.h | 2 +- include/configs/apalis-imx8.h | 2 +- include/configs/apalis_imx6.h | 2 +- include/configs/apple.h | 2 +- include/configs/arbel.h | 2 +- include/configs/aristainetos2.h | 2 +- include/configs/astro_mcf5373l.h | 2 +- include/configs/at91sam9263ek.h | 2 +- include/configs/at91sam9n12ek.h | 2 +- include/configs/ax25-ae350.h | 2 +- include/configs/axs10x.h | 2 +- include/configs/baltos.h | 2 +- include/configs/bcm_ns3.h | 2 +- include/configs/bcmstb.h | 2 +- include/configs/beacon-rzg2m.h | 4 ++-- include/configs/bitmain_antminer_s9.h | 2 +- include/configs/bk4r1.h | 2 +- include/configs/brppt1.h | 2 +- include/configs/brppt2.h | 2 +- include/configs/brsmarc1.h | 2 +- include/configs/brxre1.h | 2 +- include/configs/capricorn-common.h | 2 +- include/configs/cgtqmx8.h | 2 +- include/configs/chiliboard.h | 2 +- include/configs/cl-som-imx7.h | 4 ++-- include/configs/clearfog.h | 2 +- include/configs/cm_fx6.h | 2 +- include/configs/cm_t43.h | 2 +- include/configs/colibri-imx6ull.h | 2 +- include/configs/colibri-imx8x.h | 2 +- include/configs/colibri_imx6.h | 2 +- include/configs/colibri_imx7.h | 2 +- include/configs/colibri_vf.h | 2 +- include/configs/conga-qeval20-qa3-e3845.h | 4 ++-- include/configs/controlcenterdc.h | 2 +- include/configs/crs3xx-98dx3236.h | 2 +- include/configs/da850evm.h | 2 +- include/configs/dart_6ul.h | 2 +- include/configs/db-88f6820-amc.h | 2 +- include/configs/db-88f6820-gp.h | 2 +- include/configs/db-xc3-24g4xg.h | 2 +- include/configs/devkit3250.h | 2 +- include/configs/devkit8000.h | 2 +- include/configs/dfi-bt700.h | 4 ++-- include/configs/dh_imx6.h | 2 +- include/configs/display5.h | 2 +- include/configs/dns325.h | 2 +- include/configs/dockstar.h | 2 +- include/configs/draco.h | 2 +- include/configs/dragonboard410c.h | 2 +- include/configs/dragonboard820c.h | 2 +- include/configs/dragonboard845c.h | 2 +- include/configs/dreamplug.h | 2 +- include/configs/ds109.h | 2 +- include/configs/ds414.h | 2 +- include/configs/durian.h | 2 +- include/configs/el6x_common.h | 2 +- include/configs/embestmx6boards.h | 2 +- include/configs/emsdp.h | 2 +- include/configs/etamin.h | 2 +- include/configs/evb_ast2500.h | 2 +- include/configs/evb_ast2600.h | 2 +- include/configs/evb_rv1108.h | 4 ++-- include/configs/exynos5-common.h | 2 +- include/configs/exynos7420-common.h | 2 +- include/configs/exynos78x0-common.h | 2 +- include/configs/gazerbeam.h | 2 +- include/configs/ge_b1x5v2.h | 2 +- include/configs/ge_bx50v3.h | 2 +- include/configs/goflexhome.h | 2 +- include/configs/gose.h | 2 +- include/configs/guruplug.h | 2 +- include/configs/helios4.h | 2 +- include/configs/highbank.h | 2 +- include/configs/hikey.h | 2 +- include/configs/hikey960.h | 2 +- include/configs/hsdk-4xd.h | 2 +- include/configs/hsdk.h | 2 +- include/configs/ib62x0.h | 2 +- include/configs/iconnect.h | 2 +- include/configs/imx6-engicam.h | 2 +- include/configs/imx6_logic.h | 2 +- include/configs/imx6dl-mamoj.h | 2 +- include/configs/imx6q-bosch-acc.h | 2 +- include/configs/imx6ulz_smm_m2.h | 2 +- include/configs/imx7-cm.h | 4 ++-- include/configs/imx8mm-cl-iot-gate.h | 2 +- include/configs/imx8mm-mx8menlo.h | 4 ++-- include/configs/imx8mm_beacon.h | 2 +- include/configs/imx8mm_data_modul_edm_sbc.h | 2 +- include/configs/imx8mm_evk.h | 2 +- include/configs/imx8mm_icore_mx8mm.h | 2 +- include/configs/imx8mm_venice.h | 2 +- include/configs/imx8mn_beacon.h | 2 +- include/configs/imx8mn_bsh_smm_s2.h | 2 +- include/configs/imx8mn_bsh_smm_s2pro.h | 2 +- include/configs/imx8mn_evk.h | 2 +- include/configs/imx8mn_var_som.h | 2 +- include/configs/imx8mn_venice.h | 2 +- include/configs/imx8mp_dhcom_pdk2.h | 2 +- include/configs/imx8mp_evk.h | 2 +- include/configs/imx8mp_icore_mx8mp.h | 2 +- include/configs/imx8mp_rsb3720.h | 2 +- include/configs/imx8mp_venice.h | 2 +- include/configs/imx8mq_cm.h | 2 +- include/configs/imx8mq_evk.h | 2 +- include/configs/imx8mq_phanbell.h | 2 +- include/configs/imx8qm_mek.h | 2 +- include/configs/imx8qm_rom7720.h | 2 +- include/configs/imx8qxp_mek.h | 2 +- include/configs/imx8ulp_evk.h | 2 +- include/configs/imx93_evk.h | 2 +- include/configs/imxrt1050-evk.h | 2 +- include/configs/iot2050.h | 2 +- include/configs/j721e_evm.h | 2 +- include/configs/j721s2_evm.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/kontron-sl-mx6ul.h | 2 +- include/configs/kontron-sl-mx8mm.h | 2 +- include/configs/kontron_pitx_imx8m.h | 2 +- include/configs/kontron_sl28.h | 2 +- include/configs/kp_imx53.h | 2 +- include/configs/kp_imx6q_tpc.h | 2 +- include/configs/lacie_kw.h | 2 +- include/configs/lager.h | 2 +- include/configs/legoev3.h | 2 +- include/configs/librem5.h | 2 +- include/configs/liteboard.h | 2 +- include/configs/ls1012a2g5rdb.h | 4 ++-- include/configs/ls1012a_common.h | 2 +- include/configs/ls1012afrdm.h | 4 ++-- include/configs/ls1012afrwy.h | 4 ++-- include/configs/ls1012aqds.h | 4 ++-- include/configs/ls1012ardb.h | 4 ++-- include/configs/ls1021aiot.h | 2 +- include/configs/ls1021aqds.h | 4 ++-- include/configs/ls1021atsn.h | 2 +- include/configs/ls1021atwr.h | 4 ++-- include/configs/ls1028aqds.h | 4 ++-- include/configs/ls1028ardb.h | 4 ++-- include/configs/ls1043a_common.h | 2 +- include/configs/ls1046a_common.h | 2 +- include/configs/ls1088a_common.h | 2 +- include/configs/ls1088aqds.h | 20 ++++++++++---------- include/configs/ls1088ardb.h | 6 +++--- include/configs/ls2080a_common.h | 2 +- include/configs/ls2080aqds.h | 10 +++++----- include/configs/ls2080ardb.h | 6 +++--- include/configs/lsxl.h | 2 +- include/configs/lx2160aqds.h | 2 +- include/configs/lx2160ardb.h | 2 +- include/configs/lx2162aqds.h | 2 +- include/configs/m53menlo.h | 2 +- include/configs/mccmon6.h | 2 +- include/configs/meson64.h | 4 ++-- include/configs/meson64_android.h | 2 +- include/configs/microblaze-generic.h | 4 ++-- include/configs/microchip_mpfs_icicle.h | 2 +- include/configs/msc_sm2s_imx8mp.h | 2 +- include/configs/mt7623.h | 2 +- include/configs/mt8183.h | 2 +- include/configs/mt8512.h | 2 +- include/configs/mt8516.h | 2 +- include/configs/mt8518.h | 2 +- include/configs/mvebu_alleycat-5.h | 2 +- include/configs/mvebu_armada-37xx.h | 2 +- include/configs/mvebu_armada-8k.h | 2 +- include/configs/mx23_olinuxino.h | 2 +- include/configs/mx23evk.h | 2 +- include/configs/mx28evk.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53cx9020.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/mx53ppd.h | 2 +- include/configs/mx6cuboxi.h | 2 +- include/configs/mx6sabre_common.h | 2 +- include/configs/mx6slevk.h | 2 +- include/configs/mx6sllevk.h | 2 +- include/configs/mx6sxsabreauto.h | 2 +- include/configs/mx6sxsabresd.h | 2 +- include/configs/mx6ul_14x14_evk.h | 2 +- include/configs/mx6ullevk.h | 2 +- include/configs/mx7dsabresd.h | 2 +- include/configs/mx7ulp_com.h | 2 +- include/configs/mx7ulp_evk.h | 2 +- include/configs/mys_6ulx.h | 2 +- include/configs/nas220.h | 2 +- include/configs/nitrogen6x.h | 2 +- include/configs/nokia_rx51.h | 2 +- include/configs/novena.h | 2 +- include/configs/npi_imx6ull.h | 2 +- include/configs/nsa310s.h | 2 +- include/configs/o4-imx6ull-nano.h | 2 +- include/configs/octeontx2_common.h | 2 +- include/configs/octeontx_common.h | 4 ++-- include/configs/odroid.h | 2 +- include/configs/odroid_xu3.h | 4 ++-- include/configs/omap3_beagle.h | 2 +- include/configs/omap3_evm.h | 2 +- include/configs/omap3_igep00x0.h | 2 +- include/configs/omap3_logic.h | 2 +- include/configs/omapl138_lcdk.h | 2 +- include/configs/openpiton-riscv64.h | 2 +- include/configs/openrd.h | 2 +- include/configs/origen.h | 2 +- include/configs/p1_p2_rdb_pc.h | 2 +- include/configs/pcl063.h | 2 +- include/configs/pcl063_ull.h | 2 +- include/configs/pcm052.h | 2 +- include/configs/pcm058.h | 2 +- include/configs/pdu001.h | 2 +- include/configs/phycore_am335x_r2.h | 2 +- include/configs/phycore_imx8mm.h | 2 +- include/configs/phycore_imx8mp.h | 2 +- include/configs/pic32mzdask.h | 2 +- include/configs/pico-imx6.h | 2 +- include/configs/pico-imx6ul.h | 2 +- include/configs/pico-imx7d.h | 2 +- include/configs/pico-imx8mq.h | 2 +- include/configs/pm9261.h | 2 +- include/configs/pm9263.h | 2 +- include/configs/pogo_e02.h | 2 +- include/configs/pogo_v4.h | 2 +- include/configs/poleg.h | 2 +- include/configs/pomelo.h | 2 +- include/configs/poplar.h | 2 +- include/configs/porter.h | 2 +- include/configs/presidio_asic.h | 2 +- include/configs/px30_common.h | 2 +- include/configs/pxm2.h | 2 +- include/configs/qcs404-evb.h | 2 +- include/configs/qemu-arm.h | 2 +- include/configs/qemu-riscv.h | 2 +- include/configs/rastaban.h | 2 +- include/configs/rcar-gen3-common.h | 2 +- include/configs/rk3036_common.h | 2 +- include/configs/rk3066_common.h | 2 +- include/configs/rk3128_common.h | 2 +- include/configs/rk3188_common.h | 2 +- include/configs/rk322x_common.h | 2 +- include/configs/rk3288_common.h | 2 +- include/configs/rk3308_common.h | 2 +- include/configs/rk3328_common.h | 2 +- include/configs/rk3368_common.h | 2 +- include/configs/rk3399_common.h | 2 +- include/configs/rk3568_common.h | 2 +- include/configs/rpi.h | 2 +- include/configs/rut.h | 2 +- include/configs/rv1108_common.h | 2 +- include/configs/s5p4418_nanopi2.h | 2 +- include/configs/s5p_goni.h | 2 +- include/configs/s5pc210_universal.h | 2 +- include/configs/sdm845.h | 2 +- include/configs/sheevaplug.h | 2 +- include/configs/sifive-unleashed.h | 2 +- include/configs/sifive-unmatched.h | 2 +- include/configs/silk.h | 2 +- include/configs/sipeed-maix.h | 4 ++-- include/configs/slimbootloader.h | 6 +++--- include/configs/smartweb.h | 2 +- include/configs/smdkc100.h | 2 +- include/configs/smegw01.h | 2 +- include/configs/snapper9g45.h | 2 +- include/configs/sniper.h | 2 +- include/configs/socfpga_chameleonv3.h | 2 +- include/configs/socfpga_common.h | 4 ++-- include/configs/socfpga_dbm_soc1.h | 2 +- include/configs/socfpga_mcvevk.h | 2 +- include/configs/socfpga_n5x_socdk.h | 4 ++-- include/configs/socfpga_soc64_common.h | 2 +- include/configs/socfpga_vining_fpga.h | 2 +- include/configs/socrates.h | 2 +- include/configs/somlabs_visionsom_6ull.h | 2 +- include/configs/stemmy.h | 2 +- include/configs/stih410-b2260.h | 2 +- include/configs/stm32f429-discovery.h | 2 +- include/configs/stm32f429-evaluation.h | 2 +- include/configs/stm32f469-discovery.h | 2 +- include/configs/stm32f746-disco.h | 2 +- include/configs/stm32h743-disco.h | 2 +- include/configs/stm32h743-eval.h | 2 +- include/configs/stm32h750-art-pi.h | 2 +- include/configs/stm32mp13_common.h | 2 +- include/configs/stm32mp15_common.h | 2 +- include/configs/stm32mp15_dh_dhsom.h | 2 +- include/configs/stm32mp15_st_common.h | 6 +++--- include/configs/stmark2.h | 2 +- include/configs/stout.h | 2 +- include/configs/sunxi-common.h | 2 +- include/configs/synquacer.h | 2 +- include/configs/syzygy_hub.h | 2 +- include/configs/taurus.h | 2 +- include/configs/tbs2910.h | 2 +- include/configs/tegra-common-post.h | 2 +- include/configs/ten64.h | 4 ++-- include/configs/theadorable-x86-common.h | 4 ++-- include/configs/theadorable.h | 2 +- include/configs/thuban.h | 2 +- include/configs/thunderx_88xx.h | 2 +- include/configs/ti816x_evm.h | 2 +- include/configs/ti_armv7_keystone2.h | 2 +- include/configs/ti_omap4_common.h | 2 +- include/configs/ti_omap5_common.h | 2 +- include/configs/topic_miami.h | 4 ++-- include/configs/total_compute.h | 2 +- include/configs/tqma6.h | 2 +- include/configs/trats.h | 2 +- include/configs/trats2.h | 2 +- include/configs/turris_mox.h | 2 +- include/configs/turris_omnia.h | 2 +- include/configs/udoo.h | 2 +- include/configs/udoo_neo.h | 2 +- include/configs/uniphier.h | 2 +- include/configs/usb_a9263.h | 2 +- include/configs/usbarmory.h | 2 +- include/configs/vcoreiii.h | 2 +- include/configs/verdin-imx8mm.h | 2 +- include/configs/verdin-imx8mp.h | 2 +- include/configs/vexpress_aemv8.h | 2 +- include/configs/vexpress_common.h | 2 +- include/configs/vf610twr.h | 2 +- include/configs/vinco.h | 2 +- include/configs/wandboard.h | 2 +- include/configs/warp7.h | 2 +- include/configs/x530.h | 2 +- include/configs/x86-common.h | 2 +- include/configs/xea.h | 2 +- include/configs/xenguest_arm64.h | 6 +++--- include/configs/xilinx_versal.h | 4 ++-- include/configs/xilinx_versal_mini.h | 4 ++-- include/configs/xilinx_versal_net.h | 4 ++-- include/configs/xilinx_versal_net_mini.h | 4 ++-- include/configs/xilinx_zynqmp.h | 8 ++++---- include/configs/xilinx_zynqmp_mini.h | 4 ++-- include/configs/xilinx_zynqmp_r5.h | 2 +- include/configs/xpress.h | 2 +- include/configs/zynq-common.h | 4 ++-- include/configs/zynq_cse.h | 2 +- include/env_default.h | 4 ++-- 370 files changed, 429 insertions(+), 429 deletions(-) (limited to 'include') diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index e14650fe0d4..f7aba6e417f 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -17,7 +17,7 @@ /* I2C */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 220524bfaed..049516edf4a 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -27,7 +27,7 @@ /* this must be included AFTER the definition of CONFIG COMMANDS (if any) */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index bc156df20d5..a6349fc0861 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -20,7 +20,7 @@ env/embedded.o(.text*); #ifdef CONFIG_DRIVER_DM9000 -# define CONFIG_EXTRA_ENV_SETTINGS \ +# define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \ "loadaddr=10000\0" \ diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 6aae584afda..33c2fc08706 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -27,7 +27,7 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 41974cff410..607c5dee2fb 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -38,7 +38,7 @@ #define CFG_SYS_I2C_PINMUX_CLR (0xFFF0) #define CFG_SYS_I2C_PINMUX_SET (0x000F) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ "uboot=u-boot.bin\0" \ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 7cfe7a2da3e..31699a40b6f 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -27,7 +27,7 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*); -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=10000\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index ac2bd0b2241..b6d82c730c6 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -30,7 +30,7 @@ /* I2C */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index a86a117fd8f..d74a636fd7f 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -22,7 +22,7 @@ /* I2C */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=40010000\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index b2ad03cc3cb..fa6f2d23e74 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -24,7 +24,7 @@ /* I2C */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index f8368823aac..c6929c1b987 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -9,7 +9,7 @@ /* High Level Configuration Options */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "sdram_type=SDRAM\0" \ "flash_type=AM29LV160DB\0" \ "loadaddr=0x400000\0" \ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index e0ac9338d32..fad161597e6 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -195,7 +195,7 @@ #define FDTFILE "mpc8379_rdb.dtb" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth1\0" \ "uboot=" CONFIG_UBOOTPATH "\0" \ "tftpflash=tftp $loadaddr $uboot;" \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 1e3ba6de6e7..6f3e298a249 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -291,7 +291,7 @@ * Environment Configuration */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ecc=off\0" \ "netdev=eth0\0" \ "uboot=" CONFIG_UBOOTPATH "\0" \ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index afb602c5bce..b57e8638ab7 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -371,7 +371,7 @@ extern unsigned long get_sdram_size(void); * Environment Configuration */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \ "netdev=eth0\0" \ "uboot=" CONFIG_UBOOTPATH "\0" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 1a157a7da05..6e755fc0a8f 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -304,7 +304,7 @@ #define __USB_PHY_TYPE utmi -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ "bank_intlv=cs0_cs1\0" \ "netdev=eth0\0" \ diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 4794c5a84d1..063b864f9ff 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -430,7 +430,7 @@ "fdtfile=t1023rdb/t1023rdb.dtb\0" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ARCH_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index cfde8ecf9c6..9d04d30a538 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -370,7 +370,7 @@ #define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=cs0_cs1;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ "usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 4b6bdaa3440..7f332cf2e3b 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -413,7 +413,7 @@ #define __USB_PHY_TYPE utmi -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:" \ "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) "," \ "bank_intlv=auto;" \ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index fab40f792af..d6dd9c07b73 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -379,7 +379,7 @@ #define __USB_PHY_TYPE utmi -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:" \ "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) "," \ "bank_intlv=auto;" \ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 41565f284c6..22cbf92efb8 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -368,7 +368,7 @@ #define CTRL_INTLV_PREFERED cacheline #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:" \ "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) "," \ "bank_intlv=auto;" \ diff --git a/include/configs/alt.h b/include/configs/alt.h index f2774001692..29f4d06b7f8 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -30,7 +30,7 @@ /* Board Clock */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ "usb_pgood_delay=2000\0" diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 755f7fae3e4..1f473b5a150 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -78,7 +78,7 @@ #ifndef CONFIG_SPL_BUILD #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "fdtfile=undefined\0" \ "finduuid=part uuid mmc 0:2 uuid\0" \ diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index a5b83b0c25d..a8fa61c7e50 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -45,7 +45,7 @@ "main_pcba_aux_3=0\0" \ "main_pcba_aux_4=0\0" \ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ AM335XX_BOARD_FDTFILE \ MEM_LAYOUT_ENV_SETTINGS \ BOOTENV \ diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h index abd868c1453..e2beaf27185 100644 --- a/include/configs/am335x_igep003x.h +++ b/include/configs/am335x_igep003x.h @@ -20,7 +20,7 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "bootdir=/boot\0" \ "bootfile=zImage\0" \ diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 70645edcb14..ee6f62275a8 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -21,7 +21,7 @@ #define V_SCLK (V_OSCK) #ifndef CONFIG_SPL_BUILD -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ "kloadaddr=0x84000000\0" \ "fdtaddr=0x85000000\0" \ diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h index 342a068c855..f3d3d18c055 100644 --- a/include/configs/am335x_sl50.h +++ b/include/configs/am335x_sl50.h @@ -30,7 +30,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ AM335XX_BOARD_FDTFILE \ MEM_LAYOUT_ENV_SETTINGS \ BOOTENV diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index c57a0ddc21d..b75c6483883 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -38,7 +38,7 @@ #endif /* CONFIG_MTD_RAW_NAND */ /* Environment information */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ "fdtfile=am3517-evm.dtb\0" \ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 7659c1cc061..3a6ffd9de0b 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -66,7 +66,7 @@ #ifndef CONFIG_SPL_BUILD #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "fdtfile=undefined\0" \ "finduuid=part uuid mmc 0:2 uuid\0" \ diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h index 5406c39350f..1bd900df7a9 100644 --- a/include/configs/am62ax_evm.h +++ b/include/configs/am62ax_evm.h @@ -56,7 +56,7 @@ "partitions=" PARTS_DEFAULT /* Incorporate settings into the U-Boot environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ EXTRA_ENV_AM62A7_BOARD_SETTINGS \ diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h index 57f3f37908d..809d89119c4 100644 --- a/include/configs/am62x_evm.h +++ b/include/configs/am62x_evm.h @@ -55,7 +55,7 @@ "partitions=" PARTS_DEFAULT /* Incorporate settings into the U-Boot environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ EXTRA_ENV_AM625_BOARD_SETTINGS \ diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index 25c71f00a20..26a7f2521ec 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -95,7 +95,7 @@ DFU_ALT_INFO_OSPI /* Incorporate settings into the U-Boot environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ EXTRA_ENV_AM642_BOARD_SETTINGS \ diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 0307426e4ab..33dd6cfdfa4 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -88,7 +88,7 @@ #endif /* Incorporate settings into the U-Boot environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ca29346fe64..648d30a5b24 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -10,7 +10,7 @@ #define CFG_SYS_UART_PORT 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "upgrade_uboot=loady; " \ "protect off 0xffc00000 0xffc1ffff; " \ "erase 0xffc00000 0xffc1ffff; " \ diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index aa3dcf4a881..73d8d245a96 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -31,7 +31,7 @@ #define BOOTENV_RUN_NET_USB_START "" /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ "boot_file=Image\0" \ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 07587c7609b..d46159076f2 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -62,7 +62,7 @@ "ramdisk_addr_r=0x18400000\0" \ "scriptaddr=0x18280000\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "boot_file=zImage\0" \ "boot_script_dhcp=boot.scr\0" \ diff --git a/include/configs/apple.h b/include/configs/apple.h index b06660add4f..fe7d11bcdb3 100644 --- a/include/configs/apple.h +++ b/include/configs/apple.h @@ -27,7 +27,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_DEVICE_SETTINGS \ BOOTENV diff --git a/include/configs/arbel.h b/include/configs/arbel.h index 60758b0ca02..8e27fb52a1c 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -12,7 +12,7 @@ #define CFG_SYS_INIT_RAM_SIZE 0x8000 /* Default environemnt variables */ -#define CONFIG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ +#define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" \ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index ff213a41b8f..a6e9d2bb65f 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -94,7 +94,7 @@ "done\0" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "disable_giga=yes\0" \ "usb_pgood_delay=2000\0" \ "nor_bootdelay=-2\0" \ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 6aef3bd86f7..65224324fbc 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -71,7 +71,7 @@ * u-boot: 'set' command */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loaderversion=11\0" \ "card_id="__stringify(ASTRO_ID)"\0" \ "alterafile=0\0" \ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index afdb74785f8..4101440ff5d 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -36,7 +36,7 @@ /* Address and size of Primary Environment Sector */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "monitor_base=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ "update=" \ "protect off ${monitor_base} +${filesize};" \ diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 0f9e2cfb582..c59d4bb38ca 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -28,7 +28,7 @@ #define CFG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index d70f0382300..b566ecf296f 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -82,7 +82,7 @@ func(RAM, ram, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x00080000\0" \ "pxefile_addr_r=0x01f00000\0" \ "scriptaddr=0x01f00000\0" \ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 04dc50b1cb2..a82dfc90294 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -39,7 +39,7 @@ /* * Environment settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "upgrade=if mmc rescan && " \ "fatload mmc 0:1 ${loadaddr} u-boot-update.img && " \ "iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index 6f6552e6dc3..e7946389eff 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -49,7 +49,7 @@ #define NANDARGS "" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "boot_fdt=try\0" \ "bootpart=0:2\0" \ diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index fc176dc2014..47de4bc2013 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -793,7 +793,7 @@ QSPI_FLASH \ FLASH_IMAGES -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ARCH_ENV_SETTINGS #endif /* __BCM_NS3_H */ diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 57360b60ca9..d1de3561af6 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -131,7 +131,7 @@ extern phys_addr_t prior_stage_fdt_address; /* * Enable in-place RFS with this initrd_high setting. */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdtsaveaddr=" __stringify(CONFIG_SYS_FDT_SAVE_ADDRESS) "\0" \ "initrd_high=0xffffffff\0" \ "fdt_high=0xffffffff\0" diff --git a/include/configs/beacon-rzg2m.h b/include/configs/beacon-rzg2m.h index 2713b158438..65c01835cc6 100644 --- a/include/configs/beacon-rzg2m.h +++ b/include/configs/beacon-rzg2m.h @@ -8,9 +8,9 @@ #include "rcar-gen3-common.h" -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "usb_pgood_delay=2000\0" \ "script=boot.scr\0" \ "image=Image\0" \ diff --git a/include/configs/bitmain_antminer_s9.h b/include/configs/bitmain_antminer_s9.h index 556bfa08ebb..3662668c6a6 100644 --- a/include/configs/bitmain_antminer_s9.h +++ b/include/configs/bitmain_antminer_s9.h @@ -9,7 +9,7 @@ #define CFG_SYS_SDRAM_BASE 0x00000000 #define CFG_SYS_SDRAM_SIZE 0x40000000 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "pxefile_addr_r=0x2000000\0" \ "scriptaddr=0x3000000\0" \ "kernel_addr_r=0x2000000\0" \ diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index 0842a4a8f54..5df8d03c706 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -57,7 +57,7 @@ /* boot command, including the target-defined one if any */ /* Extra env settings (including the target-defined ones if any) */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BK4_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index 2c5236aa58b..236d720a55a 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -67,7 +67,7 @@ MMC_TGTS \ #define LOAD_OFFSET(x) 0x8##x -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ "verify=no\0" \ "scraddr=" __stringify(LOAD_OFFSET(0000000)) "\0" \ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 984602c2cf7..32d9f503d9f 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -24,7 +24,7 @@ /* Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ "cfgaddr=0x106F0000\0" \ "scraddr=0x10700000\0" \ diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h index f9908352b0d..ffb4cd3027a 100644 --- a/include/configs/brsmarc1.h +++ b/include/configs/brsmarc1.h @@ -24,7 +24,7 @@ #define V_SCLK (V_OSCK) /* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ "scradr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "cfgscr=mw ${dtbaddr} 0;" \ diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index 410b3e641c5..9ca6d6f863d 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -20,7 +20,7 @@ #define V_SCLK (V_OSCK) /* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BUR_COMMON_ENV \ "scradr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "bootaddr=0x80001100\0" \ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 474ad69d996..a8273a7fcd8 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -67,7 +67,7 @@ "emmc_dev=0\0" /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ AHAB_ENV \ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 6f3396bad4c..263981860e8 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -55,7 +55,7 @@ "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ "script=boot.scr\0" \ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 1e5154af0a1..850eb892db7 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -25,7 +25,7 @@ "nand read ${loadaddr} NAND.kernel; " \ "bootz ${loadaddr} - ${fdt_addr}\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "fdt_addr=0x87800000\0" \ "boot_fdt=try\0" \ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 5c9004cbd93..2d56d37f06f 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -24,9 +24,9 @@ #define CFG_SYS_I2C_PCA953X_ADDR 0x20 #define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \ "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 9c9e9506dc6..062d3d87026 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -110,7 +110,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ RELOCATION_LIMITS_ENV_SETTINGS \ LOAD_ADDRESS_ENV_SETTINGS \ "console=ttyS0,115200\0" \ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 9df8baa8a96..c66cf721870 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -30,7 +30,7 @@ /* Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "fdt_addr_r=0x18000000\0" \ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 8a18d6f97ab..aa17c9cbe2c 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -41,7 +41,7 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ "fdtaddr=0x81200000\0" \ "bootm_size=0x8000000\0" \ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 6f3524deb56..5b802aa92a9 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -79,7 +79,7 @@ #endif #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ UBI_BOOTCMD \ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 215c633a4c9..13bc4e7e682 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -56,7 +56,7 @@ "${fdt_addr};\0" \ /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ AHAB_ENV \ BOOTENV \ CONFIG_MFG_ENV_SETTINGS \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 4e51df123a6..bf2a9bbaaff 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -56,7 +56,7 @@ "ramdisk_addr_r=0x18400000\0" \ "scriptaddr=0x18280000\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "boot_file=zImage\0" \ "boot_script_dhcp=boot.scr\0" \ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 89546b857fe..91f87ea283f 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -119,7 +119,7 @@ #endif #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ MODULE_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index e8918df69e0..60f31389fd4 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -47,7 +47,7 @@ #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ UBI_BOOTCMD \ diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index e9b85b4e1c7..6f431725269 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -18,8 +18,8 @@ #define VIDEO_IO_OFFSET 0 -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "kernel-ver=4.4.0-22\0" \ "boot=zboot 03000000 0 04000000 ${filesize}\0" \ "upd_uboot=tftp 100000 conga/u-boot.rom;" \ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 119a834fe74..0e922b96644 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -21,7 +21,7 @@ * Environment Configuration */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth1\0" \ "consoledev=ttyS1\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h index 25bcc2a6841..6535730731a 100644 --- a/include/configs/crs3xx-98dx3236.h +++ b/include/configs/crs3xx-98dx3236.h @@ -13,7 +13,7 @@ /* Environment in SPI NOR flash */ /* Keep device tree and initrd in lower memory so the kernel can access them */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index a818a4b39f8..cfc8330e35a 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -145,7 +145,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ "bootpart=0:2\0" \ diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index 4b31bbf4e11..323703ac5c9 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -68,7 +68,7 @@ "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \ /* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "console=ttymxc0,115200n8\0" \ "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \ diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index b9d03d253d9..c4ae397e3e6 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -17,7 +17,7 @@ /* NAND */ /* Keep device tree and initrd in lower memory so the kernel can access them */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index bba2b607aa8..6dbf582d733 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -18,7 +18,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* Keep device tree and initrd in lower memory so the kernel can access them */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h index 84ea1baa997..0ee914e91d0 100644 --- a/include/configs/db-xc3-24g4xg.h +++ b/include/configs/db-xc3-24g4xg.h @@ -11,7 +11,7 @@ /* NAND */ /* Keep device tree and initrd in lower memory so the kernel can access them */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 66aa6d5c3c4..ab10101f20a 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -67,7 +67,7 @@ * Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "ethaddr=00:01:90:00:C0:81\0" \ "dtbaddr=0x81000000\0" \ "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index e3621fd6f9c..c522d334dcc 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -22,7 +22,7 @@ DEFAULT_LINUX_BOOT_ENV /* Environment information */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "console=ttyO2,115200n8\0" \ "mmcdev=0\0" \ diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index 154c4f4f13f..d10422b6c1c 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -22,8 +22,8 @@ #define VIDEO_IO_OFFSET 0 -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "kernel-ver=4.4.0-24\0" \ "boot=zboot 03000000 0 04000000 ${filesize}\0" \ "upd_uboot=usb reset;tftp 100000 dfi/u-boot.rom;" \ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 3aed6299ed5..6aef15c658c 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -41,7 +41,7 @@ #endif #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200\0" \ "fdt_addr=0x18000000\0" \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/display5.h b/include/configs/display5.h index 4401515a65e..70ad88c9075 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -164,7 +164,7 @@ "sf write ${loadaddr} 0x0 ${filesize};" \ "fi\0" \ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ PARTS_DEFAULT \ "gpio_recovery=93\0" \ "check_em_pad=gpio input ${gpio_recovery};test $? -eq 0;\0" \ diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 1bfb741346a..4842eccf40d 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -28,7 +28,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" \ diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index a6c1e9c6d02..999389197c6 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -22,7 +22,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "kernel=/boot/uImage\0" \ "initrd=/boot/uInitrd\0" \ diff --git a/include/configs/draco.h b/include/configs/draco.h index ab3cf10d779..b56ba9132af 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -28,7 +28,7 @@ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ /* Default env settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hostname=draco\0" \ "ubi_off=2048\0"\ "nand_img_size=0x400000\0" \ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index daf7ecd7975..73aec348458 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -28,6 +28,6 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS BOOTENV +#define CFG_EXTRA_ENV_SETTINGS BOOTENV #endif diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 31cd8536de4..49970837111 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -26,7 +26,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x95000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ diff --git a/include/configs/dragonboard845c.h b/include/configs/dragonboard845c.h index bd88c42a3ba..c1e590fae2a 100644 --- a/include/configs/dragonboard845c.h +++ b/include/configs/dragonboard845c.h @@ -13,7 +13,7 @@ #define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x5000000\0" \ "bootm_low=0x80000000\0" \ "bootcmd=bootm $prevbl_initrd_start_addr\0" diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 98322a54f63..85b47a15d71 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -17,7 +17,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "x_bootcmd_ethernet=ping 192.168.2.1\0" \ "x_bootcmd_usb=usb start\0" \ "x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \ diff --git a/include/configs/ds109.h b/include/configs/ds109.h index 8e7a86e0626..ea77abb4746 100644 --- a/include/configs/ds109.h +++ b/include/configs/ds109.h @@ -26,7 +26,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "x_bootcmd_ethernet=ping 192.168.1.2\0" \ "x_bootcmd_usb=usb start\0" \ "x_bootcmd_kernel=fatload usb 0 0x6400000 uImage\0" \ diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 76d1713fdc6..e69883ba73b 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -43,7 +43,7 @@ /* Default Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "initrd_high=0xffffffff\0" \ "ramdisk_addr_r=0x8000000\0" \ "usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \ diff --git a/include/configs/durian.h b/include/configs/durian.h index 001596c00a4..9f11e18d34a 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -15,7 +15,7 @@ /* BOOT */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "load_kernel=ext4load scsi 0:1 0x90100000 uImage-2004\0" \ "load_fdt=ext4load scsi 0:1 0x95000000 ft2004-pci-64.dtb\0"\ "boot_fdt=bootm 0x90100000 -:- 0x95000000\0" \ diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 89e071c0df6..a5e2dc063a7 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -23,7 +23,7 @@ #define CONFIG_MXC_UART_BASE UART2_BASE -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "board=EL6Q\0" \ "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \ "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 1742b1192fb..c1748fc2602 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -76,7 +76,7 @@ CONSOLE_STDIN_SETTINGS \ CONSOLE_STDOUT_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "fdtfile=" FDTFILE "\0" \ diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index c2b921e7cb8..83aaa09cdbb 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -15,7 +15,7 @@ * Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "upgrade_image=u-boot.bin\0" \ "upgrade=emsdp rom unlock && " \ "fatload mmc 0 ${loadaddr} ${upgrade_image} && " \ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 57f619f55ff..8d8e717b38d 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -128,7 +128,7 @@ COMMON_ENV_NAND_CMDS /* Default env settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hostname=etamin\0" \ "ubi_off=4096\0"\ "nand_img_size=0x400000\0" \ diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h index bec1660cf48..f304929263e 100644 --- a/include/configs/evb_ast2500.h +++ b/include/configs/evb_ast2500.h @@ -14,7 +14,7 @@ #define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* Misc */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "" #endif /* __CONFIG_H */ diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h index c9c988b9374..e1cce58fa93 100644 --- a/include/configs/evb_ast2600.h +++ b/include/configs/evb_ast2600.h @@ -14,7 +14,7 @@ #define STR_HELPER(s) #s #define STR(s) STR_HELPER(s) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=" STR(CONFIG_SYS_LOAD_ADDR) "\0" \ "bootspi=fdt addr 20100000 && fdt header get fitsize totalsize && " \ "cp.b 20100000 ${loadaddr} ${fitsize} && bootm; " \ diff --git a/include/configs/evb_rv1108.h b/include/configs/evb_rv1108.h index 13e3cb2ffeb..e7d866551a5 100644 --- a/include/configs/evb_rv1108.h +++ b/include/configs/evb_rv1108.h @@ -11,8 +11,8 @@ /* * Default environment settings */ -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "ipaddr=172.16.12.50\0" \ "serverip=172.16.12.69\0" \ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 43ea34db7b6..ec09f6cc5de 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -91,7 +91,7 @@ #define EXYNOS_FDTFILE_SETTING #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ EXYNOS_DEVICE_SETTINGS \ EXYNOS_FDTFILE_SETTING \ MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index e22dd036ccb..9971385848a 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -63,7 +63,7 @@ #define EXYNOS_FDTFILE_SETTING #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ EXYNOS_DEVICE_SETTINGS \ EXYNOS_FDTFILE_SETTING \ MEM_LAYOUT_ENV_SETTINGS diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 8672b9e9527..92c84cd8ce0 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -74,7 +74,7 @@ EXYNOS_FDTFILE_SETTING \ MEM_LAYOUT_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS #endif /* __CONFIG_EXYNOS78x0_COMMON_H */ diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 671b75e6986..855aaa1aa57 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -55,7 +55,7 @@ * Environment Configuration */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS1\0" \ "u-boot=u-boot.bin\0" \ diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 1aaa3e67d60..0523ff9a64b 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -35,7 +35,7 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Command definition */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=/boot/fitImage\0" \ "fdt_addr_r=0x18000000\0" \ "splash_addr_r=0x20000000\0" \ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index f62b8f175e1..32960fb9325 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -41,7 +41,7 @@ #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ NETWORKBOOT \ "image=/boot/fitImage\0" \ "dev=mmc\0" \ diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 1c86dcb1f6d..b7de159c865 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -31,7 +31,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "kernel=/boot/uImage\0" \ "bootargs_root=ubi.mtd=root root=ubi0:root rootfstype=ubifs ro\0" diff --git a/include/configs/gose.h b/include/configs/gose.h index d1fe375a2c1..45f0ec6f6a0 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -29,7 +29,7 @@ /* Board Clock */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" #endif /* __GOSE_H */ diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index d196c4eda53..44b4595440e 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -23,7 +23,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ "kernel=/boot/zImage\0" \ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index fc32487e1c7..7d81d1cf1e4 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -110,7 +110,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ RELOCATION_LIMITS_ENV_SETTINGS \ LOAD_ADDRESS_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 4aef0b4abd1..76e6054b0cc 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -16,7 +16,7 @@ #define CFG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x20000000\0" \ "initrd_high=0x20000000\0" diff --git a/include/configs/hikey.h b/include/configs/hikey.h index d4280decc9f..36bf22b1870 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -42,7 +42,7 @@ func(DHCP, dhcp, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_name=Image\0" \ "kernel_addr_r=0x00080000\0" \ "fdtfile=hi6220-hikey.dtb\0" \ diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index fad1f980481..40d5e653c3f 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -28,7 +28,7 @@ func(MMC, mmc, 0) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ "fdtfile=hi3660-hikey960.dtb\0" \ "fdt_addr_r=0x10000000\0" \ diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 59ea8960071..f59da417731 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -37,7 +37,7 @@ /* * Environment settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "upgrade=if mmc rescan && " \ "fatload mmc 0:1 ${loadaddr} u-boot-update.scr && " \ "iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \ diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index fbfcded4712..2177fafcdc0 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -36,7 +36,7 @@ /* * Environment settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "upgrade=if mmc rescan && " \ "fatload mmc 0:1 ${loadaddr} u-boot-update.scr && " \ "iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \ diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 76fc4ac8b66..e1b62f78b21 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -18,7 +18,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "kernel=/boot/zImage\0" \ "fdt=/boot/ib62x0.dtb\0" \ diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index 6d2104b3a1c..d372ffb802c 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -11,7 +11,7 @@ #include "mv-common.h" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "kernel=/boot/uImage\0" \ "bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0" diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 36b6b95b84d..4208ba95915 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -24,7 +24,7 @@ #endif /* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "splashpos=m,m\0" \ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 4e23f1a2dc5..0df61916b7d 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -21,7 +21,7 @@ /* Ethernet Configs */ #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "bootm_size=0x10000000\0" \ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 402f83c18ea..b6006c021d5 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -20,7 +20,7 @@ /* Environment in MMC */ #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x14000000\0" \ "fdt_addr_r=0x13000000\0" \ "kernel_addr_r=0x10008000\0" \ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 392f97050a6..e28185f24dd 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -72,7 +72,7 @@ #endif /* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootconf=conf-imx6q-bosch-acc.dtb\0"\ "mmcfit_name=fitImage\0" \ "mmcloadfit=ext4load mmc ${mmcdev}:${fitpart} ${fit_addr} ${mmcfit_name}\0" \ diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h index 2d9d3c34b0d..c95038eaa53 100644 --- a/include/configs/imx6ulz_smm_m2.h +++ b/include/configs/imx6ulz_smm_m2.h @@ -54,7 +54,7 @@ #devtypel #instance " " /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ NANDARGS \ BOOTENV diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 8e9dbefc496..66cf5b463fc 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -12,7 +12,7 @@ #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS /* * Use: @@ -22,7 +22,7 @@ */ #define MY_CONFIG_BOOT_MODE "boot-mode=sd\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MY_CONFIG_BOOT_MODE \ "image=zImage\0" \ "console=ttymxc0\0" \ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index c228cf7f37b..00ce7fb62a9 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -63,7 +63,7 @@ BOOT_TARGET_DHCP(func) /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "script=boot.scr\0" \ "image=Image\0" \ diff --git a/include/configs/imx8mm-mx8menlo.h b/include/configs/imx8mm-mx8menlo.h index 938c5406b82..a86bd76a3c7 100644 --- a/include/configs/imx8mm-mx8menlo.h +++ b/include/configs/imx8mm-mx8menlo.h @@ -9,8 +9,8 @@ #include /* Custom initial environment variables */ -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ "devtype=mmc\0" \ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 03325e6c3a7..ee524f0e63f 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -20,7 +20,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=Image\0" \ "console=ttymxc1,115200\0" \ diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 80321cf2d8d..44d74bb1a78 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -34,7 +34,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "altbootcmd=setenv devpart 2 && run bootcmd ; reset\0" \ "bootlimit=3\0" \ "devtype=mmc\0" \ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 8a694c88a53..d28f3f1972b 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -37,7 +37,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 41ab9307793..e718daa07c3 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -30,7 +30,7 @@ "ramdisk_addr_r=0x46400000\0" \ "scriptaddr=0x46000000\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "console=ttymxc1,115200\0" \ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 28ce834769c..c490e3829f9 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -25,7 +25,7 @@ func(USB, usb, 1) \ func(DHCP, dhcp, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "splblk=0x42\0" \ BOOTENV diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 85fd5e2371f..bb3dfe3fa0d 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -13,7 +13,7 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=Image\0" \ "ramdiskimage=rootfs.cpio.uboot\0" \ diff --git a/include/configs/imx8mn_bsh_smm_s2.h b/include/configs/imx8mn_bsh_smm_s2.h index a768ff35510..e97b8e871d2 100644 --- a/include/configs/imx8mn_bsh_smm_s2.h +++ b/include/configs/imx8mn_bsh_smm_s2.h @@ -35,7 +35,7 @@ #devtypel #instance " " /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ NANDARGS \ BOOTENV diff --git a/include/configs/imx8mn_bsh_smm_s2pro.h b/include/configs/imx8mn_bsh_smm_s2pro.h index 035e5c7bd90..8619fdde7fd 100644 --- a/include/configs/imx8mn_bsh_smm_s2pro.h +++ b/include/configs/imx8mn_bsh_smm_s2pro.h @@ -22,7 +22,7 @@ "emmc_ack=1\0" \ /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ EMMCARGS \ BOOTENV diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 024b86c7f1d..b759b834b80 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -32,7 +32,7 @@ "scriptaddr=0x40000000\0" \ "pxefile_addr_r=0x40100000\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ BOOTENV \ "console=ttymxc1,115200\0" \ diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 4633843d1bb..205337948cf 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -37,7 +37,7 @@ "pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ BOOTENV diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index a585cbf87e4..80c2df9f30f 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -19,7 +19,7 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "splblk=0x40\0" \ BOOTENV diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 5443022b04c..b8fdedefa21 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -28,7 +28,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "altbootcmd=run bootcmd ; reset\0" \ "bootlimit=3\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 137bd3b0952..c6e3b105a8a 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -26,7 +26,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h index b261a81e44a..c3abcee40e8 100644 --- a/include/configs/imx8mp_icore_mx8mp.h +++ b/include/configs/imx8mp_icore_mx8mp.h @@ -29,7 +29,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 58f7dc6518c..ed4da0e69b5 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -71,7 +71,7 @@ BOOT_TARGET_DHCP(func) /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "script=boot.scr\0" \ "image=Image\0" \ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index e79aa570753..4b32d5a77ef 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -19,7 +19,7 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "splblk=0x40\0" \ BOOTENV diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 4df98e3f373..f6f356d27ba 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -30,7 +30,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=0x43500000\0" \ "kernel_addr_r=0x40880000\0" \ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 688c0bf7008..c40448715f8 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -35,7 +35,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 3b4cd656223..8fed3e31964 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -29,7 +29,7 @@ "initrd_high=0xffffffff\0" \ /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ "script=boot.scr\0" \ "image=Image\0" \ diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index f1f907f3e5a..7772e71013e 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -23,7 +23,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ AHAB_ENV \ "script=boot.scr\0" \ "image=Image\0" \ diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 2e2e5ed43cd..5692e3d0000 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -47,7 +47,7 @@ "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ CONFIG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ "script=boot.scr\0" \ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index d75b8bf0c18..669da591fa2 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -23,7 +23,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ AHAB_ENV \ "script=boot.scr\0" \ "image=Image\0" \ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index d313bdc2a44..30dd5af03b0 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -34,7 +34,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index 895c50f6025..5cd6492dd50 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -28,7 +28,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=0x83500000\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index 84228676c7f..7688464841e 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -19,7 +19,7 @@ DMAMEM_SZ_ALL) #ifdef CONFIG_VIDEO -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "stdin=serial\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index 0f6150fc9c7..7d087413362 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -40,7 +40,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ BOOTENV \ EXTRA_ENV_IOT2050_BOARD_SETTINGS diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index e66f994a375..a7210b5cf3a 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -170,7 +170,7 @@ #include /* Incorporate settings into the U-Boot environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index ab204c62b7d..54dfea6952e 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -127,7 +127,7 @@ DFU_ALT_INFO_OSPI /* Incorporate settings into the U-Boot environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 736865ad80a..61ff80d2c98 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -29,7 +29,7 @@ /* Board Clock */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" /* SPL support */ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 7c5f673c0f4..e3ae91089ff 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -45,6 +45,6 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #endif -#define CONFIG_EXTRA_ENV_SETTINGS BOOTENV +#define CFG_EXTRA_ENV_SETTINGS BOOTENV #endif /* __KONTRON_MX6UL_CONFIG_H */ diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index beb1926c12a..e4d6a8a1540 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -49,6 +49,6 @@ #define CONFIG_MALLOC_F_ADDR 0x930000 #endif -#define CONFIG_EXTRA_ENV_SETTINGS BOOTENV +#define CFG_EXTRA_ENV_SETTINGS BOOTENV #endif /* __KONTRON_MX8MM_CONFIG_H */ diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 17c63d83410..d909bbbbcfd 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -50,7 +50,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ "console=ttymxc2,115200\0" \ "boot_fdt=try\0" \ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index a073a06c827..0d293f316b7 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -61,7 +61,7 @@ func(PXE, pxe, 0) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "env_addr=0x203e0004\0" \ "envload=env import -d -b ${env_addr}\0" \ "install_rcw=source 20200000\0" \ diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index c551585a206..da8a67b4ab6 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -16,7 +16,7 @@ /* Command definition */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc1,115200\0" \ "fdt_addr=0x75000000\0" \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 136e228682a..99321b320f5 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -22,7 +22,7 @@ #define CONFIG_MXC_USB_FLAGS 0 #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200\0" \ "fdt_addr=0x18000000\0" \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 7a66df548a3..7ad29f92997 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -44,7 +44,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" \ diff --git a/include/configs/lager.h b/include/configs/lager.h index f3feaa539fc..777d5b94d1c 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -30,7 +30,7 @@ /* Board Clock */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" /* SPL support */ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 794c1fcbed0..687ac89b857 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -48,7 +48,7 @@ * Linux Information */ #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootenvfile=uEnv.txt\0" \ "fdtfile=da850-lego-ev3.dtb\0" \ "memsize=64M\0" \ diff --git a/include/configs/librem5.h b/include/configs/librem5.h index 377e3e7b3fa..7417f8582a4 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -62,7 +62,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x80000000\0" \ "pxefile_addr_r=0x80100000\0" \ "kernel_addr_r=0x80800000\0" \ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 721da818633..938ab5ade9a 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -20,7 +20,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index f0a9e9ab315..d1e0ed5817e 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -11,8 +11,8 @@ /* DDR */ #define CFG_SYS_SDRAM_SIZE 0x40000000 -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_addr=0x01000000\0" \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 9e4f949016e..a5f680db2d3 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -34,7 +34,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "loadaddr=0x80100000\0" \ "kernel_addr=0x100000\0" \ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index c19ed2f43ec..4243a21f1f1 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -16,8 +16,8 @@ #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "fdt_high=0xffffffffffffffff\0" \ "kernel_addr=0x01000000\0" \ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 1b417c72e70..872296749c0 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -25,8 +25,8 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_addr=0x01000000\0" \ diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 495bb3911b3..35e8ff05798 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -55,8 +55,8 @@ #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "kernel_addr=0x01000000\0" \ "kernelheader_addr=0x600000\0" \ diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index d74936d1281..1e843f896c7 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -36,8 +36,8 @@ #define __PHY_ETH2_MASK 0xFB #define __PHY_ETH1_MASK 0xFD -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "verify=no\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_addr=0x01000000\0" \ diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 0e3ff3c5b7a..8b5fba51c6f 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -72,7 +72,7 @@ #define HWCONFIG_BUFFER_SIZE 256 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ "initrd_high=0xffffffff\0" diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 76e75335c58..78432e55811 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -247,12 +247,12 @@ #define HWCONFIG_BUFFER_SIZE 256 #ifdef CONFIG_LPUART -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \ "initrd_high=0xffffffff\0" \ "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0" #else -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ "initrd_high=0xffffffff\0" \ "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0" diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index b15c4a238bc..b722586dd6b 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -60,7 +60,7 @@ func(DHCP, dhcp, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ "initrd_high=0xffffffff\0" \ "kernel_addr=0x61000000\0" \ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 9b22a2db21a..a387eeab472 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -144,7 +144,7 @@ #include #ifdef CONFIG_LPUART -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyLP0,115200 " \ "cma=64M@0x0-0xb0000000\0" \ "initrd_high=0xffffffff\0" \ @@ -200,7 +200,7 @@ "cp.b $kernel_addr $load_addr " \ "$kernel_size && bootm $load_addr#$board\0" #else -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs=root=/dev/ram0 rw console=ttyS0,115200 " \ "cma=64M@0x0-0xb0000000\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 228fb122f5f..769ece901c1 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -61,8 +61,8 @@ /* SATA */ #ifndef SPL_NO_ENV -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "board=ls1028aqds\0" \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 5c134612576..8c53636beac 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -56,8 +56,8 @@ /* Initial environment variables */ #ifndef SPL_NO_ENV -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "board=ls1028ardb\0" \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 685e7e65d15..ac2319c1b42 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -88,7 +88,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index ae9dc0c73b0..38fb1d45bcb 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -84,7 +84,7 @@ #endif #ifndef SPL_NO_MISC /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ "ramdisk_size=0x2000000\0" \ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 86c5d48c0de..720a95d2f53 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -117,7 +117,7 @@ unsigned long long get_qixis_addr(void); #ifndef SPL_NO_ENV /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x80100000\0" \ "kernel_addr=0x100000\0" \ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 3391540c6e3..084ee064ae6 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -293,8 +293,8 @@ /* Initial environment variables */ #ifdef CONFIG_NXP_ESBC -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ COMMON_ENV \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x90100000\0" \ @@ -325,8 +325,8 @@ #define IFC_MC_INIT_CMD \ "fsl_mc start mc 0x580A00000 0x580E00000\0" -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ COMMON_ENV \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x90100000\0" \ @@ -387,8 +387,8 @@ "$kernel_size && bootm $kernel_load#$BOARD\0" #else #if defined(CONFIG_QSPI_BOOT) -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ COMMON_ENV \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x90100000\0" \ @@ -405,8 +405,8 @@ "fsl_mc start mc 0x80a00000 0x80e00000\0" \ "mcmemsize=0x70000000 \0" #elif defined(CONFIG_SD_BOOT) -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ COMMON_ENV \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x90100000\0" \ @@ -423,8 +423,8 @@ "fsl_mc start mc 0x80a00000 0x80e00000\0" \ "mcmemsize=0x70000000 \0" #else /* NOR BOOT */ -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ COMMON_ENV \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x90100000\0" \ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 1ddf0687f43..a1749149e50 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -234,9 +234,9 @@ #endif #endif /* CONFIG_TFABOOT */ -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS #ifdef CONFIG_TFABOOT -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "BOARD=ls1088ardb\0" \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ @@ -304,7 +304,7 @@ " && esbc_validate ${kernelheader_addr_r};" \ "bootm $load_addr#$BOARD\0" #else -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "BOARD=ls1088ardb\0" \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index bd78bdb793a..f51eb31ed06 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -109,7 +109,7 @@ unsigned long long get_qixis_addr(void); #define HWCONFIG_BUFFER_SIZE 128 /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x80100000\0" \ "kernel_addr=0x100000\0" \ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 4a52fcdfddb..7ad2432a775 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -226,9 +226,9 @@ #define CFG_SYS_I2C_RTC_ADDR 0x68 /* Initial environment variables */ -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS #ifdef CONFIG_NXP_ESBC -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x80100000\0" \ "kernel_addr=0x100000\0" \ @@ -253,7 +253,7 @@ #define IFC_MC_INIT_CMD \ "fsl_mc start mc 0x580a00000" \ " 0x580e00000 \0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x80100000\0" \ "loadaddr_sd=0x90100000\0" \ @@ -309,7 +309,7 @@ "$kernel_addr_sd $kernel_size_sd && " \ "bootm $load_addr#$BOARD\0" #elif defined(CONFIG_SD_BOOT) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x90100000\0" \ "kernel_addr=0x800\0" \ @@ -325,7 +325,7 @@ "fsl_mc start mc 0x80a00000 0x80e00000\0" \ "mcmemsize=0x70000000 \0" #else -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "loadaddr=0x80100000\0" \ "kernel_addr=0x100000\0" \ diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index b8ab501c98e..794ea84852e 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -275,9 +275,9 @@ #endif /* Initial environment variables */ -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS #ifdef CONFIG_TFABOOT -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ "ramdisk_size=0x2000000\0" \ @@ -339,7 +339,7 @@ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ "bootm $load_addr#$board\0" #else -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=auto\0" \ "ramdisk_addr=0x800000\0" \ "ramdisk_size=0x2000000\0" \ diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index c82eb8b04bf..47d7ec57b80 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -22,7 +22,7 @@ /* * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootsource=legacy\0" \ "hdpart=0:1\0" \ "kernel_addr_r=0x00800000\0" \ diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index 9f891064bd5..3a316e73308 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -14,7 +14,7 @@ /* MAC/PHY configuration */ /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ "boot_scripts=lx2160aqds_boot.scr\0" \ "boot_script_hdr=hdr_lx2160aqds_bs.out\0" \ diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index 58c0ff36571..8cc4e0db03f 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -18,7 +18,7 @@ #define I2C_EMC2305_PWM 0x80 /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ "boot_scripts=lx2160ardb_boot.scr\0" \ "boot_script_hdr=hdr_lx2160ardb_bs.out\0" \ diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index 157688ef7d7..54d7cea4c59 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -14,7 +14,7 @@ #define CFG_SYS_RTC_BUS_NUM 0 /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ EXTRA_ENV_SETTINGS \ "boot_scripts=lx2162aqds_boot.scr\0" \ "boot_script_hdr=hdr_lx2162aqds_bs.out\0" \ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index d42ad9acb40..0deb7672f9e 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -84,7 +84,7 @@ * Extra Environments */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "consdev=ttymxc0\0" \ "baudrate=115200\0" \ "bootscript=boot.scr\0" \ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index a7f55076926..436f5f0059d 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -33,7 +33,7 @@ /* Ethernet Configuration */ #define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200 quiet\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/meson64.h b/include/configs/meson64.h index a22f7a81b00..9244601284b 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -83,8 +83,8 @@ #include -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#ifndef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "stdin=" STDIN_CFG "\0" \ "stdout=" STDOUT_CFG "\0" \ "stderr=" STDOUT_CFG "\0" \ diff --git a/include/configs/meson64_android.h b/include/configs/meson64_android.h index 1266851196d..c0e977abb01 100644 --- a/include/configs/meson64_android.h +++ b/include/configs/meson64_android.h @@ -279,7 +279,7 @@ "fi;" \ "fi;" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ EXTRA_ANDROID_ENV_SETTINGS \ "partitions=" PARTS_DEFAULT "\0" \ "mmcdev=2\0" \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index b8b08974c7e..6740ab2be3e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -76,8 +76,8 @@ #include -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#ifndef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "unlock=yes\0"\ "nor0=flash-0\0"\ "mtdparts=mtdparts=flash-0:"\ diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index c73c5a1d9fe..5ced45b88b2 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -19,7 +19,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ "kernel_addr_r=0x84000000\0" \ "fdt_addr_r=0x88000000\0" \ diff --git a/include/configs/msc_sm2s_imx8mp.h b/include/configs/msc_sm2s_imx8mp.h index cfe926c0a14..ef2111cd20a 100644 --- a/include/configs/msc_sm2s_imx8mp.h +++ b/include/configs/msc_sm2s_imx8mp.h @@ -30,7 +30,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 93161bd24f0..db12377b004 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -42,7 +42,7 @@ #include /* Extra environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h index 3da7619d78d..1f973829bba 100644 --- a/include/configs/mt8183.h +++ b/include/configs/mt8183.h @@ -21,7 +21,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x40000000\0" \ BOOTENV diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h index 3a35527da10..c0fc8688ca6 100644 --- a/include/configs/mt8512.h +++ b/include/configs/mt8512.h @@ -26,7 +26,7 @@ #define ENV_BOOT_CMD \ "mtk_boot=run boot_rd_img;bootm;\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x6c000000\0" \ ENV_DEVICE_SETTINGS \ ENV_BOOT_READ_IMAGE \ diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h index 0f7981a5661..73776e3705b 100644 --- a/include/configs/mt8516.h +++ b/include/configs/mt8516.h @@ -21,7 +21,7 @@ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x40000000\0" \ BOOTENV diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index 8a8bc85ca70..d6bd1a10386 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -33,7 +33,7 @@ "serial#=1234567890ABCDEF\0" \ "board=mt8518\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x6c000000\0" \ ENV_DEVICE_SETTINGS \ ENV_BOOT_READ_IMAGE \ diff --git a/include/configs/mvebu_alleycat-5.h b/include/configs/mvebu_alleycat-5.h index 3ad3aefa755..39e37ffbf7c 100644 --- a/include/configs/mvebu_alleycat-5.h +++ b/include/configs/mvebu_alleycat-5.h @@ -22,7 +22,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "kernel_addr_r=0x202000000\0" \ "fdt_addr_r=0x201000000\0" \ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 9bfc48c52d9..76e148f55eb 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -89,7 +89,7 @@ "" /* fdt_addr and kernel_addr are needed for existing distribution boot scripts */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x6d00000\0" \ "pxefile_addr_r=0x6e00000\0" \ "fdt_addr=0x6f00000\0" \ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index beac3ae6496..239a09763ae 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -41,7 +41,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x6d00000\0" \ "pxefile_addr_r=0x6e00000\0" \ "fdt_addr_r=0x6f00000\0" \ diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index aa3d7a1a3fc..e769ba2e837 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -19,7 +19,7 @@ /* Ethernet */ /* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "update_sd_firmware_filename=u-boot.sd\0" \ "update_sd_firmware=" /* Update the SD firmware partition */ \ "if mmc rescan ; then " \ diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index f597cdb3056..5ceba8b15fa 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -16,7 +16,7 @@ #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Extra Environments */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "update_sd_firmware_filename=u-boot.sd\0" \ "update_sd_firmware=" /* Update the SD firmware partition */ \ "if mmc rescan ; then " \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index c740d853327..f9f65f6968e 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -18,7 +18,7 @@ /* UBI and NAND partitioning */ /* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "ubifs_file=filesystem.ubifs\0" \ "update_nand_full_filename=u-boot.nand\0" \ "update_nand_firmware_filename=u-boot.sb\0" \ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index ddd37b3936f..8ab1ee79a79 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -39,7 +39,7 @@ /* Framebuffer and LCD */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "fdt_file=imx51-babbage.dtb\0" \ diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index cd806cb698e..baffe65c369 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -37,7 +37,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_addr_r=0x75000000\0" \ "pxefile_addr_r=0x73000000\0" \ "scriptaddr=0x74000000\0" \ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index d0107fcc8cb..0ac93d6e043 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -27,7 +27,7 @@ /* Command definition */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "fdt_addr=0x71000000\0" \ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 9464d6e44ae..94d2191af91 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -35,7 +35,7 @@ "nfs=run choose_ip setargs bootargs_nfs; ${getcmd} ${loadaddr} " \ "${nfsserver}:${image}; bootm ${loadaddr}\0" \ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ PPD_CONFIG_NFS \ "image=/boot/fitImage\0" \ "dev=mmc\0" \ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index f7f209c20b5..d4af96b51ea 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -21,7 +21,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "som_rev=undefined\0" \ "has_emmc=undefined\0" \ "fdtfile=undefined\0" \ diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 96a48a97a30..9c61350a33b 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -35,7 +35,7 @@ #define EMMC_ENV "" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "fdtfile=undefined\0" \ diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 358d9f47c0f..4fbd06783a6 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -15,7 +15,7 @@ /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index 8731f6a3e4a..cf4871cbae3 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -12,7 +12,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "epdc_waveform=epdc_splash.bin\0" \ "script=boot.scr\0" \ "image=zImage\0" \ diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 0dd40563c29..9d8737c1942 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -12,7 +12,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 6f5dffe4fbb..8372f979dc8 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -34,7 +34,7 @@ #define UPDATE_M4_ENV "" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ UPDATE_M4_ENV \ "script=boot.scr\0" \ "image=zImage\0" \ diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index cb1019bd56a..90c78846871 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -30,7 +30,7 @@ #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 0e986093f35..4a27fd22902 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -24,7 +24,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index e56b6101af4..e56083f8e61 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -50,7 +50,7 @@ "bootimg part 0 1;"\ "rootfs part 0 2\0" \ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ UPDATE_M4_ENV \ CONFIG_MFG_ENV_SETTINGS \ CFG_DFU_ENV_SETTINGS \ diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 85922fa436c..5ee5129801d 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -28,7 +28,7 @@ #define PHYS_SDRAM 0x60000000 #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "console=ttyLP0\0" \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 99e01896c71..5f4cd930623 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -28,7 +28,7 @@ #define PHYS_SDRAM_SIZE SZ_1G #define CFG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttyLP0\0" \ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index a32fcd57f8f..43261824d3c 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -33,7 +33,7 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ "fdt_addr_r=0x82000000\0" \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/nas220.h b/include/configs/nas220.h index 85691ca94f0..358c3bb85a5 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -35,7 +35,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs=console=ttyS0,115200\0" \ "autostart=no\0" diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 1d101977c28..496a3164f40 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -64,7 +64,7 @@ #include #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc1\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index caaa9ed86b3..97d08685290 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -58,7 +58,7 @@ #define CFG_SYS_ONENAND_BASE ONENAND_MAP /* Environment information */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "usbtty=cdc_acm\0" \ "stdin=usbtty,serial,keyboard\0" \ "stdout=usbtty,serial,vidconsole\0" \ diff --git a/include/configs/novena.h b/include/configs/novena.h index b0d473eeee3..3ffb44ab725 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -58,7 +58,7 @@ #endif /* Extra U-Boot environment. */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "consdev=ttymxc1\0" \ diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 2eebd0c9a45..a12e34b6e60 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -38,7 +38,7 @@ #define CONFIG_FEC_ENET_DEV 1 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ "image=zImage\0" \ "fdtfile=imx6ull-seeed-npi-dev-board.dtb\0" \ diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index e2ad77072cd..fa029a176bd 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -36,7 +36,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "kernel=/boot/zImage\0" \ "fdt=/boot/nsa310s.dtb\0" \ diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h index ea1edab9fc1..0e1083a2130 100644 --- a/include/configs/o4-imx6ull-nano.h +++ b/include/configs/o4-imx6ull-nano.h @@ -15,7 +15,7 @@ # define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* CONFIG_CMD_USB */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "mmcdev=0\0" \ "mmcpart=2\0" \ "mmcargs=setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcpart} console=ttymxc0,${baudrate} panic=30\0" \ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 03d1a8e7b5f..c4db38562d8 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -15,7 +15,7 @@ /** Stack starting address */ /** Extra environment settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=20080000\0" \ "ethrotate=yes\0" diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 58275ccffa0..0be26ef3287 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -17,7 +17,7 @@ #include /* Extra environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x20080000\0" \ "kernel_addr_r=0x02000000\0" \ "ramdisk_addr_r=0x03000000\0" \ @@ -27,7 +27,7 @@ #else /** Extra environment settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=20080000\0" \ "autoload=0\0" diff --git a/include/configs/odroid.h b/include/configs/odroid.h index e2331e45cdf..3ac13a65d63 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -71,7 +71,7 @@ * 1. BOOT: 100MiB 2MiB * 2. ROOT: - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadbootscript=load mmc ${mmcbootdev}:${mmcbootpart} ${scriptaddr} " \ "boot.scr\0" \ "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kernel_addr_r} " \ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index e4a81499a72..2bac017ea08 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -60,8 +60,8 @@ */ /* Define new extra env settings, including DFU settings */ -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ EXYNOS_DEVICE_SETTINGS \ EXYNOS_FDTFILE_SETTING \ MEM_LAYOUT_ENV_SETTINGS \ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index f4e23bbb0f3..efeb7bf1007 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -73,7 +73,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 8bb8521f1c1..adb25a62970 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -69,7 +69,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index a6b5e55b541..93d36353ffb 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -59,7 +59,7 @@ "if test ${fdtfile} = ''; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_FINDFDT \ ENV_DEVICE_SETTINGS \ MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 38955377510..957f1c369e6 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -30,7 +30,7 @@ /* Environment information */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "mmcdev=0\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index f19211fe647..5e71ebcba85 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -137,7 +137,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ "bootpart=0:2\0" \ diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 5b097e9fef2..5adfc671958 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -20,7 +20,7 @@ * Board boot configuration */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_addr_r=0x86000000\0" \ "kernel_addr_r=0x80200000\0" \ "image=boot/Image\0" \ diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 2cec20ca425..1e6b16b4e70 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -27,7 +27,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console=ttyS0,115200 " \ +#define CFG_EXTRA_ENV_SETTINGS "x_bootargs=console=ttyS0,115200 " \ CONFIG_MTDPARTS_DEFAULT " rw ubi.mtd=2,2048\0" \ "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \ "x_bootcmd_usb=usb start\0" \ diff --git a/include/configs/origen.h b/include/configs/origen.h index a608df44e80..fd4cc70a670 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -23,7 +23,7 @@ /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x40007000\0" \ "rdaddr=0x48000000\0" \ "kerneladdr=0x40007000\0" \ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 74627b2e630..a353c16f74b 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -393,7 +393,7 @@ #include "p1_p2_bootsrc.h" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "uboot=" CONFIG_UBOOTPATH "\0" \ "loadaddr=1000000\0" \ diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 2a1660bf188..146f87e9ce3 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -45,7 +45,7 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ "fdt_addr_r=0x82000000\0" \ "fdt_high=0xffffffff\0" \ diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index 4421e740d9e..0890c115700 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -65,7 +65,7 @@ "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \ /* Default environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "console=ttymxc0,115200n8\0" \ "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 5c2ff5d02ee..34994016c54 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -29,7 +29,7 @@ /* boot command, including the target-defined one if any */ /* Extra env settings (including the target-defined ones if any) */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ PCM052_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 3674e4cddae..2991076c50a 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -39,7 +39,7 @@ "nandloadfit=ubi part rootfs;ubi readvol ${loadaddr} fit\0" \ "nandboot=run nandloadfit;run nandargs;bootm ${loadaddr}\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x30000000\0" \ "optargs=rw rootwait\0" \ ENV_MMC \ diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h index 71807837673..80b14b002a9 100644 --- a/include/configs/pdu001.h +++ b/include/configs/pdu001.h @@ -32,7 +32,7 @@ #define CONSOLE_DEV "ttyO5" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ "fdtfile=am335x-pdu001.dtb\0" \ "bootfile=zImage\0" \ diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index f922491637d..4e6dc79f41b 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -62,7 +62,7 @@ #include #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_MMC_TI_ARGS \ DEFAULT_LINUX_BOOT_ENV \ "bootfile=zImage\0" \ diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 7f73117ac1c..9160c78c046 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -20,7 +20,7 @@ /* For RAW image gives a error info not panic */ #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ "console=ttymxc2,115200\0" \ "fdt_addr=0x48000000\0" \ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 7a38382034a..d79d364c8e2 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -13,7 +13,7 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ "console=ttymxc0,115200\0" \ "fdt_addr=0x48000000\0" \ diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 3cc2a693cee..60c74732758 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -69,7 +69,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ CONFIG_LEGACY_BOOTCMD_ENV \ BOOTENV diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 719b7014405..66258a3ab73 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -38,7 +38,7 @@ "bootmenu_3=Boot using PICO-Nymph baseboard=" \ "setenv baseboard nymph; saveenv; run base_boot\0" \ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ BOOTMENU_ENV \ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 36f648f6340..45fc6126c87 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -45,7 +45,7 @@ "bootmenu_2=Boot using PICO-Pi baseboard=" \ "setenv fdtfile imx6ul-pico-pi.dtb\0" \ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "splashpos=m,m\0" \ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 58192151042..7fc6211ff73 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -51,7 +51,7 @@ BOOTENV #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "splashpos=m,m\0" \ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index f9301a5524b..ac25991703f 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -25,7 +25,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=Image\0" \ "console=ttymxc0,115200\0" \ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index a233fb8ed74..f4a34f261a6 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -144,7 +144,7 @@ /* USB */ #define CFG_SYS_USB_OHCI_REGS_BASE 0x00500000 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "partition=nand0,0\0" \ "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index fa08744b6fe..cd9d21e420b 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -163,7 +163,7 @@ /* USB */ #define CFG_SYS_USB_OHCI_REGS_BASE 0x00a00000 /* AT91SAM9263_UHP_BASE */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "partition=nand0,0\0" \ "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index fc9f113dee6..b1354219c9f 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -18,7 +18,7 @@ * Default environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs_console=console=ttyS0,115200\0" \ "bootcmd_usb=usb start; ext2load usb 0:1 0x00800000 /uImage; " \ "ext2load usb 0:1 0x01100000 /uInitrd\0" diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h index 239d33d8e9d..33715790233 100644 --- a/include/configs/pogo_v4.h +++ b/include/configs/pogo_v4.h @@ -61,7 +61,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ LOAD_ADDRESS_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 075729e5d37..c3f1d3393cb 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -14,7 +14,7 @@ #define CFG_SYS_SDRAM_BASE 0x0 /* Default environemnt variables */ -#define CONFIG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ +#define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" \ diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h index 1c11685f49e..8e74dc48887 100644 --- a/include/configs/pomelo.h +++ b/include/configs/pomelo.h @@ -21,7 +21,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ BOOTENV \ "scriptaddr=0x90100000\0" \ diff --git a/include/configs/poplar.h b/include/configs/poplar.h index c58105597e4..6e8adf91877 100644 --- a/include/configs/poplar.h +++ b/include/configs/poplar.h @@ -31,7 +31,7 @@ func(DHCP, dhcp, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loader_mmc_blknum=0x0\0" \ "loader_mmc_nblks=0x780\0" \ "env_mmc_blknum=0xf80\0" \ diff --git a/include/configs/porter.h b/include/configs/porter.h index e0f77f358b9..202bd914d50 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -31,7 +31,7 @@ /* Board Clock */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" /* SPL support */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 2b25c31b1d8..df07df6a5a7 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -54,7 +54,7 @@ #define GLOBAL_IO_DRIVE_CONTROL_OFFSET 0x4c /* max command args */ -#define CONFIG_EXTRA_ENV_SETTINGS "silent=y\0" +#define CFG_EXTRA_ENV_SETTINGS "silent=y\0" /* nand driver parameters */ #ifdef CONFIG_TARGET_PRESIDIO_ASIC diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 99376155b49..003686930a4 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -27,7 +27,7 @@ "ramdisk_addr_r=0x0a200000\0" #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 48f49906b84..10eaeb49de6 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -28,7 +28,7 @@ /* Use common default */ /* Default env settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hostname=pxm2\0" \ "ubi_off=2048\0"\ "nand_img_size=0x500000\0" \ diff --git a/include/configs/qcs404-evb.h b/include/configs/qcs404-evb.h index c41bb341d82..8ea59aa21ca 100644 --- a/include/configs/qcs404-evb.h +++ b/include/configs/qcs404-evb.h @@ -13,7 +13,7 @@ #define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x5000000\0" \ "bootm_low=0x80000000\0" \ "bootcmd=bootm $prevbl_initrd_start_addr\0" diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index a67af73fd56..45bd94ee5c7 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -76,7 +76,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "fdt_addr=0x40000000\0" \ diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index 35172da3ff1..20135f569eb 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -34,7 +34,7 @@ #define BOOTENV_DEV_NAME_QEMU(devtypeu, devtypel, instance) \ "qemu " -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_addr_r=0x84000000\0" \ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 59d56d66624..777df4c1125 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -38,7 +38,7 @@ #define EEPROM_ADDR_CHIP 0x120 /* Default env settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hostname=rastaban\0" \ "ubi_off=2048\0"\ "nand_img_size=0x400000\0" \ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 86012adfb36..8e0837a3027 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -32,7 +32,7 @@ /* ENV setting */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" #endif /* __RCAR_GEN3_COMMON_H */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index a4cae697181..ea6073f2944 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -25,7 +25,7 @@ /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board, * so limit the fdt reallocation to that */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_high=0x7fffffff\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index 99c86edeaa4..c4758e148ba 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -24,7 +24,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x6fffffff\0" \ "initrd_high=0x6fffffff\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 302546630ac..5b0ec370004 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -27,7 +27,7 @@ "ramdisk_addr_r=0x64000000\0" #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 334fb3affa5..58f491c2f32 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -31,7 +31,7 @@ /* Linux fails to load the fdt if it's loaded above 256M on a Rock board, * so limit the fdt reallocation to that */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_high=0x6fffffff\0" \ "initrd_high=0x6fffffff\0" \ diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 58ad62afe16..b95268df87c 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -27,7 +27,7 @@ /* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board, * so limit the fdt reallocation to that */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "fdt_high=0x7fffffff\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 6b55c57dd77..d3b8a5150f6 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -30,7 +30,7 @@ /* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so * limit the fdt reallocation to that */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x0fffffff\0" \ "initrd_high=0x0fffffff\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 4b510b13991..bc03e113fef 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -22,7 +22,7 @@ "ramdisk_addr_r=0x04000000\0" #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "partitions=" PARTS_DEFAULT \ ROCKCHIP_DEVICE_SETTINGS \ diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 132b7d0fe9b..85d2186f23e 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -22,7 +22,7 @@ "ramdisk_addr_r=0x06000000\0" #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 92cdc1a51fb..17636250510 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -25,7 +25,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index a721f27ec00..2278b6215d4 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -50,7 +50,7 @@ #include #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index d43dc2580e4..750f16d0399 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -21,7 +21,7 @@ "ramdisk_addr_r=0x0a200000\0" #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/rpi.h b/include/configs/rpi.h index e3549275138..c3f8e7bf85c 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -157,7 +157,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "dhcpuboot=usb start; dhcp u-boot.uimg; bootm\0" \ ENV_DEVICE_SETTINGS \ ENV_DFU_SETTINGS \ diff --git a/include/configs/rut.h b/include/configs/rut.h index b07d0c50604..99799f8494e 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -27,7 +27,7 @@ /* Use common default */ /* Default env settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hostname=rut\0" \ "ubi_off=2048\0"\ "nand_img_size=0x500000\0" \ diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 84a5ae6965d..6e17b23b624 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -26,7 +26,7 @@ "ramdisk_addr_r=0x64000000\0" #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index b4b2dbd0386..bfe559f6e2c 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -140,7 +140,7 @@ #define EXTRA_ENV_BOOT_LOGO EXTRA_ENV_DTB_RESERVE #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "rootdev=" __stringify(CONFIG_ROOT_DEV) "\0" \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 555bedb93d6..d1ff00a27f8 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -54,7 +54,7 @@ #define COMMON_BOOT "${console} ${meminfo} ${mtdparts}" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "updateb=" \ "onenand erase 0x0 0x100000;" \ "onenand write 0x32008000 0x0 0x100000\0" \ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 80d3fc9258c..bf2d04a169b 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -29,7 +29,7 @@ ",100M(swap)"\ ",-(UMS)\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "updateb=" \ "onenand erase 0x0 0x100000;" \ "onenand write 0x42008000 0x0 0x100000\0" \ diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index f7cdd5a1956..9a4fe530a20 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -13,7 +13,7 @@ #define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x4000000\0" \ "bootm_low=0x80000000\0" \ "stdout=vidconsole\0" \ diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index d7923967a72..4e0b3c663c7 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -15,7 +15,7 @@ /* * Environment variables configurations */ -#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ +#define CFG_EXTRA_ENV_SETTINGS "x_bootargs=console" \ "=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \ "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \ "x_bootcmd_usb=usb start\0" \ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 4a453a9df40..de3a0dcdd59 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -37,7 +37,7 @@ "name=loader2,size=4MB,type=${type_guid_gpt_loader2};" \ "name=system,size=-,bootable,type=${type_guid_gpt_system};" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0xffffffffffffffff\0" \ "initrd_high=0xffffffffffffffff\0" \ "kernel_addr_r=0x84000000\0" \ diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index ac42108620f..24904aa2387 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -34,7 +34,7 @@ "name=loader2,size=4MB,type=${type_guid_gpt_loader2};" \ "name=system,size=-,bootable,type=${type_guid_gpt_system};" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x84000000\0" \ "kernel_comp_addr_r=0x88000000\0" \ "kernel_comp_size=0x4000000\0" \ diff --git a/include/configs/silk.h b/include/configs/silk.h index 6d605edf788..9114a057582 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -31,7 +31,7 @@ /* Board Clock */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" /* SPL support */ diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h index 974531ea0d8..760a0a5b913 100644 --- a/include/configs/sipeed-maix.h +++ b/include/configs/sipeed-maix.h @@ -11,8 +11,8 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 #define CFG_SYS_SDRAM_SIZE SZ_8M -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#ifndef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80060000\0" \ "fdt_addr_r=0x80400000\0" \ "scriptaddr=0x80020000\0" \ diff --git a/include/configs/slimbootloader.h b/include/configs/slimbootloader.h index ff0ed180e92..748a423b083 100644 --- a/include/configs/slimbootloader.h +++ b/include/configs/slimbootloader.h @@ -14,10 +14,10 @@ "stderr=serial\0" /* - * Override CONFIG_EXTRA_ENV_SETTINGS in x86-common.h + * Override CFG_EXTRA_ENV_SETTINGS in x86-common.h */ -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ CONFIG_STD_DEVICES_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index b988b96e58d..762f61470b1 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -73,7 +73,7 @@ * Predefined environment variables. * Usefull to define some easy to use boot commands. */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ \ "basicargs=console=ttyS0,115200\0" \ \ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index ccb7ec38d03..c148757915a 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -28,7 +28,7 @@ " mem=128M " \ " " CONFIG_MTDPARTS_DEFAULT -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "updateb=" \ "onenand erase 0x0 0x40000;" \ "onenand write 0x32008000 0x0 0x40000\0" \ diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 14f9cf56028..11031744bef 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -17,7 +17,7 @@ /* MMC Config*/ #define CFG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "console=ttymxc0\0" \ "fdtfile=imx7d-smegw01.dtb\0" \ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index b7aa49ce435..df8ed451a43 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -41,7 +41,7 @@ /* Environment settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "ethaddr=00:00:00:00:00:00\0" \ "serial=0\0" \ "stdout=serial_atmel\0" \ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index afca7e18e9b..eaee8dd3739 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -62,7 +62,7 @@ * Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x82000000\0" \ "loadaddr=0x82000000\0" \ "fdt_addr_r=0x88000000\0" \ diff --git a/include/configs/socfpga_chameleonv3.h b/include/configs/socfpga_chameleonv3.h index aa13878177e..2ce7011529a 100644 --- a/include/configs/socfpga_chameleonv3.h +++ b/include/configs/socfpga_chameleonv3.h @@ -19,7 +19,7 @@ */ #define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "autoload=no\0" \ "bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rw rootwait\0" \ "distro_bootcmd=bridge enable; run bootcmd_mmc\0" \ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index d0f5331d451..0c96c9c24fe 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -144,8 +144,8 @@ #include -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#ifndef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "bootm_size=0xa000000\0" \ "kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \ diff --git a/include/configs/socfpga_dbm_soc1.h b/include/configs/socfpga_dbm_soc1.h index 8f1c2de998e..565a661258f 100644 --- a/include/configs/socfpga_dbm_soc1.h +++ b/include/configs/socfpga_dbm_soc1.h @@ -13,7 +13,7 @@ /* Environment is in MMC */ /* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "consdev=ttyS0\0" \ "baudrate=115200\0" \ "bootscript=boot.scr\0" \ diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index e76438e228d..ac70d91e208 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -13,7 +13,7 @@ /* Environment is in MMC */ /* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "consdev=ttyS0\0" \ "baudrate=115200\0" \ "bootscript=boot.scr\0" \ diff --git a/include/configs/socfpga_n5x_socdk.h b/include/configs/socfpga_n5x_socdk.h index c295e91e3d3..fe5286e12cd 100644 --- a/include/configs/socfpga_n5x_socdk.h +++ b/include/configs/socfpga_n5x_socdk.h @@ -9,8 +9,8 @@ #include -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "bootfile=" CONFIG_BOOTFILE "\0" \ "fdt_addr=1100000\0" \ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index df3927297bb..66ecb168a0a 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -36,7 +36,7 @@ /* * Environment variable */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "bootfile=" CONFIG_BOOTFILE "\0" \ "fdt_addr=8000000\0" \ diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index d88b07bc159..4bb15cf4629 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -27,7 +27,7 @@ * Linux system after 5 seconds */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "verify=n\0" \ "consdev=ttyS0\0" \ "baudrate=115200\0" \ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 4c752091fb5..2b35be83ec6 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -111,7 +111,7 @@ #define CFG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consdev=ttyS0\0" \ "uboot_file=/home/tftp/syscon3/u-boot.bin\0" \ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index de0f48b79a1..e1328056351 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -20,7 +20,7 @@ #define CFG_SYS_FSL_USDHC_NUM 1 #endif /* CONFIG_FSL_USDHC */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ "console=ttymxc0\0" \ "initrd_addr=0x86800000\0" \ diff --git a/include/configs/stemmy.h b/include/configs/stemmy.h index a5987c5e17a..e58ddd752cd 100644 --- a/include/configs/stemmy.h +++ b/include/configs/stemmy.h @@ -38,7 +38,7 @@ #define BOOTCMD_ENV \ "fastbootcmd=echo '*** FASTBOOT MODE ***'; fastboot usb 0\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOT_ENV \ CONSOLE_ENV \ FASTBOOT_ENV \ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 9294d57ca84..b3fce503168 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -29,7 +29,7 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x40000000\0" \ "fdtfile=stih410-b2260.dtb\0" \ "fdt_addr_r=0x47000000\0" \ diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index afd7d50428b..de5019a364a 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -15,7 +15,7 @@ #define CFG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \ "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ "bootm 0x08044000 - 0x08042000\0" diff --git a/include/configs/stm32f429-evaluation.h b/include/configs/stm32f429-evaluation.h index c8aad47966f..a4f3e43dc5a 100644 --- a/include/configs/stm32f429-evaluation.h +++ b/include/configs/stm32f429-evaluation.h @@ -24,7 +24,7 @@ func(MMC, mmc, 0) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x00008000\0" \ "fdtfile=stm32429i-eval.dtb\0" \ "fdt_addr_r=0x00408000\0" \ diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h index 573a6b17956..62a7e9af0c5 100644 --- a/include/configs/stm32f469-discovery.h +++ b/include/configs/stm32f469-discovery.h @@ -24,7 +24,7 @@ func(MMC, mmc, 0) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x00008000\0" \ "fdtfile=stm32f469-disco.dtb\0" \ "fdt_addr_r=0x00408000\0" \ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 14e883a3589..34856d30040 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -24,7 +24,7 @@ func(MMC, mmc, 0) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0xC0008000\0" \ "fdtfile="CONFIG_DEFAULT_DEVICE_TREE".dtb\0" \ "fdt_addr_r=0xC0408000\0" \ diff --git a/include/configs/stm32h743-disco.h b/include/configs/stm32h743-disco.h index 67e6a3a19d2..d36cd6fdd44 100644 --- a/include/configs/stm32h743-disco.h +++ b/include/configs/stm32h743-disco.h @@ -21,7 +21,7 @@ func(MMC, mmc, 0) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0xD0008000\0" \ "fdtfile=stm32h743i-disco.dtb\0" \ "fdt_addr_r=0xD0408000\0" \ diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h index 4786eb001bc..8f242bf0ff6 100644 --- a/include/configs/stm32h743-eval.h +++ b/include/configs/stm32h743-eval.h @@ -21,7 +21,7 @@ func(MMC, mmc, 0) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0xD0008000\0" \ "fdtfile=stm32h743i-eval.dtb\0" \ "fdt_addr_r=0xD0408000\0" \ diff --git a/include/configs/stm32h750-art-pi.h b/include/configs/stm32h750-art-pi.h index e667fe6f6ac..d27b6a3d1de 100644 --- a/include/configs/stm32h750-art-pi.h +++ b/include/configs/stm32h750-art-pi.h @@ -21,7 +21,7 @@ func(MMC, mmc, 0) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0xC0008000\0" \ "fdtfile=stm32h750i-art-pi.dtb\0" \ "fdt_addr_r=0xC0408000\0" \ diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index c259a616133..7c59c69e0bd 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -81,7 +81,7 @@ "fdtoverlay_addr_r=" __FDTOVERLAY_ADDR_R "\0" \ "ramdisk_addr_r=" __RAMDISK_ADDR_R "\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ STM32MP_MEM_LAYOUT \ STM32MP_BOOTCMD \ BOOTENV \ diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 9715dfad1c9..7db72a19ed9 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -135,7 +135,7 @@ "fdtoverlay_addr_r=" __FDTOVERLAY_ADDR_R "\0" \ "ramdisk_addr_r=" __RAMDISK_ADDR_R "\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ STM32MP_MEM_LAYOUT \ STM32MP_BOOTCMD \ STM32MP_PARTS_DEFAULT \ diff --git a/include/configs/stm32mp15_dh_dhsom.h b/include/configs/stm32mp15_dh_dhsom.h index 910d7ef107b..91921690624 100644 --- a/include/configs/stm32mp15_dh_dhsom.h +++ b/include/configs/stm32mp15_dh_dhsom.h @@ -12,7 +12,7 @@ #define PHY_ANEG_TIMEOUT 20000 #ifdef CONFIG_SPL_BUILD -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "dfu_alt_info_ram=u-boot.itb ram " \ __stringify(CONFIG_SPL_LOAD_FIT_ADDRESS) \ " 0x800000\0" diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h index 38b5aa7319c..d0cd4130cec 100644 --- a/include/configs/stm32mp15_st_common.h +++ b/include/configs/stm32mp15_st_common.h @@ -18,7 +18,7 @@ 230400, 460800, 921600, \ 1000000, 2000000 } -#ifdef CONFIG_EXTRA_ENV_SETTINGS +#ifdef CFG_EXTRA_ENV_SETTINGS /* * default bootcmd for stm32mp1 STMicroelectronics boards: * for serial/usb: execute the stm32prog command @@ -42,8 +42,8 @@ "run distro_bootcmd;" \ "fi;\0" -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ STM32MP_MEM_LAYOUT \ ST_STM32MP1_BOOTCMD \ STM32MP_PARTS_DEFAULT \ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index ce941d832a5..fe2ba9a03b4 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -13,7 +13,7 @@ #define LDS_BOARD_TEXT \ board/sysam/stmark2/sbf_dram_init.o (.text*) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kern_size=0x700000\0" \ "loadaddr=0x40001000\0" \ "-(rootfs)\0" \ diff --git a/include/configs/stout.h b/include/configs/stout.h index 977c0adc5f0..ee1abe691bf 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -35,7 +35,7 @@ /* Board Clock */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x10000000\0" /* SPL support */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5d82e7e560f..eae107fe5ec 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -318,7 +318,7 @@ #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ CONSOLE_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ MEM_LAYOUT_ENV_EXTRA_SETTINGS \ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index a2b6a1f57d7..a62d1d32547 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -91,7 +91,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_addr_r=0x9fe00000\0" \ "kernel_addr_r=0x90000000\0" \ "ramdisk_addr_r=0xa0000000\0" \ diff --git a/include/configs/syzygy_hub.h b/include/configs/syzygy_hub.h index 7af7b08eb48..e8a207f5416 100644 --- a/include/configs/syzygy_hub.h +++ b/include/configs/syzygy_hub.h @@ -10,7 +10,7 @@ #ifndef __CONFIG_SYZYGY_HUB_H #define __CONFIG_SYZYGY_HUB_H -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fit_image=fit.itb\0" \ "bitstream_image=download.bit\0" \ "loadbit_addr=0x1000000\0" \ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 30f84255820..855218a8901 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -72,7 +72,7 @@ /* bootstrap in spi flash , u-boot + env + linux in nandflash */ #if defined(CONFIG_BOARD_AXM) -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 689914cb187..9b396e6e73b 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -30,7 +30,7 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* CONFIG_CMD_USB */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \ "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 2c668e0611b..0fdb5a81605 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -65,7 +65,7 @@ #define INITRD_HIGH "ffffffff" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "fdt_high=" FDT_HIGH "\0" \ diff --git a/include/configs/ten64.h b/include/configs/ten64.h index 57724719a9d..e86c1631329 100644 --- a/include/configs/ten64.h +++ b/include/configs/ten64.h @@ -34,9 +34,9 @@ func(PXE, pxe, 0) #include -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "BOARD=ten64\0" \ "fdt_addr_r=0x90000000\0" \ "fdt_high=0xa0000000\0" \ diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index b57b1beaafe..746995179f9 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -19,9 +19,9 @@ /* Environment settings */ -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "tftpdir=" DEF_ENV_TFTPDIR "\0" \ "eth_init=" DEF_ENV_ETH_INIT "\0" \ "ubuntu_part=" __stringify(DEF_ENV_UBUNTU_PART) "\0" \ diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 76b496303f3..9722b0db72a 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -35,7 +35,7 @@ #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ /* Keep device tree and initrd in lower memory so the kernel can access them */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" diff --git a/include/configs/thuban.h b/include/configs/thuban.h index c8b27263e85..1753fa410d1 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -31,7 +31,7 @@ #define EEPROM_ADDR_CHIP 0x120 /* Default env settings */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "hostname=thuban\0" \ "ubi_off=2048\0"\ "nand_img_size=0x400000\0" \ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 7becf1eb7cb..8ba40546b2c 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -35,7 +35,7 @@ /* Initial environment variables */ #define UBOOT_IMG_HEAD_SIZE 0x40 /* C80000 - 0x40 */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr=08007ffc0\0" \ "fdt_addr=0x94C00000\0" \ "fdt_high=0x9fffffff\0" diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 7b04292d218..2d9d2fd66e9 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -12,7 +12,7 @@ #include #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV /* Clock Defines */ diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index ea45bba409c..479ab46e4ed 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -106,7 +106,7 @@ "rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; " \ "rproc start ${dev_pmmc}\0" \ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ ENV_KS2_BOARD_SETTINGS \ DFUARGS \ diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 64ec59d78eb..49f4263e16b 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -58,7 +58,7 @@ #include #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 37ab2e44672..e9723ed5b3d 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -247,7 +247,7 @@ #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ DEFAULT_FIT_TI_ARGS \ diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h index 83abaeddf12..3795e6152fa 100644 --- a/include/configs/topic_miami.h +++ b/include/configs/topic_miami.h @@ -44,8 +44,8 @@ # define EXTRA_ENV_USB #endif -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_image=uImage\0" \ "kernel_addr=0x2080000\0" \ "ramdisk_image=uramdisk.image.gz\0" \ diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index 0f28690612a..e007be8e456 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -28,7 +28,7 @@ #define PHYS_SDRAM_2 0x8080000000 #define PHYS_SDRAM_2_SIZE 0x180000000 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x20000000\0" \ "load_addr=0xa0000000\0" \ "kernel_addr_r=0x80080000\0" \ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 7a1ad9544a3..14d7730f67b 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -197,7 +197,7 @@ /* set to a resonable value, changeable by user */ #define TQMA6_CMA_SIZE 160M -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "board=tqma6\0" \ "uimage=uImage\0" \ "zimage=zImage\0" \ diff --git a/include/configs/trats.h b/include/configs/trats.h index 3eac66539df..2067327918a 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -54,7 +54,7 @@ "params.bin raw 0x38 0x8;" \ "/Image.itb ext4 0 2\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootk=" \ "run loaduimage;" \ "if run loaddtb; then " \ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 18fca09a380..9925531aba4 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -55,7 +55,7 @@ "params.bin raw 0x38 0x8;" \ "/Image.itb ext4 0 2\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootk=" \ "run loaduimage;" \ "if run loaddtb; then " \ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index fdb420ed874..3443c80d06e 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -35,7 +35,7 @@ "lzmadec 0x5000000 0x5800000 && " \ "bootm 0x5800000" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_addr=0x4c00000\0" \ "scriptaddr=0x4d00000\0" \ "pxefile_addr_r=0x4e00000\0" \ diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index 52de4cdc789..47b220ff9ee 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -80,7 +80,7 @@ "fi; " \ "bootz 0x1000000" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ RELOCATION_LIMITS_ENV_SETTINGS \ LOAD_ADDRESS_ENV_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ diff --git a/include/configs/udoo.h b/include/configs/udoo.h index fac8c1eeb4e..f0092eff149 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -15,7 +15,7 @@ /* MMC Configuration */ #define CFG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc1,115200\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index d4c92233aca..5d7d734daa2 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -19,7 +19,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* Linux only */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 7fee64029d8..ecf0d2ac44a 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -86,7 +86,7 @@ "run boot_common\0" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_addr_r_offset=0x05100000\0" \ "kernel_addr_r_offset=" KERNEL_ADDR_R_OFFSET "\0" \ "ramdisk_addr_r_offset=0x06000000\0" \ diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 657dbadd339..b90e047955b 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -43,6 +43,6 @@ #endif /* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ #endif diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 7f79c6342fc..11706148f1e 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -40,7 +40,7 @@ "pxefile_addr_r=0x70800000\0" \ "ramdisk_addr_r=0x73000000\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \ "fdtfile=imx53-usbarmory.dtb\0" \ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index b03159805c1..2e150276e7a 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -25,7 +25,7 @@ #error Unknown DDR size - please add! #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "loadaddr=0x81000000\0" \ "spi_image_off=0x00100000\0" \ "console=ttyS0,115200\0" \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 18ac6b2b089..7f3fa795afd 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -34,7 +34,7 @@ #include /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ "bootcmd_mfg=fastboot 0\0" \ diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 22dc364223c..2cb076cabac 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -43,7 +43,7 @@ #endif /* Initial environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ MEM_LAYOUT_ENV_SETTINGS \ "bootcmd_mfg=fastboot 0\0" \ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 30c1f5025b0..87b8c5d57ee 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -244,7 +244,7 @@ #include /* Default load addresses and names for the different payloads. */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \ "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \ "pxefile_addr_r=" __stringify(VEXPRESS_PXEFILE_ADDR) "\0" \ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index e8b6acf8b8f..705a941e360 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -145,7 +145,7 @@ func(DHCP, dhcp, na) #include -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x60100000\0" \ "fdt_addr_r=0x60000000\0" \ "bootargs=console=tty0 console=ttyAMA0,38400n8\0" \ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 14e6b2bac91..0e0b3a7b594 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -44,7 +44,7 @@ "rdaddr=0x84080000\0" \ "ramdisk_addr_r=0x84080000\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 1c1789ac3fb..0698ae1d1c6 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -45,7 +45,7 @@ /* Update the bootcommand according to our mapping for the VInCo platform */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "kernel_start=0x20000\0" \ "kernel_size=0x800000\0" \ "mmcblksize=0x200\0" \ diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 6923009d459..1e765439fab 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -20,7 +20,7 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0\0" \ "splashpos=m,m\0" \ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 188180da54e..0826e0bbe02 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -26,7 +26,7 @@ #define BOOT_SCR_STRING "source ${bootscriptaddr}\0" #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ CFG_DFU_ENV_SETTINGS \ "script=boot.scr\0" \ "bootscr_fitimage_name=bootscr\0" \ diff --git a/include/configs/x530.h b/include/configs/x530.h index 4cf41f52fd7..fddf00d3d13 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -47,7 +47,7 @@ #include /* Keep device tree and initrd in low memory so the kernel can access them */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index d71108dd318..65a1e63e00e 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -42,7 +42,7 @@ #define SPLASH_SETTINGS #endif -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ DISTRO_BOOTENV \ CONFIG_STD_DEVICES_SETTINGS \ SPLASH_SETTINGS \ diff --git a/include/configs/xea.h b/include/configs/xea.h index a3dc0c74ebb..04ca5aa12ac 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -27,7 +27,7 @@ /* Extra Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "bootmode=update\0" \ "bootpri=mmc_mmc\0" \ "bootsec=sf_swu\0" \ diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index 612436aeb48..bc268d25dc3 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -9,12 +9,12 @@ #include #endif -#define CONFIG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS #undef CFG_SYS_SDRAM_BASE -#undef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \ "pvblockboot=run loadimage;" \ "booti 0x90000000 - 0x88000000;\0" diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 6ee6786e054..e70acd93bac 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -126,8 +126,8 @@ #include /* Initial environment variables */ -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#ifndef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV #endif diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h index e1f95de3c34..23655a47522 100644 --- a/include/configs/xilinx_versal_mini.h +++ b/include/configs/xilinx_versal_mini.h @@ -10,11 +10,11 @@ #ifndef __CONFIG_VERSAL_MINI_H #define __CONFIG_VERSAL_MINI_H -#define CONFIG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS #include /* Undef unneeded configs */ -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS #endif /* __CONFIG_VERSAL_MINI_H */ diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h index 37bdb214629..424ead038e3 100644 --- a/include/configs/xilinx_versal_net.h +++ b/include/configs/xilinx_versal_net.h @@ -123,8 +123,8 @@ #include /* Initial environment variables */ -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#ifndef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV \ DFU_ALT_INFO diff --git a/include/configs/xilinx_versal_net_mini.h b/include/configs/xilinx_versal_net_mini.h index 1939832a848..50bacc39ac5 100644 --- a/include/configs/xilinx_versal_net_mini.h +++ b/include/configs/xilinx_versal_net_mini.h @@ -11,11 +11,11 @@ #ifndef __CONFIG_VERSAL_NET_MINI_H #define __CONFIG_VERSAL_NET_MINI_H -#define CONFIG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS #include /* Undef unneeded configs */ -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS #endif /* __CONFIG_VERSAL_NET_MINI_H */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index f71cd660993..011f0034c50 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -173,16 +173,16 @@ #include /* Initial environment variables */ -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#ifndef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ BOOTENV #endif /* SPL can't handle all huge variables - define just DFU */ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU) -#undef CONFIG_EXTRA_ENV_SETTINGS -# define CONFIG_EXTRA_ENV_SETTINGS \ +#undef CFG_EXTRA_ENV_SETTINGS +# define CFG_EXTRA_ENV_SETTINGS \ "dfu_alt_info_ram=uboot.bin ram 0x8000000 0x1000000;" \ "atf-uboot.ub ram 0x10000000 0x1000000;" \ "Image ram 0x80000 0x3f80000;" \ diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 1c0ab25c644..9af05456640 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -10,11 +10,11 @@ #ifndef __CONFIG_ZYNQMP_MINI_H #define __CONFIG_ZYNQMP_MINI_H -#define CONFIG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS #include /* Undef unneeded configs */ -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS #endif /* __CONFIG_ZYNQMP_MINI_H */ diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 3a7b7e03d6a..918aa3d7402 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_ZYNQMP_R5_H #define __CONFIG_ZYNQMP_R5_H -#define CONFIG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS /* Serial drivers */ /* The following table includes the supported baudrates */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 9f1f2d90dbe..0d72008bb46 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -34,7 +34,7 @@ #define CONFIG_FEC_ENET_DEV 0 #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc6\0" \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index d95178eb642..e372e903170 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -170,8 +170,8 @@ #endif /* CONFIG_SPL_BUILD */ /* Default environment */ -#ifndef CONFIG_EXTRA_ENV_SETTINGS -#define CONFIG_EXTRA_ENV_SETTINGS \ +#ifndef CFG_EXTRA_ENV_SETTINGS +#define CFG_EXTRA_ENV_SETTINGS \ "scriptaddr=0x20000\0" \ "script_size_f=0x40000\0" \ "fdt_addr_r=0x1f00000\0" \ diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index ac6e8c4ff86..a9bb5bb90ad 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -12,7 +12,7 @@ #include /* Undef unneeded configs */ -#undef CONFIG_EXTRA_ENV_SETTINGS +#undef CFG_EXTRA_ENV_SETTINGS #undef CFG_SYS_INIT_RAM_ADDR #undef CFG_SYS_INIT_RAM_SIZE diff --git a/include/env_default.h b/include/env_default.h index 3b7685ee26c..c0df39d62f9 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -118,8 +118,8 @@ const char default_environment[] = { /* This is created in the Makefile */ CONFIG_EXTRA_ENV_TEXT #endif -#ifdef CONFIG_EXTRA_ENV_SETTINGS - CONFIG_EXTRA_ENV_SETTINGS +#ifdef CFG_EXTRA_ENV_SETTINGS + CFG_EXTRA_ENV_SETTINGS #endif "\0" #else /* CONFIG_USE_DEFAULT_ENV_FILE */ -- cgit v1.2.3 From 4daffb58e6ccd36f9fdab8ef45cde8548226c4f6 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:52 -0500 Subject: global: Migrate CONFIG_FEC_ENET_DEV to CFG Perform a simple rename of CONFIG_FEC_ENET_DEV to CFG_FEC_ENET_DEV Signed-off-by: Tom Rini --- include/configs/capricorn-common.h | 2 +- include/configs/dart_6ul.h | 2 +- include/configs/liteboard.h | 2 +- include/configs/mx6ul_14x14_evk.h | 6 +++--- include/configs/mx6ullevk.h | 2 +- include/configs/npi_imx6ull.h | 2 +- include/configs/xpress.h | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index a8273a7fcd8..63afa6e1896 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -19,7 +19,7 @@ #endif /* CONFIG_SPL_BUILD */ /* ENET1 connects to base board and MUX with ESAI */ -#define CONFIG_FEC_ENET_DEV 1 +#define CFG_FEC_ENET_DEV 1 #define CONFIG_FEC_MXC_PHYADDR 0x0 /* EEPROM */ diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index 323703ac5c9..c2ed9c7c56a 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -18,7 +18,7 @@ #endif #ifdef CONFIG_CMD_NET -#define CONFIG_FEC_ENET_DEV 0 +#define CFG_FEC_ENET_DEV 0 #endif /* Environment settings */ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 938ab5ade9a..7200c69bd9e 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -100,7 +100,7 @@ #endif #ifdef CONFIG_CMD_NET -#define CONFIG_FEC_ENET_DEV 0 +#define CFG_FEC_ENET_DEV 0 #define CONFIG_FEC_MXC_PHYADDR 0x0 #endif diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 90c78846871..efc599f37a6 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -121,11 +121,11 @@ #endif #ifdef CONFIG_CMD_NET -#define CONFIG_FEC_ENET_DEV 1 +#define CFG_FEC_ENET_DEV 1 -#if (CONFIG_FEC_ENET_DEV == 0) +#if (CFG_FEC_ENET_DEV == 0) #define CONFIG_FEC_MXC_PHYADDR 0x2 -#elif (CONFIG_FEC_ENET_DEV == 1) +#elif (CFG_FEC_ENET_DEV == 1) #define CONFIG_FEC_MXC_PHYADDR 0x1 #endif #endif diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 4a27fd22902..58d1a744ae9 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -109,7 +109,7 @@ /* environment organization */ #ifdef CONFIG_CMD_NET -#define CONFIG_FEC_ENET_DEV 1 +#define CFG_FEC_ENET_DEV 1 #endif #endif diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index a12e34b6e60..979512c0a09 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -36,7 +36,7 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1 #endif -#define CONFIG_FEC_ENET_DEV 1 +#define CFG_FEC_ENET_DEV 1 #define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 0d72008bb46..13f0ee62b89 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -31,7 +31,7 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_FEC_ENET_DEV 0 +#define CFG_FEC_ENET_DEV 0 #define CONFIG_FEC_MXC_PHYADDR 0x0 #define CFG_EXTRA_ENV_SETTINGS \ -- cgit v1.2.3 From fa760c3240c1498f20eaf5f4a7d6007d7df0c61a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:53 -0500 Subject: global: Migrate CONFIG_FEC_MXC_PHYADDR to CFG Perform a simple rename of CONFIG_FEC_MXC_PHYADDR to CFG_FEC_MXC_PHYADDR Signed-off-by: Tom Rini --- include/configs/aristainetos2.h | 2 +- include/configs/capricorn-common.h | 2 +- include/configs/cgtqmx8.h | 2 +- include/configs/cl-som-imx7.h | 2 +- include/configs/cm_fx6.h | 2 +- include/configs/imx6_logic.h | 2 +- include/configs/imx6dl-mamoj.h | 2 +- include/configs/imx8mm-cl-iot-gate.h | 2 +- include/configs/imx8mm_evk.h | 2 +- include/configs/imx8mp_evk.h | 2 +- include/configs/imx8mp_icore_mx8mp.h | 2 +- include/configs/imx8mp_rsb3720.h | 2 +- include/configs/imx8mq_evk.h | 2 +- include/configs/imx8mq_phanbell.h | 2 +- include/configs/imx8ulp_evk.h | 2 +- include/configs/kontron_pitx_imx8m.h | 2 +- include/configs/liteboard.h | 2 +- include/configs/m53menlo.h | 2 +- include/configs/mccmon6.h | 2 +- include/configs/msc_sm2s_imx8mp.h | 2 +- include/configs/mx6sxsabreauto.h | 2 +- include/configs/mx6sxsabresd.h | 2 +- include/configs/mx6ul_14x14_evk.h | 4 ++-- include/configs/nitrogen6x.h | 2 +- include/configs/npi_imx6ull.h | 2 +- include/configs/pico-imx6.h | 2 +- include/configs/pico-imx6ul.h | 2 +- include/configs/pico-imx8mq.h | 2 +- include/configs/somlabs_visionsom_6ull.h | 2 +- include/configs/tqma6_mba6.h | 2 +- include/configs/tqma6_wru4.h | 2 +- include/configs/vf610twr.h | 2 +- include/configs/vining_2000.h | 2 +- include/configs/xpress.h | 2 +- 34 files changed, 35 insertions(+), 35 deletions(-) (limited to 'include') diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index a6e9d2bb65f..be1478ea8b6 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -26,7 +26,7 @@ /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 #ifdef CONFIG_IMX_HAB #define HAB_EXTRA_SETTINGS \ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 63afa6e1896..19c7fca03b2 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -20,7 +20,7 @@ /* ENET1 connects to base board and MUX with ESAI */ #define CFG_FEC_ENET_DEV 1 -#define CONFIG_FEC_MXC_PHYADDR 0x0 +#define CFG_FEC_MXC_PHYADDR 0x0 /* EEPROM */ #define EEPROM_I2C_BUS 0 /* I2C0 */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 263981860e8..caa1498acea 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -118,6 +118,6 @@ #define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */ /* Networking */ -#define CONFIG_FEC_MXC_PHYADDR -1 +#define CFG_FEC_MXC_PHYADDR -1 #endif /* __CGTQMX8_H */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 2d56d37f06f..cde7d3c891a 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -13,7 +13,7 @@ #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* Network */ -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 /* ENET1 */ #define IMX_FEC_BASE ENET_IPS_BASE_ADDR diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index c66cf721870..47b76c9371e 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -132,7 +132,7 @@ /* APBH DMA is required for NAND support */ /* Ethernet */ -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 0df61916b7d..121b34ae96d 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -19,7 +19,7 @@ /* Ethernet Configs */ -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 #define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index b6006c021d5..162b0b8a69b 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -40,7 +40,7 @@ /* MMC */ /* Ethernet */ -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CFG_FEC_MXC_PHYADDR 1 /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 00ce7fb62a9..7785bdc7cbe 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -136,7 +136,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index d28f3f1972b..c364e06dc45 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -61,6 +61,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 #endif diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index c6e3b105a8a..1fea5b72deb 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -13,7 +13,7 @@ #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CFG_FEC_MXC_PHYADDR 1 #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h index c3abcee40e8..bbbd91776fe 100644 --- a/include/configs/imx8mp_icore_mx8mp.h +++ b/include/configs/imx8mp_icore_mx8mp.h @@ -14,7 +14,7 @@ #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CFG_FEC_MXC_PHYADDR 1 #define DWC_NET_PHYADDR 1 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index ed4da0e69b5..38ae5f13702 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -39,7 +39,7 @@ /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 4 +#define CFG_FEC_MXC_PHYADDR 4 #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index c40448715f8..d9ce5d5d0f1 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -24,7 +24,7 @@ /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 #endif #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 8fed3e31964..eb7059f0648 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -21,7 +21,7 @@ /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 #endif #define CONFIG_MFG_ENV_SETTINGS \ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 30dd5af03b0..b7397f6038f 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -21,7 +21,7 @@ #if defined(CONFIG_FEC_MXC) #define PHY_ANEG_TIMEOUT 20000 -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CFG_FEC_MXC_PHYADDR 1 #endif #ifdef CONFIG_DISTRO_DEFAULTS diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index d909bbbbcfd..4dd51c7f1d7 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -25,7 +25,7 @@ /* ENET1 Config */ #if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 7200c69bd9e..0b8781d7bf3 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -102,7 +102,7 @@ #ifdef CONFIG_CMD_NET #define CFG_FEC_ENET_DEV 0 -#define CONFIG_FEC_MXC_PHYADDR 0x0 +#define CFG_FEC_MXC_PHYADDR 0x0 #endif #endif diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 0deb7672f9e..de6928d2973 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -54,7 +54,7 @@ * Ethernet on SOC (FEC) */ #ifdef CONFIG_CMD_NET -#define CONFIG_FEC_MXC_PHYADDR 0x0 +#define CFG_FEC_MXC_PHYADDR 0x0 #endif #define CFG_SYS_RTC_BUS_NUM 1 /* I2C2 */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 436f5f0059d..6cc49378fed 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -31,7 +31,7 @@ #define CFG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } /* Ethernet Configuration */ -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CFG_FEC_MXC_PHYADDR 1 #define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200 quiet\0" \ diff --git a/include/configs/msc_sm2s_imx8mp.h b/include/configs/msc_sm2s_imx8mp.h index ef2111cd20a..1cd0b3cf737 100644 --- a/include/configs/msc_sm2s_imx8mp.h +++ b/include/configs/msc_sm2s_imx8mp.h @@ -17,7 +17,7 @@ #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CFG_FEC_MXC_PHYADDR 1 #define PHY_ANEG_TIMEOUT 20000 #endif diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 9d8737c1942..3399cdd16fa 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -93,7 +93,7 @@ /* Network */ #define IMX_FEC_BASE ENET2_BASE_ADDR -#define CONFIG_FEC_MXC_PHYADDR 0x0 +#define CFG_FEC_MXC_PHYADDR 0x0 #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 8372f979dc8..c99d99abc17 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -115,7 +115,7 @@ /* Network */ -#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CFG_FEC_MXC_PHYADDR 0x1 #ifdef CONFIG_CMD_USB #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index efc599f37a6..5e3695ecc97 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -124,9 +124,9 @@ #define CFG_FEC_ENET_DEV 1 #if (CFG_FEC_ENET_DEV == 0) -#define CONFIG_FEC_MXC_PHYADDR 0x2 +#define CFG_FEC_MXC_PHYADDR 0x2 #elif (CFG_FEC_ENET_DEV == 1) -#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CFG_FEC_MXC_PHYADDR 0x1 #endif #endif diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 496a3164f40..aca15be64b1 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -18,7 +18,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_MXC_PHYADDR 6 +#define CFG_FEC_MXC_PHYADDR 6 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 979512c0a09..4b47e4fbb37 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -33,7 +33,7 @@ #define CONFIG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_NET -#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CFG_FEC_MXC_PHYADDR 0x1 #endif #define CFG_FEC_ENET_DEV 1 diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 66258a3ab73..e1f7b700319 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -98,6 +98,6 @@ /* Environment organization */ /* Ethernet Configuration */ -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CFG_FEC_MXC_PHYADDR 1 #endif /* __CONFIG_H * */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 45fc6126c87..1cb8fa63e72 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -15,7 +15,7 @@ /* Network support */ -#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CFG_FEC_MXC_PHYADDR 0x1 #define CONFIG_MXC_UART_BASE UART6_BASE_ADDR diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index ac25991703f..1d8709180c8 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -21,7 +21,7 @@ /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_FEC_MXC_PHYADDR 1 +#define CFG_FEC_MXC_PHYADDR 1 #endif /* Initial environment variables */ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index e1328056351..3418d4e2b55 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -66,7 +66,7 @@ #endif #ifdef CONFIG_CMD_NET -#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CFG_FEC_MXC_PHYADDR 0x1 #endif #endif diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h index 899c218727f..a5f14dc4267 100644 --- a/include/configs/tqma6_mba6.h +++ b/include/configs/tqma6_mba6.h @@ -9,7 +9,7 @@ #ifndef __CONFIG_TQMA6_MBA6_H #define __CONFIG_TQMA6_MBA6_H -#define CONFIG_FEC_MXC_PHYADDR 0x03 +#define CFG_FEC_MXC_PHYADDR 0x03 #define CONFIG_MXC_UART_BASE UART2_BASE #define CONSOLE_DEV "ttymxc1" diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 4d8839b6e60..34c9b6a2f97 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -7,7 +7,7 @@ #define __CONFIG_TQMA6_WRU4_H /* Ethernet */ -#define CONFIG_FEC_MXC_PHYADDR 0x01 +#define CFG_FEC_MXC_PHYADDR 0x01 /* UART */ #define CONFIG_MXC_UART_BASE UART4_BASE diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 0e0b3a7b594..d10b88f1575 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -21,7 +21,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_FEC_MXC_PHYADDR 0 +#define CFG_FEC_MXC_PHYADDR 0 /* I2C Configs */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 1a71b300fc5..c84353ebea6 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -34,7 +34,7 @@ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 /* Network */ -#define CONFIG_FEC_MXC_PHYADDR 0x0 +#define CFG_FEC_MXC_PHYADDR 0x0 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 13f0ee62b89..96996ac1f0f 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -32,7 +32,7 @@ #define CONFIG_MXC_USB_FLAGS 0 #define CFG_FEC_ENET_DEV 0 -#define CONFIG_FEC_MXC_PHYADDR 0x0 +#define CFG_FEC_MXC_PHYADDR 0x0 #define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ -- cgit v1.2.3 From 8938f59d545ab6e4ca0f265b008252822e747d30 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:54 -0500 Subject: global: Migrate CONFIG_FLASH_BR_PRELIM to CFG Perform a simple rename of CONFIG_FLASH_BR_PRELIM to CFG_FLASH_BR_PRELIM Signed-off-by: Tom Rini --- include/configs/p1_p2_rdb_pc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index a353c16f74b..f328eda416e 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -188,7 +188,7 @@ #define CFG_SYS_FLASH_BASE_PHYS CFG_SYS_FLASH_BASE #endif -#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) \ +#define CFG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) \ | BR_PS_16 | BR_V) #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7 -- cgit v1.2.3 From c20d7cc95c512c7a57720c1481619db7baa4a263 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:55 -0500 Subject: global: Migrate CONFIG_FLASH_OR_PRELIM to CFG Perform a simple rename of CONFIG_FLASH_OR_PRELIM to CFG_FLASH_OR_PRELIM Signed-off-by: Tom Rini --- include/configs/p1_p2_rdb_pc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index f328eda416e..41e7f53bd57 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -191,7 +191,7 @@ #define CFG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CFG_SYS_FLASH_BASE_PHYS) \ | BR_PS_16 | BR_V) -#define CONFIG_FLASH_OR_PRELIM 0xfc000ff7 +#define CFG_FLASH_OR_PRELIM 0xfc000ff7 #define CFG_SYS_FLASH_BANKS_LIST {CFG_SYS_FLASH_BASE_PHYS} -- cgit v1.2.3 From e3e4efc04f8f49feb9486f4b5a8a28c917568718 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:58 -0500 Subject: global: Migrate CONFIG_FSL_PMIC_BITLEN to CFG Perform a simple rename of CONFIG_FSL_PMIC_BITLEN to CFG_FSL_PMIC_BITLEN Signed-off-by: Tom Rini --- include/configs/mx51evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 8ab1ee79a79..d4cca8d516a 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -25,7 +25,7 @@ #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) -#define CONFIG_FSL_PMIC_BITLEN 32 +#define CFG_FSL_PMIC_BITLEN 32 /* * MMC Configs -- cgit v1.2.3 From eaaca4245e610e90afae88a70307535a48fefcb5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:03:59 -0500 Subject: global: Migrate CONFIG_FSL_PMIC_BUS to CFG Perform a simple rename of CONFIG_FSL_PMIC_BUS to CFG_FSL_PMIC_BUS Signed-off-by: Tom Rini --- include/configs/mx51evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index d4cca8d516a..1aaa76240de 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -21,7 +21,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* PMIC Controller */ -#define CONFIG_FSL_PMIC_BUS 0 +#define CFG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS 0 #define CONFIG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) -- cgit v1.2.3 From 3a8be4da79b0aafbfff1e1655ac89f9ab4cc4fcc Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:00 -0500 Subject: global: Migrate CONFIG_FSL_PMIC_CLK to CFG Perform a simple rename of CONFIG_FSL_PMIC_CLK to CFG_FSL_PMIC_CLK Signed-off-by: Tom Rini --- include/configs/mx51evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 1aaa76240de..ee0782ebfeb 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -23,7 +23,7 @@ /* PMIC Controller */ #define CFG_FSL_PMIC_BUS 0 #define CONFIG_FSL_PMIC_CS 0 -#define CONFIG_FSL_PMIC_CLK 2500000 +#define CFG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CFG_FSL_PMIC_BITLEN 32 -- cgit v1.2.3 From f200d710d83a78e6309d88c365fc33cd322015df Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:01 -0500 Subject: global: Migrate CONFIG_FSL_PMIC_CS to CFG Perform a simple rename of CONFIG_FSL_PMIC_CS to CFG_FSL_PMIC_CS Signed-off-by: Tom Rini --- include/configs/mx51evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index ee0782ebfeb..15bc4c706fd 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -22,7 +22,7 @@ /* PMIC Controller */ #define CFG_FSL_PMIC_BUS 0 -#define CONFIG_FSL_PMIC_CS 0 +#define CFG_FSL_PMIC_CS 0 #define CFG_FSL_PMIC_CLK 2500000 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CFG_FSL_PMIC_BITLEN 32 -- cgit v1.2.3 From 193d7ab1e3396bac10f00d4b9b2d8dab6158390c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:02 -0500 Subject: global: Migrate CONFIG_FSL_PMIC_MODE to CFG Perform a simple rename of CONFIG_FSL_PMIC_MODE to CFG_FSL_PMIC_MODE Signed-off-by: Tom Rini --- include/configs/mx51evk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 15bc4c706fd..740e357e00e 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -24,7 +24,7 @@ #define CFG_FSL_PMIC_BUS 0 #define CFG_FSL_PMIC_CS 0 #define CFG_FSL_PMIC_CLK 2500000 -#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) +#define CFG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) #define CFG_FSL_PMIC_BITLEN 32 /* -- cgit v1.2.3 From da495570030b07483af1d84eaba995b9bb43de3f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:03 -0500 Subject: global: Migrate CONFIG_FSL_SERDES1 to CFG Perform a simple rename of CONFIG_FSL_SERDES1 to CFG_FSL_SERDES1 Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index fad161597e6..9fc12dabb5c 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -149,7 +149,7 @@ #define CFG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) /* SERDES */ -#define CONFIG_FSL_SERDES1 0xe3000 +#define CFG_FSL_SERDES1 0xe3000 #define CONFIG_FSL_SERDES2 0xe3100 /* I2C */ -- cgit v1.2.3 From 315390e4674e8cff60becca9aa882570d780d8ec Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:04 -0500 Subject: global: Migrate CONFIG_FSL_SERDES2 to CFG Perform a simple rename of CONFIG_FSL_SERDES2 to CFG_FSL_SERDES2 Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 9fc12dabb5c..07c989d9890 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -150,7 +150,7 @@ /* SERDES */ #define CFG_FSL_SERDES1 0xe3000 -#define CONFIG_FSL_SERDES2 0xe3100 +#define CFG_FSL_SERDES2 0xe3100 /* I2C */ #define CFG_SYS_I2C_NOPROBES { {0, 0x51} } -- cgit v1.2.3 From e06b9b8d75f3f367db115fbcd902ee2d22ddcdba Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:08 -0500 Subject: global: Migrate CONFIG_I2C_MULTI_BUS to CFG Perform a simple rename of CONFIG_I2C_MULTI_BUS to CFG_I2C_MULTI_BUS Signed-off-by: Tom Rini --- include/configs/omap3_beagle.h | 2 +- include/configs/sniper.h | 2 +- include/configs/tqma6.h | 2 +- include/i2c.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index efeb7bf1007..af7cb3513f8 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -29,7 +29,7 @@ #endif /* CONFIG_MTD_RAW_NAND */ /* Enable Multi Bus support for I2C */ -#define CONFIG_I2C_MULTI_BUS +#define CFG_I2C_MULTI_BUS /* DSS Support */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index eaee8dd3739..45a3102aeee 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -38,7 +38,7 @@ * I2C */ -#define CONFIG_I2C_MULTI_BUS +#define CFG_I2C_MULTI_BUS /* * Input diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 14d7730f67b..cb5f7fc25af 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -28,7 +28,7 @@ #define TQMA6_SPI_FLASH_SECTOR_SIZE SZ_64K /* I2C Configs */ -#define CONFIG_I2C_MULTI_BUS +#define CFG_I2C_MULTI_BUS #if !defined(CONFIG_DM_PMIC) #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 diff --git a/include/i2c.h b/include/i2c.h index 51390f8fd84..3811b26c08e 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -930,7 +930,7 @@ unsigned int i2c_get_bus_speed(void); * only for backwardcompatibility, should go away if we switched * completely to new multibus support. */ -#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) +#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CFG_I2C_MULTI_BUS) # if !defined(CFG_SYS_MAX_I2C_BUS) # define CFG_SYS_MAX_I2C_BUS 2 # endif -- cgit v1.2.3 From 45ede979e86573e8b9362ceb1bfa9c397979ae1a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:09 -0500 Subject: global: Migrate CONFIG_I2C_MVTWSI_BASE0 to CFG Perform a simple rename of CONFIG_I2C_MVTWSI_BASE0 to CFG_I2C_MVTWSI_BASE0 Signed-off-by: Tom Rini --- include/configs/db-88f6720.h | 2 +- include/configs/db-88f6820-gp.h | 2 +- include/configs/db-mv784mp-gp.h | 2 +- include/configs/ds414.h | 2 +- include/configs/maxbcm.h | 2 +- include/configs/theadorable.h | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index ef9c457e102..54de2d0d833 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -17,7 +17,7 @@ */ /* I2C */ -#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* USB/EHCI configuration */ diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 6dbf582d733..2cbe4eb440b 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -11,7 +11,7 @@ */ /* I2C */ -#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* Environment in SPI NOR flash */ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index bf8b35102ad..5c6d7fa1b77 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -13,7 +13,7 @@ */ /* I2C */ -#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* USB/EHCI configuration */ diff --git a/include/configs/ds414.h b/include/configs/ds414.h index e69883ba73b..9446acba792 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -17,7 +17,7 @@ */ /* I2C */ -#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* * mv-common.h should be defined after CMD configs since it used them diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 5ad945b5589..413597e09b2 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -19,7 +19,7 @@ */ /* I2C */ -#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE /* SPI NOR flash default params, used by sf commands */ diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 9722b0db72a..412698d3fe9 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -25,7 +25,7 @@ */ /* I2C */ -#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE #define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE /* USB/EHCI configuration */ -- cgit v1.2.3 From 35661f86eb0e647953d6a588059d1387b5be5ae5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:10 -0500 Subject: global: Migrate CONFIG_I2C_MVTWSI_BASE1 to CFG Perform a simple rename of CONFIG_I2C_MVTWSI_BASE1 to CFG_I2C_MVTWSI_BASE1 Signed-off-by: Tom Rini --- include/configs/theadorable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 412698d3fe9..2ce92845f1c 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -26,7 +26,7 @@ /* I2C */ #define CFG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE -#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE +#define CFG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE /* USB/EHCI configuration */ -- cgit v1.2.3 From cdbf8459d017143dba1e798fecbd1046f98a7ece Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:11 -0500 Subject: global: Migrate CONFIG_ICS307_REFCLK_HZ to CFG Perform a simple rename of CONFIG_ICS307_REFCLK_HZ to CFG_ICS307_REFCLK_HZ Signed-off-by: Tom Rini --- include/configs/T208xQDS.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/T4240RDB.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 7f332cf2e3b..3b98d25aa47 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -13,7 +13,7 @@ #include -#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ +#define CFG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ /* High Level Configuration Options */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index d6dd9c07b73..60c2947bfc1 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -13,7 +13,7 @@ #include -#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ +#define CFG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ /* High Level Configuration Options */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 22cbf92efb8..01a9f43cbae 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -12,7 +12,7 @@ #include -#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ +#define CFG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #ifdef CONFIG_RAMBOOT_PBL #ifndef CONFIG_SDCARD -- cgit v1.2.3 From e6014294dd5930f3573b9b5883349b209df6f3e2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:12 -0500 Subject: global: Migrate CONFIG_IMX6_PWM_PER_CLK to CFG Perform a simple rename of CONFIG_IMX6_PWM_PER_CLK to CFG_IMX6_PWM_PER_CLK Signed-off-by: Tom Rini --- include/configs/vining_2000.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index c84353ebea6..cdd2eeef0ac 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -43,7 +43,7 @@ #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) #endif -#define CONFIG_IMX6_PWM_PER_CLK 66000000 +#define CFG_IMX6_PWM_PER_CLK 66000000 #ifdef CONFIG_ENV_IS_IN_MMC /* 0=user, 1=boot0, 2=boot1, * 4..7=general0..3. */ -- cgit v1.2.3 From 7b5f75cffabaa475add3c2f66d5ca0aa95588b5a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:13 -0500 Subject: global: Migrate CONFIG_IRAM_BASE to CFG Perform a simple rename of CONFIG_IRAM_BASE to CFG_IRAM_BASE Signed-off-by: Tom Rini --- include/configs/px30_common.h | 2 +- include/configs/rk3066_common.h | 2 +- include/configs/rk3128_common.h | 2 +- include/configs/rk3188_common.h | 2 +- include/configs/rk322x_common.h | 2 +- include/configs/rk3288_common.h | 2 +- include/configs/rk3308_common.h | 2 +- include/configs/rk3328_common.h | 2 +- include/configs/rk3368_common.h | 2 +- include/configs/rk3399_common.h | 2 +- include/configs/rk3568_common.h | 2 +- include/configs/rv1108_common.h | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 003686930a4..3f1595cdc95 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -9,7 +9,7 @@ #include "rockchip-common.h" /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */ -#define CONFIG_IRAM_BASE 0xff020000 +#define CFG_IRAM_BASE 0xff020000 #define GICD_BASE 0xff131000 #define GICC_BASE 0xff132000 diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index c4758e148ba..1a6d3678df3 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -9,7 +9,7 @@ #include #include "rockchip-common.h" -#define CONFIG_IRAM_BASE 0x10080000 +#define CFG_IRAM_BASE 0x10080000 #define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (1024UL << 20UL) diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 5b0ec370004..8aa17bfbd36 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -10,7 +10,7 @@ #define CFG_SYS_HZ_CLOCK 24000000 -#define CONFIG_IRAM_BASE 0x10080000 +#define CFG_IRAM_BASE 0x10080000 /* RAW SD card / eMMC locations. */ diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 58f491c2f32..ac9195672fb 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -9,7 +9,7 @@ #include #include "rockchip-common.h" -#define CONFIG_IRAM_BASE 0x10080000 +#define CFG_IRAM_BASE 0x10080000 /* spl size 32kb sram - 2kb bootrom */ diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index b95268df87c..fcaf9c52c4b 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -10,7 +10,7 @@ #define CFG_SYS_HZ_CLOCK 24000000 -#define CONFIG_IRAM_BASE 0x10080000 +#define CFG_IRAM_BASE 0x10080000 #define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (512UL << 20UL) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index d3b8a5150f6..5f29432be10 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -11,7 +11,7 @@ #define CFG_SYS_HZ_CLOCK 24000000 -#define CONFIG_IRAM_BASE 0xff700000 +#define CFG_IRAM_BASE 0xff700000 /* RAW SD card / eMMC locations. */ diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index bc03e113fef..55a0dfecb21 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -8,7 +8,7 @@ #include "rockchip-common.h" -#define CONFIG_IRAM_BASE 0xfff80000 +#define CFG_IRAM_BASE 0xfff80000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 85d2186f23e..fadcb93a5f7 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -8,7 +8,7 @@ #include "rockchip-common.h" -#define CONFIG_IRAM_BASE 0xff090000 +#define CFG_IRAM_BASE 0xff090000 /* FAT sd card locations. */ #define CFG_SYS_SDRAM_BASE 0 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 17636250510..9aa256b5959 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -14,7 +14,7 @@ #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 -#define CONFIG_IRAM_BASE 0xff8c0000 +#define CFG_IRAM_BASE 0xff8c0000 #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 2278b6215d4..95cb27c8951 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -8,7 +8,7 @@ #include "rockchip-common.h" -#define CONFIG_IRAM_BASE 0xff8c0000 +#define CFG_IRAM_BASE 0xff8c0000 /* FAT sd card locations. */ #define CFG_SYS_SDRAM_BASE 0 diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 750f16d0399..ae360105d50 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -8,7 +8,7 @@ #include "rockchip-common.h" -#define CONFIG_IRAM_BASE 0xfdcc0000 +#define CFG_IRAM_BASE 0xfdcc0000 #define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 6e17b23b624..63551b47e20 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -8,7 +8,7 @@ #include #include "rockchip-common.h" -#define CONFIG_IRAM_BASE 0x10080000 +#define CFG_IRAM_BASE 0x10080000 #define CFG_SYS_TIMER_RATE (24 * 1000 * 1000) /* TIMER1,initialized by ddr initialize code */ -- cgit v1.2.3 From 7201b769784fd474f7e24c3fd2048588c69fb285 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:14 -0500 Subject: global: Migrate CONFIG_IRAM_TOP to CFG Perform a simple rename of CONFIG_IRAM_TOP to CFG_IRAM_TOP Signed-off-by: Tom Rini --- include/configs/exynos5420-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 934a4ef9d1f..99ab1a174f7 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_EXYNOS5420_H #define __CONFIG_EXYNOS5420_H -#define CONFIG_IRAM_TOP 0x02074000 +#define CFG_IRAM_TOP 0x02074000 #define CONFIG_PHY_IRAM_BASE 0x02020000 -- cgit v1.2.3 From 21bd204239ff6cf62d6aca1f8ac4941702030e51 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:25 -0500 Subject: global: Migrate CONFIG_KSNET_CPSW_NUM_PORTS to CFG Perform a simple rename of CONFIG_KSNET_CPSW_NUM_PORTS to CFG_KSNET_CPSW_NUM_PORTS Signed-off-by: Tom Rini --- include/configs/k2e_evm.h | 2 +- include/configs/k2g_evm.h | 2 +- include/configs/k2hk_evm.h | 2 +- include/configs/k2l_evm.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h index 1283f450b32..929c9a26de1 100644 --- a/include/configs/k2e_evm.h +++ b/include/configs/k2e_evm.h @@ -37,6 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_CPSW_NUM_PORTS 9 +#define CFG_KSNET_CPSW_NUM_PORTS 9 #endif /* __CONFIG_K2E_EVM_H */ diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index fd3708ba81a..d0634a99f49 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -51,7 +51,7 @@ "name_fs=arago-base-tisdk-image-k2g-evm.cpio\0" /* Network */ -#define CONFIG_KSNET_CPSW_NUM_PORTS 2 +#define CFG_KSNET_CPSW_NUM_PORTS 2 #define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */ #define SPI_MTD_PARTS KEYSTONE_SPI1_MTD_PARTS diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index 36e3c59d1c5..05b4a3c204d 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -37,6 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_CPSW_NUM_PORTS 5 +#define CFG_KSNET_CPSW_NUM_PORTS 5 #endif /* __CONFIG_K2HK_EVM_H */ diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h index cb7b0367810..b1b839b5043 100644 --- a/include/configs/k2l_evm.h +++ b/include/configs/k2l_evm.h @@ -37,6 +37,6 @@ #define SPI_MTD_PARTS KEYSTONE_SPI0_MTD_PARTS /* Network */ -#define CONFIG_KSNET_CPSW_NUM_PORTS 5 +#define CFG_KSNET_CPSW_NUM_PORTS 5 #endif /* __CONFIG_K2L_EVM_H */ -- cgit v1.2.3 From f060d1885c4468f8a2723cd172c2144259b638f0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:26 -0500 Subject: global: Migrate CONFIG_KSNET_MAC_ID_BASE to CFG Perform a simple rename of CONFIG_KSNET_MAC_ID_BASE to CFG_KSNET_MAC_ID_BASE Signed-off-by: Tom Rini --- include/configs/ti_armv7_keystone2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 479ab46e4ed..e46d635ca03 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -47,7 +47,7 @@ #define CFG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) /* Keystone net */ -#define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR +#define CFG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR #define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE -- cgit v1.2.3 From d4e4bc898b7d14576f0c3b281d0c552954ee0dda Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:27 -0500 Subject: global: Migrate CONFIG_KSNET_NETCP_BASE to CFG Perform a simple rename of CONFIG_KSNET_NETCP_BASE to CFG_KSNET_NETCP_BASE Signed-off-by: Tom Rini --- include/configs/ti_armv7_keystone2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index e46d635ca03..c21fabc36ed 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -48,7 +48,7 @@ /* Keystone net */ #define CFG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR -#define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE +#define CFG_KSNET_NETCP_BASE KS2_NETCP_BASE #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE #define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES -- cgit v1.2.3 From d036606142a0164646ace465a20ba5e632de887e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:28 -0500 Subject: global: Migrate CONFIG_KSNET_SERDES_LANES_PER_SGMII to CFG Perform a simple rename of CONFIG_KSNET_SERDES_LANES_PER_SGMII to CFG_KSNET_SERDES_LANES_PER_SGMII Signed-off-by: Tom Rini --- include/configs/ti_armv7_keystone2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index c21fabc36ed..cb4ea394eb8 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -51,7 +51,7 @@ #define CFG_KSNET_NETCP_BASE KS2_NETCP_BASE #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE #define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE -#define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES +#define CFG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES /* EEPROM definitions */ -- cgit v1.2.3 From 81d239aede3ccab6ccdac70478d99d064baabdb0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:29 -0500 Subject: global: Migrate CONFIG_KSNET_SERDES_SGMII2_BASE to CFG Perform a simple rename of CONFIG_KSNET_SERDES_SGMII2_BASE to CFG_KSNET_SERDES_SGMII2_BASE Signed-off-by: Tom Rini --- include/configs/ti_armv7_keystone2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index cb4ea394eb8..1429faa534e 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -50,7 +50,7 @@ #define CFG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR #define CFG_KSNET_NETCP_BASE KS2_NETCP_BASE #define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE -#define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE +#define CFG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE #define CFG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES /* EEPROM definitions */ -- cgit v1.2.3 From e9f508cf019ae3056747ee2560b66267de6a6bea Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:30 -0500 Subject: global: Migrate CONFIG_KSNET_SERDES_SGMII_BASE to CFG Perform a simple rename of CONFIG_KSNET_SERDES_SGMII_BASE to CFG_KSNET_SERDES_SGMII_BASE Signed-off-by: Tom Rini --- include/configs/ti_armv7_keystone2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 1429faa534e..7142d30a599 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -49,7 +49,7 @@ /* Keystone net */ #define CFG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR #define CFG_KSNET_NETCP_BASE KS2_NETCP_BASE -#define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE +#define CFG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE #define CFG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE #define CFG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES -- cgit v1.2.3 From 1cd60b3cc021fb8bfa537a393151871515b512b2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:31 -0500 Subject: global: Migrate CONFIG_LEGACY_BOOTCMD_ENV to CFG Perform a simple rename of CONFIG_LEGACY_BOOTCMD_ENV to CFG_LEGACY_BOOTCMD_ENV Signed-off-by: Tom Rini --- include/configs/pic32mzdask.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 60c74732758..0ae4fc55a97 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -52,7 +52,7 @@ "fdt_addr_r=0x89d00000\0" \ "scriptaddr=0x88300000\0" \ -#define CONFIG_LEGACY_BOOTCMD_ENV \ +#define CFG_LEGACY_BOOTCMD_ENV \ "legacy_bootcmd= " \ "if load mmc 0 ${scriptaddr} uEnv.txt; then " \ "env import -tr ${scriptaddr} ${filesize}; " \ @@ -71,7 +71,7 @@ #define CFG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ - CONFIG_LEGACY_BOOTCMD_ENV \ + CFG_LEGACY_BOOTCMD_ENV \ BOOTENV #endif /* __PIC32MZDASK_CONFIG_H */ -- cgit v1.2.3 From 77db07ce1c8ca359c500f66d38e0d9d572d214a9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:32 -0500 Subject: global: Migrate CONFIG_LOWPOWER_ADDR to CFG Perform a simple rename of CONFIG_LOWPOWER_ADDR to CFG_LOWPOWER_ADDR Signed-off-by: Tom Rini --- include/configs/exynos5420-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 99ab1a174f7..164cdb0fa15 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -16,6 +16,6 @@ * Low Power settings */ #define CONFIG_LOWPOWER_FLAG 0x02020028 -#define CONFIG_LOWPOWER_ADDR 0x0202002C +#define CFG_LOWPOWER_ADDR 0x0202002C #endif /* __CONFIG_EXYNOS5420_H */ -- cgit v1.2.3 From 8000ac874c727004958d0fdec250681ba6b236f9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:33 -0500 Subject: global: Migrate CONFIG_LOWPOWER_FLAG to CFG Perform a simple rename of CONFIG_LOWPOWER_FLAG to CFG_LOWPOWER_FLAG Signed-off-by: Tom Rini --- include/configs/exynos5420-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 164cdb0fa15..bd43efa553c 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -15,7 +15,7 @@ /* * Low Power settings */ -#define CONFIG_LOWPOWER_FLAG 0x02020028 +#define CFG_LOWPOWER_FLAG 0x02020028 #define CFG_LOWPOWER_ADDR 0x0202002C #endif /* __CONFIG_EXYNOS5420_H */ -- cgit v1.2.3 From dff9de5c2c1eb0a4b62f1ea67dee3f0db117bc1a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:34 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY to CFG_LPC32XX_NAND_MLC_BUSY_DELAY Signed-off-by: Tom Rini --- include/configs/work_92105.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 010da1531ff..a1ecd8ceef0 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -28,7 +28,7 @@ */ #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 -#define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 +#define CFG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 #define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818 #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000 #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545 -- cgit v1.2.3 From ea93286e5f068b85dd3a0d05bef534ad86d3d16f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:35 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_MLC_NAND_TA to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_NAND_TA to CFG_LPC32XX_NAND_MLC_NAND_TA Signed-off-by: Tom Rini --- include/configs/work_92105.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index a1ecd8ceef0..d345382545e 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -29,7 +29,7 @@ #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 #define CFG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 -#define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818 +#define CFG_LPC32XX_NAND_MLC_NAND_TA 18181818 #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000 #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545 #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000 -- cgit v1.2.3 From ab8c6e370c6407a8b6117d933cc4ece5ad5383be Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:36 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_MLC_RD_HIGH to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_RD_HIGH to CFG_LPC32XX_NAND_MLC_RD_HIGH Signed-off-by: Tom Rini --- include/configs/work_92105.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index d345382545e..3959051a4ca 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -30,7 +30,7 @@ #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 #define CFG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 #define CFG_LPC32XX_NAND_MLC_NAND_TA 18181818 -#define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000 +#define CFG_LPC32XX_NAND_MLC_RD_HIGH 31250000 #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545 #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000 #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333 -- cgit v1.2.3 From 3c35c036add440f73cfb24cbfab7098e949c2167 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:37 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_MLC_RD_LOW to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_RD_LOW to CFG_LPC32XX_NAND_MLC_RD_LOW Signed-off-by: Tom Rini --- include/configs/work_92105.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 3959051a4ca..1a4617c5c02 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -31,7 +31,7 @@ #define CFG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 #define CFG_LPC32XX_NAND_MLC_NAND_TA 18181818 #define CFG_LPC32XX_NAND_MLC_RD_HIGH 31250000 -#define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545 +#define CFG_LPC32XX_NAND_MLC_RD_LOW 45454545 #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000 #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333 -- cgit v1.2.3 From 259ec2ce11f47a1a33675e258d81bbe72429945e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:38 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY to CFG_LPC32XX_NAND_MLC_TCEA_DELAY Signed-off-by: Tom Rini --- include/configs/work_92105.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 1a4617c5c02..34af515037f 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -27,7 +27,7 @@ * NAND chip timings for FIXME: which one? */ -#define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 +#define CFG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 #define CFG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 #define CFG_LPC32XX_NAND_MLC_NAND_TA 18181818 #define CFG_LPC32XX_NAND_MLC_RD_HIGH 31250000 -- cgit v1.2.3 From 196690dfdadeb99ee7903e121bce10908b9ec6fb Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:39 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_MLC_WR_HIGH to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_WR_HIGH to CFG_LPC32XX_NAND_MLC_WR_HIGH Signed-off-by: Tom Rini --- include/configs/work_92105.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 34af515037f..c67a0bb6e1a 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -32,7 +32,7 @@ #define CFG_LPC32XX_NAND_MLC_NAND_TA 18181818 #define CFG_LPC32XX_NAND_MLC_RD_HIGH 31250000 #define CFG_LPC32XX_NAND_MLC_RD_LOW 45454545 -#define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000 +#define CFG_LPC32XX_NAND_MLC_WR_HIGH 40000000 #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333 /* -- cgit v1.2.3 From 39fa17718f4ccdc252ca96a56186931b4fd6f3fb Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:40 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_MLC_WR_LOW to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_MLC_WR_LOW to CFG_LPC32XX_NAND_MLC_WR_LOW Signed-off-by: Tom Rini --- include/configs/work_92105.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index c67a0bb6e1a..f1a7853a80e 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -33,7 +33,7 @@ #define CFG_LPC32XX_NAND_MLC_RD_HIGH 31250000 #define CFG_LPC32XX_NAND_MLC_RD_LOW 45454545 #define CFG_LPC32XX_NAND_MLC_WR_HIGH 40000000 -#define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333 +#define CFG_LPC32XX_NAND_MLC_WR_LOW 83333333 /* * NAND -- cgit v1.2.3 From c102eb5ca7281dd3b449fd9eaf50e8f8c6b205fd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:41 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_SLC_RDR_CLKS to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RDR_CLKS to CFG_LPC32XX_NAND_SLC_RDR_CLKS Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index ab10101f20a..e1789684135 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -45,7 +45,7 @@ #define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666 #define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000 #define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 -#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14 +#define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666 #define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000 #define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000 -- cgit v1.2.3 From bba52ab080f5446fabaf3c98772a2254064a7adf Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:42 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_SLC_RHOLD to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RHOLD to CFG_LPC32XX_NAND_SLC_RHOLD Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index e1789684135..0b815ded732 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -47,7 +47,7 @@ #define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 #define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666 -#define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000 +#define CFG_LPC32XX_NAND_SLC_RHOLD 200000000 #define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000 /* -- cgit v1.2.3 From 416ef8c7c6c7fb371a3d0acdafbc4c851a229076 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:43 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_SLC_RSETUP to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RSETUP to CFG_LPC32XX_NAND_SLC_RSETUP Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 0b815ded732..72cf031e05d 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -48,7 +48,7 @@ #define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14 #define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666 #define CFG_LPC32XX_NAND_SLC_RHOLD 200000000 -#define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000 +#define CFG_LPC32XX_NAND_SLC_RSETUP 50000000 /* * USB -- cgit v1.2.3 From fa0e72a34eeb6b82faa4ac0156fd3e5a21750329 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:44 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_SLC_RWIDTH to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RWIDTH to CFG_LPC32XX_NAND_SLC_RWIDTH Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 72cf031e05d..5ba8c1bb20e 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -46,7 +46,7 @@ #define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000 #define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 #define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14 -#define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666 +#define CFG_LPC32XX_NAND_SLC_RWIDTH 66666666 #define CFG_LPC32XX_NAND_SLC_RHOLD 200000000 #define CFG_LPC32XX_NAND_SLC_RSETUP 50000000 -- cgit v1.2.3 From fa32dc7d15c576e7bf1a04c44ac993c05e06a081 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:45 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_SLC_WDR_CLKS to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WDR_CLKS to CFG_LPC32XX_NAND_SLC_WDR_CLKS Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 5ba8c1bb20e..dc16ed84c52 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -41,7 +41,7 @@ /* * NAND chip timings */ -#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14 +#define CFG_LPC32XX_NAND_SLC_WDR_CLKS 14 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666 #define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000 #define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 -- cgit v1.2.3 From b0c548273e1e2d20b9b200faae964a0aff348c21 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:46 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_SLC_WHOLD to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WHOLD to CFG_LPC32XX_NAND_SLC_WHOLD Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index dc16ed84c52..24312c848e2 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -43,7 +43,7 @@ */ #define CFG_LPC32XX_NAND_SLC_WDR_CLKS 14 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666 -#define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000 +#define CFG_LPC32XX_NAND_SLC_WHOLD 200000000 #define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 #define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14 #define CFG_LPC32XX_NAND_SLC_RWIDTH 66666666 -- cgit v1.2.3 From 308ed808399b72de9bd947c26426d6a6f53ab28d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:47 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_SLC_WSETUP to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WSETUP to CFG_LPC32XX_NAND_SLC_WSETUP Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 24312c848e2..5719e422da9 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -44,7 +44,7 @@ #define CFG_LPC32XX_NAND_SLC_WDR_CLKS 14 #define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666 #define CFG_LPC32XX_NAND_SLC_WHOLD 200000000 -#define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000 +#define CFG_LPC32XX_NAND_SLC_WSETUP 50000000 #define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14 #define CFG_LPC32XX_NAND_SLC_RWIDTH 66666666 #define CFG_LPC32XX_NAND_SLC_RHOLD 200000000 -- cgit v1.2.3 From bd79d3d616dea43b9d6de6f352144709a62a4090 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:48 -0500 Subject: global: Migrate CONFIG_LPC32XX_NAND_SLC_WWIDTH to CFG Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WWIDTH to CFG_LPC32XX_NAND_SLC_WWIDTH Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 5719e422da9..9cfee381d4a 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -42,7 +42,7 @@ * NAND chip timings */ #define CFG_LPC32XX_NAND_SLC_WDR_CLKS 14 -#define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666 +#define CFG_LPC32XX_NAND_SLC_WWIDTH 66666666 #define CFG_LPC32XX_NAND_SLC_WHOLD 200000000 #define CFG_LPC32XX_NAND_SLC_WSETUP 50000000 #define CFG_LPC32XX_NAND_SLC_RDR_CLKS 14 -- cgit v1.2.3 From dd5b58c49129016a02e41d6fda2213888d13c115 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:49 -0500 Subject: global: Migrate CONFIG_MALLOC_F_ADDR to CFG Perform a simple rename of CONFIG_MALLOC_F_ADDR to CFG_MALLOC_F_ADDR Signed-off-by: Tom Rini --- include/configs/capricorn-common.h | 2 +- include/configs/cgtqmx8.h | 2 +- include/configs/imx8mm-cl-iot-gate.h | 2 +- include/configs/imx8mm_beacon.h | 2 +- include/configs/imx8mm_data_modul_edm_sbc.h | 2 +- include/configs/imx8mm_evk.h | 2 +- include/configs/imx8mm_icore_mx8mm.h | 2 +- include/configs/imx8mm_venice.h | 2 +- include/configs/imx8mp_rsb3720.h | 2 +- include/configs/imx8mq_cm.h | 2 +- include/configs/imx8mq_evk.h | 2 +- include/configs/imx8mq_phanbell.h | 2 +- include/configs/imx8qm_mek.h | 2 +- include/configs/imx8qxp_mek.h | 2 +- include/configs/imx8ulp_evk.h | 2 +- include/configs/imx93_evk.h | 2 +- include/configs/kontron-sl-mx8mm.h | 2 +- include/configs/kontron_pitx_imx8m.h | 2 +- include/configs/kontron_sl28.h | 2 +- include/configs/phycore_imx8mm.h | 2 +- include/configs/pico-imx8mq.h | 2 +- include/configs/sandbox.h | 2 +- include/configs/verdin-imx8mm.h | 2 +- include/configs/verdin-imx8mp.h | 2 +- 24 files changed, 24 insertions(+), 24 deletions(-) (limited to 'include') diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 19c7fca03b2..9e7322cdb93 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -14,7 +14,7 @@ /* SPL config */ #ifdef CONFIG_SPL_BUILD -#define CONFIG_MALLOC_F_ADDR 0x00120000 +#define CFG_MALLOC_F_ADDR 0x00120000 #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index caa1498acea..a6332597384 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -13,7 +13,7 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 -#define CONFIG_MALLOC_F_ADDR 0x00120000 +#define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 7785bdc7cbe..64cdc401d03 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -16,7 +16,7 @@ #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x912000 +#define CFG_MALLOC_F_ADDR 0x912000 /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index ee524f0e63f..d85ae21e231 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -14,7 +14,7 @@ #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 +#define CFG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 44d74bb1a78..0723d27ab70 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -11,7 +11,7 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_MALLOC_F_ADDR 0x930000 +#define CFG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index c364e06dc45..d5642b96495 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -24,7 +24,7 @@ #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 +#define CFG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index e718daa07c3..2158b0af74f 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -15,7 +15,7 @@ #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -# define CONFIG_MALLOC_F_ADDR 0x930000 +# define CFG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ #endif /* CONFIG_SPL_BUILD */ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index c490e3829f9..5579a05d165 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -14,7 +14,7 @@ #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 +#define CFG_MALLOC_F_ADDR 0x930000 #endif /* Enable Distro Boot */ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 38ae5f13702..e4e24b522fd 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -24,7 +24,7 @@ 0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9) #ifdef CONFIG_SPL_BUILD -#define CONFIG_MALLOC_F_ADDR 0x184000 /* malloc f used before \ +#define CFG_MALLOC_F_ADDR 0x184000 /* malloc f used before \ * GD_FLG_FULL_MALLOC_INIT \ * set \ */ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index f6f356d27ba..f7ae1b47d06 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -14,7 +14,7 @@ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x182000 +#define CFG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index d9ce5d5d0f1..4b46321e851 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -15,7 +15,7 @@ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x182000 +#define CFG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index eb7059f0648..5158f2cc605 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -14,7 +14,7 @@ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x182000 +#define CFG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 7772e71013e..a25efbb16bd 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -12,7 +12,7 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 -#define CONFIG_MALLOC_F_ADDR 0x00120000 +#define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 669da591fa2..4f55ae49403 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -12,7 +12,7 @@ #ifdef CONFIG_SPL_BUILD #define CONFIG_SERIAL_LPUART_BASE 0x5a060000 -#define CONFIG_MALLOC_F_ADDR 0x00120000 +#define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index b7397f6038f..d77510e1685 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -12,7 +12,7 @@ #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_MALLOC_F_ADDR 0x22040000 +#define CFG_MALLOC_F_ADDR 0x22040000 #endif diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index 5cd6492dd50..7b7bef3ca75 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -14,7 +14,7 @@ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_MALLOC_F_ADDR 0x204D0000 +#define CFG_MALLOC_F_ADDR 0x204D0000 #endif #ifdef CONFIG_DISTRO_DEFAULTS diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index e4d6a8a1540..d80238bd02f 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -46,7 +46,7 @@ #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 +#define CFG_MALLOC_F_ADDR 0x930000 #endif #define CFG_EXTRA_ENV_SETTINGS BOOTENV diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 4dd51c7f1d7..5a3c9f76a43 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -16,7 +16,7 @@ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x182000 +#define CFG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 0d293f316b7..940bfd2b336 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -28,7 +28,7 @@ /* generic timer */ /* early heap for SPL DM */ -#define CONFIG_MALLOC_F_ADDR CFG_SYS_FSL_OCRAM_BASE +#define CFG_MALLOC_F_ADDR CFG_SYS_FSL_OCRAM_BASE /* serial port */ #define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2) diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index 9160c78c046..ce6dc87c69c 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -16,7 +16,7 @@ #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 +#define CFG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 1d8709180c8..37ade717ae9 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -14,7 +14,7 @@ #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x182000 +#define CFG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 8d9af7f088d..4e5653dc886 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_MALLOC_F_ADDR 0x0010000 +#define CFG_MALLOC_F_ADDR 0x0010000 /* Size of our emulated memory */ #define SB_CONCAT(x, y) x ## y diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 7f3fa795afd..27d7efb883d 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -14,7 +14,7 @@ #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 +#define CFG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ #endif diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index 2cb076cabac..942081ab84d 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -16,7 +16,7 @@ /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x184000 +#define CFG_MALLOC_F_ADDR 0x184000 /* For RAW image gives a error info not panic */ #endif /* CONFIG_SPL_BUILD */ -- cgit v1.2.3 From 1d457dbb9151f50176f7548d00ed37e13dc81e00 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:50 -0500 Subject: global: Migrate CONFIG_MAX_MEM_MAPPED to CFG Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED Signed-off-by: Tom Rini --- include/configs/dra7xx_evm.h | 2 +- include/configs/mt7621.h | 2 +- include/configs/rcar-gen3-common.h | 2 +- include/configs/synquacer.h | 2 +- include/configs/xtfpga.h | 8 ++++---- 5 files changed, 8 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index f8afcc7826e..ef1d5a11260 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -13,7 +13,7 @@ #include -#define CONFIG_MAX_MEM_MAPPED 0x80000000 +#define CFG_MAX_MEM_MAPPED 0x80000000 #ifndef CONFIG_QSPI_BOOT /* MMC ENV related defines */ diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index b6e680bcc78..a9574940d42 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -10,7 +10,7 @@ #define CFG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_MAX_MEM_MAPPED 0x1c000000 +#define CFG_MAX_MEM_MAPPED 0x1c000000 #define CFG_SYS_INIT_SP_OFFSET 0x800000 diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 8e0837a3027..213caa75238 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -28,7 +28,7 @@ #define DRAM_RSV_SIZE 0x08000000 #define CFG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) #define CFG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE) -#define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) +#define CFG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) /* ENV setting */ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index a62d1d32547..e65d6238163 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -14,7 +14,7 @@ #define CFG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */ #define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */ -#define CONFIG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE +#define CFG_MAX_MEM_MAPPED PHYS_SDRAM_SIZE #define SQ_DRAMINFO_BASE (0x2e00ffc0) /* DRAM info from TF-A */ diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 83a0539d8f2..9655b666eda 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -27,7 +27,7 @@ #else #define CFG_SYS_MEMORY_BASE 0x60000000 #define CFG_SYS_IO_BASE 0x90000000 -#define CONFIG_MAX_MEM_MAPPED 0x10000000 +#define CFG_MAX_MEM_MAPPED 0x10000000 #endif /* Onboard RAM sizes: @@ -53,10 +53,10 @@ /* Memory test is destructive so default must not overlap vectors or U-Boot*/ -#if defined(CONFIG_MAX_MEM_MAPPED) && \ - CONFIG_MAX_MEM_MAPPED < CFG_SYS_SDRAM_SIZE +#if defined(CFG_MAX_MEM_MAPPED) && \ + CFG_MAX_MEM_MAPPED < CFG_SYS_SDRAM_SIZE #define XTENSA_SYS_TEXT_ADDR \ - (MEMADDR(CONFIG_MAX_MEM_MAPPED) - CONFIG_SYS_MONITOR_LEN) + (MEMADDR(CFG_MAX_MEM_MAPPED) - CONFIG_SYS_MONITOR_LEN) #else #define XTENSA_SYS_TEXT_ADDR \ (MEMADDR(CFG_SYS_SDRAM_SIZE) - CONFIG_SYS_MONITOR_LEN) -- cgit v1.2.3 From 8a897c4f971ec7ecfd114c5118ccd22e4273a6be Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:51 -0500 Subject: global: Migrate CONFIG_MAX_RAM_BANK_SIZE to CFG Perform a simple rename of CONFIG_MAX_RAM_BANK_SIZE to CFG_MAX_RAM_BANK_SIZE Signed-off-by: Tom Rini --- include/configs/am43xx_evm.h | 2 +- include/configs/bur_am335x_common.h | 2 +- include/configs/cm_t43.h | 2 +- include/configs/da850evm.h | 2 +- include/configs/draco.h | 2 +- include/configs/etamin.h | 2 +- include/configs/legoev3.h | 2 +- include/configs/omapl138_lcdk.h | 2 +- include/configs/pxm2.h | 2 +- include/configs/rastaban.h | 2 +- include/configs/rut.h | 2 +- include/configs/thuban.h | 2 +- include/configs/ti816x_evm.h | 2 +- include/configs/ti_am335x_common.h | 2 +- include/configs/ti_armv7_keystone2.h | 2 +- 15 files changed, 15 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 3a6ffd9de0b..f43e00e8a2b 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_AM43XX_EVM_H #define __CONFIG_AM43XX_EVM_H -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ #define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 3e0b4250788..ab57e14392d 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -19,7 +19,7 @@ #endif /* CONFIG_DM */ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ /* Timer information */ #define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index aa17c9cbe2c..743c8c86922 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_CM_T43_H #define __CONFIG_CM_T43_H -#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */ +#define CFG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */ #define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index cfc8330e35a..736af88a024 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -31,7 +31,7 @@ */ #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ +#define CFG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ /* memtest start addr */ /* memtest will be run on 16MB */ diff --git a/include/configs/draco.h b/include/configs/draco.h index b56ba9132af..4c67174572f 100644 --- a/include/configs/draco.h +++ b/include/configs/draco.h @@ -25,7 +25,7 @@ "led1=64,0,1\0" /* Physical Memory Map */ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ /* Default env settings */ #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/etamin.h b/include/configs/etamin.h index 8d8e717b38d..d07b4e95364 100644 --- a/include/configs/etamin.h +++ b/include/configs/etamin.h @@ -67,7 +67,7 @@ "led5=63,0,1\0" /* Physical Memory Map */ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 687ac89b857..ff966586ba6 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -27,7 +27,7 @@ */ #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ +#define CFG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ /* memtest start addr */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 5e71ebcba85..af0093511a0 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -26,7 +26,7 @@ */ #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ #define PHYS_SDRAM_1_SIZE (128 << 20) /* SDRAM size 128MB */ -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ +#define CFG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ /* memtest start addr */ diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 10eaeb49de6..b701e52076d 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -23,7 +23,7 @@ "led0=117,0,1\0" \ /* Physical Memory Map */ -#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 1GB */ +#define CFG_MAX_RAM_BANK_SIZE (512 << 20) /* 1GB */ /* Use common default */ diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h index 777df4c1125..2efb4d23cdd 100644 --- a/include/configs/rastaban.h +++ b/include/configs/rastaban.h @@ -32,7 +32,7 @@ "led5=63,0,1\0" /* Physical Memory Map */ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 diff --git a/include/configs/rut.h b/include/configs/rut.h index 99799f8494e..4002bc4b6c8 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -19,7 +19,7 @@ #define DDR_PLL_FREQ 303 /* Physical Memory Map */ -#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */ +#define CFG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */ /* Watchdog */ #define WATCHDOG_TRIGGER_GPIO 14 diff --git a/include/configs/thuban.h b/include/configs/thuban.h index 1753fa410d1..a5913e1e7d2 100644 --- a/include/configs/thuban.h +++ b/include/configs/thuban.h @@ -25,7 +25,7 @@ "led1=64,0,1\0" /* Physical Memory Map */ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ #define EEPROM_ADDR_DDR3 0x90 #define EEPROM_ADDR_CHIP 0x120 diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 2d9d2fd66e9..ac6d46f917b 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -19,7 +19,7 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) -#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */ +#define CFG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */ #define CFG_SYS_SDRAM_BASE 0x80000000 /** diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index ed17b429209..20f8643771d 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -11,7 +11,7 @@ #ifndef __CONFIG_TI_AM335X_COMMON_H__ #define __CONFIG_TI_AM335X_COMMON_H__ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ +#define CFG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ #define CFG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #include diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 7142d30a599..a47f0902a26 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -15,7 +15,7 @@ /* Memory Configuration */ #define CFG_SYS_LPAE_SDRAM_BASE 0x800000000 -#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ +#define CFG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */ #ifdef CONFIG_SYS_MALLOC_F_LEN #define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN -- cgit v1.2.3 From 8f52920a4a36d905725a6945694ab0d2df6fac59 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:52 -0500 Subject: global: Migrate CONFIG_MFG_ENV_SETTINGS to CFG Perform a simple rename of CONFIG_MFG_ENV_SETTINGS to CFG_MFG_ENV_SETTINGS Signed-off-by: Tom Rini --- include/configs/capricorn-common.h | 4 ++-- include/configs/cgtqmx8.h | 4 ++-- include/configs/colibri-imx8x.h | 4 ++-- include/configs/imx8mq_phanbell.h | 4 ++-- include/configs/imx8qm_rom7720.h | 4 ++-- include/configs/mx7dsabresd.h | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 9e7322cdb93..9dcacad2fc0 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -60,7 +60,7 @@ "${loadaddr} ${m4_0_image}\0" \ "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \ -#define CONFIG_MFG_ENV_SETTINGS \ +#define CFG_MFG_ENV_SETTINGS \ MFG_ENV_SETTINGS_DEFAULT \ "initrd_addr=0x83100000\0" \ "initrd_high=0xffffffffffffffff\0" \ @@ -68,7 +68,7 @@ /* Initial environment variables */ #define CFG_EXTRA_ENV_SETTINGS \ - CONFIG_MFG_ENV_SETTINGS \ + CFG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ AHAB_ENV \ ENV_COMMON \ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index a6332597384..91454df1972 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -42,7 +42,7 @@ #define FEC0_RESET IMX_GPIO_NR(2, 5) #define FEC0_PDOMAIN "conn_enet0" -#define CONFIG_MFG_ENV_SETTINGS \ +#define CFG_MFG_ENV_SETTINGS \ "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ "rdinit=/linuxrc " \ "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ @@ -56,7 +56,7 @@ /* Initial environment variables */ #define CFG_EXTRA_ENV_SETTINGS \ - CONFIG_MFG_ENV_SETTINGS \ + CFG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ "script=boot.scr\0" \ "image=Image\0" \ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 13bc4e7e682..2de116c59da 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -43,7 +43,7 @@ #undef BOOTENV_RUN_NET_USB_START #define BOOTENV_RUN_NET_USB_START "" -#define CONFIG_MFG_ENV_SETTINGS \ +#define CFG_MFG_ENV_SETTINGS \ "mfgtool_args=setenv bootargs ${consoleargs} " \ "rdinit=/linuxrc g_mass_storage.stall=0 " \ "g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \ @@ -59,7 +59,7 @@ #define CFG_EXTRA_ENV_SETTINGS \ AHAB_ENV \ BOOTENV \ - CONFIG_MFG_ENV_SETTINGS \ + CFG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ MEM_LAYOUT_ENV_SETTINGS \ "boot_file=Image\0" \ diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 5158f2cc605..6d0c4531118 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -24,13 +24,13 @@ #define CFG_FEC_MXC_PHYADDR 0 #endif -#define CONFIG_MFG_ENV_SETTINGS \ +#define CFG_MFG_ENV_SETTINGS \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffff\0" \ /* Initial environment variables */ #define CFG_EXTRA_ENV_SETTINGS \ - CONFIG_MFG_ENV_SETTINGS \ + CFG_MFG_ENV_SETTINGS \ "script=boot.scr\0" \ "image=Image\0" \ "console=ttymxc0,115200\0" \ diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 5692e3d0000..df2cb8d9ced 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -33,7 +33,7 @@ #define MFG_NAND_PARTITION "" #endif -#define CONFIG_MFG_ENV_SETTINGS \ +#define CFG_MFG_ENV_SETTINGS \ "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ "rdinit=/linuxrc " \ "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ @@ -48,7 +48,7 @@ /* Initial environment variables */ #define CFG_EXTRA_ENV_SETTINGS \ - CONFIG_MFG_ENV_SETTINGS \ + CFG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ "script=boot.scr\0" \ "image=Image\0" \ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index e56083f8e61..9c938f04e93 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -32,7 +32,7 @@ #define UPDATE_M4_ENV "" #endif -#define CONFIG_MFG_ENV_SETTINGS \ +#define CFG_MFG_ENV_SETTINGS \ "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ "rdinit=/linuxrc " \ "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ @@ -52,7 +52,7 @@ #define CFG_EXTRA_ENV_SETTINGS \ UPDATE_M4_ENV \ - CONFIG_MFG_ENV_SETTINGS \ + CFG_MFG_ENV_SETTINGS \ CFG_DFU_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ -- cgit v1.2.3 From 55eef1d62958592b363240813b866216797d8141 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:53 -0500 Subject: global: Migrate CONFIG_MXC_NAND_IP_REGS_BASE to CFG Perform a simple rename of CONFIG_MXC_NAND_IP_REGS_BASE to CFG_MXC_NAND_IP_REGS_BASE Signed-off-by: Tom Rini --- include/configs/m53menlo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index de6928d2973..3ac67b0f489 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -46,7 +46,7 @@ #ifdef CONFIG_CMD_NAND #define CFG_SYS_NAND_BASE NFC_BASE_ADDR_AXI #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI -#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR +#define CFG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR #define CFG_SYS_NAND_LARGEPAGE #endif -- cgit v1.2.3 From d1c723895bfcc335bd3b674facd38b02586e6cac Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:54 -0500 Subject: global: Migrate CONFIG_MXC_NAND_REGS_BASE to CFG Perform a simple rename of CONFIG_MXC_NAND_REGS_BASE to CFG_MXC_NAND_REGS_BASE Signed-off-by: Tom Rini --- include/configs/m53menlo.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 3ac67b0f489..ee19c8936b9 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -45,7 +45,7 @@ */ #ifdef CONFIG_CMD_NAND #define CFG_SYS_NAND_BASE NFC_BASE_ADDR_AXI -#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI +#define CFG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI #define CFG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR #define CFG_SYS_NAND_LARGEPAGE #endif -- cgit v1.2.3 From 4db386655a889b6466d2c3f40839ad21205c6d21 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:55 -0500 Subject: global: Migrate CONFIG_MXC_UART_BASE to CFG Perform a simple rename of CONFIG_MXC_UART_BASE to CFG_MXC_UART_BASE Signed-off-by: Tom Rini --- include/configs/apalis_imx6.h | 2 +- include/configs/cl-som-imx7.h | 2 +- include/configs/cm_fx6.h | 2 +- include/configs/colibri_imx6.h | 2 +- include/configs/dart_6ul.h | 2 +- include/configs/dh_imx6.h | 2 +- include/configs/display5.h | 2 +- include/configs/el6x_common.h | 2 +- include/configs/embestmx6boards.h | 2 +- include/configs/ge_b1x5v2.h | 4 ++-- include/configs/gw_ventana.h | 2 +- include/configs/imx6-engicam.h | 4 ++-- include/configs/imx6_logic.h | 2 +- include/configs/imx6dl-mamoj.h | 2 +- include/configs/imx6ulz_smm_m2.h | 2 +- include/configs/imx7-cm.h | 2 +- include/configs/imx8mm_data_modul_edm_sbc.h | 2 +- include/configs/imx8mp_dhcom_pdk2.h | 2 +- include/configs/imx8mp_rsb3720.h | 2 +- include/configs/imx8mq_cm.h | 2 +- include/configs/imx8mq_evk.h | 2 +- include/configs/imx8mq_phanbell.h | 2 +- include/configs/kontron-sl-mx6ul.h | 2 +- include/configs/kontron_pitx_imx8m.h | 2 +- include/configs/librem5.h | 10 +++++----- include/configs/liteboard.h | 2 +- include/configs/m53menlo.h | 2 +- include/configs/mccmon6.h | 2 +- include/configs/msc_sm2s_imx8mp.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53cx9020.h | 2 +- include/configs/mx53loco.h | 2 +- include/configs/mx6cuboxi.h | 2 +- include/configs/mx6memcal.h | 6 +++--- include/configs/mx6sabreauto.h | 2 +- include/configs/mx6sabresd.h | 2 +- include/configs/mx6slevk.h | 2 +- include/configs/mx6sllevk.h | 2 +- include/configs/mx6sxsabreauto.h | 2 +- include/configs/mx6sxsabresd.h | 2 +- include/configs/mx6ul_14x14_evk.h | 2 +- include/configs/mx6ullevk.h | 2 +- include/configs/mys_6ulx.h | 2 +- include/configs/nitrogen6x.h | 2 +- include/configs/novena.h | 2 +- include/configs/npi_imx6ull.h | 2 +- include/configs/pcl063.h | 2 +- include/configs/pcl063_ull.h | 2 +- include/configs/pico-imx6.h | 2 +- include/configs/pico-imx6ul.h | 2 +- include/configs/pico-imx7d.h | 2 +- include/configs/pico-imx8mq.h | 2 +- include/configs/tqma6_mba6.h | 2 +- include/configs/tqma6_wru4.h | 2 +- include/configs/udoo.h | 2 +- include/configs/udoo_neo.h | 2 +- include/configs/usbarmory.h | 2 +- include/configs/vining_2000.h | 2 +- include/configs/wandboard.h | 2 +- include/configs/xpress.h | 2 +- 60 files changed, 68 insertions(+), 68 deletions(-) (limited to 'include') diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index d46159076f2..2fb4cfa5e9a 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -15,7 +15,7 @@ #include #include -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index cde7d3c891a..b7920c7b305 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -10,7 +10,7 @@ #include "mx7_common.h" -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR +#define CFG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* Network */ #define CFG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 47b76c9371e..90ebec4a94c 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -26,7 +26,7 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* Serial console */ -#define CONFIG_MXC_UART_BASE UART4_BASE +#define CFG_MXC_UART_BASE UART4_BASE /* Environment */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index bf2a9bbaaff..3c67aab04c1 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -15,7 +15,7 @@ #include #include -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index c2ed9c7c56a..fb619105a76 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -28,7 +28,7 @@ #define MMC_ROOTFS_PART 2 /* Console configs */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 6aef15c658c..348be5a6ec6 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -28,7 +28,7 @@ #define CFG_SYS_FSL_USDHC_NUM 3 /* UART */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* USB Configs */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/display5.h b/include/configs/display5.h index 70ad88c9075..cd1544be039 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -34,7 +34,7 @@ #define CFG_SYS_SPI_ARGS_OFFS 0x140000 #define CFG_SYS_SPI_ARGS_SIZE 0x10000 -#define CONFIG_MXC_UART_BASE UART5_BASE +#define CFG_MXC_UART_BASE UART5_BASE /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index a5e2dc063a7..6913a91c4c1 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -21,7 +21,7 @@ /* Commands */ -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE #define CFG_EXTRA_ENV_SETTINGS \ "board=EL6Q\0" \ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index c1748fc2602..81a92c9bb97 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -12,7 +12,7 @@ #ifndef __RIOTBOARD_CONFIG_H #define __RIOTBOARD_CONFIG_H -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE #define CONSOLE_DEV "ttymxc1" #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 0523ff9a64b..529b8fc53e5 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -13,9 +13,9 @@ #include "mx6_common.h" /* UART */ -#define CONFIG_MXC_UART_BASE UART3_BASE +#define CFG_MXC_UART_BASE UART3_BASE -#if CONFIG_MXC_UART_BASE == UART2_BASE +#if CFG_MXC_UART_BASE == UART2_BASE /* UART2 requires CONFIG_DEBUG_UART_BASE=0x21e8000 */ #define CONSOLE_DEVICE "ttymxc1" /* System on Module debug connector */ #else diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 5a78c68e2fc..c6ace9d65eb 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -16,7 +16,7 @@ #include "mx6_common.h" /* Serial */ -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE /* NAND */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 4208ba95915..786b70fe064 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -116,9 +116,9 @@ /* UART */ #ifdef CONFIG_MXC_UART # ifdef CONFIG_MX6UL -# define CONFIG_MXC_UART_BASE UART1_BASE +# define CFG_MXC_UART_BASE UART1_BASE # else -# define CONFIG_MXC_UART_BASE UART4_BASE +# define CFG_MXC_UART_BASE UART4_BASE # endif #endif diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 121b34ae96d..f9544cd430c 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -8,7 +8,7 @@ #ifndef __IMX6LOGIC_CONFIG_H #define __IMX6LOGIC_CONFIG_H -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE #define CONSOLE_DEV "ttymxc0" #include "mx6_common.h" diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 162b0b8a69b..db08e43f0d8 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -35,7 +35,7 @@ #include /* UART */ -#define CONFIG_MXC_UART_BASE UART3_BASE +#define CFG_MXC_UART_BASE UART3_BASE /* MMC */ diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h index c95038eaa53..9da98d0af27 100644 --- a/include/configs/imx6ulz_smm_m2.h +++ b/include/configs/imx6ulz_smm_m2.h @@ -12,7 +12,7 @@ #include #include -#define CONFIG_MXC_UART_BASE UART4_BASE +#define CFG_MXC_UART_BASE UART4_BASE #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 66cf5b463fc..84fb1bfb759 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -10,7 +10,7 @@ #include "mx7_common.h" -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR +#define CFG_MXC_UART_BASE UART1_IPS_BASE_ADDR #undef CFG_EXTRA_ENV_SETTINGS diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 0723d27ab70..f7d2b660c1f 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -25,7 +25,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* Minimum 1 GiB DDR */ -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CFG_MXC_UART_BASE UART3_BASE_ADDR /* PHY needs a longer autonegotiation timeout after reset */ #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index b8fdedefa21..d022faaa91a 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -18,7 +18,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x20000000 /* Minimum 512 MiB DDR */ -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CFG_MXC_UART_BASE UART1_BASE_ADDR /* PHY needs a longer autonegotiation timeout after reset */ #define PHY_ANEG_TIMEOUT 20000 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index e4e24b522fd..495ca313db2 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -148,7 +148,7 @@ #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ #endif -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CFG_MXC_UART_BASE UART3_BASE_ADDR #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index f7ae1b47d06..828bd672372 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -54,7 +54,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) +#define CFG_MXC_UART_BASE UART_BASE_ADDR(1) #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 4b46321e851..a7a51907f5c 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -59,7 +59,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) +#define CFG_MXC_UART_BASE UART_BASE_ADDR(1) #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 6d0c4531118..bfde15e6240 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -92,7 +92,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) +#define CFG_MXC_UART_BASE UART_BASE_ADDR(1) #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index e3ae91089ff..4354f3945e8 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -22,7 +22,7 @@ #define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* Board and environment settings */ -#define CONFIG_MXC_UART_BASE UART4_BASE +#define CFG_MXC_UART_BASE UART4_BASE #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 5a3c9f76a43..bf590efb434 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -67,7 +67,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) +#define CFG_MXC_UART_BASE UART_BASE_ADDR(3) #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/librem5.h b/include/configs/librem5.h index 7417f8582a4..9e4d373e56d 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -30,23 +30,23 @@ #define CONSOLE_ON_UART1 #ifdef CONSOLE_ON_UART1 -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CFG_MXC_UART_BASE UART1_BASE_ADDR #define CONSOLE_UART_CLK 0 #define CONSOLE "ttymxc0" #elif defined(CONSOLE_ON_UART2) -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CFG_MXC_UART_BASE UART2_BASE_ADDR #define CONSOLE_UART_CLK 1 #define CONSOLE "ttymxc1" #elif defined(CONSOLE_ON_UART3) -#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR +#define CFG_MXC_UART_BASE UART3_BASE_ADDR #define CONSOLE_UART_CLK 2 #define CONSOLE "ttymxc2" #elif defined(CONSOLE_ON_UART4) -#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR +#define CFG_MXC_UART_BASE UART4_BASE_ADDR #define CONSOLE_UART_CLK 3 #define CONSOLE "ttymxc3" #else -#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR +#define CFG_MXC_UART_BASE UART1_BASE_ADDR #define CONSOLE_UART_CLK 0 #define CONSOLE "ttymxc0" #endif diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 0b8781d7bf3..63e5dbfab77 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -13,7 +13,7 @@ #include #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #ifdef CONFIG_FSL_USDHC diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index ee19c8936b9..9aac5677fb7 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -31,7 +31,7 @@ /* * Serial Driver */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* * MMC Driver diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 6cc49378fed..b64bf93bcb7 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -17,7 +17,7 @@ * mode from SD card (SD2) */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/msc_sm2s_imx8mp.h b/include/configs/msc_sm2s_imx8mp.h index 1cd0b3cf737..c1c1fd5a784 100644 --- a/include/configs/msc_sm2s_imx8mp.h +++ b/include/configs/msc_sm2s_imx8mp.h @@ -55,7 +55,7 @@ #define PHYS_SDRAM_2 0xc0000000 #define PHYS_SDRAM_2_SIZE 0x0 -#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR +#define CFG_MXC_UART_BASE UART2_BASE_ADDR #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 740e357e00e..123b7a533b1 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -18,7 +18,7 @@ * Hardware drivers */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* PMIC Controller */ #define CFG_FSL_PMIC_BUS 0 diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index baffe65c369..1a3ec6e0cdb 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -14,7 +14,7 @@ #include -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 0ac93d6e043..d87f9e942c5 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -11,7 +11,7 @@ #include -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index d4af96b51ea..871d52c343f 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -19,7 +19,7 @@ /* Command definition */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE #define CFG_EXTRA_ENV_SETTINGS \ "som_rev=undefined\0" \ diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index f6d3b2eeb9c..b664962a26a 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -14,12 +14,12 @@ #ifdef CONFIG_SERIAL_CONSOLE_UART1 #if defined(CONFIG_MX6SL) -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR +#define CFG_MXC_UART_BASE UART1_IPS_BASE_ADDR #else -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE #endif #elif defined(CONFIG_SERIAL_CONSOLE_UART2) -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE #else #error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx) #endif diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 888da7ce365..274c14bbd38 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -8,7 +8,7 @@ #ifndef __MX6SABREAUTO_CONFIG_H #define __MX6SABREAUTO_CONFIG_H -#define CONFIG_MXC_UART_BASE UART4_BASE +#define CFG_MXC_UART_BASE UART4_BASE #define CONSOLE_DEV "ttymxc3" /* USB Configs */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 78a554d0ccb..af9978e02c8 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -8,7 +8,7 @@ #ifndef __MX6SABRESD_CONFIG_H #define __MX6SABRESD_CONFIG_H -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE #define CONSOLE_DEV "ttymxc0" #include "mx6sabre_common.h" diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 4fbd06783a6..f6d9ac20821 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,7 +10,7 @@ #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR +#define CFG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index cf4871cbae3..aec3e51bff8 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -10,7 +10,7 @@ #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE #define CFG_EXTRA_ENV_SETTINGS \ "epdc_waveform=epdc_splash.bin\0" \ diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 3399cdd16fa..3d0f6e452d6 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -10,7 +10,7 @@ #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE #define CFG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index c99d99abc17..8c39e6d6cf4 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -12,7 +12,7 @@ #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE #ifdef CONFIG_IMX_BOOTAUX diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 5e3695ecc97..3f8a90b626d 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -15,7 +15,7 @@ #define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #ifdef CONFIG_FSL_USDHC diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 58d1a744ae9..2c3cd32cefa 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -16,7 +16,7 @@ #define PHYS_SDRAM_SIZE SZ_512M -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #ifdef CONFIG_FSL_USDHC diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index 43261824d3c..0c0235b4298 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -13,7 +13,7 @@ #define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index aca15be64b1..5625771bad1 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -11,7 +11,7 @@ #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/novena.h b/include/configs/novena.h index 3ffb44ab725..7243549b68d 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -49,7 +49,7 @@ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 /* UART */ -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE /* USB Configs */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 4b47e4fbb37..24d7b0c26e8 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -13,7 +13,7 @@ #define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 146f87e9ce3..e8c48cf8365 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -22,7 +22,7 @@ #define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index 0890c115700..bd04268a3ef 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -22,7 +22,7 @@ #define MMC_ROOTFS_PART 2 /* Console configs */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configs */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index e1f7b700319..a1d0dd93c52 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -10,7 +10,7 @@ #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 1cb8fa63e72..64e0a556481 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -17,7 +17,7 @@ #define CFG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_MXC_UART_BASE UART6_BASE_ADDR +#define CFG_MXC_UART_BASE UART6_BASE_ADDR /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 7fc6211ff73..dbeaeea77f7 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -10,7 +10,7 @@ #include "mx7_common.h" -#define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR +#define CFG_MXC_UART_BASE UART5_IPS_BASE_ADDR /* MMC Config */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 37ade717ae9..4b602ea0302 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -71,7 +71,7 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */ -#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) +#define CFG_MXC_UART_BASE UART_BASE_ADDR(1) #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h index a5f14dc4267..b5871424bc6 100644 --- a/include/configs/tqma6_mba6.h +++ b/include/configs/tqma6_mba6.h @@ -11,7 +11,7 @@ #define CFG_FEC_MXC_PHYADDR 0x03 -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE #define CONSOLE_DEV "ttymxc1" #endif /* __CONFIG_TQMA6_MBA6_H */ diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 34c9b6a2f97..e06fc7fe155 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -10,7 +10,7 @@ #define CFG_FEC_MXC_PHYADDR 0x01 /* UART */ -#define CONFIG_MXC_UART_BASE UART4_BASE +#define CFG_MXC_UART_BASE UART4_BASE #define CONSOLE_DEV "ttymxc3" /* Watchdog */ diff --git a/include/configs/udoo.h b/include/configs/udoo.h index f0092eff149..d85cf7808c7 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -10,7 +10,7 @@ #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART2_BASE +#define CFG_MXC_UART_BASE UART2_BASE /* MMC Configuration */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 5d7d734daa2..842abb7b7a2 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -16,7 +16,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Command definition */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* Linux only */ #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 11706148f1e..00b45cc3d2a 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -17,7 +17,7 @@ /* U-Boot general configurations */ /* UART */ -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* SD/MMC */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index cdd2eeef0ac..7954ed9910c 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -50,7 +50,7 @@ #endif #ifdef CONFIG_SPL_BUILD -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE #endif #endif /* __CONFIG_H */ diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 1e765439fab..8853bcd7be2 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -10,7 +10,7 @@ #include "mx6_common.h" -#define CONFIG_MXC_UART_BASE UART1_BASE +#define CFG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 96996ac1f0f..c8ae047e62c 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -10,7 +10,7 @@ #include "mx6_common.h" #include -#define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR +#define CFG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -- cgit v1.2.3 From dd11fdc31fb82f63258c1970a6d8d22b8ffd3173 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:04:56 -0500 Subject: global: Migrate CONFIG_MXC_USB_FLAGS et al to CFG Perform simple renames of: CONFIG_MXC_USB_FLAGS to CFG_MXC_USB_FLAGS CONFIG_MXC_USB_PORT to CFG_MXC_USB_PORT CONFIG_MXC_USB_PORTSC to CFG_MXC_USB_PORTSC Signed-off-by: Tom Rini --- include/configs/apalis_imx6.h | 4 ++-- include/configs/aristainetos2.h | 4 ++-- include/configs/brppt2.h | 2 +- include/configs/cl-som-imx7.h | 4 ++-- include/configs/cm_fx6.h | 4 ++-- include/configs/colibri-imx6ull.h | 4 ++-- include/configs/colibri_imx6.h | 4 ++-- include/configs/colibri_imx7.h | 4 ++-- include/configs/dart_6ul.h | 4 ++-- include/configs/dh_imx6.h | 4 ++-- include/configs/display5.h | 2 +- include/configs/embestmx6boards.h | 4 ++-- include/configs/ge_b1x5v2.h | 4 ++-- include/configs/gw_ventana.h | 4 ++-- include/configs/imx6_logic.h | 4 ++-- include/configs/imx6dl-mamoj.h | 4 ++-- include/configs/imx6q-bosch-acc.h | 4 ++-- include/configs/imx7-cm.h | 2 +- include/configs/imx8mm-cl-iot-gate.h | 2 +- include/configs/kontron-sl-mx6ul.h | 4 ++-- include/configs/kontron-sl-mx8mm.h | 4 ++-- include/configs/kp_imx53.h | 4 ++-- include/configs/kp_imx6q_tpc.h | 4 ++-- include/configs/liteboard.h | 4 ++-- include/configs/m53menlo.h | 6 +++--- include/configs/meerkat96.h | 2 +- include/configs/mx51evk.h | 6 +++--- include/configs/mx53cx9020.h | 6 +++--- include/configs/mx53loco.h | 6 +++--- include/configs/mx53ppd.h | 6 +++--- include/configs/mx6cuboxi.h | 2 +- include/configs/mx6memcal.h | 2 +- include/configs/mx6sabreauto.h | 4 ++-- include/configs/mx6sabresd.h | 4 ++-- include/configs/mx6slevk.h | 4 ++-- include/configs/mx6sllevk.h | 2 +- include/configs/mx6sxsabreauto.h | 4 ++-- include/configs/mx6sxsabresd.h | 4 ++-- include/configs/mx6ul_14x14_evk.h | 4 ++-- include/configs/mx7dsabresd.h | 2 +- include/configs/mx7ulp_com.h | 2 +- include/configs/mys_6ulx.h | 4 ++-- include/configs/nitrogen6x.h | 4 ++-- include/configs/novena.h | 4 ++-- include/configs/npi_imx6ull.h | 4 ++-- include/configs/o4-imx6ull-nano.h | 2 +- include/configs/opos6uldev.h | 4 ++-- include/configs/pcl063.h | 4 ++-- include/configs/pcl063_ull.h | 4 ++-- include/configs/pico-imx6.h | 4 ++-- include/configs/pico-imx6ul.h | 4 ++-- include/configs/pico-imx7d.h | 4 ++-- include/configs/somlabs_visionsom_6ull.h | 4 ++-- include/configs/tbs2910.h | 2 +- include/configs/tqma6.h | 2 +- include/configs/usbarmory.h | 6 +++--- include/configs/verdin-imx8mm.h | 2 +- include/configs/vining_2000.h | 4 ++-- include/configs/wandboard.h | 4 ++-- include/configs/warp7.h | 2 +- include/configs/xpress.h | 4 ++-- 61 files changed, 113 insertions(+), 113 deletions(-) (limited to 'include') diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 2fb4cfa5e9a..8a9f3ef75a7 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -26,8 +26,8 @@ /* USB Configs */ /* Host */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Framebuffer and LCD */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index be1478ea8b6..286435d6f84 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -413,8 +413,8 @@ /* DMA stuff, needed for GPMI/MXS NAND support */ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* UBI support */ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 32d9f503d9f..38c98c5e21c 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -79,6 +79,6 @@ BUR_COMMON_ENV \ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_BRPP2_IMX6_H */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index b7920c7b305..0a667c60b61 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -96,7 +96,7 @@ #endif /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* __CONFIG_H */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 90ebec4a94c..7d0f2b6dc13 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -135,8 +135,8 @@ #define CFG_FEC_MXC_PHYADDR 0 /* USB */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Boot */ #define CFG_SYS_BOOTMAPSZ (8 << 20) diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 5b802aa92a9..ba45ee4efd3 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -123,8 +123,8 @@ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* USB Device Firmware Update support */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 3c67aab04c1..4b2841833b5 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -23,8 +23,8 @@ /* USB Configs */ /* Host */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Command definition */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 91f87ea283f..c568643977c 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -167,7 +167,7 @@ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index fb619105a76..c5781670864 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -47,8 +47,8 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define ENV_MMC \ "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 348be5a6ec6..5cf73274d5e 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -32,8 +32,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* USB Gadget (DFU, UMS) */ #if defined(CONFIG_CMD_DFU) || defined(CONFIG_CMD_USB_MASS_STORAGE) diff --git a/include/configs/display5.h b/include/configs/display5.h index cd1544be039..3b96fff7d6f 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -288,5 +288,5 @@ /* The 0x120000 value corresponds to above SPI-NOR memory MAP */ #endif -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 81a92c9bb97..31c7e104f6b 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -18,8 +18,8 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* MMC Configs */ #define CFG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index 529b8fc53e5..49b058cb10d 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -24,8 +24,8 @@ #endif /* USB */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Memory */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index c6ace9d65eb..0a9dfe736f7 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -36,8 +36,8 @@ /* Various command support */ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Miscellaneous configurable options */ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index f9544cd430c..85c054451f3 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -117,8 +117,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* Falcon Mode */ diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index db08e43f0d8..6c61b3f4480 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -43,8 +43,8 @@ #define CFG_FEC_MXC_PHYADDR 1 /* USB */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Falcon */ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index e28185f24dd..2c998cdcfc7 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -110,7 +110,7 @@ #endif #endif -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* __IMX6Q_ACC_H */ diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 84fb1bfb759..106fbdb9053 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -79,6 +79,6 @@ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 64cdc401d03..2641d7bc960 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -139,6 +139,6 @@ #define CFG_FEC_MXC_PHYADDR 0 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /*__IMX8MM_CL_IOT_GATE_H*/ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 4354f3945e8..1c92cd78767 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -25,8 +25,8 @@ #define CFG_MXC_UART_BASE UART4_BASE #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* Boot order for distro boot */ diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index d80238bd02f..eee3d2ddb03 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -25,8 +25,8 @@ /* Board and environment settings */ #ifdef CONFIG_USB_EHCI_HCD -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* GUID for capsule updatable firmware image */ diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index da8a67b4ab6..6e383cbe75f 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -11,8 +11,8 @@ #include /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Command definition */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 99321b320f5..1aa4b8ab598 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -18,8 +18,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 63e5dbfab77..5811059c8e2 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -95,8 +95,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 9aac5677fb7..1ecbba1b58f 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -70,9 +70,9 @@ * USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* LVDS display */ diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h index 9e480fe0558..6ffc1282411 100644 --- a/include/configs/meerkat96.h +++ b/include/configs/meerkat96.h @@ -24,6 +24,6 @@ /* Environment configs */ /* USB configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 123b7a533b1..dff54d04a67 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -33,9 +33,9 @@ #define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI -#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC PORT_PTS_ULPI +#define CFG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED /* Framebuffer and LCD */ diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 1a3ec6e0cdb..e995776d30d 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -23,9 +23,9 @@ /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Command definition */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index d87f9e942c5..7398804e6b5 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -17,9 +17,9 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* PMIC Controller */ #define CFG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 94d2191af91..df65dbeea41 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -12,9 +12,9 @@ #include /* USB Configs */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Command definition */ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 871d52c343f..f0d6405d301 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -15,7 +15,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* USB */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) /* Command definition */ diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index b664962a26a..f2edd13eb88 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -31,6 +31,6 @@ #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_MXC_USB_PORTSC PORT_PTS_UTMI +#define CFG_MXC_USB_PORTSC PORT_PTS_UTMI #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 274c14bbd38..da98139d7d7 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -12,8 +12,8 @@ #define CONSOLE_DEV "ttymxc3" /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index af9978e02c8..2b028e3aa2b 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -29,8 +29,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #endif /* __MX6SABRESD_CONFIG_H */ diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index f6d9ac20821..39c8ef060c7 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -90,8 +90,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #define CFG_SYS_FSL_USDHC_NUM 3 diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index aec3e51bff8..290996b51bc 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -94,7 +94,7 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif #include diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 3d0f6e452d6..1c14a6beb0a 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -96,8 +96,8 @@ #define CFG_FEC_MXC_PHYADDR 0x0 #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #define CFG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 8c39e6d6cf4..8b02c3b6310 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -118,8 +118,8 @@ #define CFG_FEC_MXC_PHYADDR 0x1 #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #ifdef CONFIG_CMD_PCI diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 3f8a90b626d..635ae78abcb 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -116,8 +116,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 9c938f04e93..94bee75fdea 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -99,6 +99,6 @@ #endif /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 5ee5129801d..a310c64e794 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -51,5 +51,5 @@ #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE SZ_256K -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index 0c0235b4298..2571098d06c 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -30,8 +30,8 @@ #define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 5625771bad1..c9c599d0762 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -21,8 +21,8 @@ #define CFG_FEC_MXC_PHYADDR 6 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_MMC #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) diff --git a/include/configs/novena.h b/include/configs/novena.h index 7243549b68d..dc5b0431290 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -53,8 +53,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* Extra U-Boot environment. */ diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 24d7b0c26e8..5f933391cc0 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -29,8 +29,8 @@ #define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_NET #define CFG_FEC_MXC_PHYADDR 0x1 diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h index 0e1083a2130..9050da8738b 100644 --- a/include/configs/o4-imx6ull-nano.h +++ b/include/configs/o4-imx6ull-nano.h @@ -12,7 +12,7 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE #if IS_ENABLED(CONFIG_CMD_USB) -# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +# define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* CONFIG_CMD_USB */ #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 459134b93f8..1edb1826c4e 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -19,8 +19,8 @@ /* USB */ #ifdef CONFIG_USB_EHCI_MX6 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif /* LCD */ diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index e8c48cf8365..38dcee05359 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -42,8 +42,8 @@ #define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0,115200n8\0" \ diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index bd04268a3ef..d742201ce43 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -44,8 +44,8 @@ #define CFG_SYS_NAND_BASE 0x40000000 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define ENV_MMC \ "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index a1d0dd93c52..d806d7d9c57 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -16,8 +16,8 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 64e0a556481..4caa8233758 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -23,8 +23,8 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index dbeaeea77f7..fd8962e9f75 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -107,7 +107,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index 3418d4e2b55..041a83b057d 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -61,8 +61,8 @@ /* USB Configs */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #endif #ifdef CONFIG_CMD_NET diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 9b396e6e73b..535859792d3 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -27,7 +27,7 @@ /* USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* CONFIG_CMD_USB */ #define CFG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index cb5f7fc25af..af5a474cf31 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -39,7 +39,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #if defined(CONFIG_TQMA6X_MMC_BOOT) diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 00b45cc3d2a..27e61f5b8f4 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -23,9 +23,9 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB */ -#define CONFIG_MXC_USB_PORT 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORT 1 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 /* Linux boot */ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 27d7efb883d..8cb1f1aff35 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -67,6 +67,6 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __VERDIN_IMX8MM_H */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 7954ed9910c..6db68c1e700 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -36,8 +36,8 @@ /* Network */ #define CFG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_PCI #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 8853bcd7be2..7b8c5cbe7a8 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -17,8 +17,8 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_EXTRA_ENV_SETTINGS \ "console=ttymxc0\0" \ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 0826e0bbe02..5d2956a5963 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -93,7 +93,7 @@ #define CFG_SYS_FSL_USDHC_NUM 1 -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) /* USB Device Firmware Update support */ #define DFU_DEFAULT_POLL_TIMEOUT 300 diff --git a/include/configs/xpress.h b/include/configs/xpress.h index c8ae047e62c..a2aa31008ec 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -28,8 +28,8 @@ /* Environment is in stored in the eMMC boot partition */ /* USB Configs */ -#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) -#define CONFIG_MXC_USB_FLAGS 0 +#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CFG_MXC_USB_FLAGS 0 #define CFG_FEC_ENET_DEV 0 #define CFG_FEC_MXC_PHYADDR 0x0 -- cgit v1.2.3 From 1c3ba55798e3552739f06356aaeb18e66ec49a3c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:23 -0500 Subject: global: Migrate CONFIG_ODROID_REV_AIN to CFG Perform a simple rename of CONFIG_ODROID_REV_AIN to CFG_ODROID_REV_AIN Signed-off-by: Tom Rini --- include/configs/odroid_xu3.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 2bac017ea08..7304851d0f3 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -52,7 +52,7 @@ #define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) /* Set soc_rev, soc_id, board_rev, board_name, fdtfile */ -#define CONFIG_ODROID_REV_AIN 9 +#define CFG_ODROID_REV_AIN 9 /* * Need to override existing one (smdk5420) with odroid so set_board_info will -- cgit v1.2.3 From a2c164cbb46c6400d93d08e634a1987bfce0e79f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:24 -0500 Subject: global: Migrate CONFIG_OTHBOOTARGS to CFG Perform a simple rename of CONFIG_OTHBOOTARGS to CFG_OTHBOOTARGS Signed-off-by: Tom Rini --- include/configs/x86-common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 65a1e63e00e..5d461e8d0c6 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -27,9 +27,9 @@ /* Default environment */ #define CONFIG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) -#define CONFIG_OTHBOOTARGS "othbootargs=\0" +#define CFG_OTHBOOTARGS "othbootargs=\0" #else -#define CONFIG_OTHBOOTARGS "othbootargs=acpi=off\0" +#define CFG_OTHBOOTARGS "othbootargs=acpi=off\0" #endif #if defined(CONFIG_DISTRO_DEFAULTS) @@ -49,7 +49,7 @@ "pciconfighost=1\0" \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ - CONFIG_OTHBOOTARGS \ + CFG_OTHBOOTARGS \ "scriptaddr=0x7000000\0" \ "kernel_addr_r=0x1000000\0" \ "ramdisk_addr_r=0x4000000\0" \ -- cgit v1.2.3 From 7906f91789de1f0ceed87d53a39ca2d7ca80150c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:25 -0500 Subject: global: Migrate CONFIG_PCIE_IMX_PERST_GPIO to CFG Perform a simple rename of CONFIG_PCIE_IMX_PERST_GPIO to CFG_PCIE_IMX_PERST_GPIO Signed-off-by: Tom Rini --- include/configs/mx6sabresd.h | 2 +- include/configs/mx6sxsabresd.h | 2 +- include/configs/novena.h | 2 +- include/configs/tbs2910.h | 2 +- include/configs/vining_2000.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 2b028e3aa2b..116a9c6abcf 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -20,7 +20,7 @@ #define CFG_SYS_FSL_USDHC_NUM 3 #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 8b02c3b6310..85e5cfbb58d 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -123,7 +123,7 @@ #endif #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif diff --git a/include/configs/novena.h b/include/configs/novena.h index dc5b0431290..6f4353e7df7 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -41,7 +41,7 @@ /* PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) #endif diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 535859792d3..256331ae173 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -22,7 +22,7 @@ /* PCI */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) #endif /* USB */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 6db68c1e700..7bfc22c043f 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -40,7 +40,7 @@ #define CFG_MXC_USB_FLAGS 0 #ifdef CONFIG_CMD_PCI -#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) +#define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(4, 6) #endif #define CFG_IMX6_PWM_PER_CLK 66000000 -- cgit v1.2.3 From 52139620be4084ac00e3c628616599c4a88c4191 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:26 -0500 Subject: global: Migrate CONFIG_PCIE_IMX_POWER_GPIO to CFG Perform a simple rename of CONFIG_PCIE_IMX_POWER_GPIO to CFG_PCIE_IMX_POWER_GPIO Signed-off-by: Tom Rini --- include/configs/mx6sabresd.h | 2 +- include/configs/mx6sxsabresd.h | 2 +- include/configs/novena.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 116a9c6abcf..1aa8a56cceb 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -21,7 +21,7 @@ #ifdef CONFIG_CMD_PCI #define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) -#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) +#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) #endif /* PMIC */ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 85e5cfbb58d..fe0ad34ef9c 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -124,7 +124,7 @@ #ifdef CONFIG_CMD_PCI #define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0) -#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) +#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1) #endif #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR diff --git a/include/configs/novena.h b/include/configs/novena.h index 6f4353e7df7..5e8b7fa6217 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -42,7 +42,7 @@ /* PCI express */ #ifdef CONFIG_CMD_PCI #define CFG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(3, 29) -#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) +#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(7, 12) #endif /* PMIC */ -- cgit v1.2.3 From 52d596eabbd3ce80c2e1ce0e860d588cd219bd0b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:28 -0500 Subject: global: Migrate CONFIG_PHY_ID to CFG Perform a simple rename of CONFIG_PHY_ID to CFG_PHY_ID Signed-off-by: Tom Rini --- include/configs/ethernut5.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 3fd58d6bd4a..182369def91 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -48,7 +48,7 @@ /* JFFS2 */ /* Ethernet */ -#define CONFIG_PHY_ID 0 +#define CFG_PHY_ID 0 /* MMC */ #ifdef CONFIG_CMD_MMC -- cgit v1.2.3 From 830fd095a348d8390c23d93605e438ac24153be9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:29 -0500 Subject: global: Migrate CONFIG_PHY_IRAM_BASE to CFG Perform a simple rename of CONFIG_PHY_IRAM_BASE to CFG_PHY_IRAM_BASE Signed-off-by: Tom Rini --- include/configs/exynos5420-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index bd43efa553c..b75fe1b0a86 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -10,7 +10,7 @@ #define CFG_IRAM_TOP 0x02074000 -#define CONFIG_PHY_IRAM_BASE 0x02020000 +#define CFG_PHY_IRAM_BASE 0x02020000 /* * Low Power settings -- cgit v1.2.3 From f410d0ac8a90d16870d33cc7944e98445f7e168d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:30 -0500 Subject: global: Migrate CONFIG_PL011_CLOCK to CFG Perform a simple rename of CONFIG_PL011_CLOCK to CFG_PL011_CLOCK Signed-off-by: Tom Rini --- include/configs/corstone1000.h | 2 +- include/configs/highbank.h | 2 +- include/configs/lx2160a_common.h | 2 +- include/configs/mxs.h | 2 +- include/configs/s5p4418_nanopi2.h | 2 +- include/configs/synquacer.h | 2 +- include/configs/thunderx_88xx.h | 2 +- include/configs/total_compute.h | 2 +- include/configs/vexpress_aemv8.h | 4 ++-- include/configs/vexpress_common.h | 2 +- 10 files changed, 11 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h index 8aec52d508e..3347c11792d 100644 --- a/include/configs/corstone1000.h +++ b/include/configs/corstone1000.h @@ -16,7 +16,7 @@ #define V2M_BASE 0x80000000 -#define CONFIG_PL011_CLOCK 50000000 +#define CFG_PL011_CLOCK 50000000 /* Physical Memory Map */ #define PHYS_SDRAM_1 (V2M_BASE) diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 76e6054b0cc..97bb439f735 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -8,7 +8,7 @@ #define CFG_SYS_BOOTMAPSZ (16 << 20) -#define CONFIG_PL011_CLOCK 150000000 +#define CFG_PL011_CLOCK 150000000 /* * Miscellaneous configurable options diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index c1a98fd3e4c..f8a20ea16f9 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -39,7 +39,7 @@ /* Serial Port */ -#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4) +#define CFG_PL011_CLOCK (get_bus_freq(0) / 4) #define CFG_SYS_SERIAL0 0x21c0000 #define CFG_SYS_SERIAL1 0x21d0000 #define CFG_SYS_SERIAL2 0x21e0000 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 32e0e06617e..90cb1a5e4a0 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -77,7 +77,7 @@ * DUART Serial Driver. * Conflicts with AUART driver which can be set by board. */ -#define CONFIG_PL011_CLOCK 24000000 +#define CFG_PL011_CLOCK 24000000 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } /* Default baudrate can be overridden by board! */ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index bfe559f6e2c..0e7d01925ee 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -76,7 +76,7 @@ /*----------------------------------------------------------------------- * serial console configuration */ -#define CONFIG_PL011_CLOCK 50000000 +#define CFG_PL011_CLOCK 50000000 #define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ (void *)PHY_BASEADDR_UART1, \ (void *)PHY_BASEADDR_UART2, \ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index e65d6238163..350cc69c28d 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -31,7 +31,7 @@ /* Serial (pl011) */ #define UART_CLK (62500000) -#define CONFIG_PL011_CLOCK UART_CLK +#define CFG_PL011_CLOCK UART_CLK #define CONFIG_PL01x_PORTS {(void *)(0x2a400000)} /* Support MTD */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 8ba40546b2c..2bca86bed93 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -17,7 +17,7 @@ /* PL011 Serial Configuration */ -#define CONFIG_PL011_CLOCK 24000000 +#define CFG_PL011_CLOCK 24000000 /* Generic Interrupt Controller Definitions */ #define GICD_BASE (0x801000000000) diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index e007be8e456..436bf622e17 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -14,7 +14,7 @@ #define UART0_BASE 0x7ff80000 /* PL011 Serial Configuration */ -#define CONFIG_PL011_CLOCK 7372800 +#define CFG_PL011_CLOCK 7372800 /* Miscellaneous configurable options */ diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 87b8c5d57ee..43f7e454d81 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -86,9 +86,9 @@ /* PL011 Serial Configuration */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_PL011_CLOCK 7372800 +#define CFG_PL011_CLOCK 7372800 #else -#define CONFIG_PL011_CLOCK 24000000 +#define CFG_PL011_CLOCK 24000000 #endif /* Physical Memory Map */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 705a941e360..3fc70de5771 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -116,7 +116,7 @@ #define CFG_SYS_TIMER_COUNTER (V2M_TIMER01 + 0x4) /* PL011 Serial Configuration */ -#define CONFIG_PL011_CLOCK 24000000 +#define CFG_PL011_CLOCK 24000000 #define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ (void *)CFG_SYS_SERIAL1} -- cgit v1.2.3 From b861574bd9e7c480ceec47b77a59ed5a52b57937 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:31 -0500 Subject: global: Migrate CONFIG_PL01x_PORTS to CFG Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS Signed-off-by: Tom Rini --- include/configs/lx2160a_common.h | 2 +- include/configs/mxs.h | 2 +- include/configs/s5p4418_nanopi2.h | 2 +- include/configs/synquacer.h | 2 +- include/configs/vexpress_common.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index f8a20ea16f9..6f46ca78d4d 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -45,7 +45,7 @@ #define CFG_SYS_SERIAL2 0x21e0000 #define CFG_SYS_SERIAL3 0x21f0000 /*below might needs to be removed*/ -#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ +#define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ (void *)CFG_SYS_SERIAL1, \ (void *)CFG_SYS_SERIAL2, \ (void *)CFG_SYS_SERIAL3 } diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 90cb1a5e4a0..6ebfee69271 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -78,7 +78,7 @@ * Conflicts with AUART driver which can be set by board. */ #define CFG_PL011_CLOCK 24000000 -#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } +#define CFG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } /* Default baudrate can be overridden by board! */ /* NAND */ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 0e7d01925ee..2fa44e65fc1 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -77,7 +77,7 @@ * serial console configuration */ #define CFG_PL011_CLOCK 50000000 -#define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ +#define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ (void *)PHY_BASEADDR_UART1, \ (void *)PHY_BASEADDR_UART2, \ (void *)PHY_BASEADDR_UART3} diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 350cc69c28d..8f44c6f66a9 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -32,7 +32,7 @@ /* Serial (pl011) */ #define UART_CLK (62500000) #define CFG_PL011_CLOCK UART_CLK -#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)} +#define CFG_PL01x_PORTS {(void *)(0x2a400000)} /* Support MTD */ #define CFG_SYS_FLASH_BASE (0x08000000) diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 3fc70de5771..ba7731bfca6 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -117,7 +117,7 @@ /* PL011 Serial Configuration */ #define CFG_PL011_CLOCK 24000000 -#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ +#define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \ (void *)CFG_SYS_SERIAL1} #define CFG_SYS_SERIAL0 V2M_UART0 -- cgit v1.2.3 From 2adbb297471b39741e3e6e2ef04c56187ccaaf68 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:33 -0500 Subject: global: Migrate CONFIG_POSTBOOTMENU to CFG Perform a simple rename of CONFIG_POSTBOOTMENU to CFG_POSTBOOTMENU Signed-off-by: Tom Rini --- include/configs/nokia_rx51.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 97d08685290..a64b7b34dc1 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -128,7 +128,7 @@ "bootmenu_delay=30\0" \ "" -#define CONFIG_POSTBOOTMENU \ +#define CFG_POSTBOOTMENU \ "echo;" \ "echo Extra commands:;" \ "echo run sdboot - Boot from SD card slot.;" \ -- cgit v1.2.3 From 6d38c69e835b5a918d324da16c34a697aeb3276f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:34 -0500 Subject: global: Migrate CONFIG_POWER_LTC3676_I2C_ADDR to CFG Perform a simple rename of CONFIG_POWER_LTC3676_I2C_ADDR to CFG_POWER_LTC3676_I2C_ADDR Signed-off-by: Tom Rini --- include/configs/gw_ventana.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 0a9dfe736f7..85a2ad21dc0 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -31,7 +31,7 @@ * PMIC */ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 -#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c +#define CFG_POWER_LTC3676_I2C_ADDR 0x3c /* Various command support */ -- cgit v1.2.3 From aa3efb6c64513ad3d5eb876488a90b2ee2b8ccc0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:35 -0500 Subject: global: Migrate CONFIG_POWER_PFUZE100_I2C_ADDR to CFG Perform a simple rename of CONFIG_POWER_PFUZE100_I2C_ADDR to CFG_POWER_PFUZE100_I2C_ADDR Signed-off-by: Tom Rini --- include/configs/el6x_common.h | 2 +- include/configs/gw_ventana.h | 2 +- include/configs/imx8mq_evk.h | 2 +- include/configs/kontron_pitx_imx8m.h | 2 +- include/configs/mx6sabreauto.h | 2 +- include/configs/mx6sabresd.h | 2 +- include/configs/novena.h | 2 +- include/configs/tqma6.h | 2 +- include/configs/vining_2000.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 6913a91c4c1..78af42d0450 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -17,7 +17,7 @@ #define CFG_SYS_FSL_USDHC_NUM 2 /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 /* Commands */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 85a2ad21dc0..ebc5d03d0d5 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -30,7 +30,7 @@ /* * PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #define CFG_POWER_LTC3676_I2C_ADDR 0x3c /* Various command support */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index a7a51907f5c..d2de2900c06 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -18,7 +18,7 @@ #define CFG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #endif /* ENET Config */ diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index bf590efb434..e3a021c987c 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -20,7 +20,7 @@ /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #endif /* ENET1 Config */ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index da98139d7d7..05ae2fce1fd 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -36,6 +36,6 @@ /* DMA stuff, needed for GPMI/MXS NAND support */ /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #endif /* __MX6SABREAUTO_CONFIG_H */ diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 1aa8a56cceb..30d3b9d9307 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -25,7 +25,7 @@ #endif /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 /* USB Configs */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/novena.h b/include/configs/novena.h index 5e8b7fa6217..39d3afd1c8e 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -46,7 +46,7 @@ #endif /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 /* UART */ #define CFG_MXC_UART_BASE UART2_BASE diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index af5a474cf31..8c75a75a9e5 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -31,7 +31,7 @@ #define CFG_I2C_MULTI_BUS #if !defined(CONFIG_DM_PMIC) -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 #define TQMA6_PFUZE100_I2C_BUS 2 #endif diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 7bfc22c043f..30654191a26 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -31,7 +31,7 @@ #define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* PMIC */ -#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE100_I2C_ADDR 0x08 /* Network */ #define CFG_FEC_MXC_PHYADDR 0x0 -- cgit v1.2.3 From 193b3fe1756b7fcb5fa4432ef6642ba5c5004115 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:36 -0500 Subject: global: Migrate CONFIG_POWER_PFUZE3000_I2C_ADDR to CFG Perform a simple rename of CONFIG_POWER_PFUZE3000_I2C_ADDR to CFG_POWER_PFUZE3000_I2C_ADDR Signed-off-by: Tom Rini --- include/configs/cl-som-imx7.h | 2 +- include/configs/pico-imx7d.h | 2 +- include/configs/udoo_neo.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 0a667c60b61..280ae1e9cca 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -19,7 +19,7 @@ #define IMX_FEC_BASE ENET_IPS_BASE_ADDR /* PMIC */ -#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE3000_I2C_ADDR 0x08 #define CFG_SYS_I2C_PCA953X_ADDR 0x20 #define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index fd8962e9f75..5774184300c 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -98,7 +98,7 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* PMIC */ -#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE3000_I2C_ADDR 0x08 /* FLASH and environment organization */ diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 842abb7b7a2..80386414f89 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -62,7 +62,7 @@ #define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE /* PMIC */ -#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 +#define CFG_POWER_PFUZE3000_I2C_ADDR 0x08 #define PFUZE3000_I2C_BUS 0 #endif /* __CONFIG_H */ -- cgit v1.2.3 From 7c5c137c4101c309d5c6ac2d29b202e5450960bb Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:37 -0500 Subject: global: Migrate CONFIG_PRAM to CFG Perform a simple rename of CONFIG_PRAM to CFG_PRAM Signed-off-by: Tom Rini --- include/configs/M5208EVBE.h | 2 +- include/configs/M5235EVB.h | 2 +- include/configs/M5249EVB.h | 2 +- include/configs/M53017EVB.h | 2 +- include/configs/M5329EVB.h | 2 +- include/configs/M5373EVB.h | 2 +- include/configs/am43xx_evm.h | 2 +- include/configs/km/pg-wcom-ls102xa.h | 2 +- include/configs/kmcent2.h | 2 +- include/configs/nokia_rx51.h | 2 +- include/configs/stmark2.h | 2 +- include/configs/ti_omap5_common.h | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index f7aba6e417f..a4fda551f1f 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -29,7 +29,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 166666666 /* CPU Core Clock */ #define CFG_SYS_PLL_ODR 0x36 diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 049516edf4a..8939c8e7ab9 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -39,7 +39,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 75000000 #define CFG_SYS_CPU_CLK CFG_SYS_CLK * 2 diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index c71130909fc..4fd539c0174 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -57,7 +57,7 @@ #define CFG_SYS_FLASH_BASE (CFG_SYS_CS0_BASE) #if 0 /* test-only */ -#define CONFIG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */ +#define CFG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */ #endif /* diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index b6d82c730c6..6359915e09a 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -42,7 +42,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 80000000 #define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d74a636fd7f..456135bdc64 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -34,7 +34,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 80000000 #define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index fa6f2d23e74..4e8dcb5ef7f 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -36,7 +36,7 @@ "save\0" \ "" -#define CONFIG_PRAM 512 /* 512 KB */ +#define CFG_PRAM 512 /* 512 KB */ #define CFG_SYS_CLK 80000000 #define CFG_SYS_CPU_CLK CFG_SYS_CLK * 3 diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index f43e00e8a2b..a2f73c47543 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -152,7 +152,7 @@ #if defined(CONFIG_TI_SECURE_DEVICE) /* Avoid relocating onto firewalled area at end of DRAM */ -#define CONFIG_PRAM (64 * 1024) +#define CFG_PRAM (64 * 1024) #endif /* CONFIG_TI_SECURE_DEVICE */ #endif /* __CONFIG_AM43XX_EVM_H */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index ffd394691a0..423bb773e93 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -9,7 +9,7 @@ #define CFG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CFG_SYS_INIT_RAM_SIZE OCRAM_SIZE -#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + \ +#define CFG_PRAM ((CONFIG_KM_PNVRAM + \ CONFIG_KM_PHRAM + \ CONFIG_KM_RESERVED_PRAM) >> 10) diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index a4b6a6e555d..33ee23ece1d 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -170,7 +170,7 @@ /* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable * is not valid yet, which is the case for when u-boot copies itself to RAM */ -#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM) >> 10) +#define CFG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM) >> 10) /* * IFC Definitions diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index a64b7b34dc1..54eea322dd3 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -169,6 +169,6 @@ #define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) /* Reserve protected RAM for attached kernel */ -#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1) +#define CFG_PRAM ((KERNEL_MAXSIZE >> 10)+1) #endif /* __CONFIG_H */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index fe2ba9a03b4..19589be270f 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -36,7 +36,7 @@ /* Input, PCI, Flexbus, and VCO */ -#define CONFIG_PRAM 2048 /* 2048 KB */ +#define CFG_PRAM 2048 /* 2048 KB */ #define CFG_SYS_MBAR 0xFC000000 diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index e9723ed5b3d..74a39c40785 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -279,7 +279,7 @@ * firewall violation, we tell u-boot that memory is protected RAM (PRAM) */ #if (CONFIG_TI_SECURE_EMIF_REGION_START == 0) -#define CONFIG_PRAM (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE) >> 10 +#define CFG_PRAM (CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE) >> 10 #endif #else /* -- cgit v1.2.3 From d4c8dd1e6f7ca7740acd20eb3c97e051be94c375 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:39 -0500 Subject: global: Migrate CONFIG_RAMDISK_ADDR to CFG Perform a simple rename of CONFIG_RAMDISK_ADDR to CFG_RAMDISK_ADDR Signed-off-by: Tom Rini --- include/configs/x86-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 5d461e8d0c6..f421ec58034 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -25,7 +25,7 @@ */ /* Default environment */ -#define CONFIG_RAMDISK_ADDR 0x4000000 +#define CFG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) #define CFG_OTHBOOTARGS "othbootargs=\0" #else -- cgit v1.2.3 From 3db78c830fda7cac7ef1a9b739f1a603bcfb58be Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:40 -0500 Subject: global: Migrate CONFIG_RESET_VECTOR_ADDRESS to CFG Perform a simple rename of CONFIG_RESET_VECTOR_ADDRESS to CFG_RESET_VECTOR_ADDRESS Signed-off-by: Tom Rini --- include/configs/P1010RDB.h | 8 ++++---- include/configs/P2041RDB.h | 8 ++++---- include/configs/T102xRDB.h | 10 +++++----- include/configs/T104xRDB.h | 8 ++++---- include/configs/T208xQDS.h | 10 +++++----- include/configs/T208xRDB.h | 10 +++++----- include/configs/T4240RDB.h | 8 ++++---- include/configs/kmcent2.h | 2 +- include/configs/p1_p2_rdb_pc.h | 4 ++-- 9 files changed, 34 insertions(+), 34 deletions(-) (limited to 'include') diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index b57e8638ab7..9efae58ce90 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -24,7 +24,7 @@ #ifdef CONFIG_SPIFLASH #ifdef CONFIG_NXP_ESBC -#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc +#define CFG_RESET_VECTOR_ADDRESS 0x110bfffc #else #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) @@ -52,11 +52,11 @@ #endif #ifdef CONFIG_NAND_SECBOOT /* NAND Boot */ -#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc +#define CFG_RESET_VECTOR_ADDRESS 0x110bfffc #endif -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif /* High Level Configuration Options */ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 6e755fc0a8f..28f53ae78a1 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -12,7 +12,7 @@ #define __CONFIG_H #ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE @@ -20,13 +20,13 @@ #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif /* High Level Configuration Options */ -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 063b864f9ff..7ee46abffdb 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -28,7 +28,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC +#define CFG_RESET_VECTOR_ADDRESS 0x30000FFC #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) #define CFG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) @@ -36,7 +36,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC +#define CFG_RESET_VECTOR_ADDRESS 0x30000FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST (0x30000000) #define CFG_SYS_MMC_U_BOOT_START (0x30000000) @@ -45,8 +45,8 @@ #endif /* CONFIG_RAMBOOT_PBL */ -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif /* @@ -87,7 +87,7 @@ #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9d04d30a538..f196bd76e6e 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -29,7 +29,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC +#define CFG_RESET_VECTOR_ADDRESS 0x30000FFC #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) #define CFG_SYS_SPI_FLASH_U_BOOT_START (0x30000000) @@ -37,7 +37,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC +#define CFG_RESET_VECTOR_ADDRESS 0x30000FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST (0x30000000) #define CFG_SYS_MMC_U_BOOT_START (0x30000000) @@ -48,8 +48,8 @@ /* High Level Configuration Options */ -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 3b98d25aa47..2023d7497f6 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -30,7 +30,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) #define CFG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) @@ -38,7 +38,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST (0x00200000) #define CFG_SYS_MMC_U_BOOT_START (0x00200000) @@ -52,11 +52,11 @@ #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 60c2947bfc1..f213d2de770 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -30,7 +30,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CFG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) #define CFG_SYS_SPI_FLASH_U_BOOT_START (0x00200000) @@ -38,7 +38,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST (0x00200000) #define CFG_SYS_MMC_U_BOOT_START (0x00200000) @@ -52,11 +52,11 @@ #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000) #define CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ (0x300000000ull | CFG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #endif -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 01a9f43cbae..506f1b7e268 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -16,13 +16,13 @@ #ifdef CONFIG_RAMBOOT_PBL #ifndef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CFG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_SDCARD -#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC +#define CFG_RESET_VECTOR_ADDRESS 0x200FFC #define CFG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CFG_SYS_MMC_U_BOOT_DST 0x00200000 #define CFG_SYS_MMC_U_BOOT_START 0x00200000 @@ -34,8 +34,8 @@ /* High Level Configuration Options */ -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 33ee23ece1d..58dff495ac5 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -122,7 +122,7 @@ /* High Level Configuration Options */ -#define CONFIG_RESET_VECTOR_ADDRESS 0xebfffffc +#define CFG_RESET_VECTOR_ADDRESS 0xebfffffc #define CFG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 41e7f53bd57..832ad9c3ece 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -105,8 +105,8 @@ #endif /* not CONFIG_TPL_BUILD */ #endif -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#ifndef CFG_RESET_VECTOR_ADDRESS +#define CFG_RESET_VECTOR_ADDRESS 0xeffffffc #endif #define CFG_SYS_CCSRBAR 0xffe00000 -- cgit v1.2.3 From dbfaeecf597b1fb1322f357b8253cc6198081f17 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:43 -0500 Subject: global: Migrate CONFIG_SCIF_A to CFG Perform a simple rename of CONFIG_SCIF_A to CFG_SCIF_A Signed-off-by: Tom Rini --- include/configs/stout.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/stout.h b/include/configs/stout.h index ee1abe691bf..ea5828b950b 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -23,7 +23,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SCIF */ -#define CONFIG_SCIF_A +#define CFG_SCIF_A /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -- cgit v1.2.3 From 77d0870c2901b28e003fa256c00d8570b2066cae Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:44 -0500 Subject: global: Migrate CONFIG_SCSI_DEV_LIST to CFG Perform a simple rename of CONFIG_SCSI_DEV_LIST to CFG_SCSI_DEV_LIST Signed-off-by: Tom Rini --- include/configs/ls1021aiot.h | 2 +- include/configs/ls1028ardb.h | 2 +- include/configs/ls1043ardb.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 8b5fba51c6f..53d9936f4e7 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -61,7 +61,7 @@ #ifndef PCI_DEVICE_ID_FREESCALE_AHCI #define PCI_DEVICE_ID_FREESCALE_AHCI 0x0440 #endif -#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \ +#define CFG_SCSI_DEV_LIST {PCI_VENDOR_ID_FREESCALE, \ PCI_DEVICE_ID_FREESCALE_AHCI} /* SPI */ diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 8c53636beac..ee4f885c534 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -52,7 +52,7 @@ /* SATA */ #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 -#define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} +#define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} /* Initial environment variables */ #ifndef SPL_NO_ENV diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index c8a6f0146aa..60362b6a4d0 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -203,7 +203,7 @@ #ifndef SPL_NO_SATA #define SCSI_VEND_ID 0x1b4b #define SCSI_DEV_ID 0x9170 -#define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} +#define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} #endif #include -- cgit v1.2.3 From 3cdd6302a5c6cc2f6b59b845f6f1fc31061b1dd2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:45 -0500 Subject: global: Migrate CONFIG_SC_TIMER_CLK to CFG Perform a simple rename of CONFIG_SC_TIMER_CLK to CFG_SC_TIMER_CLK Signed-off-by: Tom Rini --- include/configs/mx6_common.h | 2 +- include/configs/mx7_common.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index dd8cabc2e93..0b8233de8c4 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -9,7 +9,7 @@ #include #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) -#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ +#define CFG_SC_TIMER_CLK 8000000 /* 8Mhz */ #else #ifndef CONFIG_SYS_L2CACHE_OFF #define CFG_SYS_PL310_BASE L2_PL310_BASE diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 6e14b4fbf05..a542839ce1d 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -14,7 +14,7 @@ #include /* Timer settings */ -#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ +#define CFG_SC_TIMER_CLK 8000000 /* 8Mhz */ /* Miscellaneous configurable options */ -- cgit v1.2.3 From ddc418703353f00215962bc083523784a1c01c32 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:46 -0500 Subject: global: Migrate CONFIG_SET_DFU_ALT_BUF_LEN to CFG Perform a simple rename of CONFIG_SET_DFU_ALT_BUF_LEN to CFG_SET_DFU_ALT_BUF_LEN Signed-off-by: Tom Rini --- include/configs/odroid.h | 2 +- include/configs/odroid_xu3.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/odroid.h b/include/configs/odroid.h index 3ac13a65d63..560a23c23ef 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -37,7 +37,7 @@ ""PARTS_BOOT" part 0 1;" \ ""PARTS_ROOT" part 0 2\0" \ -#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) +#define CFG_SET_DFU_ALT_BUF_LEN (SZ_1K) #define CFG_DFU_ALT_BOOT_EMMC \ "u-boot raw 0x3e 0x800 mmcpart 1;" \ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 7304851d0f3..58b5ee6ea0a 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -49,7 +49,7 @@ "params.bin raw 0x1880 0x20\0" /* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */ -#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) +#define CFG_SET_DFU_ALT_BUF_LEN (SZ_1K) /* Set soc_rev, soc_id, board_rev, board_name, fdtfile */ #define CFG_ODROID_REV_AIN 9 -- cgit v1.2.3 From 24513c3ac85456e8c8256b83ecc44ccaedcee65a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:47 -0500 Subject: global: Migrate CONFIG_SH_ETHER_ALIGNE_SIZE to CFG Perform a simple rename of CONFIG_SH_ETHER_ALIGNE_SIZE to CFG_SH_ETHER_ALIGNE_SIZE Signed-off-by: Tom Rini --- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/alt.h b/include/configs/alt.h index 29f4d06b7f8..f06ceed47f0 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -26,7 +26,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/condor.h b/include/configs/condor.h index 819184996e6..6d7c788163d 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -19,7 +19,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ /* XTAL_CLK : 33.33MHz */ diff --git a/include/configs/gose.h b/include/configs/gose.h index 45f0ec6f6a0..93157de470b 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index dd6b22de7ba..5b91e6ff039 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -22,6 +22,6 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 #endif /* __GRPEACH_H */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 61ff80d2c98..ff02a875013 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/lager.h b/include/configs/lager.h index 777d5b94d1c..83e8705dfe7 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -26,7 +26,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/porter.h b/include/configs/porter.h index 202bd914d50..8f834f2c7eb 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -27,7 +27,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/silk.h b/include/configs/silk.h index 9114a057582..80fce05b399 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -27,7 +27,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/stout.h b/include/configs/stout.h index ea5828b950b..d8f0fb18563 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -31,7 +31,7 @@ #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE -#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ -- cgit v1.2.3 From c253cea724555890f533c8446fc53eff01ec39a0 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:48 -0500 Subject: global: Migrate CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG Perform a simple rename of CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG_SH_ETHER_CACHE_INVALIDATE Signed-off-by: Tom Rini --- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/alt.h b/include/configs/alt.h index f06ceed47f0..7a29157ef44 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/condor.h b/include/configs/condor.h index 6d7c788163d..fa3edef9b30 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -18,7 +18,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/gose.h b/include/configs/gose.h index 93157de470b..e54f4b24e04 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 5b91e6ff039..5ae17f70e90 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -21,7 +21,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 #endif /* __GRPEACH_H */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index ff02a875013..1d8aa6def88 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/lager.h b/include/configs/lager.h index 83e8705dfe7..bb8cc5fecb7 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/porter.h b/include/configs/porter.h index 8f834f2c7eb..143e9a4672f 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -26,7 +26,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/silk.h b/include/configs/silk.h index 80fce05b399..2d1e23c2745 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -26,7 +26,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/stout.h b/include/configs/stout.h index d8f0fb18563..9e05a7ae6f9 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -30,7 +30,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ -- cgit v1.2.3 From ff53ecc3877c6f4b1cc035a44b43b9c50e1fabc8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:49 -0500 Subject: global: Migrate CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG Perform a simple rename of CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG_SH_ETHER_CACHE_WRITEBACK Signed-off-by: Tom Rini --- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/alt.h b/include/configs/alt.h index 7a29157ef44..2b783252734 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/condor.h b/include/configs/condor.h index fa3edef9b30..3f99cbf9dab 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -17,7 +17,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/gose.h b/include/configs/gose.h index e54f4b24e04..45a537341b0 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -23,7 +23,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 5ae17f70e90..3fde6140709 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -20,7 +20,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 1d8aa6def88..b3b6f03e08d 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -23,7 +23,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/lager.h b/include/configs/lager.h index bb8cc5fecb7..16d15ccdd91 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/porter.h b/include/configs/porter.h index 143e9a4672f..f217141af8c 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/silk.h b/include/configs/silk.h index 2d1e23c2745..09c23d379e9 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/stout.h b/include/configs/stout.h index 9e05a7ae6f9..dd44b3e6d00 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -29,7 +29,7 @@ #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII -#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 -- cgit v1.2.3 From 7c480bab146f830220f1feef00ad1b9a5a64c6cb Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:50 -0500 Subject: global: Migrate CONFIG_SH_ETHER_PHY_ADDR to CFG Perform a simple rename of CONFIG_SH_ETHER_PHY_ADDR to CFG_SH_ETHER_PHY_ADDR Signed-off-by: Tom Rini --- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/alt.h b/include/configs/alt.h index 2b783252734..06ab5ce669b 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/condor.h b/include/configs/condor.h index 3f99cbf9dab..43b88f12721 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -15,7 +15,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/gose.h b/include/configs/gose.h index 45a537341b0..5184db41061 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -21,7 +21,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 3fde6140709..8ba9b73672c 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -18,7 +18,7 @@ /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0 +#define CFG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index b3b6f03e08d..2910336def6 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -21,7 +21,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/lager.h b/include/configs/lager.h index 16d15ccdd91..815239a73bd 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/porter.h b/include/configs/porter.h index f217141af8c..f732aeb47b5 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/silk.h b/include/configs/silk.h index 09c23d379e9..005eed15494 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE diff --git a/include/configs/stout.h b/include/configs/stout.h index dd44b3e6d00..cf90e4d4645 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -27,7 +27,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 -#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CFG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE -- cgit v1.2.3 From 85b55117085fd6912f1c06eb74d864c44f515e66 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:51 -0500 Subject: global: Migrate CONFIG_SH_ETHER_PHY_MODE to CFG Perform a simple rename of CONFIG_SH_ETHER_PHY_MODE to CFG_SH_ETHER_PHY_MODE Signed-off-by: Tom Rini --- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/alt.h b/include/configs/alt.h index 06ab5ce669b..53c31562a5d 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/condor.h b/include/configs/condor.h index 43b88f12721..2c9817cf02c 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -16,7 +16,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/gose.h b/include/configs/gose.h index 5184db41061..ed7dd70dd96 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 8ba9b73672c..6a11aa61f0f 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -19,7 +19,7 @@ /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 2910336def6..31d0795f07f 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -22,7 +22,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/lager.h b/include/configs/lager.h index 815239a73bd..991fc9020ee 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -23,7 +23,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/porter.h b/include/configs/porter.h index f732aeb47b5..1587c5c5397 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -24,7 +24,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/silk.h b/include/configs/silk.h index 005eed15494..21100c46b1c 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -24,7 +24,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 diff --git a/include/configs/stout.h b/include/configs/stout.h index cf90e4d4645..51f4420ed6f 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -28,7 +28,7 @@ /* SH Ether */ #define CONFIG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK #define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 -- cgit v1.2.3 From 97148cb6142b2507972459b8f578c04717a52c40 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:52 -0500 Subject: global: Migrate CONFIG_SH_ETHER_USE_PORT to CFG Perform a simple rename of CONFIG_SH_ETHER_USE_PORT to CFG_SH_ETHER_USE_PORT Signed-off-by: Tom Rini --- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/alt.h b/include/configs/alt.h index 53c31562a5d..8f03762583e 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -21,7 +21,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/condor.h b/include/configs/condor.h index 2c9817cf02c..50c8d173383 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -14,7 +14,7 @@ /* Environment compatibility */ /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/gose.h b/include/configs/gose.h index ed7dd70dd96..7ae0726518d 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -20,7 +20,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512u * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 6a11aa61f0f..8de4a36e931 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -17,7 +17,7 @@ #define CFG_SYS_SDRAM_SIZE (10 * 1024 * 1024) /* Network interface */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 31d0795f07f..d47d70178cc 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -20,7 +20,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/lager.h b/include/configs/lager.h index 991fc9020ee..2577c7a7da6 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -21,7 +21,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/porter.h b/include/configs/porter.h index 1587c5c5397..2cb430be8b0 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -22,7 +22,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/silk.h b/include/configs/silk.h index 21100c46b1c..7bed32d8553 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -22,7 +22,7 @@ #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK diff --git a/include/configs/stout.h b/include/configs/stout.h index 51f4420ed6f..1278ba63f4f 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -26,7 +26,7 @@ #define CFG_SCIF_A /* SH Ether */ -#define CONFIG_SH_ETHER_USE_PORT 0 +#define CFG_SH_ETHER_USE_PORT 0 #define CFG_SH_ETHER_PHY_ADDR 0x1 #define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CFG_SH_ETHER_CACHE_WRITEBACK -- cgit v1.2.3 From 59f3a09a6c86e99f9790f9b534465b035863a5b4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:53 -0500 Subject: global: Migrate CONFIG_SLIC to CFG Perform a simple rename of CONFIG_SLIC to CFG_SLIC Signed-off-by: Tom Rini --- include/configs/p1_p2_rdb_pc.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 832ad9c3ece..be768019829 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -13,7 +13,7 @@ #include #if defined(CONFIG_TARGET_P1020RDB_PC) -#define CONFIG_SLIC +#define CFG_SLIC #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0x5c #define __SW_BOOT_SPI 0x1c @@ -42,7 +42,7 @@ * 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off */ #if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_SLIC +#define CFG_SLIC #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0x64 #define __SW_BOOT_SPI 0x34 -- cgit v1.2.3 From 3e204427c8369d6c34c2beaac29a539a55c7be4f Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:54 -0500 Subject: global: Migrate CONFIG_SMP_PEN_ADDR to CFG Perform a simple rename of CONFIG_SMP_PEN_ADDR to CFG_SMP_PEN_ADDR Signed-off-by: Tom Rini --- include/configs/arndale.h | 2 +- include/configs/km/pg-wcom-ls102xa.h | 2 +- include/configs/ls1021aiot.h | 2 +- include/configs/ls1021aqds.h | 2 +- include/configs/ls1021atwr.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 8acc525b11c..b56effcd411 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -16,7 +16,7 @@ /* Miscellaneous configurable options */ -#define CONFIG_SMP_PEN_ADDR 0x02020000 +#define CFG_SMP_PEN_ADDR 0x02020000 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CFG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 423bb773e93..15ef68a0507 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -158,7 +158,7 @@ {1, {I2C_NULL_HOP} }, \ } -#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CFG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 53d9936f4e7..83ab94ec444 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -68,7 +68,7 @@ #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie" -#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CFG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 78432e55811..e4e5522a238 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -242,7 +242,7 @@ * MMC */ -#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CFG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index a387eeab472..eb8fb042723 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -133,7 +133,7 @@ /* GPIO */ -#define CONFIG_SMP_PEN_ADDR 0x01ee0200 +#define CFG_SMP_PEN_ADDR 0x01ee0200 #define HWCONFIG_BUFFER_SIZE 256 -- cgit v1.2.3 From 6786ce1ce14feb4d02854a0c04bc0cce505be46e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:55 -0500 Subject: global: Migrate CONFIG_STACKBASE to CFG Perform a simple rename of CONFIG_STACKBASE to CFG_STACKBASE Signed-off-by: Tom Rini --- include/configs/tegra-common.h | 2 +- include/configs/tegra114-common.h | 2 +- include/configs/tegra124-common.h | 2 +- include/configs/tegra20-common.h | 2 +- include/configs/tegra30-common.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 66cf7ae5847..bde7ffce008 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -45,7 +45,7 @@ #define CFG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ #ifndef CONFIG_ARM64 -#define CFG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE +#define CFG_SYS_INIT_RAM_ADDR CFG_STACKBASE #define CFG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN /* Defines for SPL */ diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 87ec1f5a99d..ab4fa5504c5 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -15,7 +15,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x83800000 /* 56MB */ +#define CFG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 0485fea6ccb..b413e251212 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -17,7 +17,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x83800000 /* 56MB */ +#define CFG_STACKBASE 0x83800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 617bfb2197c..a313ac2041a 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -16,7 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x03800000 /* 56MB */ +#define CFG_STACKBASE 0x03800000 /* 56MB */ /*----------------------------------------------------------------------- * Physical Memory Map diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 04fcf11ed82..c57d2d157e3 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -16,7 +16,7 @@ /* * Miscellaneous configurable options */ -#define CONFIG_STACKBASE 0x83800000 /* 56MB */ +#define CFG_STACKBASE 0x83800000 /* 56MB */ /* * Memory layout for where various images get loaded by boot scripts: -- cgit v1.2.3 From e02e5e5188b94a084e46fccf455026cef4c6d01a Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:56 -0500 Subject: global: Migrate CONFIG_STD_DEVICES_SETTINGS to CFG Perform a simple rename of CONFIG_STD_DEVICES_SETTINGS to CFG_STD_DEVICES_SETTINGS Signed-off-by: Tom Rini --- include/configs/bayleybay.h | 2 +- include/configs/cherryhill.h | 2 +- include/configs/chromebook_coral.h | 4 ++-- include/configs/chromebook_samus.h | 4 ++-- include/configs/conga-qeval20-qa3-e3845.h | 2 +- include/configs/coreboot.h | 2 +- include/configs/cougarcanyon2.h | 2 +- include/configs/crownbay.h | 2 +- include/configs/dfi-bt700.h | 2 +- include/configs/efi-x86_app.h | 2 +- include/configs/efi-x86_payload.h | 2 +- include/configs/galileo.h | 2 +- include/configs/minnowmax.h | 2 +- include/configs/qemu-x86.h | 2 +- include/configs/slimbootloader.h | 4 ++-- include/configs/som-db5800-som-6867.h | 2 +- include/configs/theadorable-x86-common.h | 2 +- include/configs/x86-chromebook.h | 2 +- include/configs/x86-common.h | 2 +- 19 files changed, 22 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/include/configs/bayleybay.h b/include/configs/bayleybay.h index b347125f2fa..b0df328cd84 100644 --- a/include/configs/bayleybay.h +++ b/include/configs/bayleybay.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/cherryhill.h b/include/configs/cherryhill.h index 726c43d35ea..d6ce70a96ae 100644 --- a/include/configs/cherryhill.h +++ b/include/configs/cherryhill.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h index d14c1d445b2..43fdc394416 100644 --- a/include/configs/chromebook_coral.h +++ b/include/configs/chromebook_coral.h @@ -13,8 +13,8 @@ #include #include -#undef CONFIG_STD_DEVICES_SETTINGS -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ +#undef CFG_STD_DEVICES_SETTINGS +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index e29be3fda4a..03a1033c573 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -15,8 +15,8 @@ #include #include -#undef CONFIG_STD_DEVICES_SETTINGS -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ +#undef CFG_STD_DEVICES_SETTINGS +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/conga-qeval20-qa3-e3845.h b/include/configs/conga-qeval20-qa3-e3845.h index 6f431725269..60617e6fec2 100644 --- a/include/configs/conga-qeval20-qa3-e3845.h +++ b/include/configs/conga-qeval20-qa3-e3845.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index f73004386fd..b4f49bf5289 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -15,7 +15,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/cougarcanyon2.h b/include/configs/cougarcanyon2.h index b64c7df1b25..31639e48da8 100644 --- a/include/configs/cougarcanyon2.h +++ b/include/configs/cougarcanyon2.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vga\0" \ "stderr=serial,vga\0" diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index ff74deb3d40..387bb8800e8 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/dfi-bt700.h b/include/configs/dfi-bt700.h index d10422b6c1c..05389a435be 100644 --- a/include/configs/dfi-bt700.h +++ b/include/configs/dfi-bt700.h @@ -16,7 +16,7 @@ /* Use BayTrail internal HS UART which is memory-mapped */ #endif -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h index 17a78514026..843ed8b9d1d 100644 --- a/include/configs/efi-x86_app.h +++ b/include/configs/efi-x86_app.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=vidconsole\0" \ "stderr=vidconsole\0" diff --git a/include/configs/efi-x86_payload.h b/include/configs/efi-x86_payload.h index f50c2ce4dd0..c72b067c367 100644 --- a/include/configs/efi-x86_payload.h +++ b/include/configs/efi-x86_payload.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/galileo.h b/include/configs/galileo.h index 472f236b9b6..0380ac287be 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -14,7 +14,7 @@ /* ns16550 UART is memory-mapped in Quark SoC */ -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 6c15c72efda..4a12c2f72c6 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" \ "usb_pgood_delay=40\0" diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 5cd13887084..33263a46a40 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -22,7 +22,7 @@ #include #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/slimbootloader.h b/include/configs/slimbootloader.h index 748a423b083..20b99a1021d 100644 --- a/include/configs/slimbootloader.h +++ b/include/configs/slimbootloader.h @@ -8,7 +8,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS \ +#define CFG_STD_DEVICES_SETTINGS \ "stdin=serial,i8042-kbd,usbkbd\0" \ "stdout=serial\0" \ "stderr=serial\0" @@ -18,7 +18,7 @@ */ #undef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ - CONFIG_STD_DEVICES_SETTINGS \ + CFG_STD_DEVICES_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ "ramdiskaddr=0x4000000\0" \ diff --git a/include/configs/som-db5800-som-6867.h b/include/configs/som-db5800-som-6867.h index f0970921367..b2e7aa1514c 100644 --- a/include/configs/som-db5800-som-6867.h +++ b/include/configs/som-db5800-som-6867.h @@ -12,7 +12,7 @@ #include -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial,usbkbd\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" diff --git a/include/configs/theadorable-x86-common.h b/include/configs/theadorable-x86-common.h index 746995179f9..b23b8783076 100644 --- a/include/configs/theadorable-x86-common.h +++ b/include/configs/theadorable-x86-common.h @@ -11,7 +11,7 @@ #ifndef __THEADORABLE_X86_COMMON_H #define __THEADORABLE_X86_COMMON_H -#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 9df3bfd527f..41fb499ae4f 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -12,7 +12,7 @@ #define VIDEO_IO_OFFSET 0 -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ +#define CFG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ "stderr=vidconsole,serial\0" diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index f421ec58034..c1c5a09a35c 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -44,7 +44,7 @@ #define CFG_EXTRA_ENV_SETTINGS \ DISTRO_BOOTENV \ - CONFIG_STD_DEVICES_SETTINGS \ + CFG_STD_DEVICES_SETTINGS \ SPLASH_SETTINGS \ "pciconfighost=1\0" \ "netdev=eth0\0" \ -- cgit v1.2.3 From d8964b3e1d7233a1b45679c57985575ec0056022 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:57 -0500 Subject: global: Migrate CONFIG_SYS_I2C_DIRECT_BUS to CFG Perform a simple rename of CONFIG_SYS_I2C_DIRECT_BUS to CFG_SYS_I2C_DIRECT_BUS Signed-off-by: Tom Rini --- include/i2c.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/i2c.h b/include/i2c.h index 3811b26c08e..ef3820eaba7 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -635,12 +635,12 @@ void i2c_early_init_f(void); #if !defined(CFG_SYS_I2C_MAX_HOPS) /* no muxes used bus = i2c adapters */ -#define CONFIG_SYS_I2C_DIRECT_BUS 1 +#define CFG_SYS_I2C_DIRECT_BUS 1 #define CFG_SYS_I2C_MAX_HOPS 0 #define CFG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c) #else /* we use i2c muxes */ -#undef CONFIG_SYS_I2C_DIRECT_BUS +#undef CFG_SYS_I2C_DIRECT_BUS #endif /* define the I2C bus number for RTC and DTT if not already done */ @@ -691,7 +691,7 @@ struct i2c_adapter { struct i2c_adapter *i2c_get_adapter(int index); -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS struct i2c_mux { int id; char name[16]; @@ -720,7 +720,7 @@ extern struct i2c_bus_hose i2c_bus[]; #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus) #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr) -#ifndef CONFIG_SYS_I2C_DIRECT_BUS +#ifndef CFG_SYS_I2C_DIRECT_BUS #define I2C_MUX_PCA9540_ID 1 #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"} #define I2C_MUX_PCA9542_ID 2 -- cgit v1.2.3 From e660e972c44f53c8d90dfcb2d6b3564b325bec66 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:58 -0500 Subject: global: Migrate CONFIG_TEGRA_BOARD_STRING to CFG Perform a simple rename of CONFIG_TEGRA_BOARD_STRING to CFG_TEGRA_BOARD_STRING Signed-off-by: Tom Rini --- include/configs/beaver.h | 2 +- include/configs/cardhu.h | 2 +- include/configs/cei-tk1-som.h | 2 +- include/configs/dalmore.h | 2 +- include/configs/harmony.h | 2 +- include/configs/jetson-tk1.h | 2 +- include/configs/medcom-wide.h | 2 +- include/configs/nyan-big.h | 2 +- include/configs/p2371-0000.h | 2 +- include/configs/p2371-2180.h | 2 +- include/configs/p2571.h | 2 +- include/configs/p2771-0000.h | 2 +- include/configs/p3450-0000.h | 2 +- include/configs/paz00.h | 2 +- include/configs/plutux.h | 2 +- include/configs/seaboard.h | 2 +- include/configs/tec-ng.h | 2 +- include/configs/tec.h | 2 +- include/configs/trimslice.h | 2 +- include/configs/venice2.h | 2 +- include/configs/ventana.h | 2 +- 21 files changed, 21 insertions(+), 21 deletions(-) (limited to 'include') diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 7e0e4779607..e622b7127e3 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -11,7 +11,7 @@ #include "tegra30-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Beaver" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 64d713a1969..82729eb95cf 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -11,7 +11,7 @@ #include "tegra30-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Cardhu" #define BOARD_EXTRA_ENV_SETTINGS \ "board_name=cardhu-a04\0" \ diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index e49eb602081..fbd38b77fe5 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -16,7 +16,7 @@ #include "tegra124-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "CEI tk1-som" +#define CFG_TEGRA_BOARD_STRING "CEI tk1-som" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index c9009e39623..095554157fa 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -11,7 +11,7 @@ #include "tegra114-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Dalmore" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/harmony.h b/include/configs/harmony.h index a1a66bfb64e..cae7acdb70b 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -11,7 +11,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Harmony" /* Board-specific serial config */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index aa9e1d811a5..9858f8ff2b5 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -12,7 +12,7 @@ #include "tegra124-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index efac0febdf8..8dbe741278a 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -12,7 +12,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" +#define CFG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index e885526e625..c04d402deb0 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -12,7 +12,7 @@ #include "tegra124-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" +#define CFG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index f426889e1c4..a29d7135d0b 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -12,7 +12,7 @@ #include "tegra210-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-0000" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P2371-0000" /* Board-specific serial config */ diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 24adf4e13f0..0b077aba659 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -12,7 +12,7 @@ #include "tegra210-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2371-2180" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P2371-2180" /* Board-specific serial config */ diff --git a/include/configs/p2571.h b/include/configs/p2571.h index 8a1e7d9b968..5155aa7b1dd 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -12,7 +12,7 @@ #include "tegra210-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P2571" /* Board-specific serial config */ diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h index 84cdd571962..e409cc3896d 100644 --- a/include/configs/p2771-0000.h +++ b/include/configs/p2771-0000.h @@ -11,7 +11,7 @@ #include "tegra186-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P2771-0000" /* Environment in eMMC, at the end of 2nd "boot sector" */ diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h index 078d35dde2c..e60f42eaa72 100644 --- a/include/configs/p3450-0000.h +++ b/include/configs/p3450-0000.h @@ -11,7 +11,7 @@ #include "tegra210-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" +#define CFG_TEGRA_BOARD_STRING "NVIDIA P3450-0000" /* Board-specific serial config */ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 898167009f6..950b3217642 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -13,7 +13,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Compal Paz00" +#define CFG_TEGRA_BOARD_STRING "Compal Paz00" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 1d8ac618c0b..30bfce9f503 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -12,7 +12,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Plutux" +#define CFG_TEGRA_BOARD_STRING "Avionic Design Plutux" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index e5d672746b1..8e98620422d 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -12,7 +12,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Seaboard" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index ae879abe3f8..5e49abb49fa 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -10,7 +10,7 @@ #include "tegra30-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" +#define CFG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/tec.h b/include/configs/tec.h index e8a9df756d5..05dd7c96f61 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -12,7 +12,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" +#define CFG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index b5bf9912201..7d1ff2afd14 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -11,7 +11,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice" +#define CFG_TEGRA_BOARD_STRING "Compulab Trimslice" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 970893ca17b..353b5ea67c1 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -12,7 +12,7 @@ #include "tegra124-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Venice2" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE diff --git a/include/configs/ventana.h b/include/configs/ventana.h index e7b7b911d9b..1d9c60ca7c6 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -11,7 +11,7 @@ #include "tegra20-common.h" /* High-level configuration options */ -#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Ventana" +#define CFG_TEGRA_BOARD_STRING "NVIDIA Ventana" /* Board-specific serial config */ #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE -- cgit v1.2.3 From 77cfb3d345651fa1cf78c8f30eca9d6d285f1e0b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:13:59 -0500 Subject: global: Migrate CONFIG_TESTPIN_MASK to CFG Perform a simple rename of CONFIG_TESTPIN_MASK to CFG_TESTPIN_MASK Signed-off-by: Tom Rini --- include/configs/kmcoge5ne.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index e0f94aead79..d9c2f4fc4f9 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -31,6 +31,6 @@ #define CFG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ #define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END #define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */ -#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ +#define CFG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ #endif /* CONFIG */ -- cgit v1.2.3 From 39d4e7b0b060c47879d1f2727853a3e7e38191b5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:00 -0500 Subject: global: Migrate CONFIG_TESTPIN_REG to CFG Perform a simple rename of CONFIG_TESTPIN_REG to CFG_TESTPIN_REG Signed-off-by: Tom Rini --- include/configs/kmcoge5ne.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index d9c2f4fc4f9..d52f45ba911 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -30,7 +30,7 @@ #define CFG_POST (CFG_SYS_POST_MEMORY|CFG_SYS_POST_MEM_REGIONS) #define CFG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ #define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END -#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */ +#define CFG_TESTPIN_REG gprt3 /* for kmcoge5ne */ #define CFG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ #endif /* CONFIG */ -- cgit v1.2.3 From 805482d1874d1d06da89d71fcf0f9a46945f7836 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:02 -0500 Subject: global: Migrate CONFIG_USART_BASE to CFG Perform a simple rename of CONFIG_USART_BASE to CFG_USART_BASE Signed-off-by: Tom Rini --- include/configs/corvus.h | 2 +- include/configs/sam9x60_curiosity.h | 2 +- include/configs/sam9x60ek.h | 2 +- include/configs/smartweb.h | 2 +- include/configs/taurus.h | 2 +- include/configs/vinco.h | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 8a61086ecc1..c9eb75d9308 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -28,7 +28,7 @@ #define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* serial console */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS /* SDRAM */ diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index f44ce909b91..204020d5ee7 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -13,7 +13,7 @@ #define CFG_SYS_AT91_SLOW_CLOCK 32768 #define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID 0 /* ignored in arm */ /* SDRAM */ diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 27b39ebf417..800b98ff98a 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -14,7 +14,7 @@ #define CFG_SYS_AT91_SLOW_CLOCK 32768 #define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID 0 /* ignored in arm */ /* diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 762f61470b1..f9a5aa9e32d 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -61,7 +61,7 @@ #define CFG_SYS_NAND_READY_PIN AT91_PIN_PC13 /* serial console */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS /* DFU class support */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 855218a8901..88870d6fdf6 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -34,7 +34,7 @@ /* Misc CPU related */ -#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CFG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS /* diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 0698ae1d1c6..3b4032301f6 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -17,7 +17,7 @@ /* The value in the common file is too far away for the VInCo platform */ /* serial console */ -#define CONFIG_USART_BASE 0xfc00c000 +#define CFG_USART_BASE 0xfc00c000 #define CONFIG_USART_ID 30 /* Timer */ -- cgit v1.2.3 From 61693acbce16dd674de9d6193fbfaffc739f4829 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:03 -0500 Subject: global: Migrate CONFIG_USART_ID to CFG Perform a simple rename of CONFIG_USART_ID to CFG_USART_ID Signed-off-by: Tom Rini --- include/configs/corvus.h | 2 +- include/configs/sam9x60_curiosity.h | 2 +- include/configs/sam9x60ek.h | 2 +- include/configs/smartweb.h | 2 +- include/configs/taurus.h | 2 +- include/configs/vinco.h | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/corvus.h b/include/configs/corvus.h index c9eb75d9308..f2675e0ec86 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -29,7 +29,7 @@ /* serial console */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS +#define CFG_USART_ID ATMEL_ID_SYS /* SDRAM */ #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6 diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index 204020d5ee7..e79f80f17f6 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -14,7 +14,7 @@ #define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID 0 /* ignored in arm */ +#define CFG_USART_ID 0 /* ignored in arm */ /* SDRAM */ #define CFG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 800b98ff98a..2c761821efb 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -15,7 +15,7 @@ #define CFG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID 0 /* ignored in arm */ +#define CFG_USART_ID 0 /* ignored in arm */ /* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index f9a5aa9e32d..75a1670e331 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -62,7 +62,7 @@ /* serial console */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS +#define CFG_USART_ID ATMEL_ID_SYS /* DFU class support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 88870d6fdf6..174b848e259 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -35,7 +35,7 @@ /* Misc CPU related */ #define CFG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS +#define CFG_USART_ID ATMEL_ID_SYS /* * SDRAM: 1 bank, min 32, max 128 MB diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 3b4032301f6..68c56df5435 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -18,7 +18,7 @@ /* serial console */ #define CFG_USART_BASE 0xfc00c000 -#define CONFIG_USART_ID 30 +#define CFG_USART_ID 30 /* Timer */ #define CFG_SYS_TIMER_COUNTER 0xfc06863c -- cgit v1.2.3 From 1d0eaf2f32353424063686478a34a56dfa251416 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:04 -0500 Subject: global: Migrate CONFIG_USB_ISP1301_I2C_ADDR to CFG Perform a simple rename of CONFIG_USB_ISP1301_I2C_ADDR to CFG_USB_ISP1301_I2C_ADDR Signed-off-by: Tom Rini --- include/configs/devkit3250.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 9cfee381d4a..d85aeaafe51 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -53,7 +53,7 @@ /* * USB */ -#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d +#define CFG_USB_ISP1301_I2C_ADDR 0x2d /* * U-Boot General Configurations -- cgit v1.2.3 From 438654c87c0ec20019c2489ecce02919005b91bc Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:05 -0500 Subject: global: Migrate CONFIG_VSC7385_IMAGE et al to CFG Perform simple renames of: CONFIG_VSC7385_IMAGE to CFG_VSC7385_IMAGE CONFIG_VSC7385_IMAGE_SIZE to CFG_VSC7385_IMAGE_SIZE Signed-off-by: Tom Rini --- include/configs/MPC837XERDB.h | 4 ++-- include/configs/p1_p2_rdb_pc.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 07c989d9890..70b1c399241 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -42,8 +42,8 @@ #ifdef CONFIG_VSC7385_ENET /* The flash address and size of the VSC7385 firmware image */ -#define CONFIG_VSC7385_IMAGE 0xFE7FE000 -#define CONFIG_VSC7385_IMAGE_SIZE 8192 +#define CFG_VSC7385_IMAGE 0xFE7FE000 +#define CFG_VSC7385_IMAGE_SIZE 8192 #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index be768019829..f5bd0913449 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -270,7 +270,7 @@ #endif /* The size of the VSC7385 firmware image */ -#define CONFIG_VSC7385_IMAGE_SIZE 8192 +#define CFG_VSC7385_IMAGE_SIZE 8192 #endif #ifndef __VSCFW_ADDR -- cgit v1.2.3 From bb34410509205e70ab7c9830f9c17277e8dd54ad Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:06 -0500 Subject: global: Migrate CONFIG_WATCHDOG_PRESC et al to CFG Perform simple renames of: CONFIG_WATCHDOG_PRESC to CFG_WATCHDOG_PRESC CONFIG_WATCHDOG_RC to CFG_WATCHDOG_RC Signed-off-by: Tom Rini --- include/configs/kmcent2.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 58dff495ac5..60fea59dee0 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -364,8 +364,8 @@ int get_scl(void); /* * Hardware Watchdog */ -#define CONFIG_WATCHDOG_PRESC 34 /* wdog prescaler 2^(64-34) ~10min */ -#define CONFIG_WATCHDOG_RC WRC_CHIP /* reset chip on watchdog event */ +#define CFG_WATCHDOG_PRESC 34 /* wdog prescaler 2^(64-34) ~10min */ +#define CFG_WATCHDOG_RC WRC_CHIP /* reset chip on watchdog event */ /* * For booting Linux, the board info and command line data -- cgit v1.2.3 From fa2fd534b5d80d59b9043f2d8291fcb1c6c75a5b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:07 -0500 Subject: global: Migrate CONFIG_X86_MRC_ADDR to CFG Perform a simple rename of CONFIG_X86_MRC_ADDR to CFG_X86_MRC_ADDR Signed-off-by: Tom Rini --- include/configs/x86-chromebook.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 41fb499ae4f..059e3a0d8a2 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -6,7 +6,7 @@ #ifndef _X86_CHROMEBOOK_H #define _X86_CHROMEBOOK_H -#define CONFIG_X86_MRC_ADDR 0xfffa0000 +#define CFG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0 -- cgit v1.2.3 From d4143373f161984426f0bd1fda1cbced21e57272 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:08 -0500 Subject: global: Migrate CONFIG_X86_REFCODE_ADDR to CFG Perform a simple rename of CONFIG_X86_REFCODE_ADDR to CFG_X86_REFCODE_ADDR Signed-off-by: Tom Rini --- include/configs/x86-chromebook.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 059e3a0d8a2..8bbbe51ecb5 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -7,7 +7,7 @@ #define _X86_CHROMEBOOK_H #define CFG_X86_MRC_ADDR 0xfffa0000 -#define CONFIG_X86_REFCODE_ADDR 0xffea0000 +#define CFG_X86_REFCODE_ADDR 0xffea0000 #define CONFIG_X86_REFCODE_RUN_ADDR 0 #define VIDEO_IO_OFFSET 0 -- cgit v1.2.3 From 92a5c899987301f6b53ef37e46ea96ce9abb752e Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:09 -0500 Subject: global: Migrate CONFIG_X86_REFCODE_RUN_ADDR to CFG Perform a simple rename of CONFIG_X86_REFCODE_RUN_ADDR to CFG_X86_REFCODE_RUN_ADDR Signed-off-by: Tom Rini --- include/configs/x86-chromebook.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 8bbbe51ecb5..98abb00927a 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -8,7 +8,7 @@ #define CFG_X86_MRC_ADDR 0xfffa0000 #define CFG_X86_REFCODE_ADDR 0xffea0000 -#define CONFIG_X86_REFCODE_RUN_ADDR 0 +#define CFG_X86_REFCODE_RUN_ADDR 0 #define VIDEO_IO_OFFSET 0 -- cgit v1.2.3 From e1d6c16d80cbe510f524d68a1879ed0fab26a80b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:10 -0500 Subject: librem5: Rename CONFIG_POWER_BD71837 symbols Rename the CONFIG_POWER_BD71837_I2C_* symbols to not have the CONFIG prefix and be local to the file they are used in. Signed-off-by: Tom Rini --- include/configs/librem5.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/librem5.h b/include/configs/librem5.h index 9e4d373e56d..e17190ce9c5 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -19,10 +19,6 @@ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ -#define CONFIG_POWER_BD71837 -#define CONFIG_POWER_BD71837_I2C_BUS 0 -#define CONFIG_POWER_BD71837_I2C_ADDR 0x4B - #endif /* CONFIG_SPL_BUILD*/ #define CFG_SYS_FSL_USDHC_NUM 2 -- cgit v1.2.3 From f5dd0c5e19cf587c744e234e8a7e47f63642e113 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:11 -0500 Subject: configs: Remove unused or redundant CONFIG symbols A number of CONFIG symbols have crept in that are never referenced in code, so drop them here. Further, we have two symbols being enabled in headers while already enabled correctly in Kconfig, so these lines can also be removed. Signed-off-by: Tom Rini --- include/configs/cgtqmx8.h | 1 - include/configs/imx8mp_rsb3720.h | 9 --------- include/configs/imx8mq_cm.h | 1 - include/configs/imx8mq_evk.h | 1 - include/configs/imx8mq_phanbell.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kontron_pitx_imx8m.h | 1 - include/configs/librem5.h | 6 ------ include/configs/pico-imx8mq.h | 1 - 10 files changed, 23 deletions(-) (limited to 'include') diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 91454df1972..98d4d8cf4bd 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -12,7 +12,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 495ca313db2..d4ab6a6207d 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -28,12 +28,6 @@ * GD_FLG_FULL_MALLOC_INIT \ * set \ */ - - -#if defined(CONFIG_NAND_BOOT) -#define CONFIG_SPL_NAND_MXS -#endif - #endif /* ENET Config */ @@ -158,9 +152,6 @@ #define FSL_FSPI_FLASH_NUM 1 #define FSPI0_BASE_ADDR 0x30bb0000 #define FSPI0_AMBA_BASE 0x0 -#define CONFIG_FSPI_QUAD_SUPPORT - -#define CONFIG_SYS_FSL_FSPI_AHB #endif #ifdef CONFIG_NAND_MXS diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 828bd672372..7cf482d6de1 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -11,7 +11,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index d2de2900c06..d2e1649400a 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -12,7 +12,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index bfde15e6240..b66fc18fa5e 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -11,7 +11,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index a25efbb16bd..4d5abe2d073 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -11,7 +11,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 4f55ae49403..93999509948 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -11,7 +11,6 @@ #include #ifdef CONFIG_SPL_BUILD -#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 #define CFG_MALLOC_F_ADDR 0x00120000 #endif diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index e3a021c987c..5cf6b5a6dd4 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -13,7 +13,6 @@ 0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 diff --git a/include/configs/librem5.h b/include/configs/librem5.h index e17190ce9c5..ce0a340ba26 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -15,12 +15,6 @@ #include #include -#ifdef CONFIG_SPL_BUILD - -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ - -#endif /* CONFIG_SPL_BUILD*/ - #define CFG_SYS_FSL_USDHC_NUM 2 #define CONSOLE_ON_UART1 diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 4b602ea0302..be31f8a23ca 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -11,7 +11,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x182000 -- cgit v1.2.3 From 0478dac62a9add8c73981a900ceaa6da732ae2bb Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:13 -0500 Subject: kbuild: Remove uncmd_spl logic At this point in the conversion there should be no need to have logic to disable some symbol during the SPL build as all symbols should have an SPL counterpart. The main real changes done here are that we now must make proper use of CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we developed prior to CONFIG_IS_ENABLED() being available. Signed-off-by: Tom Rini --- include/config_uncmd_spl.h | 21 --------------------- include/configs/kmcent2.h | 2 +- include/configs/mv-common.h | 2 +- include/configs/sunxi-common.h | 2 +- include/configs/ti_omap4_common.h | 2 +- include/configs/x530.h | 2 +- include/ns16550.h | 10 +++++----- 7 files changed, 10 insertions(+), 31 deletions(-) delete mode 100644 include/config_uncmd_spl.h (limited to 'include') diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h deleted file mode 100644 index a59b9bbafbd..00000000000 --- a/include/config_uncmd_spl.h +++ /dev/null @@ -1,21 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2012 - * Ilya Yanok, ilya.yanok@gmail.com - */ - -#ifndef __CONFIG_UNCMD_SPL_H__ -#define __CONFIG_UNCMD_SPL_H__ - -#ifdef CONFIG_SPL_BUILD -/* SPL needs only BOOTP + TFTP so undefine other stuff to save space */ - -#ifndef CONFIG_SPL_DM -#undef CONFIG_DM_SERIAL -#undef CONFIG_DM_I2C -#endif - -#undef CONFIG_DM_STDIO - -#endif /* CONFIG_SPL_BUILD */ -#endif /* __CONFIG_UNCMD_SPL_H__ */ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 60fea59dee0..e7ae18ec5f9 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -314,7 +314,7 @@ * shorted - index 1 * Retain non-DM serial port for debug purposes. */ -#if !defined(CONFIG_DM_SERIAL) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CFG_SYS_NS16550_CLK (get_bus_freq(0) / 2) #define CFG_SYS_NS16550_COM1 (CFG_SYS_CCSRBAR + 0x11C500) #endif diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index fa275d61d18..3dfcb138b49 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -33,7 +33,7 @@ * NS16550 Configuration */ #define CFG_SYS_NS16550_CLK CFG_SYS_TCLK -#if !defined(CONFIG_DM_SERIAL) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index eae107fe5ec..8032abe7692 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -23,7 +23,7 @@ #else #define CFG_SYS_NS16550_CLK 24000000 #endif -#ifndef CONFIG_DM_SERIAL +#if !CONFIG_IS_ENABLED(DM_SERIAL) # define CFG_SYS_NS16550_COM1 SUNXI_UART0_BASE # define CFG_SYS_NS16550_COM2 SUNXI_UART1_BASE # define CFG_SYS_NS16550_COM3 SUNXI_UART2_BASE diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 49f4263e16b..9e312ac16d1 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -28,7 +28,7 @@ * Hardware drivers */ #define CFG_SYS_NS16550_CLK 48000000 -#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CFG_SYS_NS16550_COM3 UART3_BASE #endif diff --git a/include/configs/x530.h b/include/configs/x530.h index fddf00d3d13..e1678e79e49 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -14,7 +14,7 @@ * NS16550 Configuration */ #define CFG_SYS_NS16550_CLK CFG_SYS_TCLK -#if !defined(CONFIG_DM_SERIAL) +#if !CONFIG_IS_ENABLED(DM_SERIAL) #define CFG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE #endif diff --git a/include/ns16550.h b/include/ns16550.h index 0ee5c4d6de7..f45fc8cecc5 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -26,7 +26,7 @@ #include -#if defined(CONFIG_DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE) +#if CONFIG_IS_ENABLED(DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE) /* * For driver model we always use one byte per register, and sort out the * differences in the driver @@ -37,10 +37,10 @@ #ifdef CONFIG_NS16550_DYNAMIC #define UART_REG(x) unsigned char x #else -#if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) -#error "Please define NS16550 registers size." -#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_DM_SERIAL) +#if defined(CONFIG_SYS_NS16550_MEM32) && !CONFIG_IS_ENABLED(DM_SERIAL) #define UART_REG(x) u32 x +#elif !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) +#error "Please define NS16550 registers size." #elif (CONFIG_SYS_NS16550_REG_SIZE > 0) #define UART_REG(x) \ unsigned char prepad_##x[CONFIG_SYS_NS16550_REG_SIZE - 1]; \ @@ -113,7 +113,7 @@ struct ns16550 { UART_REG(scr); /* 10*/ UART_REG(ssr); /* 11*/ #endif -#ifdef CONFIG_DM_SERIAL +#if CONFIG_IS_ENABLED(DM_SERIAL) struct ns16550_plat *plat; #endif }; -- cgit v1.2.3 From 1e019503330585e892be057cca3ed4eb1b9c9344 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 4 Dec 2022 10:14:17 -0500 Subject: post: Move CONFIG_SYS_POST to CFG_SYS_POST Migrate the rest of the CONFIG_SYS_POST macros over to CFG_SYS_POST namespace. Signed-off-by: Tom Rini --- include/post.h | 50 +++++++++++++++++++++++++------------------------- include/serial.h | 4 ++-- 2 files changed, 27 insertions(+), 27 deletions(-) (limited to 'include') diff --git a/include/post.h b/include/post.h index e68d5c89020..41120695064 100644 --- a/include/post.h +++ b/include/post.h @@ -17,8 +17,8 @@ #if defined(CONFIG_POST) #ifndef CFG_POST_EXTERNAL_WORD_FUNCS -#ifdef CONFIG_SYS_POST_WORD_ADDR -#define _POST_WORD_ADDR CONFIG_SYS_POST_WORD_ADDR +#ifdef CFG_SYS_POST_WORD_ADDR +#define _POST_WORD_ADDR CFG_SYS_POST_WORD_ADDR #else #if defined(CONFIG_ARCH_MPC8360) @@ -34,7 +34,7 @@ #ifndef _POST_WORD_ADDR #error "_POST_WORD_ADDR currently not implemented for this platform!" #endif -#endif /* CONFIG_SYS_POST_WORD_ADDR */ +#endif /* CFG_SYS_POST_WORD_ADDR */ static inline ulong post_word_load (void) { @@ -140,29 +140,29 @@ extern int memory_post_test(int flags); #endif /* __GNUC__ */ #endif /* __ASSEMBLY__ */ -#define CONFIG_SYS_POST_RTC 0x00000001 -#define CONFIG_SYS_POST_WATCHDOG 0x00000002 +#define CFG_SYS_POST_RTC 0x00000001 +#define CFG_SYS_POST_WATCHDOG 0x00000002 #define CFG_SYS_POST_MEMORY 0x00000004 -#define CONFIG_SYS_POST_CPU 0x00000008 -#define CONFIG_SYS_POST_I2C 0x00000010 -#define CONFIG_SYS_POST_CACHE 0x00000020 -#define CONFIG_SYS_POST_UART 0x00000040 -#define CONFIG_SYS_POST_ETHER 0x00000080 -#define CONFIG_SYS_POST_USB 0x00000200 -#define CONFIG_SYS_POST_SPR 0x00000400 -#define CONFIG_SYS_POST_SYSMON 0x00000800 -#define CONFIG_SYS_POST_DSP 0x00001000 -#define CONFIG_SYS_POST_OCM 0x00002000 -#define CONFIG_SYS_POST_FPU 0x00004000 -#define CONFIG_SYS_POST_ECC 0x00008000 -#define CONFIG_SYS_POST_BSPEC1 0x00010000 -#define CONFIG_SYS_POST_BSPEC2 0x00020000 -#define CONFIG_SYS_POST_BSPEC3 0x00040000 -#define CONFIG_SYS_POST_BSPEC4 0x00080000 -#define CONFIG_SYS_POST_BSPEC5 0x00100000 -#define CONFIG_SYS_POST_CODEC 0x00200000 -#define CONFIG_SYS_POST_COPROC 0x00400000 -#define CONFIG_SYS_POST_FLASH 0x00800000 +#define CFG_SYS_POST_CPU 0x00000008 +#define CFG_SYS_POST_I2C 0x00000010 +#define CFG_SYS_POST_CACHE 0x00000020 +#define CFG_SYS_POST_UART 0x00000040 +#define CFG_SYS_POST_ETHER 0x00000080 +#define CFG_SYS_POST_USB 0x00000200 +#define CFG_SYS_POST_SPR 0x00000400 +#define CFG_SYS_POST_SYSMON 0x00000800 +#define CFG_SYS_POST_DSP 0x00001000 +#define CFG_SYS_POST_OCM 0x00002000 +#define CFG_SYS_POST_FPU 0x00004000 +#define CFG_SYS_POST_ECC 0x00008000 +#define CFG_SYS_POST_BSPEC1 0x00010000 +#define CFG_SYS_POST_BSPEC2 0x00020000 +#define CFG_SYS_POST_BSPEC3 0x00040000 +#define CFG_SYS_POST_BSPEC4 0x00080000 +#define CFG_SYS_POST_BSPEC5 0x00100000 +#define CFG_SYS_POST_CODEC 0x00200000 +#define CFG_SYS_POST_COPROC 0x00400000 +#define CFG_SYS_POST_FLASH 0x00800000 #define CFG_SYS_POST_MEM_REGIONS 0x01000000 #endif /* CONFIG_POST */ diff --git a/include/serial.h b/include/serial.h index f4d7dc58a9e..42bdf3759c0 100644 --- a/include/serial.h +++ b/include/serial.h @@ -14,7 +14,7 @@ struct serial_device { int (*tstc)(void); void (*putc)(const char c); void (*puts)(const char *s); -#if CFG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CFG_SYS_POST_UART void (*loop)(int); #endif struct serial_device *next; @@ -242,7 +242,7 @@ struct dm_serial_ops { * @return 0 if OK, -ve on error */ int (*clear)(struct udevice *dev); -#if CFG_POST & CONFIG_SYS_POST_UART +#if CFG_POST & CFG_SYS_POST_UART /** * loop() - Control serial device loopback mode * -- cgit v1.2.3 From b5fd7b4a31e5098ff024ebc63bccfcb2b4429c82 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Mon, 12 Dec 2022 14:12:07 -0500 Subject: image: Add fallback for fit_config_verify Add a fallback for this function so it can be used without regard to whether FIT_SIGNATURE is enabled or not. Signed-off-by: Sean Anderson Reviewed-by: Tom Rini Reviewed-by: Simon Glass --- include/image.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/image.h b/include/image.h index b6a809834ad..6f9c5a486bc 100644 --- a/include/image.h +++ b/include/image.h @@ -1259,7 +1259,14 @@ int fit_image_verify_with_data(const void *fit, int image_noffset, size_t size); int fit_image_verify(const void *fit, int noffset); +#if CONFIG_IS_ENABLED(FIT_SIGNATURE) int fit_config_verify(const void *fit, int conf_noffset); +#else +static inline int fit_config_verify(const void *fit, int conf_noffset) +{ + return 0; +} +#endif int fit_all_image_verify(const void *fit); int fit_config_decrypt(const void *fit, int conf_noffset); int fit_image_check_os(const void *fit, int noffset, uint8_t os); -- cgit v1.2.3 From bcc85b96b5ffbbce19a89747138feb873d918915 Mon Sep 17 00:00:00 2001 From: Sean Anderson Date: Mon, 12 Dec 2022 14:12:11 -0500 Subject: cmd: source: Support specifying config name As discussed previously [1,2], the source command is not safe to use with verified boot unless there is a key with required = "images" (which has its own problems). This is because if such a key is absent, signatures are verified but not required. It is assumed that configuration nodes will provide the signature. Because the source command does not use configurations to determine the image to source, effectively no verification takes place. To address this, allow specifying configuration nodes. We use the same syntax as the bootm command (helpfully provided for us by fit_parse_conf). By default, we first try the default config and then the default image. To force using a config, # must be present in the command (e.g. `source $loadaddr#my-conf`). For convenience, the config may be omitted, just like the address may be (e.g. `source \#`). This also works for images (`source :` behaves exactly like `source` currently does). [1] https://lore.kernel.org/u-boot/7d711133-d513-5bcb-52f2-a9dbaa9eeded@prevas.dk/ [2] https://lore.kernel.org/u-boot/042dcb34-f85f-351e-1b0e-513f89005fdd@gmail.com/ Signed-off-by: Sean Anderson Reviewed-by: Simon Glass --- include/image.h | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/image.h b/include/image.h index 6f9c5a486bc..bed75ce1b38 100644 --- a/include/image.h +++ b/include/image.h @@ -711,15 +711,23 @@ int fit_image_load(struct bootm_headers *images, ulong addr, /** * image_source_script() - Execute a script + * @addr: Address of script + * @fit_uname: FIT subimage name + * @confname: FIT config name. The subimage is chosen based on FIT_SCRIPT_PROP. * * Executes a U-Boot script at a particular address in memory. The script should * have a header (FIT or legacy) with the script type (IH_TYPE_SCRIPT). * - * @addr: Address of script - * @fit_uname: FIT subimage name + * If @fit_uname is the empty string, then the default image is used. If + * @confname is the empty string, the default config is used. If @confname and + * @fit_uname are both non-%NULL, then @confname is ignored. If @confname and + * @fit_uname are both %NULL, then first the default config is tried, and then + * the default image. + * * Return: result code (enum command_ret_t) */ -int image_source_script(ulong addr, const char *fit_uname); +int image_source_script(ulong addr, const char *fit_uname, + const char *confname); /** * fit_get_node_from_config() - Look up an image a FIT by type @@ -1032,6 +1040,7 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size, #define FIT_FPGA_PROP "fpga" #define FIT_FIRMWARE_PROP "firmware" #define FIT_STANDALONE_PROP "standalone" +#define FIT_SCRIPT_PROP "script" #define FIT_PHASE_PROP "phase" #define FIT_MAX_HASH_LEN HASH_MAX_DIGEST_SIZE -- cgit v1.2.3 From 872413bb0a03831ffe6f060b40cdb8bcc76f9867 Mon Sep 17 00:00:00 2001 From: Dai Okamura Date: Fri, 9 Dec 2022 20:33:48 +0900 Subject: arm: uniphier: use DM_TIMER of arm a9 global timer All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer in a simple implementation. Now DM_TIMER of it is available on 35751c7f3f ("timer: sti: convert sti-timer to arm a9 global timer"), so let's switch to it. The old driver reads the lower 32bits of counter field and sets the prescaler as 50 with PERIPHCLK(=50MHz), so the global timer works as a 32-bit 1MHz timer. The DM_TIMER uses the whole 64bits with no prescaler, so the global timer works as a 64-bit PERIPHCLK timer. CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency, if there is no 'clocks' property in devicetree. Signed-off-by: Dai Okamura --- include/configs/uniphier.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index ecf0d2ac44a..0a14d0448c6 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -36,8 +36,7 @@ BOOT_TARGET_DEVICE_USB(func) #if !defined(CONFIG_ARM64) -/* Time clock 1MHz */ -#define CFG_SYS_TIMER_RATE 1000000 +#define CFG_SYS_HZ_CLOCK 50000000 #endif #define CFG_SYS_NAND_REGS_BASE 0x68100000 -- cgit v1.2.3 From 28663622cf0767d0c5f31629ab50e34069bf0267 Mon Sep 17 00:00:00 2001 From: Stefan Bosch Date: Sun, 18 Dec 2022 12:26:47 +0000 Subject: arm: s5p4418: dm_serial: remove old code / add DEBUG_UART Remove init of UART-clock and UART-reset in arch_cpu_init(). Add DEBUG_UART to s5p4418_nanopi2_defconfig. Signed-off-by: Stefan Bosch --- include/configs/s5p4418_nanopi2.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 2fa44e65fc1..fec1bfd50eb 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -76,11 +76,9 @@ /*----------------------------------------------------------------------- * serial console configuration */ -#define CFG_PL011_CLOCK 50000000 -#define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ - (void *)PHY_BASEADDR_UART1, \ - (void *)PHY_BASEADDR_UART2, \ - (void *)PHY_BASEADDR_UART3} + +/* 150MHz is the clock rate set by SPL (uart0) */ +#define CFG_PL011_CLOCK 150000000 /*----------------------------------------------------------------------- * BACKLIGHT -- cgit v1.2.3 From 7b88887ba78d100bcb74d3e0baa03f87a338e707 Mon Sep 17 00:00:00 2001 From: Sergiu Moga Date: Wed, 4 Jan 2023 16:04:13 +0200 Subject: dt-bindings: reset: add sama7g5 definitions Upstream linux commit 5994f58977e0. Add reset bindings for SAMA7G5. At the moment only USB PHYs are included. The three reset USB phy's have their ID's mapped from 4 to 6. There are no USB phy's with ID's numbered from 0 to 3. Signed-off-by: Sergiu Moga --- include/dt-bindings/reset/sama7g5-reset.h | 10 ++++++++++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h (limited to 'include') diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 00000000000..2116f41d04e --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H + +#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6 + +#endif /* __DT_BINDINGS_RESET_SAMA7G5_H */ -- cgit v1.2.3 From ee25ed5899b8a7ee125e58298bd1b71feedb79f1 Mon Sep 17 00:00:00 2001 From: Sergiu Moga Date: Wed, 4 Jan 2023 16:04:14 +0200 Subject: dt-bindings: clk: at91: Define additional UTMI related clocks Add definitions for an additional main UTMI clock as well as its respective subclocks. Signed-off-by: Sergiu Moga --- include/dt-bindings/clk/at91.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clk/at91.h index e30756b2804..a178b94157b 100644 --- a/include/dt-bindings/clk/at91.h +++ b/include/dt-bindings/clk/at91.h @@ -18,5 +18,10 @@ #define PMC_TYPE_PERIPHERAL 3 #define PMC_TYPE_GCK 4 #define PMC_TYPE_SLOW 5 +#define USB_UTMI 6 + +#define USB_UTMI1 0 +#define USB_UTMI2 1 +#define USB_UTMI3 2 #endif -- cgit v1.2.3 From 7363cf0581a3e70b3dbd346dec8b7ae652776f80 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Tue, 20 Dec 2022 12:22:03 +0200 Subject: mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Reviewed-by: Tom Rini Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com --- include/linux/mtd/omap_elm.h | 79 -------------------------------------------- 1 file changed, 79 deletions(-) delete mode 100644 include/linux/mtd/omap_elm.h (limited to 'include') diff --git a/include/linux/mtd/omap_elm.h b/include/linux/mtd/omap_elm.h deleted file mode 100644 index f3db00d55de..00000000000 --- a/include/linux/mtd/omap_elm.h +++ /dev/null @@ -1,79 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2010-2011 Texas Instruments, - * Mansoor Ahamed - * - * Derived from work done by Rohit Choraria for omap3 - */ -#ifndef __ASM_ARCH_ELM_H -#define __ASM_ARCH_ELM_H -/* - * ELM Module Registers - */ - -/* ELM registers bit fields */ -#define ELM_SYSCONFIG_SOFTRESET_MASK (0x2) -#define ELM_SYSCONFIG_SOFTRESET (0x2) -#define ELM_SYSSTATUS_RESETDONE_MASK (0x1) -#define ELM_SYSSTATUS_RESETDONE (0x1) -#define ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK (0x3) -#define ELM_LOCATION_CONFIG_ECC_SIZE_MASK (0x7FF0000) -#define ELM_LOCATION_CONFIG_ECC_SIZE_POS (16) -#define ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID (0x00010000) -#define ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK (0x100) -#define ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK (0x1F) - -#define ELM_MAX_CHANNELS 8 -#define ELM_MAX_ERROR_COUNT 16 - -#ifndef __ASSEMBLY__ - -enum bch_level { - BCH_4_BIT = 0, - BCH_8_BIT, - BCH_16_BIT -}; - - -/* BCH syndrome registers */ -struct syndrome { - u32 syndrome_fragment_x[7]; /* 0x400, 0x404.... 0x418 */ - u8 res1[36]; /* 0x41c */ -}; - -/* BCH error status & location register */ -struct location { - u32 location_status; /* 0x800 */ - u8 res1[124]; /* 0x804 */ - u32 error_location_x[ELM_MAX_ERROR_COUNT]; /* 0x880, 0x980, .. */ - u8 res2[64]; /* 0x8c0 */ -}; - -/* BCH ELM register map - do not try to allocate memmory for this structure. - * We have used plenty of reserved variables to fill the slots in the ELM - * register memory map. - * Directly initialize the struct pointer to ELM base address. - */ -struct elm { - u32 rev; /* 0x000 */ - u8 res1[12]; /* 0x004 */ - u32 sysconfig; /* 0x010 */ - u32 sysstatus; /* 0x014 */ - u32 irqstatus; /* 0x018 */ - u32 irqenable; /* 0x01c */ - u32 location_config; /* 0x020 */ - u8 res2[92]; /* 0x024 */ - u32 page_ctrl; /* 0x080 */ - u8 res3[892]; /* 0x084 */ - struct syndrome syndrome_fragments[ELM_MAX_CHANNELS]; /* 0x400,0x420 */ - u8 res4[512]; /* 0x600 */ - struct location error_location[ELM_MAX_CHANNELS]; /* 0x800,0x900 ... */ -}; - -int elm_check_error(u8 *syndrome, enum bch_level bch_type, u32 *error_count, - u32 *error_locations); -int elm_config(enum bch_level level); -void elm_reset(void); -void elm_init(void); -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_ARCH_ELM_H */ -- cgit v1.2.3