From f4abbee3ae8f64871ba91bcf1ef7f5b5387fbb1f Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 30 Jan 2016 16:37:43 -0700 Subject: tegra: dts: Sync up the tegra124 device tree files with Linux Sync up these files with Linux v4.4. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- include/dt-bindings/clock/tegra124-car-common.h | 345 ++++++++++++++++++++++++ include/dt-bindings/clock/tegra124-car.h | 341 +---------------------- include/dt-bindings/memory/tegra124-mc.h | 31 +++ include/dt-bindings/reset/tegra124-car.h | 12 + include/dt-bindings/thermal/tegra124-soctherm.h | 13 + 5 files changed, 410 insertions(+), 332 deletions(-) create mode 100644 include/dt-bindings/clock/tegra124-car-common.h create mode 100644 include/dt-bindings/memory/tegra124-mc.h create mode 100644 include/dt-bindings/reset/tegra124-car.h create mode 100644 include/dt-bindings/thermal/tegra124-soctherm.h (limited to 'include') diff --git a/include/dt-bindings/clock/tegra124-car-common.h b/include/dt-bindings/clock/tegra124-car-common.h new file mode 100644 index 00000000000..a2156090563 --- /dev/null +++ b/include/dt-bindings/clock/tegra124-car-common.h @@ -0,0 +1,345 @@ +/* + * This header provides constants for binding nvidia,tegra124-car or + * nvidia,tegra132-car. + * + * The first 192 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB + * registers. These IDs often match those in the CAR's RST_DEVICES registers, + * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In + * this case, those clocks are assigned IDs above 185 in order to highlight + * this issue. Implementations that interpret these clock IDs as bit values + * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to + * explicitly handle these special cases. + * + * The balance of the clocks controlled by the CAR are assigned IDs of 185 and + * above. + */ + +#ifndef _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H +#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H + +/* 0 */ +/* 1 */ +/* 2 */ +#define TEGRA124_CLK_ISPB 3 +#define TEGRA124_CLK_RTC 4 +#define TEGRA124_CLK_TIMER 5 +#define TEGRA124_CLK_UARTA 6 +/* 7 (register bit affects uartb and vfir) */ +/* 8 */ +#define TEGRA124_CLK_SDMMC2 9 +/* 10 (register bit affects spdif_in and spdif_out) */ +#define TEGRA124_CLK_I2S1 11 +#define TEGRA124_CLK_I2C1 12 +/* 13 */ +#define TEGRA124_CLK_SDMMC1 14 +#define TEGRA124_CLK_SDMMC4 15 +/* 16 */ +#define TEGRA124_CLK_PWM 17 +#define TEGRA124_CLK_I2S2 18 +/* 20 (register bit affects vi and vi_sensor) */ +/* 21 */ +#define TEGRA124_CLK_USBD 22 +#define TEGRA124_CLK_ISP 23 +/* 26 */ +/* 25 */ +#define TEGRA124_CLK_DISP2 26 +#define TEGRA124_CLK_DISP1 27 +#define TEGRA124_CLK_HOST1X 28 +#define TEGRA124_CLK_VCP 29 +#define TEGRA124_CLK_I2S0 30 +/* 31 */ + +#define TEGRA124_CLK_MC 32 +/* 33 */ +#define TEGRA124_CLK_APBDMA 34 +/* 35 */ +#define TEGRA124_CLK_KBC 36 +/* 37 */ +/* 38 */ +/* 39 (register bit affects fuse and fuse_burn) */ +#define TEGRA124_CLK_KFUSE 40 +#define TEGRA124_CLK_SBC1 41 +#define TEGRA124_CLK_NOR 42 +/* 43 */ +#define TEGRA124_CLK_SBC2 44 +/* 45 */ +#define TEGRA124_CLK_SBC3 46 +#define TEGRA124_CLK_I2C5 47 +#define TEGRA124_CLK_DSIA 48 +/* 49 */ +#define TEGRA124_CLK_MIPI 50 +#define TEGRA124_CLK_HDMI 51 +#define TEGRA124_CLK_CSI 52 +/* 53 */ +#define TEGRA124_CLK_I2C2 54 +#define TEGRA124_CLK_UARTC 55 +#define TEGRA124_CLK_MIPI_CAL 56 +#define TEGRA124_CLK_EMC 57 +#define TEGRA124_CLK_USB2 58 +#define TEGRA124_CLK_USB3 59 +/* 60 */ +#define TEGRA124_CLK_VDE 61 +#define TEGRA124_CLK_BSEA 62 +#define TEGRA124_CLK_BSEV 63 + +/* 64 */ +#define TEGRA124_CLK_UARTD 65 +/* 66 */ +#define TEGRA124_CLK_I2C3 67 +#define TEGRA124_CLK_SBC4 68 +#define TEGRA124_CLK_SDMMC3 69 +#define TEGRA124_CLK_PCIE 70 +#define TEGRA124_CLK_OWR 71 +#define TEGRA124_CLK_AFI 72 +#define TEGRA124_CLK_CSITE 73 +/* 74 */ +/* 75 */ +#define TEGRA124_CLK_LA 76 +#define TEGRA124_CLK_TRACE 77 +#define TEGRA124_CLK_SOC_THERM 78 +#define TEGRA124_CLK_DTV 79 +/* 80 */ +#define TEGRA124_CLK_I2CSLOW 81 +#define TEGRA124_CLK_DSIB 82 +#define TEGRA124_CLK_TSEC 83 +/* 84 */ +/* 85 */ +/* 86 */ +/* 87 */ +/* 88 */ +#define TEGRA124_CLK_XUSB_HOST 89 +/* 90 */ +#define TEGRA124_CLK_MSENC 91 +#define TEGRA124_CLK_CSUS 92 +/* 93 */ +/* 94 */ +/* 95 (bit affects xusb_dev and xusb_dev_src) */ + +/* 96 */ +/* 97 */ +/* 98 */ +#define TEGRA124_CLK_MSELECT 99 +#define TEGRA124_CLK_TSENSOR 100 +#define TEGRA124_CLK_I2S3 101 +#define TEGRA124_CLK_I2S4 102 +#define TEGRA124_CLK_I2C4 103 +#define TEGRA124_CLK_SBC5 104 +#define TEGRA124_CLK_SBC6 105 +#define TEGRA124_CLK_D_AUDIO 106 +#define TEGRA124_CLK_APBIF 107 +#define TEGRA124_CLK_DAM0 108 +#define TEGRA124_CLK_DAM1 109 +#define TEGRA124_CLK_DAM2 110 +#define TEGRA124_CLK_HDA2CODEC_2X 111 +/* 112 */ +#define TEGRA124_CLK_AUDIO0_2X 113 +#define TEGRA124_CLK_AUDIO1_2X 114 +#define TEGRA124_CLK_AUDIO2_2X 115 +#define TEGRA124_CLK_AUDIO3_2X 116 +#define TEGRA124_CLK_AUDIO4_2X 117 +#define TEGRA124_CLK_SPDIF_2X 118 +#define TEGRA124_CLK_ACTMON 119 +#define TEGRA124_CLK_EXTERN1 120 +#define TEGRA124_CLK_EXTERN2 121 +#define TEGRA124_CLK_EXTERN3 122 +#define TEGRA124_CLK_SATA_OOB 123 +#define TEGRA124_CLK_SATA 124 +#define TEGRA124_CLK_HDA 125 +/* 126 */ +#define TEGRA124_CLK_SE 127 + +#define TEGRA124_CLK_HDA2HDMI 128 +#define TEGRA124_CLK_SATA_COLD 129 +/* 130 */ +/* 131 */ +/* 132 */ +/* 133 */ +/* 134 */ +/* 135 */ +/* 136 */ +/* 137 */ +/* 138 */ +/* 139 */ +/* 140 */ +/* 141 */ +/* 142 */ +/* 143 (bit affects xusb_falcon_src, xusb_fs_src, */ +/* xusb_host_src and xusb_ss_src) */ +#define TEGRA124_CLK_CILAB 144 +#define TEGRA124_CLK_CILCD 145 +#define TEGRA124_CLK_CILE 146 +#define TEGRA124_CLK_DSIALP 147 +#define TEGRA124_CLK_DSIBLP 148 +#define TEGRA124_CLK_ENTROPY 149 +#define TEGRA124_CLK_DDS 150 +/* 151 */ +#define TEGRA124_CLK_DP2 152 +#define TEGRA124_CLK_AMX 153 +#define TEGRA124_CLK_ADX 154 +/* 155 (bit affects dfll_ref and dfll_soc) */ +#define TEGRA124_CLK_XUSB_SS 156 +/* 157 */ +/* 158 */ +/* 159 */ + +/* 160 */ +/* 161 */ +/* 162 */ +/* 163 */ +/* 164 */ +/* 165 */ +#define TEGRA124_CLK_I2C6 166 +/* 167 */ +/* 168 */ +/* 169 */ +/* 170 */ +#define TEGRA124_CLK_VIM2_CLK 171 +/* 172 */ +/* 173 */ +/* 174 */ +/* 175 */ +#define TEGRA124_CLK_HDMI_AUDIO 176 +#define TEGRA124_CLK_CLK72MHZ 177 +#define TEGRA124_CLK_VIC03 178 +/* 179 */ +#define TEGRA124_CLK_ADX1 180 +#define TEGRA124_CLK_DPAUX 181 +#define TEGRA124_CLK_SOR0 182 +/* 183 */ +#define TEGRA124_CLK_GPU 184 +#define TEGRA124_CLK_AMX1 185 +/* 186 */ +/* 187 */ +/* 188 */ +/* 189 */ +/* 190 */ +/* 191 */ +#define TEGRA124_CLK_UARTB 192 +#define TEGRA124_CLK_VFIR 193 +#define TEGRA124_CLK_SPDIF_IN 194 +#define TEGRA124_CLK_SPDIF_OUT 195 +#define TEGRA124_CLK_VI 196 +#define TEGRA124_CLK_VI_SENSOR 197 +#define TEGRA124_CLK_FUSE 198 +#define TEGRA124_CLK_FUSE_BURN 199 +#define TEGRA124_CLK_CLK_32K 200 +#define TEGRA124_CLK_CLK_M 201 +#define TEGRA124_CLK_CLK_M_DIV2 202 +#define TEGRA124_CLK_CLK_M_DIV4 203 +#define TEGRA124_CLK_PLL_REF 204 +#define TEGRA124_CLK_PLL_C 205 +#define TEGRA124_CLK_PLL_C_OUT1 206 +#define TEGRA124_CLK_PLL_C2 207 +#define TEGRA124_CLK_PLL_C3 208 +#define TEGRA124_CLK_PLL_M 209 +#define TEGRA124_CLK_PLL_M_OUT1 210 +#define TEGRA124_CLK_PLL_P 211 +#define TEGRA124_CLK_PLL_P_OUT1 212 +#define TEGRA124_CLK_PLL_P_OUT2 213 +#define TEGRA124_CLK_PLL_P_OUT3 214 +#define TEGRA124_CLK_PLL_P_OUT4 215 +#define TEGRA124_CLK_PLL_A 216 +#define TEGRA124_CLK_PLL_A_OUT0 217 +#define TEGRA124_CLK_PLL_D 218 +#define TEGRA124_CLK_PLL_D_OUT0 219 +#define TEGRA124_CLK_PLL_D2 220 +#define TEGRA124_CLK_PLL_D2_OUT0 221 +#define TEGRA124_CLK_PLL_U 222 +#define TEGRA124_CLK_PLL_U_480M 223 + +#define TEGRA124_CLK_PLL_U_60M 224 +#define TEGRA124_CLK_PLL_U_48M 225 +#define TEGRA124_CLK_PLL_U_12M 226 +/* 227 */ +/* 228 */ +#define TEGRA124_CLK_PLL_RE_VCO 229 +#define TEGRA124_CLK_PLL_RE_OUT 230 +#define TEGRA124_CLK_PLL_E 231 +#define TEGRA124_CLK_SPDIF_IN_SYNC 232 +#define TEGRA124_CLK_I2S0_SYNC 233 +#define TEGRA124_CLK_I2S1_SYNC 234 +#define TEGRA124_CLK_I2S2_SYNC 235 +#define TEGRA124_CLK_I2S3_SYNC 236 +#define TEGRA124_CLK_I2S4_SYNC 237 +#define TEGRA124_CLK_VIMCLK_SYNC 238 +#define TEGRA124_CLK_AUDIO0 239 +#define TEGRA124_CLK_AUDIO1 240 +#define TEGRA124_CLK_AUDIO2 241 +#define TEGRA124_CLK_AUDIO3 242 +#define TEGRA124_CLK_AUDIO4 243 +#define TEGRA124_CLK_SPDIF 244 +#define TEGRA124_CLK_CLK_OUT_1 245 +#define TEGRA124_CLK_CLK_OUT_2 246 +#define TEGRA124_CLK_CLK_OUT_3 247 +#define TEGRA124_CLK_BLINK 248 +/* 249 */ +/* 250 */ +/* 251 */ +#define TEGRA124_CLK_XUSB_HOST_SRC 252 +#define TEGRA124_CLK_XUSB_FALCON_SRC 253 +#define TEGRA124_CLK_XUSB_FS_SRC 254 +#define TEGRA124_CLK_XUSB_SS_SRC 255 + +#define TEGRA124_CLK_XUSB_DEV_SRC 256 +#define TEGRA124_CLK_XUSB_DEV 257 +#define TEGRA124_CLK_XUSB_HS_SRC 258 +#define TEGRA124_CLK_SCLK 259 +#define TEGRA124_CLK_HCLK 260 +#define TEGRA124_CLK_PCLK 261 +/* 262 */ +/* 263 */ +#define TEGRA124_CLK_DFLL_REF 264 +#define TEGRA124_CLK_DFLL_SOC 265 +#define TEGRA124_CLK_VI_SENSOR2 266 +#define TEGRA124_CLK_PLL_P_OUT5 267 +#define TEGRA124_CLK_CML0 268 +#define TEGRA124_CLK_CML1 269 +#define TEGRA124_CLK_PLL_C4 270 +#define TEGRA124_CLK_PLL_DP 271 +#define TEGRA124_CLK_PLL_E_MUX 272 +#define TEGRA124_CLK_PLL_D_DSI_OUT 273 +/* 274 */ +/* 275 */ +/* 276 */ +/* 277 */ +/* 278 */ +/* 279 */ +/* 280 */ +/* 281 */ +/* 282 */ +/* 283 */ +/* 284 */ +/* 285 */ +/* 286 */ +/* 287 */ + +/* 288 */ +/* 289 */ +/* 290 */ +/* 291 */ +/* 292 */ +/* 293 */ +/* 294 */ +/* 295 */ +/* 296 */ +/* 297 */ +/* 298 */ +/* 299 */ +#define TEGRA124_CLK_AUDIO0_MUX 300 +#define TEGRA124_CLK_AUDIO1_MUX 301 +#define TEGRA124_CLK_AUDIO2_MUX 302 +#define TEGRA124_CLK_AUDIO3_MUX 303 +#define TEGRA124_CLK_AUDIO4_MUX 304 +#define TEGRA124_CLK_SPDIF_MUX 305 +#define TEGRA124_CLK_CLK_OUT_1_MUX 306 +#define TEGRA124_CLK_CLK_OUT_2_MUX 307 +#define TEGRA124_CLK_CLK_OUT_3_MUX 308 +/* 309 */ +/* 310 */ +#define TEGRA124_CLK_SOR0_LVDS 311 +#define TEGRA124_CLK_XUSB_SS_DIV2 312 + +#define TEGRA124_CLK_PLL_M_UD 313 +#define TEGRA124_CLK_PLL_C_UD 314 + +#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H */ diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h index fd8d62ac7f6..2860737f044 100644 --- a/include/dt-bindings/clock/tegra124-car.h +++ b/include/dt-bindings/clock/tegra124-car.h @@ -1,342 +1,19 @@ /* - * This header provides constants for binding nvidia,tegra124-car. - * - * The first 192 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB - * registers. These IDs often match those in the CAR's RST_DEVICES registers, - * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In - * this case, those clocks are assigned IDs above 185 in order to highlight - * this issue. Implementations that interpret these clock IDs as bit values - * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to - * explicitly handle these special cases. - * - * The balance of the clocks controlled by the CAR are assigned IDs of 185 and - * above. + * This header provides Tegra124-specific constants for binding + * nvidia,tegra124-car. */ +#include + #ifndef _DT_BINDINGS_CLOCK_TEGRA124_CAR_H #define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H -/* 0 */ -/* 1 */ -/* 2 */ -#define TEGRA124_CLK_ISPB 3 -#define TEGRA124_CLK_RTC 4 -#define TEGRA124_CLK_TIMER 5 -#define TEGRA124_CLK_UARTA 6 -/* 7 (register bit affects uartb and vfir) */ -/* 8 */ -#define TEGRA124_CLK_SDMMC2 9 -/* 10 (register bit affects spdif_in and spdif_out) */ -#define TEGRA124_CLK_I2S1 11 -#define TEGRA124_CLK_I2C1 12 -#define TEGRA124_CLK_NDFLASH 13 -#define TEGRA124_CLK_SDMMC1 14 -#define TEGRA124_CLK_SDMMC4 15 -/* 16 */ -#define TEGRA124_CLK_PWM 17 -#define TEGRA124_CLK_I2S2 18 -/* 20 (register bit affects vi and vi_sensor) */ -/* 21 */ -#define TEGRA124_CLK_USBD 22 -#define TEGRA124_CLK_ISP 23 -/* 26 */ -/* 25 */ -#define TEGRA124_CLK_DISP2 26 -#define TEGRA124_CLK_DISP1 27 -#define TEGRA124_CLK_HOST1X 28 -#define TEGRA124_CLK_VCP 29 -#define TEGRA124_CLK_I2S0 30 -/* 31 */ - -/* 32 */ -/* 33 */ -#define TEGRA124_CLK_APBDMA 34 -/* 35 */ -#define TEGRA124_CLK_KBC 36 -/* 37 */ -/* 38 */ -/* 39 (register bit affects fuse and fuse_burn) */ -#define TEGRA124_CLK_KFUSE 40 -#define TEGRA124_CLK_SBC1 41 -#define TEGRA124_CLK_NOR 42 -/* 43 */ -#define TEGRA124_CLK_SBC2 44 -/* 45 */ -#define TEGRA124_CLK_SBC3 46 -#define TEGRA124_CLK_I2C5 47 -#define TEGRA124_CLK_DSIA 48 -/* 49 */ -#define TEGRA124_CLK_MIPI 50 -#define TEGRA124_CLK_HDMI 51 -#define TEGRA124_CLK_CSI 52 -/* 53 */ -#define TEGRA124_CLK_I2C2 54 -#define TEGRA124_CLK_UARTC 55 -#define TEGRA124_CLK_MIPI_CAL 56 -#define TEGRA124_CLK_EMC 57 -#define TEGRA124_CLK_USB2 58 -#define TEGRA124_CLK_USB3 59 -/* 60 */ -#define TEGRA124_CLK_VDE 61 -#define TEGRA124_CLK_BSEA 62 -#define TEGRA124_CLK_BSEV 63 - -/* 64 */ -#define TEGRA124_CLK_UARTD 65 -#define TEGRA124_CLK_UARTE 66 -#define TEGRA124_CLK_I2C3 67 -#define TEGRA124_CLK_SBC4 68 -#define TEGRA124_CLK_SDMMC3 69 -#define TEGRA124_CLK_PCIE 70 -#define TEGRA124_CLK_OWR 71 -#define TEGRA124_CLK_AFI 72 -#define TEGRA124_CLK_CSITE 73 -/* 74 */ -/* 75 */ -#define TEGRA124_CLK_LA 76 -#define TEGRA124_CLK_TRACE 77 -#define TEGRA124_CLK_SOC_THERM 78 -#define TEGRA124_CLK_DTV 79 -#define TEGRA124_CLK_NDSPEED 80 -#define TEGRA124_CLK_I2CSLOW 81 -#define TEGRA124_CLK_DSIB 82 -#define TEGRA124_CLK_TSEC 83 -/* 84 */ -/* 85 */ -/* 86 */ -/* 87 */ -/* 88 */ -#define TEGRA124_CLK_XUSB_HOST 89 -/* 90 */ -#define TEGRA124_CLK_MSENC 91 -#define TEGRA124_CLK_CSUS 92 -/* 93 */ -/* 94 */ -/* 95 (bit affects xusb_dev and xusb_dev_src) */ - -/* 96 */ -/* 97 */ -/* 98 */ -#define TEGRA124_CLK_MSELECT 99 -#define TEGRA124_CLK_TSENSOR 100 -#define TEGRA124_CLK_I2S3 101 -#define TEGRA124_CLK_I2S4 102 -#define TEGRA124_CLK_I2C4 103 -#define TEGRA124_CLK_SBC5 104 -#define TEGRA124_CLK_SBC6 105 -#define TEGRA124_CLK_D_AUDIO 106 -#define TEGRA124_CLK_APBIF 107 -#define TEGRA124_CLK_DAM0 108 -#define TEGRA124_CLK_DAM1 109 -#define TEGRA124_CLK_DAM2 110 -#define TEGRA124_CLK_HDA2CODEC_2X 111 -/* 112 */ -#define TEGRA124_CLK_AUDIO0_2X 113 -#define TEGRA124_CLK_AUDIO1_2X 114 -#define TEGRA124_CLK_AUDIO2_2X 115 -#define TEGRA124_CLK_AUDIO3_2X 116 -#define TEGRA124_CLK_AUDIO4_2X 117 -#define TEGRA124_CLK_SPDIF_2X 118 -#define TEGRA124_CLK_ACTMON 119 -#define TEGRA124_CLK_EXTERN1 120 -#define TEGRA124_CLK_EXTERN2 121 -#define TEGRA124_CLK_EXTERN3 122 -#define TEGRA124_CLK_SATA_OOB 123 -#define TEGRA124_CLK_SATA 124 -#define TEGRA124_CLK_HDA 125 -/* 126 */ -#define TEGRA124_CLK_SE 127 - -#define TEGRA124_CLK_HDA2HDMI 128 -#define TEGRA124_CLK_SATA_COLD 129 -/* 130 */ -/* 131 */ -/* 132 */ -/* 133 */ -/* 134 */ -/* 135 */ -/* 136 */ -/* 137 */ -/* 138 */ -/* 139 */ -/* 140 */ -/* 141 */ -/* 142 */ -/* 143 (bit affects xusb_falcon_src, xusb_fs_src, */ -/* xusb_host_src and xusb_ss_src) */ -#define TEGRA124_CLK_CILAB 144 -#define TEGRA124_CLK_CILCD 145 -#define TEGRA124_CLK_CILE 146 -#define TEGRA124_CLK_DSIALP 147 -#define TEGRA124_CLK_DSIBLP 148 -#define TEGRA124_CLK_ENTROPY 149 -#define TEGRA124_CLK_DDS 150 -/* 151 */ -#define TEGRA124_CLK_DP2 152 -#define TEGRA124_CLK_AMX 153 -#define TEGRA124_CLK_ADX 154 -/* 155 (bit affects dfll_ref and dfll_soc) */ -#define TEGRA124_CLK_XUSB_SS 156 -/* 157 */ -/* 158 */ -/* 159 */ - -/* 160 */ -/* 161 */ -/* 162 */ -/* 163 */ -/* 164 */ -/* 165 */ -#define TEGRA124_CLK_I2C6 166 -/* 167 */ -/* 168 */ -/* 169 */ -/* 170 */ -#define TEGRA124_CLK_VIM2_CLK 171 -/* 172 */ -/* 173 */ -/* 174 */ -/* 175 */ -#define TEGRA124_CLK_HDMI_AUDIO 176 -#define TEGRA124_CLK_CLK72MHZ 177 -#define TEGRA124_CLK_VIC03 178 -/* 179 */ -#define TEGRA124_CLK_ADX1 180 -#define TEGRA124_CLK_DPAUX 181 -#define TEGRA124_CLK_SOR0 182 -/* 183 */ -#define TEGRA124_CLK_GPU 184 -#define TEGRA124_CLK_AMX1 185 -#define TEGRA124_CLK_AFC0 186 -#define TEGRA124_CLK_AFC1 187 -#define TEGRA124_CLK_AFC2 188 -#define TEGRA124_CLK_AFC3 189 -#define TEGRA124_CLK_AFC4 190 -#define TEGRA124_CLK_AFC5 191 -#define TEGRA124_CLK_UARTB 192 -#define TEGRA124_CLK_VFIR 193 -#define TEGRA124_CLK_SPDIF_IN 194 -#define TEGRA124_CLK_SPDIF_OUT 195 -#define TEGRA124_CLK_VI 196 -#define TEGRA124_CLK_VI_SENSOR 197 -#define TEGRA124_CLK_FUSE 198 -#define TEGRA124_CLK_FUSE_BURN 199 -#define TEGRA124_CLK_CLK_32K 200 -#define TEGRA124_CLK_CLK_M 201 -#define TEGRA124_CLK_CLK_M_DIV2 202 -#define TEGRA124_CLK_CLK_M_DIV4 203 -#define TEGRA124_CLK_PLL_REF 204 -#define TEGRA124_CLK_PLL_C 205 -#define TEGRA124_CLK_PLL_C_OUT1 206 -#define TEGRA124_CLK_PLL_C2 207 -#define TEGRA124_CLK_PLL_C3 208 -#define TEGRA124_CLK_PLL_M 209 -#define TEGRA124_CLK_PLL_M_OUT1 210 -#define TEGRA124_CLK_PLL_P 211 -#define TEGRA124_CLK_PLL_P_OUT1 212 -#define TEGRA124_CLK_PLL_P_OUT2 213 -#define TEGRA124_CLK_PLL_P_OUT3 214 -#define TEGRA124_CLK_PLL_P_OUT4 215 -#define TEGRA124_CLK_PLL_A 216 -#define TEGRA124_CLK_PLL_A_OUT0 217 -#define TEGRA124_CLK_PLL_D 218 -#define TEGRA124_CLK_PLL_D_OUT0 219 -#define TEGRA124_CLK_PLL_D2 220 -#define TEGRA124_CLK_PLL_D2_OUT0 221 -#define TEGRA124_CLK_PLL_U 222 -#define TEGRA124_CLK_PLL_U_480M 223 - -#define TEGRA124_CLK_PLL_U_60M 224 -#define TEGRA124_CLK_PLL_U_48M 225 -#define TEGRA124_CLK_PLL_U_12M 226 -#define TEGRA124_CLK_PLL_X 227 -#define TEGRA124_CLK_PLL_X_OUT0 228 -#define TEGRA124_CLK_PLL_RE_VCO 229 -#define TEGRA124_CLK_PLL_RE_OUT 230 -#define TEGRA124_CLK_PLL_E 231 -#define TEGRA124_CLK_SPDIF_IN_SYNC 232 -#define TEGRA124_CLK_I2S0_SYNC 233 -#define TEGRA124_CLK_I2S1_SYNC 234 -#define TEGRA124_CLK_I2S2_SYNC 235 -#define TEGRA124_CLK_I2S3_SYNC 236 -#define TEGRA124_CLK_I2S4_SYNC 237 -#define TEGRA124_CLK_VIMCLK_SYNC 238 -#define TEGRA124_CLK_AUDIO0 239 -#define TEGRA124_CLK_AUDIO1 240 -#define TEGRA124_CLK_AUDIO2 241 -#define TEGRA124_CLK_AUDIO3 242 -#define TEGRA124_CLK_AUDIO4 243 -#define TEGRA124_CLK_SPDIF 244 -#define TEGRA124_CLK_CLK_OUT_1 245 -#define TEGRA124_CLK_CLK_OUT_2 246 -#define TEGRA124_CLK_CLK_OUT_3 247 -#define TEGRA124_CLK_BLINK 248 -/* 249 */ -/* 250 */ -/* 251 */ -#define TEGRA124_CLK_XUSB_HOST_SRC 252 -#define TEGRA124_CLK_XUSB_FALCON_SRC 253 -#define TEGRA124_CLK_XUSB_FS_SRC 254 -#define TEGRA124_CLK_XUSB_SS_SRC 255 +#define TEGRA124_CLK_PLL_X 227 +#define TEGRA124_CLK_PLL_X_OUT0 228 -#define TEGRA124_CLK_XUSB_DEV_SRC 256 -#define TEGRA124_CLK_XUSB_DEV 257 -#define TEGRA124_CLK_XUSB_HS_SRC 258 -#define TEGRA124_CLK_SCLK 259 -#define TEGRA124_CLK_HCLK 260 -#define TEGRA124_CLK_PCLK 261 -#define TEGRA124_CLK_CCLK_G 262 -#define TEGRA124_CLK_CCLK_LP 263 -#define TEGRA124_CLK_DFLL_REF 264 -#define TEGRA124_CLK_DFLL_SOC 265 -#define TEGRA124_CLK_VI_SENSOR2 266 -#define TEGRA124_CLK_PLL_P_OUT5 267 -#define TEGRA124_CLK_CML0 268 -#define TEGRA124_CLK_CML1 269 -#define TEGRA124_CLK_PLL_C4 270 -#define TEGRA124_CLK_PLL_DP 271 -#define TEGRA124_CLK_PLL_E_MUX 272 -/* 273 */ -/* 274 */ -/* 275 */ -/* 276 */ -/* 277 */ -/* 278 */ -/* 279 */ -/* 280 */ -/* 281 */ -/* 282 */ -/* 283 */ -/* 284 */ -/* 285 */ -/* 286 */ -/* 287 */ +#define TEGRA124_CLK_CCLK_G 262 +#define TEGRA124_CLK_CCLK_LP 263 -/* 288 */ -/* 289 */ -/* 290 */ -/* 291 */ -/* 292 */ -/* 293 */ -/* 294 */ -/* 295 */ -/* 296 */ -/* 297 */ -/* 298 */ -/* 299 */ -#define TEGRA124_CLK_AUDIO0_MUX 300 -#define TEGRA124_CLK_AUDIO1_MUX 301 -#define TEGRA124_CLK_AUDIO2_MUX 302 -#define TEGRA124_CLK_AUDIO3_MUX 303 -#define TEGRA124_CLK_AUDIO4_MUX 304 -#define TEGRA124_CLK_SPDIF_MUX 305 -#define TEGRA124_CLK_CLK_OUT_1_MUX 306 -#define TEGRA124_CLK_CLK_OUT_2_MUX 307 -#define TEGRA124_CLK_CLK_OUT_3_MUX 308 -#define TEGRA124_CLK_DSIA_MUX 309 -#define TEGRA124_CLK_DSIB_MUX 310 -#define TEGRA124_CLK_SOR0_LVDS 311 -#define TEGRA124_CLK_PLL_M_UD 311 -#define TEGRA124_CLK_CLK_MAX 312 +#define TEGRA124_CLK_CLK_MAX 315 #endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */ diff --git a/include/dt-bindings/memory/tegra124-mc.h b/include/dt-bindings/memory/tegra124-mc.h new file mode 100644 index 00000000000..7d8ee798f34 --- /dev/null +++ b/include/dt-bindings/memory/tegra124-mc.h @@ -0,0 +1,31 @@ +#ifndef DT_BINDINGS_MEMORY_TEGRA124_MC_H +#define DT_BINDINGS_MEMORY_TEGRA124_MC_H + +#define TEGRA_SWGROUP_PTC 0 +#define TEGRA_SWGROUP_DC 1 +#define TEGRA_SWGROUP_DCB 2 +#define TEGRA_SWGROUP_AFI 3 +#define TEGRA_SWGROUP_AVPC 4 +#define TEGRA_SWGROUP_HDA 5 +#define TEGRA_SWGROUP_HC 6 +#define TEGRA_SWGROUP_MSENC 7 +#define TEGRA_SWGROUP_PPCS 8 +#define TEGRA_SWGROUP_SATA 9 +#define TEGRA_SWGROUP_VDE 10 +#define TEGRA_SWGROUP_MPCORELP 11 +#define TEGRA_SWGROUP_MPCORE 12 +#define TEGRA_SWGROUP_ISP2 13 +#define TEGRA_SWGROUP_XUSB_HOST 14 +#define TEGRA_SWGROUP_XUSB_DEV 15 +#define TEGRA_SWGROUP_ISP2B 16 +#define TEGRA_SWGROUP_TSEC 17 +#define TEGRA_SWGROUP_A9AVP 18 +#define TEGRA_SWGROUP_GPU 19 +#define TEGRA_SWGROUP_SDMMC1A 20 +#define TEGRA_SWGROUP_SDMMC2A 21 +#define TEGRA_SWGROUP_SDMMC3A 22 +#define TEGRA_SWGROUP_SDMMC4A 23 +#define TEGRA_SWGROUP_VIC 24 +#define TEGRA_SWGROUP_VI 25 + +#endif diff --git a/include/dt-bindings/reset/tegra124-car.h b/include/dt-bindings/reset/tegra124-car.h new file mode 100644 index 00000000000..070e4f6e748 --- /dev/null +++ b/include/dt-bindings/reset/tegra124-car.h @@ -0,0 +1,12 @@ +/* + * This header provides Tegra124-specific constants for binding + * nvidia,tegra124-car. + */ + +#ifndef _DT_BINDINGS_RESET_TEGRA124_CAR_H +#define _DT_BINDINGS_RESET_TEGRA124_CAR_H + +#define TEGRA124_RESET(x) (6 * 32 + (x)) +#define TEGRA124_RST_DFLL_DVCO TEGRA124_RESET(0) + +#endif /* _DT_BINDINGS_RESET_TEGRA124_CAR_H */ diff --git a/include/dt-bindings/thermal/tegra124-soctherm.h b/include/dt-bindings/thermal/tegra124-soctherm.h new file mode 100644 index 00000000000..85aaf66690f --- /dev/null +++ b/include/dt-bindings/thermal/tegra124-soctherm.h @@ -0,0 +1,13 @@ +/* + * This header provides constants for binding nvidia,tegra124-soctherm. + */ + +#ifndef _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H +#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H + +#define TEGRA124_SOCTHERM_SENSOR_CPU 0 +#define TEGRA124_SOCTHERM_SENSOR_MEM 1 +#define TEGRA124_SOCTHERM_SENSOR_GPU 2 +#define TEGRA124_SOCTHERM_SENSOR_PLLX 3 + +#endif -- cgit v1.2.3 From 135a87ef43566cdd592fa9fd899bf435aa14aaa3 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 30 Jan 2016 16:37:49 -0700 Subject: tegra: Allow CONFIG_DM_VIDEO to be used as well as CONFIG_LCD While we transition to using driver model for video, we need to support both options. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/tegra-common-post.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 68da23e8b70..b6b8ffc08f4 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -53,6 +53,12 @@ #define STDOUT_LCD "" #endif +#ifdef CONFIG_DM_VIDEO +#define STDOUT_VIDEO ",vidconsole" +#else +#define STDOUT_VIDEO "" +#endif + #ifdef CONFIG_CROS_EC_KEYB #define STDOUT_CROS_EC ",cros-ec-keyb" #else @@ -61,8 +67,8 @@ #define TEGRA_DEVICE_SETTINGS \ "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \ - "stdout=serial" STDOUT_LCD "\0" \ - "stderr=serial" STDOUT_LCD "\0" \ + "stdout=serial" STDOUT_LCD STDOUT_VIDEO "\0" \ + "stderr=serial" STDOUT_LCD STDOUT_VIDEO "\0" \ "" #ifndef BOARD_EXTRA_ENV_SETTINGS -- cgit v1.2.3 From d76592122b347473f09a440702cc3be03e368511 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 30 Jan 2016 16:37:50 -0700 Subject: tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin Signed-off-by: Tom Warren --- include/configs/nyan-big.h | 2 -- include/fdtdec.h | 1 - 2 files changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index 176f6e902b3..eb00f2e8da0 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -38,10 +38,8 @@ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA #define CONFIG_AS3722_POWER -#define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CMD_BMP diff --git a/include/fdtdec.h b/include/fdtdec.h index d1c29a8a5d8..4caf3b6cbda 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -120,7 +120,6 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_EMC_TABLE, /* Tegra20 memory timing table */ COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */ COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */ - COMPAT_NVIDIA_TEGRA124_DC, /* Tegra 124 Display controller */ COMPAT_NVIDIA_TEGRA124_SOR, /* Tegra 124 Serial Output Resource */ COMPAT_NVIDIA_TEGRA124_PMC, /* Tegra 124 power mgmt controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ -- cgit v1.2.3 From d2f906500eb31e2661aacb99d811ab07da0fd5bd Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 30 Jan 2016 16:37:51 -0700 Subject: tegra: video: Rename CONFIG_VIDEO_TEGRA to CONFIG_VIDEO_TEGRA20 This option refers only to the tegra20 video driver, so name it as such to avoid confusion with tegra124. Also move this option to Kconfig. Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin Signed-off-by: Tom Warren --- include/configs/colibri_t20.h | 1 - include/configs/harmony.h | 1 - include/configs/medcom-wide.h | 1 - include/configs/paz00.h | 1 - include/configs/seaboard.h | 1 - include/configs/tec.h | 1 - include/configs/ventana.h | 1 - 7 files changed, 7 deletions(-) (limited to 'include') diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 7611fc5004c..e1aab72db72 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -55,7 +55,6 @@ /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/harmony.h b/include/configs/harmony.h index e0bc7c0d730..89dae8f1efb 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -62,7 +62,6 @@ /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index 6dfd5e2c40c..819cc18c91a 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -50,7 +50,6 @@ /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK diff --git a/include/configs/paz00.h b/include/configs/paz00.h index d9dd9bdcd4b..fc590251c43 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -50,7 +50,6 @@ /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 3e904746f29..87bf1b14bcd 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -68,7 +68,6 @@ /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/tec.h b/include/configs/tec.h index 4b8ca5e8da3..453ecc65748 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -50,7 +50,6 @@ /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK diff --git a/include/configs/ventana.h b/include/configs/ventana.h index e9c35001094..be54f95c412 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -51,7 +51,6 @@ /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define CONFIG_VIDEO_TEGRA #define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 -- cgit v1.2.3 From 9e6866d3b6687aaab854b29dad9809c7569e61a0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 30 Jan 2016 16:37:56 -0700 Subject: tegra: video: Convert tegra20 LCD driver to driver model Move this driver over to use driver model. This involves rearranging the code somewhat. The effect is that everything is run from the probe() method. Boards which use this are fixed up, but only seaboard is tested. Signed-off-by: Simon Glass Acked-by: Anatolij Gustschin Signed-off-by: Tom Warren --- include/configs/colibri_t20.h | 2 -- include/configs/harmony.h | 2 -- include/configs/medcom-wide.h | 2 -- include/configs/paz00.h | 2 -- include/configs/seaboard.h | 2 -- include/configs/tec.h | 2 -- include/configs/ventana.h | 2 -- 7 files changed, 14 deletions(-) (limited to 'include') diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index e1aab72db72..61d04b76e4c 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -53,9 +53,7 @@ #define CONFIG_TFTP_TSIZE /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 #define CONFIG_CMD_BMP diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 89dae8f1efb..a78f7c4db99 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -60,9 +60,7 @@ #define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index 819cc18c91a..c3e91283c7d 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -48,9 +48,7 @@ #define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK /* support the new (FDT-based) image format */ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index fc590251c43..04ddb1b0e89 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -48,9 +48,7 @@ #define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 87bf1b14bcd..01650e4f619 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -66,9 +66,7 @@ #define CONFIG_USB_KEYBOARD /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/tec.h b/include/configs/tec.h index 453ecc65748..9c2311bc344 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -48,9 +48,7 @@ #define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK /* support the new (FDT-based) image format */ diff --git a/include/configs/ventana.h b/include/configs/ventana.h index be54f95c412..8d10ddebb14 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -49,9 +49,7 @@ #define CONFIG_USB_KEYBOARD /* LCD support */ -#define CONFIG_LCD #define CONFIG_PWM_TEGRA -#define LCD_BPP LCD_COLOR16 #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 -- cgit v1.2.3 From 41fa035ce1480aa87d42e4af0ed8ea841944c2c9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 30 Jan 2016 16:38:00 -0700 Subject: tegra: Convert CONFIG_PWM_TEGRA to Kconfig Move this option to Kconfig and clean up the header files. Adjust the only user (the LCD driver) to work with the new driver. Signed-off-by: Simon Glass Signed-off-by: Tom Warren --- include/configs/colibri_t20.h | 1 - include/configs/harmony.h | 1 - include/configs/medcom-wide.h | 1 - include/configs/nyan-big.h | 1 - include/configs/paz00.h | 1 - include/configs/seaboard.h | 1 - include/configs/tec.h | 1 - include/configs/ventana.h | 1 - 8 files changed, 8 deletions(-) (limited to 'include') diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 61d04b76e4c..f3a1c9609bb 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -53,7 +53,6 @@ #define CONFIG_TFTP_TSIZE /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 #define CONFIG_CMD_BMP diff --git a/include/configs/harmony.h b/include/configs/harmony.h index a78f7c4db99..353caec22f9 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -60,7 +60,6 @@ #define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index c3e91283c7d..cd89fa537b9 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -48,7 +48,6 @@ #define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK /* support the new (FDT-based) image format */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index eb00f2e8da0..d99d93c18ba 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -38,7 +38,6 @@ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_AS3722_POWER #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CMD_BMP diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 04ddb1b0e89..6acecb1e27a 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -48,7 +48,6 @@ #define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 01650e4f619..fb9a106da3c 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -66,7 +66,6 @@ #define CONFIG_USB_KEYBOARD /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/tec.h b/include/configs/tec.h index 9c2311bc344..50b9e97fe79 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -48,7 +48,6 @@ #define CONFIG_CMD_DHCP /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK /* support the new (FDT-based) image format */ diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 8d10ddebb14..7f970d011d6 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -49,7 +49,6 @@ #define CONFIG_USB_KEYBOARD /* LCD support */ -#define CONFIG_PWM_TEGRA #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 -- cgit v1.2.3 From bf519825390af615da6266b3a26b9754797e4025 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 15 Feb 2016 10:34:03 -0700 Subject: ARM: tegra: don't set CONFIG_USB_MAX_CONTROLLER_COUNT This option is no longer used now that DM_USB is enabled. Fixes: 534f9d3feffd ("dm: tegra: usb: Move USB to driver model") Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- include/configs/apalis_t30.h | 1 - include/configs/beaver.h | 1 - include/configs/colibri_t20.h | 1 - include/configs/colibri_t30.h | 1 - include/configs/e2220-1170.h | 1 - include/configs/harmony.h | 1 - include/configs/jetson-tk1.h | 1 - include/configs/nyan-big.h | 1 - include/configs/p2371-0000.h | 1 - include/configs/p2371-2180.h | 1 - include/configs/p2571.h | 1 - include/configs/seaboard.h | 1 - include/configs/trimslice.h | 1 - include/configs/venice2.h | 1 - 14 files changed, 14 deletions(-) (limited to 'include') diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index e1eb700404c..32e9ba38d9d 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -43,7 +43,6 @@ /* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/beaver.h b/include/configs/beaver.h index 89c7446d265..c672a8e40ce 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -51,7 +51,6 @@ /* USB Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index f3a1c9609bb..b7ad189af32 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -38,7 +38,6 @@ #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_ULPI #define CONFIG_USB_ULPI_VIEWPORT -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index ef743b0d33c..47914c76798 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -43,7 +43,6 @@ /* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h index 18a63d7ec71..33ebb7c7afa 100644 --- a/include/configs/e2220-1170.h +++ b/include/configs/e2220-1170.h @@ -44,7 +44,6 @@ /* USB2.0 Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 353caec22f9..f66ac7087e8 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -42,7 +42,6 @@ #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */ /* USB Host support */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_ULPI diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index 23b2e436167..763d2ec71ee 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -48,7 +48,6 @@ /* USB Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index d99d93c18ba..d528fac8c89 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -55,7 +55,6 @@ /* USB Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/p2371-0000.h b/include/configs/p2371-0000.h index fffe5c9df80..9ca29f8b4ee 100644 --- a/include/configs/p2371-0000.h +++ b/include/configs/p2371-0000.h @@ -44,7 +44,6 @@ /* USB2.0 Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/p2371-2180.h b/include/configs/p2371-2180.h index 7dbf4221f43..01fd743d823 100644 --- a/include/configs/p2371-2180.h +++ b/include/configs/p2371-2180.h @@ -44,7 +44,6 @@ /* USB2.0 Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/p2571.h b/include/configs/p2571.h index f3357d1e0d5..d35e25524f9 100644 --- a/include/configs/p2571.h +++ b/include/configs/p2571.h @@ -45,7 +45,6 @@ /* USB2.0 Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index fb9a106da3c..06112139ea8 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_MMC_ENV_PART 2 /* USB Host support */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_STORAGE diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 8761f8de093..92ebb6aa4cd 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -44,7 +44,6 @@ #define CONFIG_ENV_OFFSET (512 * 1024) /* USB Host support */ -#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA #define CONFIG_USB_STORAGE diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 4a0b4483325..75f7268d10c 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -45,7 +45,6 @@ /* USB Host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB -- cgit v1.2.3 From 5589bc2770a7d7fe346f5972596f26d1ddf57bba Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 15 Feb 2016 10:34:04 -0700 Subject: ARM: tegra: enable USB device mode port on Dalmore This allows U-Boot to expose UMS and DFU protocols on this port in device mode, or to act as a USB host on the port, using an "OTG" (micro-B to female A host) cable. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- include/configs/dalmore.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index fdfda6b9034..f74ced1b439 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -58,6 +58,7 @@ /* General networking support */ #define CONFIG_CMD_DHCP +#include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" #endif /* __CONFIG_H */ -- cgit v1.2.3