From 79926e4f2f3cf84c65188c59ea1e93d6b221d36b Mon Sep 17 00:00:00 2001 From: Ovidiu Panait Date: Sun, 29 Mar 2020 20:57:41 +0300 Subject: common/board_f: Make reserve_mmu generic Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu routines. Also, define a weak nop stub for it. Signed-off-by: Ovidiu Panait Reviewed-by: Simon Glass --- include/init.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/init.h b/include/init.h index 2a33a3fd1e4..9ef88c966be 100644 --- a/include/init.h +++ b/include/init.h @@ -129,6 +129,18 @@ int testdram(void); */ int arch_reserve_stacks(void); +/** + * arch_reserve_mmu() - Reserve memory for MMU TLB table + * + * Architecture-specific routine for reserving memory for the MMU TLB table. + * This is used in generic board init sequence in common/board_f.c. + * + * If an implementation is not provided, it will just be a nop stub. + * + * Return: 0 if OK + */ +int arch_reserve_mmu(void); + /** * init_cache_f_r() - Turn on the cache in preparation for relocation * @@ -145,7 +157,6 @@ int init_cache_f_r(void); int print_cpuinfo(void); #endif int timer_init(void); -int reserve_mmu(void); int misc_init_f(void); #if defined(CONFIG_DTB_RESELECT) -- cgit v1.2.3 From 4f04d54981cd9d641e4ca958c551aeb00ee55484 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 8 Apr 2020 08:32:55 -0600 Subject: test: Add the beginnings of some string tests There are quite a few string functions in U-Boot with no tests. Make a start by adding a test for strtoul(). Signed-off-by: Simon Glass --- include/test/suites.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/test/suites.h b/include/test/suites.h index 39ad81a90f9..213e3cee77f 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -33,6 +33,7 @@ int do_ut_lib(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); int do_ut_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); int do_ut_optee(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); +int do_ut_str(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]); int do_ut_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); int do_ut_unicode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); -- cgit v1.2.3 From fdc79a6b125d52b6ca0fd65df538db7810d88a8d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 8 Apr 2020 08:32:56 -0600 Subject: lib: Add a function to convert a string to upper case Add a helper function for this operation. Update the strtoul() tests to check upper case as well. Signed-off-by: Simon Glass Reviewed-by: Heinrich Schuchardt --- include/vsprintf.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/vsprintf.h b/include/vsprintf.h index 56844dd2de8..d9fb68add0c 100644 --- a/include/vsprintf.h +++ b/include/vsprintf.h @@ -222,4 +222,16 @@ bool str2long(const char *p, ulong *num); * @hz: Value to convert */ char *strmhz(char *buf, unsigned long hz); + +/** + * str_to_upper() - Convert a string to upper case + * + * This simply uses toupper() on each character of the string. + * + * @in: String to convert (must be large enough to hold the output string) + * @out: Buffer to put converted string + * @len: Number of bytes available in @out (SIZE_MAX for all) + */ +void str_to_upper(const char *in, char *out, size_t len); + #endif -- cgit v1.2.3 From 2c2ca207e4ed7def3f3f33ab930e673a45bb3743 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 8 Apr 2020 08:32:58 -0600 Subject: uuid: Use const char * where possible Update the arguments of these functions so they can be called from code which uses constant strings. Signed-off-by: Simon Glass --- include/uuid.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/uuid.h b/include/uuid.h index abcc325eae9..73c5a89ec7c 100644 --- a/include/uuid.h +++ b/include/uuid.h @@ -35,11 +35,13 @@ struct uuid { #define UUID_VARIANT 0x1 int uuid_str_valid(const char *uuid); -int uuid_str_to_bin(char *uuid_str, unsigned char *uuid_bin, int str_format); -void uuid_bin_to_str(unsigned char *uuid_bin, char *uuid_str, int str_format); +int uuid_str_to_bin(const char *uuid_str, unsigned char *uuid_bin, + int str_format); +void uuid_bin_to_str(const unsigned char *uuid_bin, char *uuid_str, + int str_format); #ifdef CONFIG_PARTITION_TYPE_GUID int uuid_guid_get_bin(const char *guid_str, unsigned char *guid_bin); -int uuid_guid_get_str(unsigned char *guid_bin, char *guid_str); +int uuid_guid_get_str(const unsigned char *guid_bin, char *guid_str); #endif void gen_rand_uuid(unsigned char *uuid_bin); void gen_rand_uuid_str(char *uuid_str, int str_format); -- cgit v1.2.3 From f05970380e4c72a198cce29affc622a8e543b4de Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 8 Apr 2020 08:32:59 -0600 Subject: pci: Add a macro to convert BDF from linux to U-Boot U-Boot's BDF format has its bits in the same position as the device tree PCI definition. Some x86 devices use linux format in their register format and it is useful to be able to convert to U-Boot format. Add a macro for this. Signed-off-by: Simon Glass --- include/pci.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/pci.h b/include/pci.h index 174ddd4460d..aff56b24f92 100644 --- a/include/pci.h +++ b/include/pci.h @@ -543,6 +543,9 @@ typedef int pci_dev_t; #define PCI_VENDEV(v, d) (((v) << 16) | (d)) #define PCI_ANY_ID (~0) +/* Convert from Linux format to U-Boot format */ +#define PCI_TO_BDF(val) ((val) << 8) + struct pci_device_id { unsigned int vendor, device; /* Vendor and device ID or PCI_ANY_ID */ unsigned int subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */ -- cgit v1.2.3 From 3a905cd231de8834cda329f20854dc1f91328ae5 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 8 Apr 2020 08:33:00 -0600 Subject: dm: mmc: Update mmc_get_mmc_dev() to use const * This function does not modify the device to change it to use const *, so that callers with a const udevice * can call it without a cast. Signed-off-by: Simon Glass Reviewed-by: Jaehoon Chung --- include/mmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/mmc.h b/include/mmc.h index 5e9d15cb41a..6a2e9739e00 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -377,7 +377,7 @@ struct mmc_uclass_priv { * @dev: Device * @return associated mmc struct pointer if available, else NULL */ -struct mmc *mmc_get_mmc_dev(struct udevice *dev); +struct mmc *mmc_get_mmc_dev(const struct udevice *dev); /* End of driver model support */ -- cgit v1.2.3 From b1a6bb3b5998f0f2e84f0a6d255e936be3eb17f5 Mon Sep 17 00:00:00 2001 From: Amit Singh Tomar Date: Sun, 19 Apr 2020 19:28:25 +0530 Subject: arm: actions: Add common framework for Actions Owl Semi SoCs This commit adds common arch support for Actions Semi Owl series SoCs and removes the Bubblegum96 board files. Reviewed-by: Manivannan Sadhasivam Reviewed-by: Andre Przywara Signed-off-by: Amit Singh Tomar --- include/configs/bubblegum_96.h | 40 ---------------------------------------- include/configs/owl-common.h | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+), 40 deletions(-) delete mode 100644 include/configs/bubblegum_96.h create mode 100644 include/configs/owl-common.h (limited to 'include') diff --git a/include/configs/bubblegum_96.h b/include/configs/bubblegum_96.h deleted file mode 100644 index c739d665f66..00000000000 --- a/include/configs/bubblegum_96.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Board configuration file for Bubblegum-96 - * - * Copyright (C) 2015 Actions Semi Co., Ltd. - * Copyright (C) 2018 Manivannan Sadhasivam - * - */ - -#ifndef _BUBBLEGUM_96_H_ -#define _BUGGLEGUM_96_H_ - -/* SDRAM Definitions */ -#define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_SYS_SDRAM_SIZE 0x80000000 - -/* Generic Timer Definitions */ -#define COUNTER_FREQUENCY (24000000) /* 24MHz */ - -#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024) - -/* Some commands use this as the default load address */ -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7ffc0) - -/* - * This is the initial SP which is used only briefly for relocating the u-boot - * image to the top of SDRAM. After relocation u-boot moves the stack to the - * proper place. - */ -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00) - -/* UART Definitions */ -#define CONFIG_BAUDRATE 115200 - -/* Console configuration */ -#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ -#define CONFIG_SYS_MAXARGS 64 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#endif diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h new file mode 100644 index 00000000000..f77a5fa4c11 --- /dev/null +++ b/include/configs/owl-common.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Board configuration file for Actions Semi Owl SoCs. + * + * Copyright (C) 2015 Actions Semi Co., Ltd. + * Copyright (C) 2018 Manivannan Sadhasivam + * + */ + +#ifndef _OWL_COMMON_CONFIG_H_ +#define _OWL_COMMON_CONFIG_H_ + +/* SDRAM Definitions */ +#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CONFIG_SYS_SDRAM_SIZE 0x80000000 + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY (24000000) /* 24MHz */ + +#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024) + +/* Some commands use this as the default load address */ +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7ffc0) + +/* + * This is the initial SP which is used only briefly for relocating the u-boot + * image to the top of SDRAM. After relocation u-boot moves the stack to the + * proper place. + */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00) + +/* UART Definitions */ +#define CONFIG_BAUDRATE 115200 + +/* Console configuration */ +#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#endif -- cgit v1.2.3 From 4939beea8e14314bc27ca343526c456ed75640fb Mon Sep 17 00:00:00 2001 From: Amit Singh Tomar Date: Sun, 19 Apr 2020 19:28:28 +0530 Subject: arm: dts: sync dts for Action Semi S900 Synchronize device tree bindings with v5.5-rc6 tag with commit id "b3a987b0264d". Also, it removes older clock binding defined for S900 along with undocumented compatible string "actions,s900-serial" from serial driver and adapts clock driver to cater to new bindings. Reviewed-by: Manivannan Sadhasivam Reviewed-by: Andre Przywara Signed-off-by: Amit Singh Tomar --- include/dt-bindings/clock/actions,s900-cmu.h | 129 +++++++++++++++++++++++++ include/dt-bindings/clock/s900_cmu.h | 77 --------------- include/dt-bindings/reset/actions,s900-reset.h | 65 +++++++++++++ 3 files changed, 194 insertions(+), 77 deletions(-) create mode 100644 include/dt-bindings/clock/actions,s900-cmu.h delete mode 100644 include/dt-bindings/clock/s900_cmu.h create mode 100644 include/dt-bindings/reset/actions,s900-reset.h (limited to 'include') diff --git a/include/dt-bindings/clock/actions,s900-cmu.h b/include/dt-bindings/clock/actions,s900-cmu.h new file mode 100644 index 00000000000..7c1251565f4 --- /dev/null +++ b/include/dt-bindings/clock/actions,s900-cmu.h @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Device Tree binding constants for Actions Semi S900 Clock Management Unit +// +// Copyright (c) 2014 Actions Semi Inc. +// Copyright (c) 2018 Linaro Ltd. + +#ifndef __DT_BINDINGS_CLOCK_S900_CMU_H +#define __DT_BINDINGS_CLOCK_S900_CMU_H + +#define CLK_NONE 0 + +/* fixed rate clocks */ +#define CLK_LOSC 1 +#define CLK_HOSC 2 + +/* pll clocks */ +#define CLK_CORE_PLL 3 +#define CLK_DEV_PLL 4 +#define CLK_DDR_PLL 5 +#define CLK_NAND_PLL 6 +#define CLK_DISPLAY_PLL 7 +#define CLK_DSI_PLL 8 +#define CLK_ASSIST_PLL 9 +#define CLK_AUDIO_PLL 10 + +/* system clock */ +#define CLK_CPU 15 +#define CLK_DEV 16 +#define CLK_NOC 17 +#define CLK_NOC_MUX 18 +#define CLK_NOC_DIV 19 +#define CLK_AHB 20 +#define CLK_APB 21 +#define CLK_DMAC 22 + +/* peripheral device clock */ +#define CLK_GPIO 23 + +#define CLK_BISP 24 +#define CLK_CSI0 25 +#define CLK_CSI1 26 + +#define CLK_DE0 27 +#define CLK_DE1 28 +#define CLK_DE2 29 +#define CLK_DE3 30 +#define CLK_DSI 32 + +#define CLK_GPU 33 +#define CLK_GPU_CORE 34 +#define CLK_GPU_MEM 35 +#define CLK_GPU_SYS 36 + +#define CLK_HDE 37 +#define CLK_I2C0 38 +#define CLK_I2C1 39 +#define CLK_I2C2 40 +#define CLK_I2C3 41 +#define CLK_I2C4 42 +#define CLK_I2C5 43 +#define CLK_I2SRX 44 +#define CLK_I2STX 45 +#define CLK_IMX 46 +#define CLK_LCD 47 +#define CLK_NAND0 48 +#define CLK_NAND1 49 +#define CLK_PWM0 50 +#define CLK_PWM1 51 +#define CLK_PWM2 52 +#define CLK_PWM3 53 +#define CLK_PWM4 54 +#define CLK_PWM5 55 +#define CLK_SD0 56 +#define CLK_SD1 57 +#define CLK_SD2 58 +#define CLK_SD3 59 +#define CLK_SENSOR 60 +#define CLK_SPEED_SENSOR 61 +#define CLK_SPI0 62 +#define CLK_SPI1 63 +#define CLK_SPI2 64 +#define CLK_SPI3 65 +#define CLK_THERMAL_SENSOR 66 +#define CLK_UART0 67 +#define CLK_UART1 68 +#define CLK_UART2 69 +#define CLK_UART3 70 +#define CLK_UART4 71 +#define CLK_UART5 72 +#define CLK_UART6 73 +#define CLK_VCE 74 +#define CLK_VDE 75 + +#define CLK_USB3_480MPLL0 76 +#define CLK_USB3_480MPHY0 77 +#define CLK_USB3_5GPHY 78 +#define CLK_USB3_CCE 79 +#define CLK_USB3_MAC 80 + +#define CLK_TIMER 83 + +#define CLK_HDMI_AUDIO 84 + +#define CLK_24M 85 + +#define CLK_EDP 86 + +#define CLK_24M_EDP 87 +#define CLK_EDP_PLL 88 +#define CLK_EDP_LINK 89 + +#define CLK_USB2H0_PLLEN 90 +#define CLK_USB2H0_PHY 91 +#define CLK_USB2H0_CCE 92 +#define CLK_USB2H1_PLLEN 93 +#define CLK_USB2H1_PHY 94 +#define CLK_USB2H1_CCE 95 + +#define CLK_DDR0 96 +#define CLK_DDR1 97 +#define CLK_DMM 98 + +#define CLK_ETH_MAC 99 +#define CLK_RMII_REF 100 + +#define CLK_NR_CLKS (CLK_RMII_REF + 1) + +#endif /* __DT_BINDINGS_CLOCK_S900_CMU_H */ diff --git a/include/dt-bindings/clock/s900_cmu.h b/include/dt-bindings/clock/s900_cmu.h deleted file mode 100644 index 2685a6df4a2..00000000000 --- a/include/dt-bindings/clock/s900_cmu.h +++ /dev/null @@ -1,77 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2015 Actions Semi Co., Ltd. - * Copyright (C) 2018 Manivannan Sadhasivam - * - */ - -#ifndef _DT_BINDINGS_CLOCK_S900_CMU_H_ -#define _DT_BINDINGS_CLOCK_S900_CMU_H_ - -/* Module Clock ID */ -#define CLOCK_DDRCH1 0 -#define CLOCK_DMAC 1 -#define CLOCK_DDRCH0 2 -#define CLOCK_BROM 3 -#define CLOCK_NANDC0 4 -#define CLOCK_SD0 5 -#define CLOCK_SD1 6 -#define CLOCK_SD2 7 -#define CLOCK_DE 8 -#define CLOCK_LVDS 9 -#define CLOCK_EDP 10 -#define CLOCK_NANDC1 11 -#define CLOCK_DSI 12 -#define CLOCK_CSI0 13 -#define CLOCK_BISP 14 -#define CLOCK_CSI1 15 -#define CLOCK_SD3 16 -#define CLOCK_I2C4 17 -#define CLOCK_GPIO 18 -#define CLOCK_DMM 19 -#define CLOCK_I2STX 20 -#define CLOCK_I2SRX 21 -#define CLOCK_HDMIA 22 -#define CLOCK_SPDIF 23 -#define CLOCK_PCM0 24 -#define CLOCK_VDE 25 -#define CLOCK_VCE 26 -#define CLOCK_HDE 27 -#define CLOCK_SHARESRAM 28 -#define CLOCK_CMU_DDR1 29 -#define CLOCK_GPU3D 30 -#define CLOCK_CMUDDR0 31 -#define CLOCK_SPEED 32 -#define CLOCK_I2C5 33 -#define CLOCK_THERMAL 34 -#define CLOCK_HDMI 35 -#define CLOCK_PWM4 36 -#define CLOCK_PWM5 37 -#define CLOCK_UART0 38 -#define CLOCK_UART1 39 -#define CLOCK_UART2 40 -#define CLOCK_IRC 41 -#define CLOCK_SPI0 42 -#define CLOCK_SPI1 43 -#define CLOCK_SPI2 44 -#define CLOCK_SPI3 45 -#define CLOCK_I2C0 46 -#define CLOCK_I2C1 47 -#define CLOCK_PCM1 48 -#define CLOCK_IMX 49 -#define CLOCK_UART6 50 -#define CLOCK_UART3 51 -#define CLOCK_UART4 52 -#define CLOCK_UART5 53 -#define CLOCK_ETHERNET 54 -#define CLOCK_PWM0 55 -#define CLOCK_PWM1 56 -#define CLOCK_PWM2 57 -#define CLOCK_PWM3 58 -#define CLOCK_TIMER 59 -#define CLOCK_SE 60 -#define CLOCK_HDCP2TX 61 -#define CLOCK_I2C2 62 -#define CLOCK_I2C3 63 - -#endif diff --git a/include/dt-bindings/reset/actions,s900-reset.h b/include/dt-bindings/reset/actions,s900-reset.h new file mode 100644 index 00000000000..42c19d02e43 --- /dev/null +++ b/include/dt-bindings/reset/actions,s900-reset.h @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +// +// Device Tree binding constants for Actions Semi S900 Reset Management Unit +// +// Copyright (c) 2018 Linaro Ltd. + +#ifndef __DT_BINDINGS_ACTIONS_S900_RESET_H +#define __DT_BINDINGS_ACTIONS_S900_RESET_H + +#define RESET_CHIPID 0 +#define RESET_CPU_SCNT 1 +#define RESET_SRAMI 2 +#define RESET_DDR_CTL_PHY 3 +#define RESET_DMAC 4 +#define RESET_GPIO 5 +#define RESET_BISP_AXI 6 +#define RESET_CSI0 7 +#define RESET_CSI1 8 +#define RESET_DE 9 +#define RESET_DSI 10 +#define RESET_GPU3D_PA 11 +#define RESET_GPU3D_PB 12 +#define RESET_HDE 13 +#define RESET_I2C0 14 +#define RESET_I2C1 15 +#define RESET_I2C2 16 +#define RESET_I2C3 17 +#define RESET_I2C4 18 +#define RESET_I2C5 19 +#define RESET_IMX 20 +#define RESET_NANDC0 21 +#define RESET_NANDC1 22 +#define RESET_SD0 23 +#define RESET_SD1 24 +#define RESET_SD2 25 +#define RESET_SD3 26 +#define RESET_SPI0 27 +#define RESET_SPI1 28 +#define RESET_SPI2 29 +#define RESET_SPI3 30 +#define RESET_UART0 31 +#define RESET_UART1 32 +#define RESET_UART2 33 +#define RESET_UART3 34 +#define RESET_UART4 35 +#define RESET_UART5 36 +#define RESET_UART6 37 +#define RESET_HDMI 38 +#define RESET_LVDS 39 +#define RESET_EDP 40 +#define RESET_USB2HUB 41 +#define RESET_USB2HSIC 42 +#define RESET_USB3 43 +#define RESET_PCM1 44 +#define RESET_AUDIO 45 +#define RESET_PCM0 46 +#define RESET_SE 47 +#define RESET_GIC 48 +#define RESET_DDR_CTL_PHY_AXI 49 +#define RESET_CMU_DDR 50 +#define RESET_DMM 51 +#define RESET_HDCP2TX 52 +#define RESET_ETHERNET 53 + +#endif /* __DT_BINDINGS_ACTIONS_S900_RESET_H */ -- cgit v1.2.3 From 1050eaa0821e16d622f4a91295a751c4b37e9032 Mon Sep 17 00:00:00 2001 From: Amit Singh Tomar Date: Sun, 19 Apr 2020 19:28:31 +0530 Subject: arm: actions: add S700 SoC device tree This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d") and required binding for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores. It also provisions dts file to be built based on selected platform(CONFIG_MACH_S900/S700). Reviewed-by: Manivannan Sadhasivam Reviewed-by: Andre Przywara Signed-off-by: Amit Singh Tomar --- include/dt-bindings/clock/actions,s700-cmu.h | 118 +++++++++++++++++++++++++ include/dt-bindings/reset/actions,s700-reset.h | 34 +++++++ 2 files changed, 152 insertions(+) create mode 100644 include/dt-bindings/clock/actions,s700-cmu.h create mode 100644 include/dt-bindings/reset/actions,s700-reset.h (limited to 'include') diff --git a/include/dt-bindings/clock/actions,s700-cmu.h b/include/dt-bindings/clock/actions,s700-cmu.h new file mode 100644 index 00000000000..3e194299672 --- /dev/null +++ b/include/dt-bindings/clock/actions,s700-cmu.h @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Device Tree binding constants for Actions Semi S700 Clock Management Unit + * + * Copyright (c) 2014 Actions Semi Inc. + * Author: David Liu + * + * Author: Pathiban Nallathambi + * Author: Saravanan Sekar + */ + +#ifndef __DT_BINDINGS_CLOCK_S700_H +#define __DT_BINDINGS_CLOCK_S700_H + +#define CLK_NONE 0 + +/* pll clocks */ +#define CLK_CORE_PLL 1 +#define CLK_DEV_PLL 2 +#define CLK_DDR_PLL 3 +#define CLK_NAND_PLL 4 +#define CLK_DISPLAY_PLL 5 +#define CLK_TVOUT_PLL 6 +#define CLK_CVBS_PLL 7 +#define CLK_AUDIO_PLL 8 +#define CLK_ETHERNET_PLL 9 + +/* system clock */ +#define CLK_CPU 10 +#define CLK_DEV 11 +#define CLK_AHB 12 +#define CLK_APB 13 +#define CLK_DMAC 14 +#define CLK_NOC0_CLK_MUX 15 +#define CLK_NOC1_CLK_MUX 16 +#define CLK_HP_CLK_MUX 17 +#define CLK_HP_CLK_DIV 18 +#define CLK_NOC1_CLK_DIV 19 +#define CLK_NOC0 20 +#define CLK_NOC1 21 +#define CLK_SENOR_SRC 22 + +/* peripheral device clock */ +#define CLK_GPIO 23 +#define CLK_TIMER 24 +#define CLK_DSI 25 +#define CLK_CSI 26 +#define CLK_SI 27 +#define CLK_DE 28 +#define CLK_HDE 29 +#define CLK_VDE 30 +#define CLK_VCE 31 +#define CLK_NAND 32 +#define CLK_SD0 33 +#define CLK_SD1 34 +#define CLK_SD2 35 + +#define CLK_UART0 36 +#define CLK_UART1 37 +#define CLK_UART2 38 +#define CLK_UART3 39 +#define CLK_UART4 40 +#define CLK_UART5 41 +#define CLK_UART6 42 + +#define CLK_PWM0 43 +#define CLK_PWM1 44 +#define CLK_PWM2 45 +#define CLK_PWM3 46 +#define CLK_PWM4 47 +#define CLK_PWM5 48 +#define CLK_GPU3D 49 + +#define CLK_I2C0 50 +#define CLK_I2C1 51 +#define CLK_I2C2 52 +#define CLK_I2C3 53 + +#define CLK_SPI0 54 +#define CLK_SPI1 55 +#define CLK_SPI2 56 +#define CLK_SPI3 57 + +#define CLK_USB3_480MPLL0 58 +#define CLK_USB3_480MPHY0 59 +#define CLK_USB3_5GPHY 60 +#define CLK_USB3_CCE 61 +#define CLK_USB3_MAC 62 + +#define CLK_LCD 63 +#define CLK_HDMI_AUDIO 64 +#define CLK_I2SRX 65 +#define CLK_I2STX 66 + +#define CLK_SENSOR0 67 +#define CLK_SENSOR1 68 + +#define CLK_HDMI_DEV 69 + +#define CLK_ETHERNET 70 +#define CLK_RMII_REF 71 + +#define CLK_USB2H0_PLLEN 72 +#define CLK_USB2H0_PHY 73 +#define CLK_USB2H0_CCE 74 +#define CLK_USB2H1_PLLEN 75 +#define CLK_USB2H1_PHY 76 +#define CLK_USB2H1_CCE 77 + +#define CLK_TVOUT 78 + +#define CLK_THERMAL_SENSOR 79 + +#define CLK_IRC_SWITCH 80 +#define CLK_PCM1 81 +#define CLK_NR_CLKS (CLK_PCM1 + 1) + +#endif /* __DT_BINDINGS_CLOCK_S700_H */ diff --git a/include/dt-bindings/reset/actions,s700-reset.h b/include/dt-bindings/reset/actions,s700-reset.h new file mode 100644 index 00000000000..5e3b16b8ef5 --- /dev/null +++ b/include/dt-bindings/reset/actions,s700-reset.h @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +// +// Device Tree binding constants for Actions Semi S700 Reset Management Unit +// +// Copyright (c) 2018 Linaro Ltd. + +#ifndef __DT_BINDINGS_ACTIONS_S700_RESET_H +#define __DT_BINDINGS_ACTIONS_S700_RESET_H + +#define RESET_AUDIO 0 +#define RESET_CSI 1 +#define RESET_DE 2 +#define RESET_DSI 3 +#define RESET_GPIO 4 +#define RESET_I2C0 5 +#define RESET_I2C1 6 +#define RESET_I2C2 7 +#define RESET_I2C3 8 +#define RESET_KEY 9 +#define RESET_LCD0 10 +#define RESET_SI 11 +#define RESET_SPI0 12 +#define RESET_SPI1 13 +#define RESET_SPI2 14 +#define RESET_SPI3 15 +#define RESET_UART0 16 +#define RESET_UART1 17 +#define RESET_UART2 18 +#define RESET_UART3 19 +#define RESET_UART4 20 +#define RESET_UART5 21 +#define RESET_UART6 22 + +#endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */ -- cgit v1.2.3