From 677a24cbc3ef47bef355df45eff289d2dc371df0 Mon Sep 17 00:00:00 2001 From: Ricardo Salveti Date: Tue, 6 Jul 2021 20:43:01 -0300 Subject: xilinx: zynqmp: increase CONFIG_SYS_SPL_MALLOC_SIZE to 16MB commit 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images")' changed the way buffer allocation worked for SPL to a more flexible method. For xilinx zynqmp the 1MB buffer is not necessarily enough when dealing with complex fit images (e.g. containing FPGA/TF-A/OP-TEE/U-Boot proper), which can easily reach up to 10MB, so increase the default CONFIG_SYS_SPL_MALLOC_SIZE size to 16MB to cover more advanced scenarios. Signed-off-by: Ricardo Salveti Signed-off-by: Michal Simek --- include/configs/xilinx_zynqmp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index cadaf1a9631..bfe8a204279 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -261,7 +261,7 @@ #endif #define CONFIG_SYS_SPL_MALLOC_START 0x20000000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000000 #ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE # error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used" -- cgit v1.3.1 From a70bdafd67afa8d5a5ec73280c74a51a03640b66 Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Fri, 9 Jul 2021 05:53:42 -0600 Subject: mmc: zynq_sdhci: Split set_tapdelay function to in and out Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays separately. This is required to handle zero values for ITAP and OTAP values. If we dont split, we will have to remove the if() in the function, which makes ITAP values to be overwritten when OTAP values are called to set and vice-versa. Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6 bits for OTAP for ZynqMP. Signed-off-by: Ashok Reddy Soma Reviewed-by: Jaehoon Chung Signed-off-by: Michal Simek --- board/xilinx/zynqmp/tap_delays.c | 73 +++++++++++++++++++++------------------- drivers/mmc/zynq_sdhci.c | 10 ++++-- include/zynqmp_tap_delay.h | 7 ++-- 3 files changed, 50 insertions(+), 40 deletions(-) (limited to 'include') diff --git a/board/xilinx/zynqmp/tap_delays.c b/board/xilinx/zynqmp/tap_delays.c index 1cab25f00a5..d16bbb8eff9 100644 --- a/board/xilinx/zynqmp/tap_delays.c +++ b/board/xilinx/zynqmp/tap_delays.c @@ -50,48 +50,51 @@ void zynqmp_dll_reset(u8 deviceid) zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0); } -void arasan_zynqmp_set_tapdelay(u8 deviceid, u32 itap_delay, u32 otap_delay) +void arasan_zynqmp_set_in_tapdelay(u8 deviceid, u32 itap_delay) { if (deviceid == 0) { - zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, - SD0_DLL_RST); - /* Program ITAP */ - if (itap_delay) { - zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, - SD0_ITAPCHGWIN); - zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYENA_MASK, - SD0_ITAPDLYENA); - zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYSEL_MASK, - itap_delay); - zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, - 0x0); - } + zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, SD0_DLL_RST); - /* Program OTAP */ - if (otap_delay) - zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK, - otap_delay); + /* Program ITAP delay */ + zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, + SD0_ITAPCHGWIN); + zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYENA_MASK, + SD0_ITAPDLYENA); + zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYSEL_MASK, itap_delay); + zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0); zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0); } else { - zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, - SD1_DLL_RST); - /* Program ITAP */ - if (itap_delay) { - zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, - SD1_ITAPCHGWIN); - zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYENA_MASK, - SD1_ITAPDLYENA); - zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYSEL_MASK, - (itap_delay << 16)); - zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, - 0x0); - } + zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, SD1_DLL_RST); + + /* Program ITAP delay */ + zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, + SD1_ITAPCHGWIN); + zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYENA_MASK, + SD1_ITAPDLYENA); + zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYSEL_MASK, + (itap_delay << 16)); + zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, 0x0); + + zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0); + } +} + +void arasan_zynqmp_set_out_tapdelay(u8 deviceid, u32 otap_delay) +{ + if (deviceid == 0) { + zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, SD0_DLL_RST); + + /* Program OTAP delay */ + zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK, otap_delay); + + zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0); + } else { + zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, SD1_DLL_RST); - /* Program OTAP */ - if (otap_delay) - zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, - (otap_delay << 16)); + /* Program OTAP delay */ + zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, + (otap_delay << 16)); zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0); } diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index bf638e96758..95d42ccef44 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -226,7 +226,10 @@ static int sdhci_zynqmp_sdcardclk_set_phase(struct sdhci_host *host, tap_delay = (degrees * tap_max) / 360; - arasan_zynqmp_set_tapdelay(priv->deviceid, 0, tap_delay); + /* Limit output tap_delay value to 6 bits */ + tap_delay &= SDHCI_ARASAN_OTAPDLY_SEL_MASK; + + arasan_zynqmp_set_out_tapdelay(priv->deviceid, tap_delay); return 0; } @@ -279,7 +282,10 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct sdhci_host *host, tap_delay = (degrees * tap_max) / 360; - arasan_zynqmp_set_tapdelay(priv->deviceid, tap_delay, 0); + /* Limit input tap_delay value to 8 bits */ + tap_delay &= SDHCI_ARASAN_ITAPDLY_SEL_MASK; + + arasan_zynqmp_set_in_tapdelay(priv->deviceid, tap_delay); return 0; } diff --git a/include/zynqmp_tap_delay.h b/include/zynqmp_tap_delay.h index 7b713438f75..1c1e3e7deed 100644 --- a/include/zynqmp_tap_delay.h +++ b/include/zynqmp_tap_delay.h @@ -10,11 +10,12 @@ #ifdef CONFIG_ARCH_ZYNQMP void zynqmp_dll_reset(u8 deviceid); -void arasan_zynqmp_set_tapdelay(u8 device_id, u32 itap_delay, u32 otap_delay); +void arasan_zynqmp_set_in_tapdelay(u8 device_id, u32 itap_delay); +void arasan_zynqmp_set_out_tapdelay(u8 device_id, u32 otap_delay); #else inline void zynqmp_dll_reset(u8 deviceid) {} -inline void arasan_zynqmp_set_tapdelay(u8 device_id, u32 itap_delay, - u32 otap_delay) {} +inline void arasan_zynqmp_set_in_tapdelay(u8 device_id, u32 itap_delay) {} +inline void arasan_zynqmp_set_out_tapdelay(u8 device_id, u32 otap_delay) {} #endif #endif -- cgit v1.3.1 From d20cf6b6c3ff15ff497bd96882b28616048b35eb Mon Sep 17 00:00:00 2001 From: Ashok Reddy Soma Date: Fri, 2 Jul 2021 04:40:33 -0600 Subject: net: ethtool: Add ethernet speed macros for higher speeds Add speed macro's for higher ethernet speeds to be used in u-boot networking drivers. Added Macros for speeds 14G, 20G, 25G, 40G, 50G, 56G, 100G and 200G inline with linux. Signed-off-by: Ashok Reddy Soma Reviewed-by: Simon Glass Acked-by: Ramon Fried Signed-off-by: Michal Simek --- include/linux/ethtool.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index f6dbdb096d3..aa7d2fd58f4 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -620,6 +620,14 @@ enum ethtool_sfeatures_retval_bits { #define SPEED_1000 1000 #define SPEED_2500 2500 #define SPEED_10000 10000 +#define SPEED_14000 14000 +#define SPEED_20000 20000 +#define SPEED_25000 25000 +#define SPEED_40000 40000 +#define SPEED_50000 50000 +#define SPEED_56000 56000 +#define SPEED_100000 100000 +#define SPEED_200000 200000 /* Duplex, half or full. */ #define DUPLEX_HALF 0x00 -- cgit v1.3.1 From 9ca09621760453dc452244498fdbcd52e3e2f71d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 14 Jul 2021 09:07:04 +0200 Subject: arm64: versal: Drop default definitions of CONFIG_SYS_PBSIZE It is default value which had been converted by commit 432e39806805 ("include/configs: drop default definitions of CONFIG_SYS_PBSIZE"). That's why also remove it. Signed-off-by: Michal Simek --- include/configs/xilinx_versal.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index aae128f5ed0..15a9db2a928 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -41,8 +41,6 @@ /* Monitor Command Prompt */ /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MAXARGS 64 -- cgit v1.3.1 From 3965d13f933d5aa670f833eb9584f119e4a11d62 Mon Sep 17 00:00:00 2001 From: Raju Kumar Pothuraju Date: Mon, 12 Jul 2021 20:19:04 +0530 Subject: xilinx: Define kernel_comp_addr_r,kernel_comp_size env variables Add kernel_comp_addr_r, kernel_comp_size env variables for zynqmp and versal to be able to use the compressed kernel Image(.gz,.bz2,.lzma,.lzo) using booti command. Signed-off-by: Raju Kumar Pothuraju Signed-off-by: Michal Simek --- include/configs/xilinx_versal.h | 2 ++ include/configs/xilinx_zynqmp.h | 2 ++ 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 15a9db2a928..62680ad2386 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -65,6 +65,8 @@ "pxefile_addr_r=0x10000000\0" \ "kernel_addr_r=0x18000000\0" \ "kernel_size_r=0x10000000\0" \ + "kernel_comp_addr_r=0x30000000\0" \ + "kernel_comp_size=0x3C00000\0" \ "scriptaddr=0x20000000\0" \ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index bfe8a204279..262154cdffd 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -89,6 +89,8 @@ "pxefile_addr_r=0x10000000\0" \ "kernel_addr_r=0x18000000\0" \ "kernel_size_r=0x10000000\0" \ + "kernel_comp_addr_r=0x30000000\0" \ + "kernel_comp_size=0x3C00000\0" \ "scriptaddr=0x20000000\0" \ "ramdisk_addr_r=0x02100000\0" \ "script_size_f=0x80000\0" \ -- cgit v1.3.1