From 6d84ae3956a6cd7aebd86f661130752594e60124 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Tue, 3 Mar 2009 15:11:08 +0900 Subject: sh: Add macros for SH-4A 32-Bit Address Extended Mode Signed-off-by: Yoshihiro Shimoda Signed-off-by: Nobuhiro Iwamatsu --- include/asm-sh/cpu_sh4.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'include') diff --git a/include/asm-sh/cpu_sh4.h b/include/asm-sh/cpu_sh4.h index d2dbfcd143e..fdcebd608e1 100644 --- a/include/asm-sh/cpu_sh4.h +++ b/include/asm-sh/cpu_sh4.h @@ -54,4 +54,29 @@ # error "Unknown SH4 variant" #endif +#if defined(CONFIG_SH_32BIT) +#define PMB_ADDR_ARRAY 0xf6100000 +#define PMB_ADDR_ENTRY 8 +#define PMB_VPN 24 + +#define PMB_DATA_ARRAY 0xf7100000 +#define PMB_DATA_ENTRY 8 +#define PMB_PPN 24 +#define PMB_UB 9 /* Buffered write */ +#define PMB_V 8 /* Valid */ +#define PMB_SZ1 7 /* Page size (upper bit) */ +#define PMB_SZ0 4 /* Page size (lower bit) */ +#define PMB_C 3 /* Cacheability */ +#define PMB_WT 0 /* Write-through */ + +#define PMB_ADDR_BASE(entry) (PMB_ADDR_ARRAY + (entry << PMB_ADDR_ENTRY)) +#define PMB_DATA_BASE(entry) (PMB_DATA_ARRAY + (entry << PMB_DATA_ENTRY)) +#define mk_pmb_addr_val(vpn) ((vpn << PMB_VPN)) +#define mk_pmb_data_val(ppn, ub, v, sz1, sz0, c, wt) \ + ((ppn << PMB_PPN) | (ub << PMB_UB) | \ + (v << PMB_V) | (sz1 << PMB_SZ1) | \ + (sz0 << PMB_SZ0) | (c << PMB_C) | \ + (wt << PMB_WT)) +#endif + #endif /* _ASM_CPU_SH4_H_ */ -- cgit v1.2.3 From b3061b40db691245a7bb9a55354b4edacbf3902d Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 25 Feb 2009 14:26:55 +0900 Subject: sh: Add value for PCI system memory registration of sh7785lcr Signed-off-by: Yoshihiro Shimoda Signed-off-by: Nobuhiro Iwamatsu --- include/configs/sh7785lcr.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 537ec4ecadc..b4361caf6ee 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -144,6 +144,10 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ +#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE +#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE +#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE + /* Network device (RTL8169) support */ #define CONFIG_NET_MULTI #define CONFIG_RTL8169 -- cgit v1.2.3 From 06b18163b57e6b0349b0c299222d50e7b1e41e50 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 25 Feb 2009 14:26:42 +0900 Subject: sh: Add some register value configurable to PCI of SH7780 Some register value was hardcoded for System memory size 128MB and memory offset 0x08000000. This patch fixed the problem. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Nobuhiro Iwamatsu --- include/configs/r7780mp.h | 3 +++ include/configs/sh7785lcr.h | 3 +++ 2 files changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 72a3b5c8b1f..88eb56821f6 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -129,6 +129,9 @@ #define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7780_PCI +#define CONFIG_SH7780_PCI_LSR 0x07f00001 +#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE +#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 #define __io diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index b4361caf6ee..94c8d6b790c 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -133,6 +133,9 @@ #define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7780_PCI +#define CONFIG_SH7780_PCI_LSR 0x07f00001 +#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE +#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 -- cgit v1.2.3 From ada9318252f51c2626e9837c623f9812b0308dea Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Tue, 3 Mar 2009 15:11:17 +0900 Subject: sh: Add support 32-Bit Extended Address Mode to sh7785lcr We can built 'make sh7785lcr_32bit_config'. And add new command "pmb" for this mode. This command changes PMB for using 512MB system memory. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Nobuhiro Iwamatsu --- include/configs/sh7785lcr.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 94c8d6b790c..21c3f70f5c9 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -61,11 +61,20 @@ #undef CONFIG_SHOW_BOOT_PROGRESS /* MEMORY */ +#if defined(CONFIG_SH_32BIT) +#define SH7785LCR_SDRAM_PHYS_BASE (0x48000000) +#define SH7785LCR_SDRAM_BASE (0x88000000) +#define SH7785LCR_SDRAM_SIZE (384 * 1024 * 1024) +#define SH7785LCR_FLASH_BASE_1 (0xa0000000) +#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) +#define SH7785LCR_USB_BASE (0xa6000000) +#else #define SH7785LCR_SDRAM_BASE (0x08000000) #define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024) #define SH7785LCR_FLASH_BASE_1 (0xa0000000) #define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) #define SH7785LCR_USB_BASE (0xb4000000) +#endif #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_PROMPT "=> " @@ -133,9 +142,15 @@ #define CONFIG_PCI #define CONFIG_SH4_PCI #define CONFIG_SH7780_PCI +#if defined(CONFIG_SH_32BIT) +#define CONFIG_SH7780_PCI_LSR 0x1ff00001 +#define CONFIG_SH7780_PCI_LAR 0x5f000000 +#define CONFIG_SH7780_PCI_BAR 0x5f000000 +#else #define CONFIG_SH7780_PCI_LSR 0x07f00001 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE +#endif #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 @@ -147,8 +162,12 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ -#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE +#if defined(CONFIG_SH_32BIT) +#define CONFIG_PCI_SYS_PHYS SH7785LCR_SDRAM_PHYS_BASE +#else #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE +#endif +#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE /* Network device (RTL8169) support */ -- cgit v1.2.3 From 2db0e1278b9f11263e0a13326b57d4f99781f7ac Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 25 Feb 2009 16:04:26 +0900 Subject: sh: Fix cannot work rtl8139 on r2dplus The rtl8139 driver use pci_mem_to_phys. So it need PCI system memory registration. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Nobuhiro Iwamatsu --- include/configs/r2dplus.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 6921759d554..6fa1eafde7d 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -114,6 +114,9 @@ #define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */ +#define CONFIG_PCI_SYS_BUS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff) +#define CONFIG_PCI_SYS_PHYS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff) +#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE /* * Network device (RTL8139) support -- cgit v1.2.3