From 52658fda7abc4319ff7f8fe934d2e7c0a32202d7 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 20 Aug 2014 15:08:52 +0300 Subject: compulab: eeprom: add support for defining eeprom i2c bus Create CONFIG_SYS_I2C_EEPROM_BUS #define to tell the EEPROM module what I2C bus the EEPROM is located at. Make cl_eeprom_read() switch to that bus when reading EEPROM. Cc: Igor Grinberg Cc: Dmitry Lifshitz Cc: Tom Rini Cc: Marek Vasut Acked-by: Igor Grinberg Acked-by: Dmitry Lifshitz Reviewed-by: Marek Vasut Signed-off-by: Nikita Kiryanov --- include/configs/cm_t335.h | 1 + include/configs/cm_t35.h | 1 + include/configs/cm_t54.h | 1 + 3 files changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index a3e6452ec1d..767ef3a266b 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -107,6 +107,7 @@ /* I2C Configuration */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 0 /* SPL */ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 70df1ebc677..6f4d97f2fd0 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -135,6 +135,7 @@ #define CONFIG_SYS_I2C_OMAP34XX #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 0 #define CONFIG_I2C_MULTI_BUS /* diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h index df93a59c1bd..641ab48c2c8 100644 --- a/include/configs/cm_t54.h +++ b/include/configs/cm_t54.h @@ -30,6 +30,7 @@ #define CONFIG_SYS_I2C_OMAP34XX #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 0 /* Enable SD/MMC CD and WP GPIOs */ #define OMAP_HSMMC_USE_GPIO -- cgit v1.3.1 From dc383dd58300e2430e9ad61f6aced2e2d42d16b7 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 20 Aug 2014 15:08:53 +0300 Subject: sata: dwc_ahsata: implement sata_port_status Define the new common function sata_port_status() which can be used to query the sata driver for the state of ports, and implement it for dwc_ahsata. Cc: Stefano Babic Cc: Tom Rini Cc: Marek Vasut Reviewed-by: Marek Vasut Signed-off-by: Nikita Kiryanov --- drivers/block/dwc_ahsata.c | 17 +++++++++++++++++ include/sata.h | 1 + 2 files changed, 18 insertions(+) (limited to 'include') diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c index 15d65d77f3a..29f478bfbe0 100644 --- a/drivers/block/dwc_ahsata.c +++ b/drivers/block/dwc_ahsata.c @@ -864,6 +864,23 @@ u32 ata_low_level_rw_lba28(int dev, u32 blknr, lbaint_t blkcnt, return blkcnt; } +int sata_port_status(int dev, int port) +{ + struct sata_port_regs *port_mmio; + struct ahci_probe_ent *probe_ent = NULL; + + if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) + return -EINVAL; + + if (sata_dev_desc[dev].priv == NULL) + return -ENODEV; + + probe_ent = (struct ahci_probe_ent *)sata_dev_desc[dev].priv; + port_mmio = (struct sata_port_regs *)probe_ent->port[port].port_mmio; + + return readl(&(port_mmio->ssts)) && SATA_PORT_SSTS_DET_MASK; +} + /* * SATA interface between low level driver and command layer */ diff --git a/include/sata.h b/include/sata.h index c95dc56e944..38f4b4acf6c 100644 --- a/include/sata.h +++ b/include/sata.h @@ -9,6 +9,7 @@ ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer); int sata_initialize(void); int __sata_initialize(void); +int sata_port_status(int dev, int port); extern block_dev_desc_t sata_dev_desc[]; -- cgit v1.3.1 From e32028a70ba2be17732b21f98b242d9fe3d977cf Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Sun, 7 Sep 2014 18:59:29 +0300 Subject: arm: mx6: add support for Compulab cm-fx6 CoM Add initial support for Compulab CM-FX6 CoM. Support includes MMC, SPI flash, and SPL with dynamic DRAM detection. Cc: Igor Grinberg Cc: Stefano Babic Cc: Tom Rini Cc: Marek Vasut Cc: Simon Glass Acked-by: Marek Vasut Signed-off-by: Nikita Kiryanov --- arch/arm/Kconfig | 4 + board/compulab/cm_fx6/Kconfig | 23 +++ board/compulab/cm_fx6/MAINTAINERS | 6 + board/compulab/cm_fx6/Makefile | 12 ++ board/compulab/cm_fx6/cm_fx6.c | 111 ++++++++++++ board/compulab/cm_fx6/common.c | 84 +++++++++ board/compulab/cm_fx6/common.h | 20 +++ board/compulab/cm_fx6/imximage.cfg | 8 + board/compulab/cm_fx6/spl.c | 355 +++++++++++++++++++++++++++++++++++++ configs/cm_fx6_defconfig | 4 + include/configs/cm_fx6.h | 192 ++++++++++++++++++++ 11 files changed, 819 insertions(+) create mode 100644 board/compulab/cm_fx6/Kconfig create mode 100644 board/compulab/cm_fx6/MAINTAINERS create mode 100644 board/compulab/cm_fx6/Makefile create mode 100644 board/compulab/cm_fx6/cm_fx6.c create mode 100644 board/compulab/cm_fx6/common.c create mode 100644 board/compulab/cm_fx6/common.h create mode 100644 board/compulab/cm_fx6/imximage.cfg create mode 100644 board/compulab/cm_fx6/spl.c create mode 100644 configs/cm_fx6_defconfig create mode 100644 include/configs/cm_fx6.h (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 22f0f09af6e..f933123395e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -424,6 +424,9 @@ config OMAP54XX config RMOBILE bool "Renesas ARM SoCs" +config TARGET_CM_FX6 + bool "Support cm_fx6" + config TARGET_S5P_GONI bool "Support s5p_goni" @@ -579,6 +582,7 @@ source "board/cirrus/edb93xx/Kconfig" source "board/cm4008/Kconfig" source "board/cm41xx/Kconfig" source "board/compulab/cm_t335/Kconfig" +source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" source "board/creative/xfi3/Kconfig" source "board/davedenx/qong/Kconfig" diff --git a/board/compulab/cm_fx6/Kconfig b/board/compulab/cm_fx6/Kconfig new file mode 100644 index 00000000000..42a84380f24 --- /dev/null +++ b/board/compulab/cm_fx6/Kconfig @@ -0,0 +1,23 @@ +if TARGET_CM_FX6 + +config SYS_CPU + string + default "armv7" + +config SYS_BOARD + string + default "cm_fx6" + +config SYS_VENDOR + string + default "compulab" + +config SYS_SOC + string + default "mx6" + +config SYS_CONFIG_NAME + string + default "cm_fx6" + +endif diff --git a/board/compulab/cm_fx6/MAINTAINERS b/board/compulab/cm_fx6/MAINTAINERS new file mode 100644 index 00000000000..5b2623a664d --- /dev/null +++ b/board/compulab/cm_fx6/MAINTAINERS @@ -0,0 +1,6 @@ +CM_FX6 BOARD +M: Nikita Kiryanov +S: Maintained +F: board/compulab/cm_fx6/ +F: include/configs/cm_fx6.h +F: configs/cm_fx6_defconfig diff --git a/board/compulab/cm_fx6/Makefile b/board/compulab/cm_fx6/Makefile new file mode 100644 index 00000000000..3e5c9034df0 --- /dev/null +++ b/board/compulab/cm_fx6/Makefile @@ -0,0 +1,12 @@ +# +# (C) Copyright 2014 CompuLab, Ltd. +# +# Authors: Nikita Kiryanov +# +# SPDX-License-Identifier: GPL-2.0+ +# +ifdef CONFIG_SPL_BUILD +obj-y = common.o spl.o +else +obj-y = common.o cm_fx6.o +endif diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c new file mode 100644 index 00000000000..b5895816cb0 --- /dev/null +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -0,0 +1,111 @@ +/* + * Board functions for Compulab CM-FX6 board + * + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include "common.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[3] = { + {USDHC1_BASE_ADDR}, + {USDHC2_BASE_ADDR}, + {USDHC3_BASE_ADDR}, +}; + +static enum mxc_clock usdhc_clk[3] = { + MXC_ESDHC_CLK, + MXC_ESDHC2_CLK, + MXC_ESDHC3_CLK, +}; + +int board_mmc_init(bd_t *bis) +{ + int i; + + cm_fx6_set_usdhc_iomux(); + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]); + usdhc_cfg[i].max_bus_width = 4; + fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + enable_usdhc_clk(1, i); + } + + return 0; +} +#endif + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + return 0; +} + +int checkboard(void) +{ + puts("Board: CM-FX6\n"); + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[1].start = PHYS_SDRAM_2; + + switch (gd->ram_size) { + case 0x10000000: /* DDR_16BIT_256MB */ + gd->bd->bi_dram[0].size = 0x10000000; + gd->bd->bi_dram[1].size = 0; + break; + case 0x20000000: /* DDR_32BIT_512MB */ + gd->bd->bi_dram[0].size = 0x20000000; + gd->bd->bi_dram[1].size = 0; + break; + case 0x40000000: + if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */ + gd->bd->bi_dram[0].size = 0x20000000; + gd->bd->bi_dram[1].size = 0x20000000; + } else { /* DDR_64BIT_1GB */ + gd->bd->bi_dram[0].size = 0x40000000; + gd->bd->bi_dram[1].size = 0; + } + break; + case 0x80000000: /* DDR_64BIT_2GB */ + gd->bd->bi_dram[0].size = 0x40000000; + gd->bd->bi_dram[1].size = 0x40000000; + break; + case 0xEFF00000: /* DDR_64BIT_4GB */ + gd->bd->bi_dram[0].size = 0x70000000; + gd->bd->bi_dram[1].size = 0x7FF00000; + break; + } +} + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + switch (gd->ram_size) { + case 0x10000000: + case 0x20000000: + case 0x40000000: + case 0x80000000: + break; + case 0xF0000000: + gd->ram_size -= 0x100000; + break; + default: + printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size); + return -1; + } + + return 0; +} diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c new file mode 100644 index 00000000000..1f3967995f9 --- /dev/null +++ b/board/compulab/cm_fx6/common.c @@ -0,0 +1,84 @@ +/* + * Code used by both U-Boot and SPL for Compulab CM-FX6 + * + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include "common.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_FSL_ESDHC +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc_pads[] = { + IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + + IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), +}; + +void cm_fx6_set_usdhc_iomux(void) +{ + SETUP_IOMUX_PADS(usdhc_pads); +} + +/* CINS bit doesn't work, so always try to access the MMC card */ +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} +#endif + +#ifdef CONFIG_MXC_SPI +#define ECSPI_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +static iomux_v3_cfg_t const ecspi_pads[] = { + IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D19__ECSPI1_SS1 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), +}; + +void cm_fx6_set_ecspi_iomux(void) +{ + SETUP_IOMUX_PADS(ecspi_pads); +} + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (CM_FX6_ECSPI_BUS0_CS0) : -1; +} +#endif diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h new file mode 100644 index 00000000000..347d07b0b9f --- /dev/null +++ b/board/compulab/cm_fx6/common.h @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30) +#define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31) + +void cm_fx6_set_usdhc_iomux(void); +void cm_fx6_set_ecspi_iomux(void); diff --git a/board/compulab/cm_fx6/imximage.cfg b/board/compulab/cm_fx6/imximage.cfg new file mode 100644 index 00000000000..420947e9ca7 --- /dev/null +++ b/board/compulab/cm_fx6/imximage.cfg @@ -0,0 +1,8 @@ +/* + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +IMAGE_VERSION 2 +BOOT_FROM sd diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c new file mode 100644 index 00000000000..a3abc7b3f32 --- /dev/null +++ b/board/compulab/cm_fx6/spl.c @@ -0,0 +1,355 @@ +/* + * SPL specific code for Compulab CM-FX6 board + * + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "common.h" + +DECLARE_GLOBAL_DATA_PTR; + +enum ddr_config { + DDR_16BIT_256MB, + DDR_32BIT_512MB, + DDR_32BIT_1GB, + DDR_64BIT_1GB, + DDR_64BIT_2GB, + DDR_64BIT_4GB, + DDR_UNKNOWN, +}; + +/* + * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to + * Freescale QRM, but this is exactly the value used by the automatic + * calibration script and it works also in all our tests, so we leave + * it as is at this point. + */ +#define CM_FX6_DDR_IOMUX_CFG \ + .dram_sdqs0 = 0x00000038, \ + .dram_sdqs1 = 0x00000038, \ + .dram_sdqs2 = 0x00000038, \ + .dram_sdqs3 = 0x00000038, \ + .dram_sdqs4 = 0x00000038, \ + .dram_sdqs5 = 0x00000038, \ + .dram_sdqs6 = 0x00000038, \ + .dram_sdqs7 = 0x00000038, \ + .dram_dqm0 = 0x00000038, \ + .dram_dqm1 = 0x00000038, \ + .dram_dqm2 = 0x00000038, \ + .dram_dqm3 = 0x00000038, \ + .dram_dqm4 = 0x00000038, \ + .dram_dqm5 = 0x00000038, \ + .dram_dqm6 = 0x00000038, \ + .dram_dqm7 = 0x00000038, \ + .dram_cas = 0x00000038, \ + .dram_ras = 0x00000038, \ + .dram_sdclk_0 = 0x00000038, \ + .dram_sdclk_1 = 0x00000038, \ + .dram_sdcke0 = 0x00003000, \ + .dram_sdcke1 = 0x00003000, \ + .dram_reset = 0x00000038, \ + .dram_sdba2 = 0x00000000, \ + .dram_sdodt0 = 0x00000038, \ + .dram_sdodt1 = 0x00000038, + +#define CM_FX6_GPR_IOMUX_CFG \ + .grp_b0ds = 0x00000038, \ + .grp_b1ds = 0x00000038, \ + .grp_b2ds = 0x00000038, \ + .grp_b3ds = 0x00000038, \ + .grp_b4ds = 0x00000038, \ + .grp_b5ds = 0x00000038, \ + .grp_b6ds = 0x00000038, \ + .grp_b7ds = 0x00000038, \ + .grp_addds = 0x00000038, \ + .grp_ddrmode_ctl = 0x00020000, \ + .grp_ddrpke = 0x00000000, \ + .grp_ddrmode = 0x00020000, \ + .grp_ctlds = 0x00000038, \ + .grp_ddr_type = 0x000C0000, + +static struct mx6sdl_iomux_ddr_regs ddr_iomux_s = { CM_FX6_DDR_IOMUX_CFG }; +static struct mx6sdl_iomux_grp_regs grp_iomux_s = { CM_FX6_GPR_IOMUX_CFG }; +static struct mx6dq_iomux_ddr_regs ddr_iomux_q = { CM_FX6_DDR_IOMUX_CFG }; +static struct mx6dq_iomux_grp_regs grp_iomux_q = { CM_FX6_GPR_IOMUX_CFG }; + +static struct mx6_mmdc_calibration cm_fx6_calib_s = { + .p0_mpwldectrl0 = 0x005B0061, + .p0_mpwldectrl1 = 0x004F0055, + .p0_mpdgctrl0 = 0x0314030C, + .p0_mpdgctrl1 = 0x025C0268, + .p0_mprddlctl = 0x42464646, + .p0_mpwrdlctl = 0x36322C34, +}; + +static struct mx6_ddr_sysinfo cm_fx6_sysinfo_s = { + .cs1_mirror = 1, + .cs_density = 16, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 1, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, +}; + +static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_s = { + .mem_speed = 800, + .density = 4, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1800, + .trcmin = 5200, + .trasmin = 3600, + .SRT = 0, +}; + +static void spl_mx6s_dram_init(enum ddr_config dram_config, bool reset) +{ + if (reset) + ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2; + + switch (dram_config) { + case DDR_16BIT_256MB: + cm_fx6_sysinfo_s.dsize = 0; + cm_fx6_sysinfo_s.ncs = 1; + break; + case DDR_32BIT_512MB: + cm_fx6_sysinfo_s.dsize = 1; + cm_fx6_sysinfo_s.ncs = 1; + break; + case DDR_32BIT_1GB: + cm_fx6_sysinfo_s.dsize = 1; + cm_fx6_sysinfo_s.ncs = 2; + break; + default: + puts("Tried to setup invalid DDR configuration\n"); + hang(); + } + + mx6_dram_cfg(&cm_fx6_sysinfo_s, &cm_fx6_calib_s, &cm_fx6_ddr3_cfg_s); + udelay(100); +} + +static struct mx6_mmdc_calibration cm_fx6_calib_q = { + .p0_mpwldectrl0 = 0x00630068, + .p0_mpwldectrl1 = 0x0068005D, + .p0_mpdgctrl0 = 0x04140428, + .p0_mpdgctrl1 = 0x037C037C, + .p0_mprddlctl = 0x3C30303A, + .p0_mpwrdlctl = 0x3A344038, + .p1_mpwldectrl0 = 0x0035004C, + .p1_mpwldectrl1 = 0x00170026, + .p1_mpdgctrl0 = 0x0374037C, + .p1_mpdgctrl1 = 0x0350032C, + .p1_mprddlctl = 0x30322A3C, + .p1_mpwrdlctl = 0x48304A3E, +}; + +static struct mx6_ddr_sysinfo cm_fx6_sysinfo_q = { + .cs_density = 16, + .cs1_mirror = 1, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 1, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, +}; + +static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_q = { + .mem_speed = 1066, + .density = 4, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1324, + .trcmin = 59500, + .trasmin = 9750, + .SRT = 0, +}; + +static void spl_mx6q_dram_init(enum ddr_config dram_config, bool reset) +{ + if (reset) + ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2; + + cm_fx6_ddr3_cfg_q.rowaddr = 14; + switch (dram_config) { + case DDR_16BIT_256MB: + cm_fx6_sysinfo_q.dsize = 0; + cm_fx6_sysinfo_q.ncs = 1; + break; + case DDR_32BIT_512MB: + cm_fx6_sysinfo_q.dsize = 1; + cm_fx6_sysinfo_q.ncs = 1; + break; + case DDR_64BIT_1GB: + cm_fx6_sysinfo_q.dsize = 2; + cm_fx6_sysinfo_q.ncs = 1; + break; + case DDR_64BIT_2GB: + cm_fx6_sysinfo_q.dsize = 2; + cm_fx6_sysinfo_q.ncs = 2; + break; + case DDR_64BIT_4GB: + cm_fx6_sysinfo_q.dsize = 2; + cm_fx6_sysinfo_q.ncs = 2; + cm_fx6_ddr3_cfg_q.rowaddr = 15; + break; + default: + puts("Tried to setup invalid DDR configuration\n"); + hang(); + } + + mx6_dram_cfg(&cm_fx6_sysinfo_q, &cm_fx6_calib_q, &cm_fx6_ddr3_cfg_q); + udelay(100); +} + +static int cm_fx6_spl_dram_init(void) +{ + unsigned long bank1_size, bank2_size; + + switch (get_cpu_type()) { + case MXC_CPU_MX6SOLO: + mx6sdl_dram_iocfg(64, &ddr_iomux_s, &grp_iomux_s); + + spl_mx6s_dram_init(DDR_32BIT_1GB, false); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x40000000) + return 0; + + if (bank1_size == 0x20000000) { + spl_mx6s_dram_init(DDR_32BIT_512MB, true); + return 0; + } + + spl_mx6s_dram_init(DDR_16BIT_256MB, true); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x10000000) + return 0; + + break; + case MXC_CPU_MX6D: + case MXC_CPU_MX6Q: + mx6dq_dram_iocfg(64, &ddr_iomux_q, &grp_iomux_q); + + spl_mx6q_dram_init(DDR_64BIT_4GB, false); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x80000000) + return 0; + + if (bank1_size == 0x40000000) { + bank2_size = get_ram_size((long int *)PHYS_SDRAM_2, + 0x80000000); + if (bank2_size == 0x40000000) { + /* Don't do a full reset here */ + spl_mx6q_dram_init(DDR_64BIT_2GB, false); + } else { + spl_mx6q_dram_init(DDR_64BIT_1GB, true); + } + + return 0; + } + + spl_mx6q_dram_init(DDR_32BIT_512MB, true); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x20000000) + return 0; + + spl_mx6q_dram_init(DDR_16BIT_256MB, true); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x10000000) + return 0; + + break; + } + + return -1; +} + +static iomux_v3_cfg_t const uart4_pads[] = { + IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), +}; + +static void cm_fx6_setup_uart(void) +{ + SETUP_IOMUX_PADS(uart4_pads); + enable_uart_clk(1); +} + +#ifdef CONFIG_SPL_SPI_SUPPORT +static void cm_fx6_setup_ecspi(void) +{ + cm_fx6_set_ecspi_iomux(); + enable_cspi_clock(1, 0); +} +#else +static void cm_fx6_setup_ecspi(void) { } +#endif + +void board_init_f(ulong dummy) +{ + gd = &gdata; + arch_cpu_init(); + timer_init(); + cm_fx6_setup_ecspi(); + cm_fx6_setup_uart(); + get_clocks(); + preloader_console_init(); + gpio_direction_output(CM_FX6_GREEN_LED, 1); + if (cm_fx6_spl_dram_init()) { + puts("!!!ERROR!!! DRAM detection failed!!!\n"); + hang(); + } + + memset(__bss_start, 0, __bss_end - __bss_start); + board_init_r(NULL, 0); +} + +void spl_board_init(void) +{ + u32 boot_device = spl_boot_device(); + + if (boot_device == BOOT_DEVICE_SPI) + puts("Booting from SPI flash\n"); + else if (boot_device == BOOT_DEVICE_MMC1) + puts("Booting from MMC\n"); + else + puts("Unknown boot device\n"); +} + +#ifdef CONFIG_SPL_MMC_SUPPORT +static struct fsl_esdhc_cfg usdhc_cfg = { + .esdhc_base = USDHC3_BASE_ADDR, + .max_bus_width = 4, +}; + +int board_mmc_init(bd_t *bis) +{ + cm_fx6_set_usdhc_iomux(); + + usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + + return fsl_esdhc_initialize(bis, &usdhc_cfg); +} +#endif diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig new file mode 100644 index 00000000000..50c06f7feb7 --- /dev/null +++ b/configs/cm_fx6_defconfig @@ -0,0 +1,4 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/compulab/cm_fx6/imximage.cfg,MX6QDL,SPL" ++S:CONFIG_ARM=y ++S:CONFIG_TARGET_CM_FX6=y diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h new file mode 100644 index 00000000000..15c55beec3c --- /dev/null +++ b/include/configs/cm_fx6.h @@ -0,0 +1,192 @@ +/* + * Config file for Compulab CM-FX6 board + * + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_CM_FX6_H +#define __CONFIG_CM_FX6_H + +#include +#include +#include "mx6_common.h" + +/* Machine config */ +#define CONFIG_MX6 +#define CONFIG_SYS_LITTLE_ENDIAN +#define CONFIG_MACH_TYPE 4273 +#define CONFIG_SYS_HZ 1000 + +/* Display information on boot */ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_TIMESTAMP + +/* CMD */ +#include +#define CONFIG_CMD_GREPENV +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_XIMG +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +/* MMC */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR + +/* RAM */ +#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR +#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_NR_DRAM_BANKS 2 +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Serial console */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART4_BASE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/* Shell */ +#define CONFIG_SYS_PROMPT "CM-FX6 # " +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* SPI flash */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) + +/* Environment */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_OFFSET (768 * 1024) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel=uImage-cm-fx6\0" \ + "autoload=no\0" \ + "loadaddr=0x10800000\0" \ + "fdtaddr=0x11000000\0" \ + "console=ttymxc3,115200\0" \ + "ethprime=FEC0\0" \ + "bootscr=boot.scr\0" \ + "bootm_low=18000000\0" \ + "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ + "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ + "fdtfile=cm-fx6.dtb\0" \ + "doboot=bootm ${loadaddr}\0" \ + "loadfdt=false\0" \ + "setboottypez=setenv kernel zImage-cm-fx6;" \ + "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ + "setenv loadfdt true;\0" \ + "setboottypem=setenv kernel uImage-cm-fx6;" \ + "setenv doboot bootm ${loadaddr};" \ + "setenv loadfdt false;\0"\ + "run_eboot=echo Starting EBOOT ...; "\ + "mmc dev ${mmcdev} && " \ + "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ + "mmcdev=2\0" \ + "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ + "loadmmcbootscript=load mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \ + "mmcbootscript=echo Running bootscript from mmc ...; "\ + "source ${loadaddr}\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "root=${mmcroot} " \ + "${video}\0" \ + "mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \ + "mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "run doboot\0" \ + "boot=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "if run loadmmcbootscript; then " \ + "run mmcbootscript;" \ + "else " \ + "if run mmcloadkernel; then " \ + "if ${loadfdt}; then " \ + "run mmcloadfdt;" \ + "fi;" \ + "run mmcboot;" \ + "fi;" \ + "fi;" \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "run setboottypem; run boot" + +/* SPI */ +#define CONFIG_SPI +#define CONFIG_MXC_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SPI_FLASH_EON +#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SPI_FLASH_MACRONIX +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_WINBOND + +/* GPIO */ +#define CONFIG_MXC_GPIO + +/* Boot */ +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_LOADADDR 0x10800000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG + +/* misc */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_STACKSIZE (128 * 1024) +#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ + +/* SPL */ +#include "imx6_spl.h" +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ +#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) +#define CONFIG_SPL_SPI_LOAD + +#endif /* __CONFIG_CM_FX6_H */ -- cgit v1.3.1 From a6b0652bb5040351eeb1a2580270bd3988cb0a59 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 20 Aug 2014 15:09:01 +0300 Subject: arm: mx6: cm_fx6: add nand support Add NAND support for Compulab CM-FX6 CoM. Cc: Igor Grinberg Cc: Stefano Babic Cc: Tom Rini Acked-by: Igor Grinberg Signed-off-by: Nikita Kiryanov --- board/compulab/cm_fx6/cm_fx6.c | 37 +++++++++++++++++++++++++++++++++++++ board/compulab/cm_fx6/spl.c | 11 +++++++++++ include/configs/cm_fx6.h | 31 ++++++++++++++++++++++++++++++- 3 files changed, 78 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index b5895816cb0..17c3ee5aef4 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -10,11 +10,46 @@ #include #include +#include #include +#include #include "common.h" DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_NAND_MXS +static iomux_v3_cfg_t const nand_pads[] = { + IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static void cm_fx6_setup_gpmi_nand(void) +{ + SETUP_IOMUX_PADS(nand_pads); + /* Enable clock roots */ + enable_usdhc_clk(1, 3); + enable_usdhc_clk(1, 4); + + setup_gpmi_io_clk(MXC_CCM_CS2CDR_ENFC_CLK_PODF(0xf) | + MXC_CCM_CS2CDR_ENFC_CLK_PRED(1) | + MXC_CCM_CS2CDR_ENFC_CLK_SEL(0)); +} +#else +static void cm_fx6_setup_gpmi_nand(void) {} +#endif + #ifdef CONFIG_FSL_ESDHC static struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC1_BASE_ADDR}, @@ -47,6 +82,8 @@ int board_mmc_init(bd_t *bis) int board_init(void) { gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + cm_fx6_setup_gpmi_nand(); + return 0; } diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c index a3abc7b3f32..3948ba23ae9 100644 --- a/board/compulab/cm_fx6/spl.c +++ b/board/compulab/cm_fx6/spl.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include "common.h" @@ -309,7 +310,17 @@ static void cm_fx6_setup_ecspi(void) { } void board_init_f(ulong dummy) { + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + gd = &gdata; + /* + * We don't use DMA in SPL, but we do need it in U-Boot. U-Boot + * initializes DMA very early (before all board code), so the only + * opportunity we have to initialize APBHDMA clocks is in SPL. + */ + setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); + enable_usdhc_clk(1, 2); + arch_cpu_init(); timer_init(); cm_fx6_setup_ecspi(); diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 15c55beec3c..4c1bcb90d29 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -130,6 +130,20 @@ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "run doboot\0" \ + "nandroot=/dev/mtdblock4 rw\0" \ + "nandrootfstype=ubifs\0" \ + "nandargs=setenv bootargs console=${console} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype} " \ + "${video}\0" \ + "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${loadaddr} 0 780000; " \ + "if ${loadfdt}; then " \ + "run nandloadfdt;" \ + "fi; " \ + "run doboot\0" \ "boot=mmc dev ${mmcdev}; " \ "if mmc rescan; then " \ "if run loadmmcbootscript; then " \ @@ -142,7 +156,8 @@ "run mmcboot;" \ "fi;" \ "fi;" \ - "fi;\0" + "fi;" \ + "run nandboot\0" #define CONFIG_BOOTCOMMAND \ "run setboottypem; run boot" @@ -160,6 +175,20 @@ #define CONFIG_SPI_FLASH_SST #define CONFIG_SPI_FLASH_WINBOND +/* NAND */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_NAND +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_MAX_CHIPS 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_NAND_MXS +#define CONFIG_SYS_NAND_ONFI_DETECTION +/* APBH DMA is required for NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 +#endif + /* GPIO */ #define CONFIG_MXC_GPIO -- cgit v1.3.1 From 02b1343e4a1430dc9ed750b95ed7cd961f06a456 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 20 Aug 2014 15:09:02 +0300 Subject: arm: mx6: cm_fx6: add ethernet support Add ethernet support for Compulab CM-FX6 CoM Cc: Igor Grinberg Cc: Stefano Babic Cc: Tom Rini Acked-by: Igor Grinberg Signed-off-by: Nikita Kiryanov --- board/compulab/cm_fx6/cm_fx6.c | 100 +++++++++++++++++++++++++++++++++++++++++ board/compulab/cm_fx6/common.h | 1 + include/configs/cm_fx6.h | 16 ++++++- 3 files changed, 115 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 17c3ee5aef4..681b1eeb49f 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -10,13 +10,100 @@ #include #include +#include +#include +#include #include #include #include +#include #include "common.h" DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_FEC_MXC +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +static int mx6_rgmii_rework(struct phy_device *phydev) +{ + unsigned short val; + + /* Ar8031 phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= ~(0x1 << 8); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); + + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= 0xffe3; + val |= 0x18; + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* introduce tx clock delay */ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); + val |= 0x0100; + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + mx6_rgmii_rework(phydev); + + if (phydev->drv->config) + return phydev->drv->config(phydev); + + return 0; +} + +static iomux_v3_cfg_t const enet_pads[] = { + IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_0__CCM_CLKO1 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_3__CCM_CLKO2 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(0x84)), + IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | + MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL)), +}; + +int board_eth_init(bd_t *bis) +{ + SETUP_IOMUX_PADS(enet_pads); + /* phy reset */ + gpio_direction_output(CM_FX6_ENET_NRST, 0); + udelay(500); + gpio_set_value(CM_FX6_ENET_NRST, 1); + enable_enet_clk(1); + return cpu_eth_init(bis); +} +#endif + #ifdef CONFIG_NAND_MXS static iomux_v3_cfg_t const nand_pads[] = { IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL)), @@ -79,6 +166,19 @@ int board_mmc_init(bd_t *bis) } #endif +#ifdef CONFIG_OF_BOARD_SETUP +void ft_board_setup(void *blob, bd_t *bd) +{ + uint8_t enetaddr[6]; + + /* MAC addr */ + if (eth_getenv_enetaddr("ethaddr", enetaddr)) { + fdt_find_and_setprop(blob, "/fec", "local-mac-address", + enetaddr, 6, 1); + } +} +#endif + int board_init(void) { gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h index 347d07b0b9f..1b19f16b2e2 100644 --- a/board/compulab/cm_fx6/common.h +++ b/board/compulab/cm_fx6/common.h @@ -15,6 +15,7 @@ #define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30) #define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31) +#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) void cm_fx6_set_usdhc_iomux(void); void cm_fx6_set_ecspi_iomux(void); diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 4c1bcb90d29..22b3376cec8 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -35,8 +35,6 @@ #undef CONFIG_CMD_XIMG #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMLS -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS /* MMC */ #define CONFIG_MMC @@ -189,6 +187,19 @@ #define CONFIG_APBH_DMA_BURST8 #endif +/* Ethernet */ +#define CONFIG_FEC_MXC +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_FEC_XCV_TYPE RGMII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#define CONFIG_MII +#define CONFIG_ETHPRIME "FEC0" +#define CONFIG_ARP_TIMEOUT 200UL +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_NET_RETRY_COUNT 5 + /* GPIO */ #define CONFIG_MXC_GPIO @@ -206,6 +217,7 @@ #define CONFIG_STACKSIZE (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ +#define CONFIG_OF_BOARD_SETUP /* SPL */ #include "imx6_spl.h" -- cgit v1.3.1 From 0f3effb99fdabf41e6152e5aec2e5fceee7616f9 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 20 Aug 2014 15:09:03 +0300 Subject: arm: mx6: cm_fx6: add usb support Add USB and USB OTG host support for Compulab CM-FX6 CoM. Cc: Igor Grinberg Cc: Stefano Babic Cc: Tom Rini Signed-off-by: Nikita Kiryanov --- board/compulab/cm_fx6/cm_fx6.c | 76 ++++++++++++++++++++++++++++++++++++++++++ board/compulab/cm_fx6/common.h | 3 ++ include/configs/cm_fx6.h | 10 ++++++ 3 files changed, 89 insertions(+) (limited to 'include') diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 681b1eeb49f..26f04171eed 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -15,12 +15,88 @@ #include #include #include +#include #include #include #include "common.h" DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_USB_EHCI_MX6 +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +static int cm_fx6_usb_hub_reset(void) +{ + int err; + + err = gpio_request(CM_FX6_USB_HUB_RST, "usb hub rst"); + if (err) { + printf("USB hub rst gpio request failed: %d\n", err); + return -1; + } + + SETUP_IOMUX_PAD(PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL)); + gpio_direction_output(CM_FX6_USB_HUB_RST, 0); + udelay(10); + gpio_direction_output(CM_FX6_USB_HUB_RST, 1); + mdelay(1); + + return 0; +} + +static int cm_fx6_init_usb_otg(void) +{ + int ret; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + ret = gpio_request(SB_FX6_USB_OTG_PWR, "usb-pwr"); + if (ret) { + printf("USB OTG pwr gpio request failed: %d\n", ret); + return ret; + } + + SETUP_IOMUX_PAD(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL)); + SETUP_IOMUX_PAD(PAD_ENET_RX_ER__USB_OTG_ID | + MUX_PAD_CTRL(WEAK_PULLDOWN)); + clrbits_le32(&iomux->gpr[1], IOMUXC_GPR1_OTG_ID_MASK); + /* disable ext. charger detect, or it'll affect signal quality at dp. */ + return gpio_direction_output(SB_FX6_USB_OTG_PWR, 0); +} + +#define MX6_USBNC_BASEADDR 0x2184800 +#define USBNC_USB_H1_PWR_POL (1 << 9) +int board_ehci_hcd_init(int port) +{ + u32 *usbnc_usb_uh1_ctrl = (u32 *)(MX6_USBNC_BASEADDR + 4); + + switch (port) { + case 0: + return cm_fx6_init_usb_otg(); + case 1: + SETUP_IOMUX_PAD(PAD_GPIO_0__USB_H1_PWR | + MUX_PAD_CTRL(NO_PAD_CTRL)); + + /* Set PWR polarity to match power switch's enable polarity */ + setbits_le32(usbnc_usb_uh1_ctrl, USBNC_USB_H1_PWR_POL); + return cm_fx6_usb_hub_reset(); + default: + break; + } + + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port == 0) + return gpio_direction_output(SB_FX6_USB_OTG_PWR, on); + + return 0; +} +#endif + #ifdef CONFIG_FEC_MXC #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h index 1b19f16b2e2..f841c90c549 100644 --- a/board/compulab/cm_fx6/common.h +++ b/board/compulab/cm_fx6/common.h @@ -16,6 +16,9 @@ #define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30) #define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31) #define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) +#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) +#define CM_FX6_USB_HUB_RST IMX_GPIO_NR(7, 8) +#define SB_FX6_USB_OTG_PWR IMX_GPIO_NR(3, 22) void cm_fx6_set_usdhc_iomux(void); void cm_fx6_set_ecspi_iomux(void); diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 22b3376cec8..0c25dda39c1 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -200,6 +200,16 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_NET_RETRY_COUNT 5 +/* USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ + /* GPIO */ #define CONFIG_MXC_GPIO -- cgit v1.3.1 From f42b2f606161d0051c14ccaccdc7fdef4bb2fc96 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 20 Aug 2014 15:09:04 +0300 Subject: arm: mx6: cm_fx6: add i2c support Add support for all 3 I2C busses on Compulab CM-FX6 CoM. Cc: Igor Grinberg Cc: Stefano Babic Cc: Tom Rini Acked-by: Igor Grinberg Signed-off-by: Nikita Kiryanov --- board/compulab/cm_fx6/cm_fx6.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/configs/cm_fx6.h | 11 +++++++++++ 2 files changed, 53 insertions(+) (limited to 'include') diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 26f04171eed..d21c561e66a 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -16,12 +16,53 @@ #include #include #include +#include #include #include #include "common.h" DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_SYS_I2C_MXC +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +I2C_PADS(i2c0_pads, + PAD_EIM_D21__I2C1_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_EIM_D21__GPIO3_IO21 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(3, 21), + PAD_EIM_D28__I2C1_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_EIM_D28__GPIO3_IO28 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(3, 28)); + +I2C_PADS(i2c1_pads, + PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_KEY_COL3__GPIO4_IO12 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(4, 12), + PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(4, 13)); + +I2C_PADS(i2c2_pads, + PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_GPIO_3__GPIO1_IO03 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(1, 3), + PAD_GPIO_6__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(1, 6)); + + +static void cm_fx6_setup_i2c(void) +{ + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c0_pads)); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c1_pads)); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c2_pads)); +} +#else +static void cm_fx6_setup_i2c(void) { } +#endif + #ifdef CONFIG_USB_EHCI_MX6 #define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ @@ -259,6 +300,7 @@ int board_init(void) { gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; cm_fx6_setup_gpmi_nand(); + cm_fx6_setup_i2c(); return 0; } diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 0c25dda39c1..e70259e0c85 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -210,6 +210,17 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +/* I2C */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_MXC_I2C3_SPEED 400000 + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 2 + /* GPIO */ #define CONFIG_MXC_GPIO -- cgit v1.3.1 From f66113c0ef8108cb4b14d54d1b805c776e91cd21 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 20 Aug 2014 15:09:05 +0300 Subject: arm: mx6: cm_fx6: use eeprom Use Compulab eeprom module to obtain revision number, serial number, and mac address from the EEPROM. Cc: Igor Grinberg Cc: Stefano Babic Cc: Tom Rini Signed-off-by: Nikita Kiryanov --- board/compulab/cm_fx6/cm_fx6.c | 30 ++++++++++++++++++++++++++++++ include/configs/cm_fx6.h | 2 ++ 2 files changed, 32 insertions(+) (limited to 'include') diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index d21c561e66a..1664fe866e8 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -20,6 +20,7 @@ #include #include #include "common.h" +#include "../common/eeprom.h" DECLARE_GLOBAL_DATA_PTR; @@ -209,8 +210,31 @@ static iomux_v3_cfg_t const enet_pads[] = { MUX_PAD_CTRL(ENET_PAD_CTRL)), }; +static int handle_mac_address(void) +{ + unsigned char enetaddr[6]; + int rc; + + rc = eth_getenv_enetaddr("ethaddr", enetaddr); + if (rc) + return 0; + + rc = cl_eeprom_read_mac_addr(enetaddr); + if (rc) + return rc; + + if (!is_valid_ether_addr(enetaddr)) + return -1; + + return eth_setenv_enetaddr("ethaddr", enetaddr); +} + int board_eth_init(bd_t *bis) { + int res = handle_mac_address(); + if (res) + puts("No MAC address found\n"); + SETUP_IOMUX_PADS(enet_pads); /* phy reset */ gpio_direction_output(CM_FX6_ENET_NRST, 0); @@ -364,3 +388,9 @@ int dram_init(void) return 0; } + +u32 get_board_rev(void) +{ + return cl_eeprom_get_board_rev(); +} + diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index e70259e0c85..cccc989f9ce 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -232,6 +232,8 @@ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SERIAL_TAG /* misc */ #define CONFIG_SYS_GENERIC_BOARD -- cgit v1.3.1 From 206f38f727e9610709fe73db5c460b7623755eb7 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Wed, 20 Aug 2014 15:09:06 +0300 Subject: arm: mx6: cm_fx6: add sata support Add support for SATA. Cc: Igor Grinberg Cc: Stefano Babic Cc: Tom Rini Signed-off-by: Nikita Kiryanov --- board/compulab/cm_fx6/cm_fx6.c | 87 ++++++++++++++++++++++++++++++++++++++++++ board/compulab/cm_fx6/common.h | 13 +++++++ include/configs/cm_fx6.h | 34 +++++++++++++++++ 3 files changed, 134 insertions(+) (limited to 'include') diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index 1664fe866e8..fdb8ebf9e75 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -13,10 +13,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include #include "common.h" @@ -24,6 +26,91 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_DWC_AHSATA +static int cm_fx6_issd_gpios[] = { + /* The order of the GPIOs in the array is important! */ + CM_FX6_SATA_PHY_SLP, + CM_FX6_SATA_NRSTDLY, + CM_FX6_SATA_PWREN, + CM_FX6_SATA_NSTANDBY1, + CM_FX6_SATA_NSTANDBY2, + CM_FX6_SATA_LDO_EN, +}; + +static void cm_fx6_sata_power(int on) +{ + int i; + + if (!on) { /* tell the iSSD that the power will be removed */ + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 1); + mdelay(10); + } + + for (i = 0; i < ARRAY_SIZE(cm_fx6_issd_gpios); i++) { + gpio_direction_output(cm_fx6_issd_gpios[i], on); + udelay(100); + } + + if (!on) /* for compatibility lower the power loss interrupt */ + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0); +} + +static iomux_v3_cfg_t const sata_pads[] = { + /* SATA PWR */ + IOMUX_PADS(PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A22__GPIO2_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), + /* SATA CTRL */ + IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static void cm_fx6_setup_issd(void) +{ + SETUP_IOMUX_PADS(sata_pads); + /* Make sure this gpio has logical 0 value */ + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0); + udelay(100); + + cm_fx6_sata_power(0); + mdelay(250); + cm_fx6_sata_power(1); +} + +#define CM_FX6_SATA_INIT_RETRIES 10 +int sata_initialize(void) +{ + int err, i; + + cm_fx6_setup_issd(); + for (i = 0; i < CM_FX6_SATA_INIT_RETRIES; i++) { + err = setup_sata(); + if (err) { + printf("SATA setup failed: %d\n", err); + return err; + } + + udelay(100); + + err = __sata_initialize(); + if (!err) + break; + + /* There is no device on the SATA port */ + if (sata_port_status(0, 0) == 0) + break; + + /* There's a device, but link not established. Retry */ + } + + return err; +} +#endif + #ifdef CONFIG_SYS_I2C_MXC #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h index f841c90c549..76097f80af3 100644 --- a/board/compulab/cm_fx6/common.h +++ b/board/compulab/cm_fx6/common.h @@ -19,6 +19,19 @@ #define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) #define CM_FX6_USB_HUB_RST IMX_GPIO_NR(7, 8) #define SB_FX6_USB_OTG_PWR IMX_GPIO_NR(3, 22) +#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) +#define CM_FX6_USB_HUB_RST IMX_GPIO_NR(7, 8) +#define SB_FX6_USB_OTG_PWR IMX_GPIO_NR(3, 22) +#define CM_FX6_SATA_PWREN IMX_GPIO_NR(1, 28) +#define CM_FX6_SATA_VDDC_CTRL IMX_GPIO_NR(1, 30) +#define CM_FX6_SATA_LDO_EN IMX_GPIO_NR(2, 16) +#define CM_FX6_SATA_NSTANDBY1 IMX_GPIO_NR(3, 20) +#define CM_FX6_SATA_PHY_SLP IMX_GPIO_NR(3, 23) +#define CM_FX6_SATA_STBY_REQ IMX_GPIO_NR(3, 29) +#define CM_FX6_SATA_NSTANDBY2 IMX_GPIO_NR(5, 2) +#define CM_FX6_SATA_NRSTDLY IMX_GPIO_NR(6, 6) +#define CM_FX6_SATA_PWLOSS_INT IMX_GPIO_NR(6, 31) + void cm_fx6_set_usdhc_iomux(void); void cm_fx6_set_ecspi_iomux(void); diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index cccc989f9ce..10d02b4e18c 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -128,6 +128,19 @@ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "run doboot\0" \ + "satadev=0\0" \ + "sataroot=/dev/sda2 rw rootwait\0" \ + "sataargs=setenv bootargs console=${console} " \ + "root=${sataroot} " \ + "${video}\0" \ + "loadsatabootscript=load sata ${satadev} ${loadaddr} ${bootscr}\0" \ + "satabootscript=echo Running bootscript from sata ...; " \ + "source ${loadaddr}\0" \ + "sataloadkernel=load sata ${satadev} ${loadaddr} ${kernel}\0" \ + "sataloadfdt=load sata ${satadev} ${fdtaddr} ${fdtfile}\0" \ + "sataboot=echo Booting from sata ...; "\ + "run sataargs; " \ + "run doboot\0" \ "nandroot=/dev/mtdblock4 rw\0" \ "nandrootfstype=ubifs\0" \ "nandargs=setenv bootargs console=${console} " \ @@ -155,6 +168,18 @@ "fi;" \ "fi;" \ "fi;" \ + "if sata init; then " \ + "if run loadsatabootscript; then " \ + "run satabootscript;" \ + "else "\ + "if run sataloadkernel; then " \ + "if ${loadfdt}; then " \ + "run sataloadfdt; " \ + "fi;" \ + "run sataboot;" \ + "fi;" \ + "fi;" \ + "fi;" \ "run nandboot\0" #define CONFIG_BOOTCOMMAND \ @@ -221,6 +246,15 @@ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_SYS_I2C_EEPROM_BUS 2 +/* SATA */ +#define CONFIG_CMD_SATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_LIBATA +#define CONFIG_LBA48 +#define CONFIG_DWC_AHSATA +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR + /* GPIO */ #define CONFIG_MXC_GPIO -- cgit v1.3.1 From 0991866cf7a10d4868aa2a10940b4def0f68cc50 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Thu, 7 Aug 2014 22:49:56 -0700 Subject: pci: add support for board_pci_fixup_dev function Some board-level drivers may wish to have per-device fixup functions for PCI devices. Signed-off-by: Tim Harvey --- drivers/pci/pci.c | 4 ++++ include/pci.h | 7 +++++++ 2 files changed, 11 insertions(+) (limited to 'include') diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 4fd9c532b3f..28859f31612 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -648,6 +648,10 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device); pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class); +#ifdef CONFIG_PCI_FIXUP_DEV + board_pci_fixup_dev(hose, dev, vendor, device, class); +#endif + #ifdef CONFIG_PCI_SCAN_SHOW indent++; diff --git a/include/pci.h b/include/pci.h index 461f17c0589..2ff73653c5c 100644 --- a/include/pci.h +++ b/include/pci.h @@ -659,6 +659,13 @@ extern int pci_hose_find_cap_start(struct pci_controller *hose, pci_dev_t dev, extern int pci_find_cap(struct pci_controller *hose, pci_dev_t dev, int pos, int cap); +#ifdef CONFIG_PCI_FIXUP_DEV +extern void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, + unsigned short vendor, + unsigned short device, + unsigned short class); +#endif + const char * pci_class_str(u8 class); int pci_last_busno(void); -- cgit v1.3.1 From dad08286eaa84779349fe4cec427e1e29beaffac Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Thu, 7 Aug 2014 22:49:57 -0700 Subject: imx: ventana: add pci fixup for PLX PEX860x switch GPIO Most Gateworks Ventana boards use a PLX PEX860x PCIe switch for PCIe expansion. These boards use GPIO on the PLX device as PERST# for the downstream ports thus we assert this when the PLX is enumerated. Signed-off-by: Tim Harvey --- board/gateworks/gw_ventana/gw_ventana.c | 30 ++++++++++++++++++++++++++++++ include/configs/gw_ventana.h | 1 + 2 files changed, 31 insertions(+) (limited to 'include') diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 452a9053f51..9a1b6dd9ce3 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -1157,6 +1158,35 @@ int imx6_pcie_toggle_reset(void) } return 0; } + +/* + * Most Ventana boards have a PLX PEX860x PCIe switch onboard and use its + * GPIO's as PERST# signals for its downstream ports - configure the GPIO's + * properly and assert reset for 100ms. + */ +void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, + unsigned short vendor, unsigned short device, + unsigned short class) +{ + u32 dw; + + debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, + PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device); + if (vendor == PCI_VENDOR_ID_PLX && + (device & 0xfff0) == 0x8600 && + PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) { + debug("configuring PLX 860X downstream PERST#\n"); + pci_hose_read_config_dword(hose, dev, 0x62c, &dw); + dw |= 0xaaa8; /* GPIO1-7 outputs */ + pci_hose_write_config_dword(hose, dev, 0x62c, dw); + + pci_hose_read_config_dword(hose, dev, 0x644, &dw); + dw |= 0xfe; /* GPIO1-7 output high */ + pci_hose_write_config_dword(hose, dev, 0x644, dw); + + mdelay(100); + } +} #endif /* CONFIG_CMD_PCI */ #ifdef CONFIG_SERIAL_TAG diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index b991b093cb6..0e5c20097d1 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -141,6 +141,7 @@ #define CONFIG_PCI #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif -- cgit v1.3.1 From 3ee96c7da9b76f7462c2fae89592f5bad110ea90 Mon Sep 17 00:00:00 2001 From: Guillaume GARDET Date: Tue, 26 Aug 2014 12:05:31 +0200 Subject: imx: nitrogen6x: Replace 'fatload' by 'load' command in env settings to be filesystem independent nitrogen6x.h file defines CONFIG_CMD_FS_GENERIC, so we are able to use generic 'load' command instead of 'fatload'. It allows to use ext filesystem and keep compatibilty with fat filesystem. Signed-off-by: Guillaume GARDET Cc: Stefano Babic Acked-By: Eric Nelson --- include/configs/nitrogen6x.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index b2b17ce969d..d4b0ac9fdb1 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -192,11 +192,11 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ - "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loaduimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ -- cgit v1.3.1 From 19a895cbe9430e5abe68ef4bd4985cefef6e6347 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 5 Sep 2014 15:36:27 -0300 Subject: mx6qsabreauto: Remove imx6q-sabreauto.dts Commit fa9c021632473 ("mx6: add example DTB for mx6qsabreauto") introduced 'imx6q-sabreauto.dts' but it adds no real value as the dts file only contains the 'model' and 'compatible' strings. After this commit the final binary is also changed from 'u-boot.imx' to 'u-boot-dtb.imx', which may confuse users. So revert it until a more complete and useful device tree could be provided. Signed-off-by: Fabio Estevam Acked-by: Otavio Salvador --- arch/arm/dts/Makefile | 1 - arch/arm/dts/imx6q-sabreauto.dts | 13 ------------- include/configs/mx6qsabreauto.h | 3 --- 3 files changed, 17 deletions(-) delete mode 100644 arch/arm/dts/imx6q-sabreauto.dts (limited to 'include') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1ccd8274d25..5f2b946fdd8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -9,7 +9,6 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ exynos5250-smdk5250.dtb \ exynos5420-smdk5420.dtb \ exynos5420-peach-pit.dtb -dtb-$(CONFIG_MX6) += imx6q-sabreauto.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ diff --git a/arch/arm/dts/imx6q-sabreauto.dts b/arch/arm/dts/imx6q-sabreauto.dts deleted file mode 100644 index 7af2a88fd01..00000000000 --- a/arch/arm/dts/imx6q-sabreauto.dts +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright 2012 Freescale Semiconductor, Inc. - * Copyright 2011 Linaro Ltd. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/dts-v1/; - -/ { - model = "Freescale i.MX6 Quad SABRE Automotive Board"; - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; -}; diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index d1639c4c761..0ab31279ccd 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -45,7 +45,4 @@ #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_OF_SEPARATE -#define CONFIG_DEFAULT_DEVICE_TREE imx6q-sabreauto - #endif /* __MX6QSABREAUTO_CONFIG_H */ -- cgit v1.3.1 From c860eed17649a43feeea063789e700e06e25818d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 25 Aug 2014 14:26:46 -0300 Subject: mx6sxsabresd: Add PCI support Tested with an Intel Wireless PCI 7260HMW card: U-Boot 2014.10-rc1-16576-g4a8a8a8-dirty (Aug 23 2014 - 16:05:11) CPU: Freescale i.MX6SX rev1.0 at 792 MHz Reset cause: WDOG Board: MX6SX SABRE SDB I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 8086:08b1 - Network controller Signed-off-by: Fabio Estevam --- include/configs/mx6sxsabresd.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 1eda65e0818..b92d9443d47 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -198,6 +198,16 @@ #define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS +#define CONFIG_CMD_PCI +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 1) +#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 0) +#endif + /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH -- cgit v1.3.1 From 9500fac7ea12d822bd701cb19405a665c9e4ebd0 Mon Sep 17 00:00:00 2001 From: "Ye.Li" Date: Tue, 9 Sep 2014 14:51:57 +0800 Subject: imx: mx6q/dlarm2: Change to use generic board Enable the CONFIG_SYS_GENERIC_BOARD for imx6q/dl arm2 board to use generic board. Signed-off-by: Ye.Li --- include/configs/mx6qarm2.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index fd651cfa500..35c0a850801 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -23,6 +23,8 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) -- cgit v1.3.1 From 4c97f16911e229f6d5bbea5bee52449916e5fa92 Mon Sep 17 00:00:00 2001 From: "Ye.Li" Date: Tue, 9 Sep 2014 14:51:58 +0800 Subject: imx: mx6slevk: Change to use generic board Enable CONFIG_SYS_GENERIC_BOARD for imx6slevk to use generic board. Signed-off-by: Ye.Li --- include/configs/mx6slevk.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 3d05a647d94..194d7bdb76e 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -26,6 +26,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) -- cgit v1.3.1