From 5c01d1c0d0e673dbd5739256e77e9dca9dc74816 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 21 Jan 2019 14:53:21 -0700 Subject: gpio: Add a simple GPIO API for SPL In space-constrained environments or before driver model is available, it is sometimes necessary to set GPIO values. Add an SPL API for this, to allow early board code to change GPIOs. The caller must provide the register address, so that the drivers can be fairly generic. This API can be implemented by GPIO drivers, behind a suitable guard, like #ifdef CONFIG_SPL_BUILD. Signed-off-by: Simon Glass Reviewed-by: Philipp Tomsich --- include/spl_gpio.h | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 include/spl_gpio.h (limited to 'include') diff --git a/include/spl_gpio.h b/include/spl_gpio.h new file mode 100644 index 00000000000..e410e62914d --- /dev/null +++ b/include/spl_gpio.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Simple GPIO access from SPL. This only supports a single GPIO space, + * typically the SoC GPIO banks. + * + * Copyright 2018 Google LLC + */ + +#ifndef __SPL_GPIO_H +#define __SPL_GPIO_H + +#include + +/* + * The functions listed here should be implemented in the SoC GPIO driver. + * They correspond to the normal GPIO API (asm-generic/gpio.h). The GPIO + * number is encoded in an unsigned int by an SoC-specific means. Pull + * values are also SoC-specific. + * + * This API should only be used in TPL/SPL where GPIO access is needed but + * driver model is not available (yet) or adds too much overhead. + * + * The caller must supply the GPIO register base since this information is + * often specific to a particular SoC generation. This allows the GPIO + * code to be fairly generic. + * + * Only a single implementation of each of these functions can be provided. + * + * The 'gpio' value can include both a bank and a GPIO number, if desired. The + * encoding is SoC-specific. + */ + +/** + * spl_gpio_set_pull() - Set the pull up/down state of a GPIO + * + * @regs: Pointer to GPIO registers + * @gpio: GPIO to adjust (SoC-specific) + * @pull: Pull value (SoC-specific) + * @return return 0 if OK, -ve on error + */ +int spl_gpio_set_pull(void *regs, uint gpio, int pull); + +/** + * spl_gpio_output() - Set a GPIO as an output + * + * @regs: Pointer to GPIO registers + * @gpio: GPIO to adjust (SoC-specific) + * @value: 0 to set the output low, 1 to set it high + * @return return 0 if OK, -ve on error + */ +int spl_gpio_output(void *regs, uint gpio, int value); + +/** + * spl_gpio_input() - Set a GPIO as an input + * + * @regs: Pointer to GPIO registers + * @gpio: GPIO to adjust (SoC-specific) + * @return return 0 if OK, -ve on error + */ +int spl_gpio_input(void *regs, uint gpio); + +#endif /* __SPL_GPIO_H */ -- cgit v1.2.3 From 8a0c6aa33f0a077fee52b5b0e68190c7f8339ff0 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 21 Jan 2019 14:53:32 -0700 Subject: rockchip: rk3399: Add ROCKCHIP_DEVICE_SETTINGS to set env Some boards use different stdio environment variables from the default. Provide a #define for this which can be set before including the header file. Signed-off-by: Simon Glass Reviewed-by: Philipp Tomsich --- include/configs/rk3399_common.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 9a4da395f92..b977b1faa73 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -49,11 +49,16 @@ "kernel_addr_r=0x02080000\0" \ "ramdisk_addr_r=0x04000000\0" +#ifndef ROCKCHIP_DEVICE_SETTINGS +#define ROCKCHIP_DEVICE_SETTINGS +#endif + #include #define CONFIG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ "partitions=" PARTS_DEFAULT \ + ROCKCHIP_DEVICE_SETTINGS \ BOOTENV #endif -- cgit v1.2.3 From 9e92116bc84851d7a2a05f186468e77614bf3d67 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 21 Jan 2019 14:53:36 -0700 Subject: rockchip: Add support for chromebook_bob Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports for both power and external display. It includes a Chrome OS EC (Cortex-M3) to provide access to the keyboard and battery functions. Support so far includes only: - UART - SDRAM - MMC, SD card - Cros EC (but not keyboard) Not included: - Keyboard - Display - Sound - USB - TPM Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support for this is not provided in this series. Signed-off-by: Simon Glass Reviewed-by: Philipp Tomsich --- include/configs/gru.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 include/configs/gru.h (limited to 'include') diff --git a/include/configs/gru.h b/include/configs/gru.h new file mode 100644 index 00000000000..a0d27b6d51a --- /dev/null +++ b/include/configs/gru.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2015 Google, Inc + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdin=serial,cros-ec-keyb\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include + +#define CONFIG_SYS_MMC_ENV_DEV 0 + +#endif -- cgit v1.2.3