From 09c2046ff651a0d47bb2834d775991ba2c607130 Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Wed, 21 May 2014 13:26:17 +0800 Subject: board/t2080qds: enable sst and eon spi flash for nor boot Remove unnecessary condition CONFIG_RAMBOOT_PBL to have SST and EON SPI flash work in case of NOR boot. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- include/configs/T208xQDS.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 59d142e97e7..9b81ff70eb0 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -537,7 +537,7 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_SPI_FLASH #define CONFIG_FSL_ESPI #define CONFIG_SPI_FLASH_STMICRO -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_RAMBOOT_PBL) +#ifndef CONFIG_SPL_BUILD #define CONFIG_SPI_FLASH_SST #define CONFIG_SPI_FLASH_EON #endif -- cgit v1.2.3 From 38d67a4e552ac991f21c2d3e442a38fb0098fda6 Mon Sep 17 00:00:00 2001 From: Zhao Qiang Date: Tue, 3 Jun 2014 16:27:07 +0800 Subject: qe: move immap_qe.h from arch directory into common directory ls1021 is arm-core and supports qe too. Move immap_qe.h into common directory for both arm and powerpc. Signed-off-by: Zhao Qiang Reviewed-by: York Sun --- include/linux/immap_qe.h | 582 +++++++++++++++++++++++++++++++++++++++++++++++ include/post.h | 2 +- 2 files changed, 583 insertions(+), 1 deletion(-) create mode 100644 include/linux/immap_qe.h (limited to 'include') diff --git a/include/linux/immap_qe.h b/include/linux/immap_qe.h new file mode 100644 index 00000000000..b317dcb5fe8 --- /dev/null +++ b/include/linux/immap_qe.h @@ -0,0 +1,582 @@ +/* + * QUICC Engine (QE) Internal Memory Map. + * The Internal Memory Map for devices with QE on them. This + * is the superset of all QE devices (8360, etc.). + * + * Copyright (c) 2006-2009, 2011 Freescale Semiconductor, Inc. + * Author: Shlomi Gridih + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __IMMAP_QE_H__ +#define __IMMAP_QE_H__ + +#ifdef CONFIG_MPC83xx +#if defined(CONFIG_MPC8360) +#define QE_MURAM_SIZE 0xc000UL +#define MAX_QE_RISC 2 +#define QE_NUM_OF_SNUM 28 +#elif defined(CONFIG_MPC832x) || defined(CONFIG_MPC8309) +#define QE_MURAM_SIZE 0x4000UL +#define MAX_QE_RISC 1 +#define QE_NUM_OF_SNUM 28 +#endif +#endif + +/* QE I-RAM */ +typedef struct qe_iram { + u32 iadd; /* I-RAM Address Register */ + u32 idata; /* I-RAM Data Register */ + u8 res0[0x4]; + u32 iready; + u8 res1[0x70]; +} __attribute__ ((packed)) qe_iram_t; + +/* QE Interrupt Controller */ +typedef struct qe_ic { + u32 qicr; + u32 qivec; + u32 qripnr; + u32 qipnr; + u32 qipxcc; + u32 qipycc; + u32 qipwcc; + u32 qipzcc; + u32 qimr; + u32 qrimr; + u32 qicnr; + u8 res0[0x4]; + u32 qiprta; + u32 qiprtb; + u8 res1[0x4]; + u32 qricr; + u8 res2[0x20]; + u32 qhivec; + u8 res3[0x1C]; +} __attribute__ ((packed)) qe_ic_t; + +/* Communications Processor */ +typedef struct cp_qe { + u32 cecr; /* QE command register */ + u32 ceccr; /* QE controller configuration register */ + u32 cecdr; /* QE command data register */ + u8 res0[0xA]; + u16 ceter; /* QE timer event register */ + u8 res1[0x2]; + u16 cetmr; /* QE timers mask register */ + u32 cetscr; /* QE time-stamp timer control register */ + u32 cetsr1; /* QE time-stamp register 1 */ + u32 cetsr2; /* QE time-stamp register 2 */ + u8 res2[0x8]; + u32 cevter; /* QE virtual tasks event register */ + u32 cevtmr; /* QE virtual tasks mask register */ + u16 cercr; /* QE RAM control register */ + u8 res3[0x2]; + u8 res4[0x24]; + u16 ceexe1; /* QE external request 1 event register */ + u8 res5[0x2]; + u16 ceexm1; /* QE external request 1 mask register */ + u8 res6[0x2]; + u16 ceexe2; /* QE external request 2 event register */ + u8 res7[0x2]; + u16 ceexm2; /* QE external request 2 mask register */ + u8 res8[0x2]; + u16 ceexe3; /* QE external request 3 event register */ + u8 res9[0x2]; + u16 ceexm3; /* QE external request 3 mask register */ + u8 res10[0x2]; + u16 ceexe4; /* QE external request 4 event register */ + u8 res11[0x2]; + u16 ceexm4; /* QE external request 4 mask register */ + u8 res12[0x2]; + u8 res13[0x280]; +} __attribute__ ((packed)) cp_qe_t; + +/* QE Multiplexer */ +typedef struct qe_mux { + u32 cmxgcr; /* CMX general clock route register */ + u32 cmxsi1cr_l; /* CMX SI1 clock route low register */ + u32 cmxsi1cr_h; /* CMX SI1 clock route high register */ + u32 cmxsi1syr; /* CMX SI1 SYNC route register */ + u32 cmxucr1; /* CMX UCC1, UCC3 clock route register */ + u32 cmxucr2; /* CMX UCC5, UCC7 clock route register */ + u32 cmxucr3; /* CMX UCC2, UCC4 clock route register */ + u32 cmxucr4; /* CMX UCC6, UCC8 clock route register */ + u32 cmxupcr; /* CMX UPC clock route register */ + u8 res0[0x1C]; +} __attribute__ ((packed)) qe_mux_t; + +/* QE Timers */ +typedef struct qe_timers { + u8 gtcfr1; /* Timer 1 2 global configuration register */ + u8 res0[0x3]; + u8 gtcfr2; /* Timer 3 4 global configuration register */ + u8 res1[0xB]; + u16 gtmdr1; /* Timer 1 mode register */ + u16 gtmdr2; /* Timer 2 mode register */ + u16 gtrfr1; /* Timer 1 reference register */ + u16 gtrfr2; /* Timer 2 reference register */ + u16 gtcpr1; /* Timer 1 capture register */ + u16 gtcpr2; /* Timer 2 capture register */ + u16 gtcnr1; /* Timer 1 counter */ + u16 gtcnr2; /* Timer 2 counter */ + u16 gtmdr3; /* Timer 3 mode register */ + u16 gtmdr4; /* Timer 4 mode register */ + u16 gtrfr3; /* Timer 3 reference register */ + u16 gtrfr4; /* Timer 4 reference register */ + u16 gtcpr3; /* Timer 3 capture register */ + u16 gtcpr4; /* Timer 4 capture register */ + u16 gtcnr3; /* Timer 3 counter */ + u16 gtcnr4; /* Timer 4 counter */ + u16 gtevr1; /* Timer 1 event register */ + u16 gtevr2; /* Timer 2 event register */ + u16 gtevr3; /* Timer 3 event register */ + u16 gtevr4; /* Timer 4 event register */ + u16 gtps; /* Timer 1 prescale register */ + u8 res2[0x46]; +} __attribute__ ((packed)) qe_timers_t; + +/* BRG */ +typedef struct qe_brg { + u32 brgc1; /* BRG1 configuration register */ + u32 brgc2; /* BRG2 configuration register */ + u32 brgc3; /* BRG3 configuration register */ + u32 brgc4; /* BRG4 configuration register */ + u32 brgc5; /* BRG5 configuration register */ + u32 brgc6; /* BRG6 configuration register */ + u32 brgc7; /* BRG7 configuration register */ + u32 brgc8; /* BRG8 configuration register */ + u32 brgc9; /* BRG9 configuration register */ + u32 brgc10; /* BRG10 configuration register */ + u32 brgc11; /* BRG11 configuration register */ + u32 brgc12; /* BRG12 configuration register */ + u32 brgc13; /* BRG13 configuration register */ + u32 brgc14; /* BRG14 configuration register */ + u32 brgc15; /* BRG15 configuration register */ + u32 brgc16; /* BRG16 configuration register */ + u8 res0[0x40]; +} __attribute__ ((packed)) qe_brg_t; + +/* SPI */ +typedef struct spi { + u8 res0[0x20]; + u32 spmode; /* SPI mode register */ + u8 res1[0x2]; + u8 spie; /* SPI event register */ + u8 res2[0x1]; + u8 res3[0x2]; + u8 spim; /* SPI mask register */ + u8 res4[0x1]; + u8 res5[0x1]; + u8 spcom; /* SPI command register */ + u8 res6[0x2]; + u32 spitd; /* SPI transmit data register (cpu mode) */ + u32 spird; /* SPI receive data register (cpu mode) */ + u8 res7[0x8]; +} __attribute__ ((packed)) spi_t; + +/* SI */ +typedef struct si1 { + u16 siamr1; /* SI1 TDMA mode register */ + u16 sibmr1; /* SI1 TDMB mode register */ + u16 sicmr1; /* SI1 TDMC mode register */ + u16 sidmr1; /* SI1 TDMD mode register */ + u8 siglmr1_h; /* SI1 global mode register high */ + u8 res0[0x1]; + u8 sicmdr1_h; /* SI1 command register high */ + u8 res2[0x1]; + u8 sistr1_h; /* SI1 status register high */ + u8 res3[0x1]; + u16 sirsr1_h; /* SI1 RAM shadow address register high */ + u8 sitarc1; /* SI1 RAM counter Tx TDMA */ + u8 sitbrc1; /* SI1 RAM counter Tx TDMB */ + u8 sitcrc1; /* SI1 RAM counter Tx TDMC */ + u8 sitdrc1; /* SI1 RAM counter Tx TDMD */ + u8 sirarc1; /* SI1 RAM counter Rx TDMA */ + u8 sirbrc1; /* SI1 RAM counter Rx TDMB */ + u8 sircrc1; /* SI1 RAM counter Rx TDMC */ + u8 sirdrc1; /* SI1 RAM counter Rx TDMD */ + u8 res4[0x8]; + u16 siemr1; /* SI1 TDME mode register 16 bits */ + u16 sifmr1; /* SI1 TDMF mode register 16 bits */ + u16 sigmr1; /* SI1 TDMG mode register 16 bits */ + u16 sihmr1; /* SI1 TDMH mode register 16 bits */ + u8 siglmg1_l; /* SI1 global mode register low 8 bits */ + u8 res5[0x1]; + u8 sicmdr1_l; /* SI1 command register low 8 bits */ + u8 res6[0x1]; + u8 sistr1_l; /* SI1 status register low 8 bits */ + u8 res7[0x1]; + u16 sirsr1_l; /* SI1 RAM shadow address register low 16 bits */ + u8 siterc1; /* SI1 RAM counter Tx TDME 8 bits */ + u8 sitfrc1; /* SI1 RAM counter Tx TDMF 8 bits */ + u8 sitgrc1; /* SI1 RAM counter Tx TDMG 8 bits */ + u8 sithrc1; /* SI1 RAM counter Tx TDMH 8 bits */ + u8 sirerc1; /* SI1 RAM counter Rx TDME 8 bits */ + u8 sirfrc1; /* SI1 RAM counter Rx TDMF 8 bits */ + u8 sirgrc1; /* SI1 RAM counter Rx TDMG 8 bits */ + u8 sirhrc1; /* SI1 RAM counter Rx TDMH 8 bits */ + u8 res8[0x8]; + u32 siml1; /* SI1 multiframe limit register */ + u8 siedm1; /* SI1 extended diagnostic mode register */ + u8 res9[0xBB]; +} __attribute__ ((packed)) si1_t; + +/* SI Routing Tables */ +typedef struct sir { + u8 tx[0x400]; + u8 rx[0x400]; + u8 res0[0x800]; +} __attribute__ ((packed)) sir_t; + +/* USB Controller. */ +typedef struct usb_ctlr { + u8 usb_usmod; + u8 usb_usadr; + u8 usb_uscom; + u8 res1[1]; + u16 usb_usep1; + u16 usb_usep2; + u16 usb_usep3; + u16 usb_usep4; + u8 res2[4]; + u16 usb_usber; + u8 res3[2]; + u16 usb_usbmr; + u8 res4[1]; + u8 usb_usbs; + u16 usb_ussft; + u8 res5[2]; + u16 usb_usfrn; + u8 res6[0x22]; +} __attribute__ ((packed)) usb_t; + +/* MCC */ +typedef struct mcc { + u32 mcce; /* MCC event register */ + u32 mccm; /* MCC mask register */ + u32 mccf; /* MCC configuration register */ + u32 merl; /* MCC emergency request level register */ + u8 res0[0xF0]; +} __attribute__ ((packed)) mcc_t; + +/* QE UCC Slow */ +typedef struct ucc_slow { + u32 gumr_l; /* UCCx general mode register (low) */ + u32 gumr_h; /* UCCx general mode register (high) */ + u16 upsmr; /* UCCx protocol-specific mode register */ + u8 res0[0x2]; + u16 utodr; /* UCCx transmit on demand register */ + u16 udsr; /* UCCx data synchronization register */ + u16 ucce; /* UCCx event register */ + u8 res1[0x2]; + u16 uccm; /* UCCx mask register */ + u8 res2[0x1]; + u8 uccs; /* UCCx status register */ + u8 res3[0x24]; + u16 utpt; + u8 guemr; /* UCC general extended mode register */ + u8 res4[0x200 - 0x091]; +} __attribute__ ((packed)) ucc_slow_t; + +typedef struct ucc_mii_mng { + u32 miimcfg; /* MII management configuration reg */ + u32 miimcom; /* MII management command reg */ + u32 miimadd; /* MII management address reg */ + u32 miimcon; /* MII management control reg */ + u32 miimstat; /* MII management status reg */ + u32 miimind; /* MII management indication reg */ + u32 ifctl; /* interface control reg */ + u32 ifstat; /* interface statux reg */ +} __attribute__ ((packed))uec_mii_t; + +typedef struct ucc_ethernet { + u32 maccfg1; /* mac configuration reg. 1 */ + u32 maccfg2; /* mac configuration reg. 2 */ + u32 ipgifg; /* interframe gap reg. */ + u32 hafdup; /* half-duplex reg. */ + u8 res1[0x10]; + u32 miimcfg; /* MII management configuration reg */ + u32 miimcom; /* MII management command reg */ + u32 miimadd; /* MII management address reg */ + u32 miimcon; /* MII management control reg */ + u32 miimstat; /* MII management status reg */ + u32 miimind; /* MII management indication reg */ + u32 ifctl; /* interface control reg */ + u32 ifstat; /* interface statux reg */ + u32 macstnaddr1; /* mac station address part 1 reg */ + u32 macstnaddr2; /* mac station address part 2 reg */ + u8 res2[0x8]; + u32 uempr; /* UCC Ethernet Mac parameter reg */ + u32 utbipar; /* UCC tbi address reg */ + u16 uescr; /* UCC Ethernet statistics control reg */ + u8 res3[0x180 - 0x15A]; + u32 tx64; /* Total number of frames (including bad + * frames) transmitted that were exactly + * of the minimal length (64 for un tagged, + * 68 for tagged, or with length exactly + * equal to the parameter MINLength */ + u32 tx127; /* Total number of frames (including bad + * frames) transmitted that were between + * MINLength (Including FCS length==4) + * and 127 octets */ + u32 tx255; /* Total number of frames (including bad + * frames) transmitted that were between + * 128 (Including FCS length==4) and 255 + * octets */ + u32 rx64; /* Total number of frames received including + * bad frames that were exactly of the + * mninimal length (64 bytes) */ + u32 rx127; /* Total number of frames (including bad + * frames) received that were between + * MINLength (Including FCS length==4) + * and 127 octets */ + u32 rx255; /* Total number of frames (including + * bad frames) received that were between + * 128 (Including FCS length==4) and 255 + * octets */ + u32 txok; /* Total number of octets residing in frames + * that where involved in succesfull + * transmission */ + u16 txcf; /* Total number of PAUSE control frames + * transmitted by this MAC */ + u8 res4[0x2]; + u32 tmca; /* Total number of frames that were transmitted + * succesfully with the group address bit set + * that are not broadcast frames */ + u32 tbca; /* Total number of frames transmitted + * succesfully that had destination address + * field equal to the broadcast address */ + u32 rxfok; /* Total number of frames received OK */ + u32 rxbok; /* Total number of octets received OK */ + u32 rbyt; /* Total number of octets received including + * octets in bad frames. Must be implemented + * in HW because it includes octets in frames + * that never even reach the UCC */ + u32 rmca; /* Total number of frames that were received + * succesfully with the group address bit set + * that are not broadcast frames */ + u32 rbca; /* Total number of frames received succesfully + * that had destination address equal to the + * broadcast address */ + u32 scar; /* Statistics carry register */ + u32 scam; /* Statistics caryy mask register */ + u8 res5[0x200 - 0x1c4]; +} __attribute__ ((packed)) uec_t; + +/* QE UCC Fast */ +typedef struct ucc_fast { + u32 gumr; /* UCCx general mode register */ + u32 upsmr; /* UCCx protocol-specific mode register */ + u16 utodr; /* UCCx transmit on demand register */ + u8 res0[0x2]; + u16 udsr; /* UCCx data synchronization register */ + u8 res1[0x2]; + u32 ucce; /* UCCx event register */ + u32 uccm; /* UCCx mask register. */ + u8 uccs; /* UCCx status register */ + u8 res2[0x7]; + u32 urfb; /* UCC receive FIFO base */ + u16 urfs; /* UCC receive FIFO size */ + u8 res3[0x2]; + u16 urfet; /* UCC receive FIFO emergency threshold */ + u16 urfset; /* UCC receive FIFO special emergency + * threshold */ + u32 utfb; /* UCC transmit FIFO base */ + u16 utfs; /* UCC transmit FIFO size */ + u8 res4[0x2]; + u16 utfet; /* UCC transmit FIFO emergency threshold */ + u8 res5[0x2]; + u16 utftt; /* UCC transmit FIFO transmit threshold */ + u8 res6[0x2]; + u16 utpt; /* UCC transmit polling timer */ + u8 res7[0x2]; + u32 urtry; /* UCC retry counter register */ + u8 res8[0x4C]; + u8 guemr; /* UCC general extended mode register */ + u8 res9[0x100 - 0x091]; + uec_t ucc_eth; +} __attribute__ ((packed)) ucc_fast_t; + +/* QE UCC */ +typedef struct ucc_common { + u8 res1[0x90]; + u8 guemr; + u8 res2[0x200 - 0x091]; +} __attribute__ ((packed)) ucc_common_t; + +typedef struct ucc { + union { + ucc_slow_t slow; + ucc_fast_t fast; + ucc_common_t common; + }; +} __attribute__ ((packed)) ucc_t; + +/* MultiPHY UTOPIA POS Controllers (UPC) */ +typedef struct upc { + u32 upgcr; /* UTOPIA/POS general configuration register */ + u32 uplpa; /* UTOPIA/POS last PHY address */ + u32 uphec; /* ATM HEC register */ + u32 upuc; /* UTOPIA/POS UCC configuration */ + u32 updc1; /* UTOPIA/POS device 1 configuration */ + u32 updc2; /* UTOPIA/POS device 2 configuration */ + u32 updc3; /* UTOPIA/POS device 3 configuration */ + u32 updc4; /* UTOPIA/POS device 4 configuration */ + u32 upstpa; /* UTOPIA/POS STPA threshold */ + u8 res0[0xC]; + u32 updrs1_h; /* UTOPIA/POS device 1 rate select */ + u32 updrs1_l; /* UTOPIA/POS device 1 rate select */ + u32 updrs2_h; /* UTOPIA/POS device 2 rate select */ + u32 updrs2_l; /* UTOPIA/POS device 2 rate select */ + u32 updrs3_h; /* UTOPIA/POS device 3 rate select */ + u32 updrs3_l; /* UTOPIA/POS device 3 rate select */ + u32 updrs4_h; /* UTOPIA/POS device 4 rate select */ + u32 updrs4_l; /* UTOPIA/POS device 4 rate select */ + u32 updrp1; /* UTOPIA/POS device 1 receive priority low */ + u32 updrp2; /* UTOPIA/POS device 2 receive priority low */ + u32 updrp3; /* UTOPIA/POS device 3 receive priority low */ + u32 updrp4; /* UTOPIA/POS device 4 receive priority low */ + u32 upde1; /* UTOPIA/POS device 1 event */ + u32 upde2; /* UTOPIA/POS device 2 event */ + u32 upde3; /* UTOPIA/POS device 3 event */ + u32 upde4; /* UTOPIA/POS device 4 event */ + u16 uprp1; + u16 uprp2; + u16 uprp3; + u16 uprp4; + u8 res1[0x8]; + u16 uptirr1_0; /* Device 1 transmit internal rate 0 */ + u16 uptirr1_1; /* Device 1 transmit internal rate 1 */ + u16 uptirr1_2; /* Device 1 transmit internal rate 2 */ + u16 uptirr1_3; /* Device 1 transmit internal rate 3 */ + u16 uptirr2_0; /* Device 2 transmit internal rate 0 */ + u16 uptirr2_1; /* Device 2 transmit internal rate 1 */ + u16 uptirr2_2; /* Device 2 transmit internal rate 2 */ + u16 uptirr2_3; /* Device 2 transmit internal rate 3 */ + u16 uptirr3_0; /* Device 3 transmit internal rate 0 */ + u16 uptirr3_1; /* Device 3 transmit internal rate 1 */ + u16 uptirr3_2; /* Device 3 transmit internal rate 2 */ + u16 uptirr3_3; /* Device 3 transmit internal rate 3 */ + u16 uptirr4_0; /* Device 4 transmit internal rate 0 */ + u16 uptirr4_1; /* Device 4 transmit internal rate 1 */ + u16 uptirr4_2; /* Device 4 transmit internal rate 2 */ + u16 uptirr4_3; /* Device 4 transmit internal rate 3 */ + u32 uper1; /* Device 1 port enable register */ + u32 uper2; /* Device 2 port enable register */ + u32 uper3; /* Device 3 port enable register */ + u32 uper4; /* Device 4 port enable register */ + u8 res2[0x150]; +} __attribute__ ((packed)) upc_t; + +/* SDMA */ +typedef struct sdma { + u32 sdsr; /* Serial DMA status register */ + u32 sdmr; /* Serial DMA mode register */ + u32 sdtr1; /* SDMA system bus threshold register */ + u32 sdtr2; /* SDMA secondary bus threshold register */ + u32 sdhy1; /* SDMA system bus hysteresis register */ + u32 sdhy2; /* SDMA secondary bus hysteresis register */ + u32 sdta1; /* SDMA system bus address register */ + u32 sdta2; /* SDMA secondary bus address register */ + u32 sdtm1; /* SDMA system bus MSNUM register */ + u32 sdtm2; /* SDMA secondary bus MSNUM register */ + u8 res0[0x10]; + u32 sdaqr; /* SDMA address bus qualify register */ + u32 sdaqmr; /* SDMA address bus qualify mask register */ + u8 res1[0x4]; + u32 sdwbcr; /* SDMA CAM entries base register */ + u8 res2[0x38]; +} __attribute__ ((packed)) sdma_t; + +/* Debug Space */ +typedef struct dbg { + u32 bpdcr; /* Breakpoint debug command register */ + u32 bpdsr; /* Breakpoint debug status register */ + u32 bpdmr; /* Breakpoint debug mask register */ + u32 bprmrr0; /* Breakpoint request mode risc register 0 */ + u32 bprmrr1; /* Breakpoint request mode risc register 1 */ + u8 res0[0x8]; + u32 bprmtr0; /* Breakpoint request mode trb register 0 */ + u32 bprmtr1; /* Breakpoint request mode trb register 1 */ + u8 res1[0x8]; + u32 bprmir; /* Breakpoint request mode immediate register */ + u32 bprmsr; /* Breakpoint request mode serial register */ + u32 bpemr; /* Breakpoint exit mode register */ + u8 res2[0x48]; +} __attribute__ ((packed)) dbg_t; + +/* + * RISC Special Registers (Trap and Breakpoint). These are described in + * the QE Developer's Handbook. +*/ +typedef struct rsp { + u32 tibcr[16]; /* Trap/instruction breakpoint control regs */ + u8 res0[64]; + u32 ibcr0; + u32 ibs0; + u32 ibcnr0; + u8 res1[4]; + u32 ibcr1; + u32 ibs1; + u32 ibcnr1; + u32 npcr; + u32 dbcr; + u32 dbar; + u32 dbamr; + u32 dbsr; + u32 dbcnr; + u8 res2[12]; + u32 dbdr_h; + u32 dbdr_l; + u32 dbdmr_h; + u32 dbdmr_l; + u32 bsr; + u32 bor; + u32 bior; + u8 res3[4]; + u32 iatr[4]; + u32 eccr; /* Exception control configuration register */ + u32 eicr; + u8 res4[0x100-0xf8]; +} __attribute__ ((packed)) rsp_t; + +typedef struct qe_immap { + qe_iram_t iram; /* I-RAM */ + qe_ic_t ic; /* Interrupt Controller */ + cp_qe_t cp; /* Communications Processor */ + qe_mux_t qmx; /* QE Multiplexer */ + qe_timers_t qet; /* QE Timers */ + spi_t spi[0x2]; /* spi */ + mcc_t mcc; /* mcc */ + qe_brg_t brg; /* brg */ + usb_t usb; /* USB */ + si1_t si1; /* SI */ + u8 res11[0x800]; + sir_t sir; /* SI Routing Tables */ + ucc_t ucc1; /* ucc1 */ + ucc_t ucc3; /* ucc3 */ + ucc_t ucc5; /* ucc5 */ + ucc_t ucc7; /* ucc7 */ + u8 res12[0x600]; + upc_t upc1; /* MultiPHY UTOPIA POS Controller 1 */ + ucc_t ucc2; /* ucc2 */ + ucc_t ucc4; /* ucc4 */ + ucc_t ucc6; /* ucc6 */ + ucc_t ucc8; /* ucc8 */ + u8 res13[0x600]; + upc_t upc2; /* MultiPHY UTOPIA POS Controller 2 */ + sdma_t sdma; /* SDMA */ + dbg_t dbg; /* Debug Space */ + rsp_t rsp[0x2]; /* RISC Special Registers + * (Trap and Breakpoint) */ + u8 res14[0x300]; + u8 res15[0x3A00]; + u8 res16[0x8000]; /* 0x108000 - 0x110000 */ + u8 muram[QE_MURAM_SIZE]; +} __attribute__ ((packed)) qe_map_t; + +extern qe_map_t *qe_immr; + +#endif /* __IMMAP_QE_H__ */ diff --git a/include/post.h b/include/post.h index 24ca728b404..5ebd5358232 100644 --- a/include/post.h +++ b/include/post.h @@ -38,7 +38,7 @@ #define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) #elif defined(CONFIG_MPC8360) -#include +#include #define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) #elif defined (CONFIG_MPC85xx) -- cgit v1.2.3 From d0bc51407cb1a10bdc0025fb58524c6d13658b83 Mon Sep 17 00:00:00 2001 From: Lijun Pan Date: Fri, 6 Jun 2014 15:13:58 -0500 Subject: powerpc/mpc85xx: Remove P1023 RDS support Since P1023RDS is no longer supported/manufactured by Freescale, we clean up P1023RDS related code. Since P1023RDB is still supported by Freescale, we keep P1023RDB releated code. Signed-off-by: Lijun Pan Reviewed-by: York Sun --- include/configs/P1023RDS.h | 479 --------------------------------------------- 1 file changed, 479 deletions(-) delete mode 100644 include/configs/P1023RDS.h (limited to 'include') diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h deleted file mode 100644 index ac75b9c5fb6..00000000000 --- a/include/configs/P1023RDS.h +++ /dev/null @@ -1,479 +0,0 @@ -/* - * Copyright 2010-2012 Freescale Semiconductor, Inc. - * - * Authors: Roy Zang - * Chunhe Lan - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * p1023rds board configuration file - * - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff40000 -#endif - -#ifndef CONFIG_SYS_MONITOR_BASE -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc -#endif - -/* High Level Configuration Options */ -#define CONFIG_BOOKE /* BOOKE */ -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_P1023 -#define CONFIG_P1023RDS -#define CONFIG_MP /* support multiple processors */ - -#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */ -#define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */ -#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */ -#define CONFIG_PCIE3 /* PCIE controler 3 (slot 3) */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ -#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ -#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ - -#ifndef __ASSEMBLY__ -extern unsigned long get_clock_freq(void); -#endif - -#define CONFIG_SYS_CLK_FREQ 66666666 -#define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_HWCONFIG - -#define CONFIG_ENABLE_36BIT_PHYS - -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x1fffffff /* fix me, only 1G */ -#define CONFIG_PANIC_HANG /* do not reset board on panic */ - -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* Implement conversion of - addresses in the LBC */ - -/* DDR Setup */ -#define CONFIG_VERY_BIG_RAM - -#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 - -/* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 2048u /* DDR is 2GB */ - -/* Default settings for "stable" mode */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F -#define CONFIG_SYS_DDR_CS1_BNDS 0x0040007F -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302 -#define CONFIG_SYS_DDR_CS1_CONFIG 0x80014302 -#define CONFIG_SYS_DDR_TIMING_3 0x00020000 -#define CONFIG_SYS_DDR_TIMING_0 0x40110104 -#define CONFIG_SYS_DDR_TIMING_1 0x5C59E544 -#define CONFIG_SYS_DDR_TIMING_2 0x0fA888CA -#define CONFIG_SYS_DDR_MODE_1 0x00441210 -#define CONFIG_SYS_DDR_MODE_2 0x00000000 -#define CONFIG_SYS_DDR_MODE_CTRL 0x00000000 -#define CONFIG_SYS_DDR_INTERVAL 0x0A280100 -#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef -#define CONFIG_SYS_DDR_CLK_CTRL 0x01800000 -#define CONFIG_SYS_DDR_TIMING_4 0x00000001 -#define CONFIG_SYS_DDR_TIMING_5 0x01401400 -#define CONFIG_SYS_DDR_ZQ_CNTL 0x89080600 -#define CONFIG_SYS_DDR_WRLVL_CNTL 0x8675F605 -#define CONFIG_SYS_DDR_CONTROL 0xC70C0008 /* Type = DDR3: No Interleaving */ -#define CONFIG_SYS_DDR_CONTROL2 0x24401010 -#define CONFIG_SYS_DDR_CDR1 0x00000000 -#define CONFIG_SYS_DDR_CDR2 0x00000000 - -#define CONFIG_SYS_DDR_ERR_INT_EN 0x00000000 -#define CONFIG_SYS_DDR_ERR_DIS 0x00000000 -#define CONFIG_SYS_DDR_SBE 0x00000000 - -/* Settings that differ for "performance" mode */ -#define CONFIG_SYS_DDR_CS0_BNDS_PERF 0x0000007F /* Interleaving Enabled */ -#define CONFIG_SYS_DDR_CS1_BNDS_PERF 0x00000000 /* Interleaving Enabled */ -#define CONFIG_SYS_DDR_CS1_CONFIG_PERF 0x80014302 -#define CONFIG_SYS_DDR_TIMING_1_PERF 0x5C58E544 -#define CONFIG_SYS_DDR_TIMING_2_PERF 0x0FA888CA -/* Type = DDR3: cs0-cs1 interleaving */ -#define CONFIG_SYS_DDR_CONTROL_PERF 0xC70C4008 -#define CONFIG_SYS_DDR_CDR_1 0x00000000 -#define CONFIG_SYS_DDR_CDR_2 0x00000000 - - -/* - * Memory map - * - * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable - * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable - * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable - * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable - * - * Localbus non-cacheable - * 0xe000_0000 0xe003_ffff BCSR 256K BCSR - * 0xee00_0000 0xefff_ffff NOR flash 32M NOR flash - * 0xff00_0000 0xff3f_ffff DPAA_QBMAN 4M - * 0xff60_0000 0xff7f_ffff CCSR 2M non-cacheable - * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable - * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 - */ - -/* - * Local Bus Definitions - */ -#define CONFIG_SYS_BCSR_BASE 0xe0000000 /* start of on board FPGA */ -#define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE - -#define CONFIG_SYS_FLASH_BASE 0xee000000 /* start of FLASH 32M */ - -#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE - -#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \ - | BR_PS_16 | BR_V) -#define CONFIG_FLASH_OR_PRELIM 0xfe000ff7 - -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_EMPTY_INFO - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#if defined(CONFIG_SYS_SPL) -#define CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f function */ -#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ - -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) -#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */ - -#ifndef CONFIG_NAND_SPL -#define CONFIG_SYS_NAND_BASE 0xffa00000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE -#else -#define CONFIG_SYS_NAND_BASE 0xfff00000 -#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE -#endif - -#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_CMD_NAND -#define CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) - -/* NAND boot: 4K NAND loader config */ -#define CONFIG_SYS_NAND_SPL_SIZE 0x1000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + CONFIG_SYS_NAND_SPL_SIZE) -#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000 - CONFIG_SYS_NAND_SPL_SIZE) -#define CONFIG_SYS_NAND_U_BOOT_START 0x11000000 -#define CONFIG_SYS_NAND_U_BOOT_OFFS (0) -#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 -#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) - -/* NAND flash config */ -#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ - | (2< - -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_PING -#define CONFIG_CMD_MII -#define CONFIG_CMD_ELF -#define CONFIG_CMD_SETEXPR -#define CONFIG_CMD_REGINFO - -#if defined(CONFIG_PCI) -#define CONFIG_CMD_PCI -#define CONFIG_CMD_NET -#endif - -/* - * USB - */ -#define CONFIG_HAS_FSL_DR_USB -#ifdef CONFIG_HAS_FSL_DR_USB -#define CONFIG_USB_EHCI - -#ifdef CONFIG_USB_EHCI -#define CONFIG_CMD_USB -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_USB_EHCI_FSL -#define CONFIG_USB_STORAGE -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION -#endif -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -/* - * For booting Linux, the board info and command line data - * have to be in the first 16 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ - -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#endif - -/* - * Environment Configuration - */ -#define CONFIG_BOOTFILE "uImage" -#define CONFIG_UBOOTPATH (u-boot.bin) /* U-Boot image on TFTP server */ - -/* default location for tftp and bootm */ -#define CONFIG_LOADADDR 1000000 - -#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ - -#define CONFIG_BAUDRATE 115200 - -/* Qman/Bman */ -#define CONFIG_SYS_DPAA_QBMAN /* support Q/Bman */ -#define CONFIG_SYS_QMAN_MEM_BASE 0xff000000 -#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE -#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_BMAN_MEM_BASE 0xff200000 -#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 - -/* For FM */ -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ - -#ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_FMAN_ENET -#define CONFIG_PHY_MARVELL -#endif - -/* Default address of microcode for the Linux Fman driver */ -/* QE microcode/firmware address */ -#define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 -#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) - -#ifdef CONFIG_FMAN_ENET -#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2 -#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x7 - -#define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_MII /* MII PHY management */ -#define CONFIG_ETHPRIME "FM1@DTSEC1" -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0" - -#endif /* __CONFIG_H */ -- cgit v1.2.3 From 04818bbdc34cb02b2590af8e5f77118ed8a8d755 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Thu, 12 Jun 2014 12:14:00 +0530 Subject: driver/nand: Update SRAM initialize logic for IFC. IFC controller v1.1.0 requires internal SRAM initialize by reading NAND flash. Higher controller versions have provided "SRAM init" bit in NCFGR register space. update SRAM initialize logic to reflect the same. Also print error message in case of Page read error. Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- include/fsl_ifc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h index 630e4b4999b..b353b04c469 100644 --- a/include/fsl_ifc.h +++ b/include/fsl_ifc.h @@ -367,6 +367,8 @@ */ /* Auto Boot Mode */ #define IFC_NAND_NCFGR_BOOT 0x80000000 +/* SRAM INIT EN */ +#define IFC_NAND_SRAM_INIT_EN 0x20000000 /* Addressing Mode-ROW0+n/COL0 */ #define IFC_NAND_NCFGR_ADDR_MODE_RC0 0x00000000 /* Addressing Mode-ROW0+n/COL0+n */ -- cgit v1.2.3 From 591dd192307d81cf8f8705b06854e973c53d4c4d Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Sat, 14 Jun 2014 08:48:19 +0530 Subject: driver/nand: Add support of 16K SRAM for IFC 2.0 Internal SRAM has been incresed from 8KB to 16KB for IFC cotroller ver 2.0. Update the page offset calculation logic to support the same. Signed-off-by: Prabhakar Kushwaha Reviewed-by: York Sun --- include/fsl_ifc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h index b353b04c469..11474b757c3 100644 --- a/include/fsl_ifc.h +++ b/include/fsl_ifc.h @@ -12,6 +12,8 @@ #include #include +#define FSL_IFC_V1_1_0 0x01010000 +#define FSL_IFC_V2_0_0 0x02000000 #ifdef CONFIG_SYS_FSL_IFC_LE #define ifc_in32(a) in_le32(a) -- cgit v1.2.3 From de5191631088e71ba8ed28bb491dafa776058008 Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Thu, 26 Jun 2014 14:41:33 +0800 Subject: powerpc/ifc: fix invalid CSn FTIM2.TCH setting On some platforms, CSn FTIM2.TCH is set to zero which is invalid, an invalid hold time makes DUT timing variances, whether it works or not on luck. Signed-off-by: Shaohui Xie Reviewed-by: York Sun --- include/configs/B4860QDS.h | 2 +- include/configs/BSC9132QDS.h | 2 +- include/configs/C29XPCIE.h | 2 +- include/configs/P1010RDB.h | 2 +- include/configs/T104xRDB.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/T4240QDS.h | 2 +- 7 files changed, 7 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 1af9ba686d9..43c9df01bde 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -340,7 +340,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) #define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 7bb5d33d0cc..49c16afa25a 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -354,7 +354,7 @@ combinations. this should be removed later #define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) #define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS2_FTIM3 0x0 #endif diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 9e12fac5b13..0dd15603ed9 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -319,7 +319,7 @@ #define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) #define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS2_FTIM3 0x0 diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index d612a8b9c4f..50529bff04b 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -537,7 +537,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) #define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 8d6c51bb37b..40bfc60cf54 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -286,7 +286,7 @@ #define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) #define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS2_FTIM3 0x0 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 3a1c49c8113..5d10ad25e50 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -283,7 +283,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \ FTIM1_GPCM_TRAD(0x1f)) #define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS2_FTIM3 0x0 diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index a770dd0d3a6..efdb68b7ae3 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -237,7 +237,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) #define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 -- cgit v1.2.3 From b0d97cd2ed8533f98a6c8a12103eddf07ff7bbff Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Mon, 7 Jul 2014 12:17:47 +0800 Subject: powerpc/t1040: update i2c for t1040qds and t104xrdb - Fix base address of I2C2 as 0x118100 instead of 0x119000. - Add definitions for I2C3 & I2C4. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- include/configs/T1040QDS.h | 10 ++++++++-- include/configs/T104xRDB.h | 10 ++++++++-- 2 files changed, 16 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index f2a75aed43b..ebee89a9a12 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -445,11 +445,17 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */ +#define CONFIG_SYS_FSL_I2C2_SPEED 50000 +#define CONFIG_SYS_FSL_I2C3_SPEED 50000 +#define CONFIG_SYS_FSL_I2C4_SPEED 50000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000 +#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100 #define I2C_MUX_PCA_ADDR 0x77 #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 40bfc60cf54..c96f03ce2b2 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -443,11 +443,17 @@ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */ +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 +#define CONFIG_SYS_FSL_I2C3_SPEED 400000 +#define CONFIG_SYS_FSL_I2C4_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_SPEED 400000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000 +#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100 /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 -- cgit v1.2.3 From fb5368789a45ca5ee4396cbbf563a8f16ab24f9c Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Wed, 23 Jul 2014 15:54:16 +0800 Subject: board/freescale: use generic board architecture for t2080qds and t2080rdb Tested with NOR boot and NAND boot on T2080QDS and T2080RDB. Signed-off-by: Shengzhou Liu --- include/configs/T208xQDS.h | 2 ++ include/configs/T208xRDB.h | 2 ++ 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 9b81ff70eb0..784310a1120 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -11,6 +11,8 @@ #ifndef __T208xQDS_H #define __T208xQDS_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #define CONFIG_MMC #define CONFIG_SPI_FLASH diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5d10ad25e50..deeabae329a 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -11,6 +11,8 @@ #ifndef __T2080RDB_H #define __T2080RDB_H +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #define CONFIG_T2080RDB #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #define CONFIG_MMC -- cgit v1.2.3 From d9f923ffcb60be6817cff37c76e21faede8d2819 Mon Sep 17 00:00:00 2001 From: Dirk Eibach Date: Fri, 25 Jul 2014 10:10:24 +0200 Subject: board: Add CONFIG_SYS_GENERIC_BOARD to all gdsys boards Add the generic board infrastructure to all gdsys boards. Signed-off-by: Dirk Eibach Signed-off-by: Stefan Roese --- include/configs/controlcenterd.h | 2 ++ include/configs/dlvision-10g.h | 1 + include/configs/dlvision.h | 1 + include/configs/gdppc440etx.h | 1 + include/configs/intip.h | 1 + include/configs/io.h | 1 + include/configs/io64.h | 1 + include/configs/iocon.h | 1 + include/configs/neo.h | 1 + 9 files changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index ec3145f430c..7eaaf69951b 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -45,6 +45,8 @@ #define CONFIG_CONTROLCENTERD #define CONFIG_MP /* support multiple processors */ +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_SYS_NO_FLASH #define CONFIG_ENABLE_36BIT_PHYS #define CONFIG_FSL_LAW /* Use common FSL init code */ diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 6153a40e061..d9bd564880e 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -24,6 +24,7 @@ #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index 1e86c556abe..af0d60249ac 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -22,6 +22,7 @@ #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ #define CONFIG_MISC_INIT_R /* call misc_init_r */ +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h index 6810b3befc3..12fd75d743e 100644 --- a/include/configs/gdppc440etx.h +++ b/include/configs/gdppc440etx.h @@ -32,6 +32,7 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f*/ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ +#define CONFIG_SYS_GENERIC_BOARD #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ diff --git a/include/configs/intip.h b/include/configs/intip.h index b56b3aa340b..928eb5b9dbd 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -45,6 +45,7 @@ #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_BOARD_TYPES 1 /* support board types */ #define CONFIG_FIT #define CFG_ALT_MEMTEST diff --git a/include/configs/io.h b/include/configs/io.h index 8e32c25803e..d4ae0adfdac 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -24,6 +24,7 @@ #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ diff --git a/include/configs/io64.h b/include/configs/io64.h index 6915b2071c0..2a9ff376ef1 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -43,6 +43,7 @@ #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT +#define CONFIG_SYS_GENERIC_BOARD #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */ #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ diff --git a/include/configs/iocon.h b/include/configs/iocon.h index ae05bcbfbf4..38d473de429 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -23,6 +23,7 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_LAST_STAGE_INIT +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ diff --git a/include/configs/neo.h b/include/configs/neo.h index 4937730ee30..09300ca8ed6 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -25,6 +25,7 @@ #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */ -- cgit v1.2.3 From 0a9064fb47bb0a239c04b0b63edebfdd3a201fdc Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 30 Jul 2014 14:08:13 +0900 Subject: kconfig: import Kconfig files from Linux 3.16-rc7 Import - scripts/kconfig/* - include/linux/kconfig.h from Linux 3.16-rc7. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- include/linux/kconfig.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 include/linux/kconfig.h (limited to 'include') diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h new file mode 100644 index 00000000000..be342b94c64 --- /dev/null +++ b/include/linux/kconfig.h @@ -0,0 +1,46 @@ +#ifndef __LINUX_KCONFIG_H +#define __LINUX_KCONFIG_H + +#include + +/* + * Helper macros to use CONFIG_ options in C/CPP expressions. Note that + * these only work with boolean and tristate options. + */ + +/* + * Getting something that works in C and CPP for an arg that may or may + * not be defined is tricky. Here, if we have "#define CONFIG_BOOGER 1" + * we match on the placeholder define, insert the "0," for arg1 and generate + * the triplet (0, 1, 0). Then the last step cherry picks the 2nd arg (a one). + * When CONFIG_BOOGER is not defined, we generate a (... 1, 0) pair, and when + * the last step cherry picks the 2nd arg, we get a zero. + */ +#define __ARG_PLACEHOLDER_1 0, +#define config_enabled(cfg) _config_enabled(cfg) +#define _config_enabled(value) __config_enabled(__ARG_PLACEHOLDER_##value) +#define __config_enabled(arg1_or_junk) ___config_enabled(arg1_or_junk 1, 0) +#define ___config_enabled(__ignored, val, ...) val + +/* + * IS_ENABLED(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y' or 'm', + * 0 otherwise. + * + */ +#define IS_ENABLED(option) \ + (config_enabled(option) || config_enabled(option##_MODULE)) + +/* + * IS_BUILTIN(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'y', 0 + * otherwise. For boolean options, this is equivalent to + * IS_ENABLED(CONFIG_FOO). + */ +#define IS_BUILTIN(option) config_enabled(option) + +/* + * IS_MODULE(CONFIG_FOO) evaluates to 1 if CONFIG_FOO is set to 'm', 0 + * otherwise. + */ +#define IS_MODULE(option) config_enabled(option##_MODULE) + +#endif /* __LINUX_KCONFIG_H */ -- cgit v1.2.3 From 4ce99570292544746d738b0621f83da1d6ce4ddc Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 30 Jul 2014 14:08:16 +0900 Subject: include: define CONFIG_SPL and CONFIG_TPL as 1 We are about to switch to Kconfig in the next commit. But there are something to get done beforehand. In Kconfig, include/generated/autoconf.h defines boolean CONFIG macros as 1. CONFIG_SPL and CONFIG_TPL, if defined, must be set to 1. Otherwise, when switching to Kconfig, the build log would be sprinkled with warning messages like this: warning: "CONFIG_SPL" redefined [enabled by default] Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- include/configs/B4860QDS.h | 2 +- include/configs/BSC9131RDB.h | 2 +- include/configs/BSC9132QDS.h | 2 +- include/configs/C29XPCIE.h | 4 ++-- include/configs/MPC8313ERDB.h | 2 +- include/configs/P1010RDB.h | 8 ++++---- include/configs/P1022DS.h | 8 ++++---- include/configs/P1_P2_RDB.h | 8 ++++---- include/configs/T104xRDB.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/T4240QDS.h | 2 +- include/configs/a3m071.h | 2 +- include/configs/am335x_igep0033.h | 2 +- include/configs/am3517_crane.h | 2 +- include/configs/am3517_evm.h | 2 +- include/configs/apf27.h | 2 +- include/configs/arndale.h | 2 +- include/configs/bur_am335x_common.h | 2 +- include/configs/cam_enc_4xx.h | 2 +- include/configs/cm_t35.h | 2 +- include/configs/da850evm.h | 2 +- include/configs/devkit8000.h | 2 +- include/configs/exynos5-dt.h | 2 +- include/configs/hawkboard.h | 2 +- include/configs/ipam390.h | 2 +- include/configs/lwmon5.h | 2 +- include/configs/m53evk.h | 2 +- include/configs/mcx.h | 2 +- include/configs/microblaze-generic.h | 2 +- include/configs/mx31pdk.h | 2 +- include/configs/mxs.h | 2 +- include/configs/omap3_evm_common.h | 2 +- include/configs/origen.h | 2 +- include/configs/p1_p2_rdb_pc.h | 8 ++++---- include/configs/palmtreo680.h | 2 +- include/configs/pcm051.h | 2 +- include/configs/sama5d3_xplained.h | 2 +- include/configs/sama5d3xek.h | 2 +- include/configs/siemens-am33x-common.h | 2 +- include/configs/smdkv310.h | 2 +- include/configs/socfpga_cyclone5.h | 2 +- include/configs/sunxi-common.h | 2 +- include/configs/tam3517-common.h | 2 +- include/configs/tao3530.h | 2 +- include/configs/tegra-common.h | 2 +- include/configs/ti814x_evm.h | 2 +- include/configs/ti816x_evm.h | 2 +- include/configs/ti_armv7_common.h | 2 +- include/configs/tricorder.h | 2 +- include/configs/tx25.h | 2 +- include/configs/vpac270.h | 2 +- include/configs/woodburn_sd.h | 2 +- include/configs/x600.h | 2 +- include/configs/zynq-common.h | 2 +- 55 files changed, 68 insertions(+), 68 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 43c9df01bde..e6475ef3e84 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -23,7 +23,7 @@ #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 5a316c83ad1..e6b46e4aa75 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -25,7 +25,7 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 49c16afa25a..37e168872ca 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -41,7 +41,7 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 0dd15603ed9..f170fc70db7 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -24,8 +24,8 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL -#define CONFIG_TPL +#define CONFIG_SPL 1 +#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 69b2cb19705..7f5aa591c4d 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -19,7 +19,7 @@ #define CONFIG_MPC8313ERDB 1 #ifdef CONFIG_NAND -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 50529bff04b..51127c84619 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -21,7 +21,7 @@ #define CONFIG_NAND_FSL_IFC #ifdef CONFIG_SDCARD -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -56,7 +56,7 @@ #define CONFIG_SYS_TEXT_BASE 0x11000000 #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #else -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -88,7 +88,7 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL +#define CONFIG_SPL 1 #ifdef CONFIG_SECURE_BOOT #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT @@ -108,7 +108,7 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #else -#define CONFIG_TPL +#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 959cdf69bbb..5a38efef9cc 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -16,7 +16,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -45,7 +45,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -79,8 +79,8 @@ #define CONFIG_SYS_NAND_MAX_OOBFREE 5 #ifdef CONFIG_NAND -#define CONFIG_SPL -#define CONFIG_TPL +#define CONFIG_SPL 1 +#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 110ba5f325d..dd80ddc1fa1 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -36,7 +36,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -64,7 +64,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -93,8 +93,8 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL -#define CONFIG_TPL +#define CONFIG_SPL 1 +#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index c96f03ce2b2..65fc8b7c6d4 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -22,7 +22,7 @@ #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 784310a1120..cffafabdd9c 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -55,7 +55,7 @@ #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg #endif -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index deeabae329a..55e4177e205 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -44,7 +44,7 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_rcw.cfg -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index efdb68b7ae3..92642d89364 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -25,7 +25,7 @@ #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h index 205adfd8ce2..9f853897193 100644 --- a/include/configs/a3m071.h +++ b/include/configs/a3m071.h @@ -412,7 +412,7 @@ /* * SPL related defines */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NOR_SUPPORT diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep0033.h index c17327fef48..5023f9d606f 100644 --- a/include/configs/am335x_igep0033.h +++ b/include/configs/am335x_igep0033.h @@ -211,7 +211,7 @@ #undef CONFIG_USE_IRQ /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK /* * Place the image at the start of the ROM defined image space. diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index d826214efe0..cd8108bcdd9 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -293,7 +293,7 @@ GENERATED_GBL_DATA_SIZE) /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index a9c5a8f3af3..01c94ac89f8 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -302,7 +302,7 @@ GENERATED_GBL_DATA_SIZE) /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/apf27.h b/include/configs/apf27.h index b10c48c20e3..a97f21393eb 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -37,7 +37,7 @@ /* * SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 370db821a85..c24df44f652 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -121,7 +121,7 @@ /* MMC SPL */ #define CONFIG_EXYNOS_SPL -#define CONFIG_SPL +#define CONFIG_SPL 1 #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 5a37536b0aa..6ec623ec0c3 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -164,7 +164,7 @@ * under common/spl/. Given our generally common memory map, we set a * number of related defaults and sizes here. */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK /* * Place the image at the start of the ROM defined image space. diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index d1a8ff2a82f..759ad2a5c51 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -199,7 +199,7 @@ #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBGENERIC_SUPPORT diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index d8d71a94ee9..29a8eff9a54 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -316,7 +316,7 @@ #define CONFIG_OMAP3_SPI /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index b27940995de..9ec8cad1e12 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -368,7 +368,7 @@ #ifndef CONFIG_DIRECT_NOR_BOOT /* defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index cc53fc9cd78..acd2c6b2467 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -281,7 +281,7 @@ #define CONFIG_SYS_SRAM_SIZE 0x10000 /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h index e36a0313c13..91ad3a325d7 100644 --- a/include/configs/exynos5-dt.h +++ b/include/configs/exynos5-dt.h @@ -136,7 +136,7 @@ #define CONFIG_TPM_TIS_I2C_SLAVE_ADDR 0x20 /* MMC SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 73e16243754..81448839fd6 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -46,7 +46,7 @@ #endif /* Spl */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index fdd5680741b..6ad8822b4ea 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -298,7 +298,7 @@ "-(rootfs)" /* defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 07ddfc40148..22cbdaa64c0 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -665,7 +665,7 @@ * SPL related defines */ #ifdef CONFIG_LCD4_LWMON5 -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NOR_SUPPORT diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index 97196c60310..3818f2fd243 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -252,7 +252,7 @@ /* * NAND SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" #define CONFIG_SPL_BOARD_INIT diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 75abb602cf9..2ba1edd2ba4 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -344,7 +344,7 @@ GENERATED_GBL_DATA_SIZE) /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 06b7e94184e..cb1df6bce17 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -448,7 +448,7 @@ #endif /* SPL part */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_CMD_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index f223788e5ec..85d438fbef2 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -29,7 +29,7 @@ #define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 8bce28fe204..fffcc371d43 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -50,7 +50,7 @@ #define CONFIG_ARCH_MISC_INIT /* SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h index 739d392edc2..9589229b4f9 100644 --- a/include/configs/omap3_evm_common.h +++ b/include/configs/omap3_evm_common.h @@ -257,7 +257,7 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40200800 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ diff --git a/include/configs/origen.h b/include/configs/origen.h index 82583382f7a..b0c6eb12495 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -65,7 +65,7 @@ #undef CONFIG_CMD_NFS /* MMC SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SPL_TEXT_BASE 0x02021410 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 185df775aa0..22f6d126aef 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -148,7 +148,7 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -177,7 +177,7 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -207,8 +207,8 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL -#define CONFIG_TPL +#define CONFIG_SPL 1 +#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/palmtreo680.h b/include/configs/palmtreo680.h index 36626639d37..31e89d9d4cd 100644 --- a/include/configs/palmtreo680.h +++ b/include/configs/palmtreo680.h @@ -205,7 +205,7 @@ /* * SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_TEXT_BASE 0xa1700000 /* IPL loads SPL here */ #define CONFIG_SPL_STACK 0x5c040000 /* end of internal SRAM */ #define CONFIG_SPL_NAND_SUPPORT /* build libnand for spl */ diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 9af3efd4b1a..207a29075b2 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -197,7 +197,7 @@ #define CONFIG_ENV_IS_NOWHERE /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT /* diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index f72ab0bad01..41b041bee47 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -209,7 +209,7 @@ #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) /* SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x10000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index da2718044cf..fe44521a9bf 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -244,7 +244,7 @@ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x10000 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 53816a60257..236bb0c49a0 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -139,7 +139,7 @@ #define CONFIG_SYS_I2C_OMAP24XX /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x402F0400 #define CONFIG_SPL_MAX_SIZE (101 * 1024) diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 34adfaf6085..e9f33cf8eb3 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -76,7 +76,7 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK /* MMC SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SKIP_LOWLEVEL_INIT #define COPY_BL2_FNPTR_ADDR 0x00002488 diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 262e7445f65..5ebf9e4fafb 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -223,7 +223,7 @@ */ /* Enable building of SPL globally */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK /* TEXT_BASE for linking the SPL binary */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 845b004a270..38e882606bf 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -127,7 +127,7 @@ #ifdef CONFIG_SPL_FEL -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" #define CONFIG_SPL_TEXT_BASE 0x2000 diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index aa0ea162d25..b94a6cce170 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -215,7 +215,7 @@ #define CONFIG_NET_RETRY_COUNT 10 /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_CONSOLE diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 9fc31bed6ad..9d4ab212233 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -301,7 +301,7 @@ #define CONGIG_CMD_STORAGE /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 3b88a83c04f..779a1d2f5ad 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -131,7 +131,7 @@ #define CONFIG_CMD_ENTERRCM /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_BOARD_INIT diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index b51400c4640..bd25ec85b86 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -168,7 +168,7 @@ #define CONFIG_ENV_IS_NOWHERE /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40300000 #define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index b8c0d54ab37..ea0c4fda9cb 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -134,7 +134,7 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40400000 #define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 85c027c1d27..ee69d7d3585 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -198,7 +198,7 @@ */ #if !defined(CONFIG_NOR_BOOT) && \ !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX)) -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_OS_BOOT diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 6c2f65305f0..1d48031ed19 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -331,7 +331,7 @@ #define CONFIG_SYS_SRAM_SIZE 0x10000 /* Defines for SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/tx25.h b/include/configs/tx25.h index 5ac6e6441c2..d36208791cb 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -21,7 +21,7 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index c6d47635b38..e53d3c4c37b 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -17,7 +17,7 @@ #define CONFIG_SYS_TEXT_BASE 0xa0000000 #ifdef CONFIG_ONENAND -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_ONENAND_SUPPORT #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000 #define CONFIG_SPL_ONENAND_LOAD_SIZE \ diff --git a/include/configs/woodburn_sd.h b/include/configs/woodburn_sd.h index 437472f3eda..2bf5c10da8e 100644 --- a/include/configs/woodburn_sd.h +++ b/include/configs/woodburn_sd.h @@ -20,7 +20,7 @@ /* * SPL */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm1136/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/x600.h b/include/configs/x600.h index eae85d62c9a..e5bc6b90144 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -274,7 +274,7 @@ /* * SPL related defines */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_SPL_TEXT_BASE 0xd2800b00 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear" #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds" diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 690cacbc94b..f6d924da272 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -257,7 +257,7 @@ #define CONFIG_CMD_TFTPPUT /* SPL part */ -#define CONFIG_SPL +#define CONFIG_SPL 1 #define CONFIG_CMD_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LIBCOMMON_SUPPORT -- cgit v1.2.3 From 51148790f26e42ef1fd4a1a8d056bf0252539525 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 30 Jul 2014 14:08:17 +0900 Subject: kconfig: switch to Kconfig This commit enables Kconfig. Going forward, we use Kconfig for the board configuration. mkconfig will never be used. Nor will include/config.mk be generated. Kconfig must be adjusted for U-Boot because our situation is a little more complicated than Linux Kernel. We have to generate multiple boot images (Normal, SPL, TPL) from one source tree. Each image needs its own configuration input. Usage: Run "make _defconfig" to do the board configuration. It will create the .config file and additionally spl/.config, tpl/.config if SPL, TPL is enabled, respectively. You can use "make config", "make menuconfig" etc. to create a new .config or modify the existing one. Use "make spl/config", "make spl/menuconfig" etc. for spl/.config and do likewise for tpl/.config file. The generic syntax of configuration targets for SPL, TPL is: / Here, is either 'spl' or 'tpl' is 'config', 'menuconfig', 'xconfig', etc. When the configuration is done, run "make". (Or "make _defconfig all" will do the configuration and build in one time.) For futher information of how Kconfig works in U-Boot, please read the comment block of scripts/multiconfig.py. By the way, there is another item worth remarking here: coexistence of Kconfig and board herder files. Prior to Kconfig, we used C headers to define a set of configs. We expect a very long term to migrate from C headers to Kconfig. Two different infractructure must coexist in the interim. In our former configuration scheme, include/autoconf.mk was generated for use in makefiles. It is still generated under include/, spl/include/, tpl/include/ directory for the Normal, SPL, TPL image, respectively. Signed-off-by: Masahiro Yamada Acked-by: Simon Glass --- include/.gitignore | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/.gitignore b/include/.gitignore index bf142fc2f9d..8e41a9511d4 100644 --- a/include/.gitignore +++ b/include/.gitignore @@ -2,4 +2,3 @@ /bmp_logo.h /bmp_logo_data.h /config.h -/config.mk -- cgit v1.2.3 From 90f984e397a14d9b77128feff582a44dece4fbaf Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 30 Jul 2014 14:08:23 +0900 Subject: kconfig: delete redundant CONFIG_${ARCH} definition CONFIG_${ARCH} is defined by Kconfig. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- include/configs/microblaze-generic.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index cb1df6bce17..c8a02ae2fd6 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -12,7 +12,6 @@ #include "../board/xilinx/microblaze-generic/xparameters.h" /* MicroBlaze CPU */ -#define CONFIG_MICROBLAZE 1 #define MICROBLAZE_V5 1 /* Open Firmware DTS */ -- cgit v1.2.3 From 25b4adbba018633b943a99322bfb2fb819c0bafb Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 30 Jul 2014 14:08:25 +0900 Subject: include: remove CONFIG_SPL/CONFIG_TPL definition in config headers Now CONFIG_SPL and CONFIG_TPL are defined in Kconfig. Remove the redundant definition in config headers. Signed-off-by: Masahiro Yamada Reviewed-by: Simon Glass --- include/configs/B4860QDS.h | 1 - include/configs/BSC9131RDB.h | 1 - include/configs/BSC9132QDS.h | 1 - include/configs/C29XPCIE.h | 2 -- include/configs/MPC8313ERDB.h | 1 - include/configs/P1010RDB.h | 4 ---- include/configs/P1022DS.h | 4 ---- include/configs/P1_P2_RDB.h | 4 ---- include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240QDS.h | 1 - include/configs/a3m071.h | 1 - include/configs/am335x_igep0033.h | 1 - include/configs/am3517_crane.h | 1 - include/configs/am3517_evm.h | 1 - include/configs/apf27.h | 1 - include/configs/arndale.h | 1 - include/configs/bur_am335x_common.h | 1 - include/configs/cam_enc_4xx.h | 1 - include/configs/cm_t35.h | 1 - include/configs/da850evm.h | 1 - include/configs/devkit8000.h | 1 - include/configs/exynos5-dt.h | 1 - include/configs/hawkboard.h | 1 - include/configs/ipam390.h | 1 - include/configs/lwmon5.h | 1 - include/configs/m53evk.h | 1 - include/configs/mcx.h | 1 - include/configs/microblaze-generic.h | 1 - include/configs/mx31pdk.h | 1 - include/configs/mxs.h | 1 - include/configs/omap3_evm_common.h | 1 - include/configs/omap3_zoom1.h | 1 - include/configs/origen.h | 1 - include/configs/p1_p2_rdb_pc.h | 4 ---- include/configs/palmtreo680.h | 1 - include/configs/pcm051.h | 1 - include/configs/sama5d3_xplained.h | 1 - include/configs/sama5d3xek.h | 1 - include/configs/siemens-am33x-common.h | 1 - include/configs/smdkv310.h | 1 - include/configs/socfpga_cyclone5.h | 1 - include/configs/sunxi-common.h | 1 - include/configs/tam3517-common.h | 1 - include/configs/tao3530.h | 1 - include/configs/tegra-common.h | 1 - include/configs/ti814x_evm.h | 1 - include/configs/ti816x_evm.h | 1 - include/configs/ti_armv7_common.h | 1 - include/configs/tricorder.h | 1 - include/configs/tx25.h | 1 - include/configs/vpac270.h | 1 - include/configs/woodburn_sd.h | 1 - include/configs/x600.h | 1 - include/configs/zynq-common.h | 1 - 56 files changed, 69 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index e6475ef3e84..953d06b53c4 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -23,7 +23,6 @@ #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index e6b46e4aa75..56a3e948685 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -25,7 +25,6 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL 1 #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 37e168872ca..aeded6d85b4 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -41,7 +41,6 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL 1 #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index f170fc70db7..715616d5445 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -24,8 +24,6 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL 1 -#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 7f5aa591c4d..dd8122965ad 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -19,7 +19,6 @@ #define CONFIG_MPC8313ERDB 1 #ifdef CONFIG_NAND -#define CONFIG_SPL 1 #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 51127c84619..a373990e5d0 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -21,7 +21,6 @@ #define CONFIG_NAND_FSL_IFC #ifdef CONFIG_SDCARD -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -56,7 +55,6 @@ #define CONFIG_SYS_TEXT_BASE 0x11000000 #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #else -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #define CONFIG_SPL_ENV_SUPPORT @@ -88,7 +86,6 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL 1 #ifdef CONFIG_SECURE_BOOT #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT @@ -108,7 +105,6 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" #else -#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 5a38efef9cc..54e2569ac8b 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -16,7 +16,6 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -45,7 +44,6 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -79,8 +77,6 @@ #define CONFIG_SYS_NAND_MAX_OOBFREE 5 #ifdef CONFIG_NAND -#define CONFIG_SPL 1 -#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index dd80ddc1fa1..c75638abdaf 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -36,7 +36,6 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -64,7 +63,6 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -93,8 +91,6 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL 1 -#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 65fc8b7c6d4..c4bf0d68f4d 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index cffafabdd9c..395472be2bc 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -55,7 +55,6 @@ #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg #endif -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 55e4177e205..e5936c78176 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg #define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xrdb/t2080_rcw.cfg -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 92642d89364..ca9724720d9 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -25,7 +25,6 @@ #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h index 9f853897193..a4050f34cc0 100644 --- a/include/configs/a3m071.h +++ b/include/configs/a3m071.h @@ -412,7 +412,6 @@ /* * SPL related defines */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NOR_SUPPORT diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep0033.h index 5023f9d606f..dcded0acbe0 100644 --- a/include/configs/am335x_igep0033.h +++ b/include/configs/am335x_igep0033.h @@ -211,7 +211,6 @@ #undef CONFIG_USE_IRQ /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK /* * Place the image at the start of the ROM defined image space. diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index cd8108bcdd9..898ed2ee185 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -293,7 +293,6 @@ GENERATED_GBL_DATA_SIZE) /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 01c94ac89f8..1e2d55bec57 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -302,7 +302,6 @@ GENERATED_GBL_DATA_SIZE) /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/apf27.h b/include/configs/apf27.h index a97f21393eb..4424c304419 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -37,7 +37,6 @@ /* * SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 diff --git a/include/configs/arndale.h b/include/configs/arndale.h index c24df44f652..64b54ab22b0 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -121,7 +121,6 @@ /* MMC SPL */ #define CONFIG_EXYNOS_SPL -#define CONFIG_SPL 1 #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 6ec623ec0c3..3f889f8d4f4 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -164,7 +164,6 @@ * under common/spl/. Given our generally common memory map, we set a * number of related defaults and sizes here. */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK /* * Place the image at the start of the ROM defined image space. diff --git a/include/configs/cam_enc_4xx.h b/include/configs/cam_enc_4xx.h index 759ad2a5c51..5f30279fe66 100644 --- a/include/configs/cam_enc_4xx.h +++ b/include/configs/cam_enc_4xx.h @@ -199,7 +199,6 @@ #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_LIBGENERIC_SUPPORT diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 29a8eff9a54..c63608c189f 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -316,7 +316,6 @@ #define CONFIG_OMAP3_SPI /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 9ec8cad1e12..1252d7a54a9 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -368,7 +368,6 @@ #ifndef CONFIG_DIRECT_NOR_BOOT /* defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index acd2c6b2467..69c51bc4c30 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -281,7 +281,6 @@ #define CONFIG_SYS_SRAM_SIZE 0x10000 /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h index 91ad3a325d7..a7c62928631 100644 --- a/include/configs/exynos5-dt.h +++ b/include/configs/exynos5-dt.h @@ -136,7 +136,6 @@ #define CONFIG_TPM_TIS_I2C_SLAVE_ADDR 0x20 /* MMC SPL */ -#define CONFIG_SPL 1 #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 81448839fd6..8188c7b7882 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -46,7 +46,6 @@ #endif /* Spl */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SUPPORT diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index 6ad8822b4ea..98e819bb189 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -298,7 +298,6 @@ "-(rootfs)" /* defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 22cbdaa64c0..58e72956908 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -665,7 +665,6 @@ * SPL related defines */ #ifdef CONFIG_LCD4_LWMON5 -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NOR_SUPPORT diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h index 3818f2fd243..6e5200db407 100644 --- a/include/configs/m53evk.h +++ b/include/configs/m53evk.h @@ -252,7 +252,6 @@ /* * NAND SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" #define CONFIG_SPL_BOARD_INIT diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 2ba1edd2ba4..dff895a9651 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -344,7 +344,6 @@ GENERATED_GBL_DATA_SIZE) /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index c8a02ae2fd6..1a82a57c755 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -447,7 +447,6 @@ #endif /* SPL part */ -#define CONFIG_SPL 1 #define CONFIG_CMD_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 85d438fbef2..f796a414d50 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -29,7 +29,6 @@ #define CONFIG_MACH_TYPE MACH_TYPE_MX31_3DS -#define CONFIG_SPL 1 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index fffcc371d43..5f4e48ecbb6 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -50,7 +50,6 @@ #define CONFIG_ARCH_MISC_INIT /* SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h index 9589229b4f9..eef4230e64c 100644 --- a/include/configs/omap3_evm_common.h +++ b/include/configs/omap3_evm_common.h @@ -257,7 +257,6 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40200800 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 93f4d627a14..c5d742c2bd8 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -26,7 +26,6 @@ #include /* Remove SPL boot option - we do not support that on LDP yet */ -#undef CONFIG_SPL #undef CONFIG_SPL_FRAMEWORK #undef CONFIG_SPL_OS_BOOT diff --git a/include/configs/origen.h b/include/configs/origen.h index b0c6eb12495..5d24916389c 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -65,7 +65,6 @@ #undef CONFIG_CMD_NFS /* MMC SPL */ -#define CONFIG_SPL 1 #define COPY_BL2_FNPTR_ADDR 0x02020030 #define CONFIG_SPL_TEXT_BASE 0x02021410 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 22f6d126aef..9b5895093da 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -148,7 +148,6 @@ #endif #ifdef CONFIG_SDCARD -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -177,7 +176,6 @@ #endif #ifdef CONFIG_SPIFLASH -#define CONFIG_SPL 1 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT @@ -207,8 +205,6 @@ #endif #ifdef CONFIG_NAND -#define CONFIG_SPL 1 -#define CONFIG_TPL 1 #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE diff --git a/include/configs/palmtreo680.h b/include/configs/palmtreo680.h index 31e89d9d4cd..6490be55045 100644 --- a/include/configs/palmtreo680.h +++ b/include/configs/palmtreo680.h @@ -205,7 +205,6 @@ /* * SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_TEXT_BASE 0xa1700000 /* IPL loads SPL here */ #define CONFIG_SPL_STACK 0x5c040000 /* end of internal SRAM */ #define CONFIG_SPL_NAND_SUPPORT /* build libnand for spl */ diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 207a29075b2..dcf5537687b 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -197,7 +197,6 @@ #define CONFIG_ENV_IS_NOWHERE /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT /* diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 41b041bee47..0dfb7e7918d 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -209,7 +209,6 @@ #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) /* SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x10000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index fe44521a9bf..56c2454dff2 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -244,7 +244,6 @@ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x10000 diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 236bb0c49a0..b8fb77e8137 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -139,7 +139,6 @@ #define CONFIG_SYS_I2C_OMAP24XX /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x402F0400 #define CONFIG_SPL_MAX_SIZE (101 * 1024) diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index e9f33cf8eb3..048c1786923 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -76,7 +76,6 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK /* MMC SPL */ -#define CONFIG_SPL 1 #define CONFIG_SKIP_LOWLEVEL_INIT #define COPY_BL2_FNPTR_ADDR 0x00002488 diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h index 5ebf9e4fafb..27c2be90983 100644 --- a/include/configs/socfpga_cyclone5.h +++ b/include/configs/socfpga_cyclone5.h @@ -223,7 +223,6 @@ */ /* Enable building of SPL globally */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK /* TEXT_BASE for linking the SPL binary */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 38e882606bf..8ab6429e482 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -127,7 +127,6 @@ #ifdef CONFIG_SPL_FEL -#define CONFIG_SPL 1 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl-fel.lds" #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7/sunxi" #define CONFIG_SPL_TEXT_BASE 0x2000 diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index b94a6cce170..e1fc75476f6 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -215,7 +215,6 @@ #define CONFIG_NET_RETRY_COUNT 10 /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_CONSOLE diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 9d4ab212233..174bfe50a9d 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -301,7 +301,6 @@ #define CONGIG_CMD_STORAGE /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 779a1d2f5ad..717cd61bd69 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -131,7 +131,6 @@ #define CONFIG_CMD_ENTERRCM /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_RAM_DEVICE #define CONFIG_SPL_BOARD_INIT diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index bd25ec85b86..a55bde23683 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -168,7 +168,6 @@ #define CONFIG_ENV_IS_NOWHERE /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40300000 #define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index ea0c4fda9cb..e86c36443ba 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -134,7 +134,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40400000 #define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index ee69d7d3585..26ac2518d96 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -198,7 +198,6 @@ */ #if !defined(CONFIG_NOR_BOOT) && \ !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX)) -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_OS_BOOT diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 1d48031ed19..cc0d172115f 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -331,7 +331,6 @@ #define CONFIG_SYS_SRAM_SIZE 0x10000 /* Defines for SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_NAND_SIMPLE diff --git a/include/configs/tx25.h b/include/configs/tx25.h index d36208791cb..118f5bae726 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 kB for U-Boot */ -#define CONFIG_SPL 1 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index e53d3c4c37b..2fb91a8f8c1 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_TEXT_BASE 0xa0000000 #ifdef CONFIG_ONENAND -#define CONFIG_SPL 1 #define CONFIG_SPL_ONENAND_SUPPORT #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000 #define CONFIG_SPL_ONENAND_LOAD_SIZE \ diff --git a/include/configs/woodburn_sd.h b/include/configs/woodburn_sd.h index 2bf5c10da8e..25bfeef0367 100644 --- a/include/configs/woodburn_sd.h +++ b/include/configs/woodburn_sd.h @@ -20,7 +20,6 @@ /* * SPL */ -#define CONFIG_SPL 1 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm1136/u-boot-spl.lds" #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/x600.h b/include/configs/x600.h index e5bc6b90144..71373e98f95 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -274,7 +274,6 @@ /* * SPL related defines */ -#define CONFIG_SPL 1 #define CONFIG_SPL_TEXT_BASE 0xd2800b00 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear" #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds" diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index f6d924da272..d57e9d5bbe8 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -257,7 +257,6 @@ #define CONFIG_CMD_TFTPPUT /* SPL part */ -#define CONFIG_SPL 1 #define CONFIG_CMD_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_LIBCOMMON_SUPPORT -- cgit v1.2.3 From a6e50a88d8d3724fc75f1c6959b80a6c7c69cbad Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Fri, 18 Jul 2014 20:38:41 +0100 Subject: ahci: provide sunxi SATA driver using AHCI platform framework This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done for sun7i only since I don't have access to any other sunxi platforms with sata included. The PHY setup is derived from the Alwinner releases and Linux, but is mostly undocumented. The Allwinner AHCI controller also requires some magic (and, again, undocumented) DMA initialisation when starting a port. This is added under a suitable ifdef. This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on contents of Linux DTS files, including SATA power pin config taken from the DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only. Signed-off-by: Ian Campbell Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- include/ahci.h | 4 ++++ include/configs/sunxi-common.h | 12 ++++++++++++ 2 files changed, 16 insertions(+) (limited to 'include') diff --git a/include/ahci.h b/include/ahci.h index 90e850929b7..35b8a8c09b1 100644 --- a/include/ahci.h +++ b/include/ahci.h @@ -58,6 +58,10 @@ #define PORT_SCR_ERR 0x30 /* SATA phy register: SError */ #define PORT_SCR_ACT 0x34 /* SATA phy register: SActive */ +#ifdef CONFIG_SUNXI_AHCI +#define PORT_P0DMACR 0x70 /* SUNXI specific "DMA register" */ +#endif + /* PORT_IRQ_{STAT,MASK} bits */ #define PORT_IRQ_COLD_PRES (1 << 31) /* cold presence detect */ #define PORT_IRQ_TF_ERR (1 << 30) /* task file error */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 8ab6429e482..1505510cda8 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -57,6 +57,18 @@ #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ +#ifdef CONFIG_AHCI +#define CONFIG_LIBATA +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SUNXI_AHCI +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) +#define CONFIG_CMD_SCSI +#endif + #define CONFIG_CMD_MEMORY #define CONFIG_CMD_SETEXPR -- cgit v1.2.3 From 3584f30ce95a3758c21b90cc07bc791d4656bf8a Mon Sep 17 00:00:00 2001 From: Roman Byshko Date: Thu, 24 Jul 2014 22:54:22 +0200 Subject: sunxi: add general USB settings General configuration settings to be set if CONFIG_USB_EHCI is enabled for an Allwinner aka sunxi SoC. Signed-off-by: Roman Byshko Acked-by: Ian Campbell Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- include/configs/sunxi-common.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 1505510cda8..6a3044f9ce3 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -215,6 +215,12 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #endif +#ifdef CONFIG_USB_EHCI +#define CONFIG_CMD_USB +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 +#define CONFIG_USB_STORAGE +#endif + #if !defined CONFIG_ENV_IS_IN_MMC && \ !defined CONFIG_ENV_IS_IN_NAND && \ !defined CONFIG_ENV_IS_IN_FAT && \ -- cgit v1.2.3 From 263b012c255f37171936ba8a45d570568631f9a1 Mon Sep 17 00:00:00 2001 From: Roman Byshko Date: Thu, 24 Jul 2014 22:54:23 +0200 Subject: sun7i: add USB EHCI settings Specific USB EHCI settings to be set for sun7i if CONFIG_USB_EHCI is enabled. Signed-off-by: Roman Byshko Acked-by: Ian Campbell [hdegoede@redhat.com: Use SUNXI_GPH macro for SUNXI_USB_VBUS#_GPIO] [hdegoede@redhat.com: Add #ifndef SUNXI_USB_VBUS#_GPIO to allow override of the default pins from boards.cfg] Signed-off-by: Hans de Goede --- include/configs/sun7i.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index d9be1046b0c..b5992d2191f 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -17,6 +17,18 @@ #define CONFIG_SYS_PROMPT "sun7i# " +#ifdef CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_SUNXI + +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#ifndef CONFIG_SUNXI_USB_VBUS0_GPIO +#define CONFIG_SUNXI_USB_VBUS0_GPIO SUNXI_GPH(6) +#endif +#ifndef CONFIG_SUNXI_USB_VBUS1_GPIO +#define CONFIG_SUNXI_USB_VBUS1_GPIO SUNXI_GPH(3) +#endif +#endif + /* * Include common sunxi configuration where most the settings are */ -- cgit v1.2.3 From 906f609681bdf8341fbf313ee2455a4f56906f08 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 26 Jul 2014 19:08:11 +0200 Subject: sun4i: add USB EHCI settings Specific USB EHCI settings to be set for sun4i if CONFIG_USB_EHCI is enabled. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- include/configs/sun4i.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h index 037f9952f8f..5611ecc85f2 100644 --- a/include/configs/sun4i.h +++ b/include/configs/sun4i.h @@ -16,6 +16,18 @@ #define CONFIG_SYS_PROMPT "sun4i# " +#ifdef CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_SUNXI + +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#ifndef CONFIG_SUNXI_USB_VBUS0_GPIO +#define CONFIG_SUNXI_USB_VBUS0_GPIO SUNXI_GPH(6) +#endif +#ifndef CONFIG_SUNXI_USB_VBUS1_GPIO +#define CONFIG_SUNXI_USB_VBUS1_GPIO SUNXI_GPH(3) +#endif +#endif + /* * Include common sunxi configuration where most the settings are */ -- cgit v1.2.3 From 2111484e1ff64289542714d8228e894290ef0050 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sat, 26 Jul 2014 19:13:47 +0200 Subject: sun5i: add USB EHCI settings Specific USB EHCI settings to be set for sun5i if CONFIG_USB_EHCI is enabled. Note we don't specify default VBUS gpio pins for sun5i since they vary too much from board to board. Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- include/configs/sun5i.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h index c6138b7cd4f..6066371a17d 100644 --- a/include/configs/sun5i.h +++ b/include/configs/sun5i.h @@ -16,6 +16,11 @@ #define CONFIG_SYS_PROMPT "sun5i# " +#ifdef CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_SUNXI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#endif + /* * Include common sunxi configuration where most the settings are */ -- cgit v1.2.3 From d5db7024aafc5ea603f3a34f83bb29a1eaa3cbe7 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Fri, 18 Jul 2014 21:06:38 +0100 Subject: sunxi: HYP/non-sec: add sun7i PSCI backend So far, only supporting the CPU_ON method. Other functions can be added later. Signed-off-by: Marc Zyngier Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- include/configs/sun7i.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index b5992d2191f..2a6a9e82dd8 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -29,6 +29,12 @@ #endif #endif +#define CONFIG_ARMV7_VIRT 1 +#define CONFIG_ARMV7_NONSEC 1 +#define CONFIG_ARMV7_PSCI 1 +#define CONFIG_ARMV7_PSCI_NR_CPUS 2 +#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE + /* * Include common sunxi configuration where most the settings are */ -- cgit v1.2.3 From cb4ccf2f21468aabd877495cff22c2117c98f8c6 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Fri, 18 Jul 2014 21:06:39 +0100 Subject: sunxi: HYP/non-sec: configure CNTFRQ on all CPUs CNTFRQ needs to be properly configured on all CPUs. Otherwise, virtual machines hoping to find valuable information on secondary CPUs will be disapointed... Signed-off-by: Marc Zyngier Acked-by: Hans de Goede Signed-off-by: Hans de Goede --- include/configs/sun7i.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 2a6a9e82dd8..a902b845744 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -34,6 +34,7 @@ #define CONFIG_ARMV7_PSCI 1 #define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE +#define CONFIG_SYS_CLK_FREQ 24000000 /* * Include common sunxi configuration where most the settings are -- cgit v1.2.3 From 3fe3b4fb1c5adb00502276312696e38e9a7e9b5b Mon Sep 17 00:00:00 2001 From: DrEagle Date: Fri, 25 Jul 2014 21:07:30 +0200 Subject: ARM: kirkwood: add mvsdio driver This patch add Marvell kirkwood MVSDIO/MMC driver and enable it for Sheevaplugs and OpenRD boards. Signed-off-by: Gerald Kerma Reviewed-by: Stefan Roese Acked-by: Pantelis Antoniou --- include/configs/openrd.h | 8 ++ include/configs/sheevaplug.h | 11 ++ include/mvebu_mmc.h | 278 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 297 insertions(+) create mode 100644 include/mvebu_mmc.h (limited to 'include') diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 8fab6e63e3b..3eb408f004b 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -49,6 +49,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_MII +#define CONFIG_CMD_MMC #define CONFIG_CMD_NAND #define CONFIG_CMD_PING #define CONFIG_CMD_USB @@ -123,4 +124,11 @@ #define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET #endif /*CONFIG_MVSATA_IDE*/ +#ifdef CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_MVEBU_MMC +#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE +#endif /* CONFIG_CMD_MMC */ + #endif /* _CONFIG_OPENRD_BASE_H */ diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index ecc93bc539d..3d6ff09cb01 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -31,6 +31,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV #define CONFIG_CMD_MII +#define CONFIG_CMD_MMC #define CONFIG_CMD_NAND #define CONFIG_CMD_PING #define CONFIG_CMD_USB @@ -81,6 +82,16 @@ #define CONFIG_PHY_BASE_ADR 0 #endif /* CONFIG_CMD_NET */ +/* + * SDIO/MMC Card Configuration + */ +#ifdef CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_MVEBU_MMC +#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE +#endif /* CONFIG_CMD_MMC */ + /* * File system */ diff --git a/include/mvebu_mmc.h b/include/mvebu_mmc.h new file mode 100644 index 00000000000..28d98fe148a --- /dev/null +++ b/include/mvebu_mmc.h @@ -0,0 +1,278 @@ +/* + * Marvell MMC/SD/SDIO driver + * + * (C) Copyright 2012 + * Marvell Semiconductor + * Written-by: Maen Suleiman, Gerald Kerma + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MVEBU_MMC_H__ +#define __MVEBU_MMC_H__ + +/* needed for the mmc_cfg definition */ +#include + +#define MMC_BLOCK_SIZE 512 + +/* + * Clock rates + */ + +#define MVEBU_MMC_CLOCKRATE_MAX 50000000 +#define MVEBU_MMC_BASE_DIV_MAX 0x7ff +#define MVEBU_MMC_BASE_FAST_CLOCK CONFIG_SYS_TCLK +#define MVEBU_MMC_BASE_FAST_CLK_100 100000000 +#define MVEBU_MMC_BASE_FAST_CLK_200 200000000 + +/* SDIO register */ +#define SDIO_SYS_ADDR_LOW 0x000 +#define SDIO_SYS_ADDR_HI 0x004 +#define SDIO_BLK_SIZE 0x008 +#define SDIO_BLK_COUNT 0x00c +#define SDIO_ARG_LOW 0x010 +#define SDIO_ARG_HI 0x014 +#define SDIO_XFER_MODE 0x018 +#define SDIO_CMD 0x01c +#define SDIO_RSP(i) (0x020 + ((i)<<2)) +#define SDIO_RSP0 0x020 +#define SDIO_RSP1 0x024 +#define SDIO_RSP2 0x028 +#define SDIO_RSP3 0x02c +#define SDIO_RSP4 0x030 +#define SDIO_RSP5 0x034 +#define SDIO_RSP6 0x038 +#define SDIO_RSP7 0x03c +#define SDIO_BUF_DATA_PORT 0x040 +#define SDIO_RSVED 0x044 +#define SDIO_HW_STATE 0x048 +#define SDIO_PRESENT_STATE0 0x048 +#define SDIO_PRESENT_STATE1 0x04c +#define SDIO_HOST_CTRL 0x050 +#define SDIO_BLK_GAP_CTRL 0x054 +#define SDIO_CLK_CTRL 0x058 +#define SDIO_SW_RESET 0x05c +#define SDIO_NOR_INTR_STATUS 0x060 +#define SDIO_ERR_INTR_STATUS 0x064 +#define SDIO_NOR_STATUS_EN 0x068 +#define SDIO_ERR_STATUS_EN 0x06c +#define SDIO_NOR_INTR_EN 0x070 +#define SDIO_ERR_INTR_EN 0x074 +#define SDIO_AUTOCMD12_ERR_STATUS 0x078 +#define SDIO_CURR_BYTE_LEFT 0x07c +#define SDIO_CURR_BLK_LEFT 0x080 +#define SDIO_AUTOCMD12_ARG_LOW 0x084 +#define SDIO_AUTOCMD12_ARG_HI 0x088 +#define SDIO_AUTOCMD12_INDEX 0x08c +#define SDIO_AUTO_RSP(i) (0x090 + ((i)<<2)) +#define SDIO_AUTO_RSP0 0x090 +#define SDIO_AUTO_RSP1 0x094 +#define SDIO_AUTO_RSP2 0x098 +#define SDIO_CLK_DIV 0x128 + +#define WINDOW_CTRL(i) (0x108 + ((i) << 3)) +#define WINDOW_BASE(i) (0x10c + ((i) << 3)) + +/* SDIO_PRESENT_STATE */ +#define CARD_BUSY (1 << 1) +#define CMD_INHIBIT (1 << 0) +#define CMD_TXACTIVE (1 << 8) +#define CMD_RXACTIVE (1 << 9) +#define CMD_AUTOCMD12ACTIVE (1 << 14) +#define CMD_BUS_BUSY (CMD_AUTOCMD12ACTIVE | \ + CMD_RXACTIVE | \ + CMD_TXACTIVE | \ + CMD_INHIBIT | \ + CARD_BUSY) + +/* + * SDIO_CMD + */ + +#define SDIO_CMD_RSP_NONE (0 << 0) +#define SDIO_CMD_RSP_136 (1 << 0) +#define SDIO_CMD_RSP_48 (2 << 0) +#define SDIO_CMD_RSP_48BUSY (3 << 0) + +#define SDIO_CMD_CHECK_DATACRC16 (1 << 2) +#define SDIO_CMD_CHECK_CMDCRC (1 << 3) +#define SDIO_CMD_INDX_CHECK (1 << 4) +#define SDIO_CMD_DATA_PRESENT (1 << 5) +#define SDIO_UNEXPECTED_RESP (1 << 7) + +#define SDIO_CMD_INDEX(x) ((x) << 8) + +/* + * SDIO_XFER_MODE + */ + +#define SDIO_XFER_MODE_STOP_CLK (1 << 5) +#define SDIO_XFER_MODE_HW_WR_DATA_EN (1 << 1) +#define SDIO_XFER_MODE_AUTO_CMD12 (1 << 2) +#define SDIO_XFER_MODE_INT_CHK_EN (1 << 3) +#define SDIO_XFER_MODE_TO_HOST (1 << 4) +#define SDIO_XFER_MODE_DMA (0 << 6) + +/* + * SDIO_HOST_CTRL + */ + +#define SDIO_HOST_CTRL_PUSH_PULL_EN (1 << 0) + +#define SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY (0 << 1) +#define SDIO_HOST_CTRL_CARD_TYPE_IO_ONLY (1 << 1) +#define SDIO_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO (2 << 1) +#define SDIO_HOST_CTRL_CARD_TYPE_IO_MMC (3 << 1) +#define SDIO_HOST_CTRL_CARD_TYPE_MASK (3 << 1) + +#define SDIO_HOST_CTRL_BIG_ENDIAN (1 << 3) +#define SDIO_HOST_CTRL_LSB_FIRST (1 << 4) +#define SDIO_HOST_CTRL_DATA_WIDTH_1_BIT (0 << 9) +#define SDIO_HOST_CTRL_DATA_WIDTH_4_BITS (1 << 9) +#define SDIO_HOST_CTRL_HI_SPEED_EN (1 << 10) + +#define SDIO_HOST_CTRL_TMOUT_MAX 0xf +#define SDIO_HOST_CTRL_TMOUT_MASK (0xf << 11) +#define SDIO_HOST_CTRL_TMOUT(x) ((x) << 11) +#define SDIO_HOST_CTRL_TMOUT_EN (1 << 15) + +/* + * SDIO_SW_RESET + */ + +#define SDIO_SW_RESET_NOW (1 << 8) + +/* + * Normal interrupt status bits + */ + +#define SDIO_NOR_ERROR (1 << 15) +#define SDIO_NOR_UNEXP_RSP (1 << 14) +#define SDIO_NOR_AUTOCMD12_DONE (1 << 13) +#define SDIO_NOR_SUSPEND_ON (1 << 12) +#define SDIO_NOR_LMB_FF_8W_AVAIL (1 << 11) +#define SDIO_NOR_LMB_FF_8W_FILLED (1 << 10) +#define SDIO_NOR_READ_WAIT_ON (1 << 9) +#define SDIO_NOR_CARD_INT (1 << 8) +#define SDIO_NOR_READ_READY (1 << 5) +#define SDIO_NOR_WRITE_READY (1 << 4) +#define SDIO_NOR_DMA_INI (1 << 3) +#define SDIO_NOR_BLK_GAP_EVT (1 << 2) +#define SDIO_NOR_XFER_DONE (1 << 1) +#define SDIO_NOR_CMD_DONE (1 << 0) + +/* + * Error status bits + */ + +#define SDIO_ERR_CRC_STATUS (1 << 14) +#define SDIO_ERR_CRC_STARTBIT (1 << 13) +#define SDIO_ERR_CRC_ENDBIT (1 << 12) +#define SDIO_ERR_RESP_TBIT (1 << 11) +#define SDIO_ERR_XFER_SIZE (1 << 10) +#define SDIO_ERR_CMD_STARTBIT (1 << 9) +#define SDIO_ERR_AUTOCMD12 (1 << 8) +#define SDIO_ERR_DATA_ENDBIT (1 << 6) +#define SDIO_ERR_DATA_CRC (1 << 5) +#define SDIO_ERR_DATA_TIMEOUT (1 << 4) +#define SDIO_ERR_CMD_INDEX (1 << 3) +#define SDIO_ERR_CMD_ENDBIT (1 << 2) +#define SDIO_ERR_CMD_CRC (1 << 1) +#define SDIO_ERR_CMD_TIMEOUT (1 << 0) +/* enable all for polling */ +#define SDIO_POLL_MASK 0xffff + +/* + * CMD12 error status bits + */ + +#define SDIO_AUTOCMD12_ERR_NOTEXE (1 << 0) +#define SDIO_AUTOCMD12_ERR_TIMEOUT (1 << 1) +#define SDIO_AUTOCMD12_ERR_CRC (1 << 2) +#define SDIO_AUTOCMD12_ERR_ENDBIT (1 << 3) +#define SDIO_AUTOCMD12_ERR_INDEX (1 << 4) +#define SDIO_AUTOCMD12_ERR_RESP_T_BIT (1 << 5) +#define SDIO_AUTOCMD12_ERR_RESP_STARTBIT (1 << 6) + +#define MMC_RSP_PRESENT (1 << 0) +/* 136 bit response */ +#define MMC_RSP_136 (1 << 1) +/* expect valid crc */ +#define MMC_RSP_CRC (1 << 2) +/* card may send busy */ +#define MMC_RSP_BUSY (1 << 3) +/* response contains opcode */ +#define MMC_RSP_OPCODE (1 << 4) + +#define MMC_BUSMODE_OPENDRAIN 1 +#define MMC_BUSMODE_PUSHPULL 2 + +#define MMC_BUS_WIDTH_1 0 +#define MMC_BUS_WIDTH_4 2 +#define MMC_BUS_WIDTH_8 3 + +/* Can the host do 4 bit transfers */ +#define MMC_CAP_4_BIT_DATA (1 << 0) +/* Can do MMC high-speed timing */ +#define MMC_CAP_MMC_HIGHSPEED (1 << 1) +/* Can do SD high-speed timing */ +#define MMC_CAP_SD_HIGHSPEED (1 << 2) +/* Can signal pending SDIO IRQs */ +#define MMC_CAP_SDIO_IRQ (1 << 3) +/* Talks only SPI protocols */ +#define MMC_CAP_SPI (1 << 4) +/* Needs polling for card-detection */ +#define MMC_CAP_NEEDS_POLL (1 << 5) +/* Can the host do 8 bit transfers */ +#define MMC_CAP_8_BIT_DATA (1 << 6) + +/* Nonremovable e.g. eMMC */ +#define MMC_CAP_NONREMOVABLE (1 << 8) +/* Waits while card is busy */ +#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) +/* Allow erase/trim commands */ +#define MMC_CAP_ERASE (1 << 10) +/* can support DDR mode at 1.8V */ +#define MMC_CAP_1_8V_DDR (1 << 11) +/* can support DDR mode at 1.2V */ +#define MMC_CAP_1_2V_DDR (1 << 12) +/* Can power off after boot */ +#define MMC_CAP_POWER_OFF_CARD (1 << 13) +/* CMD14/CMD19 bus width ok */ +#define MMC_CAP_BUS_WIDTH_TEST (1 << 14) +/* Host supports UHS SDR12 mode */ +#define MMC_CAP_UHS_SDR12 (1 << 15) +/* Host supports UHS SDR25 mode */ +#define MMC_CAP_UHS_SDR25 (1 << 16) +/* Host supports UHS SDR50 mode */ +#define MMC_CAP_UHS_SDR50 (1 << 17) +/* Host supports UHS SDR104 mode */ +#define MMC_CAP_UHS_SDR104 (1 << 18) +/* Host supports UHS DDR50 mode */ +#define MMC_CAP_UHS_DDR50 (1 << 19) +/* Host supports Driver Type A */ +#define MMC_CAP_DRIVER_TYPE_A (1 << 23) +/* Host supports Driver Type C */ +#define MMC_CAP_DRIVER_TYPE_C (1 << 24) +/* Host supports Driver Type D */ +#define MMC_CAP_DRIVER_TYPE_D (1 << 25) +/* CMD23 supported. */ +#define MMC_CAP_CMD23 (1 << 30) +/* Hardware reset */ +#define MMC_CAP_HW_RESET (1 << 31) + +struct mvebu_mmc_cfg { + u32 mvebu_mmc_base; + u32 mvebu_mmc_clk; + u8 max_bus_width; + struct mmc_config cfg; +}; + +/* + * Functions prototypes + */ + +int mvebu_mmc_init(bd_t *bis); + +#endif /* __MVEBU_MMC_H__ */ -- cgit v1.2.3 From cd60ebd430ab0aa5e2ed6afeb28c1ed4b2d01388 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Thu, 31 Jul 2014 14:39:30 +0800 Subject: MMC: atmel_mci: refactor setting the mode register The mode register is different between MCI IP version. So, according to MCI IP version to set the mode register. Signed-off-by: Bo Shen Acked-by: Pantelis Antoniou --- include/atmel_mci.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/atmel_mci.h b/include/atmel_mci.h index 090574d8c29..3d2870fc9cb 100644 --- a/include/atmel_mci.h +++ b/include/atmel_mci.h @@ -67,6 +67,10 @@ typedef struct atmel_mci { #define MMCI_PDCPADV_SIZE 1 #define MMCI_PDCMODE_OFFSET 15 #define MMCI_PDCMODE_SIZE 1 +/* MCI IP version >= 0x500, MR bit 16 used for CLKODD */ +#define MMCI_CLKODD_OFFSET 16 +#define MMCI_CLKODD_SIZE 1 +/* MCI IP version < 0x200, MR higher 16bits for BLKLEN */ #define MMCI_BLKLEN_OFFSET 16 #define MMCI_BLKLEN_SIZE 16 -- cgit v1.2.3 From 70ec3286e654a97ba7a6685a45563b1546a8c2b9 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Thu, 31 Jul 2014 14:39:31 +0800 Subject: MMC: atmel_mci: add configuration register definition Add configuration register definition, this register only exists on MCI IP version >= 0x300. Signed-off-by: Bo Shen Acked-by: Pantelis Antoniou --- include/atmel_mci.h | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/atmel_mci.h b/include/atmel_mci.h index 3d2870fc9cb..de2414806b7 100644 --- a/include/atmel_mci.h +++ b/include/atmel_mci.h @@ -36,7 +36,9 @@ typedef struct atmel_mci { u32 ier; /* 0x44 */ u32 idr; /* 0x48 */ u32 imr; /* 0x4c */ - u32 reserved[43]; + u32 dma; /* 0x50 */ + u32 cfg; /* 0x54 */ + u32 reserved[41]; u32 version; } atmel_mci_t; @@ -189,6 +191,16 @@ typedef struct atmel_mci { #define MMCI_TRTYP_MULTI_BLOCK 1 #define MMCI_TRTYP_STREAM 2 +/* Bitfields in CFG */ +#define MMCI_FIFOMODE_OFFSET 0 +#define MMCI_FIFOMODE_SIZE 1 +#define MMCI_FERRCTRL_OFFSET 4 +#define MMCI_FERRCTRL_SIZE 1 +#define MMCI_HSMODE_OFFSET 8 +#define MMCI_HSMODE_SIZE 1 +#define MMCI_LSYNC_OFFSET 12 +#define MMCI_LSYNC_SIZE 1 + /* Bit manipulation macros */ #define MMCI_BIT(name) \ (1 << MMCI_##name##_OFFSET) -- cgit v1.2.3 From ac77f42d0939f05b39335277b678859b47edb997 Mon Sep 17 00:00:00 2001 From: Dmitry Lifshitz Date: Wed, 30 Jul 2014 13:19:05 +0300 Subject: env_mmc: add mmc_get_env_addr() prototype Add missing mmc_get_env_addr() prototype in environment.h Signed-off-by: Dmitry Lifshitz Acked-by: Pantelis Antoniou --- include/environment.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/environment.h b/include/environment.h index 08679aead95..d7a1adf716f 100644 --- a/include/environment.h +++ b/include/environment.h @@ -180,6 +180,12 @@ extern unsigned char env_get_char_spec(int); extern void env_reloc(void); #endif +#ifdef CONFIG_ENV_IS_IN_MMC +#include + +extern int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); +#endif + #ifndef DO_DEPS_ONLY #include -- cgit v1.2.3 From 6e7b7df4df435742fcfde5f384760ae1bda2e39c Mon Sep 17 00:00:00 2001 From: Dmitry Lifshitz Date: Wed, 30 Jul 2014 13:19:06 +0300 Subject: env_mmc: support env partition setup in runtime Add callback with __weak annotation to allow setup of environment partition number in runtime from a board file. Propagate mmc_switch_part() return value into init_mmc_for_env() instead of -1 in case of failure. Signed-off-by: Dmitry Lifshitz Signed-off-by: Igor Grinberg Acked-by: Pantelis Antoniou --- include/environment.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/environment.h b/include/environment.h index d7a1adf716f..1fdbdad8822 100644 --- a/include/environment.h +++ b/include/environment.h @@ -184,6 +184,9 @@ extern void env_reloc(void); #include extern int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); +# ifdef CONFIG_SYS_MMC_ENV_PART +extern uint mmc_get_env_part(struct mmc *mmc); +# endif #endif #ifndef DO_DEPS_ONLY -- cgit v1.2.3 From 0f8062b25b31988bf62f166aa5b988add8454e42 Mon Sep 17 00:00:00 2001 From: "Boschung, Rainer" Date: Tue, 3 Jun 2014 09:05:14 +0200 Subject: mpc85xx: watchdog initialisation added Function to inititialize the cpu watchdog added. Signed-off-by: Rainer Boschung [York Sun: Add prototype in watchdog.h] Reviewed-by: York Sun --- include/watchdog.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/watchdog.h b/include/watchdog.h index aacacb970a1..bd0a8d6b19f 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -95,4 +95,8 @@ int init_func_watchdog_reset(void); #if defined(CONFIG_HW_WATCHDOG) && !defined(__ASSEMBLY__) void hw_watchdog_init(void); #endif + +#if defined(CONFIG_MPC85xx) && !defined(__ASSEMBLY__) + void init_85xx_watchdog(void); +#endif #endif /* _WATCHDOG_H_ */ -- cgit v1.2.3 From 88ac6ffabbe741b67ea94e33894fb1fdca57e776 Mon Sep 17 00:00:00 2001 From: "Boschung, Rainer" Date: Tue, 3 Jun 2014 09:05:16 +0200 Subject: kmp204x: CPU watchdog enabled The booting of the board is now protected by the CPU watchdog. A failure during the boot phase will end up in board reset. Signed-off-by: Rainer Boschung Reviewed-by: York Sun --- include/configs/km/kmp204x-common.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index efd96352eca..a0f9d293caa 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -376,6 +376,14 @@ int get_scl(void); #define CONFIG_LOADS_ECHO /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ +/* + * Hardware Watchdog + */ +#define CONFIG_WATCHDOG /* enable CPU watchdog */ +#define CONFIG_WATCHDOG_PRESC 34 /* wdog prescaler 2^(64-34) (~10min) */ +#define CONFIG_WATCHDOG_RC WRC_CHIP /* reset chip on watchdog event */ + + /* * additionnal command line configuration. */ -- cgit v1.2.3 From b21f87a3e02461c600f1c172b053f1530a532d90 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Fri, 25 Jul 2014 17:39:08 -0500 Subject: Change Andy Fleming's email address Messages to afleming@freescale.com now bounce, and should be directed to my personal address at afleming@gmail.com Signed-off-by: Andy Fleming --- include/phy.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/phy.h b/include/phy.h index d3ecd6378b3..2fcc328d5bc 100644 --- a/include/phy.h +++ b/include/phy.h @@ -1,6 +1,6 @@ /* * Copyright 2011 Freescale Semiconductor, Inc. - * Andy Fleming + * Andy Fleming * * SPDX-License-Identifier: GPL-2.0+ * -- cgit v1.2.3