From ebe2e0c309470249ffb09480d39c2dea9e64871c Mon Sep 17 00:00:00 2001 From: Patrick Wildt Date: Mon, 6 Feb 2023 00:48:26 +0100 Subject: board: mntre: imx8mq: Add MNT Reform 2 board support The MNT Reform 2 is a modular DIY laptop. In its initial version it is based on the BoundaryDevices i.MX8MQ SoM. Some parts have been lifted from BoundaryDevices official U-Boot downstream project. Signed-off-by: Patrick Wildt Tested-by: Vagrant Cascadian Tested-by: Vagrant Cascadian Signed-off-by: Stefano Babic --- include/configs/imx8mq_reform2.h | 67 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 include/configs/imx8mq_reform2.h (limited to 'include') diff --git a/include/configs/imx8mq_reform2.h b/include/configs/imx8mq_reform2.h new file mode 100644 index 00000000000..3148e8622e1 --- /dev/null +++ b/include/configs/imx8mq_reform2.h @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef __IMX8M_REFORM2_H +#define __IMX8M_REFORM2_H + +#include +#include +#include + +#ifdef CONFIG_SPL_BUILD +/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CFG_MALLOC_F_ADDR 0x182000 +/* For RAW image gives a error info not panic */ +#endif + +/* ENET Config */ +/* ENET1 */ +#if defined(CONFIG_CMD_NET) +#define CFG_FEC_MXC_PHYADDR 4 +#endif + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) + +#include + +/* Initial environment variables */ +#define CFG_EXTRA_ENV_SETTINGS \ + BOOTENV \ + "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ + "image=Image\0" \ + "console=ttymxc0,115200\0" \ + "fdt_addr_r=0x43000000\0" \ + "ramdisk_addr_r=0x44000000\0" \ + "boot_fdt=try\0" \ + "fdtfile=imx8mq-mnt-reform2.dtb\0" \ + "initrd_addr=0x43800000\0" \ + "bootm_size=0x10000000\0" \ + "mmcpart=1\0" \ + "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ + "stdin=serial,usbkbd\0" + +/* Link Definitions */ + +#define CFG_SYS_INIT_RAM_ADDR 0x40000000 +#define CFG_SYS_INIT_RAM_SIZE 0x80000 + + +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE 0x100000000 /* 4 GiB DDR */ + +#define CFG_MXC_UART_BASE UART_BASE_ADDR(1) + +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 + +#endif -- cgit v1.2.3