From a47e4495139593392a016653b97c99f11e5a7094 Mon Sep 17 00:00:00 2001 From: Eric Benard Date: Fri, 4 Apr 2014 19:05:53 +0200 Subject: nitrogen6x: use common board_video_skip MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Eric Bénard Acked-by: Eric Nelson --- include/configs/nitrogen6x.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index f7e7315a9b6..5805a037f5e 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -141,6 +141,7 @@ #define CONFIG_CMD_HDMIDETECT #define CONFIG_CONSOLE_MUX #define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -- cgit v1.3.1 From 053b795e30b7295ef2665473c5335a96a696d6c2 Mon Sep 17 00:00:00 2001 From: Eric Benard Date: Fri, 4 Apr 2014 19:05:54 +0200 Subject: mx6sabresd: use common board_video_skip MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Eric Bénard --- board/freescale/mx6sabresd/mx6sabresd.c | 59 ++------------------------------- include/configs/mx6sabresd.h | 1 + 2 files changed, 4 insertions(+), 56 deletions(-) (limited to 'include') diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index d7d932eeb8a..1340f29d762 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -14,14 +14,13 @@ #include #include #include +#include #include #include #include #include #include #include -#include -#include #include #include DECLARE_GLOBAL_DATA_PTR; @@ -265,14 +264,6 @@ int board_phy_config(struct phy_device *phydev) } #if defined(CONFIG_VIDEO_IPUV3) -struct display_info_t { - int bus; - int addr; - int pixfmt; - int (*detect)(struct display_info_t const *dev); - void (*enable)(struct display_info_t const *dev); - struct fb_videomode mode; -}; static int detect_hdmi(struct display_info_t const *dev) { @@ -309,7 +300,7 @@ static void enable_lvds(struct display_info_t const *dev) writel(reg, &iomux->gpr[2]); } -static struct display_info_t const displays[] = {{ +struct display_info_t const displays[] = {{ .bus = -1, .addr = 0, .pixfmt = IPU_PIX_FMT_RGB666, @@ -350,51 +341,7 @@ static struct display_info_t const displays[] = {{ .sync = FB_SYNC_EXT, .vmode = FB_VMODE_NONINTERLACED } } }; - -int board_video_skip(void) -{ - int i; - int ret; - char const *panel = getenv("panel"); - if (!panel) { - for (i = 0; i < ARRAY_SIZE(displays); i++) { - struct display_info_t const *dev = displays+i; - if (dev->detect && dev->detect(dev)) { - panel = dev->mode.name; - printf("auto-detected panel %s\n", panel); - break; - } - } - if (!panel) { - panel = displays[0].mode.name; - printf("No panel detected: default to %s\n", panel); - i = 0; - } - } else { - for (i = 0; i < ARRAY_SIZE(displays); i++) { - if (!strcmp(panel, displays[i].mode.name)) - break; - } - } - if (i < ARRAY_SIZE(displays)) { - ret = ipuv3_fb_init(&displays[i].mode, 0, - displays[i].pixfmt); - if (!ret) { - displays[i].enable(displays+i); - printf("Display: %s (%ux%u)\n", - displays[i].mode.name, - displays[i].mode.xres, - displays[i].mode.yres); - } else - printf("LCD %s cannot be configured: %d\n", - displays[i].mode.name, ret); - } else { - printf("unsupported panel %s\n", panel); - return -EINVAL; - } - - return 0; -} +size_t display_count = ARRAY_SIZE(displays); static void setup_display(void) { diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 5d02d23ec71..0fa6573c7f1 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -47,6 +47,7 @@ #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IPUV3_CLK 260000000 #define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP #define CONFIG_CMD_PCI #ifdef CONFIG_CMD_PCI -- cgit v1.3.1 From 3cbeb0f004db555c58e81de24e23ff0b84d46ddc Mon Sep 17 00:00:00 2001 From: Eric Benard Date: Fri, 4 Apr 2014 19:05:55 +0200 Subject: RiOTboard and MarSBoard: add new boards support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit RiOTboard is produced by Embest/Element 14 and is based on i.MX6 Solo The following features are tested : - UART2 (console) - eMMC - SDCard - uSDCard - Ethernet - USB Host (through 4 ports hub) - HDMI output - I2C 1/2/3 - LVDS TFT with LCD8000-97C from Embest/Element 14 Boot on eMMC and through USB loader are tested. For more informations on this board : http://www.riotboard.org/ MarSBoard is produced by Embest/Element 14 and is based on i.MX6 Dual The following features are tested : - UART2 (console) - eMMC - uSDCard - Ethernet - USB Host (through 2 ports hub) - HDMI output - I2C 1/2 - SPI NOR Flash - LVDS TFT with LCD8000-97C from Embest/Element 14 Boot on SPI NOR and through USB loader are tested. For more informations on this board : http://www.embest-tech.com/shop/star/marsboard.html Both boards are supported by the same code base as they are based on a common trunk of schematics. Signed-off-by: Eric Bénard Acked-by: Stefano Babic --- board/embest/mx6boards/Makefile | 9 + board/embest/mx6boards/mx6boards.c | 607 +++++++++++++++++++++++++++++++++++++ boards.cfg | 2 + include/configs/embestmx6boards.h | 336 ++++++++++++++++++++ 4 files changed, 954 insertions(+) create mode 100644 board/embest/mx6boards/Makefile create mode 100644 board/embest/mx6boards/mx6boards.c create mode 100644 include/configs/embestmx6boards.h (limited to 'include') diff --git a/board/embest/mx6boards/Makefile b/board/embest/mx6boards/Makefile new file mode 100644 index 00000000000..467fb50003e --- /dev/null +++ b/board/embest/mx6boards/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2007, Guennadi Liakhovetski +# +# (C) Copyright 2011 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mx6boards.o diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c new file mode 100644 index 00000000000..6d869611a86 --- /dev/null +++ b/board/embest/mx6boards/mx6boards.c @@ -0,0 +1,607 @@ +/* + * Copyright (C) 2014 Eukréa Electromatique + * Author: Eric Bénard + * Fabio Estevam + * Jon Nettleton + * + * based on sabresd.c which is : + * Copyright (C) 2012 Freescale Semiconductor, Inc. + * and on hummingboard.c which is : + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton . + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CLK_CTRL (PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \ + PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +static int board_type = -1; +#define BOARD_IS_MARSBOARD 0 +#define BOARD_IS_RIOTBOARD 1 + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + + return 0; +} + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +iomux_v3_cfg_t const enet_pads[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* GPIO16 -> AR8035 25MHz */ + MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL_CLK), + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), + /* AR8035 PHY Reset */ + MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), + /* AR8035 PHY Interrupt */ + MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); + + /* Reset AR8035 PHY */ + gpio_direction_output(IMX_GPIO_NR(3, 31) , 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(3, 31), 1); +} + +int mx6_rgmii_rework(struct phy_device *phydev) +{ + /* from linux/arch/arm/mach-imx/mach-imx6q.c : + * Ar803x phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + mx6_rgmii_rework(phydev); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL), /* WP */ + MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +iomux_v3_cfg_t const riotboard_usdhc3_pads[] = { + MX6_PAD_SD3_DAT4__GPIO7_IO01 | MUX_PAD_CTRL(NO_PAD_CTRL), /* WP */ + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CLK_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + /* eMMC RST */ + MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg usdhc_cfg[3] = { + {USDHC2_BASE_ADDR}, + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) +#define USDHC3_CD_GPIO IMX_GPIO_NR(7, 0) + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = 0; + + switch (cfg->esdhc_base) { + case USDHC2_BASE_ADDR: + ret = !gpio_get_value(USDHC2_CD_GPIO); + break; + case USDHC3_BASE_ADDR: + if (board_type == BOARD_IS_RIOTBOARD) + ret = !gpio_get_value(USDHC3_CD_GPIO); + else if (board_type == BOARD_IS_MARSBOARD) + ret = 1; /* eMMC/uSDHC3 is always present */ + break; + case USDHC4_BASE_ADDR: + ret = 1; /* eMMC/uSDHC4 is always present */ + break; + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + int i; + + /* + * According to the board_mmc_init() the following map is done: + * (U-boot device node) (Physical Port) + * ** RiOTboard : + * mmc0 SDCard slot (bottom) + * mmc1 uSDCard slot (top) + * mmc2 eMMC + * ** MarSBoard : + * mmc0 uSDCard slot (bottom) + * mmc1 eMMC + */ + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + gpio_direction_input(USDHC2_CD_GPIO); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + usdhc_cfg[0].max_bus_width = 4; + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + if (board_type == BOARD_IS_RIOTBOARD) { + imx_iomux_v3_setup_multiple_pads( + riotboard_usdhc3_pads, + ARRAY_SIZE(riotboard_usdhc3_pads)); + gpio_direction_input(USDHC3_CD_GPIO); + gpio_direction_output(IMX_GPIO_NR(7, 8) , 0); + udelay(250); + gpio_set_value(IMX_GPIO_NR(7, 8), 1); + } + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].max_bus_width = 4; + break; + case 2: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + usdhc_cfg[2].max_bus_width = 4; + gpio_direction_output(IMX_GPIO_NR(6, 8) , 0); + udelay(250); + gpio_set_value(IMX_GPIO_NR(6, 8), 1); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + i + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +iomux_v3_cfg_t const ecspi1_pads[] = { + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); +} +#endif + +struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(5, 27) + }, + .sda = { + .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(5, 26) + } +}; + +struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(4, 13) + } +}; + +struct i2c_pads_info i2c_pad_info3 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(1, 6) + } +}; + +iomux_v3_cfg_t const tft_pads_riot[] = { + /* LCD_PWR_EN */ + MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* TOUCH_INT */ + MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* LED_PWR_EN */ + MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* BL LEVEL */ + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +iomux_v3_cfg_t const tft_pads_mars[] = { + /* LCD_PWR_EN */ + MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* TOUCH_INT */ + MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* LED_PWR_EN */ + MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* BL LEVEL (PWM4) */ + MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +#if defined(CONFIG_VIDEO_IPUV3) + +static void enable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *) + IOMUXC_BASE_ADDR; + setbits_le32(&iomux->gpr[2], + IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT); + /* set backlight level to ON */ + if (board_type == BOARD_IS_RIOTBOARD) + gpio_direction_output(IMX_GPIO_NR(1, 18) , 1); + else if (board_type == BOARD_IS_MARSBOARD) + gpio_direction_output(IMX_GPIO_NR(2, 10) , 1); +} + +static void disable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + /* set backlight level to OFF */ + if (board_type == BOARD_IS_RIOTBOARD) + gpio_direction_output(IMX_GPIO_NR(1, 18) , 0); + else if (board_type == BOARD_IS_MARSBOARD) + gpio_direction_output(IMX_GPIO_NR(2, 10) , 0); + + clrbits_le32(&iomux->gpr[2], + IOMUXC_GPR2_LVDS_CH0_MODE_MASK); +} + +static int detect_hdmi(struct display_info_t const *dev) +{ + struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; + return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; +} + +static void do_enable_hdmi(struct display_info_t const *dev) +{ + disable_lvds(dev); + imx_enable_hdmi_phy(); +} + +static int detect_i2c(struct display_info_t const *dev) +{ + return (0 == i2c_set_bus_num(dev->bus)) && + (0 == i2c_probe(dev->addr)); +} + +struct display_info_t const displays[] = {{ + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = do_enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = 2, + .addr = 0x1, + .pixfmt = IPU_PIX_FMT_LVDS666, + .detect = detect_i2c, + .enable = enable_lvds, + .mode = { + .name = "LCD8000-97C", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 100, + .right_margin = 200, + .upper_margin = 10, + .lower_margin = 20, + .hsync_len = 20, + .vsync_len = 8, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} } }; +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg; + + enable_ipu_clock(); + imx_setup_hdmi(); + + /* Turn on LDB0, IPU,IPU DI0 clocks */ + setbits_le32(&mxc_ccm->CCGR3, + MXC_CCM_CCGR3_LDB_DI0_MASK); + + /* set LDB0 clk select to 011/011 */ + clrsetbits_le32(&mxc_ccm->cs2cdr, + MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK, + (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)); + + setbits_le32(&mxc_ccm->cscmr2, + MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); + + setbits_le32(&mxc_ccm->chsccdr, + (CHSCCDR_CLK_SEL_LDB_DI0 + << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET)); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES + | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW + | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG + | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT + | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG + | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT + | IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED + | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + + clrsetbits_le32(&iomux->gpr[3], + IOMUXC_GPR3_LVDS0_MUX_CTL_MASK | + IOMUXC_GPR3_HDMI_MUX_CTL_MASK, + IOMUXC_GPR3_MUX_SRC_IPU1_DI0 + << IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); +} +#endif /* CONFIG_VIDEO_IPUV3 */ + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_eth_init(bd_t *bis) +{ + setup_iomux_enet(); + + return cpu_eth_init(bis); +} + +int board_early_init_f(void) +{ + u32 cputype = cpu_type(get_cpu_rev()); + + switch (cputype) { + case MXC_CPU_MX6SOLO: + board_type = BOARD_IS_RIOTBOARD; + break; + case MXC_CPU_MX6D: + board_type = BOARD_IS_MARSBOARD; + break; + } + + setup_iomux_uart(); + + if (board_type == BOARD_IS_RIOTBOARD) + imx_iomux_v3_setup_multiple_pads( + tft_pads_riot, ARRAY_SIZE(tft_pads_riot)); + else if (board_type == BOARD_IS_MARSBOARD) + imx_iomux_v3_setup_multiple_pads( + tft_pads_mars, ARRAY_SIZE(tft_pads_mars)); +#if defined(CONFIG_VIDEO_IPUV3) + /* power ON LCD */ + gpio_direction_output(IMX_GPIO_NR(1, 29) , 1); + /* touch interrupt is an input */ + gpio_direction_input(IMX_GPIO_NR(6, 14)); + /* power ON backlight */ + gpio_direction_output(IMX_GPIO_NR(6, 15) , 1); + /* set backlight level to off */ + if (board_type == BOARD_IS_RIOTBOARD) + gpio_direction_output(IMX_GPIO_NR(1, 18) , 0); + else if (board_type == BOARD_IS_MARSBOARD) + gpio_direction_output(IMX_GPIO_NR(2, 10) , 0); + setup_display(); +#endif + + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + /* i2c1 : PMIC, Audio codec on RiOT, Expansion connector on MarS */ + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + /* i2c2 : HDMI EDID */ + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + /* i2c3 : LVDS, Expansion connector */ + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3); +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode riotboard_boot_modes[] = { + {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, + {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +static const struct boot_mode marsboard_boot_modes[] = { + {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, + {"emmc", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int board_late_init(void) +{ +#ifdef CONFIG_CMD_BMODE + if (board_type == BOARD_IS_RIOTBOARD) + add_board_boot_modes(riotboard_boot_modes); + else if (board_type == BOARD_IS_RIOTBOARD) + add_board_boot_modes(marsboard_boot_modes); +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: "); + if (board_type == BOARD_IS_MARSBOARD) + puts("MarSBoard\n"); + else if (board_type == BOARD_IS_RIOTBOARD) + puts("RIoTboard\n"); + else + printf("unknown - cputype : %02x\n", cpu_type(get_cpu_rev())); + + return 0; +} diff --git a/boards.cfg b/boards.cfg index b4203f1b576..9a87aa774c2 100644 --- a/boards.cfg +++ b/boards.cfg @@ -328,6 +328,8 @@ Active arm armv7 mx6 gateworks gw_ventana Active arm armv7 mx6 gateworks gw_ventana gwventanaq1g gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024 Tim Harvey Active arm armv7 mx6 gateworks gw_ventana gwventanaq1gspi gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6Q,DDR_MB=1024,SPI_FLASH Tim Harvey Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton +Active arm armv7 mx6 embest mx6boards riotboard embestmx6boards:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024,ENV_IS_IN_MMC Eric Bénard +Active arm armv7 mx6 embest mx6boards marsboard embestmx6boards:IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,ENV_IS_IN_SPI_FLASH Eric Bénard Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas Active arm armv7 omap3 8dtech eco5pk eco5pk - Raphael Assenat diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h new file mode 100644 index 00000000000..eb91c44e3ff --- /dev/null +++ b/include/configs/embestmx6boards.h @@ -0,0 +1,336 @@ +/* + * Copyright (C) 2014 Eukréa Electromatique + * Author: Eric Bénard + * + * Configuration settings for the Embest RIoTboard + * + * based on mx6*sabre*.h which are : + * Copyright (C) 2012 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __RIOTBOARD_CONFIG_H +#define __RIOTBOARD_CONFIG_H + +#include +#include + +#include "mx6_common.h" +#include + +#define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CONSOLE_DEV "ttymxc0" +#define CONFIG_MMCROOT "/dev/mmcblk1p2" + +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) + +#define CONFIG_MX6 + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_MXC_GPIO + +#define CONFIG_MXC_UART + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 4 + +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(2, 30) << 8)) +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#endif + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_SETEXPR +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_SUPPORT_EMMC_BOOT +#define EMMC_ENV \ + "emmcdev=2\0" \ + "update_emmc_firmware=" \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "if ${get_cmd} ${update_sd_firmware_filename}; then " \ + "if mmc dev ${emmcdev}; then " \ + "setexpr fw_sz ${filesize} / 0x200; " \ + "setexpr fw_sz ${fw_sz} + 1; " \ + "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ + "fi; " \ + "fi\0" +#else +#define EMMC_ENV "" +#endif + +#ifdef CONFIG_CMD_SF +#define SF_ENV \ + "update_spi_firmware=" \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "if ${get_cmd} ${update_spi_firmware_filename}; then " \ + "if sf probe; then " \ + "sf erase 0 0xc0000; " \ + "sf write ${loadaddr} 0x400 ${filesize}; " \ + "fi; " \ + "fi\0" +#else +#define SF_ENV "" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=zImage\0" \ + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdt_addr=0x18000000\0" \ + "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ + "console=" CONFIG_CONSOLE_DEV "\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ + "mmcpart=1\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "update_sd_firmware=" \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "if mmc dev ${mmcdev}; then " \ + "if ${get_cmd} ${update_sd_firmware_filename}; then " \ + "setexpr fw_sz ${filesize} / 0x200; " \ + "setexpr fw_sz ${fw_sz} + 1; " \ + "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ + "fi; " \ + "fi\0" \ + EMMC_ENV \ + SF_ENV \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadbootscript=" \ + "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "if test ${boot_fdt} = try; then " \ + "bootz; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi; " \ + "else " \ + "bootz; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev};" \ + "if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else run netboot; fi" + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE (128 * 1024) + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#if defined(CONFIG_ENV_IS_IN_MMC) +/* RiOTboard */ +#define CONFIG_DEFAULT_FDT_FILE "imx6s-riotboard.dtb" +#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */ +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +/* MarSBoard */ +#define CONFIG_DEFAULT_FDT_FILE "imx6q-marsboard.dtb" +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +/* Framebuffer */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +#endif /* __RIOTBOARD_CONFIG_H */ -- cgit v1.3.1 From e44154ef0a26e7cd22c297947cfa1e89fb439d35 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Fri, 28 Mar 2014 17:16:32 +0900 Subject: arm: rmobile: koelsch: Remove NOR-Flash support Koelsch board has NOR-Flash. But user uses SPI-Flash ROM instead of NOR-Flash. This removed the setting of NOR-Flash. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- board/renesas/koelsch/koelsch.c | 183 ---------------------------------------- boards.cfg | 1 - include/configs/koelsch.h | 31 ------- 3 files changed, 215 deletions(-) (limited to 'include') diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 10dc088c2a5..d4f63724b44 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -23,168 +23,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define s_init_wait(cnt) \ - ({ \ - u32 i = 0x10000 * cnt; \ - while (i > 0) \ - i--; \ - }) - - -#define dbpdrgd_check(bsc) \ - ({ \ - while ((readl(&bsc->dbpdrgd) & 0x1) != 0x1) \ - ; \ - }) - -#if defined(CONFIG_NORFLASH) -static void bsc_init(void) -{ - struct rcar_lbsc *lbsc = (struct rcar_lbsc *)LBSC_BASE; - struct rcar_dbsc3 *dbsc3_0 = (struct rcar_dbsc3 *)DBSC3_0_BASE; - - /* LBSC */ - writel(0x00000020, &lbsc->cs0ctrl); - writel(0x00000020, &lbsc->cs1ctrl); - writel(0x00002020, &lbsc->ecs0ctrl); - writel(0x00002020, &lbsc->ecs1ctrl); - - writel(0x077F077F, &lbsc->cswcr0); - writel(0x077F077F, &lbsc->cswcr1); - writel(0x077F077F, &lbsc->ecswcr0); - writel(0x077F077F, &lbsc->ecswcr1); - - /* DBSC3 */ - s_init_wait(10); - - writel(0x0000A55A, &dbsc3_0->dbpdlck); - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x80000000, &dbsc3_0->dbpdrgd); - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000006, &dbsc3_0->dbpdrga); - writel(0x0001C000, &dbsc3_0->dbpdrgd); - - writel(0x00000023, &dbsc3_0->dbpdrga); - writel(0x00FD2480, &dbsc3_0->dbpdrgd); - - writel(0x00000010, &dbsc3_0->dbpdrga); - writel(0xF004649B, &dbsc3_0->dbpdrgd); - - writel(0x0000000F, &dbsc3_0->dbpdrga); - writel(0x00181EE4, &dbsc3_0->dbpdrgd); - - writel(0x0000000E, &dbsc3_0->dbpdrga); - writel(0x33C03812, &dbsc3_0->dbpdrgd); - - writel(0x00000003, &dbsc3_0->dbpdrga); - writel(0x0300C481, &dbsc3_0->dbpdrgd); - - writel(0x00000007, &dbsc3_0->dbkind); - writel(0x10030A02, &dbsc3_0->dbconf0); - writel(0x00000001, &dbsc3_0->dbphytype); - writel(0x00000000, &dbsc3_0->dbbl); - writel(0x0000000B, &dbsc3_0->dbtr0); - writel(0x00000008, &dbsc3_0->dbtr1); - writel(0x00000000, &dbsc3_0->dbtr2); - writel(0x0000000B, &dbsc3_0->dbtr3); - writel(0x000C000B, &dbsc3_0->dbtr4); - writel(0x00000027, &dbsc3_0->dbtr5); - writel(0x0000001C, &dbsc3_0->dbtr6); - writel(0x00000005, &dbsc3_0->dbtr7); - writel(0x00000018, &dbsc3_0->dbtr8); - writel(0x00000008, &dbsc3_0->dbtr9); - writel(0x0000000C, &dbsc3_0->dbtr10); - writel(0x00000009, &dbsc3_0->dbtr11); - writel(0x00000012, &dbsc3_0->dbtr12); - writel(0x000000D0, &dbsc3_0->dbtr13); - writel(0x00140005, &dbsc3_0->dbtr14); - writel(0x00050004, &dbsc3_0->dbtr15); - writel(0x70233005, &dbsc3_0->dbtr16); - writel(0x000C0000, &dbsc3_0->dbtr17); - writel(0x00000300, &dbsc3_0->dbtr18); - writel(0x00000040, &dbsc3_0->dbtr19); - writel(0x00000001, &dbsc3_0->dbrnk0); - writel(0x00020001, &dbsc3_0->dbadj0); - writel(0x20082008, &dbsc3_0->dbadj2); - writel(0x00020002, &dbsc3_0->dbwt0cnf0); - writel(0x0000000F, &dbsc3_0->dbwt0cnf4); - - writel(0x00000015, &dbsc3_0->dbpdrga); - writel(0x00000D70, &dbsc3_0->dbpdrgd); - - writel(0x00000016, &dbsc3_0->dbpdrga); - writel(0x00000006, &dbsc3_0->dbpdrgd); - - writel(0x00000017, &dbsc3_0->dbpdrga); - writel(0x00000018, &dbsc3_0->dbpdrgd); - - writel(0x00000012, &dbsc3_0->dbpdrga); - writel(0x9D5CBB66, &dbsc3_0->dbpdrgd); - - writel(0x00000013, &dbsc3_0->dbpdrga); - writel(0x1A868300, &dbsc3_0->dbpdrgd); - - writel(0x00000023, &dbsc3_0->dbpdrga); - writel(0x00FDB6C0, &dbsc3_0->dbpdrgd); - - writel(0x00000014, &dbsc3_0->dbpdrga); - writel(0x300214D8, &dbsc3_0->dbpdrgd); - - writel(0x0000001A, &dbsc3_0->dbpdrga); - writel(0x930035C7, &dbsc3_0->dbpdrgd); - - writel(0x00000060, &dbsc3_0->dbpdrga); - writel(0x330657B2, &dbsc3_0->dbpdrgd); - - writel(0x00000011, &dbsc3_0->dbpdrga); - writel(0x1000040B, &dbsc3_0->dbpdrgd); - - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x00000071, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x2100FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - - writel(0x110000DB, &dbsc3_0->dbcmd); - - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x00000181, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x0000FE01, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000000, &dbsc3_0->dbbs0cnt1); - writel(0x01004C20, &dbsc3_0->dbcalcnf); - writel(0x014000AA, &dbsc3_0->dbcaltr); - writel(0x00000140, &dbsc3_0->dbrfcnf0); - writel(0x00081860, &dbsc3_0->dbrfcnf1); - writel(0x00010000, &dbsc3_0->dbrfcnf2); - writel(0x00000001, &dbsc3_0->dbrfen); - writel(0x00000001, &dbsc3_0->dbacen); -} -#else -#define bsc_init() do {} while (0) -#endif /* CONFIG_NORFLASH */ - void s_init(void) { struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; @@ -196,9 +34,6 @@ void s_init(void) /* QoS */ qos_init(); - - /* BSC */ - bsc_init(); } #define MSTPSR1 0xE6150038 @@ -213,18 +48,6 @@ void s_init(void) #define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) -#define PMMR 0xE6060000 -#define GPSR4 0xE6060014 -#define IPSR14 0xE6060058 - -#define set_guard_reg(addr, mask, value) \ -{ \ - u32 val; \ - val = (readl(addr) & ~(mask)) | (value); \ - writel(~val, PMMR); \ - writel(val, addr); \ -} - #define mstp_setbits(type, addr, saddr, set) \ out_##type((saddr), in_##type(addr) | (set)) #define mstp_clrbits(type, addr, saddr, clear) \ @@ -238,13 +61,7 @@ int board_early_init_f(void) { mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); -#if defined(CONFIG_NORFLASH) /* SCIF0 */ - set_guard_reg(GPSR4, 0x34000000, 0x00000000); - set_guard_reg(IPSR14, 0x00000FC7, 0x00000481); - set_guard_reg(GPSR4, 0x00000000, 0x34000000); -#endif - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); /* ETHER */ diff --git a/boards.cfg b/boards.cfg index 0b63c5a8333..8ffd4a8e274 100644 --- a/boards.cfg +++ b/boards.cfg @@ -367,7 +367,6 @@ Active arm armv7 omap5 ti omap5_uevm Active arm armv7 rmobile atmark-techno armadillo-800eva armadillo-800eva - Nobuhiro Iwamatsu Active arm armv7 rmobile kmc kzm9g kzm9g - Nobuhiro Iwamatsu :Tetsuyuki Kobayashi Active arm armv7 rmobile renesas koelsch koelsch - Nobuhiro Iwamatsu -Active arm armv7 rmobile renesas koelsch koelsch_nor koelsch:NORFLASH Nobuhiro Iwamatsu Active arm armv7 rmobile renesas lager lager - Nobuhiro Iwamatsu Active arm armv7 rmobile renesas lager lager_nor lager:NORFLASH Nobuhiro Iwamatsu Active arm armv7 s5pc1xx samsung goni s5p_goni - Mateusz Zalega diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 90e2d7a030d..7db60860844 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -32,15 +32,9 @@ #define CONFIG_CMD_NFS #define CONFIG_CMD_BOOTZ -#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) -#define CONFIG_CMD_FLASH -#define CONFIG_SYS_TEXT_BASE 0x00000000 -#else -/* SPI flash boot is default. */ #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_SYS_TEXT_BASE 0xE6304000 -#endif #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -109,29 +103,6 @@ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ -#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -#define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ -#define CONFIG_SYS_MAX_FLASH_SECT 1024 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } -#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) } -#define CONFIG_SYS_FLASH_ERASE_TOUT 3000 -#define CONFIG_SYS_FLASH_WRITE_TOUT 3000 -#define CONFIG_SYS_FLASH_LOCK_TOUT 3000 -#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 -/* ENV setting */ -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ - CONFIG_SYS_MONITOR_LEN) - -#else /* CONFIG_SYS_USE_BOOT_NORFLASH */ - #define CONFIG_SYS_NO_FLASH #define CONFIG_SPI #define CONFIG_SH_QSPI @@ -142,8 +113,6 @@ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_ADDR 0xC0000 -#endif /* CONFIG_SYS_USE_BOOT_NORFLASH */ - /* Common ENV setting */ #define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_SECT_SIZE (256 * 1024) -- cgit v1.3.1 From 9e018b092aff580a2c5da29c06f46e5244cca3ab Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Fri, 28 Mar 2014 17:09:24 +0900 Subject: arm: rmobile: lager: Remove NOR-Flash support Lagar board has NOR-Flash. But user uses SPI-Flash ROM instead of NOR-Flash. This removed the setting of NOR-Flash. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- board/renesas/lager/lager.c | 184 -------------------------------------------- boards.cfg | 1 - include/configs/lager.h | 31 -------- 3 files changed, 216 deletions(-) (limited to 'include') diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index f28a6978c28..959f46ac337 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -24,167 +24,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define s_init_wait(cnt) \ - ({ \ - u32 i = 0x10000 * cnt; \ - while (i > 0) \ - i--; \ - }) - -#define dbpdrgd_check(bsc) \ - ({ \ - while ((readl(&bsc->dbpdrgd) & 0x1) != 0x1) \ - ; \ - }) - -#if defined(CONFIG_NORFLASH) -static void bsc_init(void) -{ - struct rcar_lbsc *lbsc = (struct rcar_lbsc *)LBSC_BASE; - struct rcar_dbsc3 *dbsc3_0 = (struct rcar_dbsc3 *)DBSC3_0_BASE; - - /* LBSC */ - writel(0x00000020, &lbsc->cs0ctrl); - writel(0x00000020, &lbsc->cs1ctrl); - writel(0x00002020, &lbsc->ecs0ctrl); - writel(0x00002020, &lbsc->ecs1ctrl); - - writel(0x077F077F, &lbsc->cswcr0); - writel(0x077F077F, &lbsc->cswcr1); - writel(0x077F077F, &lbsc->ecswcr0); - writel(0x077F077F, &lbsc->ecswcr1); - - /* DBSC3 */ - s_init_wait(10); - - writel(0x0000A55A, &dbsc3_0->dbpdlck); - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x80000000, &dbsc3_0->dbpdrgd); - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000006, &dbsc3_0->dbpdrga); - writel(0x0001C000, &dbsc3_0->dbpdrgd); - - writel(0x00000023, &dbsc3_0->dbpdrga); - writel(0x00FD2480, &dbsc3_0->dbpdrgd); - - writel(0x00000010, &dbsc3_0->dbpdrga); - writel(0xF004649B, &dbsc3_0->dbpdrgd); - - writel(0x0000000F, &dbsc3_0->dbpdrga); - writel(0x00181EE4, &dbsc3_0->dbpdrgd); - - writel(0x0000000E, &dbsc3_0->dbpdrga); - writel(0x33C03812, &dbsc3_0->dbpdrgd); - - writel(0x00000003, &dbsc3_0->dbpdrga); - writel(0x0300C481, &dbsc3_0->dbpdrgd); - - writel(0x00000007, &dbsc3_0->dbkind); - writel(0x10030A02, &dbsc3_0->dbconf0); - writel(0x00000001, &dbsc3_0->dbphytype); - writel(0x00000000, &dbsc3_0->dbbl); - writel(0x0000000B, &dbsc3_0->dbtr0); - writel(0x00000008, &dbsc3_0->dbtr1); - writel(0x00000000, &dbsc3_0->dbtr2); - writel(0x0000000B, &dbsc3_0->dbtr3); - writel(0x000C000B, &dbsc3_0->dbtr4); - writel(0x00000027, &dbsc3_0->dbtr5); - writel(0x0000001C, &dbsc3_0->dbtr6); - writel(0x00000005, &dbsc3_0->dbtr7); - writel(0x00000018, &dbsc3_0->dbtr8); - writel(0x00000008, &dbsc3_0->dbtr9); - writel(0x0000000C, &dbsc3_0->dbtr10); - writel(0x00000009, &dbsc3_0->dbtr11); - writel(0x00000012, &dbsc3_0->dbtr12); - writel(0x000000D0, &dbsc3_0->dbtr13); - writel(0x00140005, &dbsc3_0->dbtr14); - writel(0x00050004, &dbsc3_0->dbtr15); - writel(0x70233005, &dbsc3_0->dbtr16); - writel(0x000C0000, &dbsc3_0->dbtr17); - writel(0x00000300, &dbsc3_0->dbtr18); - writel(0x00000040, &dbsc3_0->dbtr19); - writel(0x00000001, &dbsc3_0->dbrnk0); - writel(0x00020001, &dbsc3_0->dbadj0); - writel(0x20082008, &dbsc3_0->dbadj2); - writel(0x00020002, &dbsc3_0->dbwt0cnf0); - writel(0x0000000F, &dbsc3_0->dbwt0cnf4); - - writel(0x00000015, &dbsc3_0->dbpdrga); - writel(0x00000D70, &dbsc3_0->dbpdrgd); - - writel(0x00000016, &dbsc3_0->dbpdrga); - writel(0x00000006, &dbsc3_0->dbpdrgd); - - writel(0x00000017, &dbsc3_0->dbpdrga); - writel(0x00000018, &dbsc3_0->dbpdrgd); - - writel(0x00000012, &dbsc3_0->dbpdrga); - writel(0x9D5CBB66, &dbsc3_0->dbpdrgd); - - writel(0x00000013, &dbsc3_0->dbpdrga); - writel(0x1A868300, &dbsc3_0->dbpdrgd); - - writel(0x00000023, &dbsc3_0->dbpdrga); - writel(0x00FDB6C0, &dbsc3_0->dbpdrgd); - - writel(0x00000014, &dbsc3_0->dbpdrga); - writel(0x300214D8, &dbsc3_0->dbpdrgd); - - writel(0x0000001A, &dbsc3_0->dbpdrga); - writel(0x930035C7, &dbsc3_0->dbpdrgd); - - writel(0x00000060, &dbsc3_0->dbpdrga); - writel(0x330657B2, &dbsc3_0->dbpdrgd); - - writel(0x00000011, &dbsc3_0->dbpdrga); - writel(0x1000040B, &dbsc3_0->dbpdrgd); - - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x00000071, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x2100FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - writel(0x0000FA00, &dbsc3_0->dbcmd); - - writel(0x110000DB, &dbsc3_0->dbcmd); - - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x00000181, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000001, &dbsc3_0->dbpdrga); - writel(0x0000FE01, &dbsc3_0->dbpdrgd); - - writel(0x00000004, &dbsc3_0->dbpdrga); - dbpdrgd_check(dbsc3_0); - - writel(0x00000000, &dbsc3_0->dbbs0cnt1); - writel(0x01004C20, &dbsc3_0->dbcalcnf); - writel(0x014000AA, &dbsc3_0->dbcaltr); - writel(0x00000140, &dbsc3_0->dbrfcnf0); - writel(0x00081860, &dbsc3_0->dbrfcnf1); - writel(0x00010000, &dbsc3_0->dbrfcnf2); - writel(0x00000001, &dbsc3_0->dbrfen); - writel(0x00000001, &dbsc3_0->dbacen); -} -#else -#define bsc_init() do {} while (0) -#endif /* CONFIG_NORFLASH */ - void s_init(void) { struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE; @@ -196,9 +35,6 @@ void s_init(void) /* QoS(Quality-of-Service) Init */ qos_init(); - - /* BSC init */ - bsc_init(); } #define MSTPSR1 0xE6150038 @@ -213,18 +49,6 @@ void s_init(void) #define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) -#define PMMR 0xE6060000 -#define GPSR4 0xE6060014 -#define IPSR14 0xE6060058 - -#define set_guard_reg(addr, mask, value) \ -{ \ - u32 val; \ - val = (readl(addr) & ~(mask)) | (value); \ - writel(~val, PMMR); \ - writel(val, addr); \ -} - #define mstp_setbits(type, addr, saddr, set) \ out_##type((saddr), in_##type(addr) | (set)) #define mstp_clrbits(type, addr, saddr, clear) \ @@ -238,16 +62,8 @@ int board_early_init_f(void) { /* TMU0 */ mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); - -#if defined(CONFIG_NORFLASH) /* SCIF0 */ - set_guard_reg(GPSR4, 0x34000000, 0x00000000); - set_guard_reg(IPSR14, 0x00000FC7, 0x00000481); - set_guard_reg(GPSR4, 0x00000000, 0x34000000); -#endif - mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); - /* ETHER */ mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHER_MSTP813); diff --git a/boards.cfg b/boards.cfg index 8ffd4a8e274..ca7719770e8 100644 --- a/boards.cfg +++ b/boards.cfg @@ -368,7 +368,6 @@ Active arm armv7 rmobile atmark-techno armadillo-800eva Active arm armv7 rmobile kmc kzm9g kzm9g - Nobuhiro Iwamatsu :Tetsuyuki Kobayashi Active arm armv7 rmobile renesas koelsch koelsch - Nobuhiro Iwamatsu Active arm armv7 rmobile renesas lager lager - Nobuhiro Iwamatsu -Active arm armv7 rmobile renesas lager lager_nor lager:NORFLASH Nobuhiro Iwamatsu Active arm armv7 s5pc1xx samsung goni s5p_goni - Mateusz Zalega Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - diff --git a/include/configs/lager.h b/include/configs/lager.h index b420e45e63c..5ddefefa498 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -35,14 +35,9 @@ #define CONFIG_CMD_NFS #define CONFIG_CMD_BOOTZ -#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) -#define CONFIG_CMD_FLASH -#define CONFIG_SYS_TEXT_BASE 0x00000000 -#else #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_SYS_TEXT_BASE 0xE8080000 -#endif #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS @@ -111,31 +106,6 @@ #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) -#if defined(CONFIG_SYS_USE_BOOT_NORFLASH) -/* USE NOR FLASH */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -#define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_SYS_FLASH_BASE 0x00000000 -#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ -#define CONFIG_SYS_MAX_FLASH_SECT 1024 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } -#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) } -#define CONFIG_SYS_FLASH_ERASE_TOUT 3000 -#define CONFIG_SYS_FLASH_WRITE_TOUT 3000 -#define CONFIG_SYS_FLASH_LOCK_TOUT 3000 -#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 - -/* ENV setting */ -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ - CONFIG_SYS_MONITOR_LEN) - -#else /* CONFIG_SYS_USE_BOOT_NORFLASH */ - /* USE SPI */ #define CONFIG_SPI #define CONFIG_SPI_FLASH_BAR @@ -147,7 +117,6 @@ /* ENV setting */ #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_ADDR 0xC0000 -#endif /* Common ENV setting */ #define CONFIG_ENV_OVERWRITE -- cgit v1.3.1 From ae8e1d9d7d0041f9d6b543d96e0fc2de6b8d53b2 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 31 Mar 2014 11:06:46 +0900 Subject: arm: rmobile: koelsch: Update calculation of CONFIG_SH_TMU_CLK_FREQ CONFIG_SH_TMU_CLK_FREQ of koelsch is calculated from the external clock. This defines RMOBILE_XTAL_CLK, this updates the calculation of CONFIG_SH_TMU_CLK_FREQ. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/configs/koelsch.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 7db60860844..1a93d1769fe 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -135,8 +135,9 @@ #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 10000000 -#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ +#define RMOBILE_XTAL_CLK 20000000u +#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK +#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) #define CONFIG_SH_SCIF_CLK_FREQ 14745600 #define CONFIG_SYS_TMU_CLK_DIV 4 -- cgit v1.3.1 From b1f78a2ebd558c175c307110c50835a92c5a9db5 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 31 Mar 2014 14:03:07 +0900 Subject: arm: rmobile: lager: Update calculation of CONFIG_SH_TMU_CLK_FREQ CONFIG_SH_TMU_CLK_FREQ of lager is calculated from the external clock. This defines RMOBILE_XTAL_CLK, this updates the calculation of CONFIG_SH_TMU_CLK_FREQ. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- include/configs/lager.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/lager.h b/include/configs/lager.h index 5ddefefa498..269cfec1eab 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -155,9 +155,10 @@ #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ /* Board Clock */ -#define CONFIG_BASE_CLK_FREQ 20000000u -#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_BASE_CLK_FREQ / 2) /* EXT / 2 */ -#define CONFIG_PLL1_CLK_FREQ (CONFIG_BASE_CLK_FREQ * 156 / 2) +#define RMOBILE_XTAL_CLK 20000000u +#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK +#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ +#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) -- cgit v1.3.1 From 8d18bcfd439b8422ab3bada2001cc2abd525d9f8 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Mon, 31 Mar 2014 15:24:32 +0900 Subject: arm: rmobile: lager: Remove MACH_TYPE_LAGER and CONFIG_MACH_TYPE MACH_TYPE_LAGER and CONFIG_MACH_TYPE are not already available on Lager board. This removes them. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- board/renesas/lager/lager.c | 2 -- include/configs/lager.h | 2 -- 2 files changed, 4 deletions(-) (limited to 'include') diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 898fb5767e8..a5a0474cd7a 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -85,8 +85,6 @@ void arch_preboot_os(void) DECLARE_GLOBAL_DATA_PTR; int board_init(void) { - /* board id for linux */ - gd->bd->bi_arch_number = MACH_TYPE_LAGER; /* adress of boot parameters */ gd->bd->bi_boot_params = LAGER_SDRAM_BASE + 0x100; diff --git a/include/configs/lager.h b/include/configs/lager.h index 269cfec1eab..ac31128e45c 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -16,8 +16,6 @@ #define CONFIG_RMOBILE #define CONFIG_RMOBILE_BOARD_STRING "Lager" #define CONFIG_SH_GPIO_PFC -#define MACH_TYPE_LAGER 4538 -#define CONFIG_MACH_TYPE MACH_TYPE_LAGER #include -- cgit v1.3.1 From 7f5d0af8744bec612f8eaba423778b1d92d1b7c4 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:34:53 -0300 Subject: wandboard: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Fabio Estevam --- include/configs/wandboard.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 6c74c729525..b137d06e205 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -26,6 +26,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) -- cgit v1.3.1 From 6ca896f923295fa68dbfb56dbd1fa0475a4864e1 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:34:54 -0300 Subject: mx53loco: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Fabio Estevam --- include/configs/mx53loco.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 5859f360e00..12d79b4559b 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -22,6 +22,8 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -- cgit v1.3.1 From 12be4cbe7ccc895a2e79e1ce4d2c44a379a60f37 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:34:55 -0300 Subject: mx6sabre_common: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Fabio Estevam --- include/configs/mx6sabre_common.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index 7a2c172d4a8..e59a3b4b058 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -25,6 +25,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) -- cgit v1.3.1 From 4677b1b60509c7881159c963c435cc7ac02d7595 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:34:56 -0300 Subject: mx53ard: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Fabio Estevam --- include/configs/mx53ard.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index 797a637bf71..134d6804bcf 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -23,6 +23,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) -- cgit v1.3.1 From 5a416df0e10e4b5eab0adec334a2805350d39919 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:34:57 -0300 Subject: mx53smd: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Fabio Estevam --- include/configs/mx53smd.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index a04e7c7a3ef..3da0ef4bd0b 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -23,6 +23,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) -- cgit v1.3.1 From 851f556af09fcff7c7e5c120085bafd4f5719406 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:34:58 -0300 Subject: mx53evk: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Fabio Estevam --- include/configs/mx53evk.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 3f0d80ac680..5bbae8cf7d9 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -23,6 +23,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_OF_LIBFDT /* Size of malloc() pool */ -- cgit v1.3.1 From a980d1e46933b2ff96f6a7148755ffc2bfa1cc87 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:34:59 -0300 Subject: udoo: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Fabio Estevam --- include/configs/udoo.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/udoo.h b/include/configs/udoo.h index a0306de6a33..700e9c1b23c 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -26,6 +26,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M) -- cgit v1.3.1 From 518d225c43f42b9dbe7a6834b848a51dbc8c55db Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 22 Apr 2014 15:35:00 -0300 Subject: hummingboard: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Fabio Estevam --- include/configs/hummingboard.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/hummingboard.h b/include/configs/hummingboard.h index 28955233449..34dbdce1a6c 100644 --- a/include/configs/hummingboard.h +++ b/include/configs/hummingboard.h @@ -27,6 +27,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (2 * SZ_1M) -- cgit v1.3.1 From f7155fa3f09474955dc6c5618ba24389c9e217cb Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Fri, 25 Apr 2014 16:15:46 -0700 Subject: ARM: imx6: nitrogen6x: Enable CONFIG_SYS_GENERIC_BOARD Enable CONFIG_SYS_GENERIC_BOARD, so that we get rid of the following warning on boot: "Warning: Your board does not use generic board. Please read doc/README.generic-board and take action. Boards not upgraded by the late 2014 may break or be removed." Signed-off-by: Eric Nelson --- include/configs/nitrogen6x.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 5805a037f5e..b2b17ce969d 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -24,6 +24,7 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -- cgit v1.3.1 From 0782bdf89878f3b4806b127b60f8d0e72c195354 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 4 Apr 2014 00:41:03 +0200 Subject: arm: mxs: Enable CONFIG_SYS_GENERIC_BOARD Signed-off-by: Marek Vasut --- include/configs/m28evk.h | 1 - include/configs/mxs.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index bb1fa44d80d..3e387c42ddc 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -7,7 +7,6 @@ #ifndef __CONFIGS_M28EVK_H__ #define __CONFIGS_M28EVK_H__ - /* System configurations */ #define CONFIG_MX28 /* i.MX28 SoC */ #define MACH_TYPE_M28EVK 3613 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index ba55177e72b..8bce28fe204 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -40,6 +40,7 @@ /* * CPU specifics */ +#define CONFIG_SYS_GENERIC_BOARD /* MXS uses FDT */ #define CONFIG_OF_LIBFDT -- cgit v1.3.1 From 694c3bc107c61b900e3e0a09dd8f0346b1b7685f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Fri, 11 Apr 2014 08:39:43 -0300 Subject: mx6slevk: Add SPI NOR flash support mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port. Add support for it. Signed-off-by: Fabio Estevam Acked-by: Marek Vasut Reviewed-by: Jagannadha Sutradharudu Teki --- arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 4 ++++ board/freescale/mx6slevk/mx6slevk.c | 20 ++++++++++++++++++++ include/configs/mx6slevk.h | 12 ++++++++++++ 3 files changed, 36 insertions(+) (limited to 'include') diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h index 5f9c90ad874..045ccc4512f 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h @@ -10,6 +10,10 @@ #include enum { + MX6_PAD_ECSPI1_MISO__ECSPI_MISO = IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0), + MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI = IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0), + MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK = IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0), + MX6_PAD_ECSPI1_SS0__GPIO4_IO11 = IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0), MX6_PAD_SD2_CLK__USDHC2_CLK = IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0), MX6_PAD_SD2_CMD__USDHC2_CMD = IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0), MX6_PAD_SD2_DAT0__USDHC2_DAT0 = IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0), diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index aadad3266f3..d2b64cc3574 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -34,6 +34,9 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + #define ETH_PHY_RESET IMX_GPIO_NR(4, 21) int dram_init(void) @@ -71,6 +74,20 @@ static iomux_v3_cfg_t const fec_pads[] = { MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +#ifdef CONFIG_MXC_SPI +static iomux_v3_cfg_t ecspi1_pads[] = { + MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); +} +#endif + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); @@ -132,6 +149,9 @@ static int setup_fec(void) int board_early_init_f(void) { setup_iomux_uart(); +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif return 0; } diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 1876dbf35ad..3d05a647d94 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -10,6 +10,7 @@ #define __CONFIG_H #include +#include #include #include "mx6_common.h" @@ -196,4 +197,15 @@ #define CONFIG_CMD_CACHE #endif +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(4, 11) << 8)) +#define CONFIG_SF_DEFAULT_SPEED 20000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#endif + #endif /* __CONFIG_H */ -- cgit v1.3.1 From 2ee93246bd9efc928d4cced0f3e94be5365de892 Mon Sep 17 00:00:00 2001 From: Łukasz Majewski Date: Wed, 9 Apr 2014 10:44:33 +0200 Subject: trats2: config: fix: Set default console to ttySAC2 During providing device tree support for Exynos4 based boards, a tiny mistake has creeped in the 1ecab0f commit. This commit restores proper setting of default console for the trats2 board. Signed-off-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- include/configs/trats2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 53d449c291a..50d529b132d 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -52,7 +52,7 @@ #define CONFIG_BOOTARGS "Please use defined boot" #define CONFIG_BOOTCOMMAND "run mmcboot" -#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) -- cgit v1.3.1 From 6afc3f6e118bd7a59741261c73613625f575482f Mon Sep 17 00:00:00 2001 From: Łukasz Majewski Date: Wed, 9 Apr 2014 10:44:34 +0200 Subject: trats: config: fix: Set default console to ttySAC2 During providing device tree support for Exynos4 based boards, a tiny mistake has creeped in the fe60164 commit. This commit restores proper setting of default console for the trats board. Signed-off-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- include/configs/trats.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index 5d8bd605836..1b74adbc175 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -59,7 +59,7 @@ #define CONFIG_BOOTARGS "Please use defined boot" #define CONFIG_BOOTCOMMAND "run mmcboot" -#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) -- cgit v1.3.1 From 188c42b33557787128f50e3a5a751747f58dd68f Mon Sep 17 00:00:00 2001 From: Jaehoon Chung Date: Wed, 30 Apr 2014 09:09:15 +0900 Subject: ARM: exynos: remove the unused code "mmc boot" command didn't use anywhere. It can be replace "mmc dev" command. Signed-off-by: Jaehoon Chung Signed-off-by: Minkyu Kang --- include/configs/s5pc210_universal.h | 7 ++----- include/configs/trats.h | 7 ++----- include/configs/trats2.h | 11 +++-------- 3 files changed, 7 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 2da887109d9..db5561ab8c9 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -111,12 +111,9 @@ "onenand write 0x41008000 0xc00000 0x500000\0" \ "bootk=" \ "run loaduimage; bootm 0x40007FC0\0" \ - "updatemmc=" \ - "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ - "mmc boot 0 1 1 0\0" \ "updatebackup=" \ - "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ - "mmc boot 0 1 1 0\0" \ + "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ + "mmc dev 0 0\0" \ "updatebootb=" \ "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ "lpj=lpj=3981312\0" \ diff --git a/include/configs/trats.h b/include/configs/trats.h index 1b74adbc175..815948bbff8 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -121,12 +121,9 @@ "bootm 0x40007FC0 - ${fdtaddr};" \ "fi;" \ "bootm 0x40007FC0;\0" \ - "updatemmc=" \ - "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ - "mmc boot 0 1 1 0\0" \ "updatebackup=" \ - "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ - "mmc boot 0 1 1 0\0" \ + "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \ + "mmc dev 0 0\0" \ "updatebootb=" \ "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ "lpj=lpj=3981312\0" \ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 50d529b132d..30a4b8cd8da 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -111,16 +111,11 @@ "bootm 0x40007FC0 - ${fdtaddr};" \ "fi;" \ "bootm 0x40007FC0;\0" \ - "updatemmc=" \ - "mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \ - "mmc boot 0 1 1 0\0" \ "updatebackup=" \ - "mmc boot 0 1 1 2; mmc write 0x42100000 0 0x200;" \ - " mmc boot 0 1 1 0\0" \ + "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \ + " mmc dev 0 0\0" \ "updatebootb=" \ - "mmc read 0x51000000 0x80 0x200; run updatebackup\0" \ - "updateuboot=" \ - "mmc write 0x50000000 0x80 0x400\0" \ + "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \ "mmcboot=" \ "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ -- cgit v1.3.1 From 5c7b8a379fbd9b069c95332204c359f61a7f1594 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 30 Apr 2014 13:28:07 +0200 Subject: samsung: misc: add gpt restore option to lcd menu This menu option allows restore gpt. This is usefull and no needs access to the u-boot console. For proper operation: - each partition uuid should be set in environment or - CONFIG_RANDOM_UUID should be defined for automatically uuid setting After operation success device is going to be reset. Signed-off-by: Przemyslaw Marczak Cc: Minkyu Kang Signed-off-by: Minkyu Kang --- board/samsung/common/misc.c | 3 +++ include/samsung/misc.h | 1 + 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c index 95d1758f7a7..2fd104d0fe7 100644 --- a/board/samsung/common/misc.c +++ b/board/samsung/common/misc.c @@ -121,6 +121,7 @@ mode_name[BOOT_MODE_EXIT + 1][2] = { {"THOR", "thor"}, {"UMS", "ums"}, {"DFU", "dfu"}, + {"GPT", "gpt"}, {"EXIT", ""}, }; @@ -130,6 +131,7 @@ mode_info[BOOT_MODE_EXIT + 1] = { "downloader", "mass storage", "firmware update", + "restore", "and run normal boot" }; @@ -139,6 +141,7 @@ mode_cmd[BOOT_MODE_EXIT + 1] = { "thor 0 mmc 0", "ums 0 mmc 0", "dfu 0 mmc 0", + "gpt write mmc 0 $partitions", "", }; diff --git a/include/samsung/misc.h b/include/samsung/misc.h index ede6c1583a9..c3d844bc109 100644 --- a/include/samsung/misc.h +++ b/include/samsung/misc.h @@ -15,6 +15,7 @@ enum { BOOT_MODE_THOR, BOOT_MODE_UMS, BOOT_MODE_DFU, + BOOT_MODE_GPT, BOOT_MODE_EXIT, }; -- cgit v1.3.1 From 0954dd61baebcd2de627803ed8e00cc70d9e8b0c Mon Sep 17 00:00:00 2001 From: Inha Song Date: Wed, 30 Apr 2014 13:28:08 +0200 Subject: samsung: misc: add env default option to lcd menu This change allows reset device environment to default without using u-boot console, which is useful for system developers. Signed-off-by: Inha Song Acked-by: Przemyslaw Marczak Cc: Minkyu Kang Signed-off-by: Minkyu Kang --- board/samsung/common/misc.c | 3 +++ include/samsung/misc.h | 1 + 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c index 2fd104d0fe7..65b5c3052e3 100644 --- a/board/samsung/common/misc.c +++ b/board/samsung/common/misc.c @@ -122,6 +122,7 @@ mode_name[BOOT_MODE_EXIT + 1][2] = { {"UMS", "ums"}, {"DFU", "dfu"}, {"GPT", "gpt"}, + {"ENV", "env"}, {"EXIT", ""}, }; @@ -132,6 +133,7 @@ mode_info[BOOT_MODE_EXIT + 1] = { "mass storage", "firmware update", "restore", + "default", "and run normal boot" }; @@ -142,6 +144,7 @@ mode_cmd[BOOT_MODE_EXIT + 1] = { "ums 0 mmc 0", "dfu 0 mmc 0", "gpt write mmc 0 $partitions", + "env default -a; saveenv", "", }; diff --git a/include/samsung/misc.h b/include/samsung/misc.h index c3d844bc109..10653a1b178 100644 --- a/include/samsung/misc.h +++ b/include/samsung/misc.h @@ -16,6 +16,7 @@ enum { BOOT_MODE_UMS, BOOT_MODE_DFU, BOOT_MODE_GPT, + BOOT_MODE_ENV, BOOT_MODE_EXIT, }; -- cgit v1.3.1 From 93a6d92cfa990240314c2299fb7a3a3a39811c07 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 22 Apr 2014 21:53:56 -0700 Subject: power: make pfuze100 be able to coexist with other pmics Avoid uding pmic_init() as this forces the model of only allowing a single PMIC driver to be built at a time. Signed-off-by: Tim Harvey --- drivers/power/pmic/pmic_pfuze100.c | 2 +- include/power/pfuze100_pmic.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/drivers/power/pmic/pmic_pfuze100.c b/drivers/power/pmic/pmic_pfuze100.c index 22c1f15eeb4..21f12d2564e 100644 --- a/drivers/power/pmic/pmic_pfuze100.c +++ b/drivers/power/pmic/pmic_pfuze100.c @@ -11,7 +11,7 @@ #include #include -int pmic_init(unsigned char bus) +int power_pfuze100_init(unsigned char bus) { static const char name[] = "PFUZE100_PMIC"; struct pmic *p = pmic_alloc(); diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h index 2a9032a1f93..444aba6c661 100644 --- a/include/power/pfuze100_pmic.h +++ b/include/power/pfuze100_pmic.h @@ -93,4 +93,5 @@ enum { #define SWBST_MODE_AUTO (2 << 2) #define SWBST_MODE_APS (2 << 3) +int power_pfuze100_init(unsigned char bus); #endif -- cgit v1.3.1 From 5e2f01772a87ddd8592d5a53de85261b62faa7fb Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Tue, 22 Apr 2014 21:53:58 -0700 Subject: power: Add support for LTC3676 PMIC The LTC3676 PMIC includes four DC/DC converters, and three 300mA LDO Regulators (two Adjustable). The DC/DC converters are adjustable based on a resistor devider (board-specific). This adds support for the LTC3676 by creating a namespace unique init function that uses the PMIC API to allocate a pmic and defines the registers. Signed-off-by: Tim Harvey Acked-by: Stefano Babic --- drivers/power/pmic/Makefile | 1 + drivers/power/pmic/pmic_ltc3676.c | 32 ++++++++++++++++++++++++ include/power/ltc3676_pmic.h | 51 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 84 insertions(+) create mode 100644 drivers/power/pmic/pmic_ltc3676.c create mode 100644 include/power/ltc3676_pmic.h (limited to 'include') diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile index 4129bdabfbe..920bbdce6ef 100644 --- a/drivers/power/pmic/Makefile +++ b/drivers/power/pmic/Makefile @@ -5,6 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # +obj-$(CONFIG_POWER_LTC3676) += pmic_ltc3676.o obj-$(CONFIG_POWER_MAX8998) += pmic_max8998.o obj-$(CONFIG_POWER_MAX8997) += pmic_max8997.o obj-$(CONFIG_POWER_MUIC_MAX8997) += muic_max8997.o diff --git a/drivers/power/pmic/pmic_ltc3676.c b/drivers/power/pmic/pmic_ltc3676.c new file mode 100644 index 00000000000..9b874cb07c4 --- /dev/null +++ b/drivers/power/pmic/pmic_ltc3676.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2014 Gateworks Corporation + * Tim Harvey + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +int power_ltc3676_init(unsigned char bus) +{ + static const char name[] = "LTC3676_PMIC"; + struct pmic *p = pmic_alloc(); + + if (!p) { + printf("%s: POWER allocation error!\n", __func__); + return -ENOMEM; + } + + p->name = name; + p->interface = PMIC_I2C; + p->number_of_regs = LTC3676_NUM_OF_REGS; + p->hw.i2c.addr = CONFIG_POWER_LTC3676_I2C_ADDR; + p->hw.i2c.tx_num = 1; + p->bus = bus; + + return 0; +} diff --git a/include/power/ltc3676_pmic.h b/include/power/ltc3676_pmic.h new file mode 100644 index 00000000000..dcaa9851939 --- /dev/null +++ b/include/power/ltc3676_pmic.h @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2014 Gateworks Corporation + * Tim Harvey + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __LTC3676_PMIC_H_ +#define __LTC3676_PMIC_H_ + +/* LTC3676 registers */ +enum { + LTC3676_BUCK1 = 0x01, + LTC3676_BUCK2 = 0x02, + LTC3676_BUCK3 = 0x03, + LTC3676_BUCK4 = 0x04, + LTC3676_LDOA = 0x05, + LTC3676_LDOB = 0x06, + LTC3676_SQD1 = 0x07, + LTC3676_SQD2 = 0x08, + LTC3676_CNTRL = 0x09, + LTC3676_DVB1A = 0x0A, + LTC3676_DVB1B = 0x0B, + LTC3676_DVB2A = 0x0C, + LTC3676_DVB2B = 0x0D, + LTC3676_DVB3A = 0x0E, + LTC3676_DVB3B = 0x0F, + LTC3676_DVB4A = 0x10, + LTC3676_DVB4B = 0x11, + LTC3676_MSKIRQ = 0x12, + LTC3676_MSKPG = 0x13, + LTC3676_USER = 0x14, + LTC3676_HRST = 0x1E, + LTC3676_CLIRQ = 0x1F, + LTC3676_IRQSTAT = 0x15, + LTC3676_PGSTATL = 0x16, + LTC3676_PGSTATR = 0x17, + LTC3676_NUM_OF_REGS = 0x20, +}; + +/* + * SW Configuration + */ + +#define LTC3676_DVB_MASK 0x1f +#define LTC3676_PGOOD_MASK (1<<5) +#define LTC3676_REF_SELA (0<<5) +#define LTC3676_REF_SELB (1<<5) + +int power_ltc3676_init(unsigned char bus); +#endif -- cgit v1.3.1 From 234d89dac61a4f57a0f7cb136a6c442f37a6c9b8 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Mon, 5 May 2014 08:22:25 -0700 Subject: ventana: Add support for the LTC3676 PMIC The LTC3676 PMIC is used instead of the PFUZE100 PMIC on the GW51xx/GW52xx/GW53xx Ventana baseboards. In order to support the IMX6Q SoC at 1GHz on those baseboards, we need to adjust the voltage scaling for the SW1 and SW3 DC/DC converters on the LTC3676 for 1225mV. Note that the scalar values for the LTC3676 are board-specific as they relate to a resistor devider chosen by the board design. Signed-off-by: Tim Harvey --- board/gateworks/gw_ventana/gw_ventana.c | 80 +++++++++++++++++++++++---------- include/configs/gw_ventana.h | 2 + 2 files changed, 59 insertions(+), 23 deletions(-) (limited to 'include') diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 7bc69bdd81c..137f817111d 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -732,6 +733,62 @@ struct ventana gpio_cfg[] = { }, }; +/* setup board specific PMIC */ +int power_init_board(void) +{ + struct pmic *p; + u32 reg; + + /* configure PFUZE100 PMIC */ + if (board_type == GW54xx || board_type == GW54proto) { + power_pfuze100_init(I2C_PMIC); + p = pmic_get("PFUZE100_PMIC"); + if (p && !pmic_probe(p)) { + pmic_reg_read(p, PFUZE100_DEVICEID, ®); + printf("PMIC: PFUZE100 ID=0x%02x\n", reg); + + /* Set VGEN1 to 1.5V and enable */ + pmic_reg_read(p, PFUZE100_VGEN1VOL, ®); + reg &= ~(LDO_VOL_MASK); + reg |= (LDOA_1_50V | LDO_EN); + pmic_reg_write(p, PFUZE100_VGEN1VOL, reg); + + /* Set SWBST to 5.0V and enable */ + pmic_reg_read(p, PFUZE100_SWBSTCON1, ®); + reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK); + reg |= (SWBST_5_00V | SWBST_MODE_AUTO); + pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); + } + } + + /* configure LTC3676 PMIC */ + else { + power_ltc3676_init(I2C_PMIC); + p = pmic_get("LTC3676_PMIC"); + if (p && !pmic_probe(p)) { + puts("PMIC: LTC3676\n"); + /* set board-specific scalar to 1225mV for IMX6Q@1GHz */ + if (is_cpu_type(MXC_CPU_MX6Q)) { + /* mask PGOOD during SW1 transition */ + reg = 0x1d | LTC3676_PGOOD_MASK; + pmic_reg_write(p, LTC3676_DVB1B, reg); + /* set SW1 (VDD_SOC) to 1259mV */ + reg = 0x1d; + pmic_reg_write(p, LTC3676_DVB1A, reg); + + /* mask PGOOD during SW3 transition */ + reg = 0x1d | LTC3676_PGOOD_MASK; + pmic_reg_write(p, LTC3676_DVB3B, reg); + /*set SW3 (VDD_ARM) to 1259mV */ + reg = 0x1d; + pmic_reg_write(p, LTC3676_DVB3A, reg); + } + } + } + + return 0; +} + /* setup GPIO pinmux and default configuration per baseboard */ static void setup_board_gpio(int board) { @@ -1075,29 +1132,6 @@ int misc_init_r(void) setenv("serial#", str); } - /* configure PFUZE100 PMIC (not used on all Ventana baseboards) */ - power_pfuze100_init(I2C_PMIC); - if (board_type == GW54xx || board_type == GW54proto) { - struct pmic *p = pmic_get("PFUZE100_PMIC"); - u32 reg; - - if (p && !pmic_probe(p)) { - pmic_reg_read(p, PFUZE100_DEVICEID, ®); - printf("PMIC: PFUZE100 ID=0x%02x\n", reg); - - /* Set VGEN1 to 1.5V and enable */ - pmic_reg_read(p, PFUZE100_VGEN1VOL, ®); - reg &= ~(LDO_VOL_MASK); - reg |= (LDOA_1_50V | LDO_EN); - pmic_reg_write(p, PFUZE100_VGEN1VOL, reg); - - /* Set SWBST to 5.0V and enable */ - pmic_reg_read(p, PFUZE100_SWBSTCON1, ®); - reg &= ~(SWBST_MODE_MASK | SWBST_VOL_MASK); - reg |= (SWBST_5_00V | SWBST_MODE_AUTO); - pmic_reg_write(p, PFUZE100_SWBSTCON1, reg); - } - } /* setup baseboard specific GPIO pinmux and config */ setup_board_gpio(board_type); diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 33983907f22..b984f270491 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -136,6 +136,8 @@ #define CONFIG_POWER_I2C #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 +#define CONFIG_POWER_LTC3676 +#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c /* Various command support */ #include -- cgit v1.3.1 From effb7dc6d92ddb862a305037db12241f2ab75257 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Fri, 25 Apr 2014 15:17:00 -0700 Subject: imx: ventana: Convert to generic board Enable CONFIG_SYS_GENERIC_BOARD on ventana. Signed-off-by: Tim Harvey --- include/configs/gw_ventana.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index b984f270491..335f2ff6aa5 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -24,6 +24,8 @@ #define CONFIG_SERIAL_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -- cgit v1.3.1 From 7a278f9f1b178719f299d5dc9479b636fb153e34 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Fri, 25 Apr 2014 15:39:07 -0700 Subject: imx: ventana: add HDMI and LVDS display capability Signed-off-by: Tim Harvey --- board/gateworks/gw_ventana/gw_ventana.c | 133 ++++++++++++++++++++++++++++++++ include/configs/gw_ventana.h | 16 ++++ 2 files changed, 149 insertions(+) (limited to 'include') diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index bce11b24d62..031367d97a8 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -19,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -369,6 +371,134 @@ int board_eth_init(bd_t *bis) return 0; } +#if defined(CONFIG_VIDEO_IPUV3) + +static void enable_hdmi(struct display_info_t const *dev) +{ + imx_enable_hdmi_phy(); +} + +static int detect_i2c(struct display_info_t const *dev) +{ + return i2c_set_bus_num(dev->bus) == 0 && + i2c_probe(dev->addr) == 0; +} + +static void enable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *) + IOMUXC_BASE_ADDR; + + /* set CH0 data width to 24bit (IOMUXC_GPR2:5 0=18bit, 1=24bit) */ + u32 reg = readl(&iomux->gpr[2]); + reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT; + writel(reg, &iomux->gpr[2]); + + /* Enable Backlight */ + imx_iomux_v3_setup_pad(MX6_PAD_SD1_CMD__GPIO1_IO18 | + MUX_PAD_CTRL(NO_PAD_CTRL)); + gpio_direction_output(IMX_GPIO_NR(1, 18), 1); +} + +struct display_info_t const displays[] = {{ + /* HDMI Output */ + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + /* Freescale MXC-LVDS1: HannStar HSD100PXN1-A00 w/ egalx_ts cont */ + .bus = 2, + .addr = 0x4, + .pixfmt = IPU_PIX_FMT_LVDS666, + .detect = detect_i2c, + .enable = enable_lvds, + .mode = { + .name = "Hannstar-XGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} } }; +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg; + + enable_ipu_clock(); + imx_setup_hdmi(); + /* Turn on LDB0,IPU,IPU DI0 clocks */ + reg = __raw_readl(&mxc_ccm->CCGR3); + reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; + writel(reg, &mxc_ccm->CCGR3); + + /* set LDB0, LDB1 clk select to 011/011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK + |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3<cs2cdr); + + reg = readl(&mxc_ccm->cscmr2); + reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; + writel(reg, &mxc_ccm->cscmr2); + + reg = readl(&mxc_ccm->chsccdr); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 + <chsccdr); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES + |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH + |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW + |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG + |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT + |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG + |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT + |IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED + |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + + reg = readl(&iomux->gpr[3]); + reg = (reg & ~IOMUXC_GPR3_LVDS0_MUX_CTL_MASK) + | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 + <gpr[3]); + + /* Backlight CABEN on LVDS connector */ + imx_iomux_v3_setup_pad(MX6_PAD_SD2_CLK__GPIO1_IO10 | + MUX_PAD_CTRL(NO_PAD_CTRL)); + gpio_direction_output(IMX_GPIO_NR(1, 10), 0); +} +#endif /* CONFIG_VIDEO_IPUV3 */ + /* read ventana EEPROM, check for validity, and return baseboard type */ static int read_eeprom(void) @@ -944,6 +1074,9 @@ int board_early_init_f(void) setup_iomux_uart(); gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */ +#if defined(CONFIG_VIDEO_IPUV3) + setup_display(); +#endif return 0; } diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 335f2ff6aa5..cd554957dd8 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -194,6 +194,22 @@ #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP #define CONFIG_USB_HUB_MIN_POWER_ON_DELAY 1200 +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + /* serial console (ttymxc1,115200) */ #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -- cgit v1.3.1 From 8bc7c4874979acc2418327df7a942f6b729794c6 Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 1 May 2014 19:02:31 -0300 Subject: wandboard: add Future Eletronics 7" WVGA LCD extension board This adds support for the 7" WVGA produced by Future Eletronics and make it dynamically detect if it is connected or not based on the touchscreen controller. Signed-off-by: Otavio Salvador Acked-by: Stefano Babic --- board/wandboard/wandboard.c | 146 ++++++++++++++++++++++++++++++++++++-------- include/configs/wandboard.h | 7 +++ 2 files changed, 127 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index f1951dc5ef0..3c8b7a5d2d0 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -1,5 +1,6 @@ /* * Copyright (C) 2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014 O.S. Systems Software LTDA. * * Author: Fabio Estevam * @@ -15,18 +16,19 @@ #include #include #include +#include #include +#include #include #include #include #include -#include #include #include #include -#include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -41,6 +43,10 @@ DECLARE_GLOBAL_DATA_PTR; #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + #define USDHC1_CD_GPIO IMX_GPIO_NR(1, 2) #define USDHC3_CD_GPIO IMX_GPIO_NR(3, 9) #define ETH_PHY_RESET IMX_GPIO_NR(3, 29) @@ -210,38 +216,120 @@ int board_phy_config(struct phy_device *phydev) } #if defined(CONFIG_VIDEO_IPUV3) -static struct fb_videomode const hdmi = { - .name = "HDMI", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED +struct i2c_pads_info i2c2_pad_info = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 + | MUX_PAD_CTRL(I2C_PAD_CTRL), + .gp = IMX_GPIO_NR(4, 13) + } }; -int board_video_skip(void) -{ - int ret; +static iomux_v3_cfg_t const fwadapt_7wvga_pads[] = { + MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, + MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, /* HSync */ + MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, /* VSync */ + MX6_PAD_DI0_PIN4__IPU1_DI0_PIN04 + | MUX_PAD_CTRL(PAD_CTL_DSE_120ohm), /* Contrast */ + MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, /* DISP0_DRDY */ + + MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00, + MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01, + MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02, + MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03, + MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04, + MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05, + MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06, + MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07, + MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08, + MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09, + MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10, + MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11, + MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12, + MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13, + MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14, + MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15, + MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16, + MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17, + + MX6_PAD_SD4_DAT2__GPIO2_IO10 + | MUX_PAD_CTRL(NO_PAD_CTRL), /* DISP0_BKLEN */ + MX6_PAD_SD4_DAT3__GPIO2_IO11 + | MUX_PAD_CTRL(NO_PAD_CTRL), /* DISP0_VDDEN */ +}; - ret = ipuv3_fb_init(&hdmi, 0, IPU_PIX_FMT_RGB24); +static void do_enable_hdmi(struct display_info_t const *dev) +{ + imx_enable_hdmi_phy(); +} - if (ret) { - printf("HDMI cannot be configured: %d\n", ret); - return ret; - } +static int detect_i2c(struct display_info_t const *dev) +{ + return (0 == i2c_set_bus_num(dev->bus)) && + (0 == i2c_probe(dev->addr)); +} - imx_enable_hdmi_phy(); +static void enable_fwadapt_7wvga(struct display_info_t const *dev) +{ + imx_iomux_v3_setup_multiple_pads( + fwadapt_7wvga_pads, + ARRAY_SIZE(fwadapt_7wvga_pads)); - return ret; + gpio_direction_output(IMX_GPIO_NR(2, 10), 1); + gpio_direction_output(IMX_GPIO_NR(2, 11), 1); } +struct display_info_t const displays[] = {{ + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = do_enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = 1, + .addr = 0x10, + .pixfmt = IPU_PIX_FMT_RGB666, + .detect = detect_i2c, + .enable = enable_fwadapt_7wvga, + .mode = { + .name = "FWBADAPT-LCD-F07A-0102", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 33260, + .left_margin = 128, + .right_margin = 128, + .upper_margin = 22, + .lower_margin = 22, + .hsync_len = 1, + .vsync_len = 1, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED +} } }; +size_t display_count = ARRAY_SIZE(displays); + static void setup_display(void) { struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; @@ -254,6 +342,10 @@ static void setup_display(void) reg |= (CHSCCDR_CLK_SEL_LDB_DI0 << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); writel(reg, &mxc_ccm->chsccdr); + + /* Disable LCD backlight */ + imx_iomux_v3_setup_pad(MX6_PAD_DI0_PIN4__GPIO4_IO20); + gpio_direction_input(IMX_GPIO_NR(4, 20)); } #endif /* CONFIG_VIDEO_IPUV3 */ @@ -305,6 +397,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c2_pad_info); + return 0; } diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index b137d06e205..584fc9ecce1 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -58,6 +58,12 @@ #define CONFIG_LOADADDR 0x12000000 #define CONFIG_SYS_TEXT_BASE 0x17800000 +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + /* MMC Configuration */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC @@ -101,6 +107,7 @@ #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IPUV3_CLK 260000000 #define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP #if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) #define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb" -- cgit v1.3.1 From 0ef797a59eba57a03ab40af439c7968b8a45d31b Mon Sep 17 00:00:00 2001 From: Otavio Salvador Date: Thu, 1 May 2014 19:02:32 -0300 Subject: wandboard: Pass video kernel arguments for HDMI and LCD This checks if the 7" WVGA produced by Future Eletronics is detected and pass the needed kernel arguments for it to work. Signed-off-by: Otavio Salvador --- include/configs/wandboard.h | 29 ++++++++++++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 584fc9ecce1..7d96908f0e4 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -106,6 +106,7 @@ #define CONFIG_VIDEO_LOGO #define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP @@ -144,7 +145,33 @@ "fi; " \ "fi\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=${mmcroot}\0" \ + "root=${mmcroot}; run videoargs\0" \ + "videoargs=" \ + "setenv nextcon 0; " \ + "if hdmidet; then " \ + "setenv bootargs ${bootargs} " \ + "video=mxcfb${nextcon}:dev=hdmi,1280x720M@60," \ + "if=RGB24; " \ + "setenv fbmen fbmem=28M; " \ + "setexpr nextcon ${nextcon} + 1; " \ + "else " \ + "echo - no HDMI monitor;" \ + "fi; " \ + "i2c dev 1; " \ + "if i2c probe 0x10; then " \ + "setenv bootargs ${bootargs} " \ + "video=mxcfb${nextcon}:dev=lcd,800x480@60," \ + "if=RGB666; " \ + "if test 0 -eq ${nextcon}; then " \ + "setenv fbmem fbmem=10M; " \ + "else " \ + "setenv fbmem ${fbmem},10M; " \ + "fi; " \ + "setexpr nextcon ${nextcon} + 1; " \ + "else " \ + "echo '- no FWBADAPT-7WVGA-LCD-F07A-0102 display';" \ + "fi; " \ + "setenv bootargs ${bootargs} ${fbmem}\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ -- cgit v1.3.1 From e6fe968b821c3762ad6d7b68ef7ecabf4b40c6a3 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Tue, 6 May 2014 20:07:04 +0530 Subject: Exynos5: config: Enable FIT Adding two configs: * CONFIG_FIT - Enable FIT image support. * CONFIG_FIT_BEST_MATCH - Enable fetching correct DTB from FIT image by comparing compatibles. Signed-off-by: Akshay Saraswat Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- include/configs/smdk5250.h | 4 ++++ include/configs/smdk5420.h | 4 ++++ include/configs/snow.h | 4 ++++ 3 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 183aae726d5..66fa1799e7b 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -14,4 +14,8 @@ #undef CONFIG_DEFAULT_DEVICE_TREE #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-smdk5250 +/* Enable FIT support and comparison */ +#define CONFIG_FIT +#define CONFIG_FIT_BEST_MATCH + #endif /* __CONFIG_SMDK_H */ diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index b96eea88908..58f706a3a7f 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -51,4 +51,8 @@ #define CONFIG_MAX_I2C_NUM 11 +/* Enable FIT support and comparison */ +#define CONFIG_FIT +#define CONFIG_FIT_BEST_MATCH + #endif /* __CONFIG_5420_H */ diff --git a/include/configs/snow.h b/include/configs/snow.h index ed5c0b614fa..673fa1469b8 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -14,4 +14,8 @@ #undef CONFIG_DEFAULT_DEVICE_TREE #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-snow +/* Enable FIT support and comparison */ +#define CONFIG_FIT +#define CONFIG_FIT_BEST_MATCH + #endif /* __CONFIG_SNOW_H */ -- cgit v1.3.1 From 9b97b727dcfbdc02a0a78e4c1d81670742f28784 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Tue, 13 May 2014 10:30:15 +0530 Subject: S5P: Exynos: Config: Enable GPIO CMD config Enabling configs for GPIO CMD, EXYNOS4 family and replacing exynos_gpio_get with new linear GPIO pin number required because of the new function asking only 2 arguments (pin and value) instead of 3 (bank, pin and value). Signed-off-by: Akshay Saraswat Acked-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- include/configs/exynos5-dt.h | 2 ++ include/configs/s5p_goni.h | 4 ++-- include/configs/s5pc210_universal.h | 16 ++++++++-------- include/configs/smdkv310.h | 1 + include/configs/trats.h | 8 ++++---- include/configs/trats2.h | 4 ++-- 6 files changed, 19 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h index 414db420dc3..5a9b1b42d31 100644 --- a/include/configs/exynos5-dt.h +++ b/include/configs/exynos5-dt.h @@ -288,4 +288,6 @@ #define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_GPIO + #endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 991c43e1cc2..799d4fe9d8c 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -214,8 +214,8 @@ /* * I2C Settings */ -#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get(j4, 3) -#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get(j4, 0) +#define CONFIG_SOFT_I2C_GPIO_SCL S5PC110_GPIO_J43 +#define CONFIG_SOFT_I2C_GPIO_SDA S5PC110_GPIO_J40 #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index db5561ab8c9..eb046cdac92 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -167,8 +167,8 @@ /* * I2C Settings */ -#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(1, b, 7) -#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(1, b, 6) +#define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_B7 +#define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_B6 #define CONFIG_CMD_I2C @@ -193,10 +193,10 @@ */ #define CONFIG_SOFT_SPI #define CONFIG_SOFT_SPI_MODE SPI_MODE_3 -#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_get(2, y3, 1) -#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_get(2, y3, 3) -#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_get(2, y3, 0) -#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_get(2, y4, 3) +#define CONFIG_SOFT_SPI_GPIO_SCLK EXYNOS4_GPIO_Y31 +#define CONFIG_SOFT_SPI_GPIO_MOSI EXYNOS4_GPIO_Y33 +#define CONFIG_SOFT_SPI_GPIO_MISO EXYNOS4_GPIO_Y30 +#define CONFIG_SOFT_SPI_GPIO_CS EXYNOS4_GPIO_Y43 #define SPI_DELAY udelay(1) #undef SPI_INIT @@ -228,8 +228,8 @@ int universal_spi_read(void); #define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1 #define KEY_PWR_INTERRUPT_MASK (1 << 7) -#define KEY_VOL_UP_GPIO exynos4_gpio_get(2, x2, 0) -#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) +#define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 +#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 #endif /* __ASSEMBLY__ */ /* LCD console */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 1388f499860..34adfaf6085 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -12,6 +12,7 @@ /* High Level Configuration Options */ #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ #define CONFIG_S5P 1 /* S5P Family */ +#define CONFIG_EXYNOS4 /* EXYNOS4 Family */ #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ #define CONFIG_SMDKV310 1 /* working with SMDKV310*/ diff --git a/include/configs/trats.h b/include/configs/trats.h index 815948bbff8..fc16911686a 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -204,8 +204,8 @@ #define CONFIG_SYS_I2C_INIT_BOARD /* I2C FG */ -#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1) -#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0) +#define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_Y41 +#define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_Y40 /* POWER */ #define CONFIG_POWER @@ -242,8 +242,8 @@ #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 #define KEY_PWR_INTERRUPT_MASK (1 << 0) -#define KEY_VOL_UP_GPIO exynos4_gpio_get(2, x2, 0) -#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) +#define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20 +#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21 #endif /* __ASSEMBLY__ */ /* LCD console */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 30a4b8cd8da..3d5f21dde07 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -222,8 +222,8 @@ int get_soft_i2c_sda_pin(void); #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1 #define KEY_PWR_INTERRUPT_MASK (1 << 1) -#define KEY_VOL_UP_GPIO exynos4x12_gpio_get(2, x2, 2) -#define KEY_VOL_DOWN_GPIO exynos4x12_gpio_get(2, x3, 3) +#define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22 +#define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33 #endif /* __ASSEMBLY__ */ /* LCD console */ -- cgit v1.3.1 From f175603f7c4fe614c913476bfec78a36ae8be7a3 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 18 Apr 2014 10:56:11 -0600 Subject: ARM: tegra: set CONFIG_SYS_MMC_MAX_DEVICE If CONFIG_API is ever to be enabled on Tegra, this define must be set, since api/api_storage.c uses it. A couple of annoyting things about CONFIG_SYS_MMC_MAX_DEVICE 1) It isn't documented in README. The same is true for a lot of similar defines used by api_storage.c. 2) It doesn't represent MAX_DEVICE but rather NUM_DEVICES, since the valid values are 0..n-1 not 0..n. However, I this patch does not address those shortcomings. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- arch/arm/include/asm/arch-tegra/tegra_mmc.h | 2 -- drivers/mmc/tegra_mmc.c | 13 ++++++++----- include/configs/tegra-common.h | 7 +++++++ 3 files changed, 15 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h index 310bbd7df9f..84e7b5553de 100644 --- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h +++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h @@ -14,8 +14,6 @@ /* for mmc_config definition */ #include -#define MAX_HOSTS 4 /* Max number of 'hosts'/controllers */ - #ifndef __ASSEMBLY__ struct tegra_mmc { unsigned int sysad; /* _SYSTEM_ADDRESS_0 */ diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index ed67eec2527..ca9c4aa15fe 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -18,7 +18,7 @@ DECLARE_GLOBAL_DATA_PTR; -struct mmc_host mmc_host[MAX_HOSTS]; +struct mmc_host mmc_host[CONFIG_SYS_MMC_MAX_DEVICE]; #ifndef CONFIG_OF_CONTROL #error "Please enable device tree support to use this driver" @@ -669,13 +669,14 @@ static int process_nodes(const void *blob, int node_list[], int count) void tegra_mmc_init(void) { - int node_list[MAX_HOSTS], count; + int node_list[CONFIG_SYS_MMC_MAX_DEVICE], count; const void *blob = gd->fdt_blob; debug("%s entry\n", __func__); /* See if any Tegra124 MMC controllers are present */ count = fdtdec_find_aliases_for_id(blob, "sdhci", - COMPAT_NVIDIA_TEGRA124_SDMMC, node_list, MAX_HOSTS); + COMPAT_NVIDIA_TEGRA124_SDMMC, node_list, + CONFIG_SYS_MMC_MAX_DEVICE); debug("%s: count of Tegra124 sdhci nodes is %d\n", __func__, count); if (process_nodes(blob, node_list, count)) { printf("%s: Error processing T30 mmc node(s)!\n", __func__); @@ -684,7 +685,8 @@ void tegra_mmc_init(void) /* See if any Tegra30 MMC controllers are present */ count = fdtdec_find_aliases_for_id(blob, "sdhci", - COMPAT_NVIDIA_TEGRA30_SDMMC, node_list, MAX_HOSTS); + COMPAT_NVIDIA_TEGRA30_SDMMC, node_list, + CONFIG_SYS_MMC_MAX_DEVICE); debug("%s: count of T30 sdhci nodes is %d\n", __func__, count); if (process_nodes(blob, node_list, count)) { printf("%s: Error processing T30 mmc node(s)!\n", __func__); @@ -693,7 +695,8 @@ void tegra_mmc_init(void) /* Now look for any Tegra20 MMC controllers */ count = fdtdec_find_aliases_for_id(blob, "sdhci", - COMPAT_NVIDIA_TEGRA20_SDMMC, node_list, MAX_HOSTS); + COMPAT_NVIDIA_TEGRA20_SDMMC, node_list, + CONFIG_SYS_MMC_MAX_DEVICE); debug("%s: count of T20 sdhci nodes is %d\n", __func__, count); if (process_nodes(blob, node_list, count)) { printf("%s: Error processing T20 mmc node(s)!\n", __func__); diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index ae786cfd7a0..129acf2cbf8 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -47,6 +47,13 @@ #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +/* + * Common HW configuration. + * If this varies between SoCs later, move to tegraNN-common.h + * Note: This is number of devices, not max device ID. + */ +#define CONFIG_SYS_MMC_MAX_DEVICE 4 + /* * select serial console configuration */ -- cgit v1.3.1 From 2364e151e432b4ccf32dc9e6147121253d4ff86d Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 8 May 2014 09:33:45 -0600 Subject: ARM: tegra: use a CPU freq that all SKUs can support U-Boot on Tegra30 currently selects a main CPU frequency that cannot be supported at all on some SKUs, and needs higher VDD_CPU/VDD_CORE values on some others. This can result in unreliable operation of the main CPUs. Resolve this by switching to a CPU frequency that can be supported by any SKU. According to the following link, the maximum supported CPU frequency of the slowest Tegra30 SKU is 600MHz: repo http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=summary branch l4t/l4t-r16-r2 path arch/arm/mach-tegra/tegra3_dvfs.c table cpu_dvfs_table[] According to that same table, the minimum VDD_CPU required to operate at that frequency across all SKUs is 1.007V. Given the adjustment resolution of the TPS65911 PMIC that's used on all Tegra30-based boards we support, we'll end up using 1.0125V instead. At that VDD_CPU, tegra3_get_core_floor_mv() in that same file dictates that VDD_CORE must be at least 1.2V on all SKUs. According to tegra_core_speedo_mv() (in tegra3_speedo.c in the same source tree), that voltage is safe for all SKUs. An alternative would be to port much of the code from tegra3_dvfs.c and tegra3_speedo.c in the kernel tree mentioned above. That's more work than I want to take on right now. While all the currently supported boards use the same regulator chip for VDD_CPU, different types of regulators are used for VDD_CORE. Hence, we add some small conditional code to select how VDD_CORE is programmed. If this becomes more complex in the future as new boards are added, or we end up adding code to detect the SoC SKU and dynamically determine the allowed frequency and required voltages, we should probably make this a runtime call into a function provided by the board file and/or relevant PMIC driver. Cc: Alban Bedel Cc: Marcel Ziswiler Cc: Bard Liao Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- arch/arm/cpu/arm720t/tegra-common/cpu.c | 10 +++++----- arch/arm/cpu/arm720t/tegra30/cpu.c | 23 +++++++++++++++++++++-- include/configs/beaver.h | 3 +++ include/configs/cardhu.h | 3 +++ 4 files changed, 32 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c b/arch/arm/cpu/arm720t/tegra-common/cpu.c index 168f525ec7c..c6f3b029a16 100644 --- a/arch/arm/cpu/arm720t/tegra-common/cpu.c +++ b/arch/arm/cpu/arm720t/tegra-common/cpu.c @@ -82,7 +82,7 @@ struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = { { .n = 600, .m = 13, .p = 0, .cpcon = 12 }, /* OSC: 26.0 MHz */ }, /* - * T30: 1.4 GHz + * T30: 600 MHz * * Register Field Bits Width * ------------------------------ @@ -92,10 +92,10 @@ struct clk_pll_table tegra_pll_x_table[TEGRA_SOC_CNT][CLOCK_OSC_FREQ_COUNT] = { * PLLX_MISC cpcon 11: 8 4 */ { - { .n = 862, .m = 8, .p = 0, .cpcon = 8 }, /* OSC: 13.0 MHz */ - { .n = 583, .m = 8, .p = 0, .cpcon = 4 }, /* OSC: 19.2 MHz */ - { .n = 700, .m = 6, .p = 0, .cpcon = 8 }, /* OSC: 12.0 MHz */ - { .n = 700, .m = 13, .p = 0, .cpcon = 8 }, /* OSC: 26.0 MHz */ + { .n = 600, .m = 13, .p = 0, .cpcon = 8 }, /* OSC: 13.0 MHz */ + { .n = 500, .m = 16, .p = 0, .cpcon = 8 }, /* OSC: 19.2 MHz */ + { .n = 600, .m = 12, .p = 0, .cpcon = 8 }, /* OSC: 12.0 MHz */ + { .n = 600, .m = 26, .p = 0, .cpcon = 8 }, /* OSC: 26.0 MHz */ }, /* * T114: 700 MHz diff --git a/arch/arm/cpu/arm720t/tegra30/cpu.c b/arch/arm/cpu/arm720t/tegra30/cpu.c index 85a945bc791..9003902e3ff 100644 --- a/arch/arm/cpu/arm720t/tegra30/cpu.c +++ b/arch/arm/cpu/arm720t/tegra30/cpu.c @@ -41,10 +41,18 @@ void tegra_i2c_ll_write_data(uint data, uint config) writel(config, ®->cnfg); } +#define TPS62366A_I2C_ADDR 0xC0 +#define TPS62366A_SET1_REG 0x01 +#define TPS62366A_SET1_DATA (0x4600 | TPS62366A_SET1_REG) + +#define TPS62361B_I2C_ADDR 0xC0 +#define TPS62361B_SET3_REG 0x03 +#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) + #define TPS65911_I2C_ADDR 0x5A #define TPS65911_VDDCTRL_OP_REG 0x28 #define TPS65911_VDDCTRL_SR_REG 0x27 -#define TPS65911_VDDCTRL_OP_DATA (0x2300 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) #define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) #define I2C_SEND_2_BYTES 0x0A02 @@ -58,9 +66,20 @@ static void enable_cpu_power_rail(void) reg |= CPUPWRREQ_OE; writel(reg, &pmc->pmc_cntrl); + /* Set VDD_CORE to 1.200V. */ +#ifdef CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 + tegra_i2c_ll_write_addr(TPS62366A_I2C_ADDR, 2); + tegra_i2c_ll_write_data(TPS62366A_SET1_DATA, I2C_SEND_2_BYTES); +#endif +#ifdef CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 + tegra_i2c_ll_write_addr(TPS62361B_I2C_ADDR, 2); + tegra_i2c_ll_write_data(TPS62361B_SET3_DATA, I2C_SEND_2_BYTES); +#endif + udelay(1000); + /* * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. - * First set VDD to 1.0V, then enable the VDD regulator. + * First set VDD to 1.0125V, then enable the VDD regulator. */ tegra_i2c_ll_write_addr(TPS65911_I2C_ADDR, 2); tegra_i2c_ll_write_data(TPS65911_VDDCTRL_OP_DATA, I2C_SEND_2_BYTES); diff --git a/include/configs/beaver.h b/include/configs/beaver.h index df9a98bca6e..9ff089e67c3 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -21,6 +21,9 @@ #include "tegra30-common.h" +/* VDD core PMIC */ +#define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 + /* Enable fdt support for Beaver. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra30-beaver #define CONFIG_OF_CONTROL diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index e15b52737b2..59f429cf578 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -21,6 +21,9 @@ #include "tegra30-common.h" +/* VDD core PMIC */ +#define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 + /* Enable fdt support for Cardhu. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra30-cardhu #define CONFIG_OF_CONTROL -- cgit v1.3.1 From 0eaf416eea55264a75a5b388280e28574aab5e11 Mon Sep 17 00:00:00 2001 From: "Khoronzhuk, Ivan" Date: Tue, 15 Apr 2014 21:32:25 +0300 Subject: config: k2hk_evm: Add generic board support We should use generic board in order the ARM maintainer be able to remove arch/arm/lib/board.c Signed-off-by: Ivan Khoronzhuk --- include/configs/k2hk_evm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h index 9bb8f342b60..dde73298fc4 100644 --- a/include/configs/k2hk_evm.h +++ b/include/configs/k2hk_evm.h @@ -165,6 +165,7 @@ #define CONFIG_CMD_EEPROM /* U-Boot general configuration */ +#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_PROMPT "K2HK EVM # " #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_PBSIZE 2048 -- cgit v1.3.1 From 9fc2ed40cd32cbb488e7a765e393e6b7ff21c1bc Mon Sep 17 00:00:00 2001 From: "Egli, Samuel" Date: Thu, 24 Apr 2014 17:57:52 +0200 Subject: siemens: cosmetic: remove unused and rename defines For dxr2 board DXR2_IOCTRL_VAL is set by data in EEPROM. In pxm2 board it does not make sense to have dxr2 as prefix. Replace it with more meaningful DDR prefix. Signed-off-by: Samuel Egli Cc: Pascal Bach Cc: Roger Meier Cc: Heiko Schocher Cc: Wolfgang Denk --- board/siemens/pxm2/board.c | 10 +++++----- include/configs/dxr2.h | 1 - include/configs/pxm2.h | 2 +- 3 files changed, 6 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c index 98083d52cd9..64e69dc93dd 100644 --- a/board/siemens/pxm2/board.c +++ b/board/siemens/pxm2/board.c @@ -70,11 +70,11 @@ struct cmd_control pxm2_ddr3_cmd_ctrl_data = { }; const struct ctrl_ioregs ioregs = { - .cm0ioctl = DXR2_IOCTRL_VAL, - .cm1ioctl = DXR2_IOCTRL_VAL, - .cm2ioctl = DXR2_IOCTRL_VAL, - .dt0ioctl = DXR2_IOCTRL_VAL, - .dt1ioctl = DXR2_IOCTRL_VAL, + .cm0ioctl = DDR_IOCTRL_VAL, + .cm1ioctl = DDR_IOCTRL_VAL, + .cm2ioctl = DDR_IOCTRL_VAL, + .dt0ioctl = DDR_IOCTRL_VAL, + .dt1ioctl = DDR_IOCTRL_VAL, }; config_ddr(DDR_PLL_FREQ, &ioregs, &pxm2_ddr3_data, diff --git a/include/configs/dxr2.h b/include/configs/dxr2.h index 75f7812e7d6..4612f858efd 100644 --- a/include/configs/dxr2.h +++ b/include/configs/dxr2.h @@ -20,7 +20,6 @@ #include "siemens-am33x-common.h" #define CONFIG_SYS_MPUCLK 275 -#define DXR2_IOCTRL_VAL 0x18b #define DDR_PLL_FREQ 303 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 6276d43395e..d75d5629639 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -21,7 +21,7 @@ #include "siemens-am33x-common.h" #define CONFIG_SYS_MPUCLK 720 -#define DXR2_IOCTRL_VAL 0x18b +#define DDR_IOCTRL_VAL 0x18b #define DDR_PLL_FREQ 266 #define BOARD_DFU_BUTTON_GPIO 59 -- cgit v1.3.1 From 84112b51719fa1a97e41410e1d8853ef3d6202ef Mon Sep 17 00:00:00 2001 From: "Egli, Samuel" Date: Thu, 24 Apr 2014 17:57:55 +0200 Subject: siemens: change LED indication in DFU mode In order to have the same LED indication like in another product when ready for updating, enable only red led and disable status LED when entering DFU mode. The status LED is only switched off when defined in board file. Signed-off-by: Samuel Egli Cc: Roger Meier Cc: Heiko Schocher Cc: Wolfgang Denk --- include/configs/dxr2.h | 3 ++- include/configs/siemens-am33x-common.h | 6 +++++- 2 files changed, 7 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/dxr2.h b/include/configs/dxr2.h index 4612f858efd..76e6cac77ca 100644 --- a/include/configs/dxr2.h +++ b/include/configs/dxr2.h @@ -24,7 +24,8 @@ #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC #define BOARD_DFU_BUTTON_GPIO 27 -#define BOARD_DFU_BUTTON_LED 64 +#define BOARD_DFU_BUTTON_LED 64 /* red LED */ +#define BOARD_STATUS_LED 103 /* green LED */ #define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ #undef CONFIG_DOS_PARTITION diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 721c4e6badc..261b348baed 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -402,7 +402,11 @@ "dfu_args=run bootargs_defaults;" \ "setenv bootargs ${bootargs} ;" \ "mtdparts default; " \ - "dfu 0 nand 0; \0" \ + "led dfu 1;" \ + "led stat 0;" \ + "dfu 0 nand 0;" \ + "led dfu 0;" \ + "led stat 1;\0" \ "dfu_alt_info=" DFU_ALT_INFO_NAND "\0" \ "net_args=run bootargs_defaults;" \ "mtdparts default;" \ -- cgit v1.3.1 From 66c45faefb30131ac0963aa6dcc6b80d9bf1983a Mon Sep 17 00:00:00 2001 From: "Egli, Samuel" Date: Thu, 24 Apr 2014 17:57:56 +0200 Subject: siemens: cosmetic: rename project_dir Signed-off-by: Samuel Egli Cc: Roger Meier Cc: Heiko Schocher Cc: Wolfgang Denk --- include/configs/siemens-am33x-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 261b348baed..73a123d430b 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -358,7 +358,7 @@ #define CONFIG_COMMON_ENV_SETTINGS \ "verify=no \0" \ - "project_dir=systemone\0" \ + "project_dir=targetdir\0" \ "upgrade_available=0\0" \ "altbootcmd=run bootcmd\0" \ "bootlimit=3\0" \ -- cgit v1.3.1 From 35fe1cb0c1a1bff450449b4bc7236aa6dbedb054 Mon Sep 17 00:00:00 2001 From: Dmitry Lifshitz Date: Sun, 27 Apr 2014 13:17:26 +0300 Subject: ARM: OMAP5: Power: add LDO2 support for Palmas driver Add defines required to turn on LDO2 regulator. Signed-off-by: Dmitry Lifshitz --- include/palmas.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/palmas.h b/include/palmas.h index eaf367086c4..cca3f9a9d19 100644 --- a/include/palmas.h +++ b/include/palmas.h @@ -24,6 +24,10 @@ #define LDO1_CTRL 0x50 #define LDO1_VOLTAGE 0x51 +/* LDO2 control/voltage */ +#define LDO2_CTRL 0x52 +#define LDO2_VOLTAGE 0x53 + /* LDO9 control/voltage */ #define LDO9_CTRL 0x60 #define LDO9_VOLTAGE 0x61 -- cgit v1.3.1 From 3d47ffb9933d82243a357c5f0df22c896e6c5a5d Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Fri, 2 May 2014 15:14:39 -0500 Subject: omap3_beagle: use omap3-beagle-xm-ab.dtb for the xM AB revision As of v3.15-rc3, omap3-beagle-xm-ab.dtb now exists with the usb hub (ehci) enabled. For older kernels versions, cherry pick from mainline: ef78f3869c37c480f1d58462a760a40dabc823f4 Signed-off-by: Robert Nelson CC: Tom Rini CC: Nishanth Menon --- include/configs/omap3_beagle.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index fae0e6ffcb4..23905648327 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -170,7 +170,7 @@ "if test $beaglerev = C4; then " \ "setenv fdtfile omap3-beagle.dtb; fi; " \ "if test $beaglerev = xMAB; then " \ - "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ + "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \ "if test $beaglerev = xMC; then " \ "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ "if test $fdtfile = undefined; then " \ -- cgit v1.3.1 From 4fa2427c5d8e36df5a6a2ce020c5166ec0da6bd8 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Fri, 2 May 2014 15:15:03 -0500 Subject: omap3_beagle: xM A/B validate new dtb exits in file system Fall back to previous dtb used when omap3-beagle-xm-ab.dtb doesn't exist in file system Signed-off-by: Robert Nelson CC: Tom Rini CC: Nishanth Menon Acked-by: Tom Rini --- include/configs/omap3_beagle.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 23905648327..d07e52dfd3d 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -175,6 +175,12 @@ "setenv fdtfile omap3-beagle-xm.dtb; fi; " \ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" \ + "validatefdt=" \ + "if test $beaglerev = xMAB; then " \ + "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \ + "setenv fdtfile omap3-beagle-xm.dtb; " \ + "fi; " \ + "fi; \0" \ "bootenv=uEnv.txt\0" \ "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ "importbootenv=echo Importing environment from mmc ...; " \ @@ -190,7 +196,7 @@ "rootfstype=${ramrootfstype}\0" \ "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ - "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ -- cgit v1.3.1 From f04776b6d84d0d5a8effc248220cf83c5c6aad2d Mon Sep 17 00:00:00 2001 From: "Egli, Samuel" Date: Mon, 5 May 2014 16:50:44 +0200 Subject: siemens, draco: add new target Signed-off-by: Samuel Egli Reviewed-by: Roger Meier Cc: Heiko Schocher Cc: Wolfgang Denk --- boards.cfg | 1 + include/configs/draco.h | 92 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 93 insertions(+) create mode 100644 include/configs/draco.h (limited to 'include') diff --git a/boards.cfg b/boards.cfg index 170c3650e42..3681339e544 100644 --- a/boards.cfg +++ b/boards.cfg @@ -260,6 +260,7 @@ Active arm armv7 am33xx compulab cm_t335 Active arm armv7 am33xx isee igep0033 am335x_igep0033 - Enric Balletbo i Serra Active arm armv7 am33xx phytec pcm051 pcm051_rev1 pcm051:REV1 Lars Poeschel Active arm armv7 am33xx phytec pcm051 pcm051_rev3 pcm051:REV3 Lars Poeschel +Active arm armv7 am33xx siemens draco draco - Roger Meier Active arm armv7 am33xx siemens draco dxr2 - Roger Meier Active arm armv7 am33xx siemens pxm2 pxm2 - Roger Meier Active arm armv7 am33xx siemens rut rut - Roger Meier diff --git a/include/configs/draco.h b/include/configs/draco.h new file mode 100644 index 00000000000..a2438d883ec --- /dev/null +++ b/include/configs/draco.h @@ -0,0 +1,92 @@ +/* + * (C) Copyright 2013 Siemens Schweiz AG + * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * Based on: + * U-Boot file:/include/configs/am335x_evm.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_DRACO_H +#define __CONFIG_DRACO_H + +#define CONFIG_SIEMENS_DRACO +#define MACH_TYPE_DRACO 4314 +#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_DRACO + +#include "siemens-am33x-common.h" + +#define CONFIG_SYS_MPUCLK 275 +#define DDR_PLL_FREQ 303 +#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC + +#define BOARD_DFU_BUTTON_GPIO 27 +#define BOARD_DFU_BUTTON_LED 64 /* red LED */ +#define BOARD_STATUS_LED 103 /* green LED */ +#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ + +#undef CONFIG_DOS_PARTITION +#undef CONFIG_CMD_FAT + + + /* Physical Memory Map */ +#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ + +/* I2C Configuration */ +#define CONFIG_SYS_I2C_SPEED 100000 + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define EEPROM_ADDR_DDR3 0x90 +#define EEPROM_ADDR_CHIP 0x120 + +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x300 + +#undef CONFIG_SPL_NET_SUPPORT +#undef CONFIG_SPL_NET_VCI_STRING +#undef CONFIG_SPL_ETH_SUPPORT + +#undef CONFIG_MII +#undef CONFIG_PHY_GIGE +#define CONFIG_PHY_SMSC + +#define CONFIG_FACTORYSET + +/* Watchdog */ +#define CONFIG_OMAP_WATCHDOG + +#ifndef CONFIG_SPL_BUILD + +/* Default env settings */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "nand_img_size=0x400000\0" \ + "optargs=\0" \ + CONFIG_COMMON_ENV_SETTINGS + +#ifndef CONFIG_RESTORE_FLASH +/* set to negative value for no autoboot */ +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_BOOTCOMMAND \ +"if dfubutton; then " \ + "run dfu_start; " \ + "reset; " \ +"fi;" \ +"run nand_boot;" \ +"reset;" + + +#else +#define CONFIG_BOOTDELAY 0 + +#define CONFIG_BOOTCOMMAND \ + "setenv autoload no; " \ + "dhcp; " \ + "if tftp 80000000 debrick.scr; then " \ + "source 80000000; " \ + "fi" +#endif +#endif /* CONFIG_SPL_BUILD */ +#endif /* ! __CONFIG_DRACO_H */ -- cgit v1.3.1 From 532d5318282f9bdc1d6987cfff988c75105d66cf Mon Sep 17 00:00:00 2001 From: Christian Riesch Date: Wed, 7 May 2014 10:16:28 +0200 Subject: arm, davinci: Use CONFIG_SPL_PAD_TO for padding the SPL in an ais image The commits commit b7b5f1a16ca66dfdd817e7339f0e263a5b9f2758 Author: Albert ARIBAUD da850evm, da850_am18xxevm: convert to CONFIG_SPL_MAX_FOOTPRINT and commit e7497891e34efe5cb2b3a3dc7c6c096c012ede28 Author: Albert ARIBAUD cam_enc_4xx: convert to CONFIG_SPL_MAX_FOOTPRINT replaced CONFIG_SPL_MAX_SIZE by CONFIG_SPL_MAX_FOOTPRINT. However, CONFIG_SPL_MAX_SIZE is used in the Makefile for padding the SPL when preparing an u-boot.ais image. By removing CONFIG_SPL_MAX_SIZE said commits broke the ais image of the da850evm and cam_enc_4xx configurations. This patch converts the u-boot.ais target to use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for padding the SPL and adds a #define CONFIG_SPL_PAD_TO where it is required. Signed-off-by: Christian Riesch Reported-by: Tom Taylor Cc: Sudhakar Rajashekhara Cc: Heiko Schocher Cc: Albert ARIBAUD --- Makefile | 2 +- include/configs/da850evm.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/Makefile b/Makefile index 840c39b43b8..aad8127d1cc 100644 --- a/Makefile +++ b/Makefile @@ -890,7 +890,7 @@ MKIMAGEFLAGS_u-boot-spl.ais = -s -n $(if $(CONFIG_AIS_CONFIG_FILE), \ spl/u-boot-spl.ais: spl/u-boot-spl.bin FORCE $(call if_changed,mkimage) -OBJCOPYFLAGS_u-boot.ais = -I binary -O binary --pad-to=$(CONFIG_SPL_MAX_SIZE) +OBJCOPYFLAGS_u-boot.ais = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) u-boot.ais: spl/u-boot-spl.ais u-boot.img FORCE $(call if_changed,pad_cat) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 860a11dd2b3..b27940995de 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -386,6 +386,7 @@ #define CONFIG_SPL_STACK 0x8001ff00 #define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_FOOTPRINT 32768 +#define CONFIG_SPL_PAD_TO 32768 #endif /* Load U-Boot Image From MMC */ -- cgit v1.3.1 From 2d92ba844068a72b50fbedbb17937ed264ef754a Mon Sep 17 00:00:00 2001 From: Ash Charles Date: Wed, 7 May 2014 08:24:11 -0700 Subject: am335x: pepper: Add Gumstix Pepper AM335x-based machine This adds the Gumstix Pepper[1] single-board computer based on the TI AM335x processor. Schematics are available [2]. [1] https://store.gumstix.com/index.php/products/344/ [2] https://pubs.gumstix.com/boards/PEPPER/ Signed-off-by: Ash Charles [trini: Move 'cdev' in board.c down to under #ifdef's where it's used] Signed-off-by: Tom Rini --- board/gumstix/pepper/Makefile | 13 +++ board/gumstix/pepper/board.c | 226 ++++++++++++++++++++++++++++++++++++++++++ board/gumstix/pepper/board.h | 19 ++++ board/gumstix/pepper/mux.c | 78 +++++++++++++++ boards.cfg | 1 + include/configs/pepper.h | 99 ++++++++++++++++++ 6 files changed, 436 insertions(+) create mode 100644 board/gumstix/pepper/Makefile create mode 100644 board/gumstix/pepper/board.c create mode 100644 board/gumstix/pepper/board.h create mode 100644 board/gumstix/pepper/mux.c create mode 100644 include/configs/pepper.h (limited to 'include') diff --git a/board/gumstix/pepper/Makefile b/board/gumstix/pepper/Makefile new file mode 100644 index 00000000000..ecb1d616698 --- /dev/null +++ b/board/gumstix/pepper/Makefile @@ -0,0 +1,13 @@ +# +# Makefile +# +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifdef CONFIG_SPL_BUILD +obj-y += mux.o +endif + +obj-y += board.o diff --git a/board/gumstix/pepper/board.c b/board/gumstix/pepper/board.c new file mode 100644 index 00000000000..75aac49fd0e --- /dev/null +++ b/board/gumstix/pepper/board.c @@ -0,0 +1,226 @@ +/* + * Board functions for Gumstix Pepper and AM335x-based boards + * + * Copyright (C) 2014, Gumstix, Incorporated - http://www.gumstix.com/ + * Based on board/ti/am335x/board.c from Texas Instruments, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "board.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SPL_BUILD +static const struct ddr_data ddr2_data = { + .datardsratio0 = ((MT47H128M16RT25E_RD_DQS<<30) | + (MT47H128M16RT25E_RD_DQS<<20) | + (MT47H128M16RT25E_RD_DQS<<10) | + (MT47H128M16RT25E_RD_DQS<<0)), + .datawdsratio0 = ((MT47H128M16RT25E_WR_DQS<<30) | + (MT47H128M16RT25E_WR_DQS<<20) | + (MT47H128M16RT25E_WR_DQS<<10) | + (MT47H128M16RT25E_WR_DQS<<0)), + .datawiratio0 = ((MT47H128M16RT25E_PHY_WRLVL<<30) | + (MT47H128M16RT25E_PHY_WRLVL<<20) | + (MT47H128M16RT25E_PHY_WRLVL<<10) | + (MT47H128M16RT25E_PHY_WRLVL<<0)), + .datagiratio0 = ((MT47H128M16RT25E_PHY_GATELVL<<30) | + (MT47H128M16RT25E_PHY_GATELVL<<20) | + (MT47H128M16RT25E_PHY_GATELVL<<10) | + (MT47H128M16RT25E_PHY_GATELVL<<0)), + .datafwsratio0 = ((MT47H128M16RT25E_PHY_FIFO_WE<<30) | + (MT47H128M16RT25E_PHY_FIFO_WE<<20) | + (MT47H128M16RT25E_PHY_FIFO_WE<<10) | + (MT47H128M16RT25E_PHY_FIFO_WE<<0)), + .datawrsratio0 = ((MT47H128M16RT25E_PHY_WR_DATA<<30) | + (MT47H128M16RT25E_PHY_WR_DATA<<20) | + (MT47H128M16RT25E_PHY_WR_DATA<<10) | + (MT47H128M16RT25E_PHY_WR_DATA<<0)), +}; + +static const struct cmd_control ddr2_cmd_ctrl_data = { + .cmd0csratio = MT47H128M16RT25E_RATIO, + .cmd0iclkout = MT47H128M16RT25E_INVERT_CLKOUT, + + .cmd1csratio = MT47H128M16RT25E_RATIO, + .cmd1iclkout = MT47H128M16RT25E_INVERT_CLKOUT, + + .cmd2csratio = MT47H128M16RT25E_RATIO, + .cmd2iclkout = MT47H128M16RT25E_INVERT_CLKOUT, +}; + +static const struct emif_regs ddr2_emif_reg_data = { + .sdram_config = MT47H128M16RT25E_EMIF_SDCFG, + .ref_ctrl = MT47H128M16RT25E_EMIF_SDREF, + .sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1, + .sdram_tim2 = MT47H128M16RT25E_EMIF_TIM2, + .sdram_tim3 = MT47H128M16RT25E_EMIF_TIM3, + .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY, +}; + +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + return serial_tstc() && serial_getc() == 'c'; +} +#endif + +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = {266, OSC-1, 1, -1, -1, -1, -1}; + +const struct dpll_params *get_dpll_ddr_params(void) +{ + return &dpll_ddr; +} + +void set_uart_mux_conf(void) +{ + enable_uart0_pin_mux(); +} + +void set_mux_conf_regs(void) +{ + enable_board_pin_mux(); +} + +const struct ctrl_ioregs ioregs = { + .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, +}; + +void sdram_init(void) +{ + config_ddr(266, &ioregs, &ddr2_data, + &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); +} +#endif + +int board_init(void) +{ +#if defined(CONFIG_HW_WATCHDOG) + hw_watchdog_init(); +#endif + + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + gpmc_init(); + + return 0; +} + +#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \ + (defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD)) +static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; + +static void cpsw_control(int enabled) +{ + /* VTP can be added here */ + + return; +} + +static struct cpsw_slave_data cpsw_slaves[] = { + { + .slave_reg_ofs = 0x208, + .sliver_reg_ofs = 0xd80, + .phy_addr = 0, + .phy_if = PHY_INTERFACE_MODE_RGMII, + }, +}; + +static struct cpsw_platform_data cpsw_data = { + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, + .mdio_div = 0xff, + .channels = 8, + .cpdma_reg_ofs = 0x800, + .slaves = 1, + .slave_data = cpsw_slaves, + .ale_reg_ofs = 0xd00, + .ale_entries = 1024, + .host_port_reg_ofs = 0x108, + .hw_stats_reg_ofs = 0x900, + .bd_ram_ofs = 0x2000, + .mac_control = (1 << 5), + .control = cpsw_control, + .host_port_num = 0, + .version = CPSW_CTRL_VERSION_2, +}; + +int board_eth_init(bd_t *bis) +{ + int rv, n = 0; + uint8_t mac_addr[6]; + uint32_t mac_hi, mac_lo; + const char *devname; + + if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { + /* try reading mac address from efuse */ + mac_lo = readl(&cdev->macid0l); + mac_hi = readl(&cdev->macid0h); + mac_addr[0] = mac_hi & 0xFF; + mac_addr[1] = (mac_hi & 0xFF00) >> 8; + mac_addr[2] = (mac_hi & 0xFF0000) >> 16; + mac_addr[3] = (mac_hi & 0xFF000000) >> 24; + mac_addr[4] = mac_lo & 0xFF; + mac_addr[5] = (mac_lo & 0xFF00) >> 8; + if (is_valid_ether_addr(mac_addr)) + eth_setenv_enetaddr("ethaddr", mac_addr); + } + + writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); + + rv = cpsw_register(&cpsw_data); + if (rv < 0) + printf("Error %d registering CPSW switch\n", rv); + else + n += rv; + + /* + * + * CPSW RGMII Internal Delay Mode is not supported in all PVT + * operating points. So we must set the TX clock delay feature + * in the KSZ9021 PHY. Since we only support a single ethernet + * device in U-Boot, we only do this for the current instance. + */ + devname = miiphy_get_current_dev(); + /* max rx/tx clock delay, min rx/tx control delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8104); + miiphy_write(devname, 0x0, 0xc, 0xa0a0); + + /* min rx data delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8105); + miiphy_write(devname, 0x0, 0x0c, 0x0000); + + /* min tx data delay */ + miiphy_write(devname, 0x0, 0x0b, 0x8106); + miiphy_write(devname, 0x0, 0x0c, 0x0000); + + return n; +} +#endif diff --git a/board/gumstix/pepper/board.h b/board/gumstix/pepper/board.h new file mode 100644 index 00000000000..0512735a7b3 --- /dev/null +++ b/board/gumstix/pepper/board.h @@ -0,0 +1,19 @@ +/* + * Gumstix Pepper and AM335x-based boards information header + * + * Copyright (C) 2014, Gumstix, Inc. - http://www.gumstix.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * We must be able to enable uart0, for initial output. We then have a + * main pinmux function that can be overridden to enable all other pinmux that + * is required on the board. + */ +void enable_uart0_pin_mux(void); +void enable_board_pin_mux(void); +#endif diff --git a/board/gumstix/pepper/mux.c b/board/gumstix/pepper/mux.c new file mode 100644 index 00000000000..50b12666d64 --- /dev/null +++ b/board/gumstix/pepper/mux.c @@ -0,0 +1,78 @@ +/* + * Muxing for Gumstix Pepper and AM335x-based boards + * + * Copyright (C) 2014, Gumstix, Incorporated - http://www.gumstix.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include +#include +#include +#include +#include +#include +#include "board.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ + {-1}, +}; + +static struct module_pin_mux i2c0_pin_mux[] = { + /* I2C_DATA */ + {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, + /* I2C_SCLK */ + {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, + {-1}, +}; + +static struct module_pin_mux rgmii1_pin_mux[] = { + {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */ + {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */ + {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */ + {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */ + {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */ + {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */ + {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */ + {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */ + {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */ + {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */ + {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */ + {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */ + {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */ + {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ + {OFFSET(rmii1_refclk), MODE(7) | RXACTIVE}, /* ETH_INT */ + {OFFSET(mii1_col), MODE(7) | PULLUP_EN}, /* PHY_NRESET */ + {OFFSET(xdma_event_intr1), MODE(3)}, + {-1}, +}; + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +/* + * Do board-specific muxes. + */ +void enable_board_pin_mux(void) +{ + /* I2C0 */ + configure_module_pin_mux(i2c0_pin_mux); + /* SD Card */ + configure_module_pin_mux(mmc0_pin_mux); + /* Ethernet pinmux. */ + configure_module_pin_mux(rgmii1_pin_mux); +} diff --git a/boards.cfg b/boards.cfg index 3681339e544..8aaf74939f8 100644 --- a/boards.cfg +++ b/boards.cfg @@ -257,6 +257,7 @@ Active arm armv7 am33xx BuR tseries Active arm armv7 am33xx BuR tseries tseries_nand tseries:SERIAL1,CONS_INDEX=1,NAND Hannes Petermaier Active arm armv7 am33xx BuR tseries tseries_spi tseries:SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT Hannes Petermaier Active arm armv7 am33xx compulab cm_t335 cm_t335 - Igor Grinberg +Active arm armv7 am33xx gumstix pepper pepper - Ash Charles Active arm armv7 am33xx isee igep0033 am335x_igep0033 - Enric Balletbo i Serra Active arm armv7 am33xx phytec pcm051 pcm051_rev1 pcm051:REV1 Lars Poeschel Active arm armv7 am33xx phytec pcm051 pcm051_rev3 pcm051:REV3 Lars Poeschel diff --git a/include/configs/pepper.h b/include/configs/pepper.h new file mode 100644 index 00000000000..cc153abaa9e --- /dev/null +++ b/include/configs/pepper.h @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2013 Gumstix, Inc. - http://www.gumstix.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_PEPPER_H +#define __CONFIG_PEPPER_H + +#define CONFIG_MMC +#include + +#undef CONFIG_BOARD_LATE_INIT +#undef CONFIG_SPL_OS_BOOT + +/* Clock defines */ +#define V_OSCK 24000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +#undef CONFIG_SYS_PROMPT +#define CONFIG_SYS_PROMPT "pepper# " + +/* Mach type */ +#define MACH_TYPE_PEPPER 4207 /* Until the next sync */ +#define CONFIG_MACH_TYPE MACH_TYPE_PEPPER + +#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_ENV_IS_NOWHERE +/* Display cpuinfo */ +#define CONFIG_DISPLAY_CPUINFO + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "fdtfile=am335x-pepper.dtb\0" \ + "console=ttyO0,115200n8\0" \ + "optargs=\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 rw\0" \ + "mmcrootfstype=ext3 rootwait\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "bootenv=uEnv.txt\0" \ + "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t ${loadaddr} ${filesize}\0" \ + "mmcload=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}; " \ + "load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "loaduimage=fatload mmc ${mmcdev}:1 ${loadaddr} uImage\0" \ + "uimageboot=echo Booting from mmc${mmcdev} ...; " \ + "run mmcargs; " \ + "bootm ${loadaddr}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" \ + "ubiboot=echo Booting from nand (ubifs) ...; " \ + "run ubiargs; run ubiload; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" \ + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run mmcload; then " \ + "run mmcboot;" \ + "fi;" \ + "if run loaduimage; then " \ + "run uimageboot;" \ + "fi;" \ + "fi;" \ + +/* Serial console configuration */ +#define CONFIG_CONS_INDEX 1 /* UART0 */ +#define CONFIG_SERIAL1 1 +#define CONFIG_SYS_NS16550_COM1 0x44e09000 + +/* Ethernet support */ +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_PHY_ADDR 0 +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 +#define CONFIG_PHY_RESET_DELAY 1000 + +/* SPL */ +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" + +#endif /* __CONFIG_PEPPER_H */ -- cgit v1.3.1