From 27eb7bce3943111dd70c19569b60d9a047f06811 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 21 Jun 2018 14:49:26 +0200 Subject: common: command: Handle USAGE failure separately command_ret_t enum contains 3 return values but only two are handled now. Extend cmd_process_error() and handle CMD_RET_USAGE separately. These commands are affected by this change. cmd/demo.c cmd/efi.c cmd/gpio.c cmd/qfw.c cmd/x86/fsp.c test/dm/cmd_dm.c And scripts shouldn't be affected because return value is not 0. But every command implementation can choose what it is correct to pass. I would expect that RET_USAGE is called when parameters are not correctly passed (have incorrect value, missing parameters) and RET_FAILURE when correct parameters are passed but command fails. Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- include/command.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/command.h b/include/command.h index 04cd1e745cb..5b1577f3b47 100644 --- a/include/command.h +++ b/include/command.h @@ -67,7 +67,9 @@ extern int cmd_auto_complete(const char *const prompt, char *buf, int *np, int * * * @cmdtp: Command which caused the error * @err: Error code (0 if none, -ve for error, like -EIO) - * @return 0 if there is not error, 1 (CMD_RET_FAILURE) if an error is found + * @return 0 (CMD_RET_SUCCESX) if there is not error, + * 1 (CMD_RET_FAILURE) if an error is found + * -1 (CMD_RET_USAGE) if 'usage' error is found */ int cmd_process_error(cmd_tbl_t *cmdtp, int err); -- cgit v1.3.1 From 5da7b8cb08dbae06bb11f72449d425fdc20d1f81 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 22 Jun 2018 08:10:41 +0200 Subject: hush: Remove default CONFIG_SYS_PROMPT_HUSH_PS2 setting from board files There is no reason to define default option for this macro which is already done in common/cli_hush.c. 86 #ifndef CONFIG_SYS_PROMPT_HUSH_PS2 87 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 88 #endif Signed-off-by: Michal Simek Reviewed-by: York Sun --- include/configs/ls1021aiot.h | 2 -- include/configs/ls1088a_common.h | 1 - include/configs/s32v234evb.h | 1 - include/configs/tplink_wdr4300.h | 1 - 4 files changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 0c900eb1343..97792be6a85 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -209,8 +209,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - #define CONFIG_CMD_GREPENV #define CONFIG_CMD_MEMINFO diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index c70474cdfac..137a1812174 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -215,7 +215,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */ #define CONFIG_SYS_MAXARGS 64 /* max command args */ diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h index 48c979f97b9..c6fb909174d 100644 --- a/include/configs/s32v234evb.h +++ b/include/configs/s32v234evb.h @@ -148,7 +148,6 @@ #include /* Miscellaneous configurable options */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR) diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 0982d3e6118..436715824b2 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* USB, USB storage, USB ethernet */ #define CONFIG_EHCI_MMIO_BIG_ENDIAN -- cgit v1.3.1 From 37e3a36a54755d15e36b52ee47caaf1cdfdc37aa Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 26 Jun 2018 15:02:19 +0530 Subject: xilinx: zynq: Add support to secure images This patch basically adds two new commands for loadig secure images. 1. zynq rsa adds support to load secure image which can be both authenticated or encrypted or both authenticated and encrypted image in xilinx bootimage(BOOT.bin) format. 2. zynq aes command adds support to decrypt and load encrypted image back to DDR as per destination address. The image has to be encrypted using xilinx bootgen tool and to get only the encrypted image from tool use -split option while invoking bootgen. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/Kconfig | 1 + arch/arm/mach-zynq/include/mach/hardware.h | 1 + board/xilinx/zynq/Kconfig | 33 ++ board/xilinx/zynq/Makefile | 5 + board/xilinx/zynq/bootimg.c | 143 ++++++++ board/xilinx/zynq/cmds.c | 513 +++++++++++++++++++++++++++++ configs/zynq_cse_qspi_defconfig | 1 + drivers/fpga/zynqpl.c | 45 +++ include/u-boot/rsa-mod-exp.h | 4 + include/zynq_bootimg.h | 33 ++ include/zynqpl.h | 4 + lib/rsa/rsa-mod-exp.c | 51 +++ 12 files changed, 834 insertions(+) create mode 100644 board/xilinx/zynq/Kconfig create mode 100644 board/xilinx/zynq/bootimg.c create mode 100644 board/xilinx/zynq/cmds.c create mode 100644 include/zynq_bootimg.h (limited to 'include') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3086e5cb47e..64d58a62418 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1475,6 +1475,7 @@ source "board/vscom/baltos/Kconfig" source "board/woodburn/Kconfig" source "board/work-microwave/work_92105/Kconfig" source "board/xilinx/Kconfig" +source "board/xilinx/zynq/Kconfig" source "board/xilinx/zynqmp/Kconfig" source "board/zipitz2/Kconfig" diff --git a/arch/arm/mach-zynq/include/mach/hardware.h b/arch/arm/mach-zynq/include/mach/hardware.h index f69cf004ec8..3ff3c1073e2 100644 --- a/arch/arm/mach-zynq/include/mach/hardware.h +++ b/arch/arm/mach-zynq/include/mach/hardware.h @@ -20,6 +20,7 @@ #define ZYNQ_EFUSE_BASEADDR 0xF800D000 #define ZYNQ_USB_BASEADDR0 0xE0002000 #define ZYNQ_USB_BASEADDR1 0xE0003000 +#define ZYNQ_OCM_BASEADDR 0xFFFC0000 /* Bootmode setting values */ #define ZYNQ_BM_MASK 0x7 diff --git a/board/xilinx/zynq/Kconfig b/board/xilinx/zynq/Kconfig new file mode 100644 index 00000000000..d6f40631cca --- /dev/null +++ b/board/xilinx/zynq/Kconfig @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2018, Xilinx, Inc. + +if ARCH_ZYNQ + +config CMD_ZYNQ + bool "Enable Zynq specific commands" + default y + help + Enables Zynq specific commands. + +config CMD_ZYNQ_AES + bool "Enable zynq aes command for decryption of encrypted images" + depends on CMD_ZYNQ + depends on FPGA_ZYNQPL + help + Decrypts the encrypted image present in source address + and places the decrypted image at destination address. + +config CMD_ZYNQ_RSA + bool "Enable zynq rsa command for loading secure images" + default y + depends on CMD_ZYNQ + depends on CMD_ZYNQ_AES + help + Enabling this will support zynq secure image verification. + The secure image is a xilinx specific BOOT.BIN with + either authentication or encryption or both encryption + and authentication feature enabled while generating + BOOT.BIN using Xilinx bootgen tool. + +endif diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile index 03ad5f0532e..e7645be189c 100644 --- a/board/xilinx/zynq/Makefile +++ b/board/xilinx/zynq/Makefile @@ -26,6 +26,11 @@ $(warning Put custom ps7_init_gpl.c/h to board/xilinx/zynq/custom_hw_platform/)) endif endif +ifndef CONFIG_SPL_BUILD +obj-$(CONFIG_CMD_ZYNQ) += cmds.o +obj-$(CONFIG_CMD_ZYNQ_RSA) += bootimg.o +endif + obj-$(CONFIG_SPL_BUILD) += $(init-objs) # Suppress "warning: function declaration isn't a prototype" diff --git a/board/xilinx/zynq/bootimg.c b/board/xilinx/zynq/bootimg.c new file mode 100644 index 00000000000..56d69cddacf --- /dev/null +++ b/board/xilinx/zynq/bootimg.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Xilinx, Inc. + */ + +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define ZYNQ_IMAGE_PHDR_OFFSET 0x09C +#define ZYNQ_IMAGE_FSBL_LEN_OFFSET 0x040 +#define ZYNQ_PART_HDR_CHKSUM_WORD_COUNT 0x0F +#define ZYNQ_PART_HDR_WORD_COUNT 0x10 +#define ZYNQ_MAXIMUM_IMAGE_WORD_LEN 0x40000000 +#define MD5_CHECKSUM_SIZE 16 + +struct headerarray { + u32 fields[16]; +}; + +/* + * Check whether the given partition is last partition or not + */ +static int zynq_islastpartition(struct headerarray *head) +{ + int index; + + debug("%s\n", __func__); + if (head->fields[ZYNQ_PART_HDR_CHKSUM_WORD_COUNT] != 0xFFFFFFFF) + return -1; + + for (index = 0; index < ZYNQ_PART_HDR_WORD_COUNT - 1; index++) { + if (head->fields[index] != 0x0) + return -1; + } + + return 0; +} + +/* + * Get the partition count from the partition header + */ +int zynq_get_part_count(struct partition_hdr *part_hdr_info) +{ + u32 count; + struct headerarray *hap; + + debug("%s\n", __func__); + + for (count = 0; count < ZYNQ_MAX_PARTITION_NUMBER; count++) { + hap = (struct headerarray *)&part_hdr_info[count]; + if (zynq_islastpartition(hap) != -1) + break; + } + + return count; +} + +/* + * Get the partition info of all the partitions available. + */ +int zynq_get_partition_info(u32 image_base_addr, u32 *fsbl_len, + struct partition_hdr *part_hdr) +{ + u32 parthdroffset; + + *fsbl_len = *((u32 *)(image_base_addr + ZYNQ_IMAGE_FSBL_LEN_OFFSET)); + + parthdroffset = *((u32 *)(image_base_addr + ZYNQ_IMAGE_PHDR_OFFSET)); + + parthdroffset += image_base_addr; + + memcpy(part_hdr, (u32 *)parthdroffset, + (sizeof(struct partition_hdr) * ZYNQ_MAX_PARTITION_NUMBER)); + + return 0; +} + +/* + * Check whether the partition header is valid or not + */ +int zynq_validate_hdr(struct partition_hdr *header) +{ + struct headerarray *hap; + u32 index; + u32 checksum; + + debug("%s\n", __func__); + + hap = (struct headerarray *)header; + + for (index = 0; index < ZYNQ_PART_HDR_WORD_COUNT; index++) { + if (hap->fields[index]) + break; + } + if (index == ZYNQ_PART_HDR_WORD_COUNT) + return -1; + + checksum = 0; + for (index = 0; index < ZYNQ_PART_HDR_CHKSUM_WORD_COUNT; index++) + checksum += hap->fields[index]; + + checksum ^= 0xFFFFFFFF; + + if (hap->fields[ZYNQ_PART_HDR_CHKSUM_WORD_COUNT] != checksum) { + printf("Error: Checksum 0x%8.8x != 0x%8.8x\n", + checksum, hap->fields[ZYNQ_PART_HDR_CHKSUM_WORD_COUNT]); + return -1; + } + + if (header->imagewordlen > ZYNQ_MAXIMUM_IMAGE_WORD_LEN) { + printf("INVALID_PARTITION_LENGTH\n"); + return -1; + } + + return 0; +} + +/* + * Validate the partition by calculationg the md5 checksum for the + * partition and compare with checksum present in checksum offset of + * partition + */ +int zynq_validate_partition(u32 start_addr, u32 len, u32 chksum_off) +{ + u8 checksum[MD5_CHECKSUM_SIZE]; + u8 calchecksum[MD5_CHECKSUM_SIZE]; + + memcpy(&checksum[0], (u32 *)chksum_off, MD5_CHECKSUM_SIZE); + + md5_wd((u8 *)start_addr, len, &calchecksum[0], 0x10000); + + if (!memcmp(checksum, calchecksum, MD5_CHECKSUM_SIZE)) + return 0; + + printf("Error: Partition DataChecksum\n"); + return -1; +} diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c new file mode 100644 index 00000000000..0b2a8178d62 --- /dev/null +++ b/board/xilinx/zynq/cmds.c @@ -0,0 +1,513 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Xilinx, Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_CMD_ZYNQ_RSA + +#define ZYNQ_EFUSE_RSA_ENABLE_MASK 0x400 +#define ZYNQ_ATTRIBUTE_PL_IMAGE_MASK 0x20 +#define ZYNQ_ATTRIBUTE_CHECKSUM_TYPE_MASK 0x7000 +#define ZYNQ_ATTRIBUTE_RSA_PRESENT_MASK 0x8000 +#define ZYNQ_ATTRIBUTE_RSA_PART_OWNER_MASK 0x30000 + +#define ZYNQ_RSA_MODULAR_SIZE 256 +#define ZYNQ_RSA_MODULAR_EXT_SIZE 256 +#define ZYNQ_RSA_EXPO_SIZE 64 +#define ZYNQ_RSA_SPK_SIGNATURE_SIZE 256 +#define ZYNQ_RSA_PARTITION_SIGNATURE_SIZE 256 +#define ZYNQ_RSA_SIGNATURE_SIZE 0x6C0 +#define ZYNQ_RSA_HEADER_SIZE 4 +#define ZYNQ_RSA_MAGIC_WORD_SIZE 60 +#define ZYNQ_RSA_PART_OWNER_UBOOT 1 +#define ZYNQ_RSA_ALIGN_PPK_START 64 + +#define WORD_LENGTH_SHIFT 2 + +static u8 *ppkmodular; +static u8 *ppkmodularex; + +struct zynq_rsa_public_key { + uint len; /* Length of modulus[] in number of u32 */ + u32 n0inv; /* -1 / modulus[0] mod 2^32 */ + u32 *modulus; /* modulus as little endian array */ + u32 *rr; /* R^2 as little endian array */ +}; + +static struct zynq_rsa_public_key public_key; + +static struct partition_hdr part_hdr[ZYNQ_MAX_PARTITION_NUMBER]; + +/* + * Extract the primary public key components from already autheticated FSBL + */ +static void zynq_extract_ppk(u32 fsbl_len) +{ + u32 padsize; + u8 *ppkptr; + + debug("%s\n", __func__); + + /* + * Extract the authenticated PPK from OCM i.e at end of the FSBL + */ + ppkptr = (u8 *)(fsbl_len + ZYNQ_OCM_BASEADDR); + padsize = ((u32)ppkptr % ZYNQ_RSA_ALIGN_PPK_START); + if (padsize) + ppkptr += (ZYNQ_RSA_ALIGN_PPK_START - padsize); + + ppkptr += ZYNQ_RSA_HEADER_SIZE; + + ppkptr += ZYNQ_RSA_MAGIC_WORD_SIZE; + + ppkmodular = (u8 *)ppkptr; + ppkptr += ZYNQ_RSA_MODULAR_SIZE; + ppkmodularex = (u8 *)ppkptr; + ppkptr += ZYNQ_RSA_MODULAR_EXT_SIZE; +} + +/* + * Calculate the inverse(-1 / modulus[0] mod 2^32 ) for the PPK + */ +static u32 zynq_calc_inv(void) +{ + u32 modulus = public_key.modulus[0]; + u32 tmp = BIT(1); + u32 inverse; + + inverse = modulus & BIT(0); + + while (tmp) { + inverse *= 2 - modulus * inverse; + tmp *= tmp; + } + + return ~(inverse - 1); +} + +/* + * Recreate the signature by padding the bytes and verify with hash value + */ +static int zynq_pad_and_check(u8 *signature, u8 *hash) +{ + u8 padding[] = {0x30, 0x31, 0x30, 0x0D, 0x06, 0x09, 0x60, 0x86, 0x48, + 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x05, 0x00, 0x04, + 0x20}; + u8 *pad_ptr = signature + 256; + u32 pad = 202; + u32 ii; + + /* + * Re-Create PKCS#1v1.5 Padding + * MSB ----------------------------------------------------LSB + * 0x0 || 0x1 || 0xFF(for 202 bytes) || 0x0 || T_padding || SHA256 Hash + */ + if (*--pad_ptr != 0 || *--pad_ptr != 1) + return -1; + + for (ii = 0; ii < pad; ii++) { + if (*--pad_ptr != 0xFF) + return -1; + } + + if (*--pad_ptr != 0) + return -1; + + for (ii = 0; ii < sizeof(padding); ii++) { + if (*--pad_ptr != padding[ii]) + return -1; + } + + for (ii = 0; ii < 32; ii++) { + if (*--pad_ptr != hash[ii]) + return -1; + } + return 0; +} + +/* + * Verify and extract the hash value from signature using the public key + * and compare it with calculated hash value. + */ +static int zynq_rsa_verify_key(const struct zynq_rsa_public_key *key, + const u8 *sig, const u32 sig_len, const u8 *hash) +{ + int status; + void *buf; + + if (!key || !sig || !hash) + return -1; + + if (sig_len != (key->len * sizeof(u32))) { + printf("Signature is of incorrect length %d\n", sig_len); + return -1; + } + + /* Sanity check for stack size */ + if (sig_len > ZYNQ_RSA_SPK_SIGNATURE_SIZE) { + printf("Signature length %u exceeds maximum %d\n", sig_len, + ZYNQ_RSA_SPK_SIGNATURE_SIZE); + return -1; + } + + buf = malloc(sig_len); + if (!buf) + return -1; + + memcpy(buf, sig, sig_len); + + status = zynq_pow_mod((u32 *)key, (u32 *)buf); + if (status == -1) { + free(buf); + return status; + } + + status = zynq_pad_and_check((u8 *)buf, (u8 *)hash); + + free(buf); + return status; +} + +/* + * Authenticate the partition + */ +static int zynq_authenticate_part(u8 *buffer, u32 size) +{ + u8 hash_signature[32]; + u8 *spk_modular; + u8 *spk_modular_ex; + u8 *signature_ptr; + u32 status; + + debug("%s\n", __func__); + + signature_ptr = (u8 *)(buffer + size - ZYNQ_RSA_SIGNATURE_SIZE); + + signature_ptr += ZYNQ_RSA_HEADER_SIZE; + + signature_ptr += ZYNQ_RSA_MAGIC_WORD_SIZE; + + ppkmodular = (u8 *)signature_ptr; + signature_ptr += ZYNQ_RSA_MODULAR_SIZE; + ppkmodularex = signature_ptr; + signature_ptr += ZYNQ_RSA_MODULAR_EXT_SIZE; + signature_ptr += ZYNQ_RSA_EXPO_SIZE; + + sha256_csum_wd((const unsigned char *)signature_ptr, + (ZYNQ_RSA_MODULAR_EXT_SIZE + ZYNQ_RSA_EXPO_SIZE + + ZYNQ_RSA_MODULAR_SIZE), + (unsigned char *)hash_signature, 0x1000); + + spk_modular = (u8 *)signature_ptr; + signature_ptr += ZYNQ_RSA_MODULAR_SIZE; + spk_modular_ex = (u8 *)signature_ptr; + signature_ptr += ZYNQ_RSA_MODULAR_EXT_SIZE; + signature_ptr += ZYNQ_RSA_EXPO_SIZE; + + public_key.len = ZYNQ_RSA_MODULAR_SIZE / sizeof(u32); + public_key.modulus = (u32 *)ppkmodular; + public_key.rr = (u32 *)ppkmodularex; + public_key.n0inv = zynq_calc_inv(); + + status = zynq_rsa_verify_key(&public_key, signature_ptr, + ZYNQ_RSA_SPK_SIGNATURE_SIZE, + hash_signature); + if (status) + return status; + + signature_ptr += ZYNQ_RSA_SPK_SIGNATURE_SIZE; + + sha256_csum_wd((const unsigned char *)buffer, + (size - ZYNQ_RSA_PARTITION_SIGNATURE_SIZE), + (unsigned char *)hash_signature, 0x1000); + + public_key.len = ZYNQ_RSA_MODULAR_SIZE / sizeof(u32); + public_key.modulus = (u32 *)spk_modular; + public_key.rr = (u32 *)spk_modular_ex; + public_key.n0inv = zynq_calc_inv(); + + return zynq_rsa_verify_key(&public_key, (u8 *)signature_ptr, + ZYNQ_RSA_PARTITION_SIGNATURE_SIZE, + (u8 *)hash_signature); +} + +/* + * Parses the partition header and verfies the authenticated and + * encrypted image. + */ +static int zynq_verify_image(u32 src_ptr) +{ + u32 silicon_ver, image_base_addr, status; + u32 partition_num = 0; + u32 efuseval, srcaddr, size, fsbl_len; + struct partition_hdr *hdr_ptr; + u32 part_data_len, part_img_len, part_attr; + u32 part_load_addr, part_dst_addr, part_chksum_offset; + u32 part_start_addr, part_total_size, partitioncount; + bool encrypt_part_flag = false; + bool part_chksum_flag = false; + bool signed_part_flag = false; + + image_base_addr = src_ptr; + + silicon_ver = zynq_get_silicon_version(); + + /* RSA not supported in silicon versions 1.0 and 2.0 */ + if (silicon_ver == 0 || silicon_ver == 1) + return -1; + + zynq_get_partition_info(image_base_addr, &fsbl_len, + &part_hdr[0]); + + /* Extract ppk if efuse was blown Otherwise return error */ + efuseval = readl(&efuse_base->status); + if (!(efuseval & ZYNQ_EFUSE_RSA_ENABLE_MASK)) + return -1; + + zynq_extract_ppk(fsbl_len); + + partitioncount = zynq_get_part_count(&part_hdr[0]); + + /* + * As the first two partitions are related to fsbl, + * we can ignore those two in bootimage and the below + * code doesn't need to validate it as fsbl is already + * done by now + */ + if (partitioncount <= 2 || + partitioncount > ZYNQ_MAX_PARTITION_NUMBER) + return -1; + + while (partition_num < partitioncount) { + if (((part_hdr[partition_num].partitionattr & + ZYNQ_ATTRIBUTE_RSA_PART_OWNER_MASK) >> 16) != + ZYNQ_RSA_PART_OWNER_UBOOT) { + printf("UBOOT is not Owner for partition %d\n", + partition_num); + partition_num++; + continue; + } + hdr_ptr = &part_hdr[partition_num]; + status = zynq_validate_hdr(hdr_ptr); + if (status) + return status; + + part_data_len = hdr_ptr->datawordlen; + part_img_len = hdr_ptr->imagewordlen; + part_attr = hdr_ptr->partitionattr; + part_load_addr = hdr_ptr->loadaddr; + part_chksum_offset = hdr_ptr->checksumoffset; + part_start_addr = hdr_ptr->partitionstart; + part_total_size = hdr_ptr->partitionwordlen; + + if (part_data_len != part_img_len) { + debug("Encrypted\n"); + encrypt_part_flag = true; + } + + if (part_attr & ZYNQ_ATTRIBUTE_CHECKSUM_TYPE_MASK) + part_chksum_flag = true; + + if (part_attr & ZYNQ_ATTRIBUTE_RSA_PRESENT_MASK) { + debug("RSA Signed\n"); + signed_part_flag = true; + size = part_total_size << WORD_LENGTH_SHIFT; + } else { + size = part_img_len; + } + + if (!signed_part_flag && !part_chksum_flag) { + printf("Partition not signed & no chksum\n"); + partition_num++; + continue; + } + + srcaddr = image_base_addr + + (part_start_addr << WORD_LENGTH_SHIFT); + + /* + * This validation is just for PS DDR. + * TODO: Update this for PL DDR check as well. + */ + if (part_load_addr < gd->bd->bi_dram[0].start && + ((part_load_addr + part_data_len) > + (gd->bd->bi_dram[0].start + + gd->bd->bi_dram[0].size))) { + printf("INVALID_LOAD_ADDRESS_FAIL\n"); + return -1; + } + + if (part_attr & ZYNQ_ATTRIBUTE_PL_IMAGE_MASK) + part_load_addr = srcaddr; + else + memcpy((u32 *)part_load_addr, (u32 *)srcaddr, + size); + + if (part_chksum_flag) { + part_chksum_offset = image_base_addr + + (part_chksum_offset << + WORD_LENGTH_SHIFT); + status = zynq_validate_partition(part_load_addr, + (part_total_size << + WORD_LENGTH_SHIFT), + part_chksum_offset); + if (status != 0) { + printf("PART_CHKSUM_FAIL\n"); + return -1; + } + debug("Partition Validation Done\n"); + } + + if (signed_part_flag) { + status = zynq_authenticate_part((u8 *)part_load_addr, + size); + if (status != 0) { + printf("AUTHENTICATION_FAIL\n"); + return -1; + } + debug("Authentication Done\n"); + } + + if (encrypt_part_flag) { + debug("DECRYPTION\n"); + + part_dst_addr = part_load_addr; + + if (part_attr & ZYNQ_ATTRIBUTE_PL_IMAGE_MASK) { + partition_num++; + continue; + } + + status = zynq_decrypt_load(part_load_addr, + part_img_len, + part_dst_addr, + part_data_len); + if (status != 0) { + printf("DECRYPTION_FAIL\n"); + return -1; + } + } + partition_num++; + } + + return 0; +} + +static int do_zynq_rsa(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + u32 src_ptr; + char *endp; + + src_ptr = simple_strtoul(argv[2], &endp, 16); + if (*argv[2] == 0 || *endp != 0) + return CMD_RET_USAGE; + if (zynq_verify_image(src_ptr)) + return CMD_RET_FAILURE; + + return CMD_RET_SUCCESS; +} +#endif + +#ifdef CONFIG_CMD_ZYNQ_AES +static int zynq_decrypt_image(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + char *endp; + u32 srcaddr, srclen, dstaddr, dstlen; + int status; + + srcaddr = simple_strtoul(argv[2], &endp, 16); + if (*argv[2] == 0 || *endp != 0) + return CMD_RET_USAGE; + srclen = simple_strtoul(argv[3], &endp, 16); + if (*argv[3] == 0 || *endp != 0) + return CMD_RET_USAGE; + dstaddr = simple_strtoul(argv[4], &endp, 16); + if (*argv[4] == 0 || *endp != 0) + return CMD_RET_USAGE; + dstlen = simple_strtoul(argv[5], &endp, 16); + if (*argv[5] == 0 || *endp != 0) + return CMD_RET_USAGE; + + /* + * Roundup source and destination lengths to + * word size + */ + if (srclen % 4) + srclen = roundup(srclen, 4); + if (dstlen % 4) + dstlen = roundup(dstlen, 4); + + status = zynq_decrypt_load(srcaddr, srclen >> 2, dstaddr, dstlen >> 2); + if (status != 0) + return CMD_RET_FAILURE; + + return CMD_RET_SUCCESS; +} +#endif + +static cmd_tbl_t zynq_commands[] = { +#ifdef CONFIG_CMD_ZYNQ_RSA + U_BOOT_CMD_MKENT(rsa, 3, 1, do_zynq_rsa, "", ""), +#endif +#ifdef CONFIG_CMD_ZYNQ_AES + U_BOOT_CMD_MKENT(aes, 6, 1, zynq_decrypt_image, "", ""), +#endif +}; + +static int do_zynq(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + cmd_tbl_t *zynq_cmd; + int ret; + + if (!ARRAY_SIZE(zynq_commands)) { + puts("No zynq specific command enabled\n"); + return CMD_RET_USAGE; + } + + if (argc < 2) + return CMD_RET_USAGE; + zynq_cmd = find_cmd_tbl(argv[1], zynq_commands, + ARRAY_SIZE(zynq_commands)); + if (!zynq_cmd || argc != zynq_cmd->maxargs) + return CMD_RET_USAGE; + + ret = zynq_cmd->cmd(zynq_cmd, flag, argc, argv); + + return cmd_process_error(zynq_cmd, ret); +} + +static char zynq_help_text[] = + "" +#ifdef CONFIG_CMD_ZYNQ_RSA + "rsa - Verifies the authenticated and encrypted\n" + " zynq images and loads them back to load\n" + " addresses as specified in BOOT image(BOOT.BIN)\n" +#endif +#ifdef CONFIG_CMD_ZYNQ_AES + "aes \n" + " - Decrypts the encrypted image present in source\n" + " address and places the decrypted image at\n" + " destination address\n" +#endif + ; + +U_BOOT_CMD(zynq, 6, 0, do_zynq, + "Zynq specific commands", zynq_help_text +); diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 2425dfa38bb..df6ebdc03a2 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -7,6 +7,7 @@ CONFIG_DEBUG_UART_BASE=0x0 CONFIG_DEBUG_UART_CLOCK=0 CONFIG_SPL_STACK_R_ADDR=0x200000 # CONFIG_ZYNQ_DDRC_INIT is not set +# CONFIG_CMD_ZYNQ is not set CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c index fd37d18c7f4..6409d3024ea 100644 --- a/drivers/fpga/zynqpl.c +++ b/drivers/fpga/zynqpl.c @@ -17,6 +17,7 @@ #define DEVCFG_CTRL_PCFG_PROG_B 0x40000000 #define DEVCFG_CTRL_PCFG_AES_EFUSE_MASK 0x00001000 +#define DEVCFG_CTRL_PCAP_RATE_EN_MASK 0x02000000 #define DEVCFG_ISR_FATAL_ERROR_MASK 0x00740040 #define DEVCFG_ISR_ERROR_FLAGS_MASK 0x00340840 #define DEVCFG_ISR_RX_FIFO_OV 0x00040000 @@ -497,3 +498,47 @@ struct xilinx_fpga_op zynq_op = { .loadfs = zynq_loadfs, #endif }; + +#ifdef CONFIG_CMD_ZYNQ_AES +/* + * Load the encrypted image from src addr and decrypt the image and + * place it back the decrypted image into dstaddr. + */ +int zynq_decrypt_load(u32 srcaddr, u32 srclen, u32 dstaddr, u32 dstlen) +{ + if (srcaddr < SZ_1M || dstaddr < SZ_1M) { + printf("%s: src and dst addr should be > 1M\n", + __func__); + return FPGA_FAIL; + } + + if (zynq_dma_xfer_init(BIT_NONE)) { + printf("%s: zynq_dma_xfer_init FAIL\n", __func__); + return FPGA_FAIL; + } + + writel((readl(&devcfg_base->ctrl) | DEVCFG_CTRL_PCAP_RATE_EN_MASK), + &devcfg_base->ctrl); + + debug("%s: Source = 0x%08X\n", __func__, (u32)srcaddr); + debug("%s: Size = %zu\n", __func__, srclen); + + /* flush(clean & invalidate) d-cache range buf */ + flush_dcache_range((u32)srcaddr, (u32)srcaddr + + roundup(srclen << 2, ARCH_DMA_MINALIGN)); + /* + * Flush destination address range only if image is not + * bitstream. + */ + flush_dcache_range((u32)dstaddr, (u32)dstaddr + + roundup(dstlen << 2, ARCH_DMA_MINALIGN)); + + if (zynq_dma_transfer(srcaddr | 1, srclen, dstaddr | 1, dstlen)) + return FPGA_FAIL; + + writel((readl(&devcfg_base->ctrl) & ~DEVCFG_CTRL_PCAP_RATE_EN_MASK), + &devcfg_base->ctrl); + + return FPGA_SUCCESS; +} +#endif diff --git a/include/u-boot/rsa-mod-exp.h b/include/u-boot/rsa-mod-exp.h index 3253614ede2..8a428c4b6a1 100644 --- a/include/u-boot/rsa-mod-exp.h +++ b/include/u-boot/rsa-mod-exp.h @@ -42,6 +42,10 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len, int rsa_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t sig_len, struct key_prop *node, uint8_t *out); +#if defined(CONFIG_CMD_ZYNQ_RSA) +int zynq_pow_mod(u32 *keyptr, u32 *inout); +#endif + /** * struct struct mod_exp_ops - Driver model for RSA Modular Exponentiation * operations diff --git a/include/zynq_bootimg.h b/include/zynq_bootimg.h new file mode 100644 index 00000000000..c39c0bf4593 --- /dev/null +++ b/include/zynq_bootimg.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Xilinx, Inc. + */ + +#ifndef _ZYNQ_BOOTIMG_H_ +#define _ZYNQ_BOOTIMG_H_ + +#define ZYNQ_MAX_PARTITION_NUMBER 0xE + +struct partition_hdr { + u32 imagewordlen; /* 0x0 */ + u32 datawordlen; /* 0x4 */ + u32 partitionwordlen; /* 0x8 */ + u32 loadaddr; /* 0xC */ + u32 execaddr; /* 0x10 */ + u32 partitionstart; /* 0x14 */ + u32 partitionattr; /* 0x18 */ + u32 sectioncount; /* 0x1C */ + u32 checksumoffset; /* 0x20 */ + u32 pads1[1]; + u32 acoffset; /* 0x28 */ + u32 pads2[4]; + u32 checksum; /* 0x3C */ +}; + +int zynq_get_part_count(struct partition_hdr *part_hdr_info); +int zynq_get_partition_info(u32 image_base_addr, u32 *fsbl_len, + struct partition_hdr *part_hdr); +int zynq_validate_hdr(struct partition_hdr *header); +int zynq_validate_partition(u32 start_addr, u32 len, u32 chksum_off); + +#endif /* _ZYNQ_BOOTIMG_H_ */ diff --git a/include/zynqpl.h b/include/zynqpl.h index cdfd8a205ab..766e6918cd3 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -11,6 +11,10 @@ #include +#ifdef CONFIG_CMD_ZYNQ_AES +int zynq_decrypt_load(u32 srcaddr, u32 dstaddr, u32 srclen, u32 dstlen); +#endif + extern struct xilinx_fpga_op zynq_op; #define XILINX_ZYNQ_XC7Z007S 0x3 diff --git a/lib/rsa/rsa-mod-exp.c b/lib/rsa/rsa-mod-exp.c index 031c710dff4..420ab2eba05 100644 --- a/lib/rsa/rsa-mod-exp.c +++ b/lib/rsa/rsa-mod-exp.c @@ -300,3 +300,54 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len, return 0; } + +#if defined(CONFIG_CMD_ZYNQ_RSA) +/** + * zynq_pow_mod - in-place public exponentiation + * + * @keyptr: RSA key + * @inout: Big-endian word array containing value and result + * @return 0 on successful calculation, otherwise failure error code + * + * FIXME: Use pow_mod() instead of zynq_pow_mod() + * pow_mod calculation required for zynq is bit different from + * pw_mod above here, hence defined zynq specific routine. + */ +int zynq_pow_mod(u32 *keyptr, u32 *inout) +{ + u32 *result, *ptr; + uint i; + struct rsa_public_key *key; + u32 val[RSA2048_BYTES], acc[RSA2048_BYTES], tmp[RSA2048_BYTES]; + + key = (struct rsa_public_key *)keyptr; + + /* Sanity check for stack size - key->len is in 32-bit words */ + if (key->len > RSA_MAX_KEY_BITS / 32) { + debug("RSA key words %u exceeds maximum %d\n", key->len, + RSA_MAX_KEY_BITS / 32); + return -EINVAL; + } + + result = tmp; /* Re-use location. */ + + for (i = 0, ptr = inout; i < key->len; i++, ptr++) + val[i] = *(ptr); + + montgomery_mul(key, acc, val, key->rr); /* axx = a * RR / R mod M */ + for (i = 0; i < 16; i += 2) { + montgomery_mul(key, tmp, acc, acc); /* tmp = acc^2 / R mod M */ + montgomery_mul(key, acc, tmp, tmp); /* acc = tmp^2 / R mod M */ + } + montgomery_mul(key, result, acc, val); /* result = XX * a / R mod M */ + + /* Make sure result < mod; result is at most 1x mod too large. */ + if (greater_equal_modulus(key, result)) + subtract_modulus(key, result); + + for (i = 0, ptr = inout; i < key->len; i++, ptr++) + *ptr = result[i]; + + return 0; +} +#endif -- cgit v1.3.1 From 3c3dee373a1a03b4f2390978bfaef260fc8f5622 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 27 Jun 2018 15:54:18 +0200 Subject: arm64: zcu100: Enable USB host ether and ASIX via defconfig There is no reason to keep these configs in platform config file. Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_zcu100_revC_defconfig | 2 ++ include/configs/xilinx_zynqmp_zcu100.h | 3 --- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/configs/xilinx_zynqmp_zcu100_revC_defconfig b/configs/xilinx_zynqmp_zcu100_revC_defconfig index 154fffb3934..8e2ebc3f391 100644 --- a/configs/xilinx_zynqmp_zcu100_revC_defconfig +++ b/configs/xilinx_zynqmp_zcu100_revC_defconfig @@ -82,6 +82,8 @@ CONFIG_USB_ULPI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_HOST_ETHER=y +CONFIG_USB_ETHER_ASIX=y CONFIG_WDT=y CONFIG_WDT_CDNS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/include/configs/xilinx_zynqmp_zcu100.h b/include/configs/xilinx_zynqmp_zcu100.h index b65d0c1cddd..5ad9e1be5af 100644 --- a/include/configs/xilinx_zynqmp_zcu100.h +++ b/include/configs/xilinx_zynqmp_zcu100.h @@ -24,9 +24,6 @@ {0, {{I2C_MUX_PCA9548, 0x75, 7} } }, \ } -#define CONFIG_USB_HOST_ETHER -#define CONFIG_USB_ETHER_ASIX - #include #endif /* __CONFIG_ZYNQMP_ZCU100_H */ -- cgit v1.3.1 From 35912528a86ad15dd6931d03ec4ac275e24581a2 Mon Sep 17 00:00:00 2001 From: Shreenidhi Shedi Date: Sun, 15 Jul 2018 02:34:35 +0530 Subject: microblaze: Cosmetic changes in Microblaze related files Signed-off-by: Shreenidhi Shedi Signed-off-by: Michal Simek --- arch/microblaze/include/asm/io.h | 94 +++++++++++++--------- .../xilinx/microblaze-generic/microblaze-generic.c | 8 +- include/configs/microblaze-generic.h | 2 +- 3 files changed, 60 insertions(+), 44 deletions(-) (limited to 'include') diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index 26a437c248e..8e6be0ae267 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * include/asm-microblaze/io.h -- Misc I/O operations * @@ -21,39 +22,42 @@ #define IO_SPACE_LIMIT 0xFFFFFFFF #define readb(addr) \ - ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; }) + ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; }) + #define readw(addr) \ - ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; }) + ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; }) + #define readl(addr) \ - ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; }) + ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; }) #define writeb(b, addr) \ - (void)((*(volatile unsigned char *) (addr)) = (b)) + (void)((*(volatile unsigned char *)(addr)) = (b)) + #define writew(b, addr) \ - (void)((*(volatile unsigned short *) (addr)) = (b)) + (void)((*(volatile unsigned short *)(addr)) = (b)) + #define writel(b, addr) \ - (void)((*(volatile unsigned int *) (addr)) = (b)) + (void)((*(volatile unsigned int *)(addr)) = (b)) -#define memset_io(a,b,c) memset((void *)(a),(b),(c)) -#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) -#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) +#define memset_io(a, b, c) memset((void *)(a), (b), (c)) +#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) +#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) -#define inb(addr) readb (addr) -#define inw(addr) readw (addr) -#define inl(addr) readl (addr) -#define outb(x, addr) ((void) writeb (x, addr)) -#define outw(x, addr) ((void) writew (x, addr)) -#define outl(x, addr) ((void) writel (x, addr)) +#define inb(addr) readb(addr) +#define inw(addr) readw(addr) +#define inl(addr) readl(addr) +#define outb(x, addr) ((void)writeb(x, addr)) +#define outw(x, addr) ((void)writew(x, addr)) +#define outl(x, addr) ((void)writel(x, addr)) /* Some #definitions to keep strange Xilinx code happy */ -#define in_8(addr) readb (addr) -#define in_be16(addr) readw (addr) -#define in_be32(addr) readl (addr) - -#define out_8(addr,x ) outb (x,addr) -#define out_be16(addr,x ) outw (x,addr) -#define out_be32(addr,x ) outl (x,addr) +#define in_8(addr) readb(addr) +#define in_be16(addr) readw(addr) +#define in_be32(addr) readl(addr) +#define out_8(addr, x) outb(x, addr) +#define out_be16(addr, x) outw(x, addr) +#define out_be32(addr, x) outl(x, addr) #define inb_p(port) inb((port)) #define outb_p(val, port) outb((val), (port)) @@ -71,54 +75,64 @@ #define __raw_writew writew #define __raw_writel writel -static inline void io_insb (unsigned long port, void *dst, unsigned long count) +static inline void io_insb(unsigned long port, void *dst, unsigned long count) { unsigned char *p = dst; + while (count--) - *p++ = inb (port); + *p++ = inb(port); } -static inline void io_insw (unsigned long port, void *dst, unsigned long count) + +static inline void io_insw(unsigned long port, void *dst, unsigned long count) { unsigned short *p = dst; + while (count--) - *p++ = inw (port); + *p++ = inw(port); } -static inline void io_insl (unsigned long port, void *dst, unsigned long count) + +static inline void io_insl(unsigned long port, void *dst, unsigned long count) { unsigned long *p = dst; + while (count--) - *p++ = inl (port); + *p++ = inl(port); } static inline void -io_outsb (unsigned long port, const void *src, unsigned long count) +io_outsb(unsigned long port, const void *src, unsigned long count) { const unsigned char *p = src; + while (count--) - outb (*p++, port); + outb(*p++, port); } + static inline void -io_outsw (unsigned long port, const void *src, unsigned long count) +io_outsw(unsigned long port, const void *src, unsigned long count) { const unsigned short *p = src; + while (count--) - outw (*p++, port); + outw(*p++, port); } + static inline void -io_outsl (unsigned long port, const void *src, unsigned long count) +io_outsl(unsigned long port, const void *src, unsigned long count) { const unsigned long *p = src; + while (count--) - outl (*p++, port); + outl(*p++, port); } -#define outsb(a,b,l) io_outsb(a,b,l) -#define outsw(a,b,l) io_outsw(a,b,l) -#define outsl(a,b,l) io_outsl(a,b,l) +#define outsb(a, b, l) io_outsb(a, b, l) +#define outsw(a, b, l) io_outsw(a, b, l) +#define outsl(a, b, l) io_outsl(a, b, l) -#define insb(a,b,l) io_insb(a,b,l) -#define insw(a,b,l) io_insw(a,b,l) -#define insl(a,b,l) io_insl(a,b,l) +#define insb(a, b, l) io_insb(a, b, l) +#define insw(a, b, l) io_insw(a, b, l) +#define insl(a, b, l) io_insl(a, b, l) #define ioremap_nocache(physaddr, size) (physaddr) #define ioremap_writethrough(physaddr, size) (physaddr) diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 889695f80e0..9be2cceca70 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -5,8 +5,10 @@ * Michal SIMEK */ -/* This is a board specific file. It's OK to include board specific - * header files */ +/* + * This is a board specific file. It's OK to include board specific + * header files + */ #include #include @@ -71,7 +73,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) hw_watchdog_disable(); #endif #endif - puts ("Reseting board\n"); + puts("Resetting board\n"); __asm__ __volatile__ (" mts rmsr, r0;" \ "bra r0"); diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 966feeeafd7..7f16700d4f1 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -217,7 +217,7 @@ #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 0x40000) -#define CONFIG_SYS_FDT_SIZE (16<<10) +#define CONFIG_SYS_FDT_SIZE (16 << 10) #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 0x1000000) -- cgit v1.3.1 From 88811bb5a11b1d29196694fdcfa26a4e6ebd87d4 Mon Sep 17 00:00:00 2001 From: Shreenidhi Shedi Date: Sun, 15 Jul 2018 02:05:39 +0530 Subject: microblaze: Delete Xilinx watchdog related macros These macros are not required anymore. These will be taken from configuration file. Signed-off-by: Shreenidhi Shedi Signed-off-by: Michal Simek --- board/xilinx/microblaze-generic/xparameters.h | 4 ---- include/configs/microblaze-generic.h | 10 ---------- 2 files changed, 14 deletions(-) (limited to 'include') diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h index 57998edba47..01116d827c6 100644 --- a/board/xilinx/microblaze-generic/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -19,7 +19,3 @@ /* Flash Memory is FLASH_2Mx32 */ #define XILINX_FLASH_START 0x2c000000 #define XILINX_FLASH_SIZE 0x00800000 - -/* Watchdog IP is wxi_timebase_wdt_0 */ -#define XILINX_WATCHDOG_BASEADDR 0x50000000 -#define XILINX_WATCHDOG_IRQ 1 diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 7f16700d4f1..6a049cf2af6 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -43,16 +43,6 @@ # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR #endif -/* watchdog */ -#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) -# define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR -# define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ -# ifndef CONFIG_SPL_BUILD -# define CONFIG_HW_WATCHDOG -# define CONFIG_XILINX_TB_WATCHDOG -# endif -#endif - #define CONFIG_SYS_MALLOC_LEN 0xC0000 /* Stack location before relocation */ -- cgit v1.3.1 From 4a693669670fffd9a614c8c5c9f5ba027fd0185e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 13 Jul 2018 08:26:28 +0200 Subject: microblaze: Convert generic platform to DM gpio Converting GPIO to DM requires to do changes in reset subsystem that's why support for Microblaze soft reset via sysreset and GPIO sysreset support was added. These two patches enables enabling GPIO DM. Microblaze soft reset is bind at last reset method. GPIO reset is handled via sysreset with adding this fragment to DT. gpio-restart { compatible = "gpio-restart"; gpios = <&reset_gpio 0 0 0>; /* 3rd cell ACTIVE_HIGH = 0, ACTIVE_LOW = 1 */ }; hard-reset-gpio property is not documented and also handled. Conversion is required. Unfortunately do_reset is required for SPL that's why use only soft microblaze reset for now. Signed-off-by: Michal Simek --- arch/microblaze/Kconfig | 1 + arch/microblaze/cpu/spl.c | 8 ++++ arch/microblaze/include/asm/gpio.h | 13 ------ .../xilinx/microblaze-generic/microblaze-generic.c | 46 ++++++---------------- board/xilinx/microblaze-generic/xparameters.h | 3 -- configs/microblaze-generic_defconfig | 3 ++ drivers/gpio/Kconfig | 1 + include/configs/microblaze-generic.h | 5 --- 8 files changed, 24 insertions(+), 56 deletions(-) (limited to 'include') diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index f791c0081ea..dcc502b1ff7 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -16,6 +16,7 @@ config TARGET_MICROBLAZE_GENERIC select DM select DM_SERIAL select ENV_IS_IN_FLASH + select SYSRESET endchoice diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c index d3c523d3874..070c12cce9e 100644 --- a/arch/microblaze/cpu/spl.c +++ b/arch/microblaze/cpu/spl.c @@ -47,3 +47,11 @@ int spl_start_uboot(void) return 1; } + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + __asm__ __volatile__ ("mts rmsr, r0;" \ + "bra r0"); + + return 0; +} diff --git a/arch/microblaze/include/asm/gpio.h b/arch/microblaze/include/asm/gpio.h index 4762de02438..306ab4c9f2a 100644 --- a/arch/microblaze/include/asm/gpio.h +++ b/arch/microblaze/include/asm/gpio.h @@ -1,14 +1 @@ -#ifndef _ASM_MICROBLAZE_GPIO_H_ -#define _ASM_MICROBLAZE_GPIO_H_ - #include - -/* Allocation functions */ -extern int gpio_alloc_dual(u32 baseaddr, const char *name, u32 gpio_no0, - u32 gpio_no1); -extern int gpio_alloc(u32 baseaddr, const char *name, u32 gpio_no); - -#define gpio_status() gpio_info() -extern void gpio_info(void); - -#endif diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index 556d0de7f14..44fb48b347a 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2007 Michal Simek + * (C) Copyright 2007-2018 Michal Simek * - * Michal SIMEK + * Michal SIMEK */ /* @@ -12,6 +12,8 @@ #include #include +#include +#include #include #include #include @@ -22,10 +24,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_XILINX_GPIO -static int reset_pin = -1; -#endif - #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) static struct udevice *watchdog_dev; #endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */ @@ -66,33 +64,6 @@ int dram_init(void) return 0; }; -#if !defined(CONFIG_SYSRESET) || defined(CONFIG_SPL_BUILD) -int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ -#ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_XILINX_GPIO - if (reset_pin != -1) - gpio_direction_output(reset_pin, 1); -#endif -#endif - puts("Resetting board\n"); - __asm__ __volatile__ (" mts rmsr, r0;" \ - "bra r0"); - - return 0; -} -#endif - -static int gpio_init(void) -{ -#ifdef CONFIG_XILINX_GPIO - reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1); - if (reset_pin != -1) - gpio_request(reset_pin, "reset_pin"); -#endif - return 0; -} - #ifdef CONFIG_WDT /* Called by macro WATCHDOG_RESET */ void watchdog_reset(void) @@ -117,8 +88,6 @@ void watchdog_reset(void) int board_late_init(void) { - gpio_init(); - #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT) watchdog_dev = NULL; @@ -133,6 +102,13 @@ int board_late_init(void) wdt_start(watchdog_dev, 0, 0); puts("Watchdog: Started\n"); #endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */ +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYSRESET_MICROBLAZE) + int ret; + ret = device_bind_driver(gd->dm_root, "mb_soft_reset", + "reset_soft", NULL); + if (ret) + printf("Warning: No reset driver: ret=%d\n", ret); +#endif return 0; } diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h index 01116d827c6..5e0911faf63 100644 --- a/board/xilinx/microblaze-generic/xparameters.h +++ b/board/xilinx/microblaze-generic/xparameters.h @@ -13,9 +13,6 @@ /* Microblaze is microblaze_0 */ #define XILINX_FSL_NUMBER 3 -/* GPIO is LEDs_4Bit*/ -#define XILINX_GPIO_BASEADDR 0x40000000 - /* Flash Memory is FLASH_2Mx32 */ #define XILINX_FLASH_START 0x2c000000 #define XILINX_FLASH_SIZE 0x00800000 diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index c366a80ed62..b1d01933939 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -39,6 +39,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_NETCONSOLE=y CONFIG_SPL_DM=y +CONFIG_DM_GPIO=y CONFIG_XILINX_GPIO=y CONFIG_MTD_NOR_FLASH=y CONFIG_PHY_ATHEROS=y @@ -56,5 +57,7 @@ CONFIG_XILINX_AXIEMAC=y CONFIG_XILINX_EMACLITE=y CONFIG_SYS_NS16550=y CONFIG_XILINX_UARTLITE=y +CONFIG_SYSRESET_GPIO=y +CONFIG_SYSRESET_MICROBLAZE=y CONFIG_WDT=y CONFIG_XILINX_TB_WATCHDOG=y diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 29af22ecc70..5699a71b231 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -185,6 +185,7 @@ config SANDBOX_GPIO_COUNT config XILINX_GPIO bool "Xilinx GPIO driver" + depends on DM_GPIO help This config enable the Xilinx GPIO driver for Microblaze. diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 6a049cf2af6..5eab2e5a388 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -38,11 +38,6 @@ /* setting reset address */ /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ -/* gpio */ -#ifdef XILINX_GPIO_BASEADDR -# define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR -#endif - #define CONFIG_SYS_MALLOC_LEN 0xC0000 /* Stack location before relocation */ -- cgit v1.3.1 From f4da871a7f09540557792ea5da688c54790add7d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 17 Jul 2018 14:49:33 +0200 Subject: microblaze: Remove XILINX_SPI_FLASH_BASEADDR logic XILINX_SPI_FLASH_BASEADDR logic has been converted to DM that's why there is no reason to depend on this address anymore. Signed-off-by: Michal Simek --- include/configs/microblaze-generic.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'include') diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 5eab2e5a388..d6a0f5aa9d6 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -19,16 +19,10 @@ #undef SPIFLASH #undef RAMENV /* hold environment in flash */ #else -#ifdef XILINX_SPI_FLASH_BASEADDR -#undef FLASH -#define SPIFLASH -#undef RAMENV /* hold environment in flash */ -#else #undef FLASH #undef SPIFLASH #define RAMENV /* hold environment in RAM */ #endif -#endif /* uart */ /* The following table includes the supported baudrates */ @@ -91,7 +85,6 @@ #else /* !FLASH */ #ifdef SPIFLASH -# define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS -- cgit v1.3.1 From 12308b128fa28d50c1586f60f3117f5213356756 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Mon, 16 Jul 2018 15:56:11 +0530 Subject: lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek Reviewed-by: Tom Rini --- arch/arm/mach-mvebu/arm64-common.c | 2 +- arch/arm/mach-socfpga/misc.c | 2 +- board/broadcom/bcmstb/bcmstb.c | 2 +- board/emulation/qemu-arm/qemu-arm.c | 2 +- board/renesas/alt/alt.c | 2 +- board/renesas/blanche/blanche.c | 2 +- board/renesas/draak/draak.c | 2 +- board/renesas/eagle/eagle.c | 2 +- board/renesas/ebisu/ebisu.c | 2 +- board/renesas/gose/gose.c | 2 +- board/renesas/koelsch/koelsch.c | 2 +- board/renesas/lager/lager.c | 2 +- board/renesas/porter/porter.c | 2 +- board/renesas/salvator-x/salvator-x.c | 2 +- board/renesas/silk/silk.c | 2 +- board/renesas/stout/stout.c | 2 +- board/renesas/ulcb/ulcb.c | 2 +- board/st/stm32f429-discovery/stm32f429-discovery.c | 2 +- board/st/stm32f429-evaluation/stm32f429-evaluation.c | 2 +- board/st/stm32f469-discovery/stm32f469-discovery.c | 2 +- board/st/stm32h743-disco/stm32h743-disco.c | 2 +- board/st/stm32h743-eval/stm32h743-eval.c | 2 +- board/xilinx/zynq/board.c | 2 +- board/xilinx/zynqmp/zynqmp.c | 2 +- board/xilinx/zynqmp_r5/board.c | 2 +- include/fdtdec.h | 16 +++++++++------- lib/fdtdec.c | 2 +- tools/patman/func_test.py | 2 +- tools/patman/test/0000-cover-letter.patch | 2 +- ...orrect-cast-for-sandbox-in-fdtdec_setup_memory_.patch | 4 ++-- tools/patman/test/test01.txt | 2 +- 31 files changed, 40 insertions(+), 38 deletions(-) (limited to 'include') diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index d3ea9e67e07..f47273fde9c 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -54,7 +54,7 @@ int dram_init_banksize(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c index 77628e11818..a4f6d5c1ac9 100644 --- a/arch/arm/mach-socfpga/misc.c +++ b/arch/arm/mach-socfpga/misc.c @@ -40,7 +40,7 @@ struct bsel bsel_str[] = { int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c index 25cd3549983..56328463aec 100644 --- a/board/broadcom/bcmstb/bcmstb.c +++ b/board/broadcom/bcmstb/bcmstb.c @@ -48,7 +48,7 @@ int print_cpuinfo(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c index 085cbbef994..1f5a33d520b 100644 --- a/board/emulation/qemu-arm/qemu-arm.c +++ b/board/emulation/qemu-arm/qemu-arm.c @@ -47,7 +47,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index 86e9d2446dc..b18ab7ce887 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -78,7 +78,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c index 7d48d0faf95..f5ada6e288e 100644 --- a/board/renesas/blanche/blanche.c +++ b/board/renesas/blanche/blanche.c @@ -339,7 +339,7 @@ int board_eth_init(bd_t *bis) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c index f804fae6eeb..852fdda843c 100644 --- a/board/renesas/draak/draak.c +++ b/board/renesas/draak/draak.c @@ -96,7 +96,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c index 7b89c10cc74..93174100719 100644 --- a/board/renesas/eagle/eagle.c +++ b/board/renesas/eagle/eagle.c @@ -74,7 +74,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c index fdff2a82861..248223b444b 100644 --- a/board/renesas/ebisu/ebisu.c +++ b/board/renesas/ebisu/ebisu.c @@ -50,7 +50,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index 96ac29d9ab0..282381ede56 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -83,7 +83,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index b6688a2cc08..52f37c970e7 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -85,7 +85,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 6bfb0d14048..062e88c1983 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -94,7 +94,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c index cadff2cd023..663b8001ef6 100644 --- a/board/renesas/porter/porter.c +++ b/board/renesas/porter/porter.c @@ -83,7 +83,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 651877cac25..00256bc1a34 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -108,7 +108,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c index 5fa472ce81b..966c0717b24 100644 --- a/board/renesas/silk/silk.c +++ b/board/renesas/silk/silk.c @@ -78,7 +78,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c index 778593b9ba5..85e30db635f 100644 --- a/board/renesas/stout/stout.c +++ b/board/renesas/stout/stout.c @@ -97,7 +97,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index 9e15e45a304..213e869ebe6 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -96,7 +96,7 @@ int board_init(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c index b7638c0f6a9..e800d70f763 100644 --- a/board/st/stm32f429-discovery/stm32f429-discovery.c +++ b/board/st/stm32f429-discovery/stm32f429-discovery.c @@ -29,7 +29,7 @@ int dram_init(void) return rv; } - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) rv = -EINVAL; return rv; diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c index 2e638c60599..fd2109b27c0 100644 --- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c +++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c @@ -23,7 +23,7 @@ int dram_init(void) return rv; } - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) rv = -EINVAL; return rv; diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c index 90d7045e9ab..a457f909527 100644 --- a/board/st/stm32f469-discovery/stm32f469-discovery.c +++ b/board/st/stm32f469-discovery/stm32f469-discovery.c @@ -23,7 +23,7 @@ int dram_init(void) return rv; } - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) rv = -EINVAL; return rv; diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c index fa007c79864..3ab95188048 100644 --- a/board/st/stm32h743-disco/stm32h743-disco.c +++ b/board/st/stm32h743-disco/stm32h743-disco.c @@ -20,7 +20,7 @@ int dram_init(void) return ret; } - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) ret = -EINVAL; return ret; diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c index fa007c79864..3ab95188048 100644 --- a/board/st/stm32h743-eval/stm32h743-eval.c +++ b/board/st/stm32h743-eval/stm32h743-eval.c @@ -20,7 +20,7 @@ int dram_init(void) return ret; } - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) ret = -EINVAL; return ret; diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 9c005e40e89..614d93c082a 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -98,7 +98,7 @@ int dram_init_banksize(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; zynq_ddrc_init(); diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 06cdcbdba6b..89fac6bb67c 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -423,7 +423,7 @@ int dram_init_banksize(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/board/xilinx/zynqmp_r5/board.c b/board/xilinx/zynqmp_r5/board.c index 70fb2023549..1c45ee7196f 100644 --- a/board/xilinx/zynqmp_r5/board.c +++ b/board/xilinx/zynqmp_r5/board.c @@ -18,7 +18,7 @@ int dram_init_banksize(void) int dram_init(void) { - if (fdtdec_setup_memory_size() != 0) + if (fdtdec_setup_mem_size_base() != 0) return -EINVAL; return 0; diff --git a/include/fdtdec.h b/include/fdtdec.h index 58d5b721aa6..83be06403d8 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -957,20 +957,22 @@ int fdtdec_decode_display_timing(const void *blob, int node, int index, struct display_timing *config); /** - * fdtdec_setup_memory_size() - decode and setup gd->ram_size + * fdtdec_setup_mem_size_base() - decode and setup gd->ram_size and + * gd->ram_start * - * Decode the /memory 'reg' property to determine the size of the first memory - * bank, populate the global data with the size of the first bank of memory. + * Decode the /memory 'reg' property to determine the size and start of the + * first memory bank, populate the global data with the size and start of the + * first bank of memory. * * This function should be called from a boards dram_init(). This helper - * function allows for boards to query the device tree for DRAM size instead of - * hard coding the value in the case where the memory size cannot be detected - * automatically. + * function allows for boards to query the device tree for DRAM size and start + * address instead of hard coding the value in the case where the memory size + * and start address cannot be detected automatically. * * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or * invalid */ -int fdtdec_setup_memory_size(void); +int fdtdec_setup_mem_size_base(void); /** * fdtdec_setup_memory_banksize() - decode and populate gd->bd->bi_dram diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 66dff0f906b..c373ddee358 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1155,7 +1155,7 @@ int fdtdec_decode_display_timing(const void *blob, int parent, int index, return ret; } -int fdtdec_setup_memory_size(void) +int fdtdec_setup_mem_size_base(void) { int ret, mem; struct fdt_resource res; diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py index 3f7e0321447..d79e716074b 100644 --- a/tools/patman/func_test.py +++ b/tools/patman/func_test.py @@ -210,7 +210,7 @@ Changes in v4: Simon Glass (2): pci: Correct cast for sandbox - fdt: Correct cast for sandbox in fdtdec_setup_memory_size() + fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base() cmd/pci.c | 3 ++- fs/fat/fat.c | 1 + diff --git a/tools/patman/test/0000-cover-letter.patch b/tools/patman/test/0000-cover-letter.patch index 29062015bc2..c99e635623f 100644 --- a/tools/patman/test/0000-cover-letter.patch +++ b/tools/patman/test/0000-cover-letter.patch @@ -10,7 +10,7 @@ Content-Transfer-Encoding: 8bit Simon Glass (2): pci: Correct cast for sandbox - fdt: Correct cast for sandbox in fdtdec_setup_memory_size() + fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base() cmd/pci.c | 3 ++- fs/fat/fat.c | 1 + diff --git a/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_memory_.patch b/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_memory_.patch index e3284973a0d..702c0306ffe 100644 --- a/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_memory_.patch +++ b/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_memory_.patch @@ -1,7 +1,7 @@ From 5ab48490f03051875ab13d288a4bf32b507d76fd Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Sat, 15 Apr 2017 15:39:08 -0600 -Subject: [RFC 2/2] fdt: Correct cast for sandbox in fdtdec_setup_memory_size() +Subject: [RFC 2/2] fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -58,7 +58,7 @@ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index c072e54..942244f 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c -@@ -1200,7 +1200,8 @@ int fdtdec_setup_memory_size(void) +@@ -1200,7 +1200,8 @@ int fdtdec_setup_mem_size_base(void) } gd->ram_size = (phys_size_t)(res.end - res.start + 1); diff --git a/tools/patman/test/test01.txt b/tools/patman/test/test01.txt index 8ad9587aef5..478ea93674d 100644 --- a/tools/patman/test/test01.txt +++ b/tools/patman/test/test01.txt @@ -28,7 +28,7 @@ commit 5ab48490f03051875ab13d288a4bf32b507d76fd Author: Simon Glass Date: Sat Apr 15 15:39:08 2017 -0600 - fdt: Correct cast for sandbox in fdtdec_setup_memory_size() + fdt: Correct cast for sandbox in fdtdec_setup_mem_size_base() This gives a warning with some native compilers: -- cgit v1.3.1 From e4655aa2409eeeb3ce7d7ddbbe30b2c5caf8d068 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Mon, 16 Jul 2018 15:57:00 +0530 Subject: arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h Remove the SDRAM_BASE and SDRAM_SIZE as it can now get these details from DT. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek Reviewed-by: Simon Glass --- include/configs/zynq_cse.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index 2f5843f9ec3..adc02f0a4a3 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -41,7 +41,4 @@ #undef CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_MALLOC_LEN 0x1000 -#define CONFIG_SYS_SDRAM_BASE 0xfffc0000 -#define CONFIG_SYS_SDRAM_SIZE 0x40000 - #endif /* __CONFIG_ZYNQ_CSE_H */ -- cgit v1.3.1 From 2a30809cae098d8d2d4af7c5fba059993ef5f10e Mon Sep 17 00:00:00 2001 From: Vipul Kumar Date: Tue, 17 Jul 2018 19:00:34 +0530 Subject: env: Added support to save env to spi through Kconfig This patch added support to enable CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET and CONFIG_ENV_SECT_SIZE through Kconfig for Zynq and Zynqmp. Signed-off-by: Vipul Kumar Signed-off-by: Michal Simek --- configs/bitmain_antminer_s9_defconfig | 1 + env/Kconfig | 28 ++++++++++++++++++++++++++++ include/configs/bitmain_antminer_s9.h | 3 --- include/configs/xilinx_zynqmp.h | 3 --- include/configs/zynq-common.h | 13 ------------- 5 files changed, 29 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 40bce4e3748..f59c767242f 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -4,6 +4,7 @@ CONFIG_SYS_BOARD="antminer_s9" CONFIG_SYS_CONFIG_NAME="bitmain_antminer_s9" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_ENV_OFFSET=0x300000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_DEBUG_UART_CLOCK=50000000 diff --git a/env/Kconfig b/env/Kconfig index 8618376f252..b37dcd78eb7 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -480,6 +480,34 @@ config ENV_SIZE endif +if ARCH_ZYNQMP || ARCH_ZYNQ + +config ENV_OFFSET + hex "Environment Offset" + depends on !ENV_IS_NOWHERE + default 0x1E00000 if ARCH_ZYNQMP + default 0xE0000 if ARCH_ZYNQ + help + Offset from the start of the device (or partition) + +config ENV_SIZE + hex "Environment Size" + default 0x40000 if ENV_IS_IN_SPI_FLASH && ARCH_ZYNQMP + default 0x8000 if ARCH_ZYNQMP + default 0x20000 if ARCH_ZYNQ + help + Size of the environment storage area. + +config ENV_SECT_SIZE + hex "Environment Sector-Size" + depends on !ENV_IS_NOWHERE + default 0x40000 if ARCH_ZYNQMP + default 0x20000 if ARCH_ZYNQ + help + Size of the sector containing the environment. + +endif + config USE_DEFAULT_ENV_FILE bool "Create default environment from file" help diff --git a/include/configs/bitmain_antminer_s9.h b/include/configs/bitmain_antminer_s9.h index 226750215e7..a9f45f19295 100644 --- a/include/configs/bitmain_antminer_s9.h +++ b/include/configs/bitmain_antminer_s9.h @@ -9,9 +9,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 -#define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_OFFSET 0x300000 - #define CONFIG_BOOTP_SERVERIP #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ebc6c6f3e02..ef242c79625 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -99,9 +99,6 @@ # define PARTS_DEFAULT #endif -/* Do not preserve environment */ -#define CONFIG_ENV_SIZE 0x8000 - /* Monitor Command Prompt */ /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 2048 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index a6f2aceea1d..c41dc2c9070 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -121,22 +121,9 @@ # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ #endif -/* Total Size of Environment Sector */ -#ifndef CONFIG_ENV_SIZE -# define CONFIG_ENV_SIZE (128 << 10) -#endif - /* Allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE -/* Environment */ -#ifndef CONFIG_ENV_IS_NOWHERE -# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE -# ifndef CONFIG_ENV_OFFSET -# define CONFIG_ENV_OFFSET 0xE0000 -# endif -#endif - /* enable preboot to be loaded before CONFIG_BOOTDELAY */ #define CONFIG_PREBOOT -- cgit v1.3.1 From bb8920ed77ecc19fcbe55fbd7504775d7f7b51eb Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 18 Jul 2018 12:59:14 +0200 Subject: arm: zynq: Setup ENV_SIZE via Kconfig Simplify zynq_cse config by setting up ENV_SIZE via Kconfig. Signed-off-by: Michal Simek --- configs/zynq_cse_nand_defconfig | 1 + configs/zynq_cse_nor_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + include/configs/zynq_cse.h | 2 -- 4 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index dcd4eda3ca3..eb7e574040a 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="zynq_cse" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x100000 +CONFIG_ENV_SIZE=0x190 CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand" diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 9e2546b1978..95b31a0be66 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="zynq_cse" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 +CONFIG_ENV_SIZE=0x190 CONFIG_SPL=y CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index df6ebdc03a2..c094a5e7de4 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="zynq_cse" CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 +CONFIG_ENV_SIZE=0x190 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x0 CONFIG_DEBUG_UART_CLOCK=0 diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index adc02f0a4a3..36fbe0eb5e2 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -18,7 +18,6 @@ /* Undef unneeded configs */ #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_BOARD_LATE_INIT -#undef CONFIG_ENV_SIZE #undef CONFIG_ZLIB #undef CONFIG_GZIP @@ -28,7 +27,6 @@ #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_ENV_SIZE 400 #undef CONFIG_SYS_INIT_RAM_ADDR #undef CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFDE000 -- cgit v1.3.1 From 14ed50a4bfadf7bc3437b325ec655c79bddd8833 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Wed, 18 Jul 2018 16:31:38 +0530 Subject: arm64: zynqmp: Add QSPI flash mini u-boot configuration Add configuration files/dtses for mini u-boot configuration which runs on smaller footprint of internal memory. This configuration has only required qspi flash support and it uses DCC as serial. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-mini-qspi.dts | 79 +++++++++++++++++++++++++++++++ configs/xilinx_zynqmp_mini_qspi_defconfig | 61 ++++++++++++++++++++++++ include/configs/xilinx_zynqmp_mini_qspi.h | 21 ++++++++ 4 files changed, 162 insertions(+) create mode 100644 arch/arm/dts/zynqmp-mini-qspi.dts create mode 100644 configs/xilinx_zynqmp_mini_qspi_defconfig create mode 100644 include/configs/xilinx_zynqmp_mini_qspi.h (limited to 'include') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1bdcb1b495a..094c41b3de6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -152,6 +152,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-mini-emmc0.dtb \ zynqmp-mini-emmc1.dtb \ zynqmp-mini-nand.dtb \ + zynqmp-mini-qspi.dtb \ zynqmp-zcu100-revC.dtb \ zynqmp-zcu102-revA.dtb \ zynqmp-zcu102-revB.dtb \ diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts new file mode 100644 index 00000000000..c235a5f731d --- /dev/null +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP Mini Configuration + * + * (C) Copyright 2015 - 2018, Xilinx, Inc. + * + * Siva Durga Prasad + * Michal Simek + */ + +/dts-v1/; + +/ { + model = "ZynqMP MINI QSPI"; + compatible = "xlnx,zynqmp"; + #address-cells = <2>; + #size-cells = <1>; + + aliases { + serial0 = &dcc; + spi0 = &qspi; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@fffc0000 { + device_type = "memory"; + reg = <0x0 0xfffc0000 0x40000>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "disabled"; + u-boot,dm-pre-reloc; + }; + + amba: amba { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + + qspi: spi@ff0f0000 { + compatible = "xlnx,zynqmp-qspi-1.0"; + status = "disabled"; + clock-names = "ref_clk", "pclk"; + clocks = <&misc_clk &misc_clk>; + num-cs = <1>; + reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + misc_clk: misc_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + }; + }; +}; + +&qspi { + status = "okay"; + flash@0 { + compatible = "n25q512a11"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <10000000>; + }; +}; + +&dcc { + status = "okay"; +}; diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig new file mode 100644 index 00000000000..8b328291240 --- /dev/null +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -0,0 +1,61 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi" +CONFIG_ARCH_ZYNQMP=y +CONFIG_SYS_TEXT_BASE=0xFFFC0000 +CONFIG_SYS_MEM_RSVD_FOR_MMU=y +CONFIG_ZYNQMP_NO_DDR=y +# CONFIG_CMD_ZYNQMP is not set +CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" +# CONFIG_IMAGE_FORMAT_LEGACY is not set +CONFIG_BOOTDELAY=-1 +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set +CONFIG_SYS_PROMPT="ZynqMP> " +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_FDT is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_SF=y +# CONFIG_CMD_ECHO is not set +# CONFIG_CMD_ITEST is not set +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MISC is not set +CONFIG_MP=y +# CONFIG_PARTITIONS is not set +CONFIG_OF_EMBED=y +# CONFIG_NET is not set +# CONFIG_DM_WARN is not set +# CONFIG_DM_DEVICE_REMOVE is not set +# CONFIG_MMC is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SF_DUAL_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_ZYNQMP_GQSPI=y +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h new file mode 100644 index 00000000000..6fb05200ce2 --- /dev/null +++ b/include/configs/xilinx_zynqmp_mini_qspi.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Xilinx ZynqMP QSPI Flash utility + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek + * Siva Durga Prasad Paladugu + */ + +#ifndef __CONFIG_ZYNQMP_MINI_QSPI_H +#define __CONFIG_ZYNQMP_MINI_QSPI_H + +#include + +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_ENV_SIZE 1400 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000) +#define CONFIG_SYS_MALLOC_LEN 0x2000 + +#endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */ -- cgit v1.3.1 From a133b3ac3257e471f521991e472c8f8c15d2c5a9 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 18 Jul 2018 13:07:59 +0200 Subject: arm64: zynqmp: Setup ENV_SIZE via Kconfig for mini targets Mini targets are using different ENV_SIZE then standard one that's why defconfigs should be updated to simplify config files. Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 + configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 + configs/xilinx_zynqmp_mini_nand_defconfig | 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + include/configs/xilinx_zynqmp_mini.h | 1 - include/configs/xilinx_zynqmp_mini_emmc.h | 1 - include/configs/xilinx_zynqmp_mini_nand.h | 1 - include/configs/xilinx_zynqmp_mini_qspi.h | 1 - 8 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index ffb9693c10f..65a72b7f994 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 +CONFIG_ENV_SIZE=0x10000 # CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index edca32d28e2..c32ba73b1f1 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_emmc" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 +CONFIG_ENV_SIZE=0x10000 # CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 4c8c2fcee6d..3117770263d 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_nand" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x10000 +CONFIG_ENV_SIZE=0x10000 # CONFIG_CMD_ZYNQMP is not set CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" CONFIG_ENV_VARS_UBOOT_CONFIG=y diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 8b328291240..a4bc8950300 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 +CONFIG_ENV_SIZE=0x578 CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y # CONFIG_CMD_ZYNQMP is not set diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 118779a0a02..8ba91d0d1dd 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -17,7 +17,6 @@ /* Undef unneeded configs */ #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_MALLOC_LEN -#undef CONFIG_ENV_SIZE #undef CONFIG_ZLIB #undef CONFIG_GZIP #undef CONFIG_CMD_ENV diff --git a/include/configs/xilinx_zynqmp_mini_emmc.h b/include/configs/xilinx_zynqmp_mini_emmc.h index dc81c66c641..6531599c79d 100644 --- a/include/configs/xilinx_zynqmp_mini_emmc.h +++ b/include/configs/xilinx_zynqmp_mini_emmc.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_ICACHE_OFF #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_ENV_SIZE 0x10000 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MALLOC_LEN 0x800000 diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h index 4434e6ab329..00db4496484 100644 --- a/include/configs/xilinx_zynqmp_mini_nand.h +++ b/include/configs/xilinx_zynqmp_mini_nand.h @@ -16,7 +16,6 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_SIZE 0x1000000 #define CONFIG_SYS_SDRAM_BASE 0x0 -#define CONFIG_ENV_SIZE 0x10000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x40000) #define CONFIG_SYS_MALLOC_LEN 0x800000 diff --git a/include/configs/xilinx_zynqmp_mini_qspi.h b/include/configs/xilinx_zynqmp_mini_qspi.h index 6fb05200ce2..229132675ee 100644 --- a/include/configs/xilinx_zynqmp_mini_qspi.h +++ b/include/configs/xilinx_zynqmp_mini_qspi.h @@ -14,7 +14,6 @@ #define CONFIG_SYS_ICACHE_OFF #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_ENV_SIZE 1400 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000) #define CONFIG_SYS_MALLOC_LEN 0x2000 -- cgit v1.3.1