From 111e9bf6a5acc8187c4849cbf4e7516e37496059 Mon Sep 17 00:00:00 2001 From: Jamie Gibbons Date: Fri, 1 Aug 2025 13:36:23 +0100 Subject: mailbox: add PolarFire SoC mailbox driver This driver adds support for the single mailbox channel of the MSS system controller on the Microchip PolarFire SoC. Signed-off-by: Jamie Gibbons Acked-by: Leo Yu-Chi Liang --- include/mpfs-mailbox.h | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 include/mpfs-mailbox.h (limited to 'include') diff --git a/include/mpfs-mailbox.h b/include/mpfs-mailbox.h new file mode 100644 index 00000000000..c0ff327a4ce --- /dev/null +++ b/include/mpfs-mailbox.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * + * Microchip PolarFire SoC (MPFS) + * + * Copyright (c) 2020 Microchip Corporation. All rights reserved. + * + * + */ + +#ifndef _MPFS_MAILBOX_H__ +#define _MPFS_MAILBOX_H__ + +#include + +#define BYTES_4 4 + +struct udevice; + +/** + * struct mpfs_mss_msg - PolarFire SoC message structure + * @cmd_opcode: Command opcode + * @cmd_data_size: Size of the command data. + * @response: Pointer to the response data. + * @cmd_data: Pointer to the command data. + * @mbox_offset: Mailbox offset + * @resp_offset: Response offset + * + */ +struct mpfs_mss_msg { + u8 cmd_opcode; + u16 cmd_data_size; + struct mpfs_mss_response *response; + u8 *cmd_data; + u16 mbox_offset; + u16 resp_offset; +}; + +/** + * struct mpfs_mss_response - PolarFire SoC response structure + * @resp_status: Response status + * @resp_msg: Pointer to response message. + * @resp_size: Size of the response message. + * + */ +struct mpfs_mss_response { + u32 resp_status; + u32 *resp_msg; + u16 resp_size; +}; + +struct mpfs_syscontroller_priv; + +struct mpfs_sys_serv { + struct udevice *dev; + struct mpfs_syscontroller_priv *sys_controller; + struct mpfs_mss_msg *msg; +}; + +int mpfs_syscontroller_run_service(struct mpfs_syscontroller_priv *sys_controller, struct mpfs_mss_msg *msg); +int mpfs_syscontroller_read_sernum(struct mpfs_sys_serv *sys_serv_priv, u8 *device_serial_number); +void mpfs_syscontroller_process_dtbo(struct mpfs_sys_serv *sys_serv_priv); +struct mpfs_syscontroller_priv *mpfs_syscontroller_get(struct udevice *dev); + +#endif /* __MPFS_MAILBOX_H__ */ + -- cgit v1.2.3 From 35995f7ebf04a95864a116f76ba8f89c94b6d475 Mon Sep 17 00:00:00 2001 From: Leo Yu-Chi Liang Date: Thu, 7 Aug 2025 19:38:32 +0800 Subject: board: andestech: Add Voyager board support Introduce Voyager board specific code, including - dram info - shared cache enabling Signed-off-by: Randolph Sheng-Kai Lin Signed-off-by: Leo Yu-Chi Liang --- include/configs/voyager.h | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 include/configs/voyager.h (limited to 'include') diff --git a/include/configs/voyager.h b/include/configs/voyager.h new file mode 100644 index 00000000000..f6630b07ec9 --- /dev/null +++ b/include/configs/voyager.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2025 Andes Technology Corporation + * Randolph Lin, Andes Technology Corporation + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define RISCV_MMODE_TIMERBASE 0xe6000000 +#define RISCV_MMODE_TIMER_FREQ 60000000 + +#define RISCV_SMODE_TIMER_FREQ 60000000 + +/* support JEDEC */ +#define PHYS_FLASH_1 0x8000000 /* BANK 0 */ +#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CFG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } +#define CFG_SYS_FLASH_BANKS_SIZES { 0x4000000 } + +/* Enable distro boot */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(DHCP, dhcp, na) + +#include + +#define CFG_EXTRA_ENV_SETTINGS \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "kernel_addr_r=0x400600000\0" \ + "kernel_comp_addr_r=0x404600000\0" \ + "kernel_comp_size=0x04000000\0" \ + "pxefile_addr_r=0x408600000\0" \ + "scriptaddr=0x408700000\0" \ + "fdt_addr_r=0x408800000\0" \ + "ramdisk_addr_r=0x408900000\0" \ + BOOTENV + +#endif /* __CONFIG_H */ -- cgit v1.2.3 From 4800a6a0b3fa9d00f1ec40233a0e16464987c24f Mon Sep 17 00:00:00 2001 From: Max Merchel Date: Thu, 14 Aug 2025 14:03:52 +0200 Subject: net: add missing SPDX-License-Identifier for files originating from LiMon The header of LiMon imported files reference a License file which does not exist in U-Boot. Some files were forgotten when adding the SPDX-License-Identifier. The LiMon files were originally licensed under GPLv2 as can be seen in commit [2ea91039]. Based on this commit, add the correct SPDX license identifier. While at it drop the reference to the non-existing License file from all LiMon files and update the SPDX-License-Identifier to SPDX version 3. Signed-off-by: Max Merchel --- include/net-legacy.h | 3 +-- include/net/tftp.h | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/net-legacy.h b/include/net-legacy.h index a7dbcec1506..050fc352920 100644 --- a/include/net-legacy.h +++ b/include/net-legacy.h @@ -1,9 +1,8 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * LiMon Monitor (LiMon) - Network. * * Copyright 1994 - 2000 Neil Russell. - * (See License) * * History * 9/16/00 bor adapted to TQM823L/STK8xxL board, RARP/TFTP boot added diff --git a/include/net/tftp.h b/include/net/tftp.h index c411c9b2e65..c7e14817280 100644 --- a/include/net/tftp.h +++ b/include/net/tftp.h @@ -1,10 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * LiMon - BOOTP/TFTP. * * Copyright 1994, 1995, 2000 Neil Russell. * Copyright 2011 Comelit Group SpA * Luca Ceresoli - * (See License) */ #ifndef __TFTP_H__ -- cgit v1.2.3 From 512be8979666a9c62e5ffb8f331d6cd3052623a4 Mon Sep 17 00:00:00 2001 From: Jerome Forissier Date: Fri, 18 Jul 2025 12:48:48 +0200 Subject: net: introduce CONFIG_DNS Introduce the DNS Kconfig symbol so that various network commands may use host names without the dns command (CMD_DNS) being selected. Signed-off-by: Jerome Forissier CC: E Shattow --- include/net-legacy.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/net-legacy.h b/include/net-legacy.h index 050fc352920..9564e97d238 100644 --- a/include/net-legacy.h +++ b/include/net-legacy.h @@ -315,7 +315,7 @@ extern u32 net_boot_file_size; /* Boot file size in blocks as reported by the DHCP server */ extern u32 net_boot_file_expected_size_in_blocks; -#if defined(CONFIG_CMD_DNS) +#if defined(CONFIG_DNS) extern char *net_dns_resolve; /* The host to resolve */ extern char *net_dns_env_var; /* the env var to put the ip into */ #endif -- cgit v1.2.3 From 90c05f68fcab57d669233033d34e52b8d55d57dd Mon Sep 17 00:00:00 2001 From: Jerome Forissier Date: Mon, 4 Aug 2025 14:51:01 +0200 Subject: net: lwip: ping: set net_try_count to 1 The legacy network stack sets net_try_count to 1 at the beginning of the net_loop() function. This is required for net_start_again() to work properly. Therefore, set the variable accordingly in the do_ping() function when NET_LWIP=y. This fixes an issue where a ping to an unreachable destination would run twice on the same network device. For example with qemu_arm64_lwip_defconfig: => dhcp DHCP client bound to address 10.0.2.15 (3 ms) => ping 10.0.0.1 Using virtio-net#32 device ping failed; host 10.0.0.1 is not alive Using virtio-net#32 device ping failed; host 10.0.0.1 is not alive => QEMU: Terminated Signed-off-by: Jerome Forissier --- include/net-lwip.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/net-lwip.h b/include/net-lwip.h index f54f23471f1..e88e2186635 100644 --- a/include/net-lwip.h +++ b/include/net-lwip.h @@ -18,6 +18,8 @@ extern size_t cacert_size; extern enum auth_mode cacert_auth_mode; extern bool cacert_initialized; +extern int net_try_count; + int set_cacert_builtin(void); enum proto_t { -- cgit v1.2.3 From cb5f3e4f5288f27c44753503ca6c75bd17d8a1f8 Mon Sep 17 00:00:00 2001 From: Ye Li Date: Wed, 20 Aug 2025 15:08:51 +0200 Subject: imx: imx93_{evk, frdm, qsb}: Fix conflict SPL early malloc address MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Because the early malloc pool size is set to 0x18000, so using this start address may cause conflict with ATF, then corrupt the heap data. So we delete the definition to use the default early malloc pool from CONFIG_SPL_STACK to avoid any conflict Signed-off-by: Ye Li Cherry picked from nxp-imx/uboot-imx commit 1ba675df122627a19debe1d807877052705372c6 Jérémie Dautheribes: applied the same patch to the frdm and qsb imx93-based boards Signed-off-by: Jérémie Dautheribes --- include/configs/imx93_evk.h | 4 ---- include/configs/imx93_frdm.h | 4 ---- include/configs/imx93_qsb.h | 4 ---- 3 files changed, 12 deletions(-) (limited to 'include') diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index e7db0161126..ffd72a38bcb 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -11,10 +11,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_XPL_BUILD -#define CFG_MALLOC_F_ADDR 0x204D0000 -#endif - #ifdef CONFIG_ENV_MMC_DEVICE_INDEX #define IMX93_EVK_MMC_ENV_DEV CONFIG_ENV_MMC_DEVICE_INDEX #else diff --git a/include/configs/imx93_frdm.h b/include/configs/imx93_frdm.h index 987fcacb999..c98c10774cb 100644 --- a/include/configs/imx93_frdm.h +++ b/include/configs/imx93_frdm.h @@ -11,10 +11,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_XPL_BUILD -#define CFG_MALLOC_F_ADDR 0x204D0000 -#endif - /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x80000000 diff --git a/include/configs/imx93_qsb.h b/include/configs/imx93_qsb.h index 5ddc191d17c..a7b94f7ab57 100644 --- a/include/configs/imx93_qsb.h +++ b/include/configs/imx93_qsb.h @@ -9,10 +9,6 @@ #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) -#ifdef CONFIG_SPL_BUILD -#define CFG_MALLOC_F_ADDR 0x204D0000 -#endif - #define CFG_SYS_INIT_RAM_ADDR 0x80000000 #define CFG_SYS_INIT_RAM_SIZE 0x200000 -- cgit v1.2.3 From 0870281a415d33b20ca4a2ff072ab55c1b71bcb5 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 28 Jul 2025 09:07:53 +0200 Subject: fpga: Remove ancient ACEX1K support Coverity (CID 583149) reports issue on code which is not enabled by any real platform that's why remove it completely. Acked-by: Alexander Dahl Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/20fe425910b6266a2bf0555bda67f60c1dd3aa61.1753686468.git.michal.simek@amd.com --- include/ACEX1K.h | 32 -------------------------------- 1 file changed, 32 deletions(-) (limited to 'include') diff --git a/include/ACEX1K.h b/include/ACEX1K.h index 7c5253c66cc..4d24545df2c 100644 --- a/include/ACEX1K.h +++ b/include/ACEX1K.h @@ -12,26 +12,10 @@ #include -extern int ACEX1K_load(Altera_desc *desc, const void *image, size_t size); -extern int ACEX1K_dump(Altera_desc *desc, const void *buf, size_t bsize); -extern int ACEX1K_info(Altera_desc *desc); - extern int CYC2_load(Altera_desc *desc, const void *image, size_t size); extern int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize); extern int CYC2_info(Altera_desc *desc); -/* Slave Serial Implementation function table */ -typedef struct { - Altera_pre_fn pre; - Altera_config_fn config; - Altera_clk_fn clk; - Altera_status_fn status; - Altera_done_fn done; - Altera_data_fn data; - Altera_abort_fn abort; - Altera_post_fn post; -} Altera_ACEX1K_Passive_Serial_fns; - /* Slave Serial Implementation function table */ typedef struct { Altera_pre_fn pre; @@ -45,16 +29,6 @@ typedef struct { /* Device Image Sizes *********************************************************************/ -/* ACEX1K */ -/* FIXME: Which size do we mean? - * Datasheet says 1337000/8=167125Bytes, - * Filesize of an *.rbf file is 166965 Bytes - */ -#if 0 -#define Altera_EP1K100_SIZE 1337000/8 /* 167125 Bytes */ -#endif -#define Altera_EP1K100_SIZE (166965*8) - #define Altera_EP2C8_SIZE 247942 #define Altera_EP2C20_SIZE 586562 #define Altera_EP2C35_SIZE 883905 @@ -70,10 +44,4 @@ typedef struct { #define ALTERA_EP4CE75_SIZE 2495719 /* 19965752 Bits */ #define ALTERA_EP4CE115_SIZE 3571462 /* 28571696 Bits */ -/* Descriptor Macros - *********************************************************************/ -/* ACEX1K devices */ -#define Altera_EP1K100_DESC(iface, fn_table, cookie) \ -{ Altera_ACEX1K, iface, Altera_EP1K100_SIZE, fn_table, cookie } - #endif /* _ACEX1K_H_ */ -- cgit v1.2.3 From 34762f6c007c53d8540c1cb8bcf02ccddedb704f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 28 Jul 2025 09:07:54 +0200 Subject: fpga: lattice: Remove unused support There is no single platform which is using this driver that's why remove it completely. Some issues regarding this code are also reported by Coverity (CID 583143, 583144, 583145, 583146). Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/367cd55ab8d9fb262ac23fe748babc6b2b59bee0.1753686468.git.michal.simek@amd.com --- include/fpga.h | 1 - include/lattice.h | 298 ------------------------------------------------------ 2 files changed, 299 deletions(-) delete mode 100644 include/lattice.h (limited to 'include') diff --git a/include/fpga.h b/include/fpga.h index a144238e66a..20153b2082a 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -25,7 +25,6 @@ typedef enum { /* typedef fpga_type */ fpga_min_type, /* range check value */ fpga_xilinx, /* Xilinx Family) */ fpga_altera, /* unimplemented */ - fpga_lattice, /* Lattice family */ fpga_undefined /* invalid range check value */ } fpga_type; /* end, typedef fpga_type */ diff --git a/include/lattice.h b/include/lattice.h deleted file mode 100644 index 80fafc00dcb..00000000000 --- a/include/lattice.h +++ /dev/null @@ -1,298 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Porting to U-Boot: - * - * (C) Copyright 2010 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Lattice's ispVME Embedded Tool to load Lattice's FPGA: - * - * Lattice Semiconductor Corp. Copyright 2009 - */ - -#ifndef _VME_OPCODE_H -#define _VME_OPCODE_H - -#define VME_VERSION_NUMBER "12.1" - -/* Maximum declarations. */ - -#define VMEHEXMAX 60000L /* The hex file is split 60K per file. */ -#define SCANMAX 64000L /* The maximum SDR/SIR burst. */ - -/* - * - * Supported JTAG state transitions. - * - */ - -#define RESET 0x00 -#define IDLE 0x01 -#define IRPAUSE 0x02 -#define DRPAUSE 0x03 -#define SHIFTIR 0x04 -#define SHIFTDR 0x05 -/* 11/15/05 Nguyen changed to support DRCAPTURE*/ -#define DRCAPTURE 0x06 - -/* - * Flow control register bit definitions. A set bit indicates - * that the register currently exhibits the corresponding mode. - */ - -#define INTEL_PRGM 0x0001 /* Intelligent programming is in effect. */ -#define CASCADE 0x0002 /* Currently splitting large SDR. */ -#define REPEATLOOP 0x0008 /* Currently executing a repeat loop. */ -#define SHIFTRIGHT 0x0080 /* The next data stream needs a right shift. */ -#define SHIFTLEFT 0x0100 /* The next data stream needs a left shift. */ -#define VERIFYUES 0x0200 /* Continue if fail is in effect. */ - -/* - * DataType register bit definitions. A set bit indicates - * that the register currently holds the corresponding type of data. - */ - -#define EXPRESS 0x0001 /* Simultaneous program and verify. */ -#define SIR_DATA 0x0002 /* SIR is the active SVF command. */ -#define SDR_DATA 0x0004 /* SDR is the active SVF command. */ -#define COMPRESS 0x0008 /* Data is compressed. */ -#define TDI_DATA 0x0010 /* TDI data is present. */ -#define TDO_DATA 0x0020 /* TDO data is present. */ -#define MASK_DATA 0x0040 /* MASK data is present. */ -#define HEAP_IN 0x0080 /* Data is from the heap. */ -#define LHEAP_IN 0x0200 /* Data is from intel data buffer. */ -#define VARIABLE 0x0400 /* Data is from a declared variable. */ -#define CRC_DATA 0x0800 /* CRC data is pressent. */ -#define CMASK_DATA 0x1000 /* CMASK data is pressent. */ -#define RMASK_DATA 0x2000 /* RMASK data is pressent. */ -#define READ_DATA 0x4000 /* READ data is pressent. */ -#define DMASK_DATA 0x8000 /* DMASK data is pressent. */ - -/* - * - * Pin opcodes. - * - */ - -#define signalENABLE 0x1C /* ispENABLE pin. */ -#define signalTMS 0x1D /* TMS pin. */ -#define signalTCK 0x1E /* TCK pin. */ -#define signalTDI 0x1F /* TDI pin. */ -#define signalTRST 0x20 /* TRST pin. */ - -/* - * - * Supported vendors. - * - */ - -#define VENDOR 0x56 -#define LATTICE 0x01 -#define ALTERA 0x02 -#define XILINX 0x03 - -/* - * Opcode definitions. - * - * Note: opcodes must be unique. - */ - -#define ENDDATA 0x00 /* The end of the current SDR data stream. */ -#define RUNTEST 0x01 /* The duration to stay at the stable state. */ -#define ENDDR 0x02 /* The stable state after SDR. */ -#define ENDIR 0x03 /* The stable state after SIR. */ -#define ENDSTATE 0x04 /* The stable state after RUNTEST. */ -#define TRST 0x05 /* Assert the TRST pin. */ -#define HIR 0x06 /* - * The sum of the IR bits of the - * leading devices. - */ -#define TIR 0x07 /* - * The sum of the IR bits of the trailing - * devices. - */ -#define HDR 0x08 /* The number of leading devices. */ -#define TDR 0x09 /* The number of trailing devices. */ -#define ispEN 0x0A /* Assert the ispEN pin. */ -#define FREQUENCY 0x0B /* - * The maximum clock rate to run the JTAG state - * machine. - */ -#define STATE 0x10 /* Move to the next stable state. */ -#define SIR 0x11 /* The instruction stream follows. */ -#define SDR 0x12 /* The data stream follows. */ -#define TDI 0x13 /* The following data stream feeds into - the device. */ -#define TDO 0x14 /* - * The following data stream is compared against - * the device. - */ -#define MASK 0x15 /* The following data stream is used as mask. */ -#define XSDR 0x16 /* - * The following data stream is for simultaneous - * program and verify. - */ -#define XTDI 0x17 /* The following data stream is for shift in - * only. It must be stored for the next - * XSDR. - */ -#define XTDO 0x18 /* - * There is not data stream. The data stream - * was stored from the previous XTDI. - */ -#define MEM 0x19 /* - * The maximum memory needed to allocate in - * order hold one row of data. - */ -#define WAIT 0x1A /* The duration of delay to observe. */ -#define TCK 0x1B /* The number of TCK pulses. */ -#define SHR 0x23 /* - * Set the flow control register for - * right shift - */ -#define SHL 0x24 /* - * Set the flow control register for left shift. - */ -#define HEAP 0x32 /* The memory size needed to hold one loop. */ -#define REPEAT 0x33 /* The beginning of the loop. */ -#define LEFTPAREN 0x35 /* The beginning of data following the loop. */ -#define VAR 0x55 /* Plac holder for loop data. */ -#define SEC 0x1C /* - * The delay time in seconds that must be - * observed. - */ -#define SMASK 0x1D /* The mask for TDI data. */ -#define MAX_WAIT 0x1E /* The absolute maximum wait time. */ -#define ON 0x1F /* Assert the targeted pin. */ -#define OFF 0x20 /* Dis-assert the targeted pin. */ -#define SETFLOW 0x30 /* Change the flow control register. */ -#define RESETFLOW 0x31 /* Clear the flow control register. */ - -#define CRC 0x47 /* - * The following data stream is used for CRC - * calculation. - */ -#define CMASK 0x48 /* - * The following data stream is used as mask - * for CRC calculation. - */ -#define RMASK 0x49 /* - * The following data stream is used as mask - * for read and save. - */ -#define READ 0x50 /* - * The following data stream is used for read - * and save. - */ -#define ENDLOOP 0x59 /* The end of the repeat loop. */ -#define SECUREHEAP 0x60 /* Used to secure the HEAP opcode. */ -#define VUES 0x61 /* Support continue if fail. */ -#define DMASK 0x62 /* - * The following data stream is used for dynamic - * I/O. - */ -#define COMMENT 0x63 /* Support SVF comments in the VME file. */ -#define HEADER 0x64 /* Support header in VME file. */ -#define FILE_CRC 0x65 /* Support crc-protected VME file. */ -#define LCOUNT 0x66 /* Support intelligent programming. */ -#define LDELAY 0x67 /* Support intelligent programming. */ -#define LSDR 0x68 /* Support intelligent programming. */ -#define LHEAP 0x69 /* - * Memory needed to hold intelligent data - * buffer - */ -#define CONTINUE 0x70 /* Allow continuation. */ -#define LVDS 0x71 /* Support LVDS. */ -#define ENDVME 0x7F /* End of the VME file. */ -#define ENDFILE 0xFF /* End of file. */ - -/* - * - * ispVM Embedded Return Codes. - * - */ - -#define VME_VERIFICATION_FAILURE -1 -#define VME_FILE_READ_FAILURE -2 -#define VME_VERSION_FAILURE -3 -#define VME_INVALID_FILE -4 -#define VME_ARGUMENT_FAILURE -5 -#define VME_CRC_FAILURE -6 - -#define g_ucPinTDI 0x01 -#define g_ucPinTCK 0x02 -#define g_ucPinTMS 0x04 -#define g_ucPinENABLE 0x08 -#define g_ucPinTRST 0x10 - -/* - * - * Type definitions. - * - */ - -/* Support LVDS */ -typedef struct { - unsigned short usPositiveIndex; - unsigned short usNegativeIndex; - unsigned char ucUpdate; -} LVDSPair; - -typedef enum { - min_lattice_iface_type, /* insert all new types after this */ - lattice_jtag_mode, /* jtag/tap */ - max_lattice_iface_type /* insert all new types before this */ -} Lattice_iface; - -typedef enum { - min_lattice_type, - Lattice_XP2, /* Lattice XP2 Family */ - max_lattice_type /* insert all new types before this */ -} Lattice_Family; - -typedef struct { - Lattice_Family family; /* part type */ - Lattice_iface iface; /* interface type */ - size_t size; /* bytes of data part can accept */ - void *iface_fns; /* interface function table */ - void *base; /* base interface address */ - int cookie; /* implementation specific cookie */ - char *desc; /* description string */ -} Lattice_desc; /* end, typedef Altera_desc */ - -/* Board specific implementation specific function types */ -typedef void (*Lattice_jtag_init)(void); -typedef void (*Lattice_jtag_set_tdi)(int v); -typedef void (*Lattice_jtag_set_tms)(int v); -typedef void (*Lattice_jtag_set_tck)(int v); -typedef int (*Lattice_jtag_get_tdo)(void); - -typedef struct { - Lattice_jtag_init jtag_init; - Lattice_jtag_set_tdi jtag_set_tdi; - Lattice_jtag_set_tms jtag_set_tms; - Lattice_jtag_set_tck jtag_set_tck; - Lattice_jtag_get_tdo jtag_get_tdo; -} lattice_board_specific_func; - -void writePort(unsigned char pins, unsigned char value); -unsigned char readPort(void); -void sclock(void); -void ispVMDelay(unsigned short int a_usMicroSecondDelay); -void calibration(void); - -int lattice_load(Lattice_desc *desc, const void *buf, size_t bsize); -int lattice_dump(Lattice_desc *desc, const void *buf, size_t bsize); -int lattice_info(Lattice_desc *desc); - -void ispVMStart(void); -void ispVMEnd(void); -extern void ispVMFreeMem(void); -signed char ispVMCode(void); -void ispVMDelay(unsigned short int a_usMicroSecondDelay); -void ispVMCalculateCRC32(unsigned char a_ucData); -unsigned char GetByte(void); -void writePort(unsigned char pins, unsigned char value); -unsigned char readPort(void); -void sclock(void); -#endif -- cgit v1.2.3 From 0109a7de96c64f5d4096652c36d7b6023b0f1737 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 30 Jul 2025 16:32:01 +0200 Subject: arm64: versal2: Define BOOTENV_DEV_SHARED_XSPI when distro is disabled When DISTRO_DEFAULT is disabled there is missing empty BOOTENV_DEV_SHARED_XSPI macro defined. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/4c195468c0341ddd2aca98f83cdcbd40117cc9ee.1753885919.git.michal.simek@amd.com --- include/configs/amd_versal2.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/amd_versal2.h b/include/configs/amd_versal2.h index 1ade6adfa0b..bd52e5a895f 100644 --- a/include/configs/amd_versal2.h +++ b/include/configs/amd_versal2.h @@ -145,6 +145,7 @@ #else /* CONFIG_DISTRO_DEFAULTS */ # define BOOTENV +# define BOOTENV_DEV_SHARED_XSPI #endif /* CONFIG_DISTRO_DEFAULTS */ /* Initial environment variables */ -- cgit v1.2.3 From 37aee09d83863cf7fecb67f0f0eeea18e03a43ea Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Mon, 18 Aug 2025 10:23:04 +0530 Subject: configs: versal2: Add usb_pgood_delay for versal2 boards Add usb_pgood_delay to ensure proper detection of USB devices. Increase the USB power good delay for versal2 specific boards, as certain USB sticks may not be detected without it. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20250818045304.4058177-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- include/configs/amd_versal2.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/amd_versal2.h b/include/configs/amd_versal2.h index bd52e5a895f..f1c432aa391 100644 --- a/include/configs/amd_versal2.h +++ b/include/configs/amd_versal2.h @@ -152,6 +152,7 @@ #ifndef CFG_EXTRA_ENV_SETTINGS #define CFG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ + "usb_pgood_delay=2000\0" \ BOOTENV \ BOOTENV_DEV_SHARED_XSPI \ DFU_ALT_INFO -- cgit v1.2.3