From 1d1c54f458abfb63cace544f97f491ae04f56409 Mon Sep 17 00:00:00 2001 From: Harrison Mutai Date: Tue, 4 Feb 2025 17:58:39 +0000 Subject: bloblist: fix typo in code comments Fix the two typos in the spelling of same and set in common/Kconfig and include/bloblist.h. Signed-off-by: Harrison Mutai --- include/bloblist.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/bloblist.h b/include/bloblist.h index f999391f74b..03d9862c0f1 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -463,7 +463,7 @@ int bloblist_init(void); /** * bloblist_maybe_init() - Init the bloblist system if not already done * - * Calls bloblist_init() if the GD_FLG_BLOBLIST_READY flag is not et + * Calls bloblist_init() if the GD_FLG_BLOBLIST_READY flag is not set * * Return: 0 if OK, -ve on error */ -- cgit v1.3.1 From 581b3035a898db8d3ff95f9c5aec6f094062d4e2 Mon Sep 17 00:00:00 2001 From: Harrison Mutai Date: Tue, 4 Feb 2025 17:58:40 +0000 Subject: board: vexpress64: default to hardware device tree When booting into the Linux kernel with semi-hosting, use the device tree provided by hardware unless one is provided in the current directory. Signed-off-by: Harrison Mutai Reviewed-by: Linus Walleij --- include/configs/vexpress_aemv8.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index b5a17f93efc..5eee13b3fc0 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -181,12 +181,14 @@ " if load hostfs - ${kernel_addr_r} ${kernel_name}; then" \ " setenv fdt_high 0xffffffffffffffff;" \ " setenv initrd_high 0xffffffffffffffff;" \ - " load hostfs - ${fdt_addr_r} ${fdtfile};" \ + " if test -n load hostfs - ${fdt_addr_r} ${fdtfile}; then" \ + " fdt move $fdtcontroladdr $fdt_addr_r;" \ + " fi;" \ " load hostfs - ${ramdisk_addr_r} ${ramdisk_name};" \ " fdt addr ${fdt_addr_r};" \ " fdt resize;" \ " fdt chosen ${ramdisk_addr_r} ${filesize};" \ - " booti $kernel_addr_r - $fdt_addr_r;" \ + " booti $kernel_addr_r - ${fdt_addr_r};" \ " fi;" \ "fi\0" #define BOOTENV_DEV_NAME_SMH(devtypeu, devtypel, instance) "smh " -- cgit v1.3.1 From 5f6a59e03eff0f29295ce12b3807cbac7334e0aa Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:35 -0700 Subject: test: Keep track of suite duration Show the time taken by each test suite with 'ut all' and the total time for all suites. Take care to remove any sandbox time-offset from the values. Fix the comment-format on timer_test_add_offset() while we are here. Signed-off-by: Simon Glass --- drivers/timer/sandbox_timer.c | 5 +++++ include/test/test.h | 4 ++++ include/time.h | 15 ++++++++++++++- test/Kconfig | 9 +++++++++ test/test-main.c | 17 ++++++++++++++++- 5 files changed, 48 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c index e8b54a02965..c1baf3c69ec 100644 --- a/drivers/timer/sandbox_timer.c +++ b/drivers/timer/sandbox_timer.c @@ -18,6 +18,11 @@ void timer_test_add_offset(unsigned long offset) sandbox_timer_offset += offset; } +ulong timer_test_get_offset(void) +{ + return sandbox_timer_offset; +}; + u64 notrace timer_early_get_count(void) { return os_get_nsec() / 1000 + sandbox_timer_offset * 1000; diff --git a/include/test/test.h b/include/test/test.h index bac43c81d63..25c7712d160 100644 --- a/include/test/test.h +++ b/include/test/test.h @@ -16,11 +16,15 @@ * @skip_count: Number of tests that were skipped * @test_count: Number of tests run. If a test is run muiltiple times, only one * is counted + * @start: Timer value when test started + * @duration_ms: Suite duration in milliseconds */ struct ut_stats { int fail_count; int skip_count; int test_count; + ulong start; + ulong duration_ms; }; /* diff --git a/include/time.h b/include/time.h index 3b2ba091247..f5b86bf70fe 100644 --- a/include/time.h +++ b/include/time.h @@ -28,7 +28,7 @@ uint64_t get_timer_us(uint64_t base); */ unsigned long get_timer_us_long(unsigned long base); -/* +/** * timer_test_add_offset() * * Allow tests to add to the time reported through lib/time.c functions @@ -36,6 +36,19 @@ unsigned long get_timer_us_long(unsigned long base); */ void timer_test_add_offset(unsigned long offset); +#ifdef CONFIG_SANDBOX +/** + * timer_test_get_offset() + * + * Get the total offset currently being added the time + * + * Return:: number of milliseconds the system time has been advanced + */ +ulong timer_test_get_offset(void); +#else +static inline ulong timer_test_get_offset(void) { return 0; } +#endif + /** * usec_to_tick() - convert microseconds to clock ticks * diff --git a/test/Kconfig b/test/Kconfig index 558a9cd49b4..1c8e3d16300 100644 --- a/test/Kconfig +++ b/test/Kconfig @@ -20,6 +20,15 @@ config SPL_UNIT_TEST of-platdata and SPL handover. To run these tests with the sandbox_spl board, use the -u (unit test) option. +config UNIT_TEST_DURATION + bool "Report unit-test duration" + depends on UNIT_TEST + default y + help + Enable this short the time taken by each test suite. This is reported + after the suite runs, alongside the pass/fail results. In addition, + an overall total is reported if multiple suites are run. + config UT_LIB bool "Unit tests for library functions" depends on UNIT_TEST diff --git a/test/test-main.c b/test/test-main.c index 815f54bebd5..1d821a3fe72 100644 --- a/test/test-main.c +++ b/test/test-main.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -680,6 +681,8 @@ void ut_report(struct ut_stats *stats, int run_count) else printf("Tests"); printf(" run: %d, ", stats->test_count); + if (stats) + printf("%ld ms, ", stats->duration_ms); if (stats->skip_count) printf("skipped: %d, ", stats->skip_count); printf("failures: %d\n", stats->fail_count); @@ -692,9 +695,15 @@ int ut_run_list(struct unit_test_state *uts, const char *category, { ; bool has_dm_tests = false; + ulong start_offset = 0; + ulong test_offset = 0; int ret; memset(&uts->cur, '\0', sizeof(struct ut_stats)); + if (CONFIG_IS_ENABLED(UNIT_TEST_DURATION)) { + uts->cur.start = get_timer(0); + start_offset = timer_test_get_offset(); + } if (!CONFIG_IS_ENABLED(OF_PLATDATA) && ut_list_has_dm_tests(tests, count, prefix, select_name)) { @@ -732,13 +741,19 @@ int ut_run_list(struct unit_test_state *uts, const char *category, if (has_dm_tests) dm_test_restore(uts->of_root); - ut_report(&uts->cur, 1); if (ret == -ENOENT) printf("Test '%s' not found\n", select_name); + if (CONFIG_IS_ENABLED(UNIT_TEST_DURATION)) { + test_offset = timer_test_get_offset() - start_offset; + + uts->cur.duration_ms = get_timer(uts->cur.start) - test_offset; + } + ut_report(&uts->cur, 1); uts->total.skip_count += uts->cur.skip_count; uts->total.fail_count += uts->cur.fail_count; uts->total.test_count += uts->cur.test_count; + uts->total.duration_ms += uts->cur.duration_ms; uts->run_count++; return ret; -- cgit v1.3.1 From b85df267e1f9f6f53086875975b8e4b24570365d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:36 -0700 Subject: test: Show the average time per test Show the average duration of a test, so we can keep track of how it is trending. Report the suite with the longest average test to encourage people to improve it. Add a function to update the stats based on the results from a single suite and another to show the summary information. Make this optional, since sandbox's SPL tests do not have a timer driver and people may want to print results without times. Signed-off-by: Simon Glass --- include/test/test.h | 4 ++++ test/cmd_ut.c | 32 ++++++++++++++++++++++++++++++++ test/test-main.c | 10 +++++++--- 3 files changed, 43 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/test/test.h b/include/test/test.h index 25c7712d160..877fda8d5aa 100644 --- a/include/test/test.h +++ b/include/test/test.h @@ -33,6 +33,8 @@ struct ut_stats { * @cur: Statistics for the current run * @total: Statistics for all test runs * @run_count: Number of times ut_run_list() has been called + * @worst: Sute which had the first per-text run time + * @worst_ms: Time taken by that test * @start: Store the starting mallinfo when doing leak test * @of_live: true to use livetree if available, false to use flattree * @of_root: Record of the livetree root node (used for setting up tests) @@ -56,6 +58,8 @@ struct unit_test_state { struct ut_stats cur; struct ut_stats total; int run_count; + const struct suite *worst; + int worst_ms; struct mallinfo start; struct device_node *of_root; bool of_live; diff --git a/test/cmd_ut.c b/test/cmd_ut.c index cc30c517c51..c96277d89a1 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -192,6 +192,36 @@ static int run_suite(struct unit_test_state *uts, struct suite *ste, return ret; } +static void show_stats(struct unit_test_state *uts) +{ + if (uts->run_count < 2) + return; + + ut_report(&uts->total, uts->run_count); + if (CONFIG_IS_ENABLED(UNIT_TEST_DURATION) && + uts->total.test_count && uts->worst) { + ulong avg = uts->total.duration_ms / uts->total.test_count; + + printf("Average test time: %ld ms, worst case '%s' took %d ms\n", + avg, uts->worst->name, uts->worst_ms); + } +} + +static void update_stats(struct unit_test_state *uts, const struct suite *ste) +{ + if (CONFIG_IS_ENABLED(UNIT_TEST_DURATION) && uts->cur.test_count) { + ulong avg; + + avg = uts->cur.duration_ms ? + uts->cur.duration_ms / + uts->cur.test_count : 0; + if (avg > uts->worst_ms) { + uts->worst_ms = avg; + uts->worst = ste; + } + } +} + static int do_ut_all(struct unit_test_state *uts, struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -208,6 +238,7 @@ static int do_ut_all(struct unit_test_state *uts, struct cmd_tbl *cmdtp, retval = run_suite(uts, ste, cmdtp, flag, 1, argv); if (!any_fail) any_fail = retval; + update_stats(uts, ste); } } ut_report(&uts->total, uts->run_count); @@ -306,6 +337,7 @@ static int do_ut(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) ret = run_suite(&uts, ste, cmdtp, flag, argc, argv); } + show_stats(&uts); if (ret) return ret; ut_uninit_state(&uts); diff --git a/test/test-main.c b/test/test-main.c index 1d821a3fe72..597afa25f77 100644 --- a/test/test-main.c +++ b/test/test-main.c @@ -677,12 +677,16 @@ static int ut_run_tests(struct unit_test_state *uts, const char *prefix, void ut_report(struct ut_stats *stats, int run_count) { if (run_count > 1) - printf("Suites run: %d, total tests", run_count); + printf("Total tests"); else printf("Tests"); printf(" run: %d, ", stats->test_count); - if (stats) - printf("%ld ms, ", stats->duration_ms); + if (stats && stats->test_count) { + ulong dur = stats->duration_ms; + + printf("%ld ms, average: %ld ms, ", dur, + dur ? dur / stats->test_count : 0); + } if (stats->skip_count) printf("skipped: %d, ", stats->skip_count); printf("failures: %d\n", stats->fail_count); -- cgit v1.3.1 From c908ecb7b51e886469c4fc8eb5492bdbda55b871 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:38 -0700 Subject: test: Support an init/uninit functions for test suites Some suites need things to be set up before they can run. Add a way to declare an init function using the UNIT_TEST_INIT() macro. The init function is just like any other test, but is always placed first so that it runs before all the other test functions in the suite. Add an uninit function as well, to clean up after the test. Signed-off-by: Simon Glass --- include/test/test.h | 20 ++++++++++++++++++++ test/test-main.c | 3 ++- 2 files changed, 22 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/test/test.h b/include/test/test.h index 877fda8d5aa..0f2b68a5dee 100644 --- a/include/test/test.h +++ b/include/test/test.h @@ -100,6 +100,8 @@ enum ut_flags { UTF_ETH_BOOTDEV = BIT(9), /* enable Ethernet bootdevs */ UTF_SF_BOOTDEV = BIT(10), /* enable SPI flash bootdevs */ UFT_BLOBLIST = BIT(11), /* test changes gd->bloblist */ + UTF_INIT = BIT(12), /* test inits a suite */ + UTF_UNINIT = BIT(13), /* test uninits a suite */ }; /** @@ -147,6 +149,24 @@ struct unit_test { .func = _name, \ } +/* init function for unit-test suite (the 'A' makes it first) */ +#define UNIT_TEST_INIT(_name, _flags, _suite) \ + ll_entry_declare(struct unit_test, A ## _name, ut_ ## _suite) = { \ + .file = __FILE__, \ + .name = #_name, \ + .flags = (_flags) | UTF_INIT, \ + .func = _name, \ + } + +/* uninit function for unit-test suite (the 'aaa' makes it last) */ +#define UNIT_TEST_UNINIT(_name, _flags, _suite) \ + ll_entry_declare(struct unit_test, zzz ## _name, ut_ ## _suite) = { \ + .file = __FILE__, \ + .name = #_name, \ + .flags = (_flags) | UTF_UNINIT, \ + .func = _name, \ + } + /* Get the start of a list of unit tests for a particular suite */ #define UNIT_TEST_SUITE_START(_suite) \ ll_entry_start(struct unit_test, ut_ ## _suite) diff --git a/test/test-main.c b/test/test-main.c index 8c0d820032c..ee855bfe2ed 100644 --- a/test/test-main.c +++ b/test/test-main.c @@ -620,7 +620,8 @@ static int ut_run_tests(struct unit_test_state *uts, const char *prefix, const char *test_name = test->name; int ret, i, old_fail_count; - if (!test_matches(prefix, test_name, select_name)) + if (!(test->flags & (UTF_INIT | UTF_UNINIT)) && + !test_matches(prefix, test_name, select_name)) continue; if (test->flags & UTF_MANUAL) { -- cgit v1.3.1 From ea29bad9cff2fd88d172276b58859f01649fe444 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:39 -0700 Subject: test: Tweak FDT-overlay tests Use fdt_overlay consistently in the identifiers and file/dir names. Signed-off-by: Simon Glass --- Makefile | 2 +- include/test/fdt_overlay.h | 15 ++ include/test/overlay.h | 15 -- include/test/suites.h | 4 +- test/Kconfig | 2 +- test/cmd_ut.c | 8 +- test/fdt_overlay/Kconfig | 10 + test/fdt_overlay/Makefile | 14 ++ test/fdt_overlay/cmd_ut_fdt_overlay.c | 281 +++++++++++++++++++++++++ test/fdt_overlay/test-fdt-base.dts | 20 ++ test/fdt_overlay/test-fdt-overlay-stacked.dtso | 20 ++ test/fdt_overlay/test-fdt-overlay.dtso | 95 +++++++++ test/overlay/Kconfig | 10 - test/overlay/Makefile | 14 -- test/overlay/cmd_ut_overlay.c | 280 ------------------------ test/overlay/test-fdt-base.dts | 20 -- test/overlay/test-fdt-overlay-stacked.dtso | 20 -- test/overlay/test-fdt-overlay.dtso | 95 --------- test/py/tests/test_suite.py | 4 +- 19 files changed, 465 insertions(+), 464 deletions(-) create mode 100644 include/test/fdt_overlay.h delete mode 100644 include/test/overlay.h create mode 100644 test/fdt_overlay/Kconfig create mode 100644 test/fdt_overlay/Makefile create mode 100644 test/fdt_overlay/cmd_ut_fdt_overlay.c create mode 100644 test/fdt_overlay/test-fdt-base.dts create mode 100644 test/fdt_overlay/test-fdt-overlay-stacked.dtso create mode 100644 test/fdt_overlay/test-fdt-overlay.dtso delete mode 100644 test/overlay/Kconfig delete mode 100644 test/overlay/Makefile delete mode 100644 test/overlay/cmd_ut_overlay.c delete mode 100644 test/overlay/test-fdt-base.dts delete mode 100644 test/overlay/test-fdt-overlay-stacked.dtso delete mode 100644 test/overlay/test-fdt-overlay.dtso (limited to 'include') diff --git a/Makefile b/Makefile index b32606b69f5..a9cc235b6da 100644 --- a/Makefile +++ b/Makefile @@ -895,7 +895,7 @@ endif libs-$(CONFIG_$(PHASE_)UNIT_TEST) += test/ libs-$(CONFIG_UT_ENV) += test/env/ libs-$(CONFIG_UT_OPTEE) += test/optee/ -libs-$(CONFIG_UT_OVERLAY) += test/overlay/ +libs-$(CONFIG_UT_FDT_OVERLAY) += test/fdt_overlay/ libs-y += $(if $(wildcard $(srctree)/board/$(BOARDDIR)/Makefile),board/$(BOARDDIR)/) diff --git a/include/test/fdt_overlay.h b/include/test/fdt_overlay.h new file mode 100644 index 00000000000..34e8020a496 --- /dev/null +++ b/include/test/fdt_overlay.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2016 NextThing Co + * Copyright (c) 2016 Free Electrons + */ + +#ifndef __TEST_OVERLAY_H__ +#define __TEST_OVERLAY_H__ + +#include + +/* Declare a new FDT-overlay test */ +#define FDT_OVERLAY_TEST(_name, _flags) UNIT_TEST(_name, _flags, fdt_overlay) + +#endif /* __TEST_OVERLAY_H__ */ diff --git a/include/test/overlay.h b/include/test/overlay.h deleted file mode 100644 index 5dc98399ce7..00000000000 --- a/include/test/overlay.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2016 NextThing Co - * Copyright (c) 2016 Free Electrons - */ - -#ifndef __TEST_OVERLAY_H__ -#define __TEST_OVERLAY_H__ - -#include - -/* Declare a new environment test */ -#define OVERLAY_TEST(_name, _flags) UNIT_TEST(_name, _flags, overlay) - -#endif /* __TEST_OVERLAY_H__ */ diff --git a/include/test/suites.h b/include/test/suites.h index 774dd893378..dce720b4e78 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -36,8 +36,8 @@ int cmd_ut_category(struct unit_test_state *uts, const char *name, int do_ut_bootstd(struct unit_test_state *uts, struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); +int do_ut_fdt_overlay(struct unit_test_state *uts, struct cmd_tbl *cmdtp, + int flag, int argc, char *const argv[]); int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); -int do_ut_overlay(struct unit_test_state *uts, struct cmd_tbl *cmdtp, int flag, - int argc, char *const argv[]); #endif /* __TEST_SUITES_H__ */ diff --git a/test/Kconfig b/test/Kconfig index 1c8e3d16300..01d64642fdb 100644 --- a/test/Kconfig +++ b/test/Kconfig @@ -120,7 +120,7 @@ source "test/env/Kconfig" source "test/image/Kconfig" source "test/lib/Kconfig" source "test/optee/Kconfig" -source "test/overlay/Kconfig" +source "test/fdt_overlay/Kconfig" config POST bool "Power On Self Test support" diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 0b923ee7e2e..958b591c605 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -105,6 +105,7 @@ SUITE_DECL(dm); SUITE_DECL(env); SUITE_DECL(exit); SUITE_DECL(fdt); +SUITE_DECL(fdt_overlay); SUITE_DECL(font); SUITE_DECL(hush); SUITE_DECL(lib); @@ -114,7 +115,6 @@ SUITE_DECL(mbr); SUITE_DECL(measurement); SUITE_DECL(mem); SUITE_DECL(optee); -SUITE_DECL(overlay); SUITE_DECL(pci_mps); SUITE_DECL(seama); SUITE_DECL(setexpr); @@ -134,6 +134,9 @@ static struct suite suites[] = { SUITE(env, "environment"), SUITE(exit, "shell exit and variables"), SUITE(fdt, "fdt command"), +#ifdef CONFIG_UT_FDT_OVERLAY + SUITE_CMD(fdt_overlay, do_ut_fdt_overlay, "device tree overlays"), +#endif SUITE(font, "font command"), SUITE(hush, "hush behaviour"), SUITE(lib, "library functions"), @@ -144,9 +147,6 @@ static struct suite suites[] = { SUITE(mem, "memory-related commands"), #ifdef CONFIG_UT_OPTEE SUITE_CMD(optee, do_ut_optee, "OP-TEE"), -#endif -#ifdef CONFIG_UT_OVERLAY - SUITE_CMD(overlay, do_ut_overlay, "device tree overlays"), #endif SUITE(pci_mps, "PCI Express Maximum Payload Size"), SUITE(seama, "seama command parameters loading and decoding"), diff --git a/test/fdt_overlay/Kconfig b/test/fdt_overlay/Kconfig new file mode 100644 index 00000000000..c2bb70fc970 --- /dev/null +++ b/test/fdt_overlay/Kconfig @@ -0,0 +1,10 @@ +config UT_FDT_OVERLAY + bool "Enable Device Tree Overlays Unit Tests" + depends on UNIT_TEST && OF_CONTROL && SANDBOX + default y + select OF_LIBFDT_OVERLAY + help + This enables the 'ut overlay' command which runs a series of unit + tests on the fdt overlay code. + If all is well then all tests pass although there will be a few + messages printed along the way. diff --git a/test/fdt_overlay/Makefile b/test/fdt_overlay/Makefile new file mode 100644 index 00000000000..5625c0d8885 --- /dev/null +++ b/test/fdt_overlay/Makefile @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2016 NextThing Co +# Copyright (c) 2016 Free Electrons + +# Test files +obj-y += cmd_ut_fdt_overlay.o + +DTC_FLAGS += -@ + +# DT overlays +obj-y += test-fdt-base.dtb.o +obj-y += test-fdt-overlay.dtbo.o +obj-y += test-fdt-overlay-stacked.dtbo.o diff --git a/test/fdt_overlay/cmd_ut_fdt_overlay.c b/test/fdt_overlay/cmd_ut_fdt_overlay.c new file mode 100644 index 00000000000..9fe18b60aca --- /dev/null +++ b/test/fdt_overlay/cmd_ut_fdt_overlay.c @@ -0,0 +1,281 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2016 NextThing Co + * Copyright (c) 2016 Free Electrons + */ + +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +/* 4k ought to be enough for anybody */ +#define FDT_COPY_SIZE (4 * SZ_1K) + +extern u32 __dtb_test_fdt_base_begin; +extern u32 __dtbo_test_fdt_overlay_begin; +extern u32 __dtbo_test_fdt_overlay_stacked_begin; + +static void *fdt; + +static int ut_fdt_getprop_u32_by_index(void *fdt, const char *path, + const char *name, int index, + u32 *out) +{ + const fdt32_t *val; + int node_off; + int len; + + node_off = fdt_path_offset(fdt, path); + if (node_off < 0) + return node_off; + + val = fdt_getprop(fdt, node_off, name, &len); + if (!val || (len < (sizeof(uint32_t) * (index + 1)))) + return -FDT_ERR_NOTFOUND; + + *out = fdt32_to_cpu(*(val + index)); + + return 0; +} + +static int ut_fdt_getprop_u32(void *fdt, const char *path, const char *name, + u32 *out) +{ + return ut_fdt_getprop_u32_by_index(fdt, path, name, 0, out); +} + +static int fdt_getprop_str(void *fdt, const char *path, const char *name, + const char **out) +{ + int node_off; + int len; + + node_off = fdt_path_offset(fdt, path); + if (node_off < 0) + return node_off; + + *out = fdt_stringlist_get(fdt, node_off, name, 0, &len); + + return len < 0 ? len : 0; +} + +static int fdt_overlay_test_change_int_property(struct unit_test_state *uts) +{ + u32 val = 0; + + ut_assertok(ut_fdt_getprop_u32(fdt, "/test-node", "test-int-property", + &val)); + ut_asserteq(43, val); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_change_int_property, 0); + +static int fdt_overlay_test_change_str_property(struct unit_test_state *uts) +{ + const char *val = NULL; + + ut_assertok(fdt_getprop_str(fdt, "/test-node", "test-str-property", + &val)); + ut_asserteq_str("foobar", val); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_change_str_property, 0); + +static int fdt_overlay_test_add_str_property(struct unit_test_state *uts) +{ + const char *val = NULL; + + ut_assertok(fdt_getprop_str(fdt, "/test-node", "test-str-property-2", + &val)); + ut_asserteq_str("foobar2", val); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_add_str_property, 0); + +static int fdt_overlay_test_add_node_by_phandle(struct unit_test_state *uts) +{ + int off; + + off = fdt_path_offset(fdt, "/test-node/new-node"); + ut_assert(off >= 0); + + ut_assertnonnull(fdt_getprop(fdt, off, "new-property", NULL)); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_add_node_by_phandle, 0); + +static int fdt_overlay_test_add_node_by_path(struct unit_test_state *uts) +{ + int off; + + off = fdt_path_offset(fdt, "/new-node"); + ut_assert(off >= 0); + + ut_assertnonnull(fdt_getprop(fdt, off, "new-property", NULL)); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_add_node_by_path, 0); + +static int fdt_overlay_test_add_subnode_property(struct unit_test_state *uts) +{ + int off; + + off = fdt_path_offset(fdt, "/test-node/sub-test-node"); + ut_assert(off >= 0); + + ut_assertnonnull(fdt_getprop(fdt, off, "sub-test-property", NULL)); + ut_assertnonnull(fdt_getprop(fdt, off, "new-sub-test-property", NULL)); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_add_subnode_property, 0); + +static int fdt_overlay_test_local_phandle(struct unit_test_state *uts) +{ + uint32_t local_phandle; + u32 val = 0; + int off; + + off = fdt_path_offset(fdt, "/new-local-node"); + ut_assert(off >= 0); + + local_phandle = fdt_get_phandle(fdt, off); + ut_assert(local_phandle); + + ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle", + 0, &val)); + ut_asserteq(local_phandle, val); + + ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle", + 1, &val)); + ut_asserteq(local_phandle, val); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_local_phandle, 0); + +static int fdt_overlay_test_local_phandles(struct unit_test_state *uts) +{ + uint32_t local_phandle, test_phandle; + u32 val = 0; + int off; + + off = fdt_path_offset(fdt, "/new-local-node"); + ut_assert(off >= 0); + + local_phandle = fdt_get_phandle(fdt, off); + ut_assert(local_phandle); + + off = fdt_path_offset(fdt, "/test-node"); + ut_assert(off >= 0); + + test_phandle = fdt_get_phandle(fdt, off); + ut_assert(test_phandle); + + ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 0, + &val)); + ut_asserteq(test_phandle, val); + + ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 1, + &val)); + ut_asserteq(local_phandle, val); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_local_phandles, 0); + +static int fdt_overlay_test_stacked(struct unit_test_state *uts) +{ + u32 val = 0; + + ut_assertok(ut_fdt_getprop_u32(fdt, "/new-local-node", + "stacked-test-int-property", &val)); + ut_asserteq(43, val); + + return CMD_RET_SUCCESS; +} +FDT_OVERLAY_TEST(fdt_overlay_test_stacked, 0); + +int do_ut_fdt_overlay(struct unit_test_state *uts, struct cmd_tbl *cmdtp, + int flag, int argc, char *const argv[]) +{ + struct unit_test *tests = UNIT_TEST_SUITE_START(fdt_overlay); + const int n_ents = UNIT_TEST_SUITE_COUNT(fdt_overlay); + void *fdt_base = &__dtb_test_fdt_base_begin; + void *fdt_overlay = &__dtbo_test_fdt_overlay_begin; + void *fdt_overlay_stacked = &__dtbo_test_fdt_overlay_stacked_begin; + void *fdt_overlay_copy, *fdt_overlay_stacked_copy; + int ret = -ENOMEM; + + ut_assertok(fdt_check_header(fdt_base)); + ut_assertok(fdt_check_header(fdt_overlay)); + + fdt = malloc(FDT_COPY_SIZE); + if (!fdt) + goto err1; + + fdt_overlay_copy = malloc(FDT_COPY_SIZE); + if (!fdt_overlay_copy) + goto err2; + + fdt_overlay_stacked_copy = malloc(FDT_COPY_SIZE); + if (!fdt_overlay_stacked_copy) + goto err3; + + /* + * Resize the FDT to 4k so that we have room to operate on + * + * (and relocate it since the memory might be mapped + * read-only) + */ + ut_assertok(fdt_open_into(fdt_base, fdt, FDT_COPY_SIZE)); + + /* + * Resize the overlay to 4k so that we have room to operate on + * + * (and relocate it since the memory might be mapped + * read-only) + */ + ut_assertok(fdt_open_into(fdt_overlay, fdt_overlay_copy, + FDT_COPY_SIZE)); + + /* + * Resize the stacked overlay to 4k so that we have room to operate on + * + * (and relocate it since the memory might be mapped + * read-only) + */ + ut_assertok(fdt_open_into(fdt_overlay_stacked, fdt_overlay_stacked_copy, + FDT_COPY_SIZE)); + + /* Apply the overlay */ + ut_assertok(fdt_overlay_apply(fdt, fdt_overlay_copy)); + + /* Apply the stacked overlay */ + ut_assertok(fdt_overlay_apply(fdt, fdt_overlay_stacked_copy)); + + ret = cmd_ut_category(uts, "fdt_overlay", "fdt_overlay_test_", tests, + n_ents, argc, argv); + + free(fdt_overlay_stacked_copy); +err3: + free(fdt_overlay_copy); +err2: + free(fdt); +err1: + return ret; +} diff --git a/test/fdt_overlay/test-fdt-base.dts b/test/fdt_overlay/test-fdt-base.dts new file mode 100644 index 00000000000..38278334e4d --- /dev/null +++ b/test/fdt_overlay/test-fdt-base.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2016 NextThing Co + * Copyright (c) 2016 Free Electrons + */ + +/dts-v1/; + +/ { + test: test-node { + test-int-property = <42>; + test-str-property = "foo"; + + subtest: sub-test-node { + sub-test-property; + }; + }; +}; + + diff --git a/test/fdt_overlay/test-fdt-overlay-stacked.dtso b/test/fdt_overlay/test-fdt-overlay-stacked.dtso new file mode 100644 index 00000000000..6411adec539 --- /dev/null +++ b/test/fdt_overlay/test-fdt-overlay-stacked.dtso @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2016 NextThing Co + * Copyright (c) 2016 Free Electrons + * Copyright (c) 2018 Konsulko Group + */ + +/dts-v1/; +/plugin/; + +/ { + /* Test that we can reference an overlay symbol */ + fragment@0 { + target = <&local>; + + __overlay__ { + stacked-test-int-property = <43>; + }; + }; +}; diff --git a/test/fdt_overlay/test-fdt-overlay.dtso b/test/fdt_overlay/test-fdt-overlay.dtso new file mode 100644 index 00000000000..5a21b346d07 --- /dev/null +++ b/test/fdt_overlay/test-fdt-overlay.dtso @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2016 NextThing Co + * Copyright (c) 2016 Free Electrons + */ + +/dts-v1/; +/plugin/; + +/ { + /* Test that we can change an int by another */ + fragment@0 { + target = <&test>; + + __overlay__ { + test-int-property = <43>; + }; + }; + + /* Test that we can replace a string by a longer one */ + fragment@1 { + target = <&test>; + + __overlay__ { + test-str-property = "foobar"; + }; + }; + + /* Test that we add a new property */ + fragment@2 { + target = <&test>; + + __overlay__ { + test-str-property-2 = "foobar2"; + }; + }; + + /* Test that we add a new node (by phandle) */ + fragment@3 { + target = <&test>; + + __overlay__ { + new-node { + new-property; + }; + }; + }; + + /* Test that we add a new node (by path) */ + fragment@4 { + target-path = "/"; + + __overlay__ { + new-node { + new-property; + }; + }; + }; + + fragment@5 { + target-path = "/"; + + __overlay__ { + local: new-local-node { + new-property; + }; + }; + }; + + fragment@6 { + target-path = "/"; + + __overlay__ { + test-phandle = <&test>, <&local>; + }; + }; + + fragment@7 { + target-path = "/"; + + __overlay__ { + test-several-phandle = <&local>, <&local>; + }; + }; + + fragment@8 { + target = <&test>; + + __overlay__ { + sub-test-node { + new-sub-test-property; + }; + }; + }; +}; diff --git a/test/overlay/Kconfig b/test/overlay/Kconfig deleted file mode 100644 index 881848968bb..00000000000 --- a/test/overlay/Kconfig +++ /dev/null @@ -1,10 +0,0 @@ -config UT_OVERLAY - bool "Enable Device Tree Overlays Unit Tests" - depends on UNIT_TEST && OF_CONTROL && SANDBOX - default y - select OF_LIBFDT_OVERLAY - help - This enables the 'ut overlay' command which runs a series of unit - tests on the fdt overlay code. - If all is well then all tests pass although there will be a few - messages printed along the way. diff --git a/test/overlay/Makefile b/test/overlay/Makefile deleted file mode 100644 index 47937e3c108..00000000000 --- a/test/overlay/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2016 NextThing Co -# Copyright (c) 2016 Free Electrons - -# Test files -obj-y += cmd_ut_overlay.o - -DTC_FLAGS += -@ - -# DT overlays -obj-y += test-fdt-base.dtb.o -obj-y += test-fdt-overlay.dtbo.o -obj-y += test-fdt-overlay-stacked.dtbo.o diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c deleted file mode 100644 index aefa147ec04..00000000000 --- a/test/overlay/cmd_ut_overlay.c +++ /dev/null @@ -1,280 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2016 NextThing Co - * Copyright (c) 2016 Free Electrons - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -/* 4k ought to be enough for anybody */ -#define FDT_COPY_SIZE (4 * SZ_1K) - -extern u32 __dtb_test_fdt_base_begin; -extern u32 __dtbo_test_fdt_overlay_begin; -extern u32 __dtbo_test_fdt_overlay_stacked_begin; - -static void *fdt; - -static int ut_fdt_getprop_u32_by_index(void *fdt, const char *path, - const char *name, int index, - u32 *out) -{ - const fdt32_t *val; - int node_off; - int len; - - node_off = fdt_path_offset(fdt, path); - if (node_off < 0) - return node_off; - - val = fdt_getprop(fdt, node_off, name, &len); - if (!val || (len < (sizeof(uint32_t) * (index + 1)))) - return -FDT_ERR_NOTFOUND; - - *out = fdt32_to_cpu(*(val + index)); - - return 0; -} - -static int ut_fdt_getprop_u32(void *fdt, const char *path, const char *name, - u32 *out) -{ - return ut_fdt_getprop_u32_by_index(fdt, path, name, 0, out); -} - -static int fdt_getprop_str(void *fdt, const char *path, const char *name, - const char **out) -{ - int node_off; - int len; - - node_off = fdt_path_offset(fdt, path); - if (node_off < 0) - return node_off; - - *out = fdt_stringlist_get(fdt, node_off, name, 0, &len); - - return len < 0 ? len : 0; -} - -static int fdt_overlay_change_int_property(struct unit_test_state *uts) -{ - u32 val = 0; - - ut_assertok(ut_fdt_getprop_u32(fdt, "/test-node", "test-int-property", - &val)); - ut_asserteq(43, val); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_change_int_property, 0); - -static int fdt_overlay_change_str_property(struct unit_test_state *uts) -{ - const char *val = NULL; - - ut_assertok(fdt_getprop_str(fdt, "/test-node", "test-str-property", - &val)); - ut_asserteq_str("foobar", val); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_change_str_property, 0); - -static int fdt_overlay_add_str_property(struct unit_test_state *uts) -{ - const char *val = NULL; - - ut_assertok(fdt_getprop_str(fdt, "/test-node", "test-str-property-2", - &val)); - ut_asserteq_str("foobar2", val); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_add_str_property, 0); - -static int fdt_overlay_add_node_by_phandle(struct unit_test_state *uts) -{ - int off; - - off = fdt_path_offset(fdt, "/test-node/new-node"); - ut_assert(off >= 0); - - ut_assertnonnull(fdt_getprop(fdt, off, "new-property", NULL)); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_add_node_by_phandle, 0); - -static int fdt_overlay_add_node_by_path(struct unit_test_state *uts) -{ - int off; - - off = fdt_path_offset(fdt, "/new-node"); - ut_assert(off >= 0); - - ut_assertnonnull(fdt_getprop(fdt, off, "new-property", NULL)); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_add_node_by_path, 0); - -static int fdt_overlay_add_subnode_property(struct unit_test_state *uts) -{ - int off; - - off = fdt_path_offset(fdt, "/test-node/sub-test-node"); - ut_assert(off >= 0); - - ut_assertnonnull(fdt_getprop(fdt, off, "sub-test-property", NULL)); - ut_assertnonnull(fdt_getprop(fdt, off, "new-sub-test-property", NULL)); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_add_subnode_property, 0); - -static int fdt_overlay_local_phandle(struct unit_test_state *uts) -{ - uint32_t local_phandle; - u32 val = 0; - int off; - - off = fdt_path_offset(fdt, "/new-local-node"); - ut_assert(off >= 0); - - local_phandle = fdt_get_phandle(fdt, off); - ut_assert(local_phandle); - - ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle", - 0, &val)); - ut_asserteq(local_phandle, val); - - ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-several-phandle", - 1, &val)); - ut_asserteq(local_phandle, val); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_local_phandle, 0); - -static int fdt_overlay_local_phandles(struct unit_test_state *uts) -{ - uint32_t local_phandle, test_phandle; - u32 val = 0; - int off; - - off = fdt_path_offset(fdt, "/new-local-node"); - ut_assert(off >= 0); - - local_phandle = fdt_get_phandle(fdt, off); - ut_assert(local_phandle); - - off = fdt_path_offset(fdt, "/test-node"); - ut_assert(off >= 0); - - test_phandle = fdt_get_phandle(fdt, off); - ut_assert(test_phandle); - - ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 0, - &val)); - ut_asserteq(test_phandle, val); - - ut_assertok(ut_fdt_getprop_u32_by_index(fdt, "/", "test-phandle", 1, - &val)); - ut_asserteq(local_phandle, val); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_local_phandles, 0); - -static int fdt_overlay_stacked(struct unit_test_state *uts) -{ - u32 val = 0; - - ut_assertok(ut_fdt_getprop_u32(fdt, "/new-local-node", - "stacked-test-int-property", &val)); - ut_asserteq(43, val); - - return CMD_RET_SUCCESS; -} -OVERLAY_TEST(fdt_overlay_stacked, 0); - -int do_ut_overlay(struct unit_test_state *uts, struct cmd_tbl *cmdtp, int flag, - int argc, char *const argv[]) -{ - struct unit_test *tests = UNIT_TEST_SUITE_START(overlay); - const int n_ents = UNIT_TEST_SUITE_COUNT(overlay); - void *fdt_base = &__dtb_test_fdt_base_begin; - void *fdt_overlay = &__dtbo_test_fdt_overlay_begin; - void *fdt_overlay_stacked = &__dtbo_test_fdt_overlay_stacked_begin; - void *fdt_overlay_copy, *fdt_overlay_stacked_copy; - int ret = -ENOMEM; - - ut_assertok(fdt_check_header(fdt_base)); - ut_assertok(fdt_check_header(fdt_overlay)); - - fdt = malloc(FDT_COPY_SIZE); - if (!fdt) - goto err1; - - fdt_overlay_copy = malloc(FDT_COPY_SIZE); - if (!fdt_overlay_copy) - goto err2; - - fdt_overlay_stacked_copy = malloc(FDT_COPY_SIZE); - if (!fdt_overlay_stacked_copy) - goto err3; - - /* - * Resize the FDT to 4k so that we have room to operate on - * - * (and relocate it since the memory might be mapped - * read-only) - */ - ut_assertok(fdt_open_into(fdt_base, fdt, FDT_COPY_SIZE)); - - /* - * Resize the overlay to 4k so that we have room to operate on - * - * (and relocate it since the memory might be mapped - * read-only) - */ - ut_assertok(fdt_open_into(fdt_overlay, fdt_overlay_copy, - FDT_COPY_SIZE)); - - /* - * Resize the stacked overlay to 4k so that we have room to operate on - * - * (and relocate it since the memory might be mapped - * read-only) - */ - ut_assertok(fdt_open_into(fdt_overlay_stacked, fdt_overlay_stacked_copy, - FDT_COPY_SIZE)); - - /* Apply the overlay */ - ut_assertok(fdt_overlay_apply(fdt, fdt_overlay_copy)); - - /* Apply the stacked overlay */ - ut_assertok(fdt_overlay_apply(fdt, fdt_overlay_stacked_copy)); - - ret = cmd_ut_category(uts, "overlay", "", tests, n_ents, argc, argv); - - free(fdt_overlay_stacked_copy); -err3: - free(fdt_overlay_copy); -err2: - free(fdt); -err1: - return ret; -} diff --git a/test/overlay/test-fdt-base.dts b/test/overlay/test-fdt-base.dts deleted file mode 100644 index 38278334e4d..00000000000 --- a/test/overlay/test-fdt-base.dts +++ /dev/null @@ -1,20 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2016 NextThing Co - * Copyright (c) 2016 Free Electrons - */ - -/dts-v1/; - -/ { - test: test-node { - test-int-property = <42>; - test-str-property = "foo"; - - subtest: sub-test-node { - sub-test-property; - }; - }; -}; - - diff --git a/test/overlay/test-fdt-overlay-stacked.dtso b/test/overlay/test-fdt-overlay-stacked.dtso deleted file mode 100644 index 6411adec539..00000000000 --- a/test/overlay/test-fdt-overlay-stacked.dtso +++ /dev/null @@ -1,20 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2016 NextThing Co - * Copyright (c) 2016 Free Electrons - * Copyright (c) 2018 Konsulko Group - */ - -/dts-v1/; -/plugin/; - -/ { - /* Test that we can reference an overlay symbol */ - fragment@0 { - target = <&local>; - - __overlay__ { - stacked-test-int-property = <43>; - }; - }; -}; diff --git a/test/overlay/test-fdt-overlay.dtso b/test/overlay/test-fdt-overlay.dtso deleted file mode 100644 index 5a21b346d07..00000000000 --- a/test/overlay/test-fdt-overlay.dtso +++ /dev/null @@ -1,95 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2016 NextThing Co - * Copyright (c) 2016 Free Electrons - */ - -/dts-v1/; -/plugin/; - -/ { - /* Test that we can change an int by another */ - fragment@0 { - target = <&test>; - - __overlay__ { - test-int-property = <43>; - }; - }; - - /* Test that we can replace a string by a longer one */ - fragment@1 { - target = <&test>; - - __overlay__ { - test-str-property = "foobar"; - }; - }; - - /* Test that we add a new property */ - fragment@2 { - target = <&test>; - - __overlay__ { - test-str-property-2 = "foobar2"; - }; - }; - - /* Test that we add a new node (by phandle) */ - fragment@3 { - target = <&test>; - - __overlay__ { - new-node { - new-property; - }; - }; - }; - - /* Test that we add a new node (by path) */ - fragment@4 { - target-path = "/"; - - __overlay__ { - new-node { - new-property; - }; - }; - }; - - fragment@5 { - target-path = "/"; - - __overlay__ { - local: new-local-node { - new-property; - }; - }; - }; - - fragment@6 { - target-path = "/"; - - __overlay__ { - test-phandle = <&test>, <&local>; - }; - }; - - fragment@7 { - target-path = "/"; - - __overlay__ { - test-several-phandle = <&local>, <&local>; - }; - }; - - fragment@8 { - target = <&test>; - - __overlay__ { - sub-test-node { - new-sub-test-property; - }; - }; - }; -}; diff --git a/test/py/tests/test_suite.py b/test/py/tests/test_suite.py index ae127301fd7..1e02d67efe2 100644 --- a/test/py/tests/test_suite.py +++ b/test/py/tests/test_suite.py @@ -7,10 +7,10 @@ import re # List of test suites we expect to find with 'ut info' and 'ut all' EXPECTED_SUITES = [ 'addrmap', 'bdinfo', 'bloblist', 'bootm', 'bootstd', - 'cmd', 'common', 'dm', 'env', 'exit', + 'cmd', 'common', 'dm', 'env', 'exit', 'fdt_overlay', 'fdt', 'font', 'hush', 'lib', 'loadm', 'log', 'mbr', 'measurement', 'mem', - 'overlay', 'pci_mps', 'setexpr', 'upl', + 'pci_mps', 'setexpr', 'upl', ] -- cgit v1.3.1 From a7290bc4b7248118046f748d80088a40f9171576 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:46 -0700 Subject: test: Update fdt_overlay to do init from tests Rather than having an init function and then running the tests, create a test-init function to do it. This will allow us to get rid of the command function. Signed-off-by: Simon Glass --- include/test/fdt_overlay.h | 4 ++++ test/fdt_overlay/cmd_ut_fdt_overlay.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/test/fdt_overlay.h b/include/test/fdt_overlay.h index 34e8020a496..251ad0ec97a 100644 --- a/include/test/fdt_overlay.h +++ b/include/test/fdt_overlay.h @@ -12,4 +12,8 @@ /* Declare a new FDT-overlay test */ #define FDT_OVERLAY_TEST(_name, _flags) UNIT_TEST(_name, _flags, fdt_overlay) +/* Declare init for FDT-overlay test */ +#define FDT_OVERLAY_TEST_INIT(_name, _flags) \ + UNIT_TEST_INIT(_name, _flags, fdt_overlay) + #endif /* __TEST_OVERLAY_H__ */ diff --git a/test/fdt_overlay/cmd_ut_fdt_overlay.c b/test/fdt_overlay/cmd_ut_fdt_overlay.c index ac8a3b2be23..c716c6bd6b0 100644 --- a/test/fdt_overlay/cmd_ut_fdt_overlay.c +++ b/test/fdt_overlay/cmd_ut_fdt_overlay.c @@ -81,6 +81,7 @@ static int fdt_overlay_init(struct unit_test_state *uts) return 0; } +FDT_OVERLAY_TEST_INIT(fdt_overlay_init, 0); static int fdt_getprop_str(void *fdt, const char *path, const char *name, const char **out) @@ -243,7 +244,6 @@ int do_ut_fdt_overlay(struct unit_test_state *uts, struct cmd_tbl *cmdtp, const int n_ents = UNIT_TEST_SUITE_COUNT(fdt_overlay); int ret = -ENOMEM; - ut_assertok(fdt_overlay_init(uts)); ret = cmd_ut_category(uts, "fdt_overlay", "fdt_overlay_test_", tests, n_ents, argc, argv); -- cgit v1.3.1 From ba1112839ace31b4aed85506cf5fe74256c597df Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:47 -0700 Subject: test: Drop the function for running fdt_overlay tests Use the new suite-runner to run these tests instead. Signed-off-by: Simon Glass --- include/test/suites.h | 2 -- test/cmd_ut.c | 4 +--- test/fdt_overlay/cmd_ut_fdt_overlay.c | 15 --------------- 3 files changed, 1 insertion(+), 20 deletions(-) (limited to 'include') diff --git a/include/test/suites.h b/include/test/suites.h index dce720b4e78..78f5cdb4bdf 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -36,8 +36,6 @@ int cmd_ut_category(struct unit_test_state *uts, const char *name, int do_ut_bootstd(struct unit_test_state *uts, struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); -int do_ut_fdt_overlay(struct unit_test_state *uts, struct cmd_tbl *cmdtp, - int flag, int argc, char *const argv[]); int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); #endif /* __TEST_SUITES_H__ */ diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 958b591c605..c4a42ee2e20 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -134,9 +134,7 @@ static struct suite suites[] = { SUITE(env, "environment"), SUITE(exit, "shell exit and variables"), SUITE(fdt, "fdt command"), -#ifdef CONFIG_UT_FDT_OVERLAY - SUITE_CMD(fdt_overlay, do_ut_fdt_overlay, "device tree overlays"), -#endif + SUITE(fdt_overlay, "device tree overlays"), SUITE(font, "font command"), SUITE(hush, "hush behaviour"), SUITE(lib, "library functions"), diff --git a/test/fdt_overlay/cmd_ut_fdt_overlay.c b/test/fdt_overlay/cmd_ut_fdt_overlay.c index c716c6bd6b0..3244f2d3582 100644 --- a/test/fdt_overlay/cmd_ut_fdt_overlay.c +++ b/test/fdt_overlay/cmd_ut_fdt_overlay.c @@ -236,18 +236,3 @@ static int fdt_overlay_test_stacked(struct unit_test_state *uts) return CMD_RET_SUCCESS; } FDT_OVERLAY_TEST(fdt_overlay_test_stacked, 0); - -int do_ut_fdt_overlay(struct unit_test_state *uts, struct cmd_tbl *cmdtp, - int flag, int argc, char *const argv[]) -{ - struct unit_test *tests = UNIT_TEST_SUITE_START(fdt_overlay); - const int n_ents = UNIT_TEST_SUITE_COUNT(fdt_overlay); - int ret = -ENOMEM; - - ret = cmd_ut_category(uts, "fdt_overlay", "fdt_overlay_test_", tests, - n_ents, argc, argv); - - free(fdt); - - return ret; -} -- cgit v1.3.1 From 7e1c6bd0778baffd90164e69f1d5f8ea8729a5ae Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:49 -0700 Subject: test: Drop the function for running bootstd tests Use the new suite-runner to run these tests instead. Signed-off-by: Simon Glass --- include/test/suites.h | 2 -- test/boot/bootstd_common.c | 10 ---------- test/cmd_ut.c | 4 +--- 3 files changed, 1 insertion(+), 15 deletions(-) (limited to 'include') diff --git a/include/test/suites.h b/include/test/suites.h index 78f5cdb4bdf..692633dcaa4 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -34,8 +34,6 @@ int cmd_ut_category(struct unit_test_state *uts, const char *name, const char *prefix, struct unit_test *tests, int n_ents, int argc, char *const argv[]); -int do_ut_bootstd(struct unit_test_state *uts, struct cmd_tbl *cmdtp, int flag, - int argc, char *const argv[]); int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); #endif /* __TEST_SUITES_H__ */ diff --git a/test/boot/bootstd_common.c b/test/boot/bootstd_common.c index e28cae7f374..6a84810983c 100644 --- a/test/boot/bootstd_common.c +++ b/test/boot/bootstd_common.c @@ -100,13 +100,3 @@ void bootstd_reset_usb(void) { usb_started = false; } - -int do_ut_bootstd(struct unit_test_state *uts, struct cmd_tbl *cmdtp, int flag, - int argc, char *const argv[]) -{ - struct unit_test *tests = UNIT_TEST_SUITE_START(bootstd); - const int n_ents = UNIT_TEST_SUITE_COUNT(bootstd); - - return cmd_ut_category(uts, "bootstd", "bootstd_", - tests, n_ents, argc, argv); -} diff --git a/test/cmd_ut.c b/test/cmd_ut.c index c4a42ee2e20..1885c78be41 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -125,9 +125,7 @@ static struct suite suites[] = { SUITE(bdinfo, "bdinfo (board info) command"), SUITE(bloblist, "bloblist implementation"), SUITE(bootm, "bootm command"), -#ifdef CONFIG_UT_BOOTSTD - SUITE_CMD(bootstd, do_ut_bootstd, "standard boot implementation"), -#endif + SUITE(bootstd, "standard boot implementation"), SUITE(cmd, "various commands"), SUITE(common, "tests for common/ directory"), SUITE(dm, "driver model"), -- cgit v1.3.1 From 1c05e2c0eb9cd449a743d49c89a777b6bc803a15 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:50 -0700 Subject: test: Update optee to do init and uninit from tests Rather than having an init function and then running the tests, create a test-init function to do it. This will allow us to get rid of the command function. Fix the comment abotu 'environment' while we are here. Signed-off-by: Simon Glass --- include/test/optee.h | 4 +++- test/optee/cmd_ut_optee.c | 55 ++++++++++++++++++++++++++++++----------------- 2 files changed, 38 insertions(+), 21 deletions(-) (limited to 'include') diff --git a/include/test/optee.h b/include/test/optee.h index f4255b39ee3..0a548a59e83 100644 --- a/include/test/optee.h +++ b/include/test/optee.h @@ -8,7 +8,9 @@ #include -/* Declare a new environment test */ +/* Declare a new optee test */ #define OPTEE_TEST(_name, _flags) UNIT_TEST(_name, _flags, optee) +#define OPTEE_TEST_INIT(_name, _flags) UNIT_TEST_INIT(_name, _flags, optee) +#define OPTEE_TEST_UNINIT(_name, _flags) UNIT_TEST_UNINIT(_name, _flags, optee) #endif /* __TEST_OPTEE_H__ */ diff --git a/test/optee/cmd_ut_optee.c b/test/optee/cmd_ut_optee.c index fc6674764f9..792de304c15 100644 --- a/test/optee/cmd_ut_optee.c +++ b/test/optee/cmd_ut_optee.c @@ -26,6 +26,41 @@ extern u32 __dtb_test_optee_no_optee_begin; static void *fdt; static bool expect_success; +static int optee_test_init(struct unit_test_state *uts) +{ + void *fdt_optee = &__dtb_test_optee_optee_begin; + void *fdt_no_optee = &__dtb_test_optee_no_optee_begin; + void *fdt_base = &__dtb_test_optee_base_begin; + int ret = -ENOMEM; + + ut_assertok(fdt_check_header(fdt_base)); + ut_assertok(fdt_check_header(fdt_optee)); + ut_assertok(fdt_check_header(fdt_no_optee)); + + fdt = malloc(FDT_COPY_SIZE); + if (!fdt) + return ret; + + /* + * Resize the FDT to 4k so that we have room to operate on + * + * (and relocate it since the memory might be mapped + * read-only) + */ + ut_assertok(fdt_open_into(fdt_base, fdt, FDT_COPY_SIZE)); + + return 0; +} +OPTEE_TEST_INIT(optee_test_init, 0); + +static int optee_test_uninit(struct unit_test_state *uts) +{ + free(fdt); + + return 0; +} +OPTEE_TEST_UNINIT(optee_test_uninit, 0); + static int optee_fdt_firmware(struct unit_test_state *uts) { const void *prop; @@ -101,26 +136,6 @@ int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) void *fdt_base = &__dtb_test_optee_base_begin; int ret = -ENOMEM; - uts = calloc(1, sizeof(*uts)); - if (!uts) - return -ENOMEM; - - ut_assertok(fdt_check_header(fdt_base)); - ut_assertok(fdt_check_header(fdt_optee)); - ut_assertok(fdt_check_header(fdt_no_optee)); - - fdt = malloc(FDT_COPY_SIZE); - if (!fdt) - return ret; - - /* - * Resize the FDT to 4k so that we have room to operate on - * - * (and relocate it since the memory might be mapped - * read-only) - */ - ut_assertok(fdt_open_into(fdt_base, fdt, FDT_COPY_SIZE)); - /* * (1) Try to copy optee nodes from empty dt. * This should still run successfully. -- cgit v1.3.1 From daf583a3174f1c0ea7a617e6a5bb1b83051dfbad Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:52 -0700 Subject: test: Drop the function for running optee tests Use the new suite-runner to run these tests instead. Signed-off-by: Simon Glass --- include/test/suites.h | 2 -- test/cmd_ut.c | 4 +--- test/optee/cmd_ut_optee.c | 14 -------------- 3 files changed, 1 insertion(+), 19 deletions(-) (limited to 'include') diff --git a/include/test/suites.h b/include/test/suites.h index 692633dcaa4..a2f982bf6fa 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -34,6 +34,4 @@ int cmd_ut_category(struct unit_test_state *uts, const char *name, const char *prefix, struct unit_test *tests, int n_ents, int argc, char *const argv[]); -int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); - #endif /* __TEST_SUITES_H__ */ diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 1885c78be41..6d1e20ef02e 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -141,9 +141,7 @@ static struct suite suites[] = { SUITE(mbr, "mbr command"), SUITE(measurement, "TPM-based measured boot"), SUITE(mem, "memory-related commands"), -#ifdef CONFIG_UT_OPTEE - SUITE_CMD(optee, do_ut_optee, "OP-TEE"), -#endif + SUITE(optee, "OP-TEE"), SUITE(pci_mps, "PCI Express Maximum Payload Size"), SUITE(seama, "seama command parameters loading and decoding"), SUITE(setexpr, "setexpr command"), diff --git a/test/optee/cmd_ut_optee.c b/test/optee/cmd_ut_optee.c index 71833e5f6ab..df7b877025f 100644 --- a/test/optee/cmd_ut_optee.c +++ b/test/optee/cmd_ut_optee.c @@ -170,17 +170,3 @@ static int optee_fdt_copy_already_filled(struct unit_test_state *uts) return 0; } OPTEE_TEST(optee_fdt_copy_already_filled, 0); - -int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - struct unit_test *tests = UNIT_TEST_SUITE_START(optee); - const int n_ents = UNIT_TEST_SUITE_COUNT(optee); - struct unit_test_state *uts; - void *fdt_base = &__dtb_test_optee_base_begin; - int ret = -ENOMEM; - - ret = cmd_ut_category("optee", "", tests, n_ents, argc, argv); - - free(fdt); - return ret; -} -- cgit v1.3.1 From 59713c412aeb2f1cafd42a77c948ce92d387de44 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:54 -0700 Subject: test: Drop support for test commands Now that everything is using the new test-suite features, drop support for running commands. Fix a missing closing-bracket while we are here. Signed-off-by: Simon Glass --- include/test/suites.h | 5 ----- test/cmd_ut.c | 43 ++++++++++++------------------------------- 2 files changed, 12 insertions(+), 36 deletions(-) (limited to 'include') diff --git a/include/test/suites.h b/include/test/suites.h index a2f982bf6fa..687a8a13e7f 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -7,14 +7,9 @@ #ifndef __TEST_SUITES_H__ #define __TEST_SUITES_H__ -struct cmd_tbl; struct unit_test; struct unit_test_state; -/* 'command' functions normally called do_xxx where xxx is the command name */ -typedef int (*ut_cmd_func)(struct unit_test_state *uts, struct cmd_tbl *cmd, - int flags, int argc, char *const argv[]); - /** * cmd_ut_category() - Run a category of unit tests * diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 6d1e20ef02e..b3821a0fe68 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -20,14 +20,12 @@ * @name: Name of suite * @start: First test in suite * @end: End test in suite (points to the first test in the next suite) - * @cmd: Command to use to run the suite * @help: Help-string to show for this suite */ struct suite { const char *name; struct unit_test *start; struct unit_test *end; - ut_cmd_func cmd; const char *help; }; @@ -76,21 +74,11 @@ int cmd_ut_category(struct unit_test_state *uts, const char *name, ll_start_decl(suite_start_ ## _name, struct unit_test, ut_ ## _name); \ ll_end_decl(suite_end_ ## _name, struct unit_test, ut_ ## _name) -/* declare a test suite which uses a subcommand to run */ -#define SUITE_CMD(_name, _cmd_func, _help) { \ - #_name, \ - suite_start_ ## _name, \ - suite_end_ ## _name, \ - _cmd_func, \ - _help, \ - } - /* declare a test suite which can be run directly without a subcommand */ #define SUITE(_name, _help) { \ #_name, \ suite_start_ ## _name, \ suite_end_ ## _name, \ - NULL, \ _help, \ } @@ -161,7 +149,7 @@ static bool has_tests(struct suite *ste) { int n_ents = ste->end - ste->start; - return n_ents || ste->cmd; + return n_ents; } /** run_suite() - Run a suite of tests */ @@ -169,19 +157,15 @@ static int run_suite(struct unit_test_state *uts, struct suite *ste, struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { + int n_ents = ste->end - ste->start; + char prefix[30]; int ret; - if (ste->cmd) { - ret = ste->cmd(uts, cmdtp, flag, argc, argv); - } else { - int n_ents = ste->end - ste->start; - char prefix[30]; - /* use a standard prefix */ - snprintf(prefix, sizeof(prefix), "%s_test_", ste->name); - ret = cmd_ut_category(uts, ste->name, prefix, ste->start, - n_ents, argc, argv); - } + /* use a standard prefix */ + snprintf(prefix, sizeof(prefix), "%s_test_", ste->name); + ret = cmd_ut_category(uts, ste->name, prefix, ste->start, n_ents, + argc, argv); return ret; } @@ -266,14 +250,11 @@ static int do_ut_info(struct cmd_tbl *cmdtp, int flag, int argc, struct suite *ste = &suites[i]; long n_ent = ste->end - ste->start; - if (n_ent) - printf("%5ld", n_ent); - else if (ste->cmd) - printf("%5s", "?"); - else /* suite is not present */ - continue; - printf(" %-13.13s %s\n", ste->name, ste->help); - total += n_ent; + if (n_ent) { + printf("%5ld %-13.13s %s\n", n_ent, ste->name, + ste->help); + total += n_ent; + } } puts("----- ------------ -------------------------\n"); printf("%5d %-13.13s\n", total, "Total"); -- cgit v1.3.1 From 854225191af5527619fcc944d38f2e2fd5d3ced1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:55 -0700 Subject: test: Make cmd_ut_category() static This function is not used outside the cmd_ut file anymore, so make it static. Signed-off-by: Simon Glass --- include/test/suites.h | 22 ---------------------- test/cmd_ut.c | 6 +++--- 2 files changed, 3 insertions(+), 25 deletions(-) (limited to 'include') diff --git a/include/test/suites.h b/include/test/suites.h index 687a8a13e7f..f817da747c2 100644 --- a/include/test/suites.h +++ b/include/test/suites.h @@ -7,26 +7,4 @@ #ifndef __TEST_SUITES_H__ #define __TEST_SUITES_H__ -struct unit_test; -struct unit_test_state; - -/** - * cmd_ut_category() - Run a category of unit tests - * - * @uts: Unit-test state, which must be ready for use, i.e. ut_init_state() - * has been called. The caller is responsible for calling - * ut_uninit_state() after this function returns - * @name: Category name - * @prefix: Prefix of test name - * @tests: List of tests to run - * @n_ents: Number of tests in @tests - * @argc: Argument count provided. Must be >= 1. If this is 1 then all - * tests are run, otherwise only the one named @argv[1] is run. - * @argv: Arguments: argv[1] is the test to run (if @argc >= 2) - * Return: 0 if OK, CMD_RET_FAILURE on failure - */ -int cmd_ut_category(struct unit_test_state *uts, const char *name, - const char *prefix, struct unit_test *tests, int n_ents, - int argc, char *const argv[]); - #endif /* __TEST_SUITES_H__ */ diff --git a/test/cmd_ut.c b/test/cmd_ut.c index b3821a0fe68..31ded16325f 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -35,9 +35,9 @@ static int do_ut_all(struct unit_test_state *uts, struct cmd_tbl *cmdtp, static int do_ut_info(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]); -int cmd_ut_category(struct unit_test_state *uts, const char *name, - const char *prefix, struct unit_test *tests, int n_ents, - int argc, char *const argv[]) +static int cmd_ut_category(struct unit_test_state *uts, const char *name, + const char *prefix, struct unit_test *tests, + int n_ents, int argc, char *const argv[]) { const char *test_insert = NULL; int runs_per_text = 1; -- cgit v1.3.1 From 32aba887e3d7cbcdf8fd98c107aaa79f3bd44a16 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 7 Feb 2025 11:30:56 -0700 Subject: test: Drop suites.h This file is empty now. Remove it and its uses. Signed-off-by: Simon Glass --- include/test/suites.h | 10 ---------- test/boot/bootdev.c | 1 - test/boot/bootflow.c | 1 - test/boot/bootm.c | 1 - test/boot/bootmeth.c | 1 - test/boot/bootstd_common.c | 1 - test/boot/expo.c | 1 - test/boot/image.c | 1 - test/boot/measurement.c | 1 - test/boot/upl.c | 1 - test/boot/vbe_simple.c | 1 - test/cmd/addrmap.c | 1 - test/cmd/bdinfo.c | 1 - test/cmd/exit.c | 1 - test/cmd/fdt.c | 1 - test/cmd/font.c | 1 - test/cmd/loadm.c | 1 - test/cmd/mbr.c | 1 - test/cmd/pci_mps.c | 1 - test/cmd/seama.c | 1 - test/cmd/setexpr.c | 1 - test/cmd_ut.c | 1 - test/common/bloblist.c | 1 - test/env/cmd_ut_env.c | 1 - test/fdt_overlay/cmd_ut_fdt_overlay.c | 1 - test/log/cont_test.c | 1 - test/log/nolog_test.c | 1 - test/log/pr_cont_test.c | 1 - test/log/syslog_test.c | 1 - test/log/syslog_test_ndebug.c | 1 - test/optee/optee.c | 1 - 31 files changed, 40 deletions(-) delete mode 100644 include/test/suites.h (limited to 'include') diff --git a/include/test/suites.h b/include/test/suites.h deleted file mode 100644 index f817da747c2..00000000000 --- a/include/test/suites.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * (C) Copyright 2015 - * Joe Hershberger, National Instruments, joe.hershberger@ni.com - */ - -#ifndef __TEST_SUITES_H__ -#define __TEST_SUITES_H__ - -#endif /* __TEST_SUITES_H__ */ diff --git a/test/boot/bootdev.c b/test/boot/bootdev.c index 8c44afd9297..5f07430714e 100644 --- a/test/boot/bootdev.c +++ b/test/boot/bootdev.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include "bootstd_common.h" diff --git a/test/boot/bootflow.c b/test/boot/bootflow.c index a8735c1c23d..eb7f00af39a 100644 --- a/test/boot/bootflow.c +++ b/test/boot/bootflow.c @@ -21,7 +21,6 @@ #endif #include #include -#include #include #include "bootstd_common.h" #include "../../boot/bootflow_internal.h" diff --git a/test/boot/bootm.c b/test/boot/bootm.c index 7e0ccb0e23f..1d1efe71ad5 100644 --- a/test/boot/bootm.c +++ b/test/boot/bootm.c @@ -7,7 +7,6 @@ #include #include -#include #include #include diff --git a/test/boot/bootmeth.c b/test/boot/bootmeth.c index 18ae6d7fe13..577f259fb37 100644 --- a/test/boot/bootmeth.c +++ b/test/boot/bootmeth.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include "bootstd_common.h" diff --git a/test/boot/bootstd_common.c b/test/boot/bootstd_common.c index 6a84810983c..052c0fe5cc6 100644 --- a/test/boot/bootstd_common.c +++ b/test/boot/bootstd_common.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include "bootstd_common.h" diff --git a/test/boot/expo.c b/test/boot/expo.c index db14ff86f8b..1d283a2ac95 100644 --- a/test/boot/expo.c +++ b/test/boot/expo.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include "bootstd_common.h" #include diff --git a/test/boot/image.c b/test/boot/image.c index 0894e30587f..4df7b17ce88 100644 --- a/test/boot/image.c +++ b/test/boot/image.c @@ -7,7 +7,6 @@ */ #include -#include #include #include "bootstd_common.h" diff --git a/test/boot/measurement.c b/test/boot/measurement.c index 5a49c7a6b23..1d38663fc0f 100644 --- a/test/boot/measurement.c +++ b/test/boot/measurement.c @@ -8,7 +8,6 @@ #include #include -#include #include #include #include diff --git a/test/boot/upl.c b/test/boot/upl.c index aa58cdf083b..eec89026fc3 100644 --- a/test/boot/upl.c +++ b/test/boot/upl.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include "bootstd_common.h" diff --git a/test/boot/vbe_simple.c b/test/boot/vbe_simple.c index 2fe74e1f6c6..c37de627c52 100644 --- a/test/boot/vbe_simple.c +++ b/test/boot/vbe_simple.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include "bootstd_common.h" diff --git a/test/cmd/addrmap.c b/test/cmd/addrmap.c index 1f2deb15052..72798b96edd 100644 --- a/test/cmd/addrmap.c +++ b/test/cmd/addrmap.c @@ -6,7 +6,6 @@ */ #include -#include #include /* Declare a new addrmap test */ diff --git a/test/cmd/bdinfo.c b/test/cmd/bdinfo.c index 7408c271a30..09f44ee41ed 100644 --- a/test/cmd/bdinfo.c +++ b/test/cmd/bdinfo.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/test/cmd/exit.c b/test/cmd/exit.c index 71c37edcdf6..fdde054b928 100644 --- a/test/cmd/exit.c +++ b/test/cmd/exit.c @@ -8,7 +8,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/test/cmd/fdt.c b/test/cmd/fdt.c index ab6dbd45e54..c11c181c807 100644 --- a/test/cmd/fdt.c +++ b/test/cmd/fdt.c @@ -10,7 +10,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/test/cmd/font.c b/test/cmd/font.c index af88d1b5459..7ae648d7395 100644 --- a/test/cmd/font.c +++ b/test/cmd/font.c @@ -8,7 +8,6 @@ #include #include #include -#include #include /* Declare a new fdt test */ diff --git a/test/cmd/loadm.c b/test/cmd/loadm.c index 3c623aa655f..043cd25dfb6 100644 --- a/test/cmd/loadm.c +++ b/test/cmd/loadm.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include diff --git a/test/cmd/mbr.c b/test/cmd/mbr.c index 45bab04923a..e651256a4cb 100644 --- a/test/cmd/mbr.c +++ b/test/cmd/mbr.c @@ -15,7 +15,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/test/cmd/pci_mps.c b/test/cmd/pci_mps.c index 8b3ea4a6134..6618c247d13 100644 --- a/test/cmd/pci_mps.c +++ b/test/cmd/pci_mps.c @@ -8,7 +8,6 @@ */ #include -#include #include #define PCI_MPS_TEST(_name, _flags) UNIT_TEST(_name, _flags, pci_mps) diff --git a/test/cmd/seama.c b/test/cmd/seama.c index 1edc3fcac5a..39f85f1c502 100644 --- a/test/cmd/seama.c +++ b/test/cmd/seama.c @@ -7,7 +7,6 @@ #include #include -#include #include #include diff --git a/test/cmd/setexpr.c b/test/cmd/setexpr.c index 5e9b577fe36..85803eb54b8 100644 --- a/test/cmd/setexpr.c +++ b/test/cmd/setexpr.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #define BUF_SIZE 0x100 diff --git a/test/cmd_ut.c b/test/cmd_ut.c index 31ded16325f..b44e60d5a87 100644 --- a/test/cmd_ut.c +++ b/test/cmd_ut.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include diff --git a/test/common/bloblist.c b/test/common/bloblist.c index ab8f41c6808..797bde27025 100644 --- a/test/common/bloblist.c +++ b/test/common/bloblist.c @@ -6,7 +6,6 @@ #include #include #include -#include #include #include diff --git a/test/env/cmd_ut_env.c b/test/env/cmd_ut_env.c index 81d1bb2f80d..43f1b7d1cef 100644 --- a/test/env/cmd_ut_env.c +++ b/test/env/cmd_ut_env.c @@ -5,7 +5,6 @@ */ #include -#include #include static int env_test_env_cmd(struct unit_test_state *uts) diff --git a/test/fdt_overlay/cmd_ut_fdt_overlay.c b/test/fdt_overlay/cmd_ut_fdt_overlay.c index 3244f2d3582..0084033b6ca 100644 --- a/test/fdt_overlay/cmd_ut_fdt_overlay.c +++ b/test/fdt_overlay/cmd_ut_fdt_overlay.c @@ -16,7 +16,6 @@ #include #include -#include /* 4k ought to be enough for anybody */ #define FDT_COPY_SIZE (4 * SZ_1K) diff --git a/test/log/cont_test.c b/test/log/cont_test.c index 32b1c792367..3b3b791f025 100644 --- a/test/log/cont_test.c +++ b/test/log/cont_test.c @@ -9,7 +9,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/test/log/nolog_test.c b/test/log/nolog_test.c index 341dbfc9310..1913e6817a7 100644 --- a/test/log/nolog_test.c +++ b/test/log/nolog_test.c @@ -13,7 +13,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/test/log/pr_cont_test.c b/test/log/pr_cont_test.c index 7734e927f98..67d8ac59db9 100644 --- a/test/log/pr_cont_test.c +++ b/test/log/pr_cont_test.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include diff --git a/test/log/syslog_test.c b/test/log/syslog_test.c index c4180f775b9..98b91436580 100644 --- a/test/log/syslog_test.c +++ b/test/log/syslog_test.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include "syslog_test.h" diff --git a/test/log/syslog_test_ndebug.c b/test/log/syslog_test_ndebug.c index b10e636812b..dfd0217c1e4 100644 --- a/test/log/syslog_test_ndebug.c +++ b/test/log/syslog_test_ndebug.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include "syslog_test.h" diff --git a/test/optee/optee.c b/test/optee/optee.c index df7b877025f..658621fa2fa 100644 --- a/test/optee/optee.c +++ b/test/optee/optee.c @@ -14,7 +14,6 @@ #include #include -#include /* 4k ought to be enough for anybody */ #define FDT_COPY_SIZE (4 * SZ_1K) -- cgit v1.3.1 From 940135eea5df45ac8101af3c3af2aa54762d9747 Mon Sep 17 00:00:00 2001 From: Tomas Peterka Date: Fri, 31 Jan 2025 11:08:44 +0100 Subject: Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig Add CONFIG_BOOTCOUNT_ALTBOOTCMD so the developer is able to add custom altbootcmd via Kconfig when they enable BOOTCOUNT. With this now in Kconfig, we need to move it from environment files / config.h files and in to the defconfig file. This was done by generating u-boot-initial-env for all platforms before the Kconfig change, to extract altbootcmd values and then again after to compare the result. [trini: Perform migration to defconfigs, reword commit message] Signed-off-by: Tom Rini --- board/comvetia/lxr2/lxr2.env | 1 - board/keymile/scripts/develop-common.txt | 1 - board/keymile/scripts/ramfs-common.txt | 1 - board/keymile/secu1/socfpga_secu.env | 1 - board/storopack/smegw01/smegw01.env | 15 --------------- configs/am335x_guardian_defconfig | 1 + configs/bk4r1_defconfig | 1 + configs/brppt2_defconfig | 1 + configs/capricorn_cxg3_defconfig | 1 + configs/display5_defconfig | 1 + configs/draco-etamin_defconfig | 1 + configs/draco-rastaban_defconfig | 1 + configs/draco-thuban_defconfig | 1 + configs/ge_b1x5v2_defconfig | 1 + configs/ge_bx50v3_defconfig | 1 + configs/imx6q_bosch_acc_defconfig | 1 + configs/imx6qdl_icore_mmc_defconfig | 1 + configs/imx8mm-mx8menlo_defconfig | 1 + configs/imx8mm_data_modul_edm_sbc_defconfig | 1 + configs/imx8mp_data_modul_edm_sbc_defconfig | 1 + configs/imx8mp_dhcom_drc02_defconfig | 1 + configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_dhcom_pdk3_defconfig | 1 + configs/imx8mp_dhcom_picoitx_defconfig | 1 + configs/kmcent2_defconfig | 1 + configs/kmcoge5ne_defconfig | 1 + configs/kmeter1_defconfig | 1 + configs/kmopti2_defconfig | 1 + configs/kmsupx5_defconfig | 1 + configs/kmtepr2_defconfig | 1 + configs/lxr2_defconfig | 1 + configs/m53menlo_defconfig | 1 + configs/mx53ppd_defconfig | 1 + configs/pg_wcom_expu1_defconfig | 1 + configs/pg_wcom_expu1_update_defconfig | 1 + configs/pg_wcom_seli8_defconfig | 1 + configs/pg_wcom_seli8_update_defconfig | 1 + configs/pxm2_defconfig | 1 + configs/rut_defconfig | 1 + configs/smegw01_defconfig | 1 + configs/socfpga_secu1_defconfig | 1 + configs/stm32mp13_dhcor_defconfig | 1 + configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/tuge1_defconfig | 1 + configs/tuxx1_defconfig | 1 + drivers/bootcount/Kconfig | 3 +++ include/configs/am335x_guardian.h | 5 ----- include/configs/bk4r1.h | 2 -- include/configs/brppt2.h | 1 - include/configs/display5.h | 1 - include/configs/ge_b1x5v2.h | 8 -------- include/configs/ge_bx50v3.h | 8 -------- include/configs/imx6-engicam.h | 1 - include/configs/imx6q-bosch-acc.h | 3 +-- include/configs/imx8mm-mx8menlo.h | 8 -------- include/configs/imx8mm_data_modul_edm_sbc.h | 1 - include/configs/imx8mp_data_modul_edm_sbc.h | 1 - include/configs/imx8mp_dhcom_pdk2.h | 1 - include/configs/m53menlo.h | 7 ------- include/configs/mx53ppd.h | 8 -------- include/configs/siemens-am33x-common.h | 1 - include/configs/siemens-env-common.h | 1 - include/configs/snapper9g45.h | 3 +-- include/env/pg-wcom/common.env | 1 - include/env_default.h | 3 +++ 66 files changed, 49 insertions(+), 78 deletions(-) (limited to 'include') diff --git a/board/comvetia/lxr2/lxr2.env b/board/comvetia/lxr2/lxr2.env index ec213800222..26ad4f18c68 100644 --- a/board/comvetia/lxr2/lxr2.env +++ b/board/comvetia/lxr2/lxr2.env @@ -2,7 +2,6 @@ addcons=setenv bootargs ${bootargs} console=${console},${baudrate} addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off addmisc=setenv bootargs ${bootargs} ${miscargs} addmtd=run mtdnand;run mtdspi;setenv bootargs ${bootargs} ${mtdparts} -altbootcmd=run swupdate bootcmd=run nandboot;run swupdate bootcount=2 bootlimit=3 diff --git a/board/keymile/scripts/develop-common.txt b/board/keymile/scripts/develop-common.txt index 1bdff2f908f..cfc69357e43 100644 --- a/board/keymile/scripts/develop-common.txt +++ b/board/keymile/scripts/develop-common.txt @@ -1,4 +1,3 @@ -altbootcmd=run ${subbootcmds} bootcmd=run ${subbootcmds} configure=run set_uimage; run set_tftppath; km_setboardid && run try_import_nfs_path && saveenv && reset subbootcmds=tftpfdt tftpkernel nfsargs add_default boot diff --git a/board/keymile/scripts/ramfs-common.txt b/board/keymile/scripts/ramfs-common.txt index 0a4a9c80b7e..c86e6267bdc 100644 --- a/board/keymile/scripts/ramfs-common.txt +++ b/board/keymile/scripts/ramfs-common.txt @@ -1,6 +1,5 @@ addramfs=setenv bootargs "${bootargs} phram.phram=rootfs${boot_bank},${rootfsaddr},${rootfssize}" boot_bank=-1 -altbootcmd=run ${subbootcmds} bootcmd=run ${subbootcmds} subbootcmds=save_and_reset_once tftpfdt tftpkernel setrootfsaddr tftpramfs flashargs add_default addpanic addramfs boot save_and_reset_once=setenv save_and_reset_once true && saveenv && reset diff --git a/board/keymile/secu1/socfpga_secu.env b/board/keymile/secu1/socfpga_secu.env index 147c4170ef5..60999882958 100644 --- a/board/keymile/secu1/socfpga_secu.env +++ b/board/keymile/secu1/socfpga_secu.env @@ -1,4 +1,3 @@ -altbootcmd=run bootcmd; bootlimit=6 bootnum=1 bootretry=CONFIG_BOOT_RETRY_TIME diff --git a/board/storopack/smegw01/smegw01.env b/board/storopack/smegw01/smegw01.env index 93de8669109..c0d408e4a20 100644 --- a/board/storopack/smegw01/smegw01.env +++ b/board/storopack/smegw01/smegw01.env @@ -12,21 +12,6 @@ setenv bootmenu_${emmc_priority} eMMC=run boot_emmc; \ setenv bootmenu_${sd_priority} SD=run boot_sd; #endif - -altbootcmd= - echo Performing rollback...; - if test "${mmcpart_committed}" = 1; then - setenv mmcpart 2; - setenv mmcpart_committed 2; - else - setenv mmcpart 1; - setenv mmcpart_committed 1; - fi; - setenv bootcount 0; - setenv upgrade_available; - setenv ustate 3; - saveenv; - run bootcmd; boot_emmc=setenv mmcdev_wanted 1; run persist_mmcdev; run bootcmd; boot_sd=setenv mmcdev_wanted 0; run persist_mmcdev; run bootcmd; bootcmd= diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 4059d07b5c8..c550e5e121e 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -77,6 +77,7 @@ CONFIG_SPL_DM=y CONFIG_REGMAP=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_AM33XX_NVMEM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="setenv boot_syslinux_conf \"extlinux/extlinux-rollback.conf\"; run distro_bootcmd; setenv boot_syslinux_conf \"extlinux/extlinux.conf\"; run bootcmd_ubifs0;" CONFIG_CLK=y CONFIG_CLK_CCF=y CONFIG_CLK_TI_AM3_DPLL=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 3ed587a1060..2b72ec91632 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ARP_TIMEOUT=500 CONFIG_NETCONSOLE=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="led 5 on; boot" CONFIG_VYBRID_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index f02aef24048..d468465a9cc 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -76,6 +76,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_OF_TRANSLATE is not set # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="setenv b_mode 0; run b_default;" CONFIG_SYS_I2C_MXC=y CONFIG_MMC_BROKEN_CD=y # CONFIG_SPL_DM_MMC is not set diff --git a/configs/capricorn_cxg3_defconfig b/configs/capricorn_cxg3_defconfig index 4832a795e50..10e0cbd9ad2 100644 --- a/configs/capricorn_cxg3_defconfig +++ b/configs/capricorn_cxg3_defconfig @@ -95,6 +95,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SPL_CLK=y CONFIG_CLK_IMX8=y CONFIG_CPU=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index 765920bd5d1..55f9bbaa1cf 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -96,6 +96,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run recovery" CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2 diff --git a/configs/draco-etamin_defconfig b/configs/draco-etamin_defconfig index f650dbca660..6c175dd73b9 100644 --- a/configs/draco-etamin_defconfig +++ b/configs/draco-etamin_defconfig @@ -79,6 +79,7 @@ CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_CLK=y CONFIG_CLK_TI_CTRL=y CONFIG_DFU_NAND=y diff --git a/configs/draco-rastaban_defconfig b/configs/draco-rastaban_defconfig index 511956ec844..521a090e376 100644 --- a/configs/draco-rastaban_defconfig +++ b/configs/draco-rastaban_defconfig @@ -76,6 +76,7 @@ CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_CLK=y CONFIG_CLK_TI_CTRL=y CONFIG_DFU_NAND=y diff --git a/configs/draco-thuban_defconfig b/configs/draco-thuban_defconfig index 1b2ce3b0104..2c16db237f8 100644 --- a/configs/draco-thuban_defconfig +++ b/configs/draco-thuban_defconfig @@ -76,6 +76,7 @@ CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_CLK=y CONFIG_CLK_TI_CTRL=y CONFIG_DFU_NAND=y diff --git a/configs/ge_b1x5v2_defconfig b/configs/ge_b1x5v2_defconfig index 215858c789b..fec4b67aee2 100644 --- a/configs/ge_b1x5v2_defconfig +++ b/configs/ge_b1x5v2_defconfig @@ -78,6 +78,7 @@ CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_SPI_FLASH=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="setenv mmcpart 1; run hasfirstboot || setenv mmcpart 2; run hasfirstboot || setenv mmcpart 0; if test ${mmcpart} != 0; then setenv bootcause REVERT; run swappartitions loadimage doboot; fi; run failbootcmd" CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index c24513f6ab1..676b5bc8a28 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -52,6 +52,7 @@ CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run doquiet; setenv partnum 1; run hasfirstboot || setenv partnum 2; run hasfirstboot || setenv partnum 0; if test ${partnum} != 0; then run swappartitions loadimage doboot; fi; run failbootcmd" CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_I2C_MUX=y diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig index 54758df8c01..017c27479d2 100644 --- a/configs/imx6q_bosch_acc_defconfig +++ b/configs/imx6q_bosch_acc_defconfig @@ -86,6 +86,7 @@ CONFIG_SPL_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_PMIC_PFUZE100=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run handle_ustate; run switch_bootset; run save_env; run bootcmd" CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index fb0787d1beb..269fe271a76 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -72,6 +72,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run recoveryboot" CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 CONFIG_SYS_I2C_MXC=y CONFIG_FSL_USDHC=y diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index ae9595e82b4..ad310750c77 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -102,6 +102,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_SPL_DM=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="mmc partconf 0 mmcpart ; if test ${mmcpart} -eq 1 ; then mmc partconf 0 1 2 0 ; else mmc partconf 0 1 1 0 ; fi ; boot" CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000 CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index 66cb1331ded..debaa7cb5aa 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -37,3 +37,4 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x60000000 +CONFIG_BOOTCOUNT_ALTBOOTCMD=run bootcmd diff --git a/configs/imx8mp_data_modul_edm_sbc_defconfig b/configs/imx8mp_data_modul_edm_sbc_defconfig index ea8109bf049..5024c093b99 100644 --- a/configs/imx8mp_data_modul_edm_sbc_defconfig +++ b/configs/imx8mp_data_modul_edm_sbc_defconfig @@ -52,3 +52,4 @@ CONFIG_USB_HOST_ETHER=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_XHCI_HCD=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" diff --git a/configs/imx8mp_dhcom_drc02_defconfig b/configs/imx8mp_dhcom_drc02_defconfig index c43839cecf5..dccf5ffc1e6 100644 --- a/configs/imx8mp_dhcom_drc02_defconfig +++ b/configs/imx8mp_dhcom_drc02_defconfig @@ -5,3 +5,4 @@ CONFIG_ARCH_IMX8M=y CONFIG_DEFAULT_DEVICE_TREE="imx8mp-dhcom-drc02" CONFIG_DEFAULT_FDT_FILE="imx8mp-dhcom-drc02.dtb" CONFIG_PREBOOT="" +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd ; reset" diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index aae2e210f44..4f50806573b 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -7,3 +7,4 @@ CONFIG_DEFAULT_FDT_FILE="freescale/imx8mp-dhcom-pdk2.dtb" CONFIG_PREBOOT="" CONFIG_OF_UPSTREAM=y CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd ; reset" diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig index f40bf269d97..d505ddfd09d 100644 --- a/configs/imx8mp_dhcom_pdk3_defconfig +++ b/configs/imx8mp_dhcom_pdk3_defconfig @@ -14,3 +14,4 @@ CONFIG_PCIE_DW_IMX=y CONFIG_PHY_IMX8M_PCIE=y CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd ; reset" diff --git a/configs/imx8mp_dhcom_picoitx_defconfig b/configs/imx8mp_dhcom_picoitx_defconfig index 99cd5f279dc..d98ca9e434f 100644 --- a/configs/imx8mp_dhcom_picoitx_defconfig +++ b/configs/imx8mp_dhcom_picoitx_defconfig @@ -5,3 +5,4 @@ CONFIG_ARCH_IMX8M=y CONFIG_DEFAULT_DEVICE_TREE="imx8mp-dhcom-picoitx" CONFIG_DEFAULT_FDT_FILE="imx8mp-dhcom-picoitx.dtb" CONFIG_PREBOOT="" +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd ; reset" diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 4e37df2e614..76e98c9b2a4 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -60,6 +60,7 @@ CONFIG_ENV_ADDR_REDUND=0xebf00000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="fm1-mac5" CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 6b2fc2ec6e7..cf50e2d27d8 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -166,6 +166,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 55e87b0215a..7638fc2f5cf 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -145,6 +145,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index df419b01c68..1c750455fc6 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -152,6 +152,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index 1436860f1cc..5dd98175cd3 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -137,6 +137,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index cce7a044aee..2b240b3380d 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -151,6 +151,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/configs/lxr2_defconfig b/configs/lxr2_defconfig index 7ab817960a2..b41a6ed93fd 100644 --- a/configs/lxr2_defconfig +++ b/configs/lxr2_defconfig @@ -77,6 +77,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run swupdate" CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C4000 CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DM_I2C=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 6130cd8e466..ccd1cb7475b 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -79,6 +79,7 @@ CONFIG_USE_HOSTNAME=y CONFIG_HOSTNAME="m53menlo" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="if test ${mmcpart} -eq 1 ; then setenv mmcpart 2 ; else setenv mmcpart 1 ; fi ; boot" CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index d91c59ffe46..4ec8516015f 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -47,6 +47,7 @@ CONFIG_ARP_TIMEOUT=200 CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_I2C_EEPROM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run doquiet; setenv partnum 1; run hasfirstboot || setenv partnum 2; run hasfirstboot || setenv partnum 0; if test ${partnum} != 0; then run swappartitions loadimage doboot; fi; run failbootcmd" CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_I2C_MUX=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index 1120191585c..4b82b077ea7 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -73,6 +73,7 @@ CONFIG_HOSTNAME="EXPU1" CONFIG_VERSION_VARIABLE=y # CONFIG_SCSI_AHCI is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 772aa210fc2..53d54789687 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -71,6 +71,7 @@ CONFIG_HOSTNAME="EXPU1" CONFIG_VERSION_VARIABLE=y # CONFIG_SCSI_AHCI is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 6cde217a34c..731ca435089 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -73,6 +73,7 @@ CONFIG_HOSTNAME="SELI8" CONFIG_VERSION_VARIABLE=y # CONFIG_SCSI_AHCI is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index e8afc95d607..2598e477ed5 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -71,6 +71,7 @@ CONFIG_HOSTNAME="SELI8" CONFIG_VERSION_VARIABLE=y # CONFIG_SCSI_AHCI is not set CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_DDR_CLK_FREQ=50000000 CONFIG_SYS_FSL_DDR3=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 162b1f1c748..fd2727e48d7 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -85,6 +85,7 @@ CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_DFU_NAND=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_DM_I2C=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index dd8df542aa3..b2930e8044d 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -86,6 +86,7 @@ CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_DFU_NAND=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_DM_I2C=y diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 6dc95e551e3..ae6c9b60cd5 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -60,6 +60,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="echo Performing rollback...; if test \"${mmcpart_committed}\" = 1; then setenv mmcpart 2; setenv mmcpart_committed 2; else setenv mmcpart 1; setenv mmcpart_committed 1; fi; setenv bootcount 0; setenv upgrade_available; setenv ustate 3; saveenv; run bootcmd;" CONFIG_DFU_MMC=y CONFIG_DM_I2C=y CONFIG_SUPPORT_EMMC_BOOT=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index dc6d66ade23..84badec60aa 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -74,6 +74,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_DM_BOOTCOUNT_RTC=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd;" CONFIG_DWAPB_GPIO=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/stm32mp13_dhcor_defconfig b/configs/stm32mp13_dhcor_defconfig index ff948b904be..4dc3954128d 100644 --- a/configs/stm32mp13_dhcor_defconfig +++ b/configs/stm32mp13_dhcor_defconfig @@ -44,3 +44,4 @@ CONFIG_OPTEE=y CONFIG_USB_ONBOARD_HUB=y CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000 CONFIG_ERRNO_STR=y +CONFIG_BOOTCOUNT_ALTBOOTCMD=" diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index a28f2862048..f89c921925d 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -8,3 +8,4 @@ CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_SYS_I2C_EEPROM_BUS=3 CONFIG_OF_LIST="st/stm32mp157c-dhcom-pdk2 st/stm32mp153c-dhcom-drc02 st/stm32mp157c-dhcom-picoitx" CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_BOOTCOUNT_ALTBOOTCMD=" diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index f6f2af6e7a2..bde668761b3 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -8,3 +8,4 @@ CONFIG_OF_LIST="st/stm32mp157a-dhcor-avenger96 st/stm32mp151a-dhcor-testbench st CONFIG_SYS_I2C_EEPROM_ADDR=0x53 CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_BOOTCOUNT_ALTBOOTCMD=" diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index d1b771993cf..ab0fd12bc48 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -137,6 +137,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BOOTCOUNT_BE=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index 1dc737e4954..e5a99b24dab 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -151,6 +151,7 @@ CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y CONFIG_BOOTCOUNT_MEM=y +CONFIG_BOOTCOUNT_ALTBOOTCMD="run bootcmd" CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xF0001001 CONFIG_SYS_OR0_PRELIM=0xF0000E55 diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 0080d2a165c..99b6c7534fd 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -183,6 +183,9 @@ config BOOTCOUNT_BOOTLIMIT counter being cleared. If set to 0, do not set a boot limit in the environment. +config BOOTCOUNT_ALTBOOTCMD + string "Alternative boot command when BOOTLIMIT is reached" + config SYS_BOOTCOUNT_SINGLEWORD bool "Use single word to pack boot count and magic value" depends on BOOTCOUNT_GENERIC diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 96efd38594a..385dec2ff4f 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -63,11 +63,6 @@ "fi; " \ "setenv extrabootargs $extrabootargs \"swi_attached\"; " \ "fi;" \ - "run bootcmd_ubifs0;\0" \ - "altbootcmd=" \ - "setenv boot_syslinux_conf \"extlinux/extlinux-rollback.conf\"; " \ - "run distro_bootcmd; " \ - "setenv boot_syslinux_conf \"extlinux/extlinux.conf\"; " \ "run bootcmd_ubifs0;\0" #endif /* ! CONFIG_XPL_BUILD */ diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index 5df8d03c706..6d24c5decd5 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -16,8 +16,6 @@ #define BK4_EXTRA_ENV_SETTINGS \ "bootlimit=3\0" \ "eraseuserdata=false\0" \ - "altbootcmd=led 5 on; " \ - "boot\0" \ "set_gpio103=mw 0x400ff0c4 0x0080; mw 0x4004819C 0x000011bf\0" \ "set_gpio102=mw 0x400ff0c4 0x40; mw 0x40048198 0x000011bf\0" \ "set_gpio96=mw 0x40048180 0x282; mw 0x400ff0c4 0x1\0"\ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index d01f0d37316..93559a171ae 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -64,7 +64,6 @@ BUR_COMMON_ENV \ " do echo \"### booting ${target} ###\"; run b_${target};" \ " if test ${b_break} = 1; then; exit; fi; done\0" \ "loaddev=mmc 0\0" \ -"altbootcmd=setenv b_mode 0; run b_default;\0" \ "bootlimit=1\0" \ "net2nor=sf probe && dhcp &&" \ " tftp ${loadaddr} SPL && sf erase 0 +${filesize} &&" \ diff --git a/include/configs/display5.h b/include/configs/display5.h index 51fa2b03a2e..98b1e5af2c0 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -170,7 +170,6 @@ "display=tianma-tm070-800x480\0" \ "board=display5\0" \ "mmcdev=0\0" \ - "altbootcmd=run recovery\0" \ "bootdelay=1\0" \ "baudrate=115200\0" \ "ethact=FEC\0" \ diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index f3d85c9c11e..5e3f67124c0 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -82,14 +82,6 @@ "doboot=" \ "echo Booting from mmc:${mmcdev}:${mmcpart} ...; " \ "run helix;\0" \ - "altbootcmd=" \ - "setenv mmcpart 1; run hasfirstboot || setenv mmcpart 2; " \ - "run hasfirstboot || setenv mmcpart 0; " \ - "if test ${mmcpart} != 0; then " \ - "setenv bootcause REVERT; " \ - "run swappartitions loadimage doboot; " \ - "fi; " \ - "run failbootcmd\0" \ "tryboot=" \ "setenv mmcpart 1; run hasfirstboot || setenv mmcpart 2; " \ "run loadimage || run swappartitions && run loadimage || " \ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 07b36706e56..c8ef048bd43 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -67,14 +67,6 @@ "Try again, or contact GE Service for support.\"; " \ "bootcount reset; " \ "while true; do sleep 1; done; \0" \ - "altbootcmd=" \ - "run doquiet; " \ - "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ - "run hasfirstboot || setenv partnum 0; " \ - "if test ${partnum} != 0; then " \ - "run swappartitions loadimage doboot; " \ - "fi; " \ - "run failbootcmd\0" \ "loadimage=" \ "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ "doboot=" \ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 786b70fe064..3d5701c636c 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -47,7 +47,6 @@ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \ - "altbootcmd=run recoveryboot\0"\ "fitboot=echo Booting FIT image from mmc ...; " \ "run mmcargs; " \ "bootm ${loadaddr}\0" \ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 64ddbf711d3..84da8250684 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -42,8 +42,7 @@ "env_persisted=0\0" \ "env_persist=if test ${env_persisted} != 1; " \ "then env set env_persisted 1; run save_env; fi;\0" \ - "save_env=env save; env save\0" \ - "altbootcmd=run handle_ustate; run switch_bootset; run save_env; run bootcmd\0" + "save_env=env save; env save\0" #define CFG_ENV_FLAGS_LIST_STATIC \ "bootset:bw," \ diff --git a/include/configs/imx8mm-mx8menlo.h b/include/configs/imx8mm-mx8menlo.h index 7058d632d67..626ccae7205 100644 --- a/include/configs/imx8mm-mx8menlo.h +++ b/include/configs/imx8mm-mx8menlo.h @@ -18,14 +18,6 @@ "devtype=mmc\0" \ "devnum=1\0" \ "distro_bootpart=1\0" \ - "altbootcmd=" \ - "mmc partconf 0 mmcpart ; " \ - "if test ${mmcpart} -eq 1 ; then " \ - "mmc partconf 0 1 2 0 ; " \ - "else " \ - "mmc partconf 0 1 1 0 ; " \ - "fi ; " \ - "boot\0" \ "boot_file=fitImage\0" \ "console=ttymxc0\0" \ "fdt_addr=0x43000000\0" \ diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 57ecb5e2190..5ce4219912f 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -34,7 +34,6 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 #define CFG_EXTRA_ENV_SETTINGS \ - "altbootcmd=run bootcmd\0" \ "bootlimit=3\0" \ "devtype=mmc\0" \ "devpart=1\0" \ diff --git a/include/configs/imx8mp_data_modul_edm_sbc.h b/include/configs/imx8mp_data_modul_edm_sbc.h index de5bdd30e18..58a03b35ac4 100644 --- a/include/configs/imx8mp_data_modul_edm_sbc.h +++ b/include/configs/imx8mp_data_modul_edm_sbc.h @@ -24,7 +24,6 @@ #define FEC_QUIRK_ENET_MAC #define CFG_EXTRA_ENV_SETTINGS \ - "altbootcmd=run bootcmd\0" \ "bootlimit=3\0" \ "devtype=mmc\0" \ "devpart=1\0" \ diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index c848fce8bda..f3e239d780f 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -28,7 +28,6 @@ #define CFG_SYS_FSL_ESDHC_ADDR 0 #define CFG_EXTRA_ENV_SETTINGS \ - "altbootcmd=run bootcmd ; reset\0" \ "bootlimit=3\0" \ "dfu_alt_info=" \ /* RAM block at DRAM offset 256..768 MiB */ \ diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 1ea4fa59fd5..a6aafb51854 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -93,13 +93,6 @@ "splashfile=boot/usplash.bmp.gz\0" \ "splashimage=0x88000000\0" \ "splashpos=m,m\0" \ - "altbootcmd=" \ - "if test ${mmcpart} -eq 1 ; then " \ - "setenv mmcpart 2 ; " \ - "else " \ - "setenv mmcpart 1 ; " \ - "fi ; " \ - "boot\0" \ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" \ "addcons=" \ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 6d1f669de50..3707de254e1 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -59,14 +59,6 @@ "Try again, or contact GE Service for support.\"; " \ "bootcount reset; " \ "while true; do sleep 1; done; \0" \ - "altbootcmd=" \ - "run doquiet; " \ - "setenv partnum 1; run hasfirstboot || setenv partnum 2; " \ - "run hasfirstboot || setenv partnum 0; " \ - "if test ${partnum} != 0; then " \ - "run swappartitions loadimage doboot; " \ - "fi; " \ - "run failbootcmd\0" \ "loadimage=" \ "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ "doboot=" \ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 74b7fe85800..a918dc1350c 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -128,7 +128,6 @@ "verify=no \0" \ "project_dir=targetdir\0" \ "upgrade_available=0\0" \ - "altbootcmd=run bootcmd\0" \ "partitionset_active=A\0" \ "loadaddr=0x82000000\0" \ "kloadaddr=0x81000000\0" \ diff --git a/include/configs/siemens-env-common.h b/include/configs/siemens-env-common.h index 36fa5d936f7..c028823e1eb 100644 --- a/include/configs/siemens-env-common.h +++ b/include/configs/siemens-env-common.h @@ -183,7 +183,6 @@ "rootfs_name=/dev/mmcblk0\0" \ "upgrade_available=0\0" \ "bootlimit=3\0" \ - "altbootcmd=run bootcmd\0" \ "optargs=\0" \ /**********************************************************************/ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index df8ed451a43..8ea708d0e92 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -58,8 +58,7 @@ "boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \ "boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \ "boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \ - "bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \ - "altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0" + "bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" /* Console settings */ diff --git a/include/env/pg-wcom/common.env b/include/env/pg-wcom/common.env index 4b660cebd67..5f2ba1c4090 100644 --- a/include/env/pg-wcom/common.env +++ b/include/env/pg-wcom/common.env @@ -22,7 +22,6 @@ add_default=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${ WCOM_UBI_LINUX_MTD addpanic=setenv bootargs ${bootargs} panic=1 panic_on_oops=1 -altbootcmd=run bootcmd backup_bank=0 boot=bootm ${load_addr_r} - ${fdt_addr_r} diff --git a/include/env_default.h b/include/env_default.h index aa3dd40f3fa..60c39f9853f 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -115,6 +115,9 @@ const char default_environment[] = { #if defined(CONFIG_BOOTCOUNT_BOOTLIMIT) && (CONFIG_BOOTCOUNT_BOOTLIMIT > 0) "bootlimit=" __stringify(CONFIG_BOOTCOUNT_BOOTLIMIT)"\0" #endif +#ifdef CONFIG_BOOTCOUNT_ALTBOOTCMD + "altbootcmd=" CONFIG_BOOTCOUNT_ALTBOOTCMD "\0" +#endif #ifdef CONFIG_MTDIDS_DEFAULT "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" #endif -- cgit v1.3.1 From 6799f09069f402a33c9cb202b71e144497bd9b7a Mon Sep 17 00:00:00 2001 From: Raymond Mao Date: Wed, 19 Feb 2025 16:02:19 -0800 Subject: bloblist: refactor xferlist and bloblist Refactor the xferlist to remove the relocating when bloblist passed from the boot args. Refactor bloblist init to use incoming standard passage by default if a valid transfer list exists in the boot args. For bloblist relocation, use the actual total size if it has a smaller BLOBLIST_SIZE_RELOC. Signed-off-by: Raymond Mao Suggested-by: Ilias Apalodimas --- arch/arm/lib/xferlist.c | 12 ++++---- common/bloblist.c | 73 +++++++++++++++++++++++++++---------------------- common/board_f.c | 24 ++++++++++------ include/bloblist.h | 11 ++++---- 4 files changed, 66 insertions(+), 54 deletions(-) (limited to 'include') diff --git a/arch/arm/lib/xferlist.c b/arch/arm/lib/xferlist.c index f9c5d88bd47..6425936d354 100644 --- a/arch/arm/lib/xferlist.c +++ b/arch/arm/lib/xferlist.c @@ -8,18 +8,16 @@ #include #include "xferlist.h" -int xferlist_from_boot_arg(ulong addr, ulong size) +int xferlist_from_boot_arg(ulong *addr) { int ret; - ret = bloblist_check(saved_args[3], size); - if (ret) - return ret; - ret = bloblist_check_reg_conv(saved_args[0], saved_args[2], - saved_args[1]); + saved_args[1], saved_args[3]); if (ret) return ret; - return bloblist_reloc((void *)addr, size); + *addr = bloblist_get_base(); + + return 0; } diff --git a/common/bloblist.c b/common/bloblist.c index 1fcd387593c..be05f8082ff 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -492,8 +492,7 @@ int bloblist_reloc(void *to, uint to_size) /* * Weak default function for getting bloblist from boot args. */ -int __weak xferlist_from_boot_arg(ulong __always_unused addr, - ulong __always_unused size) +int __weak xferlist_from_boot_arg(ulong __always_unused *addr) { return -ENOENT; } @@ -501,37 +500,39 @@ int __weak xferlist_from_boot_arg(ulong __always_unused addr, int bloblist_init(void) { bool fixed = IS_ENABLED(CONFIG_BLOBLIST_FIXED); - int ret = -ENOENT; + int ret = 0; ulong addr = 0, size; - /* - * If U-Boot is not in the first phase, an existing bloblist must be - * at a fixed address. - */ - bool from_addr = fixed && !xpl_is_first_phase(); - if (xpl_prev_phase() == PHASE_TPL && !IS_ENABLED(CONFIG_TPL_BLOBLIST)) - from_addr = false; - if (fixed) - addr = IF_ENABLED_INT(CONFIG_BLOBLIST_FIXED, - CONFIG_BLOBLIST_ADDR); - size = CONFIG_BLOBLIST_SIZE; + /* Check if a valid transfer list passed in */ + if (!xferlist_from_boot_arg(&addr)) { + size = bloblist_get_total_size(); + } else { + /* + * If U-Boot is not in the first phase, an existing bloblist must + * be at a fixed address. + */ + bool from_addr = fixed && !xpl_is_first_phase(); + + ret = -ENOENT; - /* - * If the current boot stage is the first phase of U-Boot, then an - * architecture-specific routine should be used to handle the bloblist - * passed from the previous boot loader - */ - if (xpl_is_first_phase() && !IS_ENABLED(CONFIG_BLOBLIST_ALLOC)) - ret = xferlist_from_boot_arg(addr, size); - else if (from_addr) - ret = bloblist_check(addr, size); + if (xpl_prev_phase() == PHASE_TPL && + !IS_ENABLED(CONFIG_TPL_BLOBLIST)) + from_addr = false; + if (fixed) + addr = IF_ENABLED_INT(CONFIG_BLOBLIST_FIXED, + CONFIG_BLOBLIST_ADDR); + size = CONFIG_BLOBLIST_SIZE; - if (ret) - log_warning("Bloblist at %lx not found (err=%d)\n", - addr, ret); - else - /* Get the real size */ - size = gd->bloblist->total_size; + if (from_addr) + ret = bloblist_check(addr, size); + + if (ret) + log_warning("Bloblist at %lx not found (err=%d)\n", + addr, ret); + else + /* Get the real size */ + size = gd->bloblist->total_size; + } if (ret) { /* @@ -556,6 +557,7 @@ int bloblist_init(void) log_debug("Found existing bloblist size %lx at %lx\n", size, addr); } + if (ret) return log_msg_ret("ini", ret); gd->flags |= GD_FLG_BLOBLIST_READY; @@ -576,10 +578,11 @@ int bloblist_maybe_init(void) return 0; } -int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig) +int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig, ulong xlist) { u64 version = BLOBLIST_REGCONV_VER; ulong sigval; + int ret; if ((IS_ENABLED(CONFIG_64BIT) && !IS_ENABLED(CONFIG_SPL_BUILD)) || (IS_ENABLED(CONFIG_SPL_64BIT) && IS_ENABLED(CONFIG_SPL_BUILD))) { @@ -590,8 +593,14 @@ int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig) ((version & BLOBLIST_REGCONV_MASK) << BLOBLIST_REGCONV_SHIFT_32)); } - if (rzero || rsig != sigval || - rfdt != (ulong)bloblist_find(BLOBLISTT_CONTROL_FDT, 0)) { + if (rzero || rsig != sigval) + return -EIO; + + ret = bloblist_check(xlist, 0); + if (ret) + return ret; + + if (rfdt != (ulong)bloblist_find(BLOBLISTT_CONTROL_FDT, 0)) { gd->bloblist = NULL; /* Reset the gd bloblist pointer */ return -EIO; } diff --git a/common/board_f.c b/common/board_f.c index 6c5c3bfab48..2912320054f 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -624,11 +624,14 @@ static int reserve_stacks(void) static int reserve_bloblist(void) { #ifdef CONFIG_BLOBLIST + ulong size = bloblist_get_total_size(); + + if (size < CONFIG_BLOBLIST_SIZE_RELOC) + size = CONFIG_BLOBLIST_SIZE_RELOC; + /* Align to a 4KB boundary for easier reading of addresses */ - gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp - - CONFIG_BLOBLIST_SIZE_RELOC, 0x1000); - gd->boardf->new_bloblist = map_sysmem(gd->start_addr_sp, - CONFIG_BLOBLIST_SIZE_RELOC); + gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp - size, 0x1000); + gd->boardf->new_bloblist = map_sysmem(gd->start_addr_sp, size); #endif return 0; @@ -698,11 +701,14 @@ static int reloc_bloblist(void) return 0; } if (gd->boardf->new_bloblist) { - debug("Copying bloblist from %p to %p, size %x\n", - gd->bloblist, gd->boardf->new_bloblist, - gd->bloblist->total_size); - return bloblist_reloc(gd->boardf->new_bloblist, - CONFIG_BLOBLIST_SIZE_RELOC); + ulong size = bloblist_get_total_size(); + + if (size < CONFIG_BLOBLIST_SIZE_RELOC) + size = CONFIG_BLOBLIST_SIZE_RELOC; + + debug("Copying bloblist from %p to %p, size %lx\n", + gd->bloblist, gd->boardf->new_bloblist, size); + return bloblist_reloc(gd->boardf->new_bloblist, size); } #endif diff --git a/include/bloblist.h b/include/bloblist.h index 03d9862c0f1..ff9d5549052 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -483,19 +483,18 @@ static inline int bloblist_maybe_init(void) * @rfdt: Register that holds the FDT base address. * @rzero: Register that must be zero. * @rsig: Register that holds signature and register conventions version. + * @xlist: Register that holds the transfer list. * Return: 0 if OK, -EIO if the bloblist is not compliant to the register * conventions. */ -int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig); +int bloblist_check_reg_conv(ulong rfdt, ulong rzero, ulong rsig, ulong xlist); /** - * xferlist_from_boot_arg() - Get bloblist from the boot args and relocate it - * to the specified address. + * xferlist_from_boot_arg() - Get bloblist from the boot args. * - * @addr: Address for the bloblist - * @size: Size of space reserved for the bloblist + * @addr: Address of the bloblist * Return: 0 if OK, else on error */ -int xferlist_from_boot_arg(ulong addr, ulong size); +int xferlist_from_boot_arg(ulong *addr); #endif /* __BLOBLIST_H */ -- cgit v1.3.1 From 03a76b1a737fc9cf511aa7520999968ec3d2fd78 Mon Sep 17 00:00:00 2001 From: Raymond Mao Date: Wed, 19 Feb 2025 16:02:20 -0800 Subject: bloblist: kconfig for mandatory incoming standard passage In previous commit, incoming standard passage is used by default when initializing the bloblist, so explicitly BLOBLIST_PASSAGE is no more needed. Rename it as BLOBLIST_PASSAGE_MANDATORY to determine the behaviors when an incoming transfer list does not exist or is invalid. When it is selected, incoming standard passage is mandatory and U-Boot will report an error when a valid incoming transfer list is missing. Signed-off-by: Raymond Mao --- common/Kconfig | 14 +++++++++----- common/bloblist.c | 7 +++++++ configs/vexpress_fvp_bloblist_defconfig | 2 +- doc/board/armltd/vexpress64.rst | 4 ++-- include/bloblist.h | 5 ++--- 5 files changed, 21 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/common/Kconfig b/common/Kconfig index 7b2db46ef06..1d6de8badf7 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1066,11 +1066,15 @@ config BLOBLIST_ALLOC specify a fixed address on systems where this is unknown or can change at runtime. -config BLOBLIST_PASSAGE - bool "Use bloblist in-place" +config BLOBLIST_PASSAGE_MANDATORY + bool "Use bloblist in-place mandatorily" help - Use a bloblist in the incoming standard passage. The size is detected - automatically so CONFIG_BLOBLIST_SIZE can be 0. + By default U-Boot will use a bloblist in the incoming standard passage. + This option controls whether U-Boot tries to load a static bloblist or + allocate one if a valid incoming bloblist does not exist. + Select this option to mark incoming standard passage as mandatory and + U-Boot will report an error when a valid incoming bloblist does not + exist. endchoice @@ -1086,7 +1090,7 @@ config BLOBLIST_ADDR config BLOBLIST_SIZE hex "Size of bloblist" - default 0x0 if BLOBLIST_PASSAGE + default 0x0 if BLOBLIST_PASSAGE_MANDATORY default 0x400 help Sets the size of the bloblist in bytes. This must include all diff --git a/common/bloblist.c b/common/bloblist.c index be05f8082ff..fb0e5af5f3a 100644 --- a/common/bloblist.c +++ b/common/bloblist.c @@ -513,6 +513,13 @@ int bloblist_init(void) */ bool from_addr = fixed && !xpl_is_first_phase(); + /* + * If Firmware Handoff is mandatory but no transfer list is + * observed, report it as an error. + */ + if (IS_ENABLED(CONFIG_BLOBLIST_PASSAGE_MANDATORY)) + return -ENOENT; + ret = -ENOENT; if (xpl_prev_phase() == PHASE_TPL && diff --git a/configs/vexpress_fvp_bloblist_defconfig b/configs/vexpress_fvp_bloblist_defconfig index dcc87db8723..4d52b96202b 100644 --- a/configs/vexpress_fvp_bloblist_defconfig +++ b/configs/vexpress_fvp_bloblist_defconfig @@ -1,5 +1,5 @@ #include CONFIG_BLOBLIST=y -CONFIG_BLOBLIST_PASSAGE=y +CONFIG_BLOBLIST_PASSAGE_MANDATORY=y CONFIG_BLOBLIST_SIZE_RELOC=0x10000 diff --git a/doc/board/armltd/vexpress64.rst b/doc/board/armltd/vexpress64.rst index 4dadadb53dc..a732fac899d 100644 --- a/doc/board/armltd/vexpress64.rst +++ b/doc/board/armltd/vexpress64.rst @@ -53,8 +53,8 @@ predefined bloblist at a specified address, dynamically allocating memory for a bloblist, or utilizing a standard passage-provided bloblist with automatic size detection. -By default, ``vexpress_fvp_bloblist_defconfig`` uses the standard passage method -(CONFIG_BLOBLIST_PASSAGE) because TF-A provides a Transfer List in non-secure +By default, ``vexpress_fvp_bloblist_defconfig`` uses the standard passage method mandatorily +(CONFIG_BLOBLIST_PASSAGE_MANDATORY) because TF-A provides a Transfer List in non-secure memory that U-Boot can utilise. This Bloblist, which is referred to as a Transfer List in TF-A, contains all necessary data for the handoff process, including DT and ACPI tables. diff --git a/include/bloblist.h b/include/bloblist.h index ff9d5549052..414fb9b6e40 100644 --- a/include/bloblist.h +++ b/include/bloblist.h @@ -449,9 +449,8 @@ int bloblist_reloc(void *to, uint to_size); * If CONFIG_BLOBLIST_ALLOC is selected, it allocates memory for a bloblist of * size CONFIG_BLOBLIST_SIZE. * - * If CONFIG_BLOBLIST_PASSAGE is selected, it uses the bloblist in the incoming - * standard passage. The size is detected automatically so CONFIG_BLOBLIST_SIZE - * can be 0. + * If CONFIG_BLOBLIST_PASSAGE_MANDATORY is selected, bloblist in the incoming + * standard passage is mandatorily required. * * Sets GD_FLG_BLOBLIST_READY in global_data flags on success * -- cgit v1.3.1 From ed5754354b85ac82940370816c7ac677c52cc26b Mon Sep 17 00:00:00 2001 From: Sinthu Raja Date: Tue, 11 Feb 2025 15:19:29 +0530 Subject: include: configs: Override get_fit_config to get FIT config for AM57x Kernel commit 837833a724b7 ("environment: ti: Add get_fit_config command to get FIT config string") introduced "get_fit_config" in ti_armv7_common.h to mangle the fdtfile name when used to select a config node from the OE made FIT image. However, the ti_armv7_common.h is common for both K3 and AM57xx platforms. AM57xx platforms' fdtfile name does not have '/' and "conf-" prefix so the setexpr command fails and boot hangs. Override the get_fit_config in AM57x specific config header to get the correct FIT config name. Signed-off-by: Sinthu Raja Signed-off-by: Anurag Dutta --- include/configs/ti_omap5_common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 26b6c1cd188..d315a52f36f 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -251,6 +251,7 @@ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ DEFAULT_FIT_TI_ARGS \ + "get_fit_config=setenv name_fit_config ${fdtfile}\0" \ DEFAULT_COMMON_BOOT_TI_ARGS \ DEFAULT_FDT_TI_ARGS \ DFUARGS \ -- cgit v1.3.1 From e2aebbaa401e43f6d2efdb913908e17261452e6a Mon Sep 17 00:00:00 2001 From: Sinthu Raja Date: Tue, 11 Feb 2025 15:19:30 +0530 Subject: configs: omap5: Enable custom mmc boot to distroboot for AM57x TI AM57x boards use a custom (though family common to TI boards) mechanism for booting Linux. Add support to enable custom MMC boot as a default option along with the distroboot approach. Also, add supporting mmc boot environment variables which shall be used for custom MMC boot Signed-off-by: Sinthu Raja Signed-off-by: Anurag Dutta --- include/configs/ti_omap5_common.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index d315a52f36f..ef97711e644 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -240,16 +240,31 @@ "echo WARNING: Could not determine device tree to use; fi; \0" #define BOOT_TARGET_DEVICES(func) \ + func(TI_MMC, ti_mmc, na) \ func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) +#define BOOTENV_DEV_TI_MMC(devtypeu, devtypel, instance) \ + "bootcmd_ti_mmc= run get_name_kern; run mmcboot\0" + +#define BOOTENV_DEV_NAME_TI_MMC(devtyeu, devtypel, instance) \ + "ti_mmc " + #include #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ + "bootpart=0:2\0" \ + "bootdir=/boot\0" \ + "get_name_kern=" \ + "if test $boot_fit -eq 1; then " \ + "setenv bootfile fitImage; " \ + "else " \ + "setenv bootfile zImage; " \ + "fi\0" \ DEFAULT_FIT_TI_ARGS \ "get_fit_config=setenv name_fit_config ${fdtfile}\0" \ DEFAULT_COMMON_BOOT_TI_ARGS \ -- cgit v1.3.1 From b165582b3f37ec7bf9dc6d7f7e4fe9fc2a12f01b Mon Sep 17 00:00:00 2001 From: Sinthu Raja Date: Tue, 11 Feb 2025 15:19:31 +0530 Subject: include: configs: omap5: Add support for FDT overlay As AM57x uses overlays for display and camera interfaces, add support to load DT overlay files to MMC boot. Signed-off-by: Sinthu Raja Signed-off-by: Anurag Dutta --- include/configs/ti_omap5_common.h | 11 +++++++++++ include/env/ti/mmc.h | 1 + 2 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index ef97711e644..39102f15eb9 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -239,6 +239,16 @@ "if test $fdtfile = undefined; then " \ "echo WARNING: Could not determine device tree to use; fi; \0" +#define GET_OVERLAY_MMC_TI_ARGS \ + "get_overlay_mmc=" \ + "fdt address ${fdtaddr};" \ + "fdt resize 0x100000;" \ + "for overlay in $name_overlays;" \ + "do;" \ + "load mmc ${bootpart} ${dtboaddr} ${bootdir}/dtb/${overlay} &&" \ + "fdt apply ${dtboaddr};" \ + "done;\0" \ + #define BOOT_TARGET_DEVICES(func) \ func(TI_MMC, ti_mmc, na) \ func(MMC, mmc, 0) \ @@ -269,6 +279,7 @@ "get_fit_config=setenv name_fit_config ${fdtfile}\0" \ DEFAULT_COMMON_BOOT_TI_ARGS \ DEFAULT_FDT_TI_ARGS \ + GET_OVERLAY_MMC_TI_ARGS \ DFUARGS \ NETARGS \ NANDARGS \ diff --git a/include/env/ti/mmc.h b/include/env/ti/mmc.h index d07189baaf4..dbb0e3559ea 100644 --- a/include/env/ti/mmc.h +++ b/include/env/ti/mmc.h @@ -44,6 +44,7 @@ "mmcloados=" \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ "if run loadfdt; then " \ + "run get_overlay_mmc;" \ "bootz ${loadaddr} - ${fdtaddr}; " \ "else " \ "if test ${boot_fdt} = try; then " \ -- cgit v1.3.1 From 77718437862ee849bd8818c482208aaa92363c8d Mon Sep 17 00:00:00 2001 From: Paul HENRYS Date: Wed, 12 Feb 2025 10:31:21 +0100 Subject: rsa: Add rsa_verify_openssl() to use openssl for host builds rsa_verify_openssl() is used in lib/rsa/rsa-verify.c to authenticate data when building host tools. Signed-off-by: Paul HENRYS --- include/image.h | 18 +++++++ lib/rsa/rsa-verify.c | 5 ++ tools/image-host.c | 141 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 164 insertions(+) (limited to 'include') diff --git a/include/image.h b/include/image.h index 8a9f779d3ff..54b1557d6c6 100644 --- a/include/image.h +++ b/include/image.h @@ -1687,6 +1687,24 @@ struct sig_header_s { */ int image_pre_load(ulong addr); +#if defined(USE_HOSTCC) +/** + * rsa_verify_openssl() - Verify a signature against some data with openssl API + * + * Verify a RSA PKCS1.5/PSS signature against an expected hash. + * + * @info: Specifies the key and algorithms + * @region: Pointer to the input data + * @region_count: Number of region + * @sig: Signature + * @sig_len: Number of bytes in the signature + * Return: 0 if verified, -ve on error + */ +int rsa_verify_openssl(struct image_sign_info *info, + const struct image_region region[], int region_count, + uint8_t *sig, uint sig_len); +#endif + /** * fit_image_verify_required_sigs() - Verify signatures marked as 'required' * diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c index d3b4f71d6be..b74aaf86e6d 100644 --- a/lib/rsa/rsa-verify.c +++ b/lib/rsa/rsa-verify.c @@ -565,6 +565,11 @@ int rsa_verify(struct image_sign_info *info, uint8_t hash[info->crypto->key_len]; int ret; +#ifdef USE_HOSTCC + if (!info->fdt_blob) + return rsa_verify_openssl(info, region, region_count, sig, sig_len); +#endif + /* * Verify that the checksum-length does not exceed the * rsa-signature-length diff --git a/tools/image-host.c b/tools/image-host.c index 84095d760c1..3a643367f2b 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -19,6 +19,11 @@ #include #endif +#if CONFIG_IS_ENABLED(IMAGE_PRE_LOAD) +#include +#include +#endif + /** * fit_set_hash_value - set hash value in requested has node * @fit: pointer to the FIT format image header @@ -1388,3 +1393,139 @@ int fit_check_sign(const void *fit, const void *key, return ret; } #endif + +#if CONFIG_IS_ENABLED(IMAGE_PRE_LOAD) +/** + * rsa_verify_openssl() - Verify a signature against some data with openssl API + * + * Verify a RSA PKCS1.5/PSS signature against an expected hash. + * + * @info: Specifies the key and algorithms + * @region: Pointer to the input data + * @region_count: Number of region + * @sig: Signature + * @sig_len: Number of bytes in the signature + * Return: 0 if verified, -ve on error + */ +int rsa_verify_openssl(struct image_sign_info *info, + const struct image_region region[], int region_count, + uint8_t *sig, uint sig_len) +{ + EVP_PKEY *pkey = NULL; + EVP_PKEY_CTX *ckey = NULL; + EVP_MD_CTX *ctx = NULL; + int pad; + int size; + int i; + int ret = 0; + + if (!info) { + fprintf(stderr, "No info provided\n"); + ret = -EINVAL; + goto out; + } + + if (!info->key) { + fprintf(stderr, "No key provided\n"); + ret = -EINVAL; + goto out; + } + + if (!info->checksum) { + fprintf(stderr, "No checksum information\n"); + ret = -EINVAL; + goto out; + } + + if (!info->padding) { + fprintf(stderr, "No padding information\n"); + ret = -EINVAL; + goto out; + } + + if (region_count < 1) { + fprintf(stderr, "Invalid value for region_count: %d\n", region_count); + ret = -EINVAL; + goto out; + } + + pkey = (EVP_PKEY *)info->key; + + ckey = EVP_PKEY_CTX_new(pkey, NULL); + if (!ckey) { + ret = -ENOMEM; + fprintf(stderr, "EVK key context setup failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + + size = EVP_PKEY_size(pkey); + if (size > sig_len) { + fprintf(stderr, "Invalid signature size (%d bytes)\n", + size); + ret = -EINVAL; + goto out; + } + + ctx = EVP_MD_CTX_new(); + if (!ctx) { + ret = -ENOMEM; + fprintf(stderr, "EVP context creation failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + EVP_MD_CTX_init(ctx); + + if (EVP_DigestVerifyInit(ctx, &ckey, + EVP_get_digestbyname(info->checksum->name), + NULL, pkey) <= 0) { + ret = -EINVAL; + fprintf(stderr, "Verifier setup failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + + if (!strcmp(info->padding->name, "pkcs-1.5")) { + pad = RSA_PKCS1_PADDING; + } else if (!strcmp(info->padding->name, "pss")) { + pad = RSA_PKCS1_PSS_PADDING; + } else { + ret = -ENOMSG; + fprintf(stderr, "Unsupported padding: %s\n", + info->padding->name); + goto out; + } + + if (EVP_PKEY_CTX_set_rsa_padding(ckey, pad) <= 0) { + ret = -EINVAL; + fprintf(stderr, "padding setup has failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + + for (i=0 ; i < region_count ; ++i) { + if (EVP_DigestVerifyUpdate(ctx, region[i].data, + region[i].size) <= 0) { + ret = -EINVAL; + fprintf(stderr, "Hashing data failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + } + + if (EVP_DigestVerifyFinal(ctx, sig, sig_len) <= 0) { + ret = -EINVAL; + fprintf(stderr, "Verifying digest failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } +out: + if (ctx) + EVP_MD_CTX_free(ctx); + + if (ret) + fprintf(stderr, "Failed to verify signature\n"); + + return ret; +} +#endif -- cgit v1.3.1 From 523a56cc54637a0c04a1e87c262599faf26d7d69 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 24 Feb 2025 10:32:04 -0600 Subject: Revert "Merge patch series "Add preload_check_sign tool"" This reverts commit c8750efe02c20725388dd4279896aaf306acfad4, reversing changes made to 8c6cf8aeea7e57ca686de8b765e4baf3a7ef1fa7. Unfortunately these changes do not build on macOS hosts. Signed-off-by: Tom Rini --- boot/image-pre-load.c | 57 +-------------- configs/tools-only_defconfig | 3 +- include/image.h | 18 ----- lib/rsa/rsa-verify.c | 5 -- tools/.gitignore | 1 - tools/Kconfig | 5 -- tools/Makefile | 5 -- tools/binman/ftest.py | 15 ---- tools/image-host.c | 141 ------------------------------------- tools/mkimage.h | 4 -- tools/preload_check_sign.c | 161 ------------------------------------------- 11 files changed, 3 insertions(+), 412 deletions(-) delete mode 100644 tools/preload_check_sign.c (limited to 'include') diff --git a/boot/image-pre-load.c b/boot/image-pre-load.c index adf3b341a20..cc19017404c 100644 --- a/boot/image-pre-load.c +++ b/boot/image-pre-load.c @@ -3,23 +3,12 @@ * Copyright (C) 2021 Philippe Reynes */ -#ifdef USE_HOSTCC -#include "mkimage.h" -#else #include -#include DECLARE_GLOBAL_DATA_PTR; -#endif /* !USE_HOSTCC*/ - #include -#include +#include -#ifdef USE_HOSTCC -/* Define compat stuff for use in tools. */ -typedef uint8_t u8; -typedef uint16_t u16; -typedef uint32_t u32; -#endif +#include /* * Offset of the image @@ -28,47 +17,6 @@ typedef uint32_t u32; */ ulong image_load_offset; -#ifdef USE_HOSTCC -/* Host tools use these implementations to setup information related to the - * pre-load signatures - */ -static struct image_sig_info *host_info; - -#define log_info(fmt, args...) printf(fmt, ##args) -#define log_err(fmt, args...) printf(fmt, ##args) - -void image_pre_load_sig_set_info(struct image_sig_info *info) -{ - host_info = info; -} - -/* - * This function sets a pointer to information for the signature check. - * It expects that host_info has been initially provision by the host - * application. - * - * return: - * < 0 => an error has occurred - * 0 => OK - */ -static int image_pre_load_sig_setup(struct image_sig_info *info) -{ - if (!info) { - log_err("ERROR: info is NULL\n"); - return -EINVAL; - } - - if (!host_info) { - log_err("ERROR: host_info is NULL\n"); - log_err("ERROR: Set it with image_pre_load_sig_set_info()\n"); - return -EINVAL; - } - - memcpy(info, host_info, sizeof(struct image_sig_info)); - - return 0; -} -#else /* * This function gathers information about the signature check * that could be done before launching the image. @@ -158,7 +106,6 @@ static int image_pre_load_sig_setup(struct image_sig_info *info) out: return ret; } -#endif /* !USE_HOSTCC */ static int image_pre_load_sig_get_magic(ulong addr, u32 *magic) { diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index e64bb768440..cecd26175d1 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -9,11 +9,10 @@ CONFIG_EFI_LOADER=n CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_TIMESTAMP=y CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y CONFIG_BOOTSTD_FULL=n CONFIG_BOOTMETH_CROS=n CONFIG_BOOTMETH_VBE=n -CONFIG_IMAGE_PRE_LOAD=y -CONFIG_IMAGE_PRE_LOAD_SIG=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" CONFIG_CMD_BOOTD=n diff --git a/include/image.h b/include/image.h index 54b1557d6c6..8a9f779d3ff 100644 --- a/include/image.h +++ b/include/image.h @@ -1687,24 +1687,6 @@ struct sig_header_s { */ int image_pre_load(ulong addr); -#if defined(USE_HOSTCC) -/** - * rsa_verify_openssl() - Verify a signature against some data with openssl API - * - * Verify a RSA PKCS1.5/PSS signature against an expected hash. - * - * @info: Specifies the key and algorithms - * @region: Pointer to the input data - * @region_count: Number of region - * @sig: Signature - * @sig_len: Number of bytes in the signature - * Return: 0 if verified, -ve on error - */ -int rsa_verify_openssl(struct image_sign_info *info, - const struct image_region region[], int region_count, - uint8_t *sig, uint sig_len); -#endif - /** * fit_image_verify_required_sigs() - Verify signatures marked as 'required' * diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c index b74aaf86e6d..d3b4f71d6be 100644 --- a/lib/rsa/rsa-verify.c +++ b/lib/rsa/rsa-verify.c @@ -565,11 +565,6 @@ int rsa_verify(struct image_sign_info *info, uint8_t hash[info->crypto->key_len]; int ret; -#ifdef USE_HOSTCC - if (!info->fdt_blob) - return rsa_verify_openssl(info, region, region_count, sig, sig_len); -#endif - /* * Verify that the checksum-length does not exceed the * rsa-signature-length diff --git a/tools/.gitignore b/tools/.gitignore index 6a5c613f772..0108c567309 100644 --- a/tools/.gitignore +++ b/tools/.gitignore @@ -29,7 +29,6 @@ /mxsboot /ncb /prelink-riscv -/preload_check_sign /printinitialenv /proftool /relocate-rela diff --git a/tools/Kconfig b/tools/Kconfig index 8e272ee99a8..01ff0fcf748 100644 --- a/tools/Kconfig +++ b/tools/Kconfig @@ -9,11 +9,6 @@ config MKIMAGE_DTC_PATH some cases the system dtc may not support all required features and the path to a different version should be given here. -config TOOLS_IMAGE_PRE_LOAD - def_bool y - help - Enable pre-load signature support in the tools builds. - config TOOLS_CRC16 def_bool y help diff --git a/tools/Makefile b/tools/Makefile index e5f5eea47c7..237fa900a24 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -66,7 +66,6 @@ mkenvimage-objs := mkenvimage.o os_support.o generated/lib/crc32.o hostprogs-y += dumpimage mkimage hostprogs-$(CONFIG_TOOLS_LIBCRYPTO) += fit_info fit_check_sign hostprogs-$(CONFIG_TOOLS_LIBCRYPTO) += fdt_add_pubkey -hostprogs-$(CONFIG_TOOLS_LIBCRYPTO) += preload_check_sign ifneq ($(CONFIG_CMD_BOOTEFI_SELFTEST)$(CONFIG_FWU_MDATA_GPT_BLK),) hostprogs-y += file2include @@ -90,8 +89,6 @@ ECDSA_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix generated/lib/ecdsa/, ecdsa- AES_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := $(addprefix generated/lib/aes/, \ aes-encrypt.o aes-decrypt.o) -PRELOAD_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := generated/boot/image-pre-load.o - # Cryptographic helpers and image types that depend on openssl/libcrypto LIBCRYPTO_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := \ generated/lib/fdt-libcrypto.o \ @@ -161,7 +158,6 @@ fit_info-objs := $(dumpimage-mkimage-objs) fit_info.o fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o fdt_add_pubkey-objs := $(dumpimage-mkimage-objs) fdt_add_pubkey.o file2include-objs := file2include.o -preload_check_sign-objs := $(dumpimage-mkimage-objs) $(PRELOAD_OBJS-y) preload_check_sign.o ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_TOOLS_LIBCRYPTO),) # Add CFG_MXS into host CFLAGS, so we can check whether or not register @@ -199,7 +195,6 @@ HOSTLDLIBS_dumpimage := $(HOSTLDLIBS_mkimage) HOSTLDLIBS_fit_info := $(HOSTLDLIBS_mkimage) HOSTLDLIBS_fit_check_sign := $(HOSTLDLIBS_mkimage) HOSTLDLIBS_fdt_add_pubkey := $(HOSTLDLIBS_mkimage) -HOSTLDLIBS_preload_check_sign := $(HOSTLDLIBS_mkimage) hostprogs-$(CONFIG_EXYNOS5250) += mkexynosspl hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index e0685884cef..d2802f67e2d 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -762,16 +762,6 @@ class TestFunctional(unittest.TestCase): return False return True - def _CheckPreload(self, image, key, algo="sha256,rsa2048", - padding="pkcs-1.5"): - try: - tools.run('preload_check_sign', '-k', key, '-a', algo, '-p', - padding, '-f', image) - except: - self.fail('Expected image signed with a pre-load') - return False - return True - def testRun(self): """Test a basic run with valid args""" result = self._RunBinman('-h') @@ -5791,14 +5781,9 @@ fdt fdtmap Extract the devicetree blob from the fdtmap data = self._DoReadFileDtb( '230_pre_load.dts', entry_args=entry_args, extra_indirs=[os.path.join(self._binman_dir, 'test')])[0] - - image_fname = tools.get_output_filename('image.bin') - is_signed = self._CheckPreload(image_fname, self.TestFile("dev.key")) - self.assertEqual(PRE_LOAD_MAGIC, data[:len(PRE_LOAD_MAGIC)]) self.assertEqual(PRE_LOAD_VERSION, data[4:4 + len(PRE_LOAD_VERSION)]) self.assertEqual(PRE_LOAD_HDR_SIZE, data[8:8 + len(PRE_LOAD_HDR_SIZE)]) - self.assertEqual(is_signed, True) def testPreLoadNoKey(self): """Test an image with a pre-load heade0r with missing key""" diff --git a/tools/image-host.c b/tools/image-host.c index a071a244e07..05d8c898209 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -19,11 +19,6 @@ #include #endif -#if CONFIG_IS_ENABLED(IMAGE_PRE_LOAD) -#include -#include -#endif - /** * fit_set_hash_value - set hash value in requested has node * @fit: pointer to the FIT format image header @@ -1402,139 +1397,3 @@ int fit_check_sign(const void *fit, const void *key, return ret; } #endif - -#if CONFIG_IS_ENABLED(IMAGE_PRE_LOAD) -/** - * rsa_verify_openssl() - Verify a signature against some data with openssl API - * - * Verify a RSA PKCS1.5/PSS signature against an expected hash. - * - * @info: Specifies the key and algorithms - * @region: Pointer to the input data - * @region_count: Number of region - * @sig: Signature - * @sig_len: Number of bytes in the signature - * Return: 0 if verified, -ve on error - */ -int rsa_verify_openssl(struct image_sign_info *info, - const struct image_region region[], int region_count, - uint8_t *sig, uint sig_len) -{ - EVP_PKEY *pkey = NULL; - EVP_PKEY_CTX *ckey = NULL; - EVP_MD_CTX *ctx = NULL; - int pad; - int size; - int i; - int ret = 0; - - if (!info) { - fprintf(stderr, "No info provided\n"); - ret = -EINVAL; - goto out; - } - - if (!info->key) { - fprintf(stderr, "No key provided\n"); - ret = -EINVAL; - goto out; - } - - if (!info->checksum) { - fprintf(stderr, "No checksum information\n"); - ret = -EINVAL; - goto out; - } - - if (!info->padding) { - fprintf(stderr, "No padding information\n"); - ret = -EINVAL; - goto out; - } - - if (region_count < 1) { - fprintf(stderr, "Invalid value for region_count: %d\n", region_count); - ret = -EINVAL; - goto out; - } - - pkey = (EVP_PKEY *)info->key; - - ckey = EVP_PKEY_CTX_new(pkey, NULL); - if (!ckey) { - ret = -ENOMEM; - fprintf(stderr, "EVK key context setup failed: %s\n", - ERR_error_string(ERR_get_error(), NULL)); - goto out; - } - - size = EVP_PKEY_size(pkey); - if (size > sig_len) { - fprintf(stderr, "Invalid signature size (%d bytes)\n", - size); - ret = -EINVAL; - goto out; - } - - ctx = EVP_MD_CTX_new(); - if (!ctx) { - ret = -ENOMEM; - fprintf(stderr, "EVP context creation failed: %s\n", - ERR_error_string(ERR_get_error(), NULL)); - goto out; - } - EVP_MD_CTX_init(ctx); - - if (EVP_DigestVerifyInit(ctx, &ckey, - EVP_get_digestbyname(info->checksum->name), - NULL, pkey) <= 0) { - ret = -EINVAL; - fprintf(stderr, "Verifier setup failed: %s\n", - ERR_error_string(ERR_get_error(), NULL)); - goto out; - } - - if (!strcmp(info->padding->name, "pkcs-1.5")) { - pad = RSA_PKCS1_PADDING; - } else if (!strcmp(info->padding->name, "pss")) { - pad = RSA_PKCS1_PSS_PADDING; - } else { - ret = -ENOMSG; - fprintf(stderr, "Unsupported padding: %s\n", - info->padding->name); - goto out; - } - - if (EVP_PKEY_CTX_set_rsa_padding(ckey, pad) <= 0) { - ret = -EINVAL; - fprintf(stderr, "padding setup has failed: %s\n", - ERR_error_string(ERR_get_error(), NULL)); - goto out; - } - - for (i = 0; i < region_count; ++i) { - if (EVP_DigestVerifyUpdate(ctx, region[i].data, - region[i].size) <= 0) { - ret = -EINVAL; - fprintf(stderr, "Hashing data failed: %s\n", - ERR_error_string(ERR_get_error(), NULL)); - goto out; - } - } - - if (EVP_DigestVerifyFinal(ctx, sig, sig_len) <= 0) { - ret = -EINVAL; - fprintf(stderr, "Verifying digest failed: %s\n", - ERR_error_string(ERR_get_error(), NULL)); - goto out; - } -out: - if (ctx) - EVP_MD_CTX_free(ctx); - - if (ret) - fprintf(stderr, "Failed to verify signature\n"); - - return ret; -} -#endif diff --git a/tools/mkimage.h b/tools/mkimage.h index 5d6bcc9301a..15741f250fd 100644 --- a/tools/mkimage.h +++ b/tools/mkimage.h @@ -37,10 +37,6 @@ static inline void *map_sysmem(ulong paddr, unsigned long len) return (void *)(uintptr_t)paddr; } -static inline void unmap_sysmem(const void *vaddr) -{ -} - static inline ulong map_to_sysmem(const void *ptr) { return (ulong)(uintptr_t)ptr; diff --git a/tools/preload_check_sign.c b/tools/preload_check_sign.c deleted file mode 100644 index 63a778203f0..00000000000 --- a/tools/preload_check_sign.c +++ /dev/null @@ -1,161 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Check a file including a preload header including a signature - * - * Copyright (c) 2025 Paul HENRYS - * - * Binman makes it possible to generate a preload header signing part or the - * complete file. The tool preload_check_sign allows to verify and authenticate - * a file starting with a preload header. - */ -#include -#include -#include -#include -#include -#include -#include - -extern void image_pre_load_sig_set_info(struct image_sig_info *info); -extern int image_pre_load_sig(ulong addr); - -static void usage(char *cmdname) -{ - fprintf(stderr, "Usage: %s -f file -k PEM key file\n" - " -f ==> set file which should be checked\n" - " -k ==> PEM key file\n" - " -a ==> algo (default: sha256,rsa2048)\n" - " -p ==> padding (default: pkcs-1.5)\n" - " -h ==> help\n", - cmdname); - exit(EXIT_FAILURE); -} - -int main(int argc, char **argv) -{ - int ret = 0; - char cmdname[256]; - char *file = NULL; - char *keyfile = NULL; - int c; - FILE *fp = NULL; - FILE *fp_key = NULL; - size_t bytes; - long filesize; - void *buffer = NULL; - EVP_PKEY *pkey = NULL; - char *algo = "sha256,rsa2048"; - char *padding = "pkcs-1.5"; - struct image_sig_info info = {0}; - - strncpy(cmdname, *argv, sizeof(cmdname) - 1); - cmdname[sizeof(cmdname) - 1] = '\0'; - while ((c = getopt(argc, argv, "f:k:a:p:h")) != -1) - switch (c) { - case 'f': - file = optarg; - break; - case 'k': - keyfile = optarg; - break; - case 'a': - algo = optarg; - break; - case 'p': - padding = optarg; - break; - default: - usage(cmdname); - break; - } - - if (!file) { - fprintf(stderr, "%s: Missing file\n", *argv); - usage(*argv); - } - - if (!keyfile) { - fprintf(stderr, "%s: Missing key file\n", *argv); - usage(*argv); - } - - fp = fopen(file, "r"); - if (!fp) { - fprintf(stderr, "Error opening file: %s\n", file); - ret = EXIT_FAILURE; - goto out; - } - - fseek(fp, 0, SEEK_END); - filesize = ftell(fp); - rewind(fp); - - buffer = malloc(filesize); - if (!buffer) { - fprintf(stderr, "Memory allocation failed"); - ret = EXIT_FAILURE; - goto out; - } - - bytes = fread(buffer, 1, filesize, fp); - if (bytes != filesize) { - fprintf(stderr, "Error reading file\n"); - ret = EXIT_FAILURE; - goto out; - } - - fp_key = fopen(keyfile, "r"); - if (!fp_key) { - fprintf(stderr, "Error opening file: %s\n", keyfile); - ret = EXIT_FAILURE; - goto out; - } - - /* Attempt to read the private key */ - pkey = PEM_read_PrivateKey(fp_key, NULL, NULL, NULL); - if (!pkey) { - /* If private key reading fails, try reading as a public key */ - fseek(fp_key, 0, SEEK_SET); - pkey = PEM_read_PUBKEY(fp_key, NULL, NULL, NULL); - } - if (!pkey) { - fprintf(stderr, "Unable to retrieve the public key: %s\n", - ERR_error_string(ERR_get_error(), NULL)); - ret = EXIT_FAILURE; - goto out; - } - - info.algo_name = algo; - info.padding_name = padding; - info.key = (uint8_t *)pkey; - info.mandatory = 1; - info.sig_size = (EVP_PKEY_get_bits(pkey) + 7) / 8; - if (info.sig_size < 0) { - fprintf(stderr, "Fail to retrieve the signature size: %s\n", - ERR_error_string(ERR_get_error(), NULL)); - ret = EXIT_FAILURE; - goto out; - } - - /* Compute signature information */ - info.sig_info.name = info.algo_name; - info.sig_info.padding = image_get_padding_algo(info.padding_name); - info.sig_info.checksum = image_get_checksum_algo(info.sig_info.name); - info.sig_info.crypto = image_get_crypto_algo(info.sig_info.name); - info.sig_info.key = info.key; - info.sig_info.keylen = info.key_len; - - /* Check the signature */ - image_pre_load_sig_set_info(&info); - ret = image_pre_load_sig((ulong)buffer); -out: - if (fp) - fclose(fp); - if (fp_key) - fclose(fp_key); - if (info.key) - EVP_PKEY_free(pkey); - free(buffer); - - exit(ret); -} -- cgit v1.3.1 From 9f12a3265c009238be8f5b82702cc5802dc98b0b Mon Sep 17 00:00:00 2001 From: Alif Zakuan Yuslaimi Date: Tue, 18 Feb 2025 16:35:10 +0800 Subject: configs: socfpga: soc64: agilex5: Enable QSPI boot with UBI / UBIFS Add the required configuration in the U-Boot env to enable Linux QSPI boot with UBI / UBIFS. Signed-off-by: Alif Zakuan Yuslaimi Signed-off-by: Tien Fong Chee Reviewed-by: Tien Fong Chee --- configs/socfpga_agilex5_defconfig | 1 + include/configs/socfpga_soc64_common.h | 6 ++++++ 2 files changed, 7 insertions(+) (limited to 'include') diff --git a/configs/socfpga_agilex5_defconfig b/configs/socfpga_agilex5_defconfig index 2b71ccac025..5b3e8125aa2 100644 --- a/configs/socfpga_agilex5_defconfig +++ b/configs/socfpga_agilex5_defconfig @@ -37,6 +37,7 @@ CONFIG_SPL_SYS_MALLOC_SIZE=0x500000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_CACHE=y CONFIG_SPL_SPI_FLASH_MTD=y +CONFIG_SPL_MTD=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x04000000 CONFIG_SPL_ATF=y diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index b7ee1dbf201..5ed17671f79 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 * * Copyright (C) 2017-2024 Intel Corporation + * Copyright (C) 2025 Altera Corporation * */ @@ -56,6 +57,11 @@ #define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \ "bootcmd_qspi=ubi detach; sf probe && " \ + "setenv mtdids 'nor0=nor0,nand0=nand.0' && " \ + "setenv mtdparts 'mtdparts=nor0:66m(u-boot),190m(root); " \ + "nand.0:2m(nand_uboot),500m(nand_root)' && " \ + "env select UBI; saveenv && " \ + "ubi part root && " \ "if ubi part root && ubi readvol ${scriptaddr} script; " \ "then echo QSPI: Running script from UBIFS; " \ "elif sf read ${scriptaddr} ${qspiscriptaddr} ${scriptsize}; " \ -- cgit v1.3.1 From 8cc464c334553e571d002081ba0089edb9afc1e6 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 22 Feb 2025 21:33:19 +0100 Subject: net: miiphybb: Drop bb_miiphy_init() and .init callback The .init callback is not called by any function, drop it. There are no more users of the init callback, drop the entire mechanism. Reviewed-by: Paul Barker Signed-off-by: Marek Vasut --- common/board_r.c | 3 --- drivers/net/phy/miiphybb.c | 11 ----------- include/miiphy.h | 10 ---------- 3 files changed, 24 deletions(-) (limited to 'include') diff --git a/common/board_r.c b/common/board_r.c index 179259b00de..db0c5cb8032 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -749,9 +749,6 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_BOARD_LATE_INIT board_late_init, #endif -#ifdef CONFIG_BITBANGMII - bb_miiphy_init, -#endif #ifdef CONFIG_PCI_ENDPOINT pci_ep_init, #endif diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c index 9f5f9b12c9f..75d9537b355 100644 --- a/drivers/net/phy/miiphybb.c +++ b/drivers/net/phy/miiphybb.c @@ -17,17 +17,6 @@ #include #include -int bb_miiphy_init(void) -{ - int i; - - for (i = 0; i < bb_miiphy_buses_num; i++) - if (bb_miiphy_buses[i].init != NULL) - bb_miiphy_buses[i].init(&bb_miiphy_buses[i]); - - return 0; -} - static inline struct bb_miiphy_bus *bb_miiphy_getbus(const char *devname) { int i; diff --git a/include/miiphy.h b/include/miiphy.h index 1e6c7041fdc..0464f5dc219 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -65,7 +65,6 @@ void mdio_list_devices(void); struct bb_miiphy_bus { char name[MDIO_NAME_LEN]; - int (*init)(struct bb_miiphy_bus *bus); int (*mdio_active)(struct bb_miiphy_bus *bus); int (*mdio_tristate)(struct bb_miiphy_bus *bus); int (*set_mdio)(struct bb_miiphy_bus *bus, int v); @@ -78,15 +77,6 @@ struct bb_miiphy_bus { extern struct bb_miiphy_bus bb_miiphy_buses[]; extern int bb_miiphy_buses_num; -/** - * bb_miiphy_init() - Initialize bit-banged MII bus driver - * - * It is called during the generic post-relocation init sequence. - * - * Return: 0 if OK - */ -int bb_miiphy_init(void); - int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg); int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, u16 value); -- cgit v1.3.1 From f15919436bea3336f2dcb86f564180aceccc9c47 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 22 Feb 2025 21:33:22 +0100 Subject: net: miiphy: Introduce mdio_init() Introduce mdio_init() split off from mdio_alloc(), which is used to initialize already allocated struct mii_dev. Reviewed-by: Paul Barker Signed-off-by: Marek Vasut --- common/miiphyutil.c | 13 +++++++++---- include/miiphy.h | 1 + 2 files changed, 10 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 9b8744e5d8b..2a034d3a77c 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -65,6 +65,14 @@ void miiphy_init(void) current_mii = NULL; } +void mdio_init(struct mii_dev *bus) +{ + memset(bus, 0, sizeof(*bus)); + + /* initialize mii_dev struct fields */ + INIT_LIST_HEAD(&bus->link); +} + struct mii_dev *mdio_alloc(void) { struct mii_dev *bus; @@ -73,10 +81,7 @@ struct mii_dev *mdio_alloc(void) if (!bus) return bus; - memset(bus, 0, sizeof(*bus)); - - /* initalize mii_dev struct fields */ - INIT_LIST_HEAD(&bus->link); + mdio_init(bus); return bus; } diff --git a/include/miiphy.h b/include/miiphy.h index 0464f5dc219..40eb14669b8 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -44,6 +44,7 @@ struct phy_device *mdio_phydev_for_ethname(const char *devname); void miiphy_listdev(void); +void mdio_init(struct mii_dev *bus); struct mii_dev *mdio_alloc(void); void mdio_free(struct mii_dev *bus); int mdio_register(struct mii_dev *bus); -- cgit v1.3.1 From 1b879bf5552bce022350bb96d616e5b2838af952 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 22 Feb 2025 21:33:23 +0100 Subject: net: miiphybb: Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappers Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappers to allocate and free struct bb_miiphy_bus. Make struct bb_miiphy_bus wrap struct mii_dev, which will become useful later in bb_miiphy_bus accessors, which would be able to access struct bb_miiphy_bus using container_of, even if the PHY stack only passes in the inner struct mii_dev . Reviewed-by: Paul Barker Signed-off-by: Marek Vasut --- drivers/net/phy/miiphybb.c | 19 +++++++++++++++++++ include/miiphy.h | 4 ++++ 2 files changed, 23 insertions(+) (limited to 'include') diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c index 75d9537b355..66d98d6cc26 100644 --- a/drivers/net/phy/miiphybb.c +++ b/drivers/net/phy/miiphybb.c @@ -14,6 +14,7 @@ #include #include +#include #include #include @@ -30,6 +31,24 @@ static inline struct bb_miiphy_bus *bb_miiphy_getbus(const char *devname) return NULL; } +struct bb_miiphy_bus *bb_miiphy_alloc(void) +{ + struct bb_miiphy_bus *bus; + + bus = malloc(sizeof(*bus)); + if (!bus) + return bus; + + mdio_init(&bus->mii); + + return bus; +} + +void bb_miiphy_free(struct bb_miiphy_bus *bus) +{ + free(bus); +} + /***************************************************************************** * * Utility to send the preamble, address, and register (common to read diff --git a/include/miiphy.h b/include/miiphy.h index 40eb14669b8..42300ee5386 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -73,11 +73,15 @@ struct bb_miiphy_bus { int (*set_mdc)(struct bb_miiphy_bus *bus, int v); int (*delay)(struct bb_miiphy_bus *bus); void *priv; + struct mii_dev mii; }; extern struct bb_miiphy_bus bb_miiphy_buses[]; extern int bb_miiphy_buses_num; +struct bb_miiphy_bus *bb_miiphy_alloc(void); +void bb_miiphy_free(struct bb_miiphy_bus *bus); + int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg); int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, u16 value); -- cgit v1.3.1 From a23f9a786b010177839d6fe9f67c717f17f74368 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 22 Feb 2025 21:33:29 +0100 Subject: net: miiphybb: Drop name field from struct bb_miiphy_bus The struct bb_miiphy_bus embeds struct struct mii_dev, which already contains one copy of name field. Drop the duplicate top level copy of name field. The a38x code does static assignment of disparate names, use snprintf(...) to fill in matching name in probe to avoid any breakage. Reviewed-by: Paul Barker Signed-off-by: Marek Vasut --- board/gdsys/a38x/ihs_phys.c | 11 +++-------- drivers/net/designware.c | 5 +---- drivers/net/ravb.c | 6 +----- drivers/net/sh_eth.c | 6 +----- include/miiphy.h | 1 - 5 files changed, 6 insertions(+), 23 deletions(-) (limited to 'include') diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c index a121898be52..128b1395243 100644 --- a/board/gdsys/a38x/ihs_phys.c +++ b/board/gdsys/a38x/ihs_phys.c @@ -223,31 +223,29 @@ int register_miiphy_bus(uint k, struct mii_dev **bus) { struct bb_miiphy_bus *bb_miiphy = bb_miiphy_alloc(); struct mii_dev *mdiodev; - char *name = bb_miiphy_buses[k].name; int retval; if (!bb_miiphy) return -ENOMEM; mdiodev = &bb_miiphy->mii; - strlcpy(mdiodev->name, name, MDIO_NAME_LEN); + snprintf(mdiodev->name, MDIO_NAME_LEN, "ihs%d", k); mdiodev->read = bb_miiphy_read; mdiodev->write = bb_miiphy_write; - /* Copy the bus accessors, name and private data */ + /* Copy the bus accessors and private data */ bb_miiphy->mdio_active = mii_mdio_active; bb_miiphy->mdio_tristate = mii_mdio_tristate; bb_miiphy->set_mdio = mii_set_mdio; bb_miiphy->get_mdio = mii_get_mdio; bb_miiphy->set_mdc = mii_set_mdc; bb_miiphy->delay = mii_delay; - strlcpy(bb_miiphy->name, name, MDIO_NAME_LEN); bb_miiphy->priv = &gpio_mii_set[k]; retval = mdio_register(mdiodev); if (retval < 0) return retval; - *bus = miiphy_get_dev_by_name(name); + *bus = miiphy_get_dev_by_name(mdiodev->name); return mii_mdio_init(bb_miiphy); } @@ -330,7 +328,6 @@ int init_octo_phys(uint octo_phy_mask) struct bb_miiphy_bus bb_miiphy_buses[] = { { - .name = "ihs0", .mdio_active = mii_mdio_active, .mdio_tristate = mii_mdio_tristate, .set_mdio = mii_set_mdio, @@ -340,7 +337,6 @@ struct bb_miiphy_bus bb_miiphy_buses[] = { .priv = &gpio_mii_set[0], }, { - .name = "ihs1", .mdio_active = mii_mdio_active, .mdio_tristate = mii_mdio_tristate, .set_mdio = mii_set_mdio, @@ -350,7 +346,6 @@ struct bb_miiphy_bus bb_miiphy_buses[] = { .priv = &gpio_mii_set[1], }, { - .name = "ihs2", .mdio_active = mii_mdio_active, .mdio_tristate = mii_mdio_tristate, .set_mdio = mii_set_mdio, diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 74cf8271e67..5124982e683 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -292,7 +292,6 @@ static int dw_eth_bb_delay(struct bb_miiphy_bus *bus) struct bb_miiphy_bus bb_miiphy_buses[] = { { - .name = BB_MII_DEVNAME, .mdio_active = dw_eth_bb_mdio_active, .mdio_tristate = dw_eth_bb_mdio_tristate, .set_mdio = dw_eth_bb_set_mdio, @@ -340,7 +339,6 @@ static int dw_bb_mdio_init(const char *name, struct udevice *dev) bb_miiphy_buses[0].priv = dwpriv; snprintf(bus->name, sizeof(bus->name), "%s", name); - strlcpy(bb_miiphy_buses[0].name, bus->name, MDIO_NAME_LEN); bus->read = bb_miiphy_read; bus->write = bb_miiphy_write; #if CONFIG_IS_ENABLED(DM_GPIO) @@ -348,14 +346,13 @@ static int dw_bb_mdio_init(const char *name, struct udevice *dev) #endif bus->priv = dwpriv; - /* Copy the bus accessors, name and private data */ + /* Copy the bus accessors and private data */ bb_miiphy->mdio_active = dw_eth_bb_mdio_active; bb_miiphy->mdio_tristate = dw_eth_bb_mdio_tristate; bb_miiphy->set_mdio = dw_eth_bb_set_mdio; bb_miiphy->get_mdio = dw_eth_bb_get_mdio; bb_miiphy->set_mdc = dw_eth_bb_set_mdc; bb_miiphy->delay = dw_eth_bb_delay; - strlcpy(bb_miiphy->name, bus->name, MDIO_NAME_LEN); return mdio_register(bus); } diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 0018b694ec1..86787183488 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -578,14 +578,13 @@ static int ravb_probe(struct udevice *dev) bb_miiphy_buses[0].priv = eth; snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name); - /* Copy the bus accessors, name and private data */ + /* Copy the bus accessors and private data */ bb_miiphy->mdio_active = ravb_bb_mdio_active; bb_miiphy->mdio_tristate = ravb_bb_mdio_tristate; bb_miiphy->set_mdio = ravb_bb_set_mdio; bb_miiphy->get_mdio = ravb_bb_get_mdio; bb_miiphy->set_mdc = ravb_bb_set_mdc; bb_miiphy->delay = ravb_bb_delay; - strlcpy(bb_miiphy->name, "ravb", MDIO_NAME_LEN); bb_miiphy->priv = eth; ret = mdio_register(mdiodev); @@ -634,7 +633,6 @@ static int ravb_remove(struct udevice *dev) struct bb_miiphy_bus bb_miiphy_buses[] = { { - .name = "ravb", .mdio_active = ravb_bb_mdio_active, .mdio_tristate = ravb_bb_mdio_tristate, .set_mdio = ravb_bb_set_mdio, @@ -666,8 +664,6 @@ int ravb_of_to_plat(struct udevice *dev) pdata->max_speed = dev_read_u32_default(dev, "max-speed", 1000); - sprintf(bb_miiphy_buses[0].name, dev->name); - return 0; } diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index e78d64d77c3..49065ebe717 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -740,14 +740,13 @@ static int sh_ether_probe(struct udevice *udev) bb_miiphy_buses[0].priv = eth; snprintf(mdiodev->name, sizeof(mdiodev->name), udev->name); - /* Copy the bus accessors, name and private data */ + /* Copy the bus accessors and private data */ bb_miiphy->mdio_active = sh_eth_bb_mdio_active; bb_miiphy->mdio_tristate = sh_eth_bb_mdio_tristate; bb_miiphy->set_mdio = sh_eth_bb_set_mdio; bb_miiphy->get_mdio = sh_eth_bb_get_mdio; bb_miiphy->set_mdc = sh_eth_bb_set_mdc; bb_miiphy->delay = sh_eth_bb_delay; - strlcpy(bb_miiphy->name, "sh_eth", MDIO_NAME_LEN); bb_miiphy->priv = eth; ret = mdio_register(mdiodev); @@ -829,8 +828,6 @@ int sh_ether_of_to_plat(struct udevice *dev) if (cell) pdata->max_speed = fdt32_to_cpu(*cell); - sprintf(bb_miiphy_buses[0].name, dev->name); - return 0; } @@ -859,7 +856,6 @@ U_BOOT_DRIVER(eth_sh_ether) = { struct bb_miiphy_bus bb_miiphy_buses[] = { { - .name = "sh_eth", .mdio_active = sh_eth_bb_mdio_active, .mdio_tristate = sh_eth_bb_mdio_tristate, .set_mdio = sh_eth_bb_set_mdio, diff --git a/include/miiphy.h b/include/miiphy.h index 42300ee5386..efeff8ae70b 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -65,7 +65,6 @@ void mdio_list_devices(void); #define BB_MII_DEVNAME "bb_miiphy" struct bb_miiphy_bus { - char name[MDIO_NAME_LEN]; int (*mdio_active)(struct bb_miiphy_bus *bus); int (*mdio_tristate)(struct bb_miiphy_bus *bus); int (*set_mdio)(struct bb_miiphy_bus *bus, int v); -- cgit v1.3.1 From 4e6fed49becc7e8d9639966fd34695583192a3ee Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 22 Feb 2025 21:33:33 +0100 Subject: net: miiphybb: Drop bb_miiphy_buses and bb_miiphy_buses_num Neither bb_miiphy_buses nor bb_miiphy_buses_num are used anymore. Drop both of them. Reviewed-by: Paul Barker Signed-off-by: Marek Vasut --- board/gdsys/a38x/ihs_phys.c | 34 +--------------------------------- drivers/net/designware.c | 14 -------------- drivers/net/ravb.c | 13 ------------- drivers/net/sh_eth.c | 14 -------------- include/miiphy.h | 3 --- 5 files changed, 1 insertion(+), 77 deletions(-) (limited to 'include') diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c index 71c9398c77a..0c68087912a 100644 --- a/board/gdsys/a38x/ihs_phys.c +++ b/board/gdsys/a38x/ihs_phys.c @@ -289,7 +289,7 @@ int init_octo_phys(uint octo_phy_mask) uint bus_idx; /* there are up to four octo-phys on each mdio bus */ - for (bus_idx = 0; bus_idx < bb_miiphy_buses_num; ++bus_idx) { + for (bus_idx = 0; bus_idx < ARRAY_SIZE(gpio_mii_set); ++bus_idx) { uint m; uint octo_index = bus_idx * 4; struct mii_dev *bus = NULL; @@ -325,35 +325,3 @@ int init_octo_phys(uint octo_phy_mask) return 0; } - -struct bb_miiphy_bus bb_miiphy_buses[] = { - { - .mdio_active = mii_mdio_active, - .mdio_tristate = mii_mdio_tristate, - .set_mdio = mii_set_mdio, - .get_mdio = mii_get_mdio, - .set_mdc = mii_set_mdc, - .delay = mii_delay, - .priv = &gpio_mii_set[0], - }, - { - .mdio_active = mii_mdio_active, - .mdio_tristate = mii_mdio_tristate, - .set_mdio = mii_set_mdio, - .get_mdio = mii_get_mdio, - .set_mdc = mii_set_mdc, - .delay = mii_delay, - .priv = &gpio_mii_set[1], - }, - { - .mdio_active = mii_mdio_active, - .mdio_tristate = mii_mdio_tristate, - .set_mdio = mii_set_mdio, - .get_mdio = mii_get_mdio, - .set_mdc = mii_set_mdc, - .delay = mii_delay, - .priv = &gpio_mii_set[2], - }, -}; - -int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses); diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 5124982e683..5a6e89c0575 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -290,19 +290,6 @@ static int dw_eth_bb_delay(struct bb_miiphy_bus *bus) return 0; } -struct bb_miiphy_bus bb_miiphy_buses[] = { - { - .mdio_active = dw_eth_bb_mdio_active, - .mdio_tristate = dw_eth_bb_mdio_tristate, - .set_mdio = dw_eth_bb_set_mdio, - .get_mdio = dw_eth_bb_get_mdio, - .set_mdc = dw_eth_bb_set_mdc, - .delay = dw_eth_bb_delay, - } -}; - -int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses); - static int dw_bb_mdio_init(const char *name, struct udevice *dev) { struct dw_eth_dev *dwpriv = dev_get_priv(dev); @@ -337,7 +324,6 @@ static int dw_bb_mdio_init(const char *name, struct udevice *dev) dwpriv->bus = bus; dwpriv->dev = dev; - bb_miiphy_buses[0].priv = dwpriv; snprintf(bus->name, sizeof(bus->name), "%s", name); bus->read = bb_miiphy_read; bus->write = bb_miiphy_write; diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index b790de98b48..cb727ae9bc1 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -575,7 +575,6 @@ static int ravb_probe(struct udevice *dev) mdiodev->read = bb_miiphy_read; mdiodev->write = bb_miiphy_write; - bb_miiphy_buses[0].priv = eth; snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name); /* Copy the bus accessors and private data */ @@ -631,18 +630,6 @@ static int ravb_remove(struct udevice *dev) return 0; } -struct bb_miiphy_bus bb_miiphy_buses[] = { - { - .mdio_active = ravb_bb_mdio_active, - .mdio_tristate = ravb_bb_mdio_tristate, - .set_mdio = ravb_bb_set_mdio, - .get_mdio = ravb_bb_get_mdio, - .set_mdc = ravb_bb_set_mdc, - .delay = ravb_bb_delay, - }, -}; -int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses); - static const struct eth_ops ravb_ops = { .start = ravb_start, .send = ravb_send, diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index b1e35aaf291..83e48609224 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -737,7 +737,6 @@ static int sh_ether_probe(struct udevice *udev) mdiodev->read = bb_miiphy_read; mdiodev->write = bb_miiphy_write; - bb_miiphy_buses[0].priv = eth; snprintf(mdiodev->name, sizeof(mdiodev->name), udev->name); /* Copy the bus accessors and private data */ @@ -853,16 +852,3 @@ U_BOOT_DRIVER(eth_sh_ether) = { .plat_auto = sizeof(struct eth_pdata), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; - -struct bb_miiphy_bus bb_miiphy_buses[] = { - { - .mdio_active = sh_eth_bb_mdio_active, - .mdio_tristate = sh_eth_bb_mdio_tristate, - .set_mdio = sh_eth_bb_set_mdio, - .get_mdio = sh_eth_bb_get_mdio, - .set_mdc = sh_eth_bb_set_mdc, - .delay = sh_eth_bb_delay, - } -}; - -int bb_miiphy_buses_num = ARRAY_SIZE(bb_miiphy_buses); diff --git a/include/miiphy.h b/include/miiphy.h index efeff8ae70b..b879fd16ae3 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -75,9 +75,6 @@ struct bb_miiphy_bus { struct mii_dev mii; }; -extern struct bb_miiphy_bus bb_miiphy_buses[]; -extern int bb_miiphy_buses_num; - struct bb_miiphy_bus *bb_miiphy_alloc(void); void bb_miiphy_free(struct bb_miiphy_bus *bus); -- cgit v1.3.1 From 6b654ac5a6afa8e03d4d093be7cf27965b5c3c04 Mon Sep 17 00:00:00 2001 From: Baocheng Su Date: Tue, 18 Feb 2025 10:36:10 +0800 Subject: smbios: Fill UUID from sysinfo when available Allow for the sysinfo drivers to provide a system UUID to SMBIOS. Will be first used by the IOT2050 boards. Signed-off-by: Li Hua Qian Signed-off-by: Jan Kiszka Signed-off-by: Baocheng Su --- include/sysinfo.h | 1 + lib/smbios.c | 6 ++++++ 2 files changed, 7 insertions(+) (limited to 'include') diff --git a/include/sysinfo.h b/include/sysinfo.h index ba2ac273e8e..14e923c6589 100644 --- a/include/sysinfo.h +++ b/include/sysinfo.h @@ -57,6 +57,7 @@ enum sysinfo_id { SYSID_SM_SYSTEM_WAKEUP, SYSID_SM_SYSTEM_SKU, SYSID_SM_SYSTEM_FAMILY, + SYSID_SM_SYSTEM_UUID, /* Baseboard (or Module) Information (Type 2) */ SYSID_SM_BASEBOARD_MANUFACTURER, diff --git a/lib/smbios.c b/lib/smbios.c index 78cee8c0c26..7c9701a57f9 100644 --- a/lib/smbios.c +++ b/lib/smbios.c @@ -429,6 +429,8 @@ static int smbios_write_type1(ulong *current, int handle, struct smbios_type1 *t; int len = sizeof(*t); char *serial_str = env_get("serial#"); + size_t uuid_len; + void *uuid; t = map_sysmem(*current, len); memset(t, 0, len); @@ -450,6 +452,10 @@ static int smbios_write_type1(ulong *current, int handle, SYSID_SM_SYSTEM_SERIAL, NULL); } + if (!sysinfo_get_data(ctx->dev, SYSID_SM_SYSTEM_UUID, &uuid, + &uuid_len) && + uuid_len == sizeof(t->uuid)) + memcpy(t->uuid, uuid, sizeof(t->uuid)); t->wakeup_type = smbios_get_val_si(ctx, "wakeup-type", SYSID_SM_SYSTEM_WAKEUP, SMBIOS_WAKEUP_TYPE_UNKNOWN); -- cgit v1.3.1 From 920629c5942dc458b2b818a59ba789601185a101 Mon Sep 17 00:00:00 2001 From: Baocheng Su Date: Tue, 18 Feb 2025 10:36:11 +0800 Subject: sysinfo: Add API for accessing data elements This commit introduces a new API to the sysinfo module, allowing access to data elements. This is particularly useful for handling data with multiple instances, such as MAC addresses. Signed-off-by: Baocheng Su --- drivers/sysinfo/sysinfo-uclass.c | 29 ++++++++++++++++++ include/sysinfo.h | 63 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 92 insertions(+) (limited to 'include') diff --git a/drivers/sysinfo/sysinfo-uclass.c b/drivers/sysinfo/sysinfo-uclass.c index 3c0cd51273e..f04998ef8bb 100644 --- a/drivers/sysinfo/sysinfo-uclass.c +++ b/drivers/sysinfo/sysinfo-uclass.c @@ -119,6 +119,35 @@ int sysinfo_get_data(struct udevice *dev, int id, void **data, size_t *size) return ops->get_data(dev, id, data, size); } +int sysinfo_get_item_count(struct udevice *dev, int id) +{ + struct sysinfo_priv *priv = dev_get_uclass_priv(dev); + struct sysinfo_ops *ops = sysinfo_get_ops(dev); + + if (!priv->detected) + return -EPERM; + + if (!ops->get_item_count) + return -ENOSYS; + + return ops->get_item_count(dev, id); +} + +int sysinfo_get_data_by_index(struct udevice *dev, int id, int index, + void **data, size_t *size) +{ + struct sysinfo_priv *priv = dev_get_uclass_priv(dev); + struct sysinfo_ops *ops = sysinfo_get_ops(dev); + + if (!priv->detected) + return -EPERM; + + if (!ops->get_data_by_index) + return -ENOSYS; + + return ops->get_data_by_index(dev, id, index, data, size); +} + UCLASS_DRIVER(sysinfo) = { .id = UCLASS_SYSINFO, .name = "sysinfo", diff --git a/include/sysinfo.h b/include/sysinfo.h index 14e923c6589..2866ac293cb 100644 --- a/include/sysinfo.h +++ b/include/sysinfo.h @@ -152,6 +152,7 @@ enum sysinfo_id { /* For show_board_info() */ SYSID_BOARD_MODEL, SYSID_BOARD_MANUFACTURER, + SYSID_BOARD_MAC_ADDR, SYSID_PRIOR_STAGE_VERSION, SYSID_PRIOR_STAGE_DATE, @@ -221,6 +222,30 @@ struct sysinfo_ops { */ int (*get_data)(struct udevice *dev, int id, void **data, size_t *size); + /** + * get_item_count() - Get the item count of the specific data area that + * describes the hardware setup. + * @dev: The sysinfo instance to gather the data. + * @id: A unique identifier for the data area to be get. + * + * Return: non-negative item count if OK, -ve on error. + */ + int (*get_item_count)(struct udevice *dev, int id); + + /** + * get_data_by_index() - Get a data value by index from the platform. + * + * @dev: The sysinfo instance to gather the data. + * @id: A unique identifier for the data area to be get. + * @index: The item index, starting from 0. + * @data: Pointer to the address of the data area. + * @size: Pointer to the size of the data area. + * + * Return: 0 if OK, -ve on error. + */ + int (*get_data_by_index)(struct udevice *dev, int id, int index, + void **data, size_t *size); + /** * get_fit_loadable - Get the name of an image to load from FIT * This function can be used to provide the image names based on runtime @@ -304,6 +329,32 @@ int sysinfo_get_str(struct udevice *dev, int id, size_t size, char *val); */ int sysinfo_get_data(struct udevice *dev, int id, void **data, size_t *size); +/** + * sysinfo_get_item_count() - Get the item count of the specific data area that + * describes the hardware setup. + * @dev: The sysinfo instance to gather the data. + * @id: A unique identifier for the data area to be get. + * + * Return: non-negative item count if OK, -EPERM if called before + * sysinfo_detect(), else -ve on error. + */ +int sysinfo_get_item_count(struct udevice *dev, int id); + +/** + * sysinfo_get_data_by_index() - Get a data value by index from the platform. + * + * @dev: The sysinfo instance to gather the data. + * @id: A unique identifier for the data area to be get. + * @index: The item index, starting from 0. + * @data: Pointer to the address of the data area. + * @size: Pointer to the size of the data area. + * + * Return: 0 if OK, -EPERM if called before sysinfo_detect(), else -ve on + * error. + */ +int sysinfo_get_data_by_index(struct udevice *dev, int id, int index, + void **data, size_t *size); + /** * sysinfo_get() - Return the sysinfo device for the sysinfo in question. * @devp: Pointer to structure to receive the sysinfo device. @@ -365,6 +416,18 @@ static inline int sysinfo_get_data(struct udevice *dev, int id, void **data, return -ENOSYS; } +static inline int sysinfo_get_item_count(struct udevice *dev, int id) +{ + return -ENOSYS; +} + +static inline int sysinfo_get_data_by_index(struct udevice *dev, int id, + int index, void **data, + size_t *size) +{ + return -ENOSYS; +} + static inline int sysinfo_get(struct udevice **devp) { return -ENOSYS; -- cgit v1.3.1 From c01d633c750e44780843845944256b93869c2b6f Mon Sep 17 00:00:00 2001 From: Baocheng Su Date: Tue, 18 Feb 2025 10:36:12 +0800 Subject: sysinfo: Add SYSID_BOARD_RAM_SIZE_MB Add a new field SYSID_BOARD_RAM_SIZE_MB to sysinfo structure to store the size of RAM in MB. dram_init can use this field to get the RAM size via sysinfo driver. Signed-off-by: Baocheng Su --- include/sysinfo.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/sysinfo.h b/include/sysinfo.h index 2866ac293cb..e87cf969fcd 100644 --- a/include/sysinfo.h +++ b/include/sysinfo.h @@ -153,6 +153,7 @@ enum sysinfo_id { SYSID_BOARD_MODEL, SYSID_BOARD_MANUFACTURER, SYSID_BOARD_MAC_ADDR, + SYSID_BOARD_RAM_SIZE_MB, SYSID_PRIOR_STAGE_VERSION, SYSID_PRIOR_STAGE_DATE, -- cgit v1.3.1 From 942c8c8e669739d2e8dec67a7ed90158defc93ed Mon Sep 17 00:00:00 2001 From: Paul HENRYS Date: Mon, 24 Feb 2025 22:20:50 +0100 Subject: rsa: Add rsa_verify_openssl() to use openssl for host builds rsa_verify_openssl() is used in lib/rsa/rsa-verify.c to authenticate data when building host tools. Signed-off-by: Paul HENRYS --- include/image.h | 18 +++++++ lib/rsa/rsa-verify.c | 5 ++ tools/image-host.c | 141 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 164 insertions(+) (limited to 'include') diff --git a/include/image.h b/include/image.h index 07912606f33..c1db8383459 100644 --- a/include/image.h +++ b/include/image.h @@ -1688,6 +1688,24 @@ struct sig_header_s { */ int image_pre_load(ulong addr); +#if defined(USE_HOSTCC) +/** + * rsa_verify_openssl() - Verify a signature against some data with openssl API + * + * Verify a RSA PKCS1.5/PSS signature against an expected hash. + * + * @info: Specifies the key and algorithms + * @region: Pointer to the input data + * @region_count: Number of region + * @sig: Signature + * @sig_len: Number of bytes in the signature + * Return: 0 if verified, -ve on error + */ +int rsa_verify_openssl(struct image_sign_info *info, + const struct image_region region[], int region_count, + uint8_t *sig, uint sig_len); +#endif + /** * fit_image_verify_required_sigs() - Verify signatures marked as 'required' * diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c index d3b4f71d6be..b74aaf86e6d 100644 --- a/lib/rsa/rsa-verify.c +++ b/lib/rsa/rsa-verify.c @@ -565,6 +565,11 @@ int rsa_verify(struct image_sign_info *info, uint8_t hash[info->crypto->key_len]; int ret; +#ifdef USE_HOSTCC + if (!info->fdt_blob) + return rsa_verify_openssl(info, region, region_count, sig, sig_len); +#endif + /* * Verify that the checksum-length does not exceed the * rsa-signature-length diff --git a/tools/image-host.c b/tools/image-host.c index e6de34fa059..e19166aeb18 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -19,6 +19,11 @@ #include #endif +#if CONFIG_IS_ENABLED(IMAGE_PRE_LOAD) +#include +#include +#endif + /** * fit_set_hash_value - set hash value in requested has node * @fit: pointer to the FIT format image header @@ -1401,3 +1406,139 @@ int fit_check_sign(const void *fit, const void *key, return ret; } #endif + +#if CONFIG_IS_ENABLED(IMAGE_PRE_LOAD) +/** + * rsa_verify_openssl() - Verify a signature against some data with openssl API + * + * Verify a RSA PKCS1.5/PSS signature against an expected hash. + * + * @info: Specifies the key and algorithms + * @region: Pointer to the input data + * @region_count: Number of region + * @sig: Signature + * @sig_len: Number of bytes in the signature + * Return: 0 if verified, -ve on error + */ +int rsa_verify_openssl(struct image_sign_info *info, + const struct image_region region[], int region_count, + uint8_t *sig, uint sig_len) +{ + EVP_PKEY *pkey = NULL; + EVP_PKEY_CTX *ckey = NULL; + EVP_MD_CTX *ctx = NULL; + int pad; + int size; + int i; + int ret = 0; + + if (!info) { + fprintf(stderr, "No info provided\n"); + ret = -EINVAL; + goto out; + } + + if (!info->key) { + fprintf(stderr, "No key provided\n"); + ret = -EINVAL; + goto out; + } + + if (!info->checksum) { + fprintf(stderr, "No checksum information\n"); + ret = -EINVAL; + goto out; + } + + if (!info->padding) { + fprintf(stderr, "No padding information\n"); + ret = -EINVAL; + goto out; + } + + if (region_count < 1) { + fprintf(stderr, "Invalid value for region_count: %d\n", region_count); + ret = -EINVAL; + goto out; + } + + pkey = (EVP_PKEY *)info->key; + + ckey = EVP_PKEY_CTX_new(pkey, NULL); + if (!ckey) { + ret = -ENOMEM; + fprintf(stderr, "EVK key context setup failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + + size = EVP_PKEY_size(pkey); + if (size > sig_len) { + fprintf(stderr, "Invalid signature size (%d bytes)\n", + size); + ret = -EINVAL; + goto out; + } + + ctx = EVP_MD_CTX_new(); + if (!ctx) { + ret = -ENOMEM; + fprintf(stderr, "EVP context creation failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + EVP_MD_CTX_init(ctx); + + if (EVP_DigestVerifyInit(ctx, &ckey, + EVP_get_digestbyname(info->checksum->name), + NULL, pkey) <= 0) { + ret = -EINVAL; + fprintf(stderr, "Verifier setup failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + + if (!strcmp(info->padding->name, "pkcs-1.5")) { + pad = RSA_PKCS1_PADDING; + } else if (!strcmp(info->padding->name, "pss")) { + pad = RSA_PKCS1_PSS_PADDING; + } else { + ret = -ENOMSG; + fprintf(stderr, "Unsupported padding: %s\n", + info->padding->name); + goto out; + } + + if (EVP_PKEY_CTX_set_rsa_padding(ckey, pad) <= 0) { + ret = -EINVAL; + fprintf(stderr, "padding setup has failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + + for (i=0 ; i < region_count ; ++i) { + if (EVP_DigestVerifyUpdate(ctx, region[i].data, + region[i].size) <= 0) { + ret = -EINVAL; + fprintf(stderr, "Hashing data failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } + } + + if (EVP_DigestVerifyFinal(ctx, sig, sig_len) <= 0) { + ret = -EINVAL; + fprintf(stderr, "Verifying digest failed: %s\n", + ERR_error_string(ERR_get_error(), NULL)); + goto out; + } +out: + if (ctx) + EVP_MD_CTX_free(ctx); + + if (ret) + fprintf(stderr, "Failed to verify signature\n"); + + return ret; +} +#endif -- cgit v1.3.1 From d9c149664fa7a0c2eabfc046dcf89637f655364b Mon Sep 17 00:00:00 2001 From: Gabriel Dalimonte Date: Mon, 17 Feb 2025 13:26:43 -0500 Subject: fs: add rename infrastructure The selection for *rename as the name for the rename/move operation derives from the POSIX specification where they name the function rename/renameat. [1] This aligns with Linux where the syscalls for renaming/moving also use the rename/renameat naming. [1] https://pubs.opengroup.org/onlinepubs/9799919799/functions/rename.html Signed-off-by: Gabriel Dalimonte Acked-by: Ilias Apalodimas --- fs/fs.c | 32 ++++++++++++++++++++++++++++++++ include/fs.h | 14 +++++++++++++- 2 files changed, 45 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/fs/fs.c b/fs/fs.c index 99ddcc5e37b..fdff83719b1 100644 --- a/fs/fs.c +++ b/fs/fs.c @@ -143,6 +143,12 @@ static inline int fs_mkdir_unsupported(const char *dirname) return -1; } +static inline int fs_rename_unsupported(const char *old_path, + const char *new_path) +{ + return -1; +} + struct fstype_info { int fstype; char *name; @@ -183,6 +189,7 @@ struct fstype_info { int (*unlink)(const char *filename); int (*mkdir)(const char *dirname); int (*ln)(const char *filename, const char *target); + int (*rename)(const char *old_path, const char *new_path); }; static struct fstype_info fstypes[] = { @@ -206,6 +213,7 @@ static struct fstype_info fstypes[] = { .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, #endif + .rename = fs_rename_unsupported, .uuid = fat_uuid, .opendir = fat_opendir, .readdir = fat_readdir, @@ -238,6 +246,7 @@ static struct fstype_info fstypes[] = { .closedir = ext4fs_closedir, .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, + .rename = fs_rename_unsupported, }, #endif #if IS_ENABLED(CONFIG_SANDBOX) && !IS_ENABLED(CONFIG_XPL_BUILD) @@ -257,6 +266,7 @@ static struct fstype_info fstypes[] = { .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, .ln = fs_ln_unsupported, + .rename = fs_rename_unsupported, }, #endif #if CONFIG_IS_ENABLED(SEMIHOSTING) @@ -276,6 +286,7 @@ static struct fstype_info fstypes[] = { .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, .ln = fs_ln_unsupported, + .rename = fs_rename_unsupported, }, #endif #ifndef CONFIG_XPL_BUILD @@ -296,6 +307,7 @@ static struct fstype_info fstypes[] = { .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, .ln = fs_ln_unsupported, + .rename = fs_rename_unsupported, }, #endif #endif @@ -317,6 +329,7 @@ static struct fstype_info fstypes[] = { .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, .ln = fs_ln_unsupported, + .rename = fs_rename_unsupported, }, #endif #endif @@ -339,6 +352,7 @@ static struct fstype_info fstypes[] = { .ln = fs_ln_unsupported, .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, + .rename = fs_rename_unsupported, }, #endif #if IS_ENABLED(CONFIG_FS_EROFS) @@ -360,6 +374,7 @@ static struct fstype_info fstypes[] = { .ln = fs_ln_unsupported, .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, + .rename = fs_rename_unsupported, }, #endif { @@ -378,6 +393,7 @@ static struct fstype_info fstypes[] = { .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, .ln = fs_ln_unsupported, + .rename = fs_rename_unsupported, }, }; @@ -713,6 +729,22 @@ int fs_ln(const char *fname, const char *target) return ret; } +int fs_rename(const char *old_path, const char *new_path) +{ + struct fstype_info *info = fs_get_info(fs_type); + int ret; + + ret = info->rename(old_path, new_path); + + if (ret < 0) { + log_debug("Unable to rename %s -> %s\n", old_path, new_path); + ret = -1; + } + fs_close(); + + return ret; +} + int do_size(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[], int fstype) { diff --git a/include/fs.h b/include/fs.h index 2474880385d..5b272eb9f5e 100644 --- a/include/fs.h +++ b/include/fs.h @@ -86,7 +86,7 @@ int fs_set_blk_dev_with_part(struct blk_desc *desc, int part); * * Many file functions implicitly call fs_close(), e.g. fs_closedir(), * fs_exist(), fs_ln(), fs_ls(), fs_mkdir(), fs_read(), fs_size(), fs_write(), - * fs_unlink(). + * fs_unlink(), fs_rename(). */ void fs_close(void); @@ -270,6 +270,18 @@ int fs_unlink(const char *filename); */ int fs_mkdir(const char *filename); +/** + * fs_rename - rename/move a file or directory + * + * @old_path: existing path of the file/directory to rename + * @new_path: new path of the file/directory. If this points to an existing + * file or empty directory, the existing file/directory will be unlinked. + * If this points to a non-empty directory, the rename will fail. + * + * Return: 0 on success, -1 on error conditions + */ +int fs_rename(const char *old_path, const char *new_path); + /* * Common implementation for various filesystem commands, optionally limited * to a specific filesystem type via the fstype parameter. -- cgit v1.3.1 From 06159a1465fc97d8d7b72b9bea39a396f6e7057c Mon Sep 17 00:00:00 2001 From: Gabriel Dalimonte Date: Mon, 17 Feb 2025 13:26:44 -0500 Subject: fs: fat: add rename The implementation roughly follows the POSIX specification for rename() [1]. The ordering of operations attempting to minimize the chance for data loss in unexpected circumstances. The 'mv' command was implemented as a front end for the rename operation as that is what most users are likely familiar with in terms of behavior. The 'FAT_RENAME' Kconfig option was added to prevent code size increase on size-oriented builds like SPL. [1] https://pubs.opengroup.org/onlinepubs/9799919799/functions/rename.html Signed-off-by: Gabriel Dalimonte --- cmd/fs.c | 14 ++ doc/usage/cmd/mv.rst | 61 ++++++ fs/fat/Kconfig | 7 + fs/fat/fat_write.c | 285 ++++++++++++++++++++++++ fs/fs.c | 65 +++++- include/fat.h | 1 + include/fs.h | 2 + lib/efi_loader/Kconfig | 1 + test/py/tests/test_fs/conftest.py | 121 +++++++++++ test/py/tests/test_fs/fstest_helpers.py | 2 + test/py/tests/test_fs/test_rename.py | 372 ++++++++++++++++++++++++++++++++ 11 files changed, 930 insertions(+), 1 deletion(-) create mode 100644 doc/usage/cmd/mv.rst create mode 100644 test/py/tests/test_fs/test_rename.py (limited to 'include') diff --git a/cmd/fs.c b/cmd/fs.c index 3d7e06d6f1e..3faf7627447 100644 --- a/cmd/fs.c +++ b/cmd/fs.c @@ -110,3 +110,17 @@ U_BOOT_CMD( fstypes, 1, 1, do_fstypes_wrapper, "List supported filesystem types", "" ); + +static int do_mv_wrapper(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + return do_mv(cmdtp, flag, argc, argv, FS_TYPE_ANY); +} + +U_BOOT_CMD( + mv, 5, 1, do_mv_wrapper, + "rename/move a file/directory", + " [] \n" + " - renames/moves a file/directory in 'dev' on 'interface' from\n" + " 'old_path' to 'new_path'" +); diff --git a/doc/usage/cmd/mv.rst b/doc/usage/cmd/mv.rst new file mode 100644 index 00000000000..99864371038 --- /dev/null +++ b/doc/usage/cmd/mv.rst @@ -0,0 +1,61 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +.. index:: + single: mv (command) + +mv command +========== + +Synopsis +-------- + +:: + + mv [] + +Description +----------- + +The mv command renames/moves a file or directory within a filesystem. + +interface + interface for accessing the block device (mmc, sata, scsi, usb, ....) + +dev + device number + +part + partition number, defaults to 0 (whole device) + +old_path + existing path to file/directory + +new_path + new path/name for the rename/move + + +Example +------- + + # Rename file 'foo' in directory 'dir' to 'bar' + mv mmc 0:0 dir/foo dir/bar + + # Move file 'f' from directory 'foo' to existing directory 'bar' renaming + # 'f' to 'g' + mv mmc 0:0 foo/f bar/g + + # Move directory 'abc' in directory 'dir1' into existing directory 'dir2' + mv mmc 0:0 dir1/abc dir2 + +Configuration +------------- + +The mv command is only available if CONFIG_CMD_FS_GENERIC=y. + +Return value +------------ + +The return value $? is set to 0 (true) if the file was successfully +renamed/moved. + +If an error occurs, the return value $? is set to 1 (false). diff --git a/fs/fat/Kconfig b/fs/fat/Kconfig index 9bb11eac9f7..19d52238713 100644 --- a/fs/fat/Kconfig +++ b/fs/fat/Kconfig @@ -13,6 +13,13 @@ config FAT_WRITE This provides support for creating and writing new files to an existing FAT filesystem partition. +config FAT_RENAME + bool "Enable filesystem rename support" + depends on FAT_WRITE + help + This provides support for renaming and moving files within a + FAT filesystem partition. + config FS_FAT_MAX_CLUSTSIZE int "Set maximum possible clustersize" default 65536 diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c index 86366d03853..d4952e259ff 100644 --- a/fs/fat/fat_write.c +++ b/fs/fat/fat_write.c @@ -1215,6 +1215,28 @@ static void fill_dentry(fsdata *mydata, dir_entry *dentptr, memcpy(&dentptr->nameext, shortname, SHORT_NAME_SIZE); } +/** + * fat_itr_parent() - modifies the iterator to the parent directory of the + * current iterator. + * + * @itr: iterator positioned anywhere in a directory + * @Return: 0 if the iterator is in the parent directory, -errno otherwise + */ +static int fat_itr_parent(fat_itr *itr) +{ + int ret; + + if (itr->is_root) + return -EIO; + + /* ensure iterator is at the first directory entry */ + ret = fat_move_to_cluster(itr, itr->start_clust); + if (ret) + return ret; + + return fat_itr_resolve(itr, "..", TYPE_DIR); +} + /** * create_link() - inserts a directory entry for a file or directory * @@ -1822,3 +1844,266 @@ exit: free(dotdent); return ret; } + +/** + * check_path_prefix() - ensures one path does not contains another path as a + * prefix. + * + * for example: path foo/bar/baz/qux contains the path prefix foo/bar/baz + * + * note: the iterator may be pointing to any directory entry in the directory + * + * @prefix_clust: start cluster of the final directory in the prefix path + * (the start cluster of 'baz' in the above example) + * @path_itr: iterator of the path to check (an iterator pointing to any + * direntry in 'qux' in the above example) + * Return: -errno on error, 0 if path_itr does not have the directory + * at prefix_clust as an ancestor. + */ +static int check_path_prefix(loff_t prefix_clust, fat_itr *path_itr) +{ + fat_itr itr; + fsdata fsdata = { .fatbuf = NULL, }, *mydata = &fsdata; + int ret; + + /* duplicate fsdata */ + itr = *path_itr; + fsdata = *itr.fsdata; + + /* allocate local fat buffer */ + fsdata.fatbuf = malloc_cache_aligned(FATBUFSIZE); + if (!fsdata.fatbuf) { + log_debug("Error: allocating memory\n"); + ret = -ENOMEM; + goto exit; + } + + fsdata.fatbufnum = -1; + itr.fsdata = &fsdata; + + /* ensure iterator is at the first directory entry */ + ret = fat_move_to_cluster(&itr, itr.start_clust); + if (ret) + goto exit; + + while (1) { + if (prefix_clust == itr.start_clust) { + ret = -EINVAL; + goto exit; + } + + if (itr.is_root) { + ret = 0; + goto exit; + } + + /* Should not occur in a well-formed FAT filesystem besides the root */ + if (fat_itr_parent(&itr)) { + log_debug("FAT filesystem corrupt!\n"); + log_debug("dir @ clust %u has no parent direntry\n", + itr.start_clust); + ret = -EIO; + goto exit; + } + } + +exit: + free(fsdata.fatbuf); + return ret; +} + +/** + * fat_rename - rename/move a file or directory + * + * @old_path: path to the existing file/directory + * @new_path: new path/name for the rename/move + * Return: 0 on success, -errno otherwise + */ +int fat_rename(const char *old_path, const char *new_path) +{ + fat_itr *old_itr = NULL, *new_itr = NULL; + fsdata old_datablock = { .fatbuf = NULL, }; + fsdata new_datablock = { .fatbuf = NULL, }; + /* used for START macro */ + fsdata *mydata = &old_datablock; + int ret = -EIO, is_old_dir; + char *old_path_copy, *old_dirname, *old_basename; + char *new_path_copy, *new_dirname, *new_basename; + char l_new_basename[VFAT_MAXLEN_BYTES]; + __u32 old_clust; + dir_entry *found_existing; + /* only set if found_existing != NULL */ + __u32 new_clust; + + old_path_copy = strdup(old_path); + new_path_copy = strdup(new_path); + old_itr = malloc_cache_aligned(sizeof(fat_itr)); + new_itr = malloc_cache_aligned(sizeof(fat_itr)); + if (!old_path_copy || !new_path_copy || !old_itr || !new_itr) { + log_debug("Error: out of memory\n"); + ret = -ENOMEM; + goto exit; + } + split_filename(old_path_copy, &old_dirname, &old_basename); + split_filename(new_path_copy, &new_dirname, &new_basename); + + if (normalize_longname(l_new_basename, new_basename)) { + log_debug("FAT: illegal filename (%s)\n", new_basename); + ret = -EINVAL; + goto exit; + } + + if (!strcmp(old_basename, ".") || !strcmp(old_basename, "..") || + !strcmp(old_basename, "") || !strcmp(l_new_basename, ".") || + !strcmp(l_new_basename, "..") || !strcmp(l_new_basename, "")) { + ret = -EINVAL; + goto exit; + } + + /* checking for old_path == new_path is deferred until they're resolved */ + + /* resolve old_path */ + ret = fat_itr_root(old_itr, &old_datablock); + if (ret) + goto exit; + + ret = fat_itr_resolve(old_itr, old_dirname, TYPE_DIR); + if (ret) { + log_debug("%s doesn't exist (%d)\n", old_dirname, ret); + ret = -ENOENT; + goto exit; + } + + if (!find_directory_entry(old_itr, old_basename)) { + log_debug("%s doesn't exist (%d)\n", old_basename, -ENOENT); + ret = -ENOENT; + goto exit; + } + + /* store clust old_path points to, to relink later */ + total_sector = old_datablock.total_sect; + old_clust = START(old_itr->dent); + is_old_dir = fat_itr_isdir(old_itr); + + /* resolve new_path*/ + ret = fat_itr_root(new_itr, &new_datablock); + if (ret) + goto exit; + + ret = fat_itr_resolve(new_itr, new_dirname, TYPE_DIR); + if (ret) { + log_debug("%s doesn't exist (%d)\n", new_dirname, ret); + ret = -ENOENT; + goto exit; + } + + found_existing = find_directory_entry(new_itr, l_new_basename); + + if (found_existing) { + /* store cluster of new_path since it may need to be deleted */ + new_clust = START(new_itr->dent); + + /* old_path is new_path, noop */ + if (old_clust == new_clust) { + ret = 0; + goto exit; + } + + if (fat_itr_isdir(new_itr) != is_old_dir) { + if (is_old_dir) + ret = -ENOTDIR; + else + ret = -EISDIR; + goto exit; + } + } + + if (is_old_dir) { + ret = check_path_prefix(old_clust, new_itr); + if (ret) + goto exit; + } + + /* create/update dentry to point to old_path's data cluster */ + if (found_existing) { + struct nameext new_name = new_itr->dent->nameext; + __u8 lcase = new_itr->dent->lcase; + + if (is_old_dir) { + int n_entries = fat_dir_entries(new_itr); + + if (n_entries < 0) { + ret = n_entries; + goto exit; + } + if (n_entries > 2) { + log_debug("Error: directory is not empty: %d\n", + n_entries); + ret = -ENOTEMPTY; + goto exit; + } + } + + *new_itr->dent = *old_itr->dent; + new_itr->dent->nameext = new_name; + new_itr->dent->lcase = lcase; + } else { + /* reset iterator to the start of the directory */ + ret = fat_move_to_cluster(new_itr, new_itr->start_clust); + if (ret) + goto exit; + + ret = create_link(new_itr, l_new_basename, old_clust, + old_itr->dent->size, + old_itr->dent->attr | ATTR_ARCH); + if (ret) + goto exit; + } + + ret = flush_dir(new_itr); + if (ret) + goto exit; + + /* with new_path data cluster unreferenced, clear it */ + if (found_existing) { + ret = clear_fatent(&new_datablock, new_clust); + if (ret) + goto exit; + } + + /* update moved directory so the parent is new_path */ + if (is_old_dir) { + __u32 clust = new_itr->start_clust; + dir_entry *dent; + + fat_itr_child(new_itr, new_itr); + dent = find_directory_entry(new_itr, ".."); + if (!dent) { + log_debug("FAT filesystem corrupt!\n"); + log_debug("dir %s has no parent direntry\n", + l_new_basename); + ret = -EIO; + goto exit; + } + set_start_cluster(&new_datablock, dent, clust); + ret = flush_dir(new_itr); + if (ret) + goto exit; + } + + /* refresh old in case write happened to the same block. */ + ret = fat_move_to_cluster(old_itr, old_itr->dent_clust); + if (ret) + goto exit; + + ret = delete_dentry_link(old_itr); +exit: + free(new_datablock.fatbuf); + free(old_datablock.fatbuf); + free(new_itr); + free(old_itr); + free(new_path_copy); + free(old_path_copy); + + return ret; +} diff --git a/fs/fs.c b/fs/fs.c index fdff83719b1..30a8e5010f2 100644 --- a/fs/fs.c +++ b/fs/fs.c @@ -213,12 +213,16 @@ static struct fstype_info fstypes[] = { .unlink = fs_unlink_unsupported, .mkdir = fs_mkdir_unsupported, #endif - .rename = fs_rename_unsupported, .uuid = fat_uuid, .opendir = fat_opendir, .readdir = fat_readdir, .closedir = fat_closedir, .ln = fs_ln_unsupported, +#if CONFIG_IS_ENABLED(FAT_RENAME) && !IS_ENABLED(CONFIG_XPL_BUILD) + .rename = fat_rename, +#else + .rename = fs_rename_unsupported, +#endif }, #endif @@ -1007,6 +1011,65 @@ int do_ln(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[], return 0; } +int do_mv(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[], + int fstype) +{ + struct fs_dir_stream *dirs; + char *src = argv[3]; + char *dst = argv[4]; + char *new_dst = NULL; + int ret = 1; + + if (argc != 5) { + ret = CMD_RET_USAGE; + goto exit; + } + + if (fs_set_blk_dev(argv[1], argv[2], fstype)) + goto exit; + + dirs = fs_opendir(dst); + /* dirs being valid means dst points to an existing directory. + * mv should copy the file/dir (keeping the same name) into the + * directory + */ + if (dirs) { + char *src_name = strrchr(src, '/'); + int dst_len; + + if (src_name) + src_name += 1; + else + src_name = src; + + dst_len = strlen(dst); + new_dst = calloc(1, dst_len + strlen(src_name) + 2); + strcpy(new_dst, dst); + + /* If there is already a trailing slash, don't add another */ + if (new_dst[dst_len - 1] != '/') { + new_dst[dst_len] = '/'; + dst_len += 1; + } + + strcpy(new_dst + dst_len, src_name); + dst = new_dst; + } + fs_closedir(dirs); + + if (fs_set_blk_dev(argv[1], argv[2], fstype)) + goto exit; + + if (fs_rename(src, dst)) + goto exit; + + ret = 0; + +exit: + free(new_dst); + return ret; +} + int do_fs_types(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) { struct fstype_info *drv = fstypes; diff --git a/include/fat.h b/include/fat.h index 3dce99a23cf..ca97880de12 100644 --- a/include/fat.h +++ b/include/fat.h @@ -206,6 +206,7 @@ int fat_opendir(const char *filename, struct fs_dir_stream **dirsp); int fat_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp); void fat_closedir(struct fs_dir_stream *dirs); int fat_unlink(const char *filename); +int fat_rename(const char *old_path, const char *new_path); int fat_mkdir(const char *dirname); void fat_close(void); void *fat_next_cluster(fat_itr *itr, unsigned int *nbytes); diff --git a/include/fs.h b/include/fs.h index 5b272eb9f5e..54449faf2e5 100644 --- a/include/fs.h +++ b/include/fs.h @@ -302,6 +302,8 @@ int do_mkdir(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[], int fstype); int do_ln(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[], int fstype); +int do_mv(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[], + int fstype); /* * Determine the UUID of the specified filesystem and print it. Optionally it is diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index d4f6b56afaa..6130af14337 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -27,6 +27,7 @@ config EFI_LOADER select REGEX imply FAT imply FAT_WRITE + imply FAT_RENAME imply USB_KEYBOARD_FN_KEYS imply VIDEO_ANSI help diff --git a/test/py/tests/test_fs/conftest.py b/test/py/tests/test_fs/conftest.py index af2adaf1645..7bfcf41ed6f 100644 --- a/test/py/tests/test_fs/conftest.py +++ b/test/py/tests/test_fs/conftest.py @@ -18,6 +18,7 @@ supported_fs_fat = ['fat12', 'fat16'] supported_fs_mkdir = ['fat12', 'fat16', 'fat32'] supported_fs_unlink = ['fat12', 'fat16', 'fat32'] supported_fs_symlink = ['ext4'] +supported_fs_rename = ['fat12', 'fat16', 'fat32'] # # Filesystem test specific setup @@ -55,6 +56,7 @@ def pytest_configure(config): global supported_fs_mkdir global supported_fs_unlink global supported_fs_symlink + global supported_fs_rename def intersect(listA, listB): return [x for x in listA if x in listB] @@ -68,6 +70,7 @@ def pytest_configure(config): supported_fs_mkdir = intersect(supported_fs, supported_fs_mkdir) supported_fs_unlink = intersect(supported_fs, supported_fs_unlink) supported_fs_symlink = intersect(supported_fs, supported_fs_symlink) + supported_fs_rename = intersect(supported_fs, supported_fs_rename) def pytest_generate_tests(metafunc): """Parametrize fixtures, fs_obj_xxx @@ -99,6 +102,9 @@ def pytest_generate_tests(metafunc): if 'fs_obj_symlink' in metafunc.fixturenames: metafunc.parametrize('fs_obj_symlink', supported_fs_symlink, indirect=True, scope='module') + if 'fs_obj_rename' in metafunc.fixturenames: + metafunc.parametrize('fs_obj_rename', supported_fs_rename, + indirect=True, scope='module') # # Helper functions @@ -527,6 +533,121 @@ def fs_obj_symlink(request, u_boot_config): call('rm -rf %s' % scratch_dir, shell=True) call('rm -f %s' % fs_img, shell=True) +# +# Fixture for rename test +# +@pytest.fixture() +def fs_obj_rename(request, u_boot_config): + """Set up a file system to be used in rename tests. + + Args: + request: Pytest request object. + u_boot_config: U-Boot configuration. + + Return: + A fixture for rename tests, i.e. a triplet of file system type, + volume file name, and dictionary of test identifier and md5val. + """ + def new_rand_file(path): + check_call('dd if=/dev/urandom of=%s bs=1K count=1' % path, shell=True) + + def file_hash(path): + out = check_output( + 'dd if=%s bs=1K skip=0 count=1 2> /dev/null | md5sum' % path, + shell=True + ) + return out.decode().split()[0] + + fs_type = request.param + fs_img = '' + + fs_ubtype = fstype_to_ubname(fs_type) + check_ubconfig(u_boot_config, fs_ubtype) + + mount_dir = u_boot_config.persistent_data_dir + '/scratch' + + try: + check_call('mkdir -p %s' % mount_dir, shell=True) + except CalledProcessError as err: + pytest.skip('Preparing mount folder failed for filesystem: ' + fs_type + '. {}'.format(err)) + call('rm -f %s' % fs_img, shell=True) + return + + try: + md5val = {} + # Test Case 1 + check_call('mkdir %s/test1' % mount_dir, shell=True) + new_rand_file('%s/test1/file1' % mount_dir) + md5val['test1'] = file_hash('%s/test1/file1' % mount_dir) + + # Test Case 2 + check_call('mkdir %s/test2' % mount_dir, shell=True) + new_rand_file('%s/test2/file1' % mount_dir) + new_rand_file('%s/test2/file_exist' % mount_dir) + md5val['test2'] = file_hash('%s/test2/file1' % mount_dir) + + # Test Case 3 + check_call('mkdir -p %s/test3/dir1' % mount_dir, shell=True) + new_rand_file('%s/test3/dir1/file1' % mount_dir) + md5val['test3'] = file_hash('%s/test3/dir1/file1' % mount_dir) + + # Test Case 4 + check_call('mkdir -p %s/test4/dir1' % mount_dir, shell=True) + check_call('mkdir -p %s/test4/dir2/dir1' % mount_dir, shell=True) + new_rand_file('%s/test4/dir1/file1' % mount_dir) + md5val['test4'] = file_hash('%s/test4/dir1/file1' % mount_dir) + + # Test Case 5 + check_call('mkdir -p %s/test5/dir1' % mount_dir, shell=True) + new_rand_file('%s/test5/file2' % mount_dir) + md5val['test5'] = file_hash('%s/test5/file2' % mount_dir) + + # Test Case 6 + check_call('mkdir -p %s/test6/dir2/existing' % mount_dir, shell=True) + new_rand_file('%s/test6/existing' % mount_dir) + md5val['test6'] = file_hash('%s/test6/existing' % mount_dir) + + # Test Case 7 + check_call('mkdir -p %s/test7/dir1' % mount_dir, shell=True) + check_call('mkdir -p %s/test7/dir2/dir1' % mount_dir, shell=True) + new_rand_file('%s/test7/dir2/dir1/file1' % mount_dir) + md5val['test7'] = file_hash('%s/test7/dir2/dir1/file1' % mount_dir) + + # Test Case 8 + check_call('mkdir -p %s/test8/dir1' % mount_dir, shell=True) + new_rand_file('%s/test8/dir1/file1' % mount_dir) + md5val['test8'] = file_hash('%s/test8/dir1/file1' % mount_dir) + + # Test Case 9 + check_call('mkdir -p %s/test9/dir1/nested/inner' % mount_dir, shell=True) + new_rand_file('%s/test9/dir1/nested/inner/file1' % mount_dir) + + # Test Case 10 + check_call('mkdir -p %s/test10' % mount_dir, shell=True) + new_rand_file('%s/test10/file1' % mount_dir) + md5val['test10'] = file_hash('%s/test10/file1' % mount_dir) + + # Test Case 11 + check_call('mkdir -p %s/test11/dir1' % mount_dir, shell=True) + new_rand_file('%s/test11/dir1/file1' % mount_dir) + md5val['test11'] = file_hash('%s/test11/dir1/file1' % mount_dir) + + try: + # 128MiB volume + fs_img = fs_helper.mk_fs(u_boot_config, fs_type, 0x8000000, '128MB', mount_dir) + except CalledProcessError as err: + pytest.skip('Creating failed for filesystem: ' + fs_type + '. {}'.format(err)) + return + + except CalledProcessError: + pytest.skip('Setup failed for filesystem: ' + fs_type) + return + else: + yield [fs_ubtype, fs_img, md5val] + finally: + call('rm -rf %s' % mount_dir, shell=True) + call('rm -f %s' % fs_img, shell=True) + # # Fixture for fat test # diff --git a/test/py/tests/test_fs/fstest_helpers.py b/test/py/tests/test_fs/fstest_helpers.py index faec2982489..c1447b4d43e 100644 --- a/test/py/tests/test_fs/fstest_helpers.py +++ b/test/py/tests/test_fs/fstest_helpers.py @@ -9,5 +9,7 @@ def assert_fs_integrity(fs_type, fs_img): try: if fs_type == 'ext4': check_call('fsck.ext4 -n -f %s' % fs_img, shell=True) + elif fs_type in ['fat12', 'fat16', 'fat32']: + check_call('fsck.fat -n %s' % fs_img, shell=True) except CalledProcessError: raise diff --git a/test/py/tests/test_fs/test_rename.py b/test/py/tests/test_fs/test_rename.py new file mode 100644 index 00000000000..df2b2fd2945 --- /dev/null +++ b/test/py/tests/test_fs/test_rename.py @@ -0,0 +1,372 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2025 Gabriel Dalimonte +# +# U-Boot File System:rename Test + + +import pytest + +from fstest_defs import * +from fstest_helpers import assert_fs_integrity + +@pytest.mark.boardspec('sandbox') +@pytest.mark.slow +class TestRename(object): + def test_rename1(self, u_boot_console, fs_obj_rename): + """ + Test Case 1 - rename a file (successful mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 1 - rename a file'): + d = 'test1' + src = '%s/file1' % d + dst = '%s/file2' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s' % (ADDR, dst), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('file1' not in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test1'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename2(self, u_boot_console, fs_obj_rename): + """ + Test Case 2 - rename a file to an existing file (successful mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 2 - rename a file to an existing file'): + d = 'test2' + src = '%s/file1' % d + dst = '%s/file_exist' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s' % (ADDR, dst), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('file1' not in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test2'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename3(self, u_boot_console, fs_obj_rename): + """ + Test Case 3 - rename a directory (successful mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 3 - rename a directory'): + d = 'test3' + src = '%s/dir1' % d + dst = '%s/dir2' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s/file1' % (ADDR, dst), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('dir1' not in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test3'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename4(self, u_boot_console, fs_obj_rename): + """ + Test Case 4 - rename a directory to an existing directory (successful + mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 4 - rename a directory to an existing directory'): + d = 'test4' + src = '%s/dir1' % d + dst = '%s/dir2' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s/dir1/file1' % (ADDR, dst), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('dir1' not in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test4'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename5(self, u_boot_console, fs_obj_rename): + """ + Test Case 5 - rename a directory to an existing file (failed mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 5 - rename a directory to an existing file'): + d = 'test5' + src = '%s/dir1' % d + dst = '%s/file2' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('dir1' in ''.join(output)) + assert('file2' in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s' % (ADDR, dst), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test5'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename6(self, u_boot_console, fs_obj_rename): + """ + Test Case 6 - rename a file to an existing empty directory (failed mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 6 - rename a file to an existing empty directory'): + d = 'test6' + src = '%s/existing' % d + dst = '%s/dir2' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s' % (ADDR, src), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('dir2' in ''.join(output)) + assert('existing' in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test6'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename7(self, u_boot_console, fs_obj_rename): + """ + Test Case 7 - rename a directory to a non-empty directory (failed mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 7 - rename a directory to a non-empty directory'): + d = 'test7' + src = '%s/dir1' % d + dst = '%s/dir2' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s/dir1/file1' % (ADDR, dst), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('dir1' in ''.join(output)) + assert('dir2' in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test7'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename8(self, u_boot_console, fs_obj_rename): + """ + Test Case 8 - rename a directory inside itself (failed mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 8 - rename a directory inside itself'): + d = 'test8' + src = '%s/dir1' % d + dst = '%s/dir1/dir1' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s/file1' % (ADDR, src), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('dir1' in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (src), + ]) + assert('file1' in ''.join(output)) + assert('dir1' not in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test8'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename9(self, u_boot_console, fs_obj_rename): + """ + Test Case 9 - rename a directory inside itself with backtracks (failed + mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 9 - rename a directory inside itself with backtracks'): + d = 'test9' + src = '%s/dir1/nested' % d + dst = '%s/dir1/nested/inner/./../../../dir1/nested/inner/another' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, dst), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s/dir1' % (d), + ]) + assert('nested' in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (src), + ]) + assert('inner' in ''.join(output)) + assert('nested' not in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename10(self, u_boot_console, fs_obj_rename): + """ + Test Case 10 - rename a file to itself (successful mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 10 - rename a file to itself'): + d = 'test10' + src = '%s/file1' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, src), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s' % (ADDR, src), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('file1' in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test10'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) + + def test_rename11(self, u_boot_console, fs_obj_rename): + """ + Test Case 11 - rename a directory to itself (successful mv) + """ + fs_type, fs_img, md5val = fs_obj_rename + with u_boot_console.log.section('Test Case 11 - rename a directory to itself'): + # / at the end here is intentional. Ensures trailing / doesn't + # affect mv producing an updated dst path for fs_rename + d = 'test11/' + src = '%sdir1' % d + output = u_boot_console.run_command_list([ + 'host bind 0 %s' % fs_img, + 'setenv filesize', + 'mv host 0:0 %s %s' % (src, d), + ]) + assert('' == ''.join(output)) + + output = u_boot_console.run_command_list([ + 'load host 0:0 %x /%s/file1' % (ADDR, src), + 'printenv filesize']) + assert('filesize=400' in output) + + output = u_boot_console.run_command_list([ + 'ls host 0:0 %s' % (d), + ]) + assert('dir1' in ''.join(output)) + + output = u_boot_console.run_command_list([ + 'md5sum %x $filesize' % ADDR, + 'setenv filesize']) + assert(md5val['test11'] in ''.join(output)) + assert_fs_integrity(fs_type, fs_img) -- cgit v1.3.1 From e6883b6b30784a529fbccd74f3226ad493d15116 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 7 Mar 2025 10:59:57 +0200 Subject: sandbox: remap memory load addresses The existing memory layout places the bloblist at 0xb000 and the fdt at 0x100, resulting in a 0xaf00 size constraint for the fdt. This constraint has been reached. Lets modify the layout by moving the bloblist to 0x100, device tree to 0x1000 and placing early memory allocation after pre-console buffer at 0xf4000. This should guarantee sufficient memory allocation for future expansion. Signed-off-by: Svyatoslav Ryhel --- arch/sandbox/Kconfig | 2 +- common/Kconfig | 2 +- doc/arch/sandbox/sandbox.rst | 6 +++--- include/configs/sandbox.h | 2 +- test/lib/kconfig.c | 8 ++++---- 5 files changed, 10 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 4c169034d9a..d61a327f151 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -77,7 +77,7 @@ config SANDBOX_BITS_PER_LONG config SYS_FDT_LOAD_ADDR hex "Address at which to load devicetree" - default 0x100 + default 0x1000 help With sandbox the devicetree is loaded into the emulated RAM. This sets the address that is used. There must be enough space at this address diff --git a/common/Kconfig b/common/Kconfig index 7685914fa6f..cf4bee063ae 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1070,7 +1070,7 @@ endchoice config BLOBLIST_ADDR hex "Address of bloblist" - default 0xb000 if SANDBOX + default 0x100 if SANDBOX depends on BLOBLIST_FIXED help Sets the address of the bloblist, set up by the first part of U-Boot diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst index a8b0d7f0395..7e641306da2 100644 --- a/doc/arch/sandbox/sandbox.rst +++ b/doc/arch/sandbox/sandbox.rst @@ -658,10 +658,10 @@ that are mapped into that memory: ======== ======================== =============================== Addr Config Usage ======== ======================== =============================== - 100 CONFIG_SYS_FDT_LOAD_ADDR Device tree - b000 CONFIG_BLOBLIST_ADDR Blob list - 10000 CFG_MALLOC_F_ADDR Early memory allocation + 100 CONFIG_BLOBLIST_ADDR Blob list + 1000 CONFIG_SYS_FDT_LOAD_ADDR Device tree f0000 CONFIG_PRE_CON_BUF_ADDR Pre-console buffer + f4000 CFG_MALLOC_F_ADDR Early memory allocation 100000 TCG Event log TCG Event Log 200000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used 400000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only) diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 2372485c84e..db2ac7f83bb 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CFG_MALLOC_F_ADDR 0x0010000 +#define CFG_MALLOC_F_ADDR 0x000f4000 /* Size of our emulated memory */ #define SB_CONCAT(x, y) x ## y diff --git a/test/lib/kconfig.c b/test/lib/kconfig.c index a3645abf946..2f47af9acf1 100644 --- a/test/lib/kconfig.c +++ b/test/lib/kconfig.c @@ -22,10 +22,10 @@ static int lib_test_is_enabled(struct unit_test_state *uts) ut_asserteq(0, CONFIG_IS_ENABLED(_UNDEFINED)); if (IS_ENABLED(CONFIG_BLOBLIST)) { - ut_asserteq(0xb000, IF_ENABLED_INT(CONFIG_BLOBLIST_FIXED, - CONFIG_BLOBLIST_ADDR)); - ut_asserteq(0xb000, CONFIG_IF_ENABLED_INT(BLOBLIST_FIXED, - BLOBLIST_ADDR)); + ut_asserteq(0x100, IF_ENABLED_INT(CONFIG_BLOBLIST_FIXED, + CONFIG_BLOBLIST_ADDR)); + ut_asserteq(0x100, CONFIG_IF_ENABLED_INT(BLOBLIST_FIXED, + BLOBLIST_ADDR)); } /* -- cgit v1.3.1 From 9057077cf4e10611b8a553520c77cd1936c9cdeb Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Sat, 15 Feb 2025 19:46:29 +0200 Subject: core: ofnode: add of_graph parsing helpers Add a mostly complete list of ofnode analogs of of_graph parsing helpers. Signed-off-by: Svyatoslav Ryhel --- drivers/core/Makefile | 2 +- drivers/core/ofnode_graph.c | 217 ++++++++++++++++++++++++++++++++++++++++++++ include/dm/ofnode_graph.h | 90 ++++++++++++++++++ 3 files changed, 308 insertions(+), 1 deletion(-) create mode 100644 drivers/core/ofnode_graph.c create mode 100644 include/dm/ofnode_graph.h (limited to 'include') diff --git a/drivers/core/Makefile b/drivers/core/Makefile index 9ea57911f89..657e589c286 100644 --- a/drivers/core/Makefile +++ b/drivers/core/Makefile @@ -16,6 +16,6 @@ ifndef CONFIG_DM_DEV_READ_INLINE obj-$(CONFIG_OF_CONTROL) += read.o endif obj-$(CONFIG_$(XPL_)OF_PLATDATA) += read.o -obj-$(CONFIG_OF_CONTROL) += of_extra.o ofnode.o read_extra.o +obj-$(CONFIG_OF_CONTROL) += of_extra.o ofnode.o read_extra.o ofnode_graph.o ccflags-$(CONFIG_DM_DEBUG) += -DDEBUG diff --git a/drivers/core/ofnode_graph.c b/drivers/core/ofnode_graph.c new file mode 100644 index 00000000000..90c92af3258 --- /dev/null +++ b/drivers/core/ofnode_graph.c @@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2025 Svyatoslav Ryhel + */ + +#define LOG_CATEGORY LOGC_DT + +#include +#include +#include +#include + +/** + * ofnode_graph_get_endpoint_count() - get the number of endpoints in a device ofnode + * @parent: ofnode to the device containing ports and endpoints + * + * Return: count of endpoint of this device ofnode + */ +unsigned int ofnode_graph_get_endpoint_count(ofnode parent) +{ + ofnode ports, port, endpoint; + unsigned int num = 0; + + /* Check if ports node exists */ + ports = ofnode_find_subnode(parent, "ports"); + if (ofnode_valid(ports)) + parent = ports; + + ofnode_for_each_subnode(port, parent) { + if (!strncmp(ofnode_get_name(port), "port", 4)) { + /* Port node can only contain endpoints */ + ofnode_for_each_subnode(endpoint, port) + num++; + } + }; + + log_debug("%s: detected %d endpoints\n", __func__, num); + + return num++; +} + +/** + * ofnode_graph_get_port_count() - get the number of port in a device or ports ofnode + * @parent: ofnode to the device or ports node + * + * Return: count of port of this device or ports node + */ +unsigned int ofnode_graph_get_port_count(ofnode parent) +{ + ofnode ports, port; + unsigned int num = 0; + + /* Check if ports node exists */ + ports = ofnode_find_subnode(parent, "ports"); + if (ofnode_valid(ports)) + parent = ports; + + ofnode_for_each_subnode(port, parent) + if (!strncmp(ofnode_get_name(port), "port", 4)) + num++; + + log_debug("%s: detected %d ports\n", __func__, num); + + return num++; +} + +/** + * ofnode_graph_get_port_by_id() - get the port matching a given id + * @parent: parent ofnode + * @id: id of the port + * + * Return: ofnode in given port. + */ +ofnode ofnode_graph_get_port_by_id(ofnode parent, u32 id) +{ + ofnode ports, port; + u32 port_id; + + ports = ofnode_find_subnode(parent, "ports"); + if (!ofnode_valid(ports)) + return ofnode_null(); + + /* Check ports for node with desired id */ + ofnode_for_each_subnode(port, ports) { + ofnode_read_u32(port, "reg", &port_id); + log_debug("%s: detected port %d\n", __func__, port_id); + if (port_id == id) + return port; + } + + return ofnode_null(); +} + +/** + * ofnode_graph_get_endpoint_by_regs() - get the endpoint matching a given id + * @parent: parent ofnode + * @reg_id: id of the port + * @id: id for the endpoint + * + * Return: ofnode in given endpoint or ofnode_null() if not found. + * reg and port_reg are ignored when they are -1. + */ +ofnode ofnode_graph_get_endpoint_by_regs(ofnode parent, int reg_id, int id) +{ + ofnode port, endpoint; + u32 ep_id; + + /* get the port to work with */ + if (reg_id < 0) + port = ofnode_find_subnode(parent, "port"); + else + port = ofnode_graph_get_port_by_id(parent, reg_id); + + if (!ofnode_valid(port)) { + log_debug("%s: port node is not found\n", __func__); + return ofnode_null(); + } + + if (id < 0) + return ofnode_find_subnode(port, "endpoint"); + + /* Check endpoints for node with desired id */ + ofnode_for_each_subnode(endpoint, port) { + ofnode_read_u32(endpoint, "reg", &ep_id); + log_debug("%s: detected endpoint %d\n", __func__, ep_id); + if (ep_id == id) + return endpoint; + } + + return ofnode_null(); +} + +/** + * ofnode_graph_get_remote_endpoint() - get remote endpoint node + * @endpoint: ofnode of a local endpoint + * + * Return: Remote endpoint ofnode linked with local endpoint. + */ +ofnode ofnode_graph_get_remote_endpoint(ofnode endpoint) +{ + /* Get remote endpoint node. */ + return ofnode_parse_phandle(endpoint, "remote-endpoint", 0); +} + +/** + * ofnode_graph_get_port_parent() - get port's parent node + * @endpoint: ofnode of a local endpoint + * + * Return: device ofnode associated with endpoint + */ +ofnode ofnode_graph_get_port_parent(ofnode endpoint) +{ + ofnode port = ofnode_get_parent(endpoint); + ofnode parent = ofnode_get_parent(port); + + /* check if we are on top level or in ports node */ + if (!strcmp(ofnode_get_name(parent), "ports")) + parent = ofnode_get_parent(parent); + + return parent; +} + +/** + * ofnode_graph_get_remote_port_parent() - get remote port's parent ofnode + * @endpoint: ofnode of a local endpoint + * + * Return: device ofnode associated with endpoint linked to local endpoint. + */ +ofnode ofnode_graph_get_remote_port_parent(ofnode endpoint) +{ + ofnode remote_endpoint = ofnode_graph_get_remote_endpoint(endpoint); + if (!ofnode_valid(remote_endpoint)) { + log_debug("%s: remote endpoint is not found\n", __func__); + return ofnode_null(); + } + + return ofnode_graph_get_port_parent(remote_endpoint); +} + +/** + * ofnode_graph_get_remote_port() - get remote port ofnode + * @endpoint: ofnode of a local endpoint + * + * Return: port ofnode associated with remote endpoint node linked + * to local endpoint. + */ +ofnode ofnode_graph_get_remote_port(ofnode endpoint) +{ + ofnode remote_endpoint = ofnode_graph_get_remote_endpoint(endpoint); + if (!ofnode_valid(remote_endpoint)) { + log_debug("%s: remote endpoint is not found\n", __func__); + return ofnode_null(); + } + + return ofnode_get_parent(remote_endpoint); +} + +/** + * ofnode_graph_get_remote_node() - get remote parent ofnode for given port/endpoint + * @parent: parent ofnode containing graph port/endpoint + * @port: identifier (value of reg property) of the parent port ofnode + * @endpoint: identifier (value of reg property) of the endpoint ofnode + * + * Return: device ofnode associated with endpoint linked to local endpoint. + */ +ofnode ofnode_graph_get_remote_node(ofnode parent, int port, int endpoint) +{ + ofnode endpoint_ofnode; + + endpoint_ofnode = ofnode_graph_get_endpoint_by_regs(parent, port, endpoint); + if (!ofnode_valid(endpoint_ofnode)) { + log_debug("%s: endpoint is not found\n", __func__); + return ofnode_null(); + } + + return ofnode_graph_get_remote_port_parent(endpoint_ofnode); +} diff --git a/include/dm/ofnode_graph.h b/include/dm/ofnode_graph.h new file mode 100644 index 00000000000..908c990a3f3 --- /dev/null +++ b/include/dm/ofnode_graph.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2025 Svyatoslav Ryhel + */ + +#ifndef _DM_OFNODE_GRAPH_H +#define _DM_OFNODE_GRAPH_H + +#include + +/** + * ofnode_graph_get_endpoint_count() - get the number of endpoints in a device ofnode + * @parent: ofnode to the device containing ports and endpoints + * + * Return: count of endpoint of this device ofnode + */ +unsigned int ofnode_graph_get_endpoint_count(ofnode parent); + +/** + * ofnode_graph_get_port_count() - get the number of port in a device or ports ofnode + * @parent: ofnode to the device or ports node + * + * Return: count of port of this device or ports node + */ +unsigned int ofnode_graph_get_port_count(ofnode parent); + +/** + * ofnode_graph_get_port_by_id() - get the port matching a given id + * @parent: parent ofnode + * @id: id of the port + * + * Return: ofnode in given port. + */ +ofnode ofnode_graph_get_port_by_id(ofnode parent, u32 id); + +/** + * ofnode_graph_get_endpoint_by_regs() - get the endpoint matching a given id + * @parent: parent ofnode + * @reg_id: id of the port + * @id: id for the endpoint + * + * Return: ofnode in given endpoint or NULL if not found. + * reg and port_reg are ignored when they are -1. + */ +ofnode ofnode_graph_get_endpoint_by_regs(ofnode parent, u32 reg_id, u32 id); + +/** + * ofnode_graph_get_remote_endpoint() - get remote endpoint node + * @endoint: ofnode of a local endpoint + * + * Return: Remote endpoint ofnode linked with local endpoint. + */ +ofnode ofnode_graph_get_remote_endpoint(ofnode endpoint); + +/** + * ofnode_graph_get_port_parent() - get port's parent node + * @endpoint: ofnode of a local endpoint + * + * Return: device ofnode associated with endpoint + */ +ofnode ofnode_graph_get_port_parent(ofnode endpoint); + +/** + * ofnode_graph_get_remote_port_parent() - get remote port's parent ofnode + * @endoint: ofnode of a local endpoint + * + * Return: device ofnode associated with endpoint linked to local endpoint. + */ +ofnode ofnode_graph_get_remote_port_parent(ofnode endpoint); + +/** + * ofnode_graph_get_remote_port() - get remote port ofnode + * @endoint: ofnode of a local endpoint + * + * Return: port ofnode associated with remote endpoint node linked + * to local endpoint. + */ +ofnode ofnode_graph_get_remote_port(ofnode endpoint); + +/** + * ofnode_graph_get_remote_node() - get remote parent ofnode for given port/endpoint + * @parent: parent ofnode containing graph port/endpoint + * @port: identifier (value of reg property) of the parent port ofnode + * @endpoint: identifier (value of reg property) of the endpoint ofnode + * + * Return: device ofnode associated with endpoint linked to local endpoint. + */ +ofnode ofnode_graph_get_remote_node(ofnode parent, u32 port, u32 endpoint); + +#endif -- cgit v1.3.1 From ab516f5e279d178ea71e453501917e56a88ae4d8 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 14 Feb 2025 10:57:05 +0200 Subject: video: bridge-uclass: add get_display_timing ops Add get_display_timing ops for internal bridges linked to panels that do not support EDID (MIPI-DSI panels for example) or have EDID not routed. Tested-by: Dang Huynh (PineTab 2) Signed-off-by: Svyatoslav Ryhel Reviewed-by: Simon Glass --- drivers/video/bridge/video-bridge-uclass.c | 11 +++++++++++ include/video_bridge.h | 21 +++++++++++++++++++++ 2 files changed, 32 insertions(+) (limited to 'include') diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c index 2084a2e03ee..1b8aa12b9e8 100644 --- a/drivers/video/bridge/video-bridge-uclass.c +++ b/drivers/video/bridge/video-bridge-uclass.c @@ -33,6 +33,17 @@ int video_bridge_attach(struct udevice *dev) return ops->attach(dev); } +int video_bridge_get_display_timing(struct udevice *dev, + struct display_timing *timings) +{ + struct video_bridge_ops *ops = video_bridge_get_ops(dev); + + if (!ops->get_display_timing) + return -ENOSYS; + + return ops->get_display_timing(dev, timings); +} + int video_bridge_check_attached(struct udevice *dev) { struct video_bridge_priv *uc_priv = dev_get_uclass_priv(dev); diff --git a/include/video_bridge.h b/include/video_bridge.h index 3b429eac578..7158deb299a 100644 --- a/include/video_bridge.h +++ b/include/video_bridge.h @@ -53,6 +53,19 @@ struct video_bridge_ops { */ int (*set_backlight)(struct udevice *dev, int percent); + /** + * get_display_timing() - Get display timings from bridge. + * + * @dev: Bridge device containing the linked display timings + * @tim: Place to put timings + * @return 0 if OK, -ve on error + * + * This call it totally optional and useful mainly for integrated + * bridges with fixed output device. + */ + int (*get_display_timing)(struct udevice *dev, + struct display_timing *timing); + /** * read_edid() - Read information from EDID * @@ -98,6 +111,14 @@ int video_bridge_set_active(struct udevice *dev, bool active); */ int video_bridge_check_attached(struct udevice *dev); +/** + * video_bridge_get_display_timing() - Get display timings from bridge. + * + * @dev: Bridge device containing the linked display timings + * Return: 0 if OK, -ve on error + */ +int video_bridge_get_display_timing(struct udevice *dev, + struct display_timing *timing); /** * video_bridge_read_edid() - Read information from EDID * -- cgit v1.3.1 From 7cd5a6cb6cc017fb850d4669170cd14ca21c5443 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Fri, 21 Feb 2025 13:09:30 +0200 Subject: video: bridge-uclass: add inline fallbacks of video bridge functions Hide video bridge functions behind config condition and add inline fallbacks to avoid erroring out when using header without config enabled. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Simon Glass --- include/video_bridge.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'include') diff --git a/include/video_bridge.h b/include/video_bridge.h index 7158deb299a..00e9804565c 100644 --- a/include/video_bridge.h +++ b/include/video_bridge.h @@ -80,6 +80,7 @@ struct video_bridge_ops { #define video_bridge_get_ops(dev) \ ((struct video_bridge_ops *)(dev)->driver->ops) +#if CONFIG_IS_ENABLED(VIDEO_BRIDGE) /** * video_bridge_attach() - attach a video bridge * @@ -128,5 +129,37 @@ int video_bridge_get_display_timing(struct udevice *dev, * Return: number of bytes read, <=0 for error */ int video_bridge_read_edid(struct udevice *dev, u8 *buf, int buf_size); +#else +static inline int video_bridge_attach(struct udevice *dev) +{ + return -ENOSYS; +} + +static inline int video_bridge_set_backlight(struct udevice *dev, int percent) +{ + return -ENOSYS; +} + +static inline int video_bridge_set_active(struct udevice *dev, bool active) +{ + return -ENOSYS; +} + +static inline int video_bridge_check_attached(struct udevice *dev) +{ + return -ENOSYS; +} + +static inline int video_bridge_get_display_timing(struct udevice *dev, + struct display_timing *timing) +{ + return -ENOSYS; +} + +static inline int video_bridge_read_edid(struct udevice *dev, u8 *buf, int buf_size) +{ + return -ENOSYS; +} +#endif /* CONFIG_VIDEO_BRIDGE */ #endif -- cgit v1.3.1 From 74829b4d93dcdaab5b87f8432b62bf198895c692 Mon Sep 17 00:00:00 2001 From: Adriano Cordova Date: Mon, 3 Mar 2025 11:13:11 -0300 Subject: efi_loader: expose symbols to be used by the EFI network stack The following symbols are exposed: - efi_reinstall_protocol_interface This is done so that the device path protocol interface of the network device can be changed internally by u-boot when a new bootfile gets downloaded. - eth_set_dev To support multiple network udevices - efi_close_event This comes in preparation to support unregistering an EFI network device from the EFI network stack when the underlying U-boot device gets removed - efi_[dis]connect_controller The EFI network driver uses ConnectController to add a NIC to the EFI network stack. - efi_uninstall_protocol_interface connect_controler for the efi network driver can install protocols, which need to be uninstalled in disconnect_controller - EFI_SIMPLE_NETWORK_PROTOCOL_GUID Signed-off-by: Adriano Cordova --- include/efi_loader.h | 17 +++++++++++++++++ include/net-common.h | 1 + lib/efi_loader/efi_boottime.c | 21 ++++++++++----------- lib/efi_loader/efi_net.c | 2 +- lib/efi_selftest/efi_selftest_snp.c | 1 - 5 files changed, 29 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/efi_loader.h b/include/efi_loader.h index 1d75d97ebbc..6a17a41dbad 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -321,6 +321,8 @@ extern const efi_guid_t efi_guid_host_dev; #endif /* GUID of the EFI_BLOCK_IO_PROTOCOL */ extern const efi_guid_t efi_block_io_guid; +/* GUID of the EFI_SIMPLE_NETWORK_PROTOCOL */ +extern const efi_guid_t efi_net_guid; extern const efi_guid_t efi_global_variable_guid; extern const efi_guid_t efi_guid_console_control; extern const efi_guid_t efi_guid_device_path; @@ -733,6 +735,10 @@ efi_status_t efi_search_protocol(const efi_handle_t handle, efi_status_t efi_add_protocol(const efi_handle_t handle, const efi_guid_t *protocol, void *protocol_interface); +/* Uninstall new protocol on a handle */ +efi_status_t efi_uninstall_protocol + (efi_handle_t handle, const efi_guid_t *protocol, + void *protocol_interface, bool preserve); /* Reinstall a protocol on a handle */ efi_status_t EFIAPI efi_reinstall_protocol_interface( efi_handle_t handle, @@ -748,6 +754,15 @@ efi_status_t EFIAPI efi_install_multiple_protocol_interfaces(efi_handle_t *handle, ...); efi_status_t EFIAPI efi_uninstall_multiple_protocol_interfaces(efi_handle_t handle, ...); +/* Connect and disconnect controller */ +efi_status_t EFIAPI efi_connect_controller(efi_handle_t controller_handle, + efi_handle_t *driver_image_handle, + struct efi_device_path *remain_device_path, + bool recursive); +efi_status_t EFIAPI efi_disconnect_controller( + efi_handle_t controller_handle, + efi_handle_t driver_image_handle, + efi_handle_t child_handle); /* Get handles that support a given protocol */ efi_status_t EFIAPI efi_locate_handle_buffer( enum efi_locate_search_type search_type, @@ -768,6 +783,8 @@ efi_status_t efi_create_event(uint32_t type, efi_uintn_t notify_tpl, void *context), void *notify_context, const efi_guid_t *group, struct efi_event **event); +/* Call this to close an event */ +efi_status_t EFIAPI efi_close_event(struct efi_event *event); /* Call this to set a timer */ efi_status_t efi_set_timer(struct efi_event *event, enum efi_timer_delay type, uint64_t trigger_time); diff --git a/include/net-common.h b/include/net-common.h index 29d31f37263..1d507b13b06 100644 --- a/include/net-common.h +++ b/include/net-common.h @@ -291,6 +291,7 @@ struct eth_ops { #define eth_get_ops(dev) ((struct eth_ops *)(dev)->driver->ops) struct udevice *eth_get_dev(void); /* get the current device */ +void eth_set_dev(struct udevice *dev); /* set a device */ unsigned char *eth_get_ethaddr(void); /* get the current device MAC */ int eth_rx(void); /* Check for received packets */ void eth_halt(void); /* stop SCC */ diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 5164cb15986..02ad9f7141f 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -60,9 +60,9 @@ static efi_handle_t current_image; static volatile gd_t *efi_gd, *app_gd; #endif -static efi_status_t efi_uninstall_protocol - (efi_handle_t handle, const efi_guid_t *protocol, - void *protocol_interface, bool preserve); +efi_status_t efi_uninstall_protocol + (efi_handle_t handle, const efi_guid_t *protocol, + void *protocol_interface, bool preserve); /* 1 if inside U-Boot code, 0 if inside EFI payload code */ static int entry_count = 1; @@ -100,12 +100,11 @@ const efi_guid_t efi_guid_load_file2_protocol = EFI_LOAD_FILE2_PROTOCOL_GUID; /* GUID of the SMBIOS table */ const efi_guid_t smbios_guid = SMBIOS_TABLE_GUID; -static efi_status_t EFIAPI efi_disconnect_controller( +efi_status_t EFIAPI efi_disconnect_controller( efi_handle_t controller_handle, efi_handle_t driver_image_handle, efi_handle_t child_handle); -static efi_status_t EFIAPI efi_connect_controller(efi_handle_t controller_handle, efi_handle_t *driver_image_handle, struct efi_device_path *remain_device_path, @@ -1039,7 +1038,7 @@ static efi_status_t EFIAPI efi_signal_event_ext(struct efi_event *event) * * Return: status code */ -static efi_status_t EFIAPI efi_close_event(struct efi_event *event) +efi_status_t EFIAPI efi_close_event(struct efi_event *event) { struct efi_register_notify_event *item, *next; @@ -1380,9 +1379,9 @@ static efi_status_t efi_disconnect_all_drivers * * Return: status code */ -static efi_status_t efi_uninstall_protocol - (efi_handle_t handle, const efi_guid_t *protocol, - void *protocol_interface, bool preserve) +efi_status_t efi_uninstall_protocol + (efi_handle_t handle, const efi_guid_t *protocol, + void *protocol_interface, bool preserve) { struct efi_handler *handler; struct efi_open_protocol_info_item *item; @@ -3665,7 +3664,7 @@ static efi_status_t efi_connect_single_controller( * * Return: status code */ -static efi_status_t EFIAPI efi_connect_controller( +efi_status_t EFIAPI efi_connect_controller( efi_handle_t controller_handle, efi_handle_t *driver_image_handle, struct efi_device_path *remain_device_path, @@ -3844,7 +3843,7 @@ static efi_status_t efi_get_child_controllers( * * Return: status code */ -static efi_status_t EFIAPI efi_disconnect_controller( +efi_status_t EFIAPI efi_disconnect_controller( efi_handle_t controller_handle, efi_handle_t driver_image_handle, efi_handle_t child_handle) diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index 60aa076feaa..afca2000e6f 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -24,7 +24,7 @@ #include #include -static const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_PROTOCOL_GUID; +const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_PROTOCOL_GUID; static const efi_guid_t efi_pxe_base_code_protocol_guid = EFI_PXE_BASE_CODE_PROTOCOL_GUID; static struct efi_pxe_packet *dhcp_ack; diff --git a/lib/efi_selftest/efi_selftest_snp.c b/lib/efi_selftest/efi_selftest_snp.c index 15af8d3e18c..b00c76c2f17 100644 --- a/lib/efi_selftest/efi_selftest_snp.c +++ b/lib/efi_selftest/efi_selftest_snp.c @@ -67,7 +67,6 @@ struct dhcp { static struct efi_boot_services *boottime; static struct efi_simple_network *net; static struct efi_event *timer; -static const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_PROTOCOL_GUID; /* IP packet ID */ static unsigned int net_ip_id; -- cgit v1.3.1 From 6a832d4b2e5d4d1ebc9d036afcc02d9550257ab2 Mon Sep 17 00:00:00 2001 From: Adriano Cordova Date: Mon, 3 Mar 2025 11:13:13 -0300 Subject: efi_loader: efi_net: Add efi_net_do_start() to efi_net.c This gets called each time a payload is to get executed by bootefi. For now this only updates the PXE IP address. Signed-off-by: Adriano Cordova --- include/efi_loader.h | 1 + lib/efi_loader/efi_net.c | 31 ++++++++++++++++++++++++------- lib/efi_loader/efi_setup.c | 3 +++ 3 files changed, 28 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/efi_loader.h b/include/efi_loader.h index 6a17a41dbad..c2fb3e66eb9 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -650,6 +650,7 @@ int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc, efi_status_t efi_gop_register(void); /* Called by bootefi to make the network interface available */ efi_status_t efi_net_register(void); +efi_status_t efi_net_do_start(void); /* Called by efi_net_register to make the ip4 config2 protocol available */ efi_status_t efi_ipconfig_register(const efi_handle_t handle, struct efi_ip4_config2_protocol *ip4config); diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index afca2000e6f..27fc4014112 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -878,6 +878,30 @@ static efi_status_t EFIAPI efi_pxe_base_code_set_packets( return EFI_UNSUPPORTED; } +/** + * efi_net_do_start() - start the efi network stack + * + * This gets called from do_bootefi_exec() each time a payload gets executed. + * + * Return: status code + */ +efi_status_t efi_net_do_start(void) +{ + efi_status_t r = EFI_SUCCESS; + +#ifdef CONFIG_EFI_HTTP_PROTOCOL + /* + * No harm on doing the following. If the PXE handle is present, the client could + * find it and try to get its IP address from it. In here the PXE handle is present + * but the PXE protocol is not yet implmenented, so we add this in the meantime. + */ + efi_net_get_addr((struct efi_ipv4_address *)&netobj->pxe_mode.station_ip, + (struct efi_ipv4_address *)&netobj->pxe_mode.subnet_mask, NULL); +#endif + + return r; +} + /** * efi_net_register() - register the simple network protocol * @@ -1022,13 +1046,6 @@ efi_status_t efi_net_register(void) r = efi_http_register(&netobj->header, &netobj->http_service_binding); if (r != EFI_SUCCESS) goto failure_to_add_protocol; - /* - * No harm on doing the following. If the PXE handle is present, the client could - * find it and try to get its IP address from it. In here the PXE handle is present - * but the PXE protocol is not yet implmenented, so we add this in the meantime. - */ - efi_net_get_addr((struct efi_ipv4_address *)&netobj->pxe_mode.station_ip, - (struct efi_ipv4_address *)&netobj->pxe_mode.subnet_mask, NULL); #endif return EFI_SUCCESS; diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c index 164586742ae..eeed82c0736 100644 --- a/lib/efi_loader/efi_setup.c +++ b/lib/efi_loader/efi_setup.c @@ -218,6 +218,9 @@ static efi_status_t efi_start_obj_list(void) { efi_status_t ret = EFI_SUCCESS; + if (IS_ENABLED(CONFIG_NETDEVICES)) + ret = efi_net_do_start(); + return ret; } -- cgit v1.3.1 From 267b0a7ddf89d414000d98345aa3222c7e01ff38 Mon Sep 17 00:00:00 2001 From: Adriano Cordova Date: Mon, 3 Mar 2025 11:13:14 -0300 Subject: efi_loader: efi_device_path: Pass net udevice as argument In preparation to support multiple EFI net objects, support constructing device paths using an ethernet device different than the default. Add a udevice argument to the device path generation, and keep the callsites with eth_get_dev() to preserve existing functionality. Signed-off-by: Adriano Cordova --- include/efi_loader.h | 4 +-- lib/efi_loader/efi_device_path.c | 20 ++++++++------ lib/efi_loader/efi_net.c | 60 ++++++---------------------------------- 3 files changed, 23 insertions(+), 61 deletions(-) (limited to 'include') diff --git a/include/efi_loader.h b/include/efi_loader.h index c2fb3e66eb9..47c043460eb 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -925,8 +925,8 @@ struct efi_device_path *efi_dp_from_part(struct blk_desc *desc, int part); struct efi_device_path *efi_dp_part_node(struct blk_desc *desc, int part); struct efi_device_path *efi_dp_from_file(const struct efi_device_path *dp, const char *path); -struct efi_device_path *efi_dp_from_eth(void); -struct efi_device_path *efi_dp_from_http(const char *server); +struct efi_device_path *efi_dp_from_eth(struct udevice *dev); +struct efi_device_path *efi_dp_from_http(const char *server, struct udevice *dev); struct efi_device_path *efi_dp_from_mem(uint32_t mem_type, uint64_t start_address, size_t size); diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c index c0633a736b6..64183d40340 100644 --- a/lib/efi_loader/efi_device_path.c +++ b/lib/efi_loader/efi_device_path.c @@ -954,20 +954,20 @@ struct efi_device_path *efi_dp_from_uart(void) return buf; } -struct efi_device_path __maybe_unused *efi_dp_from_eth(void) +struct efi_device_path __maybe_unused *efi_dp_from_eth(struct udevice *dev) { void *buf, *start; unsigned dpsize = 0; - assert(eth_get_dev()); + assert(dev); - dpsize += dp_size(eth_get_dev()); + dpsize += dp_size(dev); start = buf = efi_alloc(dpsize + sizeof(END)); if (!buf) return NULL; - buf = dp_fill(buf, eth_get_dev()); + buf = dp_fill(buf, dev); *((struct efi_device_path *)buf) = END; @@ -984,11 +984,13 @@ struct efi_device_path __maybe_unused *efi_dp_from_eth(void) * @ip: IPv4 local address * @mask: network mask * @srv: IPv4 remote/server address + * @dev: net udevice * Return: pointer to device path, NULL on error */ static struct efi_device_path *efi_dp_from_ipv4(struct efi_ipv4_address *ip, struct efi_ipv4_address *mask, - struct efi_ipv4_address *srv) + struct efi_ipv4_address *srv, + struct udevice *dev) { struct efi_device_path *dp1, *dp2, *pos; struct { @@ -1010,7 +1012,7 @@ static struct efi_device_path *efi_dp_from_ipv4(struct efi_ipv4_address *ip, pos = &dp.end; memcpy(pos, &END, sizeof(END)); - dp1 = efi_dp_from_eth(); + dp1 = efi_dp_from_eth(dev); if (!dp1) return NULL; @@ -1029,9 +1031,10 @@ static struct efi_device_path *efi_dp_from_ipv4(struct efi_ipv4_address *ip, * and an END node. * * @server: URI of remote server + * @dev: net udevice * Return: pointer to HTTP device path, NULL on error */ -struct efi_device_path *efi_dp_from_http(const char *server) +struct efi_device_path *efi_dp_from_http(const char *server, struct udevice *dev) { struct efi_device_path *dp1, *dp2; struct efi_device_path_uri *uridp; @@ -1047,10 +1050,11 @@ struct efi_device_path *efi_dp_from_http(const char *server) efi_net_get_addr(&ip, &mask, NULL); - dp1 = efi_dp_from_ipv4(&ip, &mask, NULL); + dp1 = efi_dp_from_ipv4(&ip, &mask, NULL, dev); if (!dp1) return NULL; + strcpy(tmp, "http://"); if (server) { diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index 27fc4014112..ebb7f4afd3c 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -952,14 +952,12 @@ efi_status_t efi_net_register(void) if (r != EFI_SUCCESS) goto failure_to_add_protocol; - if (net_dp) - r = efi_add_protocol(&netobj->header, &efi_guid_device_path, - net_dp); - else - r = efi_net_set_dp("Net", NULL); + if (!net_dp) + efi_net_set_dp("Net", NULL); + r = efi_add_protocol(&netobj->header, &efi_guid_device_path, + net_dp); if (r != EFI_SUCCESS) goto failure_to_add_protocol; - r = efi_add_protocol(&netobj->header, &efi_pxe_base_code_protocol_guid, &netobj->pxe); if (r != EFI_SUCCESS) @@ -1077,58 +1075,18 @@ out_of_resources: */ efi_status_t efi_net_set_dp(const char *dev, const char *server) { - efi_status_t ret = EFI_SUCCESS; - struct efi_handler *phandler; - struct efi_device_path *old_net_dp, *new_net_dp; + efi_free_pool(net_dp); - old_net_dp = net_dp; - new_net_dp = NULL; + net_dp = NULL; if (!strcmp(dev, "Net")) - new_net_dp = efi_dp_from_eth(); + net_dp = efi_dp_from_eth(eth_get_dev()); else if (!strcmp(dev, "Http")) - new_net_dp = efi_dp_from_http(server); + net_dp = efi_dp_from_http(server, eth_get_dev()); - if (!new_net_dp) { + if (!net_dp) return EFI_OUT_OF_RESOURCES; - } - - // If netobj is not started yet, end here. - if (!netobj) { - goto exit; - } - - phandler = NULL; - efi_search_protocol(&netobj->header, &efi_guid_device_path, &phandler); - - // If the device path protocol is not yet installed, install it - if (!phandler) - goto add; - - // If it is already installed, try to update it - ret = efi_reinstall_protocol_interface(&netobj->header, &efi_guid_device_path, - old_net_dp, new_net_dp); - if (ret != EFI_SUCCESS) - goto error; - - net_dp = new_net_dp; - efi_free_pool(old_net_dp); return EFI_SUCCESS; -add: - ret = efi_add_protocol(&netobj->header, &efi_guid_device_path, - new_net_dp); - if (ret != EFI_SUCCESS) - goto error; -exit: - net_dp = new_net_dp; - efi_free_pool(old_net_dp); - - return ret; -error: - // Failed, restore - efi_free_pool(new_net_dp); - - return ret; } /** -- cgit v1.3.1 From dd5d82a599953945e881fdd1f9dd8227c1232ae7 Mon Sep 17 00:00:00 2001 From: Adriano Cordova Date: Mon, 3 Mar 2025 11:13:15 -0300 Subject: efi_loader: efi_net: Add device path cache In preparation to support mutiple efi net udevices. Add a device path cache to support device paths from multiple ethernet udevices. The device paths can be added to the cache before EFI gets initialized and the protocols get installed. Signed-off-by: Adriano Cordova --- include/efi_loader.h | 23 ++-- lib/efi_loader/efi_bootbin.c | 3 +- lib/efi_loader/efi_device_path.c | 6 +- lib/efi_loader/efi_http.c | 2 +- lib/efi_loader/efi_ipconfig.c | 4 +- lib/efi_loader/efi_net.c | 268 +++++++++++++++++++++++++++++++++------ lib/efi_loader/efi_setup.c | 5 +- 7 files changed, 252 insertions(+), 59 deletions(-) (limited to 'include') diff --git a/include/efi_loader.h b/include/efi_loader.h index 47c043460eb..d387e583f20 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -129,15 +129,17 @@ static inline void efi_set_bootdev(const char *dev, const char *devnr, #if CONFIG_IS_ENABLED(NETDEVICES) && CONFIG_IS_ENABLED(EFI_LOADER) /* Call this to update the current device path of the efi net device */ -efi_status_t efi_net_set_dp(const char *dev, const char *server); +efi_status_t efi_net_new_dp(const char *dev, const char *server, struct udevice *udev); /* Call this to get the current device path of the efi net device */ -void efi_net_get_dp(struct efi_device_path **dp); +void efi_net_dp_from_dev(struct efi_device_path **dp, struct udevice *udev, bool cache_only); void efi_net_get_addr(struct efi_ipv4_address *ip, struct efi_ipv4_address *mask, - struct efi_ipv4_address *gw); + struct efi_ipv4_address *gw, + struct udevice *dev); void efi_net_set_addr(struct efi_ipv4_address *ip, struct efi_ipv4_address *mask, - struct efi_ipv4_address *gw); + struct efi_ipv4_address *gw, + struct udevice *dev); efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buffer, u32 *status_code, ulong *file_size, char *headers_buffer); #define MAX_HTTP_HEADERS_SIZE SZ_64K @@ -151,13 +153,16 @@ struct http_header { void efi_net_parse_headers(ulong *num_headers, struct http_header *headers); #else -static inline void efi_net_get_dp(struct efi_device_path **dp) { } +static inline void efi_net_dp_from_dev(struct efi_device_path **dp, + struct udevice *udev, bool cache_only) { } static inline void efi_net_get_addr(struct efi_ipv4_address *ip, struct efi_ipv4_address *mask, - struct efi_ipv4_address *gw) { } + struct efi_ipv4_address *gw, + struct udevice *dev) { } static inline void efi_net_set_addr(struct efi_ipv4_address *ip, struct efi_ipv4_address *mask, - struct efi_ipv4_address *gw) { } + struct efi_ipv4_address *gw, + struct udevice *dev) { } #endif /* Maximum number of configuration tables */ @@ -649,8 +654,8 @@ int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc, /* Called by bootefi to make GOP (graphical) interface available */ efi_status_t efi_gop_register(void); /* Called by bootefi to make the network interface available */ -efi_status_t efi_net_register(void); -efi_status_t efi_net_do_start(void); +efi_status_t efi_net_register(struct udevice *dev); +efi_status_t efi_net_do_start(struct udevice *dev); /* Called by efi_net_register to make the ip4 config2 protocol available */ efi_status_t efi_ipconfig_register(const efi_handle_t handle, struct efi_ip4_config2_protocol *ip4config); diff --git a/lib/efi_loader/efi_bootbin.c b/lib/efi_loader/efi_bootbin.c index 10ec5e9ada3..deafb2ce1c2 100644 --- a/lib/efi_loader/efi_bootbin.c +++ b/lib/efi_loader/efi_bootbin.c @@ -16,6 +16,7 @@ #include #include #include +#include static struct efi_device_path *bootefi_image_path; static struct efi_device_path *bootefi_device_path; @@ -67,7 +68,7 @@ static efi_status_t calculate_paths(const char *dev, const char *devnr, #if IS_ENABLED(CONFIG_NETDEVICES) if (!strcmp(dev, "Net") || !strcmp(dev, "Http")) { - ret = efi_net_set_dp(dev, devnr); + ret = efi_net_new_dp(dev, devnr, eth_get_dev()); if (ret != EFI_SUCCESS) return ret; } diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c index 64183d40340..c9bf2726fe2 100644 --- a/lib/efi_loader/efi_device_path.c +++ b/lib/efi_loader/efi_device_path.c @@ -1048,7 +1048,7 @@ struct efi_device_path *efi_dp_from_http(const char *server, struct udevice *dev (!server && IS_ENABLED(CONFIG_NET_LWIP))) return NULL; - efi_net_get_addr(&ip, &mask, NULL); + efi_net_get_addr(&ip, &mask, NULL, dev); dp1 = efi_dp_from_ipv4(&ip, &mask, NULL, dev); if (!dp1) @@ -1189,8 +1189,8 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr, dp = efi_dp_from_mem(EFI_RESERVED_MEMORY_TYPE, (uintptr_t)image_addr, image_size); } else if (IS_ENABLED(CONFIG_NETDEVICES) && - (!strcmp(dev, "Net") || !strcmp(dev, "Http"))) { - efi_net_get_dp(&dp); + (!strcmp(dev, "Net") || !strcmp(dev, "Http"))) { + efi_net_dp_from_dev(&dp, eth_get_dev(), false); } else if (!strcmp(dev, "Uart")) { dp = efi_dp_from_uart(); } else { diff --git a/lib/efi_loader/efi_http.c b/lib/efi_loader/efi_http.c index 88816256b03..60309ee3112 100644 --- a/lib/efi_loader/efi_http.c +++ b/lib/efi_loader/efi_http.c @@ -188,7 +188,7 @@ static efi_status_t EFIAPI efi_http_configure(struct efi_http_protocol *this, if (!ipv4_node->use_default_address) { efi_net_set_addr((struct efi_ipv4_address *)&ipv4_node->local_address, - (struct efi_ipv4_address *)&ipv4_node->local_subnet, NULL); + (struct efi_ipv4_address *)&ipv4_node->local_subnet, NULL, NULL); } http_instance->current_offset = 0; diff --git a/lib/efi_loader/efi_ipconfig.c b/lib/efi_loader/efi_ipconfig.c index f1c092daafd..9f51f77fa9a 100644 --- a/lib/efi_loader/efi_ipconfig.c +++ b/lib/efi_loader/efi_ipconfig.c @@ -60,7 +60,7 @@ static efi_status_t EFIAPI efi_ip4_config2_set_data(struct efi_ip4_config2_proto memcpy((void *)¤t_http_ip, data, sizeof(struct efi_ip4_config2_manual_address)); efi_net_set_addr(¤t_http_ip.address, - ¤t_http_ip.subnet_mask, NULL); + ¤t_http_ip.subnet_mask, NULL, NULL); return EFI_EXIT(EFI_SUCCESS); } return EFI_EXIT(EFI_BAD_BUFFER_SIZE); @@ -133,7 +133,7 @@ static efi_status_t EFIAPI efi_ip4_config2_get_data(struct efi_ip4_config2_proto return EFI_EXIT(EFI_BUFFER_TOO_SMALL); } - efi_net_get_addr(¤t_http_ip.address, ¤t_http_ip.subnet_mask, NULL); + efi_net_get_addr(¤t_http_ip.address, ¤t_http_ip.subnet_mask, NULL, NULL); memcpy(data, (void *)¤t_http_ip, sizeof(struct efi_ip4_config2_manual_address)); diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index ebb7f4afd3c..f65287ad6ab 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -24,6 +24,8 @@ #include #include +#define MAX_NUM_DP_ENTRIES 10 + const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_PROTOCOL_GUID; static const efi_guid_t efi_pxe_base_code_protocol_guid = EFI_PXE_BASE_CODE_PROTOCOL_GUID; @@ -36,18 +38,28 @@ static int rx_packet_idx; static int rx_packet_num; static struct efi_net_obj *netobj; +struct dp_entry { + struct efi_device_path *net_dp; + struct udevice *dev; + bool is_valid; +}; + /* - * The current network device path. This device path is updated when a new - * bootfile is downloaded from the network. If then the bootfile is loaded - * as an efi image, net_dp is passed as the device path of the loaded image. + * The network device path cache. An entry is added when a new bootfile + * is downloaded from the network. If the bootfile is then loaded as an + * efi image, the most recent entry corresponding to the device is passed + * as the device path of the loaded image. */ -static struct efi_device_path *net_dp; +static struct dp_entry dp_cache[MAX_NUM_DP_ENTRIES]; +static int next_dp_entry; +#if IS_ENABLED(CONFIG_EFI_HTTP_PROTOCOL) static struct wget_http_info efi_wget_info = { .set_bootdev = false, .check_buffer_size = true, }; +#endif /* * The notification function of this event is called in every timer cycle @@ -63,6 +75,7 @@ static struct efi_event *wait_for_packet; * struct efi_net_obj - EFI object representing a network interface * * @header: EFI object header + * @dev: net udevice * @net: simple network protocol interface * @net_mode: status of the network interface * @pxe: PXE base code protocol interface @@ -72,6 +85,7 @@ static struct efi_event *wait_for_packet; */ struct efi_net_obj { struct efi_object header; + struct udevice *dev; struct efi_simple_network net; struct efi_simple_network_mode net_mode; struct efi_pxe_base_code_protocol pxe; @@ -84,6 +98,21 @@ struct efi_net_obj { #endif }; +/* + * efi_netobj_is_active() - checks if a netobj is active in the efi subsystem + * + * @netobj: pointer to efi_net_obj + * Return: true if active + */ +static bool efi_netobj_is_active(struct efi_net_obj *netobj) +{ + if (!netobj || !efi_search_obj(&netobj->header)) + return false; + + return true; +} + + /* * efi_net_start() - start the network interface * @@ -99,7 +128,6 @@ static efi_status_t EFIAPI efi_net_start(struct efi_simple_network *this) efi_status_t ret = EFI_SUCCESS; EFI_ENTRY("%p", this); - /* Check parameters */ if (!this) { ret = EFI_INVALID_PARAMETER; @@ -143,6 +171,8 @@ static efi_status_t EFIAPI efi_net_stop(struct efi_simple_network *this) ret = EFI_NOT_STARTED; } else { /* Disable hardware and put it into the reset state */ + eth_set_dev(netobj->dev); + env_set("ethact", eth_get_name()); eth_halt(); /* Clear cache of packets */ rx_packet_num = 0; @@ -189,14 +219,13 @@ static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this, /* Setup packet buffers */ net_init(); - /* Disable hardware and put it into the reset state */ - eth_halt(); /* Clear cache of packets */ rx_packet_num = 0; - /* Set current device according to environment variables */ - eth_set_current(); + /* Set the net device corresponding to the efi net object */ + eth_set_dev(netobj->dev); + env_set("ethact", eth_get_name()); /* Get hardware ready for send and receive operations */ - ret = eth_init(); + ret = eth_start_udev(netobj->dev); if (ret < 0) { eth_halt(); this->mode->state = EFI_NETWORK_STOPPED; @@ -285,6 +314,8 @@ static efi_status_t EFIAPI efi_net_shutdown(struct efi_simple_network *this) goto out; } + eth_set_dev(netobj->dev); + env_set("ethact", eth_get_name()); eth_halt(); this->int_status = 0; wait_for_packet->is_signaled = false; @@ -576,6 +607,9 @@ static efi_status_t EFIAPI efi_net_transmit break; } + eth_set_dev(netobj->dev); + env_set("ethact", eth_get_name()); + /* Ethernet packets always fit, just bounce */ memcpy(transmit_buffer, buffer, buffer_size); net_send_packet(transmit_buffer, buffer_size); @@ -753,6 +787,8 @@ static void EFIAPI efi_network_timer_notify(struct efi_event *event, goto out; if (!rx_packet_num) { + eth_set_dev(netobj->dev); + env_set("ethact", eth_get_name()); push_packet = efi_net_push; eth_rx(); push_packet = NULL; @@ -878,17 +914,106 @@ static efi_status_t EFIAPI efi_pxe_base_code_set_packets( return EFI_UNSUPPORTED; } +/** + * efi_netobj_set_dp() - set device path of a netobj + * + * @netobj: pointer to efi_net_obj + * @dp: device path to set, allocated by caller + * Return: status code + */ +efi_status_t efi_netobj_set_dp(struct efi_net_obj *netobj, struct efi_device_path *dp) +{ + efi_status_t ret; + struct efi_handler *phandler; + struct efi_device_path *new_net_dp; + + if (!efi_netobj_is_active(netobj)) + return EFI_SUCCESS; + + // Create a device path for the netobj + new_net_dp = dp; + if (!new_net_dp) + return EFI_OUT_OF_RESOURCES; + + phandler = NULL; + efi_search_protocol(&netobj->header, &efi_guid_device_path, &phandler); + + // If the device path protocol is not yet installed, install it + if (!phandler) + goto add; + + // If it is already installed, try to update it + ret = efi_reinstall_protocol_interface(&netobj->header, &efi_guid_device_path, + phandler->protocol_interface, new_net_dp); + if (ret != EFI_SUCCESS) + return ret; + + return EFI_SUCCESS; +add: + ret = efi_add_protocol(&netobj->header, &efi_guid_device_path, + new_net_dp); + if (ret != EFI_SUCCESS) + return ret; + + return EFI_SUCCESS; +} + +/** + * efi_netobj_get_dp() - get device path of a netobj + * + * @netobj: pointer to efi_net_obj + * Return: device path, NULL on error + */ +static struct efi_device_path *efi_netobj_get_dp(struct efi_net_obj *netobj) +{ + struct efi_handler *phandler; + + if (!efi_netobj_is_active(netobj)) + return NULL; + + phandler = NULL; + efi_search_protocol(&netobj->header, &efi_guid_device_path, &phandler); + + if (phandler && phandler->protocol_interface) + return efi_dp_dup(phandler->protocol_interface); + + return NULL; +} + /** * efi_net_do_start() - start the efi network stack * * This gets called from do_bootefi_exec() each time a payload gets executed. * + * @dev: net udevice * Return: status code */ -efi_status_t efi_net_do_start(void) +efi_status_t efi_net_do_start(struct udevice *dev) { efi_status_t r = EFI_SUCCESS; + struct efi_device_path *net_dp; + + if (dev != netobj->dev ) + return r; + + efi_net_dp_from_dev(&net_dp, netobj->dev, true); + // If no dp cache entry applies and there already + // is a device path installed, continue + if (!net_dp) { + if (efi_netobj_get_dp(netobj)) + goto set_addr; + else + net_dp = efi_dp_from_eth(netobj->dev); + + } + + if (!net_dp) + return EFI_OUT_OF_RESOURCES; + r = efi_netobj_set_dp(netobj, net_dp); + if (r != EFI_SUCCESS) + return r; +set_addr: #ifdef CONFIG_EFI_HTTP_PROTOCOL /* * No harm on doing the following. If the PXE handle is present, the client could @@ -896,7 +1021,7 @@ efi_status_t efi_net_do_start(void) * but the PXE protocol is not yet implmenented, so we add this in the meantime. */ efi_net_get_addr((struct efi_ipv4_address *)&netobj->pxe_mode.station_ip, - (struct efi_ipv4_address *)&netobj->pxe_mode.subnet_mask, NULL); + (struct efi_ipv4_address *)&netobj->pxe_mode.subnet_mask, NULL, dev); #endif return r; @@ -906,13 +1031,14 @@ efi_status_t efi_net_do_start(void) * efi_net_register() - register the simple network protocol * * This gets called from do_bootefi_exec(). + * @dev: net udevice */ -efi_status_t efi_net_register(void) +efi_status_t efi_net_register(struct udevice *dev) { efi_status_t r; int i; - if (!eth_get_dev()) { + if (!dev) { /* No network device active, don't expose any */ return EFI_SUCCESS; } @@ -922,6 +1048,8 @@ efi_status_t efi_net_register(void) if (!netobj) goto out_of_resources; + netobj->dev = dev; + /* Allocate an aligned transmit buffer */ transmit_buffer = calloc(1, PKTSIZE_ALIGN + PKTALIGN); if (!transmit_buffer) @@ -938,6 +1066,7 @@ efi_status_t efi_net_register(void) if (!receive_buffer[i]) goto out_of_resources; } + receive_lengths = calloc(ETH_PACKETS_BATCH_RECV, sizeof(*receive_lengths)); if (!receive_lengths) @@ -952,12 +1081,6 @@ efi_status_t efi_net_register(void) if (r != EFI_SUCCESS) goto failure_to_add_protocol; - if (!net_dp) - efi_net_set_dp("Net", NULL); - r = efi_add_protocol(&netobj->header, &efi_guid_device_path, - net_dp); - if (r != EFI_SUCCESS) - goto failure_to_add_protocol; r = efi_add_protocol(&netobj->header, &efi_pxe_base_code_protocol_guid, &netobj->pxe); if (r != EFI_SUCCESS) @@ -978,7 +1101,9 @@ efi_status_t efi_net_register(void) netobj->net.receive = efi_net_receive; netobj->net.mode = &netobj->net_mode; netobj->net_mode.state = EFI_NETWORK_STOPPED; - memcpy(netobj->net_mode.current_address.mac_addr, eth_get_ethaddr(), 6); + if (dev_get_plat(dev)) + memcpy(netobj->net_mode.current_address.mac_addr, + ((struct eth_pdata *)dev_get_plat(dev))->enetaddr, 6); netobj->net_mode.hwaddr_size = ARP_HLEN; netobj->net_mode.media_header_size = ETHER_HDR_SIZE; netobj->net_mode.max_packet_size = PKTSIZE; @@ -1012,6 +1137,7 @@ efi_status_t efi_net_register(void) return r; } netobj->net.wait_for_packet = wait_for_packet; + /* * Create a timer event. * @@ -1045,7 +1171,6 @@ efi_status_t efi_net_register(void) if (r != EFI_SUCCESS) goto failure_to_add_protocol; #endif - return EFI_SUCCESS; failure_to_add_protocol: printf("ERROR: Failure to add protocol\n"); @@ -1064,46 +1189,91 @@ out_of_resources: } /** - * efi_net_set_dp() - set device path of efi net device + * efi_net_new_dp() - update device path associated to a net udevice * * This gets called to update the device path when a new boot * file is downloaded * * @dev: dev to set the device path from * @server: remote server address + * @udev: net udevice * Return: status code */ -efi_status_t efi_net_set_dp(const char *dev, const char *server) +efi_status_t efi_net_new_dp(const char *dev, const char *server, struct udevice *udev) { - efi_free_pool(net_dp); + efi_status_t ret; + struct efi_device_path *old_net_dp, *new_net_dp; + struct efi_device_path **dp; - net_dp = NULL; + dp = &dp_cache[next_dp_entry].net_dp; + + dp_cache[next_dp_entry].dev = udev; + dp_cache[next_dp_entry].is_valid = true; + next_dp_entry++; + next_dp_entry %= MAX_NUM_DP_ENTRIES; + + old_net_dp = *dp; + new_net_dp = NULL; if (!strcmp(dev, "Net")) - net_dp = efi_dp_from_eth(eth_get_dev()); + new_net_dp = efi_dp_from_eth(udev); else if (!strcmp(dev, "Http")) - net_dp = efi_dp_from_http(server, eth_get_dev()); + new_net_dp = efi_dp_from_http(server, udev); + if (!new_net_dp) + return EFI_OUT_OF_RESOURCES; - if (!net_dp) + *dp = new_net_dp; + // Free the old cache entry + efi_free_pool(old_net_dp); + + if (!netobj || netobj->dev != udev) + return EFI_SUCCESS; + + new_net_dp = efi_dp_dup(*dp); + if (!new_net_dp) return EFI_OUT_OF_RESOURCES; + ret = efi_netobj_set_dp(netobj, new_net_dp); + if (ret != EFI_SUCCESS) + efi_free_pool(new_net_dp); - return EFI_SUCCESS; + return ret; } /** - * efi_net_get_dp() - get device path of efi net device + * efi_net_dp_from_dev() - get device path associated to a net udevice * * Produce a copy of the current device path * - * @dp: copy of the current device path, or NULL on error + * @dp: copy of the current device path + * @udev: net udevice + * @cache_only: get device path from cache only */ -void efi_net_get_dp(struct efi_device_path **dp) +void efi_net_dp_from_dev(struct efi_device_path **dp, struct udevice *udev, bool cache_only) { + int i, j; + if (!dp) return; - if (!net_dp) - efi_net_set_dp("Net", NULL); - if (net_dp) - *dp = efi_dp_dup(net_dp); + + *dp = NULL; + + if (cache_only) + goto cache; + + if (netobj && netobj->dev == udev) { + *dp = efi_netobj_get_dp(netobj); + if (*dp) + return; + } +cache: + // Search in the cache + i = (next_dp_entry + MAX_NUM_DP_ENTRIES - 1) % MAX_NUM_DP_ENTRIES; + for (j = 0; dp_cache[i].is_valid && j < MAX_NUM_DP_ENTRIES; + i = (i + MAX_NUM_DP_ENTRIES - 1) % MAX_NUM_DP_ENTRIES, j++) { + if (dp_cache[i].dev == udev) { + *dp = efi_dp_dup(dp_cache[i].net_dp); + return; + } + } } /** @@ -1119,11 +1289,15 @@ void efi_net_get_dp(struct efi_device_path **dp) * be filled with the current network mask * @gw: pointer to an efi_ipv4_address struct to be * filled with the current network gateway + * @dev: udevice */ void efi_net_get_addr(struct efi_ipv4_address *ip, struct efi_ipv4_address *mask, - struct efi_ipv4_address *gw) + struct efi_ipv4_address *gw, + struct udevice *dev) { + if (!dev) + dev = eth_get_dev(); #ifdef CONFIG_NET_LWIP char ipstr[] = "ipaddr\0\0"; char maskstr[] = "netmask\0\0"; @@ -1132,7 +1306,7 @@ void efi_net_get_addr(struct efi_ipv4_address *ip, struct in_addr tmp; char *env; - idx = dev_seq(eth_get_dev()); + idx = dev_seq(dev); if (idx < 0 || idx > 99) { log_err("unexpected idx %d\n", idx); @@ -1179,11 +1353,15 @@ void efi_net_get_addr(struct efi_ipv4_address *ip, * @ip: pointer to new IP address * @mask: pointer to new network mask to set * @gw: pointer to new network gateway + * @dev: udevice */ void efi_net_set_addr(struct efi_ipv4_address *ip, struct efi_ipv4_address *mask, - struct efi_ipv4_address *gw) + struct efi_ipv4_address *gw, + struct udevice *dev) { + if (!dev) + dev = eth_get_dev(); #ifdef CONFIG_NET_LWIP char ipstr[] = "ipaddr\0\0"; char maskstr[] = "netmask\0\0"; @@ -1192,7 +1370,7 @@ void efi_net_set_addr(struct efi_ipv4_address *ip, struct in_addr *addr; char tmp[46]; - idx = dev_seq(eth_get_dev()); + idx = dev_seq(dev); if (idx < 0 || idx > 99) { log_err("unexpected idx %d\n", idx); @@ -1230,6 +1408,7 @@ void efi_net_set_addr(struct efi_ipv4_address *ip, #endif } +#if IS_ENABLED(CONFIG_EFI_HTTP_PROTOCOL) /** * efi_net_set_buffer() - allocate a buffer of min 64K * @@ -1337,6 +1516,8 @@ efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buf ret = efi_net_set_buffer(buffer, last_head ? (size_t)efi_wget_info.hdr_cont_len : 0); if (ret != EFI_SUCCESS) goto out; + eth_set_dev(netobj->dev); + env_set("ethact", eth_get_name()); wget_ret = wget_request((ulong)*buffer, url, &efi_wget_info); if ((ulong)efi_wget_info.hdr_cont_len > efi_wget_info.buffer_size) { // Try again with updated buffer size @@ -1344,6 +1525,8 @@ efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buf ret = efi_net_set_buffer(buffer, (size_t)efi_wget_info.hdr_cont_len); if (ret != EFI_SUCCESS) goto out; + eth_set_dev(netobj->dev); + env_set("ethact", eth_get_name()); if (wget_request((ulong)*buffer, url, &efi_wget_info)) { efi_free_pool(*buffer); ret = EFI_DEVICE_ERROR; @@ -1363,6 +1546,8 @@ efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buf ret = efi_net_set_buffer(buffer, 0); if (ret != EFI_SUCCESS) goto out; + eth_set_dev(netobj->dev); + env_set("ethact", eth_get_name()); wget_request((ulong)*buffer, url, &efi_wget_info); *file_size = 0; *status_code = efi_wget_info.status_code; @@ -1376,3 +1561,4 @@ efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buf out: return ret; } +#endif diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c index eeed82c0736..48f91da5df7 100644 --- a/lib/efi_loader/efi_setup.c +++ b/lib/efi_loader/efi_setup.c @@ -11,6 +11,7 @@ #include #include #include +#include #define OBJ_LIST_INITIALIZED 0 #define OBJ_LIST_NOT_INITIALIZED 1 @@ -219,7 +220,7 @@ static efi_status_t efi_start_obj_list(void) efi_status_t ret = EFI_SUCCESS; if (IS_ENABLED(CONFIG_NETDEVICES)) - ret = efi_net_do_start(); + ret = efi_net_do_start(eth_get_dev()); return ret; } @@ -336,7 +337,7 @@ efi_status_t efi_init_obj_list(void) goto out; } if (IS_ENABLED(CONFIG_NETDEVICES)) { - ret = efi_net_register(); + ret = efi_net_register(eth_get_dev()); if (ret != EFI_SUCCESS) goto out; } -- cgit v1.3.1 From 79aec250c2bdf6df5f2eff80b477a29750d63377 Mon Sep 17 00:00:00 2001 From: Adriano Cordova Date: Mon, 3 Mar 2025 11:13:17 -0300 Subject: efi_loader: efi_net: Add support for multiple efi_net_obj Add support for multiple efi_net_obj structs in efi_net.c. This comes in preparation for an EFI network driver supporting multiple network interfaces. For now the EFI network stack still registers a single ethernet udevice as an EFI network device even if multiple are present, namely the one that was the current device at the moment of EFI initialization. Signed-off-by: Adriano Cordova --- include/efi_loader.h | 5 +- lib/efi_loader/efi_http.c | 4 +- lib/efi_loader/efi_net.c | 264 +++++++++++++++++++++++++++++++++------------- 3 files changed, 199 insertions(+), 74 deletions(-) (limited to 'include') diff --git a/include/efi_loader.h b/include/efi_loader.h index d387e583f20..995ae3357ec 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -140,8 +140,11 @@ void efi_net_set_addr(struct efi_ipv4_address *ip, struct efi_ipv4_address *mask, struct efi_ipv4_address *gw, struct udevice *dev); +#if IS_ENABLED(CONFIG_EFI_HTTP_PROTOCOL) efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buffer, - u32 *status_code, ulong *file_size, char *headers_buffer); + u32 *status_code, ulong *file_size, char *headers_buffer, + struct efi_service_binding_protocol *parent); +#endif #define MAX_HTTP_HEADERS_SIZE SZ_64K #define MAX_HTTP_HEADERS 100 #define MAX_HTTP_HEADER_NAME 128 diff --git a/lib/efi_loader/efi_http.c b/lib/efi_loader/efi_http.c index 60309ee3112..189317fe2d2 100644 --- a/lib/efi_loader/efi_http.c +++ b/lib/efi_loader/efi_http.c @@ -36,6 +36,7 @@ static const efi_guid_t efi_http_guid = EFI_HTTP_PROTOCOL_GUID; struct efi_http_instance { struct efi_http_protocol http; efi_handle_t handle; + struct efi_service_binding_protocol *parent; bool configured; void *http_load_addr; ulong file_size; @@ -243,7 +244,7 @@ static efi_status_t EFIAPI efi_http_request(struct efi_http_protocol *this, ret = efi_net_do_request(url_8, current_method, &http_instance->http_load_addr, &http_instance->status_code, &http_instance->file_size, - http_instance->headers_buffer); + http_instance->headers_buffer, http_instance->parent); if (ret != EFI_SUCCESS) goto out; @@ -408,6 +409,7 @@ static efi_status_t EFIAPI efi_http_service_binding_create_child( goto failure_to_add_protocol; } + new_instance->parent = this; efi_add_handle(new_instance->handle); *child_handle = new_instance->handle; diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c index 2fac39ae513..b3291b4f1d5 100644 --- a/lib/efi_loader/efi_net.c +++ b/lib/efi_loader/efi_net.c @@ -24,19 +24,13 @@ #include #include +#define MAX_EFI_NET_OBJS 10 #define MAX_NUM_DHCP_ENTRIES 10 #define MAX_NUM_DP_ENTRIES 10 const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_PROTOCOL_GUID; static const efi_guid_t efi_pxe_base_code_protocol_guid = EFI_PXE_BASE_CODE_PROTOCOL_GUID; -static void *new_tx_packet; -static void *transmit_buffer; -static uchar **receive_buffer; -static size_t *receive_lengths; -static int rx_packet_idx; -static int rx_packet_num; -static struct efi_net_obj *netobj; struct dp_entry { struct efi_device_path *net_dp; @@ -70,16 +64,6 @@ struct dhcp_entry { static struct dhcp_entry dhcp_cache[MAX_NUM_DHCP_ENTRIES]; static int next_dhcp_entry; -/* - * The notification function of this event is called in every timer cycle - * to check if a new network packet has been received. - */ -static struct efi_event *network_timer_event; -/* - * This event is signaled when a packet has been received. - */ -static struct efi_event *wait_for_packet; - /** * struct efi_net_obj - EFI object representing a network interface * @@ -91,6 +75,15 @@ static struct efi_event *wait_for_packet; * @pxe_mode: status of the PXE base code protocol * @ip4_config2: IP4 Config2 protocol interface * @http_service_binding: Http service binding protocol interface + * @new_tx_packet: new transmit packet + * @transmit_buffer: transmit buffer + * @receive_buffer: array of receive buffers + * @receive_lengths: array of lengths for received packets + * @rx_packet_idx: index of the current receive packet + * @rx_packet_num: number of received packets + * @wait_for_packet: signaled when a packet has been received + * @network_timer_event: event to check for new network packets. + * @efi_seq_num: sequence number of the EFI net object. */ struct efi_net_obj { struct efi_object header; @@ -105,13 +98,25 @@ struct efi_net_obj { #if IS_ENABLED(CONFIG_EFI_HTTP_PROTOCOL) struct efi_service_binding_protocol http_service_binding; #endif + void *new_tx_packet; + void *transmit_buffer; + uchar **receive_buffer; + size_t *receive_lengths; + int rx_packet_idx; + int rx_packet_num; + struct efi_event *wait_for_packet; + struct efi_event *network_timer_event; + int efi_seq_num; }; -/* +static int curr_efi_net_obj; +static struct efi_net_obj *net_objs[MAX_EFI_NET_OBJS]; + +/** * efi_netobj_is_active() - checks if a netobj is active in the efi subsystem * - * @netobj: pointer to efi_net_obj - * Return: true if active + * @netobj: pointer to efi_net_obj + * Return: true if active */ static bool efi_netobj_is_active(struct efi_net_obj *netobj) { @@ -121,6 +126,25 @@ static bool efi_netobj_is_active(struct efi_net_obj *netobj) return true; } +/* + * efi_netobj_from_snp() - get efi_net_obj from simple network protocol + * + * + * @snp: pointer to the simple network protocol + * Return: pointer to efi_net_obj, NULL on error + */ +static struct efi_net_obj *efi_netobj_from_snp(struct efi_simple_network *snp) +{ + int i; + + for (i = 0; i < MAX_EFI_NET_OBJS; i++) { + if (net_objs[i] && &net_objs[i]->net == snp) { + // Do not register duplicate devices + return net_objs[i]; + } + } + return NULL; +} /* * efi_net_start() - start the network interface @@ -135,6 +159,7 @@ static bool efi_netobj_is_active(struct efi_net_obj *netobj) static efi_status_t EFIAPI efi_net_start(struct efi_simple_network *this) { efi_status_t ret = EFI_SUCCESS; + struct efi_net_obj *nt; EFI_ENTRY("%p", this); /* Check parameters */ @@ -143,11 +168,13 @@ static efi_status_t EFIAPI efi_net_start(struct efi_simple_network *this) goto out; } + nt = efi_netobj_from_snp(this); + if (this->mode->state != EFI_NETWORK_STOPPED) { ret = EFI_ALREADY_STARTED; } else { this->int_status = 0; - wait_for_packet->is_signaled = false; + nt->wait_for_packet->is_signaled = false; this->mode->state = EFI_NETWORK_STARTED; } out: @@ -167,6 +194,7 @@ out: static efi_status_t EFIAPI efi_net_stop(struct efi_simple_network *this) { efi_status_t ret = EFI_SUCCESS; + struct efi_net_obj *nt; EFI_ENTRY("%p", this); @@ -176,15 +204,17 @@ static efi_status_t EFIAPI efi_net_stop(struct efi_simple_network *this) goto out; } + nt = efi_netobj_from_snp(this); + if (this->mode->state == EFI_NETWORK_STOPPED) { ret = EFI_NOT_STARTED; } else { /* Disable hardware and put it into the reset state */ - eth_set_dev(netobj->dev); + eth_set_dev(nt->dev); env_set("ethact", eth_get_name()); eth_halt(); /* Clear cache of packets */ - rx_packet_num = 0; + nt->rx_packet_num = 0; this->mode->state = EFI_NETWORK_STOPPED; } out: @@ -208,6 +238,7 @@ static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this, { int ret; efi_status_t r = EFI_SUCCESS; + struct efi_net_obj *nt; EFI_ENTRY("%p, %lx, %lx", this, extra_rx, extra_tx); @@ -216,6 +247,7 @@ static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this, r = EFI_INVALID_PARAMETER; goto out; } + nt = efi_netobj_from_snp(this); switch (this->mode->state) { case EFI_NETWORK_INITIALIZED: @@ -229,12 +261,12 @@ static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this, /* Setup packet buffers */ net_init(); /* Clear cache of packets */ - rx_packet_num = 0; + nt->rx_packet_num = 0; /* Set the net device corresponding to the efi net object */ - eth_set_dev(netobj->dev); + eth_set_dev(nt->dev); env_set("ethact", eth_get_name()); /* Get hardware ready for send and receive operations */ - ret = eth_start_udev(netobj->dev); + ret = eth_start_udev(nt->dev); if (ret < 0) { eth_halt(); this->mode->state = EFI_NETWORK_STOPPED; @@ -242,7 +274,7 @@ static efi_status_t EFIAPI efi_net_initialize(struct efi_simple_network *this, goto out; } else { this->int_status = 0; - wait_for_packet->is_signaled = false; + nt->wait_for_packet->is_signaled = false; this->mode->state = EFI_NETWORK_INITIALIZED; } out: @@ -303,6 +335,7 @@ out: static efi_status_t EFIAPI efi_net_shutdown(struct efi_simple_network *this) { efi_status_t ret = EFI_SUCCESS; + struct efi_net_obj *nt; EFI_ENTRY("%p", this); @@ -311,6 +344,7 @@ static efi_status_t EFIAPI efi_net_shutdown(struct efi_simple_network *this) ret = EFI_INVALID_PARAMETER; goto out; } + nt = efi_netobj_from_snp(this); switch (this->mode->state) { case EFI_NETWORK_INITIALIZED: @@ -323,12 +357,12 @@ static efi_status_t EFIAPI efi_net_shutdown(struct efi_simple_network *this) goto out; } - eth_set_dev(netobj->dev); + eth_set_dev(nt->dev); env_set("ethact", eth_get_name()); eth_halt(); this->int_status = 0; - wait_for_packet->is_signaled = false; + nt->wait_for_packet->is_signaled = false; this->mode->state = EFI_NETWORK_STARTED; out: @@ -504,6 +538,7 @@ static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this, u32 *int_status, void **txbuf) { efi_status_t ret = EFI_SUCCESS; + struct efi_net_obj *nt; EFI_ENTRY("%p, %p, %p", this, int_status, txbuf); @@ -515,6 +550,8 @@ static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this, goto out; } + nt = efi_netobj_from_snp(this); + switch (this->mode->state) { case EFI_NETWORK_STOPPED: ret = EFI_NOT_STARTED; @@ -531,9 +568,9 @@ static efi_status_t EFIAPI efi_net_get_status(struct efi_simple_network *this, this->int_status = 0; } if (txbuf) - *txbuf = new_tx_packet; + *txbuf = nt->new_tx_packet; - new_tx_packet = NULL; + nt->new_tx_packet = NULL; out: return EFI_EXIT(ret); } @@ -560,6 +597,7 @@ static efi_status_t EFIAPI efi_net_transmit struct efi_mac_address *dest_addr, u16 *protocol) { efi_status_t ret = EFI_SUCCESS; + struct efi_net_obj *nt; EFI_ENTRY("%p, %lu, %lu, %p, %p, %p, %p", this, (unsigned long)header_size, (unsigned long)buffer_size, @@ -573,6 +611,8 @@ static efi_status_t EFIAPI efi_net_transmit goto out; } + nt = efi_netobj_from_snp(this); + /* We do not support jumbo packets */ if (buffer_size > PKTSIZE_ALIGN) { ret = EFI_INVALID_PARAMETER; @@ -617,14 +657,14 @@ static efi_status_t EFIAPI efi_net_transmit break; } - eth_set_dev(netobj->dev); + eth_set_dev(nt->dev); env_set("ethact", eth_get_name()); /* Ethernet packets always fit, just bounce */ - memcpy(transmit_buffer, buffer, buffer_size); - net_send_packet(transmit_buffer, buffer_size); + memcpy(nt->transmit_buffer, buffer, buffer_size); + net_send_packet(nt->transmit_buffer, buffer_size); - new_tx_packet = buffer; + nt->new_tx_packet = buffer; this->int_status |= EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT; out: return EFI_EXIT(ret); @@ -655,6 +695,7 @@ static efi_status_t EFIAPI efi_net_receive struct ethernet_hdr *eth_hdr; size_t hdr_size = sizeof(struct ethernet_hdr); u16 protlen; + struct efi_net_obj *nt; EFI_ENTRY("%p, %p, %p, %p, %p, %p, %p", this, header_size, buffer_size, buffer, src_addr, dest_addr, protocol); @@ -668,6 +709,8 @@ static efi_status_t EFIAPI efi_net_receive goto out; } + nt = efi_netobj_from_snp(this); + switch (this->mode->state) { case EFI_NETWORK_STOPPED: ret = EFI_NOT_STARTED; @@ -679,16 +722,16 @@ static efi_status_t EFIAPI efi_net_receive break; } - if (!rx_packet_num) { + if (!nt->rx_packet_num) { ret = EFI_NOT_READY; goto out; } /* Fill export parameters */ - eth_hdr = (struct ethernet_hdr *)receive_buffer[rx_packet_idx]; + eth_hdr = (struct ethernet_hdr *)nt->receive_buffer[nt->rx_packet_idx]; protlen = ntohs(eth_hdr->et_protlen); if (protlen == 0x8100) { hdr_size += 4; - protlen = ntohs(*(u16 *)&receive_buffer[rx_packet_idx][hdr_size - 2]); + protlen = ntohs(*(u16 *)&nt->receive_buffer[nt->rx_packet_idx][hdr_size - 2]); } if (header_size) *header_size = hdr_size; @@ -698,20 +741,20 @@ static efi_status_t EFIAPI efi_net_receive memcpy(src_addr, eth_hdr->et_src, ARP_HLEN); if (protocol) *protocol = protlen; - if (*buffer_size < receive_lengths[rx_packet_idx]) { + if (*buffer_size < nt->receive_lengths[nt->rx_packet_idx]) { /* Packet doesn't fit, try again with bigger buffer */ - *buffer_size = receive_lengths[rx_packet_idx]; + *buffer_size = nt->receive_lengths[nt->rx_packet_idx]; ret = EFI_BUFFER_TOO_SMALL; goto out; } /* Copy packet */ - memcpy(buffer, receive_buffer[rx_packet_idx], - receive_lengths[rx_packet_idx]); - *buffer_size = receive_lengths[rx_packet_idx]; - rx_packet_idx = (rx_packet_idx + 1) % ETH_PACKETS_BATCH_RECV; - rx_packet_num--; - if (rx_packet_num) - wait_for_packet->is_signaled = true; + memcpy(buffer, nt->receive_buffer[nt->rx_packet_idx], + nt->receive_lengths[nt->rx_packet_idx]); + *buffer_size = nt->receive_lengths[nt->rx_packet_idx]; + nt->rx_packet_idx = (nt->rx_packet_idx + 1) % ETH_PACKETS_BATCH_RECV; + nt->rx_packet_num--; + if (nt->rx_packet_num) + nt->wait_for_packet->is_signaled = true; else this->int_status &= ~EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT; out: @@ -730,6 +773,7 @@ void efi_net_set_dhcp_ack(void *pkt, int len) { struct efi_pxe_packet **dhcp_ack; struct udevice *dev; + int i; dhcp_ack = &dhcp_cache[next_dhcp_entry].dhcp_ack; @@ -750,6 +794,12 @@ void efi_net_set_dhcp_ack(void *pkt, int len) dhcp_cache[next_dhcp_entry].dev = dev; next_dhcp_entry++; next_dhcp_entry %= MAX_NUM_DHCP_ENTRIES; + + for (i = 0; i < MAX_EFI_NET_OBJS; i++) { + if (net_objs[i] && net_objs[i]->dev == dev) { + net_objs[i]->pxe_mode.dhcp_ack = **dhcp_ack; + } + } } /** @@ -763,6 +813,11 @@ void efi_net_set_dhcp_ack(void *pkt, int len) static void efi_net_push(void *pkt, int len) { int rx_packet_next; + struct efi_net_obj *nt; + + nt = net_objs[curr_efi_net_obj]; + if (!nt) + return; /* Check that we at least received an Ethernet header */ if (len < sizeof(struct ethernet_hdr)) @@ -773,15 +828,15 @@ static void efi_net_push(void *pkt, int len) return; /* Can't store more than pre-alloced buffer */ - if (rx_packet_num >= ETH_PACKETS_BATCH_RECV) + if (nt->rx_packet_num >= ETH_PACKETS_BATCH_RECV) return; - rx_packet_next = (rx_packet_idx + rx_packet_num) % + rx_packet_next = (nt->rx_packet_idx + nt->rx_packet_num) % ETH_PACKETS_BATCH_RECV; - memcpy(receive_buffer[rx_packet_next], pkt, len); - receive_lengths[rx_packet_next] = len; + memcpy(nt->receive_buffer[rx_packet_next], pkt, len); + nt->receive_lengths[rx_packet_next] = len; - rx_packet_num++; + nt->rx_packet_num++; } /** @@ -796,6 +851,7 @@ static void EFIAPI efi_network_timer_notify(struct efi_event *event, void *context) { struct efi_simple_network *this = (struct efi_simple_network *)context; + struct efi_net_obj *nt; EFI_ENTRY("%p, %p", event, context); @@ -806,16 +862,19 @@ static void EFIAPI efi_network_timer_notify(struct efi_event *event, if (!this || this->mode->state != EFI_NETWORK_INITIALIZED) goto out; - if (!rx_packet_num) { - eth_set_dev(netobj->dev); + nt = efi_netobj_from_snp(this); + curr_efi_net_obj = nt->efi_seq_num; + + if (!nt->rx_packet_num) { + eth_set_dev(nt->dev); env_set("ethact", eth_get_name()); push_packet = efi_net_push; eth_rx(); push_packet = NULL; - if (rx_packet_num) { + if (nt->rx_packet_num) { this->int_status |= EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT; - wait_for_packet->is_signaled = true; + nt->wait_for_packet->is_signaled = true; } } out: @@ -1011,9 +1070,19 @@ static struct efi_device_path *efi_netobj_get_dp(struct efi_net_obj *netobj) efi_status_t efi_net_do_start(struct udevice *dev) { efi_status_t r = EFI_SUCCESS; + struct efi_net_obj *netobj; struct efi_device_path *net_dp; + int i; - if (dev != netobj->dev ) + netobj = NULL; + for (i = 0; i < MAX_EFI_NET_OBJS; i++) { + if (net_objs[i] && net_objs[i]->dev == dev) { + netobj = net_objs[i]; + break; + } + } + + if (!efi_netobj_is_active(netobj)) return r; efi_net_dp_from_dev(&net_dp, netobj->dev, true); @@ -1056,6 +1125,11 @@ set_addr: efi_status_t efi_net_register(struct udevice *dev) { efi_status_t r; + int seq_num; + struct efi_net_obj *netobj; + void *transmit_buffer = NULL; + uchar **receive_buffer = NULL; + size_t *receive_lengths; int i, j; if (!dev) { @@ -1063,6 +1137,23 @@ efi_status_t efi_net_register(struct udevice *dev) return EFI_SUCCESS; } + for (i = 0; i < MAX_EFI_NET_OBJS; i++) { + if (net_objs[i] && net_objs[i]->dev == dev) { + // Do not register duplicate devices + return EFI_SUCCESS; + } + } + + seq_num = -1; + for (i = 0; i < MAX_EFI_NET_OBJS; i++) { + if (!net_objs[i]) { + seq_num = i; + break; + } + } + if (seq_num < 0) + return EFI_OUT_OF_RESOURCES; + /* We only expose the "active" network device, so one is enough */ netobj = calloc(1, sizeof(*netobj)); if (!netobj) @@ -1075,6 +1166,7 @@ efi_status_t efi_net_register(struct udevice *dev) if (!transmit_buffer) goto out_of_resources; transmit_buffer = (void *)ALIGN((uintptr_t)transmit_buffer, PKTALIGN); + netobj->transmit_buffer = transmit_buffer; /* Allocate a number of receive buffers */ receive_buffer = calloc(ETH_PACKETS_BATCH_RECV, @@ -1086,11 +1178,13 @@ efi_status_t efi_net_register(struct udevice *dev) if (!receive_buffer[i]) goto out_of_resources; } + netobj->receive_buffer = receive_buffer; receive_lengths = calloc(ETH_PACKETS_BATCH_RECV, sizeof(*receive_lengths)); if (!receive_lengths) goto out_of_resources; + netobj->receive_lengths = receive_lengths; /* Hook net up to the device list */ efi_add_handle(&netobj->header); @@ -1162,13 +1256,12 @@ efi_status_t efi_net_register(struct udevice *dev) */ r = efi_create_event(EVT_NOTIFY_WAIT, TPL_CALLBACK, efi_network_timer_notify, NULL, NULL, - &wait_for_packet); + &netobj->wait_for_packet); if (r != EFI_SUCCESS) { printf("ERROR: Failed to register network event\n"); return r; } - netobj->net.wait_for_packet = wait_for_packet; - + netobj->net.wait_for_packet = netobj->wait_for_packet; /* * Create a timer event. * @@ -1179,13 +1272,13 @@ efi_status_t efi_net_register(struct udevice *dev) */ r = efi_create_event(EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_NOTIFY, efi_network_timer_notify, &netobj->net, NULL, - &network_timer_event); + &netobj->network_timer_event); if (r != EFI_SUCCESS) { printf("ERROR: Failed to register network event\n"); return r; } /* Network is time critical, create event in every timer cycle */ - r = efi_set_timer(network_timer_event, EFI_TIMER_PERIODIC, 0); + r = efi_set_timer(netobj->network_timer_event, EFI_TIMER_PERIODIC, 0); if (r != EFI_SUCCESS) { printf("ERROR: Failed to set network timer\n"); return r; @@ -1202,6 +1295,8 @@ efi_status_t efi_net_register(struct udevice *dev) if (r != EFI_SUCCESS) goto failure_to_add_protocol; #endif + netobj->efi_seq_num = seq_num; + net_objs[seq_num] = netobj; return EFI_SUCCESS; failure_to_add_protocol: printf("ERROR: Failure to add protocol\n"); @@ -1233,8 +1328,10 @@ out_of_resources: efi_status_t efi_net_new_dp(const char *dev, const char *server, struct udevice *udev) { efi_status_t ret; + struct efi_net_obj *netobj; struct efi_device_path *old_net_dp, *new_net_dp; struct efi_device_path **dp; + int i; dp = &dp_cache[next_dp_entry].net_dp; @@ -1256,7 +1353,14 @@ efi_status_t efi_net_new_dp(const char *dev, const char *server, struct udevice // Free the old cache entry efi_free_pool(old_net_dp); - if (!netobj || netobj->dev != udev) + netobj = NULL; + for (i = 0; i < MAX_EFI_NET_OBJS; i++) { + if (net_objs[i] && net_objs[i]->dev == udev) { + netobj = net_objs[i]; + break; + } + } + if (!netobj) return EFI_SUCCESS; new_net_dp = efi_dp_dup(*dp); @@ -1290,10 +1394,13 @@ void efi_net_dp_from_dev(struct efi_device_path **dp, struct udevice *udev, bool if (cache_only) goto cache; - if (netobj && netobj->dev == udev) { - *dp = efi_netobj_get_dp(netobj); - if (*dp) - return; + // If a netobj matches: + for (i = 0; i < MAX_EFI_NET_OBJS; i++) { + if (net_objs[i] && net_objs[i]->dev == udev) { + *dp = efi_netobj_get_dp(net_objs[i]); + if (*dp) + return; + } } cache: // Search in the cache @@ -1527,27 +1634,40 @@ void efi_net_parse_headers(ulong *num_headers, struct http_header *headers) * @status_code: HTTP status code * @file_size: file size in bytes * @headers_buffer: headers buffer + * @parent: service binding protocol * Return: status code */ efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buffer, - u32 *status_code, ulong *file_size, char *headers_buffer) + u32 *status_code, ulong *file_size, char *headers_buffer, + struct efi_service_binding_protocol *parent) { efi_status_t ret = EFI_SUCCESS; int wget_ret; static bool last_head; + struct udevice *dev; + int i; - if (!buffer || !file_size) + if (!buffer || !file_size || !parent) return EFI_ABORTED; efi_wget_info.method = (enum wget_http_method)method; efi_wget_info.headers = headers_buffer; + // Set corresponding udevice + dev = NULL; + for (i = 0; i < MAX_EFI_NET_OBJS; i++) { + if (net_objs[i] && &net_objs[i]->http_service_binding == parent) + dev = net_objs[i]->dev; + } + if (!dev) + return EFI_ABORTED; + switch (method) { case HTTP_METHOD_GET: ret = efi_net_set_buffer(buffer, last_head ? (size_t)efi_wget_info.hdr_cont_len : 0); if (ret != EFI_SUCCESS) goto out; - eth_set_dev(netobj->dev); + eth_set_dev(dev); env_set("ethact", eth_get_name()); wget_ret = wget_request((ulong)*buffer, url, &efi_wget_info); if ((ulong)efi_wget_info.hdr_cont_len > efi_wget_info.buffer_size) { @@ -1556,7 +1676,7 @@ efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buf ret = efi_net_set_buffer(buffer, (size_t)efi_wget_info.hdr_cont_len); if (ret != EFI_SUCCESS) goto out; - eth_set_dev(netobj->dev); + eth_set_dev(dev); env_set("ethact", eth_get_name()); if (wget_request((ulong)*buffer, url, &efi_wget_info)) { efi_free_pool(*buffer); @@ -1577,7 +1697,7 @@ efi_status_t efi_net_do_request(u8 *url, enum efi_http_method method, void **buf ret = efi_net_set_buffer(buffer, 0); if (ret != EFI_SUCCESS) goto out; - eth_set_dev(netobj->dev); + eth_set_dev(dev); env_set("ethact", eth_get_name()); wget_request((ulong)*buffer, url, &efi_wget_info); *file_size = 0; -- cgit v1.3.1 From 7082c9e656a824ecf5dfc2d59d2ce17f730c5d4a Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 2 Mar 2025 15:21:19 +0100 Subject: common: clean up setjmp.h Separate setjmp.h into an architecture independent part and an architecture specific part. This simplifies moving from using struct jmp_buf_data directly to using type jmp_buf in our code which is the C compliant way. Reviewed-by: Jerome Forissier Signed-off-by: Heinrich Schuchardt --- arch/arm/cpu/armv7/exception_level.c | 2 +- arch/arm/cpu/armv8/exception_level.c | 2 +- arch/arm/include/asm/setjmp.h | 15 +++----------- arch/arm/mach-rockchip/bootrom.c | 2 +- arch/riscv/include/asm/setjmp.h | 15 +++----------- arch/sandbox/cpu/cpu.c | 2 +- arch/sandbox/include/asm/setjmp.h | 16 +++------------ arch/x86/include/asm/setjmp.h | 11 +++------- include/interrupt.h | 2 +- include/setjmp.h | 40 ++++++++++++++++++++++++++++++++++++ lib/efi_loader/efi_boottime.c | 2 +- test/lib/longjmp.c | 2 +- 12 files changed, 59 insertions(+), 52 deletions(-) create mode 100644 include/setjmp.h (limited to 'include') diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c index 7baade61b07..c63b0e13666 100644 --- a/arch/arm/cpu/armv7/exception_level.c +++ b/arch/arm/cpu/armv7/exception_level.c @@ -11,9 +11,9 @@ #include #include #include +#include #include #include -#include /** * entry_non_secure() - entry point when switching to non-secure mode diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c index 85c78f55789..58e816007f0 100644 --- a/arch/arm/cpu/armv8/exception_level.c +++ b/arch/arm/cpu/armv8/exception_level.c @@ -11,8 +11,8 @@ #include #include #include +#include #include -#include /** * entry_non_secure() - entry point when switching to non-secure mode diff --git a/arch/arm/include/asm/setjmp.h b/arch/arm/include/asm/setjmp.h index 9a7f5af9f8f..a9eccf7f632 100644 --- a/arch/arm/include/asm/setjmp.h +++ b/arch/arm/include/asm/setjmp.h @@ -4,15 +4,11 @@ * (C) Copyright 2016 Alexander Graf */ -#ifndef _SETJMP_H_ -#define _SETJMP_H_ 1 +#ifndef _ASM_SETJMP_H_ +#define _ASM_SETJMP_H_ 1 #include -/* - * This really should be opaque, but the EFI implementation wrongly - * assumes that a 'struct jmp_buf_data' is defined. - */ struct jmp_buf_data { #if defined(__aarch64__) u64 regs[13]; @@ -21,9 +17,4 @@ struct jmp_buf_data { #endif }; -typedef struct jmp_buf_data jmp_buf[1]; - -int setjmp(jmp_buf jmp); -void longjmp(jmp_buf jmp, int ret); - -#endif /* _SETJMP_H_ */ +#endif /* _ASM_SETJMP_H_ */ diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c index 82a0b3efef9..1db38546d55 100644 --- a/arch/arm/mach-rockchip/bootrom.c +++ b/arch/arm/mach-rockchip/bootrom.c @@ -4,11 +4,11 @@ */ #include +#include #include #include #include #include -#include #include /* diff --git a/arch/riscv/include/asm/setjmp.h b/arch/riscv/include/asm/setjmp.h index 72383d43303..08687e0f92b 100644 --- a/arch/riscv/include/asm/setjmp.h +++ b/arch/riscv/include/asm/setjmp.h @@ -3,13 +3,9 @@ * (C) Copyright 2018 Alexander Graf */ -#ifndef _SETJMP_H_ -#define _SETJMP_H_ 1 +#ifndef _ASM_SETJMP_H_ +#define _ASM_SETJMP_H_ 1 -/* - * This really should be opaque, but the EFI implementation wrongly - * assumes that a 'struct jmp_buf_data' is defined. - */ struct jmp_buf_data { /* x2, x8, x9, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, sp */ unsigned long s_regs[12]; /* s0 - s11 */ @@ -17,9 +13,4 @@ struct jmp_buf_data { unsigned long sp; }; -typedef struct jmp_buf_data jmp_buf[1]; - -int setjmp(jmp_buf jmp); -void longjmp(jmp_buf jmp, int ret); - -#endif /* _SETJMP_H_ */ +#endif /* _ASM_SETJMP_H_ */ diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index 6407193c5f1..6db8739e66b 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -10,10 +10,10 @@ #include #include #include +#include #include #include #include -#include #include #include #include diff --git a/arch/sandbox/include/asm/setjmp.h b/arch/sandbox/include/asm/setjmp.h index 47dc8938cd6..3413c747783 100644 --- a/arch/sandbox/include/asm/setjmp.h +++ b/arch/sandbox/include/asm/setjmp.h @@ -4,8 +4,8 @@ * Written by Simon Glass */ -#ifndef _SETJMP_H_ -#define _SETJMP_H_ +#ifndef _ASM_SETJMP_H_ +#define _ASM_SETJMP_H_ struct jmp_buf_data { /* @@ -22,14 +22,4 @@ struct jmp_buf_data { unsigned long data[128]; }; -typedef struct jmp_buf_data jmp_buf[1]; - -/* - * We have to directly link with the system versions of - * setjmp/longjmp, because setjmp must not return as otherwise - * the stack may become invalid. - */ -int setjmp(jmp_buf jmp); -__noreturn void longjmp(jmp_buf jmp, int ret); - -#endif /* _SETJMP_H_ */ +#endif /* _ASM_SETJMP_H_ */ diff --git a/arch/x86/include/asm/setjmp.h b/arch/x86/include/asm/setjmp.h index 15915d0dc6b..13772574e15 100644 --- a/arch/x86/include/asm/setjmp.h +++ b/arch/x86/include/asm/setjmp.h @@ -5,8 +5,8 @@ * From Linux arch/um/sys-i386/setjmp.S */ -#ifndef __setjmp_h -#define __setjmp_h +#ifndef _ASM_SETJMP_H_ +#define _ASM_SETJMP_H_ 1 #ifdef CONFIG_X86_64 @@ -34,9 +34,4 @@ struct jmp_buf_data { #endif -typedef struct jmp_buf_data jmp_buf[1]; - -int setjmp(jmp_buf env); -void longjmp(jmp_buf env, int val); - -#endif +#endif /* _ASM_SETJMP_H_ */ diff --git a/include/interrupt.h b/include/interrupt.h index 46ef2e196d4..6ea28b54a56 100644 --- a/include/interrupt.h +++ b/include/interrupt.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include +#include /** * struct resume_data - data for resume after interrupt diff --git a/include/setjmp.h b/include/setjmp.h new file mode 100644 index 00000000000..37d3a8af85d --- /dev/null +++ b/include/setjmp.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _SETJMP_H_ +#define _SETJMP_H_ 1 + +#ifdef CONFIG_HAVE_SETJMP +#include +#else +struct jmp_buf_data { +}; +#endif + +/** + * typedef jmp_buf - information needed to restore a calling environment + */ +typedef struct jmp_buf_data jmp_buf[1]; + +/** + * setjmp() - prepare for a long jump + * + * Registers, the stack pointer, and the return address are saved in the + * jump bufffer. The function returns zero afterwards. When longjmp() is + * executed the function returns a second time with a non-zero value. + * + * @env: jump buffer used to store register values + * Return: 0 after setting up jump buffer, non-zero after longjmp() + */ +int setjmp(jmp_buf env); + +/** + * longjmp() - long jump + * + * Jump back to the address and the register state saved by setjmp(). + * + * @env: jump buffer + * @val: value to be returned by setjmp(), 0 is replaced by 1 + */ +void longjmp(jmp_buf env, int val); + +#endif /* _SETJMP_H_ */ diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 02ad9f7141f..3c6c2525903 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/test/lib/longjmp.c b/test/lib/longjmp.c index 79d889bdd5f..74c3465b8c2 100644 --- a/test/lib/longjmp.c +++ b/test/lib/longjmp.c @@ -5,10 +5,10 @@ * Copyright (c) 2021, Heinrich Schuchardt */ +#include #include #include #include -#include struct test_jmp_buf { jmp_buf env; -- cgit v1.3.1 From f2806157472bf96a211c4d0319283a6a79614854 Mon Sep 17 00:00:00 2001 From: Yao Zi Date: Sun, 2 Mar 2025 15:21:20 +0100 Subject: efi_loader: Clean up usage of structure jmp_buf_data Structure jmp_buf_data provides the underlying format of jmp_buf, which we actually don't care about. Clean up existing code to use the standard jmp_buf type. This introduces no functional change. Signed-off-by: Yao Zi Reviewed-by: Jerome Forissier Reviewed-by: Ilias Apalodimas --- include/efi_loader.h | 4 ++-- lib/efi_loader/efi_boottime.c | 9 ++++----- 2 files changed, 6 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/efi_loader.h b/include/efi_loader.h index 995ae3357ec..e9c10819ba2 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -15,13 +15,13 @@ #include #include #include +#include #include #include #include struct blk_desc; struct bootflow; -struct jmp_buf_data; #if CONFIG_IS_ENABLED(EFI_LOADER) @@ -495,7 +495,7 @@ struct efi_loaded_image_obj { efi_status_t *exit_status; efi_uintn_t *exit_data_size; u16 **exit_data; - struct jmp_buf_data *exit_jmp; + jmp_buf *exit_jmp; EFIAPI efi_status_t (*entry)(efi_handle_t image_handle, struct efi_system_table *st); u16 image_type; diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c index 3c6c2525903..08dcd45b6d2 100644 --- a/lib/efi_loader/efi_boottime.c +++ b/lib/efi_loader/efi_boottime.c @@ -21,7 +21,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; @@ -3198,7 +3197,7 @@ efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, void *info; efi_handle_t parent_image = current_image; efi_status_t exit_status; - struct jmp_buf_data exit_jmp; + jmp_buf exit_jmp; EFI_ENTRY("%p, %p, %p", image_handle, exit_data_size, exit_data); @@ -3237,7 +3236,7 @@ efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle, } /* call the image! */ - if (setjmp(&exit_jmp)) { + if (setjmp(exit_jmp)) { /* * We called the entry point of the child image with EFI_CALL * in the lines below. The child image called the Exit() boot @@ -3443,7 +3442,7 @@ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle, struct efi_loaded_image *loaded_image_protocol; struct efi_loaded_image_obj *image_obj = (struct efi_loaded_image_obj *)image_handle; - struct jmp_buf_data *exit_jmp; + jmp_buf *exit_jmp; EFI_ENTRY("%p, %ld, %zu, %p", image_handle, exit_status, exit_data_size, exit_data); @@ -3510,7 +3509,7 @@ static efi_status_t EFIAPI efi_exit(efi_handle_t image_handle, */ efi_restore_gd(); - longjmp(exit_jmp, 1); + longjmp(*exit_jmp, 1); panic("EFI application exited"); out: -- cgit v1.3.1 From 6689b0c955f1ec885ed1acafc7c5d7c1565dbe63 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 27 Feb 2025 14:51:01 -0600 Subject: usb: gadget: Remove the legacy usbtty driver The lone user of this driver has been removed for some time. Remove this driver as well. Signed-off-by: Tom Rini Reviewed-by: Mattijs Korpershoek Link: https://lore.kernel.org/r/20250227205101.4127604-2-trini@konsulko.com Signed-off-by: Mattijs Korpershoek --- common/stdio.c | 3 - drivers/serial/Makefile | 3 - drivers/serial/ns16550.c | 8 +- drivers/serial/usbtty.c | 983 ----------------------------------------------- drivers/serial/usbtty.h | 49 --- include/serial.h | 20 - include/stdio_dev.h | 1 - lib/Makefile | 4 - 8 files changed, 2 insertions(+), 1069 deletions(-) delete mode 100644 drivers/serial/usbtty.c delete mode 100644 drivers/serial/usbtty.h (limited to 'include') diff --git a/common/stdio.c b/common/stdio.c index a61220ce4b9..3eeb289dd8b 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -357,9 +357,6 @@ int stdio_add_devices(void) drv_system_init(); serial_stdio_init(); -#ifdef CONFIG_USB_TTY - drv_usbtty_init(); -#endif #ifdef CONFIG_USB_FUNCTION_ACM drv_usbacm_init (); #endif diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index ebe692a9963..2ef8ba20cf5 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -63,7 +63,4 @@ obj-$(CONFIG_XEN_SERIAL) += serial_xen.o obj-$(CONFIG_XTENSA_SEMIHOSTING_SERIAL) += serial_xtensa_semihosting.o obj-$(CONFIG_S5P4418_PL011_SERIAL) += serial_s5p4418_pl011.o -ifndef CONFIG_XPL_BUILD -obj-$(CONFIG_USB_TTY) += usbtty.o -endif obj-$(CONFIG_UART4_SERIAL) += serial_adi_uart4.o diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 7e460f6d2c7..4f7de3ea215 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -294,13 +294,9 @@ void ns16550_putc(struct ns16550 *com_port, char c) #if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) char ns16550_getc(struct ns16550 *com_port) { - while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { -#if !defined(CONFIG_XPL_BUILD) && defined(CONFIG_USB_TTY) - extern void usbtty_poll(void); - usbtty_poll(); -#endif + while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) schedule(); - } + return serial_in(&com_port->rbr); } diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c deleted file mode 100644 index b7d77fbb6a9..00000000000 --- a/drivers/serial/usbtty.c +++ /dev/null @@ -1,983 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2003 - * Gerry Hamel, geh@ti.com, Texas Instruments - * - * (C) Copyright 2006 - * Bryan O'Donoghue, bodonoghue@codehermit.ie - */ - -#include -#include -#include -#include -#include -#include -#include "usbtty.h" -#include "usb_cdc_acm.h" -#include "usbdescriptors.h" - -#ifdef DEBUG -#define TTYDBG(fmt,args...)\ - serial_printf("[%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args) -#else -#define TTYDBG(fmt,args...) do{}while(0) -#endif - -#if 1 -#define TTYERR(fmt,args...)\ - serial_printf("ERROR![%s] %s %d: "fmt, __FILE__,__FUNCTION__,\ - __LINE__,##args) -#else -#define TTYERR(fmt,args...) do{}while(0) -#endif - -/* - * Defines - */ -#define NUM_CONFIGS 1 -#define MAX_INTERFACES 2 -#define NUM_ENDPOINTS 3 -#define ACM_TX_ENDPOINT 3 -#define ACM_RX_ENDPOINT 2 -#define GSERIAL_TX_ENDPOINT 2 -#define GSERIAL_RX_ENDPOINT 1 -#define NUM_ACM_INTERFACES 2 -#define NUM_GSERIAL_INTERFACES 1 -#define CFG_USBD_DATA_INTERFACE_STR "Bulk Data Interface" -#define CFG_USBD_CTRL_INTERFACE_STR "Control Interface" - -/* - * Buffers to hold input and output data - */ -#define USBTTY_BUFFER_SIZE 2048 -static circbuf_t usbtty_input; -static circbuf_t usbtty_output; - -/* - * Instance variables - */ -static struct stdio_dev usbttydev; -static struct usb_device_instance device_instance[1]; -static struct usb_bus_instance bus_instance[1]; -static struct usb_configuration_instance config_instance[NUM_CONFIGS]; -static struct usb_interface_instance interface_instance[MAX_INTERFACES]; -static struct usb_alternate_instance alternate_instance[MAX_INTERFACES]; -/* one extra for control endpoint */ -static struct usb_endpoint_instance endpoint_instance[NUM_ENDPOINTS+1]; - -/* - * Global flag - */ -int usbtty_configured_flag = 0; - -/* - * Serial number - */ -static char serial_number[16]; - -/* - * Descriptors, Strings, Local variables. - */ - -/* defined and used by gadget/ep0.c */ -extern struct usb_string_descriptor **usb_strings; - -/* Indicies, References */ -static unsigned short rx_endpoint = 0; -static unsigned short tx_endpoint = 0; -static unsigned short interface_count = 0; -static struct usb_string_descriptor *usbtty_string_table[STR_COUNT]; - -/* USB Descriptor Strings */ -static u8 wstrLang[4] = {4,USB_DT_STRING,0x9,0x4}; -static u8 wstrManufacturer[2 + 2*(sizeof(CONFIG_USBD_MANUFACTURER)-1)]; -static u8 wstrProduct[2 + 2*(sizeof(CONFIG_USBD_PRODUCT_NAME)-1)]; -static u8 wstrSerial[2 + 2*(sizeof(serial_number) - 1)]; -static u8 wstrConfiguration[2 + 2*(sizeof(CFG_USBD_CONFIGURATION_STR)-1)]; -static u8 wstrDataInterface[2 + 2*(sizeof(CFG_USBD_DATA_INTERFACE_STR)-1)]; -static u8 wstrCtrlInterface[2 + 2*(sizeof(CFG_USBD_DATA_INTERFACE_STR)-1)]; - -/* Standard USB Data Structures */ -static struct usb_interface_descriptor interface_descriptors[MAX_INTERFACES]; -static struct usb_endpoint_descriptor *ep_descriptor_ptrs[NUM_ENDPOINTS]; -static struct usb_configuration_descriptor *configuration_descriptor = 0; -static struct usb_device_descriptor device_descriptor = { - .bLength = sizeof(struct usb_device_descriptor), - .bDescriptorType = USB_DT_DEVICE, - .bcdUSB = cpu_to_le16(USB_BCD_VERSION), - .bDeviceSubClass = 0x00, - .bDeviceProtocol = 0x00, - .bMaxPacketSize0 = EP0_MAX_PACKET_SIZE, - .idVendor = cpu_to_le16(CONFIG_USBD_VENDORID), - .bcdDevice = cpu_to_le16(USBTTY_BCD_DEVICE), - .iManufacturer = STR_MANUFACTURER, - .iProduct = STR_PRODUCT, - .iSerialNumber = STR_SERIAL, - .bNumConfigurations = NUM_CONFIGS -}; - -/* - * Static CDC ACM specific descriptors - */ - -struct acm_config_desc { - struct usb_configuration_descriptor configuration_desc; - - /* Master Interface */ - struct usb_interface_descriptor interface_desc; - - struct usb_class_header_function_descriptor usb_class_header; - struct usb_class_call_management_descriptor usb_class_call_mgt; - struct usb_class_abstract_control_descriptor usb_class_acm; - struct usb_class_union_function_descriptor usb_class_union; - struct usb_endpoint_descriptor notification_endpoint; - - /* Slave Interface */ - struct usb_interface_descriptor data_class_interface; - struct usb_endpoint_descriptor data_endpoints[NUM_ENDPOINTS-1]; -} __attribute__((packed)); - -static struct acm_config_desc acm_configuration_descriptors[NUM_CONFIGS] = { - { - .configuration_desc ={ - .bLength = - sizeof(struct usb_configuration_descriptor), - .bDescriptorType = USB_DT_CONFIG, - .wTotalLength = - cpu_to_le16(sizeof(struct acm_config_desc)), - .bNumInterfaces = NUM_ACM_INTERFACES, - .bConfigurationValue = 1, - .iConfiguration = STR_CONFIG, - .bmAttributes = - BMATTRIBUTE_SELF_POWERED|BMATTRIBUTE_RESERVED, - .bMaxPower = USBTTY_MAXPOWER - }, - /* Interface 1 */ - .interface_desc = { - .bLength = sizeof(struct usb_interface_descriptor), - .bDescriptorType = USB_DT_INTERFACE, - .bInterfaceNumber = 0, - .bAlternateSetting = 0, - .bNumEndpoints = 0x01, - .bInterfaceClass = - COMMUNICATIONS_INTERFACE_CLASS_CONTROL, - .bInterfaceSubClass = COMMUNICATIONS_ACM_SUBCLASS, - .bInterfaceProtocol = COMMUNICATIONS_V25TER_PROTOCOL, - .iInterface = STR_CTRL_INTERFACE, - }, - .usb_class_header = { - .bFunctionLength = - sizeof(struct usb_class_header_function_descriptor), - .bDescriptorType = CS_INTERFACE, - .bDescriptorSubtype = USB_ST_HEADER, - .bcdCDC = cpu_to_le16(110), - }, - .usb_class_call_mgt = { - .bFunctionLength = - sizeof(struct usb_class_call_management_descriptor), - .bDescriptorType = CS_INTERFACE, - .bDescriptorSubtype = USB_ST_CMF, - .bmCapabilities = 0x00, - .bDataInterface = 0x01, - }, - .usb_class_acm = { - .bFunctionLength = - sizeof(struct usb_class_abstract_control_descriptor), - .bDescriptorType = CS_INTERFACE, - .bDescriptorSubtype = USB_ST_ACMF, - .bmCapabilities = 0x00, - }, - .usb_class_union = { - .bFunctionLength = - sizeof(struct usb_class_union_function_descriptor), - .bDescriptorType = CS_INTERFACE, - .bDescriptorSubtype = USB_ST_UF, - .bMasterInterface = 0x00, - .bSlaveInterface0 = 0x01, - }, - .notification_endpoint = { - .bLength = - sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = UDC_INT_ENDPOINT | USB_DIR_IN, - .bmAttributes = USB_ENDPOINT_XFER_INT, - .wMaxPacketSize - = cpu_to_le16(CFG_USBD_SERIAL_INT_PKTSIZE), - .bInterval = 0xFF, - }, - - /* Interface 2 */ - .data_class_interface = { - .bLength = - sizeof(struct usb_interface_descriptor), - .bDescriptorType = USB_DT_INTERFACE, - .bInterfaceNumber = 0x01, - .bAlternateSetting = 0x00, - .bNumEndpoints = 0x02, - .bInterfaceClass = - COMMUNICATIONS_INTERFACE_CLASS_DATA, - .bInterfaceSubClass = DATA_INTERFACE_SUBCLASS_NONE, - .bInterfaceProtocol = DATA_INTERFACE_PROTOCOL_NONE, - .iInterface = STR_DATA_INTERFACE, - }, - .data_endpoints = { - { - .bLength = - sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = UDC_OUT_ENDPOINT | USB_DIR_OUT, - .bmAttributes = - USB_ENDPOINT_XFER_BULK, - .wMaxPacketSize = - cpu_to_le16(CFG_USBD_SERIAL_BULK_PKTSIZE), - .bInterval = 0xFF, - }, - { - .bLength = - sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = UDC_IN_ENDPOINT | USB_DIR_IN, - .bmAttributes = - USB_ENDPOINT_XFER_BULK, - .wMaxPacketSize = - cpu_to_le16(CFG_USBD_SERIAL_BULK_PKTSIZE), - .bInterval = 0xFF, - }, - }, - }, -}; - -static struct rs232_emu rs232_desc={ - .dter = 115200, - .stop_bits = 0x00, - .parity = 0x00, - .data_bits = 0x08 -}; - -/* - * Static Generic Serial specific data - */ - -struct gserial_config_desc { - - struct usb_configuration_descriptor configuration_desc; - struct usb_interface_descriptor interface_desc[NUM_GSERIAL_INTERFACES]; - struct usb_endpoint_descriptor data_endpoints[NUM_ENDPOINTS]; - -} __attribute__((packed)); - -static struct gserial_config_desc -gserial_configuration_descriptors[NUM_CONFIGS] ={ - { - .configuration_desc ={ - .bLength = sizeof(struct usb_configuration_descriptor), - .bDescriptorType = USB_DT_CONFIG, - .wTotalLength = - cpu_to_le16(sizeof(struct gserial_config_desc)), - .bNumInterfaces = NUM_GSERIAL_INTERFACES, - .bConfigurationValue = 1, - .iConfiguration = STR_CONFIG, - .bmAttributes = - BMATTRIBUTE_SELF_POWERED|BMATTRIBUTE_RESERVED, - .bMaxPower = USBTTY_MAXPOWER - }, - .interface_desc = { - { - .bLength = - sizeof(struct usb_interface_descriptor), - .bDescriptorType = USB_DT_INTERFACE, - .bInterfaceNumber = 0, - .bAlternateSetting = 0, - .bNumEndpoints = NUM_ENDPOINTS, - .bInterfaceClass = - COMMUNICATIONS_INTERFACE_CLASS_VENDOR, - .bInterfaceSubClass = - COMMUNICATIONS_NO_SUBCLASS, - .bInterfaceProtocol = - COMMUNICATIONS_NO_PROTOCOL, - .iInterface = STR_DATA_INTERFACE - }, - }, - .data_endpoints = { - { - .bLength = - sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = UDC_OUT_ENDPOINT | USB_DIR_OUT, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - .wMaxPacketSize = - cpu_to_le16(CFG_USBD_SERIAL_OUT_PKTSIZE), - .bInterval= 0xFF, - }, - { - .bLength = - sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = UDC_IN_ENDPOINT | USB_DIR_IN, - .bmAttributes = USB_ENDPOINT_XFER_BULK, - .wMaxPacketSize = - cpu_to_le16(CFG_USBD_SERIAL_IN_PKTSIZE), - .bInterval = 0xFF, - }, - { - .bLength = - sizeof(struct usb_endpoint_descriptor), - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = UDC_INT_ENDPOINT | USB_DIR_IN, - .bmAttributes = USB_ENDPOINT_XFER_INT, - .wMaxPacketSize = - cpu_to_le16(CFG_USBD_SERIAL_INT_PKTSIZE), - .bInterval = 0xFF, - }, - }, - }, -}; - -/* - * Static Function Prototypes - */ - -static void usbtty_init_strings (void); -static void usbtty_init_instances (void); -static void usbtty_init_endpoints (void); -static void usbtty_init_terminal_type(short type); -static void usbtty_event_handler (struct usb_device_instance *device, - usb_device_event_t event, int data); -static int usbtty_cdc_setup(struct usb_device_request *request, - struct urb *urb); -static int usbtty_configured (void); -static int write_buffer (circbuf_t * buf); -static int fill_buffer (circbuf_t * buf); - -void usbtty_poll (void); - -/* utility function for converting char* to wide string used by USB */ -static void str2wide (char *str, u16 * wide) -{ - int i; - for (i = 0; i < strlen (str) && str[i]; i++){ - #if defined(__LITTLE_ENDIAN) - wide[i] = (u16) str[i]; - #elif defined(__BIG_ENDIAN) - wide[i] = ((u16)(str[i])<<8); - #else - #error "__LITTLE_ENDIAN or __BIG_ENDIAN undefined" - #endif - } -} - -/* - * Test whether a character is in the RX buffer - */ - -int usbtty_tstc(struct stdio_dev *dev) -{ - struct usb_endpoint_instance *endpoint = - &endpoint_instance[rx_endpoint]; - - /* If no input data exists, allow more RX to be accepted */ - if(usbtty_input.size <= 0){ - udc_unset_nak(endpoint->endpoint_address&0x03); - } - - usbtty_poll (); - return (usbtty_input.size > 0); -} - -/* - * Read a single byte from the usb client port. Returns 1 on success, 0 - * otherwise. When the function is succesfull, the character read is - * written into its argument c. - */ - -int usbtty_getc(struct stdio_dev *dev) -{ - char c; - struct usb_endpoint_instance *endpoint = - &endpoint_instance[rx_endpoint]; - - while (usbtty_input.size <= 0) { - udc_unset_nak(endpoint->endpoint_address&0x03); - usbtty_poll (); - } - - buf_pop (&usbtty_input, &c, 1); - udc_set_nak(endpoint->endpoint_address&0x03); - - return c; -} - -/* - * Output a single byte to the usb client port. - */ -void usbtty_putc(struct stdio_dev *dev, const char c) -{ - if (!usbtty_configured ()) - return; - - /* If \n, also do \r */ - if (c == '\n') - buf_push (&usbtty_output, "\r", 1); - - buf_push(&usbtty_output, &c, 1); - - /* Poll at end to handle new data... */ - if ((usbtty_output.size + 2) >= usbtty_output.totalsize) { - usbtty_poll (); - } -} - -/* usbtty_puts() helper function for finding the next '\n' in a string */ -static int next_nl_pos (const char *s) -{ - int i; - - for (i = 0; s[i] != '\0'; i++) { - if (s[i] == '\n') - return i; - } - return i; -} - -/* - * Output a string to the usb client port - implementing flow control - */ - -static void __usbtty_puts (const char *str, int len) -{ - int maxlen = usbtty_output.totalsize; - int space, n; - - /* break str into chunks < buffer size, if needed */ - while (len > 0) { - usbtty_poll (); - - space = maxlen - usbtty_output.size; - /* Empty buffer here, if needed, to ensure space... */ - if (space) { - write_buffer (&usbtty_output); - - n = min(space, min(len, maxlen)); - buf_push (&usbtty_output, str, n); - - str += n; - len -= n; - } - } -} - -void usbtty_puts(struct stdio_dev *dev, const char *str) -{ - int n; - int len; - - if (!usbtty_configured ()) - return; - - len = strlen (str); - /* add '\r' for each '\n' */ - while (len > 0) { - n = next_nl_pos (str); - - if (str[n] == '\n') { - __usbtty_puts(str, n); - __usbtty_puts("\r\n", 2); - str += (n + 1); - len -= (n + 1); - } else { - /* No \n found. All done. */ - __usbtty_puts (str, n); - break; - } - } - - /* Poll at end to handle new data... */ - usbtty_poll (); -} - -/* - * Initialize the usb client port. - * - */ -int drv_usbtty_init (void) -{ - int rc; - char * sn; - char * tt; - int snlen; - - /* Get serial number */ - sn = env_get("serial#"); - if (!sn) - sn = "000000000000"; - snlen = strlen(sn); - if (snlen > sizeof(serial_number) - 1) { - printf ("Warning: serial number %s is too long (%d > %lu)\n", - sn, snlen, (ulong)(sizeof(serial_number) - 1)); - snlen = sizeof(serial_number) - 1; - } - memcpy (serial_number, sn, snlen); - serial_number[snlen] = '\0'; - - /* Decide on which type of UDC device to be. - */ - tt = env_get("usbtty"); - if (!tt) - tt = "generic"; - usbtty_init_terminal_type(strcmp(tt,"cdc_acm")); - - /* prepare buffers... */ - buf_init (&usbtty_input, USBTTY_BUFFER_SIZE); - buf_init (&usbtty_output, USBTTY_BUFFER_SIZE); - - /* Now, set up USB controller and infrastructure */ - udc_init (); /* Basic USB initialization */ - - usbtty_init_strings (); - usbtty_init_instances (); - - usbtty_init_endpoints (); - - udc_startup_events (device_instance);/* Enable dev, init udc pointers */ - udc_connect (); /* Enable pullup for host detection */ - - /* Device initialization */ - memset (&usbttydev, 0, sizeof (usbttydev)); - - strcpy (usbttydev.name, "usbtty"); - usbttydev.ext = 0; /* No extensions */ - usbttydev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_OUTPUT; - usbttydev.tstc = usbtty_tstc; /* 'tstc' function */ - usbttydev.getc = usbtty_getc; /* 'getc' function */ - usbttydev.putc = usbtty_putc; /* 'putc' function */ - usbttydev.puts = usbtty_puts; /* 'puts' function */ - - rc = stdio_register (&usbttydev); - - return (rc == 0) ? 1 : rc; -} - -static void usbtty_init_strings (void) -{ - struct usb_string_descriptor *string; - - usbtty_string_table[STR_LANG] = - (struct usb_string_descriptor*)wstrLang; - - string = (struct usb_string_descriptor *) wstrManufacturer; - string->bLength = sizeof(wstrManufacturer); - string->bDescriptorType = USB_DT_STRING; - str2wide (CONFIG_USBD_MANUFACTURER, string->wData); - usbtty_string_table[STR_MANUFACTURER]=string; - - string = (struct usb_string_descriptor *) wstrProduct; - string->bLength = sizeof(wstrProduct); - string->bDescriptorType = USB_DT_STRING; - str2wide (CONFIG_USBD_PRODUCT_NAME, string->wData); - usbtty_string_table[STR_PRODUCT]=string; - - string = (struct usb_string_descriptor *) wstrSerial; - string->bLength = sizeof(serial_number); - string->bDescriptorType = USB_DT_STRING; - str2wide (serial_number, string->wData); - usbtty_string_table[STR_SERIAL]=string; - - string = (struct usb_string_descriptor *) wstrConfiguration; - string->bLength = sizeof(wstrConfiguration); - string->bDescriptorType = USB_DT_STRING; - str2wide (CFG_USBD_CONFIGURATION_STR, string->wData); - usbtty_string_table[STR_CONFIG]=string; - - string = (struct usb_string_descriptor *) wstrDataInterface; - string->bLength = sizeof(wstrDataInterface); - string->bDescriptorType = USB_DT_STRING; - str2wide (CFG_USBD_DATA_INTERFACE_STR, string->wData); - usbtty_string_table[STR_DATA_INTERFACE]=string; - - string = (struct usb_string_descriptor *) wstrCtrlInterface; - string->bLength = sizeof(wstrCtrlInterface); - string->bDescriptorType = USB_DT_STRING; - str2wide (CFG_USBD_CTRL_INTERFACE_STR, string->wData); - usbtty_string_table[STR_CTRL_INTERFACE]=string; - - /* Now, initialize the string table for ep0 handling */ - usb_strings = usbtty_string_table; -} - -#define init_wMaxPacketSize(x) le16_to_cpu(get_unaligned(\ - &ep_descriptor_ptrs[(x) - 1]->wMaxPacketSize)); - -static void usbtty_init_instances (void) -{ - int i; - - /* initialize device instance */ - memset (device_instance, 0, sizeof (struct usb_device_instance)); - device_instance->device_state = STATE_INIT; - device_instance->device_descriptor = &device_descriptor; - device_instance->event = usbtty_event_handler; - device_instance->cdc_recv_setup = usbtty_cdc_setup; - device_instance->bus = bus_instance; - device_instance->configurations = NUM_CONFIGS; - device_instance->configuration_instance_array = config_instance; - - /* initialize bus instance */ - memset (bus_instance, 0, sizeof (struct usb_bus_instance)); - bus_instance->device = device_instance; - bus_instance->endpoint_array = endpoint_instance; - bus_instance->max_endpoints = 1; - bus_instance->maxpacketsize = 64; - bus_instance->serial_number_str = serial_number; - - /* configuration instance */ - memset (config_instance, 0, - sizeof (struct usb_configuration_instance)); - config_instance->interfaces = interface_count; - config_instance->configuration_descriptor = configuration_descriptor; - config_instance->interface_instance_array = interface_instance; - - /* interface instance */ - memset (interface_instance, 0, - sizeof (struct usb_interface_instance)); - interface_instance->alternates = 1; - interface_instance->alternates_instance_array = alternate_instance; - - /* alternates instance */ - memset (alternate_instance, 0, - sizeof (struct usb_alternate_instance)); - alternate_instance->interface_descriptor = interface_descriptors; - alternate_instance->endpoints = NUM_ENDPOINTS; - alternate_instance->endpoints_descriptor_array = ep_descriptor_ptrs; - - /* endpoint instances */ - memset (&endpoint_instance[0], 0, - sizeof (struct usb_endpoint_instance)); - endpoint_instance[0].endpoint_address = 0; - endpoint_instance[0].rcv_packetSize = EP0_MAX_PACKET_SIZE; - endpoint_instance[0].rcv_attributes = USB_ENDPOINT_XFER_CONTROL; - endpoint_instance[0].tx_packetSize = EP0_MAX_PACKET_SIZE; - endpoint_instance[0].tx_attributes = USB_ENDPOINT_XFER_CONTROL; - udc_setup_ep (device_instance, 0, &endpoint_instance[0]); - - for (i = 1; i <= NUM_ENDPOINTS; i++) { - memset (&endpoint_instance[i], 0, - sizeof (struct usb_endpoint_instance)); - - endpoint_instance[i].endpoint_address = - ep_descriptor_ptrs[i - 1]->bEndpointAddress; - - endpoint_instance[i].rcv_attributes = - ep_descriptor_ptrs[i - 1]->bmAttributes; - - endpoint_instance[i].rcv_packetSize = init_wMaxPacketSize(i); - - endpoint_instance[i].tx_attributes = - ep_descriptor_ptrs[i - 1]->bmAttributes; - - endpoint_instance[i].tx_packetSize = init_wMaxPacketSize(i); - - endpoint_instance[i].tx_attributes = - ep_descriptor_ptrs[i - 1]->bmAttributes; - - urb_link_init (&endpoint_instance[i].rcv); - urb_link_init (&endpoint_instance[i].rdy); - urb_link_init (&endpoint_instance[i].tx); - urb_link_init (&endpoint_instance[i].done); - - if (endpoint_instance[i].endpoint_address & USB_DIR_IN) - endpoint_instance[i].tx_urb = - usbd_alloc_urb (device_instance, - &endpoint_instance[i]); - else - endpoint_instance[i].rcv_urb = - usbd_alloc_urb (device_instance, - &endpoint_instance[i]); - } -} - -static void usbtty_init_endpoints (void) -{ - int i; - - bus_instance->max_endpoints = NUM_ENDPOINTS + 1; - for (i = 1; i <= NUM_ENDPOINTS; i++) { - udc_setup_ep (device_instance, i, &endpoint_instance[i]); - } -} - -/* usbtty_init_terminal_type - * - * Do some late binding for our device type. - */ -static void usbtty_init_terminal_type(short type) -{ - switch(type){ - /* CDC ACM */ - case 0: - /* Assign endpoint descriptors */ - ep_descriptor_ptrs[0] = - &acm_configuration_descriptors[0].notification_endpoint; - ep_descriptor_ptrs[1] = - &acm_configuration_descriptors[0].data_endpoints[0]; - ep_descriptor_ptrs[2] = - &acm_configuration_descriptors[0].data_endpoints[1]; - - /* Enumerate Device Descriptor */ - device_descriptor.bDeviceClass = - COMMUNICATIONS_DEVICE_CLASS; - device_descriptor.idProduct = - cpu_to_le16(CONFIG_USBD_PRODUCTID_CDCACM); - - /* Assign endpoint indices */ - tx_endpoint = ACM_TX_ENDPOINT; - rx_endpoint = ACM_RX_ENDPOINT; - - /* Configuration Descriptor */ - configuration_descriptor = - (struct usb_configuration_descriptor*) - &acm_configuration_descriptors; - - /* Interface count */ - interface_count = NUM_ACM_INTERFACES; - break; - - /* BULK IN/OUT & Default */ - case 1: - default: - /* Assign endpoint descriptors */ - ep_descriptor_ptrs[0] = - &gserial_configuration_descriptors[0].data_endpoints[0]; - ep_descriptor_ptrs[1] = - &gserial_configuration_descriptors[0].data_endpoints[1]; - ep_descriptor_ptrs[2] = - &gserial_configuration_descriptors[0].data_endpoints[2]; - - /* Enumerate Device Descriptor */ - device_descriptor.bDeviceClass = 0xFF; - device_descriptor.idProduct = - cpu_to_le16(CONFIG_USBD_PRODUCTID_GSERIAL); - /* Assign endpoint indices */ - tx_endpoint = GSERIAL_TX_ENDPOINT; - rx_endpoint = GSERIAL_RX_ENDPOINT; - - /* Configuration Descriptor */ - configuration_descriptor = - (struct usb_configuration_descriptor*) - &gserial_configuration_descriptors; - - /* Interface count */ - interface_count = NUM_GSERIAL_INTERFACES; - break; - } -} - -/******************************************************************************/ - -static struct urb *next_urb (struct usb_device_instance *device, - struct usb_endpoint_instance *endpoint) -{ - struct urb *current_urb = NULL; - int space; - - /* If there's a queue, then we should add to the last urb */ - if (!endpoint->tx_queue) { - current_urb = endpoint->tx_urb; - } else { - /* Last urb from tx chain */ - current_urb = - p2surround (struct urb, link, endpoint->tx.prev); - } - - /* Make sure this one has enough room */ - space = current_urb->buffer_length - current_urb->actual_length; - if (space > 0) { - return current_urb; - } else { /* No space here */ - /* First look at done list */ - current_urb = first_urb_detached (&endpoint->done); - if (!current_urb) { - current_urb = usbd_alloc_urb (device, endpoint); - } - - urb_append (&endpoint->tx, current_urb); - endpoint->tx_queue++; - } - return current_urb; -} - -static int write_buffer (circbuf_t * buf) -{ - if (!usbtty_configured ()) { - return 0; - } - - struct usb_endpoint_instance *endpoint = - &endpoint_instance[tx_endpoint]; - struct urb *current_urb = NULL; - - /* TX data still exists - send it now - */ - if(endpoint->sent < endpoint->tx_urb->actual_length){ - if(udc_endpoint_write (endpoint)){ - /* Write pre-empted by RX */ - return -1; - } - } - - if (buf->size) { - char *dest; - - int space_avail; - int popnum, popped; - int total = 0; - - /* Break buffer into urb sized pieces, - * and link each to the endpoint - */ - while (buf->size > 0) { - - current_urb = next_urb (device_instance, endpoint); - - dest = (char*)current_urb->buffer + - current_urb->actual_length; - - space_avail = - current_urb->buffer_length - - current_urb->actual_length; - popnum = min(space_avail, (int)buf->size); - if (popnum == 0) - break; - - popped = buf_pop (buf, dest, popnum); - if (popped == 0) - break; - current_urb->actual_length += popped; - total += popped; - - /* If endpoint->last == 0, then transfers have - * not started on this endpoint - */ - if (endpoint->last == 0) { - if(udc_endpoint_write (endpoint)){ - /* Write pre-empted by RX */ - return -1; - } - } - - }/* end while */ - return total; - } - - return 0; -} - -static int fill_buffer (circbuf_t * buf) -{ - struct usb_endpoint_instance *endpoint = - &endpoint_instance[rx_endpoint]; - - if (endpoint->rcv_urb && endpoint->rcv_urb->actual_length) { - unsigned int nb = 0; - char *src = (char *) endpoint->rcv_urb->buffer; - unsigned int rx_avail = buf->totalsize - buf->size; - - if(rx_avail >= endpoint->rcv_urb->actual_length){ - - nb = endpoint->rcv_urb->actual_length; - buf_push (buf, src, nb); - endpoint->rcv_urb->actual_length = 0; - - } - return nb; - } - return 0; -} - -static int usbtty_configured (void) -{ - return usbtty_configured_flag; -} - -/******************************************************************************/ - -static void usbtty_event_handler (struct usb_device_instance *device, - usb_device_event_t event, int data) -{ - switch (event) { - case DEVICE_RESET: - case DEVICE_BUS_INACTIVE: - usbtty_configured_flag = 0; - break; - case DEVICE_CONFIGURED: - usbtty_configured_flag = 1; - break; - - case DEVICE_ADDRESS_ASSIGNED: - usbtty_init_endpoints (); - - default: - break; - } -} - -/******************************************************************************/ - -int usbtty_cdc_setup(struct usb_device_request *request, struct urb *urb) -{ - switch (request->bRequest){ - - case ACM_SET_CONTROL_LINE_STATE: /* Implies DTE ready */ - break; - case ACM_SEND_ENCAPSULATED_COMMAND : /* Required */ - break; - case ACM_SET_LINE_ENCODING : /* DTE stop/parity bits - * per character */ - break; - case ACM_GET_ENCAPSULATED_RESPONSE : /* request response */ - break; - case ACM_GET_LINE_ENCODING : /* request DTE rate, - * stop/parity bits */ - memcpy (urb->buffer , &rs232_desc, sizeof(rs232_desc)); - urb->actual_length = sizeof(rs232_desc); - - break; - default: - return 1; - } - return 0; -} - -/******************************************************************************/ - -/* - * Since interrupt handling has not yet been implemented, we use this function - * to handle polling. This is called by the tstc,getc,putc,puts routines to - * update the USB state. - */ -void usbtty_poll (void) -{ - /* New interrupts? */ - udc_irq(); - - /* Write any output data to host buffer - * (do this before checking interrupts to avoid missing one) - */ - if (usbtty_configured ()) { - write_buffer (&usbtty_output); - } - - /* New interrupts? */ - udc_irq(); - - /* Check for new data from host.. - * (do this after checking interrupts to get latest data) - */ - if (usbtty_configured ()) { - fill_buffer (&usbtty_input); - } - - /* New interrupts? */ - udc_irq(); - -} diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h deleted file mode 100644 index b176a7961b8..00000000000 --- a/drivers/serial/usbtty.h +++ /dev/null @@ -1,49 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2003 - * Gerry Hamel, geh@ti.com, Texas Instruments - * - * (C) Copyright 2006 - * Bryan O'Donoghue, bodonoghue@codehermit.ie, CodeHermit - */ - -#ifndef __USB_TTY_H__ -#define __USB_TTY_H__ - -#include -#if defined(CONFIG_PPC) -#include -#elif defined(CONFIG_CI_UDC) -#include -#endif - -#include -#include - -#ifndef CFG_USBD_CONFIGURATION_STR -#define CFG_USBD_CONFIGURATION_STR "TTY via USB" -#endif - -#define CFG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT -#define CFG_USBD_SERIAL_OUT_PKTSIZE UDC_OUT_PACKET_SIZE -#define CFG_USBD_SERIAL_IN_ENDPOINT UDC_IN_ENDPOINT -#define CFG_USBD_SERIAL_IN_PKTSIZE UDC_IN_PACKET_SIZE -#define CFG_USBD_SERIAL_INT_ENDPOINT UDC_INT_ENDPOINT -#define CFG_USBD_SERIAL_INT_PKTSIZE UDC_INT_PACKET_SIZE -#define CFG_USBD_SERIAL_BULK_PKTSIZE UDC_BULK_PACKET_SIZE - -#define USBTTY_DEVICE_CLASS COMMUNICATIONS_DEVICE_CLASS - -#define USBTTY_BCD_DEVICE 0x00 -#define USBTTY_MAXPOWER 0x00 - -#define STR_LANG 0x00 -#define STR_MANUFACTURER 0x01 -#define STR_PRODUCT 0x02 -#define STR_SERIAL 0x03 -#define STR_CONFIG 0x04 -#define STR_DATA_INTERFACE 0x05 -#define STR_CTRL_INTERFACE 0x06 -#define STR_COUNT 0x07 - -#endif diff --git a/include/serial.h b/include/serial.h index e5f6d984d28..0a707ca730d 100644 --- a/include/serial.h +++ b/include/serial.h @@ -48,26 +48,6 @@ extern int serial_assign(const char *name); extern void serial_reinit_all(void); int serial_initialize(void); -/* For usbtty */ -#ifdef CONFIG_USB_TTY - -struct stdio_dev; - -int usbtty_getc(struct stdio_dev *dev); -void usbtty_putc(struct stdio_dev *dev, const char c); -void usbtty_puts(struct stdio_dev *dev, const char *str); -int usbtty_tstc(struct stdio_dev *dev); - -#else - -/* stubs */ -#define usbtty_getc(dev) 0 -#define usbtty_putc(dev, a) -#define usbtty_puts(dev, a) -#define usbtty_tstc(dev) 0 - -#endif /* CONFIG_USB_TTY */ - struct udevice; enum serial_par { diff --git a/include/stdio_dev.h b/include/stdio_dev.h index 4e3c4708f80..f7f9c10199e 100644 --- a/include/stdio_dev.h +++ b/include/stdio_dev.h @@ -101,7 +101,6 @@ struct stdio_dev *stdio_clone(struct stdio_dev *dev); int drv_lcd_init(void); int drv_video_init(void); int drv_keyboard_init(void); -int drv_usbtty_init(void); int drv_usbacm_init(void); int drv_nc_init(void); int drv_jtag_console_init(void); diff --git a/lib/Makefile b/lib/Makefile index a7bc2f3134a..a30ce1595d5 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -28,11 +28,7 @@ obj-y += charset.o endif endif -ifdef CONFIG_USB_TTY -obj-y += circbuf.o -else obj-$(CONFIG_CIRCBUF) += circbuf.o -endif obj-y += crc8.o obj-$(CONFIG_ERRNO_STR) += errno_str.o -- cgit v1.3.1 From d41adba55337b3f01b773ddda37be1be5b5b0054 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Sat, 16 Nov 2024 14:33:47 +0200 Subject: board: xiaomi: mocha: add Xiaomi Mi Pad A0101 support The Mi Pad is a tablet computer based on Nvidia Tegra K1 SoC which originally ran the Android operating system. The Mi Pad has a 7.9" IPS display with 1536 x 2048 (324 ppi) resolution. 2 GB of RAM and 16/64 GB of internal memory that can be supplemented with a microSDXC card giving up to 128 GB of additional storage. Signed-off-by: Svyatoslav Ryhel --- arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra124-xiaomi-mocha.dts | 592 +++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra124/Kconfig | 5 + board/xiaomi/mocha/Kconfig | 12 + board/xiaomi/mocha/MAINTAINERS | 8 + board/xiaomi/mocha/Makefile | 9 + board/xiaomi/mocha/mocha-spl.c | 49 +++ board/xiaomi/mocha/mocha.c | 41 +++ board/xiaomi/mocha/mocha.env | 23 ++ configs/mocha_defconfig | 91 +++++ doc/board/index.rst | 1 + doc/board/xiaomi/index.rst | 9 + doc/board/xiaomi/mocha.rst | 112 +++++++ include/configs/mocha.h | 25 ++ 14 files changed, 978 insertions(+) create mode 100644 arch/arm/dts/tegra124-xiaomi-mocha.dts create mode 100644 board/xiaomi/mocha/Kconfig create mode 100644 board/xiaomi/mocha/MAINTAINERS create mode 100644 board/xiaomi/mocha/Makefile create mode 100644 board/xiaomi/mocha/mocha-spl.c create mode 100644 board/xiaomi/mocha/mocha.c create mode 100644 board/xiaomi/mocha/mocha.env create mode 100644 configs/mocha_defconfig create mode 100644 doc/board/xiaomi/index.rst create mode 100644 doc/board/xiaomi/mocha.rst create mode 100644 include/configs/mocha.h (limited to 'include') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 267b0179a5f..6096781cc44 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -121,6 +121,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += \ tegra124-nyan-big.dtb \ tegra124-cei-tk1-som.dtb \ tegra124-venice2.dtb \ + tegra124-xiaomi-mocha.dtb \ tegra186-p2771-0000-000.dtb \ tegra186-p2771-0000-500.dtb \ tegra210-p2371-0000.dtb \ diff --git a/arch/arm/dts/tegra124-xiaomi-mocha.dts b/arch/arm/dts/tegra124-xiaomi-mocha.dts new file mode 100644 index 00000000000..6cb1781566f --- /dev/null +++ b/arch/arm/dts/tegra124-xiaomi-mocha.dts @@ -0,0 +1,592 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include +#include "tegra124.dtsi" + +/ { + model = "Xiaomi Mi Pad A0101"; + compatible = "xiaomi,mocha", "nvidia,tegra124"; + + chosen { + stdout-path = &uartd; + }; + + aliases { + i2c0 = &pwr_i2c; + i2c1 = &gen1_i2c; + + mmc0 = &sdmmc4; /* eMMC */ + mmc1 = &sdmmc3; /* uSD slot */ + + usb0 = &usb1; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; + + host1x@50000000 { + dsia: dsi@54300000 { + status = "okay"; + + avdd-dsi-csi-supply = <&avdd_dsi_csi>; + nvidia,ganged-mode = <&dsib>; + + panel@0 { + compatible = "sharp,lq079l1sx01"; + reg = <0>; + + link2 = <&panel_secondary>; + + avdd-supply = <&avdd_lcd>; + vddio-supply = <&vdd_lcd_io>; + + vsp-supply = <&vsp_5v5_lcd>; + vsn-supply = <&vsn_5v5_lcd>; + + reset-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_LOW>; + + backlight = <&lp8556>; + }; + }; + + dsib: dsi@54400000 { + status = "okay"; + + avdd-dsi-csi-supply = <&avdd_dsi_csi>; + + panel_secondary: panel@0 { + compatible = "sharp,lq079l1sx01"; + reg = <0>; + }; + }; + }; + + pinmux@70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + /* Keys pinmux */ + keys { + nvidia,pins = "kb_col0_pq0", + "kb_col6_pq6", + "kb_col7_pq7"; + nvidia,function = "rsvd2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + hall-front { + nvidia,pins = "pi5"; + nvidia,function = "gmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + hall-back { + nvidia,pins = "gpio_w3_aud_pw3"; + nvidia,function = "spi1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + /* Leds pinmux */ + bl-en { + nvidia,pins = "pbb4"; + nvidia,function = "vgp4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + keys-led { + nvidia,pins = "ph1"; + nvidia,function = "pwm1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + /* Panel pinmux */ + lcd-rst { + nvidia,pins = "ph3"; + nvidia,function = "gmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + lcd-vsp { + nvidia,pins = "pi4"; + nvidia,function = "gmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + lcd-vsn { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + lcd-id { + nvidia,pins = "kb_row6_pr6"; + nvidia,function = "displaya_alt"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + lcd-pwm { + nvidia,pins = "ph2"; + nvidia,function = "pwm2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + /* SDMMC3 pinmux */ + sdmmc3-clk { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + sdmmc3-cmd { + nvidia,pins = "sdmmc3_cmd_pa7", + "sdmmc3_dat0_pb7", + "sdmmc3_dat1_pb6", + "sdmmc3_dat2_pb5", + "sdmmc3_dat3_pb4", + "sdmmc3_clk_lb_out_pee4", + "sdmmc3_clk_lb_in_pee5"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + sdmmc3-cd { + nvidia,pins = "sdmmc3_cd_n_pv2"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + usd-pwr { + nvidia,pins = "kb_row0_pr0"; + nvidia,function = "rsvd4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + /* SDMMC4 pinmux */ + sdmmc4-clk { + nvidia,pins = "sdmmc4_clk_pcc4"; + nvidia,function = "sdmmc4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + sdmmc4-cmd { + nvidia,pins = "sdmmc4_cmd_pt7", + "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + /* I2C pinmux */ + gen1-i2c { + nvidia,pins = "gen1_i2c_sda_pc5", + "gen1_i2c_scl_pc4"; + nvidia,function = "i2c1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,lock = <1>; + nvidia,open-drain = <1>; + }; + gen2-i2c { + nvidia,pins = "gen2_i2c_scl_pt5", + "gen2_i2c_sda_pt6"; + nvidia,function = "i2c2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,lock = <1>; + nvidia,open-drain = <1>; + }; + cam-i2c { + nvidia,pins = "cam_i2c_scl_pbb1", + "cam_i2c_sda_pbb2"; + nvidia,function = "i2c3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,lock = <1>; + nvidia,open-drain = <1>; + }; + ddc-i2c { + nvidia,pins = "ddc_scl_pv4", + "ddc_sda_pv5"; + nvidia,function = "i2c4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + pwr-i2c { + nvidia,pins = "pwr_i2c_scl_pz6", + "pwr_i2c_sda_pz7"; + nvidia,function = "i2cpwr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = <1>; + }; + + dsi-b { + nvidia,pins = "mipi_pad_ctrl_dsi_b"; + nvidia,function = "dsi_b"; + }; + + /* GPIO power/drive control */ + drive-sdio1 { + nvidia,pins = "drive_sdio1"; + nvidia,high-speed-mode = ; + nvidia,schmitt = ; + nvidia,low-power-mode = ; + nvidia,pull-down-strength = <32>; + nvidia,pull-up-strength = <42>; + nvidia,slew-rate-rising = ; + nvidia,slew-rate-falling = ; + }; + + drive-sdio3 { + nvidia,pins = "drive_sdio3"; + nvidia,high-speed-mode = ; + nvidia,schmitt = ; + nvidia,low-power-mode = ; + nvidia,pull-down-strength = <20>; + nvidia,pull-up-strength = <36>; + nvidia,slew-rate-rising = ; + nvidia,slew-rate-falling = ; + }; + + drive-gma { + nvidia,pins = "drive_gma"; + nvidia,high-speed-mode = ; + nvidia,schmitt = ; + nvidia,low-power-mode = ; + nvidia,pull-down-strength = <1>; + nvidia,pull-up-strength = <2>; + nvidia,slew-rate-rising = ; + nvidia,slew-rate-falling = ; + }; + }; + }; + + uartd: serial@70006300 { + status = "okay"; + }; + + gen1_i2c: i2c@7000c000 { + status = "okay"; + clock-frequency = <400000>; + + lp8556: backlight@2c { + compatible = "ti,lp8556"; + reg = <0x2c>; + + dev-ctrl = /bits/ 8 <0x83>; + init-brt = /bits/ 8 <0x1f>; + + power-supply = <&vdd_3v3_sys>; + enable-supply = <&vddio_1v8_bl>; + + rom-98h { + rom-addr = /bits/ 8 <0x98>; + rom-val = /bits/ 8 <0x80>; + }; + + rom-9eh { + rom-addr = /bits/ 8 <0x9e>; + rom-val = /bits/ 8 <0x21>; + }; + + rom-a0h { + rom-addr = /bits/ 8 <0xa0>; + rom-val = /bits/ 8 <0xff>; + }; + + rom-a1h { + rom-addr = /bits/ 8 <0xa1>; + rom-val = /bits/ 8 <0x3f>; + }; + + rom-a2h { + rom-addr = /bits/ 8 <0xa2>; + rom-val = /bits/ 8 <0x20>; + }; + + rom-a3h { + rom-addr = /bits/ 8 <0xa3>; + rom-val = /bits/ 8 <0x00>; + }; + + rom-a4h { + rom-addr = /bits/ 8 <0xa4>; + rom-val = /bits/ 8 <0x72>; + }; + + rom-a5h { + rom-addr = /bits/ 8 <0xa5>; + rom-val = /bits/ 8 <0x24>; + }; + + rom-a6h { + rom-addr = /bits/ 8 <0xa6>; + rom-val = /bits/ 8 <0x80>; + }; + + rom-a7h { + rom-addr = /bits/ 8 <0xa7>; + rom-val = /bits/ 8 <0xf5>; + }; + + rom-a8h { + rom-addr = /bits/ 8 <0xa8>; + rom-val = /bits/ 8 <0x24>; + }; + + rom-a9h { + rom-addr = /bits/ 8 <0xa9>; + rom-val = /bits/ 8 <0xb2>; + }; + + rom-aah { + rom-addr = /bits/ 8 <0xaa>; + rom-val = /bits/ 8 <0x8f>; + }; + + rom-aeh { + rom-addr = /bits/ 8 <0xae>; + rom-val = /bits/ 8 <0x0f>; + }; + }; + }; + + pwr_i2c: i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + /* Texas Instruments TPS65913 PMIC */ + pmic: tps65913@58 { + compatible = "ti,tps65913"; + reg = <0x58>; + + interrupts = ; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + palmas_gpio: gpio { + compatible = "ti,palmas-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + pinmux { + compatible = "ti,tps65913-pinctrl"; + + pinctrl-names = "default"; + pinctrl-0 = <&palmas_default>; + + palmas_default: pinmux { + pin_gpio4 { + pins = "gpio4"; + function = "gpio"; + }; + }; + }; + + pmic { + compatible = "ti,tps65913-pmic"; + + regulators { + vdd_1v8_vio: smps8 { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_hv_sdmmc: smps9 { + regulator-name = "vdd_hv_sdmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + avdd_lcd: ldo2 { + regulator-name = "avdd_lcd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + avdd_dsi_csi: ldo5 { + regulator-name = "avdd_dsi_csi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + }; + + vddio_usd: ldo9 { + regulator-name = "vddio_sdmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + avdd_usb: ldousb { + regulator-name = "vdd_usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; + }; + + sdmmc3: sdhci@700b0400 { + status = "okay"; + bus-width = <4>; + + cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>; + power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; + + vmmc-supply = <&vdd_hv_sdmmc>; + vqmmc-supply = <&vddio_usd>; + }; + + sdmmc4: sdhci@700b0600 { + status = "okay"; + bus-width = <8>; + non-removable; + + vmmc-supply = <&vdd_hv_sdmmc>; + vqmmc-supply = <&vdd_1v8_vio>; + }; + + usb1: usb@7d000000 { + status = "okay"; + dr_mode = "otg"; + }; + + clk32k_in: clock-32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "ref-oscillator"; + }; + + extcon-keys { + compatible = "gpio-keys"; + + switch-back-hall-sensor { + label = "Hall sensor (back)"; + gpios = <&gpio TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + switch-front-hall-sensor { + label = "Hall sensor (front)"; + gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&gpio TEGRA_GPIO(Q, 6) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + vdd_3v3_sys: regulator-bl-en { + compatible = "regulator-fixed"; + regulator-name = "vdd_5v0_bl"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + }; + + vddio_1v8_bl: regulator-bl-io { + compatible = "regulator-fixed"; + regulator-name = "vddio_1v8_bl"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>; + }; + + vdd_lcd_io: regulator-lcdvio { + compatible = "regulator-fixed"; + regulator-name = "dvdd_lcd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + gpio = <&palmas_gpio 4 GPIO_ACTIVE_HIGH>; + }; + + vsp_5v5_lcd: regulator-vsp { + compatible = "regulator-fixed"; + regulator-name = "avdd_lcd_vsp"; + regulator-min-microvolt = <5500000>; + regulator-max-microvolt = <5500000>; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>; + }; + + vsn_5v5_lcd: regulator-vsn { + compatible = "regulator-fixed"; + regulator-name = "avdd_lcd_vsn"; + regulator-min-microvolt = <5500000>; + regulator-max-microvolt = <5500000>; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>; + }; +}; diff --git a/arch/arm/mach-tegra/tegra124/Kconfig b/arch/arm/mach-tegra/tegra124/Kconfig index 84c8f86bad0..a62b055f7e6 100644 --- a/arch/arm/mach-tegra/tegra124/Kconfig +++ b/arch/arm/mach-tegra/tegra124/Kconfig @@ -30,6 +30,10 @@ config TARGET_CEI_TK1_SOM the SoC are assigned to which functions, and the PCIEe configuration. +config TARGET_MOCHA + bool "Xiaomi Tegra124 Mi Pad board" + select BOARD_LATE_INIT + config TARGET_NYAN_BIG bool "Google/NVIDIA Nyan-big Chromebook" select BOARD_LATE_INIT @@ -54,5 +58,6 @@ source "board/nvidia/jetson-tk1/Kconfig" source "board/nvidia/nyan-big/Kconfig" source "board/nvidia/venice2/Kconfig" source "board/toradex/apalis-tk1/Kconfig" +source "board/xiaomi/mocha/Kconfig" endif diff --git a/board/xiaomi/mocha/Kconfig b/board/xiaomi/mocha/Kconfig new file mode 100644 index 00000000000..25c61d4169e --- /dev/null +++ b/board/xiaomi/mocha/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MOCHA + +config SYS_BOARD + default "mocha" + +config SYS_VENDOR + default "xiaomi" + +config SYS_CONFIG_NAME + default "mocha" + +endif diff --git a/board/xiaomi/mocha/MAINTAINERS b/board/xiaomi/mocha/MAINTAINERS new file mode 100644 index 00000000000..c3871a15a35 --- /dev/null +++ b/board/xiaomi/mocha/MAINTAINERS @@ -0,0 +1,8 @@ +MOCHA BOARD +M: Svyatoslav Ryhel +S: Maintained +F: arch/arm/dts/tegra124-xiaomi-mocha.dts +F: board/xiaomi/mocha/ +F: configs/mocha_defconfig +F: doc/board/xiaomi/mocha.rst +F: include/configs/mocha.h diff --git a/board/xiaomi/mocha/Makefile b/board/xiaomi/mocha/Makefile new file mode 100644 index 00000000000..c42e42639b3 --- /dev/null +++ b/board/xiaomi/mocha/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2024, Svyatoslav Ryhel +# + +obj-$(CONFIG_XPL_BUILD) += mocha-spl.o + +obj-y += mocha.o + diff --git a/board/xiaomi/mocha/mocha-spl.c b/board/xiaomi/mocha/mocha-spl.c new file mode 100644 index 00000000000..5fb11df0a93 --- /dev/null +++ b/board/xiaomi/mocha/mocha-spl.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Mocha SPL stage configuration + * + * (C) Copyright 2024 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +#define TPS65913_I2C_ADDR (0x58 << 1) + +#define TPS65913_SMPS12_CTRL 0x20 +#define TPS65913_SMPS12_VOLTAGE 0x23 +#define TPS65913_SMPS45_CTRL 0x28 +#define TPS65913_SMPS45_VOLTAGE 0x2B +#define TPS65913_SMPS7_CTRL 0x30 +#define TPS65913_SMPS7_VOLTAGE 0x33 + +#define TPS65913_SMPS12_CTRL_DATA (0x5100 | TPS65913_SMPS12_CTRL) +#define TPS65913_SMPS12_VOLTAGE_DATA (0x3800 | TPS65913_SMPS12_VOLTAGE) +#define TPS65913_SMPS45_CTRL_DATA (0x5100 | TPS65913_SMPS45_CTRL) +#define TPS65913_SMPS45_VOLTAGE_DATA (0x3800 | TPS65913_SMPS45_VOLTAGE) +#define TPS65913_SMPS7_CTRL_DATA (0x5100 | TPS65913_SMPS7_CTRL) +#define TPS65913_SMPS7_VOLTAGE_DATA (0x4700 | TPS65913_SMPS7_VOLTAGE) + +void pmic_enable_cpu_vdd(void) +{ + /* Set CORE VDD to 1.150V. */ + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS7_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS7_CTRL_DATA); + + udelay(1000); + + /* Set CPU VDD to 1.0V. */ + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS12_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS12_CTRL_DATA); + udelay(10 * 1000); + + /* Set GPU VDD to 1.0V. */ + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS45_VOLTAGE_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65913_I2C_ADDR, TPS65913_SMPS45_CTRL_DATA); + udelay(10 * 1000); +} diff --git a/board/xiaomi/mocha/mocha.c b/board/xiaomi/mocha/mocha.c new file mode 100644 index 00000000000..5026d541a5f --- /dev/null +++ b/board/xiaomi/mocha/mocha.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2024 + * Svyatoslav Ryhel + */ + +#include +#include +#include +#include + +#ifdef CONFIG_MMC_SDHCI_TEGRA + +#define TPS65913_I2C_ADDRESS 0x58 +#define TPS65913_PRIMARY_SECONDARY_PAD2 0xfb +#define GPIO_4 BIT(0) +#define TPS65913_PRIMARY_SECONDARY_PAD3 0xfe +#define DVFS2 BIT(1) +#define DVFS1 BIT(0) + +/* We are using this function only till palmas pinctrl driver is available */ +void pin_mux_mmc(void) +{ + struct udevice *dev; + int ret; + + ret = i2c_get_chip_for_busnum(0, TPS65913_I2C_ADDRESS, 1, &dev); + if (ret) { + log_debug("%s: cannot find PMIC I2C chip\n", __func__); + return; + } + + /* GPIO4 function has to be GPIO */ + dm_i2c_reg_clrset(dev, TPS65913_PRIMARY_SECONDARY_PAD2, + GPIO_4, 0); + + /* DVFS1 and DVFS2 are disabled */ + dm_i2c_reg_clrset(dev, TPS65913_PRIMARY_SECONDARY_PAD3, + DVFS2 | DVFS1, 0); +} +#endif diff --git a/board/xiaomi/mocha/mocha.env b/board/xiaomi/mocha/mocha.env new file mode 100644 index 00000000000..d93e24316f6 --- /dev/null +++ b/board/xiaomi/mocha/mocha.env @@ -0,0 +1,23 @@ +#include + +button_cmd_0_name=Volume Down +button_cmd_0=bootmenu +button_cmd_1_name=Hall sensor (back) +button_cmd_1=poweroff +button_cmd_1_name=Hall sensor (front) +button_cmd_1=poweroff + +partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs} + +boot_block_size_r=0x400000 +boot_block_size=0x2000 +boot_dev=1 + +bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu +bootmenu_1=mount external storage=usb start && ums 0 mmc 1; bootmenu +bootmenu_2=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu +bootmenu_3=update bootloader=run flash_uboot +bootmenu_4=reboot RCM=enterrcm +bootmenu_5=reboot=reset +bootmenu_6=power off=poweroff +bootmenu_delay=-1 diff --git a/configs/mocha_defconfig b/configs/mocha_defconfig new file mode 100644 index 00000000000..0cbedb21797 --- /dev/null +++ b/configs/mocha_defconfig @@ -0,0 +1,91 @@ +CONFIG_ARM=y +CONFIG_ARCH_TEGRA=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y +CONFIG_TEXT_BASE=0x80110000 +CONFIG_SYS_MALLOC_LEN=0x2500000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SOURCE_FILE="mocha" +CONFIG_ENV_SIZE=0x3000 +CONFIG_ENV_OFFSET=0xFFFFD000 +CONFIG_DEFAULT_DEVICE_TREE="tegra124-xiaomi-mocha" +CONFIG_SPL_STACK=0x800ffffc +CONFIG_SPL_TEXT_BASE=0x80108000 +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_TEGRA124=y +CONFIG_TARGET_MOCHA=y +CONFIG_TEGRA_ENABLE_UARTD=y +CONFIG_CMD_EBTUPDATE=y +CONFIG_TEGRA_GPU=y +CONFIG_BUTTON_CMD=y +CONFIG_BOOTDELAY=0 +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTCOMMAND="bootflow scan; echo 'Boot configuration not found... Power off in 3 sec'; sleep 3; poweroff" +CONFIG_SYS_PBSIZE=2086 +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80090000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x10000 +CONFIG_SYS_PROMPT="Tegra124 (Mocha) # " +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_UMS_ABORT_KEYED=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PAUSE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_BUTTON=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_PALMAS_GPIO=y +CONFIG_SYS_I2C_TEGRA=y +CONFIG_BUTTON_KEYBOARD=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_PALMAS=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PWM_TEGRA=y +CONFIG_SYS_NS16550=y +CONFIG_SYSRESET_PALMAS=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xiaomi" +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d +CONFIG_CI_UDC=y +CONFIG_VIDEO=y +CONFIG_VIDEO_BRIDGE=y +# CONFIG_VIDEO_FONT_8X16 is not set +CONFIG_VIDEO_FONT_16X32=y +# CONFIG_VIDEO_LOGO is not set +CONFIG_VIDEO_LCD_SHARP_LQ079L1SX01=y +CONFIG_BACKLIGHT_LP855x=y +CONFIG_VIDEO_DSI_TEGRA30=y diff --git a/doc/board/index.rst b/doc/board/index.rst index b055046e649..84c135e02c1 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -69,4 +69,5 @@ Board-specific doc variscite/index wexler/index xen/index + xiaomi/index xilinx/index diff --git a/doc/board/xiaomi/index.rst b/doc/board/xiaomi/index.rst new file mode 100644 index 00000000000..109ab4a251f --- /dev/null +++ b/doc/board/xiaomi/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Xiaomi +====== + +.. toctree:: + :maxdepth: 2 + + mocha diff --git a/doc/board/xiaomi/mocha.rst b/doc/board/xiaomi/mocha.rst new file mode 100644 index 00000000000..be3e333127b --- /dev/null +++ b/doc/board/xiaomi/mocha.rst @@ -0,0 +1,112 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the Xiaomi Mi Pad tablet +=================================== + +``DISCLAMER!`` Moving your Xiaomi Mi Pad to use U-Boot assumes replacement +of the vendor bootloader. Vendor Android firmwares will no longer be able +to run on the device. This replacement IS reversible. + +Quick Start +----------- + +- Build U-Boot +- Boot U-Boot +- Process and flash U-Boot +- Boot Linux +- Self Upgrading +- Chainload configuration + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=arm-none-eabi- + $ make mocha_defconfig + $ make + +After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin`` +image, ready for booting or further processing. + +Boot U-Boot +----------- +Existing tegrarcm loader can be used to pre-load U-Boot you have build +into RAM and basically perform a tethered cold-boot. + +.. code-block:: bash + + $ tegrarcm --bct mocha.bct --bootloader u-boot-dtb-tegra.bin --loadaddr 0x80108000 + +U-Boot will try to load Linux kernel and if fails, it will turn the +tablet off. While pre-loading U-Boot, hold the ``volume down`` button +which will trigger the bootmenu. + +Process and flash U-Boot +------------------------ + +``DISCLAMER!`` All questions related to the re-crypt work should be asked +in re-crypt repo issues. NOT HERE! + +re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into +form usable by device. This process is required only on the first +installation or to recover the device in case of a failed update. + +.. code-block:: bash + + $ git clone https://gitlab.com/grate-driver/re-crypt.git + $ cd re-crypt # place your u-boot-dtb-tegra.bin here + $ ./re-crypt.py --dev mocha + +The script will produce ``bct.img`` and ``ebt.img`` ready to flash. + +Permanent installation can be performed by pre-loading just built U-Boot +into RAM via tegrarcm. While pre-loading U-Boot, hold the ``volume down`` +button which will trigger the bootmenu. There, select ``fastboot`` using +the volume and power buttons. + +After, on host PC, do: + +.. code-block:: bash + + $ fastboot flash 0.1 bct.img + $ fastboot flash 0.2 ebt.img + $ fastboot reboot + +Device will reboot. + +Boot Linux +---------- + +To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on +eMMC. Additionally, if the ``volume down`` button is pressed while booting, the +device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC +as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console +and update bootloader (check the next chapter). + +Flashing ``bct.img`` and ``ebt.img`` eliminates vendor restrictions on eMMC and +allows the user to use/partition it in any way the user desires. + +Self Upgrading +-------------- + +Place your ``u-boot-dtb-tegra.bin`` on the first partition of the MicroSD card +and insert it into the tablet. Enter bootmenu, choose update the bootloader +option with the Power button and U-Boot should update itself. Once the process +is completed, U-Boot will ask to press any button to reboot. + +Chainload configuration +----------------------- + +To build U-Boot without SPL suitable for chainloading adjust mocha_defconfig: + +.. code-block:: + + CONFIG_TEXT_BASE=0x80A00000 + CONFIG_SKIP_LOWLEVEL_INIT=y + # CONFIG_OF_BOARD_SETUP is not set + CONFIG_TEGRA_SUPPORT_NON_SECURE=y + +After the build succeeds, you will obtain the final ``u-boot-dtb.bin`` +file, ready for booting using vendor bootloader's fastboot or which can be +further processed into a flashable image. diff --git a/include/configs/mocha.h b/include/configs/mocha.h new file mode 100644 index 00000000000..1c2eb906085 --- /dev/null +++ b/include/configs/mocha.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. + * + * Copyright (c) 2024, Svyatoslav Ryhel + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "tegra124-common.h" + +/* High-level configuration options */ +#define CFG_TEGRA_BOARD_STRING "Xiaomi Mocha" + +/* Board-specific serial config */ +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE + +#ifdef CONFIG_TEGRA_SUPPORT_NON_SECURE + #define CFG_PRAM 0x38400 /* 225 MB */ +#endif + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ -- cgit v1.3.1 From c9671c9036d465e0681d947b0b7a76019a096758 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 2 Mar 2025 02:24:42 +0100 Subject: net: miiphybb: Split off struct bb_miiphy_bus_ops Move miiphybb operations into separate struct bb_miiphy_bus_ops structure, add pointer to struct bb_miiphy_bus_ops into the base struct bb_miiphy_bus and access the ops through this pointer in miiphybb generic code. The variable reshuffling in miiphybb.c cannot be easily avoided. Signed-off-by: Marek Vasut Reviewed-by: Paul Barker --- board/gdsys/a38x/ihs_phys.c | 16 ++-- drivers/net/designware.c | 18 +++-- drivers/net/phy/miiphybb.c | 178 +++++++++++++++++++++++--------------------- drivers/net/ravb.c | 16 ++-- drivers/net/sh_eth.c | 16 ++-- include/miiphy.h | 8 +- 6 files changed, 139 insertions(+), 113 deletions(-) (limited to 'include') diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c index 0c68087912a..c999ab6d6fa 100644 --- a/board/gdsys/a38x/ihs_phys.c +++ b/board/gdsys/a38x/ihs_phys.c @@ -219,6 +219,15 @@ static int mii_delay(struct bb_miiphy_bus *bus) return 0; } +static const struct bb_miiphy_bus_ops mii_bb_miiphy_bus_ops = { + .mdio_active = mii_mdio_active, + .mdio_tristate = mii_mdio_tristate, + .set_mdio = mii_set_mdio, + .get_mdio = mii_get_mdio, + .set_mdc = mii_set_mdc, + .delay = mii_delay, +}; + int register_miiphy_bus(uint k, struct mii_dev **bus) { struct bb_miiphy_bus *bb_miiphy = bb_miiphy_alloc(); @@ -234,12 +243,7 @@ int register_miiphy_bus(uint k, struct mii_dev **bus) mdiodev->write = bb_miiphy_write; /* Copy the bus accessors and private data */ - bb_miiphy->mdio_active = mii_mdio_active; - bb_miiphy->mdio_tristate = mii_mdio_tristate; - bb_miiphy->set_mdio = mii_set_mdio; - bb_miiphy->get_mdio = mii_get_mdio; - bb_miiphy->set_mdc = mii_set_mdc; - bb_miiphy->delay = mii_delay; + bb_miiphy->ops = &mii_bb_miiphy_bus_ops; bb_miiphy->priv = &gpio_mii_set[k]; retval = mdio_register(mdiodev); diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 5a6e89c0575..045bff476d1 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -290,6 +290,15 @@ static int dw_eth_bb_delay(struct bb_miiphy_bus *bus) return 0; } +static const struct bb_miiphy_bus_ops dw_eth_bb_miiphy_bus_ops = { + .mdio_active = dw_eth_bb_mdio_active, + .mdio_tristate = dw_eth_bb_mdio_tristate, + .set_mdio = dw_eth_bb_set_mdio, + .get_mdio = dw_eth_bb_get_mdio, + .set_mdc = dw_eth_bb_set_mdc, + .delay = dw_eth_bb_delay, +}; + static int dw_bb_mdio_init(const char *name, struct udevice *dev) { struct dw_eth_dev *dwpriv = dev_get_priv(dev); @@ -330,16 +339,9 @@ static int dw_bb_mdio_init(const char *name, struct udevice *dev) #if CONFIG_IS_ENABLED(DM_GPIO) bus->reset = dw_mdio_reset; #endif + bus->ops = &dw_eth_bb_miiphy_bus_ops; bus->priv = dwpriv; - /* Copy the bus accessors and private data */ - bb_miiphy->mdio_active = dw_eth_bb_mdio_active; - bb_miiphy->mdio_tristate = dw_eth_bb_mdio_tristate; - bb_miiphy->set_mdio = dw_eth_bb_set_mdio; - bb_miiphy->get_mdio = dw_eth_bb_get_mdio; - bb_miiphy->set_mdc = dw_eth_bb_set_mdc; - bb_miiphy->delay = dw_eth_bb_delay; - return mdio_register(bus); } #endif diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c index 553af2c1032..e6106341eb3 100644 --- a/drivers/net/phy/miiphybb.c +++ b/drivers/net/phy/miiphybb.c @@ -46,8 +46,8 @@ void bb_miiphy_free(struct bb_miiphy_bus *bus) * Utility to send the preamble, address, and register (common to read * and write). */ -static void miiphy_pre(struct bb_miiphy_bus *bus, char read, - unsigned char addr, unsigned char reg) +static void miiphy_pre(struct bb_miiphy_bus *bus, const struct bb_miiphy_bus_ops *ops, + char read, unsigned char addr, unsigned char reg) { int j; @@ -59,62 +59,62 @@ static void miiphy_pre(struct bb_miiphy_bus *bus, char read, * but it is safer and will be much more robust. */ - bus->mdio_active(bus); - bus->set_mdio(bus, 1); + ops->mdio_active(bus); + ops->set_mdio(bus, 1); for (j = 0; j < 32; j++) { - bus->set_mdc(bus, 0); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->set_mdc(bus, 0); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); } /* send the start bit (01) and the read opcode (10) or write (10) */ - bus->set_mdc(bus, 0); - bus->set_mdio(bus, 0); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); - bus->set_mdc(bus, 0); - bus->set_mdio(bus, 1); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); - bus->set_mdc(bus, 0); - bus->set_mdio(bus, read); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); - bus->set_mdc(bus, 0); - bus->set_mdio(bus, !read); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->set_mdc(bus, 0); + ops->set_mdio(bus, 0); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); + ops->set_mdc(bus, 0); + ops->set_mdio(bus, 1); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); + ops->set_mdc(bus, 0); + ops->set_mdio(bus, read); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); + ops->set_mdc(bus, 0); + ops->set_mdio(bus, !read); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); /* send the PHY address */ for (j = 0; j < 5; j++) { - bus->set_mdc(bus, 0); + ops->set_mdc(bus, 0); if ((addr & 0x10) == 0) { - bus->set_mdio(bus, 0); + ops->set_mdio(bus, 0); } else { - bus->set_mdio(bus, 1); + ops->set_mdio(bus, 1); } - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); addr <<= 1; } /* send the register address */ for (j = 0; j < 5; j++) { - bus->set_mdc(bus, 0); + ops->set_mdc(bus, 0); if ((reg & 0x10) == 0) { - bus->set_mdio(bus, 0); + ops->set_mdio(bus, 0); } else { - bus->set_mdio(bus, 1); + ops->set_mdio(bus, 1); } - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); reg <<= 1; } } @@ -132,56 +132,59 @@ int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg) int v; int j; /* counter */ struct bb_miiphy_bus *bus; + const struct bb_miiphy_bus_ops *ops; bus = bb_miiphy_getbus(miidev); if (bus == NULL) { return -1; } - miiphy_pre (bus, 1, addr, reg); + ops = bus->ops; + + miiphy_pre(bus, ops, 1, addr, reg); /* tri-state our MDIO I/O pin so we can read */ - bus->set_mdc(bus, 0); - bus->mdio_tristate(bus); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->set_mdc(bus, 0); + ops->mdio_tristate(bus); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); /* check the turnaround bit: the PHY should be driving it to zero */ - bus->get_mdio(bus, &v); + ops->get_mdio(bus, &v); if (v != 0) { /* puts ("PHY didn't drive TA low\n"); */ for (j = 0; j < 32; j++) { - bus->set_mdc(bus, 0); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->set_mdc(bus, 0); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); } /* There is no PHY, return */ return -1; } - bus->set_mdc(bus, 0); - bus->delay(bus); + ops->set_mdc(bus, 0); + ops->delay(bus); /* read 16 bits of register data, MSB first */ rdreg = 0; for (j = 0; j < 16; j++) { - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); rdreg <<= 1; - bus->get_mdio(bus, &v); + ops->get_mdio(bus, &v); rdreg |= (v & 0x1); - bus->set_mdc(bus, 0); - bus->delay(bus); + ops->set_mdc(bus, 0); + ops->delay(bus); } - bus->set_mdc(bus, 1); - bus->delay(bus); - bus->set_mdc(bus, 0); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); + ops->set_mdc(bus, 0); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); debug("%s[%s](0x%x) @ 0x%x = 0x%04x\n", __func__, miidev->name, reg, addr, rdreg); @@ -199,6 +202,7 @@ int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, u16 value) { struct bb_miiphy_bus *bus; + const struct bb_miiphy_bus_ops *ops; int j; /* counter */ bus = bb_miiphy_getbus(miidev); @@ -207,42 +211,44 @@ int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, return -1; } - miiphy_pre (bus, 0, addr, reg); + ops = bus->ops; + + miiphy_pre(bus, ops, 0, addr, reg); /* send the turnaround (10) */ - bus->set_mdc(bus, 0); - bus->set_mdio(bus, 1); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); - bus->set_mdc(bus, 0); - bus->set_mdio(bus, 0); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->set_mdc(bus, 0); + ops->set_mdio(bus, 1); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); + ops->set_mdc(bus, 0); + ops->set_mdio(bus, 0); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); /* write 16 bits of register data, MSB first */ for (j = 0; j < 16; j++) { - bus->set_mdc(bus, 0); + ops->set_mdc(bus, 0); if ((value & 0x00008000) == 0) { - bus->set_mdio(bus, 0); + ops->set_mdio(bus, 0); } else { - bus->set_mdio(bus, 1); + ops->set_mdio(bus, 1); } - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); value <<= 1; } /* * Tri-state the MDIO line. */ - bus->mdio_tristate(bus); - bus->set_mdc(bus, 0); - bus->delay(bus); - bus->set_mdc(bus, 1); - bus->delay(bus); + ops->mdio_tristate(bus); + ops->set_mdc(bus, 0); + ops->delay(bus); + ops->set_mdc(bus, 1); + ops->delay(bus); return 0; } diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index cb727ae9bc1..bd4900270a2 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -549,6 +549,15 @@ static int ravb_bb_delay(struct bb_miiphy_bus *bus) return 0; } +static const struct bb_miiphy_bus_ops ravb_bb_miiphy_bus_ops = { + .mdio_active = ravb_bb_mdio_active, + .mdio_tristate = ravb_bb_mdio_tristate, + .set_mdio = ravb_bb_set_mdio, + .get_mdio = ravb_bb_get_mdio, + .set_mdc = ravb_bb_set_mdc, + .delay = ravb_bb_delay, +}; + static int ravb_probe(struct udevice *dev) { struct eth_pdata *pdata = dev_get_plat(dev); @@ -578,12 +587,7 @@ static int ravb_probe(struct udevice *dev) snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name); /* Copy the bus accessors and private data */ - bb_miiphy->mdio_active = ravb_bb_mdio_active; - bb_miiphy->mdio_tristate = ravb_bb_mdio_tristate; - bb_miiphy->set_mdio = ravb_bb_set_mdio; - bb_miiphy->get_mdio = ravb_bb_get_mdio; - bb_miiphy->set_mdc = ravb_bb_set_mdc; - bb_miiphy->delay = ravb_bb_delay; + bb_miiphy->ops = &ravb_bb_miiphy_bus_ops; bb_miiphy->priv = eth; ret = mdio_register(mdiodev); diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 83e48609224..0693c240fbd 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -711,6 +711,15 @@ static int sh_eth_bb_delay(struct bb_miiphy_bus *bus) return 0; } +static const struct bb_miiphy_bus_ops sh_ether_bb_miiphy_bus_ops = { + .mdio_active = sh_eth_bb_mdio_active, + .mdio_tristate = sh_eth_bb_mdio_tristate, + .set_mdio = sh_eth_bb_set_mdio, + .get_mdio = sh_eth_bb_get_mdio, + .set_mdc = sh_eth_bb_set_mdc, + .delay = sh_eth_bb_delay, +}; + static int sh_ether_probe(struct udevice *udev) { struct eth_pdata *pdata = dev_get_plat(udev); @@ -740,12 +749,7 @@ static int sh_ether_probe(struct udevice *udev) snprintf(mdiodev->name, sizeof(mdiodev->name), udev->name); /* Copy the bus accessors and private data */ - bb_miiphy->mdio_active = sh_eth_bb_mdio_active; - bb_miiphy->mdio_tristate = sh_eth_bb_mdio_tristate; - bb_miiphy->set_mdio = sh_eth_bb_set_mdio; - bb_miiphy->get_mdio = sh_eth_bb_get_mdio; - bb_miiphy->set_mdc = sh_eth_bb_set_mdc; - bb_miiphy->delay = sh_eth_bb_delay; + bb_miiphy->ops = &sh_ether_bb_miiphy_bus_ops; bb_miiphy->priv = eth; ret = mdio_register(mdiodev); diff --git a/include/miiphy.h b/include/miiphy.h index f2ff7506ee8..5fd86bef882 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -62,14 +62,20 @@ void mdio_list_devices(void); #define BB_MII_DEVNAME "bb_miiphy" -struct bb_miiphy_bus { +struct bb_miiphy_bus; + +struct bb_miiphy_bus_ops { int (*mdio_active)(struct bb_miiphy_bus *bus); int (*mdio_tristate)(struct bb_miiphy_bus *bus); int (*set_mdio)(struct bb_miiphy_bus *bus, int v); int (*get_mdio)(struct bb_miiphy_bus *bus, int *v); int (*set_mdc)(struct bb_miiphy_bus *bus, int v); int (*delay)(struct bb_miiphy_bus *bus); +}; + +struct bb_miiphy_bus { void *priv; + const struct bb_miiphy_bus_ops *ops; struct mii_dev mii; }; -- cgit v1.3.1 From c5318bdcf80965fddccf68146c7838816aedb154 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 2 Mar 2025 02:24:44 +0100 Subject: net: miiphybb: Pass struct bb_miiphy_bus_ops directly to bb_miiphy_read/write() The access to struct bb_miiphy_bus_ops via ops pointer in struct bb_miiphy_bus is not necessary with wrappers added in previous patch. Pass the ops pointer directly to both bb_miiphy_read() and bb_miiphy_write() functions. Signed-off-by: Marek Vasut Reviewed-by: Paul Barker --- board/gdsys/a38x/ihs_phys.c | 7 ++++--- drivers/net/designware.c | 7 ++++--- drivers/net/phy/miiphybb.c | 13 ++++--------- drivers/net/ravb.c | 7 ++++--- drivers/net/sh_eth.c | 7 ++++--- include/miiphy.h | 8 ++++---- 6 files changed, 24 insertions(+), 25 deletions(-) (limited to 'include') diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c index 304b5b5f0bc..6176a47cda0 100644 --- a/board/gdsys/a38x/ihs_phys.c +++ b/board/gdsys/a38x/ihs_phys.c @@ -231,13 +231,15 @@ static const struct bb_miiphy_bus_ops mii_bb_miiphy_bus_ops = { static int mii_bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg) { - return bb_miiphy_read(miidev, addr, devad, reg); + return bb_miiphy_read(miidev, &mii_bb_miiphy_bus_ops, + addr, devad, reg); } static int mii_bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, u16 value) { - return bb_miiphy_write(miidev, addr, devad, reg, value); + return bb_miiphy_write(miidev, &mii_bb_miiphy_bus_ops, + addr, devad, reg, value); } int register_miiphy_bus(uint k, struct mii_dev **bus) @@ -255,7 +257,6 @@ int register_miiphy_bus(uint k, struct mii_dev **bus) mdiodev->write = mii_bb_miiphy_write; /* Copy the bus accessors and private data */ - bb_miiphy->ops = &mii_bb_miiphy_bus_ops; bb_miiphy->priv = &gpio_mii_set[k]; retval = mdio_register(mdiodev); diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 3c3450aa778..2069e34be15 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -302,13 +302,15 @@ static const struct bb_miiphy_bus_ops dw_eth_bb_miiphy_bus_ops = { static int dw_bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg) { - return bb_miiphy_read(miidev, addr, devad, reg); + return bb_miiphy_read(miidev, &dw_eth_bb_miiphy_bus_ops, + addr, devad, reg); } static int dw_bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, u16 value) { - return bb_miiphy_write(miidev, addr, devad, reg, value); + return bb_miiphy_write(miidev, &dw_eth_bb_miiphy_bus_ops, + addr, devad, reg, value); } static int dw_bb_mdio_init(const char *name, struct udevice *dev) @@ -351,7 +353,6 @@ static int dw_bb_mdio_init(const char *name, struct udevice *dev) #if CONFIG_IS_ENABLED(DM_GPIO) bus->reset = dw_mdio_reset; #endif - bus->ops = &dw_eth_bb_miiphy_bus_ops; bus->priv = dwpriv; return mdio_register(bus); diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c index e6106341eb3..9481ba76f51 100644 --- a/drivers/net/phy/miiphybb.c +++ b/drivers/net/phy/miiphybb.c @@ -126,21 +126,19 @@ static void miiphy_pre(struct bb_miiphy_bus *bus, const struct bb_miiphy_bus_ops * Returns: * 0 on success */ -int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg) +int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, + int addr, int devad, int reg) { unsigned short rdreg; /* register working value */ int v; int j; /* counter */ struct bb_miiphy_bus *bus; - const struct bb_miiphy_bus_ops *ops; bus = bb_miiphy_getbus(miidev); if (bus == NULL) { return -1; } - ops = bus->ops; - miiphy_pre(bus, ops, 1, addr, reg); /* tri-state our MDIO I/O pin so we can read */ @@ -198,11 +196,10 @@ int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg) * Returns: * 0 on success */ -int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, - u16 value) +int bb_miiphy_write(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, + int addr, int devad, int reg, u16 value) { struct bb_miiphy_bus *bus; - const struct bb_miiphy_bus_ops *ops; int j; /* counter */ bus = bb_miiphy_getbus(miidev); @@ -211,8 +208,6 @@ int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, return -1; } - ops = bus->ops; - miiphy_pre(bus, ops, 0, addr, reg); /* send the turnaround (10) */ diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 9a17ac97cce..65ba107fc00 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -561,13 +561,15 @@ static const struct bb_miiphy_bus_ops ravb_bb_miiphy_bus_ops = { static int ravb_bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg) { - return bb_miiphy_read(miidev, addr, devad, reg); + return bb_miiphy_read(miidev, &ravb_bb_miiphy_bus_ops, + addr, devad, reg); } static int ravb_bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, u16 value) { - return bb_miiphy_write(miidev, addr, devad, reg, value); + return bb_miiphy_write(miidev, &ravb_bb_miiphy_bus_ops, + addr, devad, reg, value); } static int ravb_probe(struct udevice *dev) @@ -599,7 +601,6 @@ static int ravb_probe(struct udevice *dev) snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name); /* Copy the bus accessors and private data */ - bb_miiphy->ops = &ravb_bb_miiphy_bus_ops; bb_miiphy->priv = eth; ret = mdio_register(mdiodev); diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index cef531c8c6f..738dc43cdc7 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -723,13 +723,15 @@ static const struct bb_miiphy_bus_ops sh_ether_bb_miiphy_bus_ops = { static int sh_eth_bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg) { - return bb_miiphy_read(miidev, addr, devad, reg); + return bb_miiphy_read(miidev, &sh_ether_bb_miiphy_bus_ops, + addr, devad, reg); } static int sh_eth_bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, u16 value) { - return bb_miiphy_write(miidev, addr, devad, reg, value); + return bb_miiphy_write(miidev, &sh_ether_bb_miiphy_bus_ops, + addr, devad, reg, value); } static int sh_ether_probe(struct udevice *udev) @@ -761,7 +763,6 @@ static int sh_ether_probe(struct udevice *udev) snprintf(mdiodev->name, sizeof(mdiodev->name), udev->name); /* Copy the bus accessors and private data */ - bb_miiphy->ops = &sh_ether_bb_miiphy_bus_ops; bb_miiphy->priv = eth; ret = mdio_register(mdiodev); diff --git a/include/miiphy.h b/include/miiphy.h index 5fd86bef882..31d81b4b551 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -75,16 +75,16 @@ struct bb_miiphy_bus_ops { struct bb_miiphy_bus { void *priv; - const struct bb_miiphy_bus_ops *ops; struct mii_dev mii; }; struct bb_miiphy_bus *bb_miiphy_alloc(void); void bb_miiphy_free(struct bb_miiphy_bus *bus); -int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg); -int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, - u16 value); +int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, + int addr, int devad, int reg); +int bb_miiphy_write(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, + int addr, int devad, int reg, u16 value); #endif /* phy seed setup */ -- cgit v1.3.1 From 7cded10da35730ff27062d19b8ad72242be8038f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 2 Mar 2025 02:24:45 +0100 Subject: net: miiphybb: Pass struct mii_dev directly to bb_miiphy_read/write() Access to MDIO bus private data can be provided by both struct mii_dev .priv member and struct bb_miiphy_bus .priv member, use the former directly and remove .priv from the later. Drop unused bb_miiphy_getbus(). This removes any dependency on struct bb_miiphy_bus from the miiphybb code, except for helper functions which will be removed later. Signed-off-by: Marek Vasut Reviewed-by: Paul Barker --- board/gdsys/a38x/ihs_phys.c | 29 +++---- drivers/net/designware.c | 24 +++--- drivers/net/phy/miiphybb.c | 188 ++++++++++++++++++++------------------------ drivers/net/ravb.c | 23 +++--- drivers/net/sh_eth.c | 23 +++--- include/miiphy.h | 12 +-- 6 files changed, 142 insertions(+), 157 deletions(-) (limited to 'include') diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c index 6176a47cda0..86a4049238b 100644 --- a/board/gdsys/a38x/ihs_phys.c +++ b/board/gdsys/a38x/ihs_phys.c @@ -123,9 +123,9 @@ struct gpio_mii { { 2, {}, {}, 46, 24, 1 }, }; -static int mii_mdio_init(struct bb_miiphy_bus *bus) +static int mii_mdio_init(const int k) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = &gpio_mii_set[k]; char name[32] = {}; struct udevice *gpio_dev1 = NULL; struct udevice *gpio_dev2 = NULL; @@ -164,27 +164,27 @@ static int mii_mdio_init(struct bb_miiphy_bus *bus) return 0; } -static int mii_mdio_active(struct bb_miiphy_bus *bus) +static int mii_mdio_active(struct mii_dev *miidev) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_value(&gpio_mii->mdc_gpio, gpio_mii->mdio_value); return 0; } -static int mii_mdio_tristate(struct bb_miiphy_bus *bus) +static int mii_mdio_tristate(struct mii_dev *miidev) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN); return 0; } -static int mii_set_mdio(struct bb_miiphy_bus *bus, int v) +static int mii_set_mdio(struct mii_dev *miidev, int v) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_OUT); dm_gpio_set_value(&gpio_mii->mdio_gpio, v); @@ -193,9 +193,9 @@ static int mii_set_mdio(struct bb_miiphy_bus *bus, int v) return 0; } -static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v) +static int mii_get_mdio(struct mii_dev *miidev, int *v) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_dir_flags(&gpio_mii->mdio_gpio, GPIOD_IS_IN); *v = (dm_gpio_get_value(&gpio_mii->mdio_gpio)); @@ -203,16 +203,16 @@ static int mii_get_mdio(struct bb_miiphy_bus *bus, int *v) return 0; } -static int mii_set_mdc(struct bb_miiphy_bus *bus, int v) +static int mii_set_mdc(struct mii_dev *miidev, int v) { - struct gpio_mii *gpio_mii = bus->priv; + struct gpio_mii *gpio_mii = miidev->priv; dm_gpio_set_value(&gpio_mii->mdc_gpio, v); return 0; } -static int mii_delay(struct bb_miiphy_bus *bus) +static int mii_delay(struct mii_dev *miidev) { udelay(1); @@ -255,6 +255,7 @@ int register_miiphy_bus(uint k, struct mii_dev **bus) snprintf(mdiodev->name, MDIO_NAME_LEN, "ihs%d", k); mdiodev->read = mii_bb_miiphy_read; mdiodev->write = mii_bb_miiphy_write; + mdiodev->priv = &gpio_mii_set[k]; /* Copy the bus accessors and private data */ bb_miiphy->priv = &gpio_mii_set[k]; @@ -264,7 +265,7 @@ int register_miiphy_bus(uint k, struct mii_dev **bus) return retval; *bus = &bb_miiphy->mii; - return mii_mdio_init(bb_miiphy); + return mii_mdio_init(k); } struct porttype *get_porttype(uint octo_phy_mask, uint k) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 2069e34be15..4827811dce3 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -227,9 +227,9 @@ static int dw_dm_mdio_init(const char *name, void *priv) #endif #if IS_ENABLED(CONFIG_BITBANGMII) && IS_ENABLED(CONFIG_DM_GPIO) -static int dw_eth_bb_mdio_active(struct bb_miiphy_bus *bus) +static int dw_eth_bb_mdio_active(struct mii_dev *miidev) { - struct dw_eth_dev *priv = bus->priv; + struct dw_eth_dev *priv = miidev->priv; struct gpio_desc *desc = &priv->mdio_gpio; desc->flags = 0; @@ -238,9 +238,9 @@ static int dw_eth_bb_mdio_active(struct bb_miiphy_bus *bus) return 0; } -static int dw_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus) +static int dw_eth_bb_mdio_tristate(struct mii_dev *miidev) { - struct dw_eth_dev *priv = bus->priv; + struct dw_eth_dev *priv = miidev->priv; struct gpio_desc *desc = &priv->mdio_gpio; desc->flags = 0; @@ -249,9 +249,9 @@ static int dw_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus) return 0; } -static int dw_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v) +static int dw_eth_bb_set_mdio(struct mii_dev *miidev, int v) { - struct dw_eth_dev *priv = bus->priv; + struct dw_eth_dev *priv = miidev->priv; if (v) dm_gpio_set_value(&priv->mdio_gpio, 1); @@ -261,18 +261,18 @@ static int dw_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v) return 0; } -static int dw_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) +static int dw_eth_bb_get_mdio(struct mii_dev *miidev, int *v) { - struct dw_eth_dev *priv = bus->priv; + struct dw_eth_dev *priv = miidev->priv; *v = dm_gpio_get_value(&priv->mdio_gpio); return 0; } -static int dw_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v) +static int dw_eth_bb_set_mdc(struct mii_dev *miidev, int v) { - struct dw_eth_dev *priv = bus->priv; + struct dw_eth_dev *priv = miidev->priv; if (v) dm_gpio_set_value(&priv->mdc_gpio, 1); @@ -282,9 +282,9 @@ static int dw_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v) return 0; } -static int dw_eth_bb_delay(struct bb_miiphy_bus *bus) +static int dw_eth_bb_delay(struct mii_dev *miidev) { - struct dw_eth_dev *priv = bus->priv; + struct dw_eth_dev *priv = miidev->priv; udelay(priv->bb_delay); return 0; diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c index 9481ba76f51..60c791b707b 100644 --- a/drivers/net/phy/miiphybb.c +++ b/drivers/net/phy/miiphybb.c @@ -18,11 +18,6 @@ #include #include -static inline struct bb_miiphy_bus *bb_miiphy_getbus(struct mii_dev *miidev) -{ - return container_of(miidev, struct bb_miiphy_bus, mii); -} - struct bb_miiphy_bus *bb_miiphy_alloc(void) { struct bb_miiphy_bus *bus; @@ -46,7 +41,7 @@ void bb_miiphy_free(struct bb_miiphy_bus *bus) * Utility to send the preamble, address, and register (common to read * and write). */ -static void miiphy_pre(struct bb_miiphy_bus *bus, const struct bb_miiphy_bus_ops *ops, +static void miiphy_pre(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, char read, unsigned char addr, unsigned char reg) { int j; @@ -59,62 +54,62 @@ static void miiphy_pre(struct bb_miiphy_bus *bus, const struct bb_miiphy_bus_ops * but it is safer and will be much more robust. */ - ops->mdio_active(bus); - ops->set_mdio(bus, 1); + ops->mdio_active(miidev); + ops->set_mdio(miidev, 1); for (j = 0; j < 32; j++) { - ops->set_mdc(bus, 0); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->set_mdc(miidev, 0); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); } /* send the start bit (01) and the read opcode (10) or write (10) */ - ops->set_mdc(bus, 0); - ops->set_mdio(bus, 0); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); - ops->set_mdc(bus, 0); - ops->set_mdio(bus, 1); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); - ops->set_mdc(bus, 0); - ops->set_mdio(bus, read); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); - ops->set_mdc(bus, 0); - ops->set_mdio(bus, !read); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->set_mdc(miidev, 0); + ops->set_mdio(miidev, 0); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); + ops->set_mdc(miidev, 0); + ops->set_mdio(miidev, 1); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); + ops->set_mdc(miidev, 0); + ops->set_mdio(miidev, read); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); + ops->set_mdc(miidev, 0); + ops->set_mdio(miidev, !read); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); /* send the PHY address */ for (j = 0; j < 5; j++) { - ops->set_mdc(bus, 0); + ops->set_mdc(miidev, 0); if ((addr & 0x10) == 0) { - ops->set_mdio(bus, 0); + ops->set_mdio(miidev, 0); } else { - ops->set_mdio(bus, 1); + ops->set_mdio(miidev, 1); } - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); addr <<= 1; } /* send the register address */ for (j = 0; j < 5; j++) { - ops->set_mdc(bus, 0); + ops->set_mdc(miidev, 0); if ((reg & 0x10) == 0) { - ops->set_mdio(bus, 0); + ops->set_mdio(miidev, 0); } else { - ops->set_mdio(bus, 1); + ops->set_mdio(miidev, 1); } - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); reg <<= 1; } } @@ -132,57 +127,51 @@ int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, unsigned short rdreg; /* register working value */ int v; int j; /* counter */ - struct bb_miiphy_bus *bus; - bus = bb_miiphy_getbus(miidev); - if (bus == NULL) { - return -1; - } - - miiphy_pre(bus, ops, 1, addr, reg); + miiphy_pre(miidev, ops, 1, addr, reg); /* tri-state our MDIO I/O pin so we can read */ - ops->set_mdc(bus, 0); - ops->mdio_tristate(bus); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->set_mdc(miidev, 0); + ops->mdio_tristate(miidev); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); /* check the turnaround bit: the PHY should be driving it to zero */ - ops->get_mdio(bus, &v); + ops->get_mdio(miidev, &v); if (v != 0) { /* puts ("PHY didn't drive TA low\n"); */ for (j = 0; j < 32; j++) { - ops->set_mdc(bus, 0); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->set_mdc(miidev, 0); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); } /* There is no PHY, return */ return -1; } - ops->set_mdc(bus, 0); - ops->delay(bus); + ops->set_mdc(miidev, 0); + ops->delay(miidev); /* read 16 bits of register data, MSB first */ rdreg = 0; for (j = 0; j < 16; j++) { - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->set_mdc(miidev, 1); + ops->delay(miidev); rdreg <<= 1; - ops->get_mdio(bus, &v); + ops->get_mdio(miidev, &v); rdreg |= (v & 0x1); - ops->set_mdc(bus, 0); - ops->delay(bus); + ops->set_mdc(miidev, 0); + ops->delay(miidev); } - ops->set_mdc(bus, 1); - ops->delay(bus); - ops->set_mdc(bus, 0); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->set_mdc(miidev, 1); + ops->delay(miidev); + ops->set_mdc(miidev, 0); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); debug("%s[%s](0x%x) @ 0x%x = 0x%04x\n", __func__, miidev->name, reg, addr, rdreg); @@ -199,51 +188,44 @@ int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, int bb_miiphy_write(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, int addr, int devad, int reg, u16 value) { - struct bb_miiphy_bus *bus; int j; /* counter */ - bus = bb_miiphy_getbus(miidev); - if (bus == NULL) { - /* Bus not found! */ - return -1; - } - - miiphy_pre(bus, ops, 0, addr, reg); + miiphy_pre(miidev, ops, 0, addr, reg); /* send the turnaround (10) */ - ops->set_mdc(bus, 0); - ops->set_mdio(bus, 1); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); - ops->set_mdc(bus, 0); - ops->set_mdio(bus, 0); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->set_mdc(miidev, 0); + ops->set_mdio(miidev, 1); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); + ops->set_mdc(miidev, 0); + ops->set_mdio(miidev, 0); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); /* write 16 bits of register data, MSB first */ for (j = 0; j < 16; j++) { - ops->set_mdc(bus, 0); + ops->set_mdc(miidev, 0); if ((value & 0x00008000) == 0) { - ops->set_mdio(bus, 0); + ops->set_mdio(miidev, 0); } else { - ops->set_mdio(bus, 1); + ops->set_mdio(miidev, 1); } - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); value <<= 1; } /* * Tri-state the MDIO line. */ - ops->mdio_tristate(bus); - ops->set_mdc(bus, 0); - ops->delay(bus); - ops->set_mdc(bus, 1); - ops->delay(bus); + ops->mdio_tristate(miidev); + ops->set_mdc(miidev, 0); + ops->delay(miidev); + ops->set_mdc(miidev, 1); + ops->delay(miidev); return 0; } diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 65ba107fc00..52547b27aff 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -491,27 +491,27 @@ static void ravb_stop(struct udevice *dev) } /* Bitbang MDIO access */ -static int ravb_bb_mdio_active(struct bb_miiphy_bus *bus) +static int ravb_bb_mdio_active(struct mii_dev *miidev) { - struct ravb_priv *eth = bus->priv; + struct ravb_priv *eth = miidev->priv; setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MMD); return 0; } -static int ravb_bb_mdio_tristate(struct bb_miiphy_bus *bus) +static int ravb_bb_mdio_tristate(struct mii_dev *miidev) { - struct ravb_priv *eth = bus->priv; + struct ravb_priv *eth = miidev->priv; clrbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MMD); return 0; } -static int ravb_bb_set_mdio(struct bb_miiphy_bus *bus, int v) +static int ravb_bb_set_mdio(struct mii_dev *miidev, int v) { - struct ravb_priv *eth = bus->priv; + struct ravb_priv *eth = miidev->priv; if (v) setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MDO); @@ -521,18 +521,18 @@ static int ravb_bb_set_mdio(struct bb_miiphy_bus *bus, int v) return 0; } -static int ravb_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) +static int ravb_bb_get_mdio(struct mii_dev *miidev, int *v) { - struct ravb_priv *eth = bus->priv; + struct ravb_priv *eth = miidev->priv; *v = (readl(eth->iobase + RAVB_REG_PIR) & PIR_MDI) >> 3; return 0; } -static int ravb_bb_set_mdc(struct bb_miiphy_bus *bus, int v) +static int ravb_bb_set_mdc(struct mii_dev *miidev, int v) { - struct ravb_priv *eth = bus->priv; + struct ravb_priv *eth = miidev->priv; if (v) setbits_le32(eth->iobase + RAVB_REG_PIR, PIR_MDC); @@ -542,7 +542,7 @@ static int ravb_bb_set_mdc(struct bb_miiphy_bus *bus, int v) return 0; } -static int ravb_bb_delay(struct bb_miiphy_bus *bus) +static int ravb_bb_delay(struct mii_dev *miidev) { udelay(10); @@ -598,6 +598,7 @@ static int ravb_probe(struct udevice *dev) mdiodev->read = ravb_bb_miiphy_read; mdiodev->write = ravb_bb_miiphy_write; + mdiodev->priv = eth; snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name); /* Copy the bus accessors and private data */ diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 738dc43cdc7..c898a2204d8 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -644,9 +644,9 @@ static void sh_ether_stop(struct udevice *dev) } /******* for bb_miiphy *******/ -static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus) +static int sh_eth_bb_mdio_active(struct mii_dev *miidev) { - struct sh_eth_dev *eth = bus->priv; + struct sh_eth_dev *eth = miidev->priv; struct sh_eth_info *port_info = ð->port_info[eth->port]; sh_eth_write(port_info, sh_eth_read(port_info, PIR) | PIR_MMD, PIR); @@ -654,9 +654,9 @@ static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus) return 0; } -static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus) +static int sh_eth_bb_mdio_tristate(struct mii_dev *miidev) { - struct sh_eth_dev *eth = bus->priv; + struct sh_eth_dev *eth = miidev->priv; struct sh_eth_info *port_info = ð->port_info[eth->port]; sh_eth_write(port_info, sh_eth_read(port_info, PIR) & ~PIR_MMD, PIR); @@ -664,9 +664,9 @@ static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus) return 0; } -static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v) +static int sh_eth_bb_set_mdio(struct mii_dev *miidev, int v) { - struct sh_eth_dev *eth = bus->priv; + struct sh_eth_dev *eth = miidev->priv; struct sh_eth_info *port_info = ð->port_info[eth->port]; if (v) @@ -679,9 +679,9 @@ static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v) return 0; } -static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) +static int sh_eth_bb_get_mdio(struct mii_dev *miidev, int *v) { - struct sh_eth_dev *eth = bus->priv; + struct sh_eth_dev *eth = miidev->priv; struct sh_eth_info *port_info = ð->port_info[eth->port]; *v = (sh_eth_read(port_info, PIR) & PIR_MDI) >> 3; @@ -689,9 +689,9 @@ static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) return 0; } -static int sh_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v) +static int sh_eth_bb_set_mdc(struct mii_dev *miidev, int v) { - struct sh_eth_dev *eth = bus->priv; + struct sh_eth_dev *eth = miidev->priv; struct sh_eth_info *port_info = ð->port_info[eth->port]; if (v) @@ -704,7 +704,7 @@ static int sh_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v) return 0; } -static int sh_eth_bb_delay(struct bb_miiphy_bus *bus) +static int sh_eth_bb_delay(struct mii_dev *miidev) { udelay(10); @@ -760,6 +760,7 @@ static int sh_ether_probe(struct udevice *udev) mdiodev->read = sh_eth_bb_miiphy_read; mdiodev->write = sh_eth_bb_miiphy_write; + mdiodev->priv = eth; snprintf(mdiodev->name, sizeof(mdiodev->name), udev->name); /* Copy the bus accessors and private data */ diff --git a/include/miiphy.h b/include/miiphy.h index 31d81b4b551..9b8b42799c2 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -65,12 +65,12 @@ void mdio_list_devices(void); struct bb_miiphy_bus; struct bb_miiphy_bus_ops { - int (*mdio_active)(struct bb_miiphy_bus *bus); - int (*mdio_tristate)(struct bb_miiphy_bus *bus); - int (*set_mdio)(struct bb_miiphy_bus *bus, int v); - int (*get_mdio)(struct bb_miiphy_bus *bus, int *v); - int (*set_mdc)(struct bb_miiphy_bus *bus, int v); - int (*delay)(struct bb_miiphy_bus *bus); + int (*mdio_active)(struct mii_dev *miidev); + int (*mdio_tristate)(struct mii_dev *miidev); + int (*set_mdio)(struct mii_dev *miidev, int v); + int (*get_mdio)(struct mii_dev *miidev, int *v); + int (*set_mdc)(struct mii_dev *miidev, int v); + int (*delay)(struct mii_dev *miidev); }; struct bb_miiphy_bus { -- cgit v1.3.1 From 596d67e5163834893e9b59d7a5cb9e9a1cd8bc24 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 2 Mar 2025 02:24:46 +0100 Subject: net: miiphybb: Drop priv from struct bb_miiphy_bus Remove the priv member from struct bb_miiphy_bus and its assignment from drivers. This turns struct bb_miiphy_bus int struct mii_dev wrapper, to be cleaned up next. Signed-off-by: Marek Vasut Reviewed-by: Paul Barker --- board/gdsys/a38x/ihs_phys.c | 3 --- drivers/net/ravb.c | 3 --- drivers/net/sh_eth.c | 3 --- include/miiphy.h | 1 - 4 files changed, 10 deletions(-) (limited to 'include') diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c index 86a4049238b..7aa427e0312 100644 --- a/board/gdsys/a38x/ihs_phys.c +++ b/board/gdsys/a38x/ihs_phys.c @@ -257,9 +257,6 @@ int register_miiphy_bus(uint k, struct mii_dev **bus) mdiodev->write = mii_bb_miiphy_write; mdiodev->priv = &gpio_mii_set[k]; - /* Copy the bus accessors and private data */ - bb_miiphy->priv = &gpio_mii_set[k]; - retval = mdio_register(mdiodev); if (retval < 0) return retval; diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 52547b27aff..dcd8ba9283f 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -601,9 +601,6 @@ static int ravb_probe(struct udevice *dev) mdiodev->priv = eth; snprintf(mdiodev->name, sizeof(mdiodev->name), dev->name); - /* Copy the bus accessors and private data */ - bb_miiphy->priv = eth; - ret = mdio_register(mdiodev); if (ret < 0) goto err_mdio_register; diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index c898a2204d8..c2e2f3fc6c6 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -763,9 +763,6 @@ static int sh_ether_probe(struct udevice *udev) mdiodev->priv = eth; snprintf(mdiodev->name, sizeof(mdiodev->name), udev->name); - /* Copy the bus accessors and private data */ - bb_miiphy->priv = eth; - ret = mdio_register(mdiodev); if (ret < 0) goto err_mdio_register; diff --git a/include/miiphy.h b/include/miiphy.h index 9b8b42799c2..d2678379a1b 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -74,7 +74,6 @@ struct bb_miiphy_bus_ops { }; struct bb_miiphy_bus { - void *priv; struct mii_dev mii; }; -- cgit v1.3.1 From 256306593ecdde5fe01ecc5108d564e76ea8ba65 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 2 Mar 2025 02:24:51 +0100 Subject: net: miiphybb: Drop bb_miiphy_alloc()/bb_miiphy_free() and struct bb_miiphy_bus These functions are no longer necessary, remove them. The struct bb_miiphy_bus is no longer necessary either, remove it as well. Signed-off-by: Marek Vasut Reviewed-by: Paul Barker --- drivers/net/phy/miiphybb.c | 19 ------------------- include/miiphy.h | 9 --------- 2 files changed, 28 deletions(-) (limited to 'include') diff --git a/drivers/net/phy/miiphybb.c b/drivers/net/phy/miiphybb.c index 60c791b707b..76463da7299 100644 --- a/drivers/net/phy/miiphybb.c +++ b/drivers/net/phy/miiphybb.c @@ -14,28 +14,9 @@ #include #include -#include #include #include -struct bb_miiphy_bus *bb_miiphy_alloc(void) -{ - struct bb_miiphy_bus *bus; - - bus = malloc(sizeof(*bus)); - if (!bus) - return bus; - - mdio_init(&bus->mii); - - return bus; -} - -void bb_miiphy_free(struct bb_miiphy_bus *bus) -{ - free(bus); -} - /***************************************************************************** * * Utility to send the preamble, address, and register (common to read diff --git a/include/miiphy.h b/include/miiphy.h index d2678379a1b..dc8ae0caca6 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -62,8 +62,6 @@ void mdio_list_devices(void); #define BB_MII_DEVNAME "bb_miiphy" -struct bb_miiphy_bus; - struct bb_miiphy_bus_ops { int (*mdio_active)(struct mii_dev *miidev); int (*mdio_tristate)(struct mii_dev *miidev); @@ -73,13 +71,6 @@ struct bb_miiphy_bus_ops { int (*delay)(struct mii_dev *miidev); }; -struct bb_miiphy_bus { - struct mii_dev mii; -}; - -struct bb_miiphy_bus *bb_miiphy_alloc(void); -void bb_miiphy_free(struct bb_miiphy_bus *bus); - int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, int addr, int devad, int reg); int bb_miiphy_write(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, -- cgit v1.3.1 From 33ccfae85372285690d8bd8256d994d7cb917cbf Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 2 Mar 2025 02:24:52 +0100 Subject: net: miiphybb: Drop mdio_init() Inline mdio_init() back into mdio_alloc(), separate access to mdio_init() is no longer necessary. Signed-off-by: Marek Vasut Reviewed-by: Paul Barker --- common/miiphyutil.c | 13 ++++--------- include/miiphy.h | 1 - 2 files changed, 4 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 3d960c259b5..274e88a4921 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -55,14 +55,6 @@ struct mii_dev *miiphy_get_dev_by_name(const char *devname) return NULL; } -void mdio_init(struct mii_dev *bus) -{ - memset(bus, 0, sizeof(*bus)); - - /* initialize mii_dev struct fields */ - INIT_LIST_HEAD(&bus->link); -} - struct mii_dev *mdio_alloc(void) { struct mii_dev *bus; @@ -71,7 +63,10 @@ struct mii_dev *mdio_alloc(void) if (!bus) return bus; - mdio_init(bus); + memset(bus, 0, sizeof(*bus)); + + /* initialize mii_dev struct fields */ + INIT_LIST_HEAD(&bus->link); return bus; } diff --git a/include/miiphy.h b/include/miiphy.h index dc8ae0caca6..00d0b9b6a43 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -42,7 +42,6 @@ struct phy_device *mdio_phydev_for_ethname(const char *devname); void miiphy_listdev(void); -void mdio_init(struct mii_dev *bus); struct mii_dev *mdio_alloc(void); void mdio_free(struct mii_dev *bus); int mdio_register(struct mii_dev *bus); -- cgit v1.3.1 From a0ffd8d7cd8efb8b348c07fa18a610a4534f9bea Mon Sep 17 00:00:00 2001 From: Greg Malysa Date: Wed, 26 Feb 2025 12:30:24 -0500 Subject: doc: Add dt-bindings and descriptions for ADI SC5xx-family pinctrl This adds the necessary dt-bindings and documentation to use the ADI SC5xx pinctrl driver in a device tree. It is not yet available upstream in the Linux kernel. Eventually, it will be moved there. Signed-off-by: Vasileios Bimpikas Signed-off-by: Utsav Agarwal Signed-off-by: Arturs Artamonovs Signed-off-by: Greg Malysa --- MAINTAINERS | 2 + .../pinctrl/adi,adsp-pinctrl.yaml | 73 ++++++++++++++++++++++ include/dt-bindings/pinctrl/adi-adsp.h | 21 +++++++ 3 files changed, 96 insertions(+) create mode 100644 doc/device-tree-bindings/pinctrl/adi,adsp-pinctrl.yaml create mode 100644 include/dt-bindings/pinctrl/adi-adsp.h (limited to 'include') diff --git a/MAINTAINERS b/MAINTAINERS index af8d0b7d5e9..abdb418b599 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -629,12 +629,14 @@ F: arch/arm/mach-sc5xx/ F: board/adi/ F: doc/device-tree-bindings/arm/adi/adi,sc5xx.yaml F: doc/device-tree-bindings/clock/adi,sc5xx-clocks.yaml +F: doc/device-tree-bindings/pinctrl/adi,adsp-pinctrl.yaml F: doc/device-tree-bindings/timer/adi,sc5xx-gptimer.yaml F: drivers/clk/adi/ F: drivers/pinctrl/pinctrl-adi-adsp.c F: drivers/serial/serial_adi_uart4.c F: drivers/timer/adi_sc5xx_timer.c F: include/configs/sc5* +F: include/dt-bindings/pinctrl/adi-adsp.h F: include/env/adi/ ARM SNAPDRAGON diff --git a/doc/device-tree-bindings/pinctrl/adi,adsp-pinctrl.yaml b/doc/device-tree-bindings/pinctrl/adi,adsp-pinctrl.yaml new file mode 100644 index 00000000000..418ebd5ce41 --- /dev/null +++ b/doc/device-tree-bindings/pinctrl/adi,adsp-pinctrl.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/adi,adsp-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Pinctrl Driver for Analog Devices SC5xx Processors + +maintainers: + - Vasileios Bimpikas + - Utsav Agarwal + - Arturs Artamonovs + +description: | + This driver provides an interface for performing pin configuration + Analog Devices SoCs using the ADSP PORT hardware for pin + configuration according to the HRM. Currently this is only the + SC5xx series. + +properties: + compatible: + const: adi,adsp-pinctrl + + reg: + maxItems: 1 + + adi,npins: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Total number of pins available to this SoC's pin controller, + found in the HRM. + +patternProperties: + '_pins$': + type: object + + properties: + adi,pins: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + For n pins, 2n values must be provided as a sequence of pin + name as identified with the ADI_ADSP_PIN() macro and a pin + function constant, both defined in + include/dt-bindings/pinctrl/adi-adsp.h. + + required: + - adi,pins + + additionalProperties: false + +required: + - compatible + - reg + - adi,npins + +additionalProperties: false + +examples: + - | + #include + + soc { + pinctrl0: pinctrl@0x31004000 { + compatible = "adi,adsp-pinctrl"; + reg = <0x31004000 0x500>; + adi,npins = <135>; + uart0_default: uart0_pins { + adi,pins = , + ; + }; + }; + + }; diff --git a/include/dt-bindings/pinctrl/adi-adsp.h b/include/dt-bindings/pinctrl/adi-adsp.h new file mode 100644 index 00000000000..7dc8a1ef5c4 --- /dev/null +++ b/include/dt-bindings/pinctrl/adi-adsp.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Contact: Nathan Barrett-Morrison + * Contact: Greg Malysa + * + */ + +#ifndef DT_BINDINGS_PINCTRL_ADI_ADSP +#define DT_BINDINGS_PINCTRL_ADI_ADSP + +#define ADI_ADSP_PIN(port, pin) (16 * ((port) - 'A') + (pin)) +#define ADI_ADSP_PINFUNC_ALT0 0 +#define ADI_ADSP_PINFUNC_ALT1 1 +#define ADI_ADSP_PINFUNC_ALT2 2 +#define ADI_ADSP_PINFUNC_ALT3 3 + +#endif -- cgit v1.3.1 From 569dceef2e57c76c9439ea9eb8ca6019cedf7c5d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 27 Feb 2025 09:29:42 -0600 Subject: mmc: fsl_esdhc: Migrate ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be handled easily enough in Kconfig. This lets us remove a function but not obviously correct usage of the IS_ENABLED() macro. Signed-off-by: Tom Rini Reviewed-by: Peng Fan --- arch/powerpc/include/asm/config_mpc85xx.h | 3 --- drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/fsl_esdhc_imx.c | 8 +------- include/configs/imxrt1020-evk.h | 2 -- include/configs/imxrt1050-evk.h | 2 -- include/configs/imxrt1170-evk.h | 2 -- 6 files changed, 7 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 819250f0090..abdaffbe00b 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -133,7 +133,6 @@ #define CFG_FM_PLAT_CLK_DIV 1 #define CFG_SYS_FM1_CLK CFG_FM_PLAT_CLK_DIV #define CFG_SYS_FM_MURAM_SIZE 0x30000 -#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 @@ -146,7 +145,6 @@ #define CFG_SYS_FM1_CLK 0 #define CFG_QBMAN_CLK_DIV 1 #define CFG_SYS_FM_MURAM_SIZE 0x30000 -#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #define QE_MURAM_SIZE 0x6000UL #define MAX_QE_RISC 1 #define QE_NUM_OF_SNUM 28 @@ -165,7 +163,6 @@ #define CFG_SYS_PME_CLK CFG_PME_PLAT_CLK_DIV #define CFG_SYS_FM1_CLK 0 #define CFG_SYS_FM_MURAM_SIZE 0x28000 -#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE #elif defined(CONFIG_ARCH_C29X) #define CFG_SYS_FSL_SEC_IDX_OFFSET 0x20000 diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index ab56bd3939f..6740591a653 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -928,6 +928,12 @@ config ESDHC_DETECT_QUIRK bool "QIXIS-based eSDHC quirk detection" depends on FSL_ESDHC && FSL_QIXIS +config ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE + bool + depends on FSL_ESDHC || FSL_ESDHC_IMX + def_bool y if ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_T2080 \ + || FSL_ESDHC_IMX + config FSL_ESDHC_IMX bool "Freescale/NXP i.MX eSDHC controller support" help diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index d7a45ef0ad0..926113f79d3 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -40,12 +40,6 @@ #include #include -#ifndef ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE -#ifdef CONFIG_FSL_USDHC -#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 -#endif -#endif - DECLARE_GLOBAL_DATA_PTR; #define SDHCI_IRQ_EN_BITS (IRQSTATEN_CC | IRQSTATEN_TC | \ @@ -376,7 +370,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, (timeout == 4 || timeout == 8 || timeout == 12)) timeout++; - if (IS_ENABLED(ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE)) + if (IS_ENABLED(CONFIG_ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE)) timeout = 0xE; esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, timeout << 16); diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h index cd6af93454b..aec12082b95 100644 --- a/include/configs/imxrt1020-evk.h +++ b/include/configs/imxrt1020-evk.h @@ -9,8 +9,6 @@ #include -#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 - #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (32 * 1024 * 1024) diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index c520c2fc203..5b8d6a7ac05 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -9,8 +9,6 @@ #include -#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 - #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE (32 * 1024 * 1024) diff --git a/include/configs/imxrt1170-evk.h b/include/configs/imxrt1170-evk.h index 1ccaa15bc11..f821212765c 100644 --- a/include/configs/imxrt1170-evk.h +++ b/include/configs/imxrt1170-evk.h @@ -10,8 +10,6 @@ #include -#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE 1 - /* * Configuration of the external SDRAM memory */ -- cgit v1.3.1 From 1c7d0c411c033f7158dccc34c795951b667dd591 Mon Sep 17 00:00:00 2001 From: Ilias Apalodimas Date: Thu, 20 Feb 2025 15:54:40 +0200 Subject: arm: Prepare linker scripts for memory permissions Upcoming patches are switching the memory mappings to RW, RO, RX after the U-Boot binary and its data are relocated. Add annotations in the linker scripts to and mark text, data, rodata sections and align them to a page boundary. It's worth noting that .efi_runtime memory permissions are left untouched for now. There's two problems with EFI currently. The first problem is that we bundle data, rodata and text in a single .efi_runtime section which also must be close to .text for now. As a result we also dont change the permissions for anything contained in CPUDIR/start.o. In order to fix that we have to decoule .text_rest, .text and .efi_runtime and have the runtime services on their own section with proper memory permission annotations (efi_rodata etc). The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when the latter is calling SetVirtualAddressMap. Which means we have to configure those pages as RX for U-Boot but convert them to RWX just before ExitBootServices. It also needs extra code in efi_tuntime relocation code since R_AARCH64_NONE are emitted as well if we page align the section. Due to the above ignore EFI for now and fix it later once we have the rest in place. Acked-by: Jerome Forissier Tested-by: Neil Armstrong # on AML-S905X-CC Reviewed-by: Richard Henderson Signed-off-by: Ilias Apalodimas --- arch/arm/cpu/armv8/u-boot.lds | 59 ++++++++++++++++++++++++++++-------------- include/asm-generic/sections.h | 2 ++ 2 files changed, 42 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds index 857f44412e0..f4ce98c82c8 100644 --- a/arch/arm/cpu/armv8/u-boot.lds +++ b/arch/arm/cpu/armv8/u-boot.lds @@ -36,9 +36,18 @@ SECTIONS __efi_runtime_stop = .; } +#ifdef CONFIG_MMU_PGPROT + .text_rest ALIGN(CONSTANT(COMMONPAGESIZE)) : +#else .text_rest : +#endif { + __text_start = .; *(.text*) +#ifdef CONFIG_MMU_PGPROT + . = ALIGN(CONSTANT(COMMONPAGESIZE)); +#endif + __text_end = .; } #ifdef CONFIG_ARMV8_PSCI @@ -97,35 +106,43 @@ SECTIONS LONG(0x1d1071c); /* Must output something to reset LMA */ } #endif - - . = ALIGN(8); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(8); - .data : { - *(.data*) + .efi_runtime_rel : { + __efi_runtime_rel_start = .; + *(.rel*.efi_runtime) + *(.rel*.efi_runtime.*) + __efi_runtime_rel_stop = .; } - . = ALIGN(8); - - . = .; +#ifdef CONFIG_MMU_PGPROT + .rodata ALIGN(CONSTANT(COMMONPAGESIZE)): { +#else + .rodata ALIGN(8) : { +#endif + __start_rodata = .; + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } - . = ALIGN(8); - __u_boot_list : { + __u_boot_list ALIGN(8) : { KEEP(*(SORT(__u_boot_list*))); +#ifdef CONFIG_MMU_PGPROT + . = ALIGN(CONSTANT(COMMONPAGESIZE)); +#endif + __end_rodata = .; } - .efi_runtime_rel : { - __efi_runtime_rel_start = .; - *(.rel*.efi_runtime) - *(.rel*.efi_runtime.*) - __efi_runtime_rel_stop = .; +#ifdef CONFIG_MMU_PGPROT + .data ALIGN(CONSTANT(COMMONPAGESIZE)) : { +#else + .data ALIGN(8) : { +#endif + __start_data = .; + *(.data*) } . = ALIGN(8); __image_copy_end = .; - .rela.dyn : { + .rela.dyn ALIGN(8) : { __rel_dyn_start = .; *(.rela*) __rel_dyn_end = .; @@ -136,11 +153,15 @@ SECTIONS /* * arch/arm/lib/crt0_64.S assumes __bss_start - __bss_end % 8 == 0 */ - .bss ALIGN(8) : { + .bss ADDR(.rela.dyn) (OVERLAY) : { __bss_start = .; *(.bss*) . = ALIGN(8); __bss_end = .; +#ifdef CONFIG_MMU_PGPROT + . = ALIGN(CONSTANT(COMMONPAGESIZE)); +#endif + __end_data = .; } /DISCARD/ : { *(.dynsym) } diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index 3fd5c772a1a..024b1adde27 100644 --- a/include/asm-generic/sections.h +++ b/include/asm-generic/sections.h @@ -23,6 +23,7 @@ extern char __kprobes_text_start[], __kprobes_text_end[]; extern char __entry_text_start[], __entry_text_end[]; extern char __initdata_begin[], __initdata_end[]; extern char __start_rodata[], __end_rodata[]; +extern char __start_data[], __end_data[]; extern char __efi_helloworld_begin[]; extern char __efi_helloworld_end[]; extern char __efi_var_file_begin[]; @@ -63,6 +64,7 @@ static inline int arch_is_kernel_data(unsigned long addr) /* Start of U-Boot text region */ extern char __text_start[]; +extern char __text_end[]; /* This marks the text region which must be relocated */ extern char __image_copy_start[], __image_copy_end[]; -- cgit v1.3.1 From ec1c6cfb1cfce92909a248f10c36bd8b18894d7e Mon Sep 17 00:00:00 2001 From: Ilias Apalodimas Date: Thu, 20 Feb 2025 15:54:42 +0200 Subject: treewide: Add a function to change page permissions For armv8 we are adding proper page permissions for the relocated U-Boot binary. Add a weak function that can be used across architectures to change the page permissions Tested-by: Neil Armstrong # on AML-S905X-CC Signed-off-by: Ilias Apalodimas --- arch/arc/lib/cache.c | 6 ++++++ arch/arm/cpu/arm926ejs/cache.c | 6 ++++++ arch/arm/cpu/armv7/cache_v7.c | 6 ++++++ arch/arm/cpu/armv7m/cache.c | 6 ++++++ arch/arm/cpu/armv8/cache_v8.c | 25 +++++++++++++++++++++++++ arch/arm/lib/cache.c | 6 ++++++ arch/m68k/lib/cache.c | 6 ++++++ arch/nios2/lib/cache.c | 6 ++++++ arch/powerpc/lib/cache.c | 6 ++++++ arch/riscv/lib/cache.c | 6 ++++++ arch/sh/cpu/sh4/cache.c | 6 ++++++ arch/xtensa/lib/cache.c | 6 ++++++ include/cpu_func.h | 17 +++++++++++++++++ 13 files changed, 108 insertions(+) (limited to 'include') diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c index 5169fc627fa..08f9e7dceac 100644 --- a/arch/arc/lib/cache.c +++ b/arch/arc/lib/cache.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -819,3 +820,8 @@ void sync_n_cleanup_cache_all(void) __ic_entire_invalidate(); } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 5b87a3af91b..71b8ad0f71d 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -5,6 +5,7 @@ */ #include #include +#include #include #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) @@ -88,3 +89,8 @@ void enable_caches(void) dcache_enable(); #endif } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index d11420d2fdd..371dc92cd46 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -6,6 +6,7 @@ */ #include #include +#include #include #include #include @@ -209,3 +210,8 @@ __weak void v7_outer_cache_flush_all(void) {} __weak void v7_outer_cache_inval_all(void) {} __weak void v7_outer_cache_flush_range(u32 start, u32 end) {} __weak void v7_outer_cache_inval_range(u32 start, u32 end) {} + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c index b6d08b7aad7..8e7db734055 100644 --- a/arch/arm/cpu/armv7m/cache.c +++ b/arch/arm/cpu/armv7m/cache.c @@ -11,6 +11,7 @@ #include #include #include +#include /* Cache maintenance operation registers */ @@ -370,3 +371,8 @@ void enable_caches(void) dcache_enable(); #endif } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index c9948e99e2e..12ae9bd0603 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -14,6 +14,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -1032,6 +1033,30 @@ void mmu_change_region_attr(phys_addr_t addr, size_t siz, u64 attrs) mmu_change_region_attr_nobreak(addr, siz, attrs); } +int pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + u64 attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE | PTE_TYPE_VALID; + + switch (perm) { + case MMU_ATTR_RO: + attrs |= PTE_BLOCK_PXN | PTE_BLOCK_UXN | PTE_BLOCK_RO; + break; + case MMU_ATTR_RX: + attrs |= PTE_BLOCK_RO; + break; + case MMU_ATTR_RW: + attrs |= PTE_BLOCK_PXN | PTE_BLOCK_UXN; + break; + default: + log_err("Unknown attribute %d\n", perm); + return -EINVAL; + } + + mmu_change_region_attr_nobreak(addr, size, attrs); + + return 0; +} + #else /* !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) */ /* diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 516754caeaf..dd19bd3e4fb 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -10,6 +10,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -170,3 +171,8 @@ __weak int arm_reserve_mmu(void) return 0; } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/m68k/lib/cache.c b/arch/m68k/lib/cache.c index 370ad40f142..a21fe327944 100644 --- a/arch/m68k/lib/cache.c +++ b/arch/m68k/lib/cache.c @@ -8,6 +8,7 @@ #include #include #include +#include volatile int *cf_icache_status = (int *)ICACHE_STATUS; volatile int *cf_dcache_status = (int *)DCACHE_STATUS; @@ -151,3 +152,8 @@ __weak void flush_dcache_range(unsigned long start, unsigned long stop) { /* An empty stub, real implementation should be in platform code */ } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/nios2/lib/cache.c b/arch/nios2/lib/cache.c index 8f543f2a2f2..d7fd9ca8bd4 100644 --- a/arch/nios2/lib/cache.c +++ b/arch/nios2/lib/cache.c @@ -8,6 +8,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -127,3 +128,8 @@ void dcache_disable(void) { flush_dcache_all(); } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/powerpc/lib/cache.c b/arch/powerpc/lib/cache.c index a9cd7b8d30a..e4d9546039d 100644 --- a/arch/powerpc/lib/cache.c +++ b/arch/powerpc/lib/cache.c @@ -8,6 +8,7 @@ #include #include #include +#include static ulong maybe_watchdog_reset(ulong flushed) { @@ -58,3 +59,8 @@ void invalidate_icache_all(void) { puts("No arch specific invalidate_icache_all available!\n"); } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c index 71e4937ab54..31aa30bc7d7 100644 --- a/arch/riscv/lib/cache.c +++ b/arch/riscv/lib/cache.c @@ -8,6 +8,7 @@ #include #include #include +#include #define CBO_INVAL(base) \ INSN_I(OPCODE_MISC_MEM, FUNC3(2), __RD(0), \ @@ -151,3 +152,8 @@ __weak void enable_caches(void) if (!zicbom_block_size) log_debug("Zicbom not initialized.\n"); } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c index 99acc599965..56161ee72e4 100644 --- a/arch/sh/cpu/sh4/cache.c +++ b/arch/sh/cpu/sh4/cache.c @@ -11,6 +11,7 @@ #include #include #include +#include #define CACHE_VALID 1 #define CACHE_UPDATED 2 @@ -126,3 +127,8 @@ int dcache_status(void) { return 0; } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/arch/xtensa/lib/cache.c b/arch/xtensa/lib/cache.c index e6a7f6827fc..1229b407783 100644 --- a/arch/xtensa/lib/cache.c +++ b/arch/xtensa/lib/cache.c @@ -6,6 +6,7 @@ #include #include +#include /* * We currently run always with caches enabled when running from memory. @@ -57,3 +58,8 @@ void invalidate_icache_all(void) { __invalidate_icache_all(); } + +int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm) +{ + return -ENOSYS; +} diff --git a/include/cpu_func.h b/include/cpu_func.h index 7e81c4364a7..70a41ead3f7 100644 --- a/include/cpu_func.h +++ b/include/cpu_func.h @@ -69,6 +69,23 @@ void flush_dcache_range(unsigned long start, unsigned long stop); void invalidate_dcache_range(unsigned long start, unsigned long stop); void invalidate_dcache_all(void); void invalidate_icache_all(void); + +enum pgprot_attrs { + MMU_ATTR_RO, + MMU_ATTR_RX, + MMU_ATTR_RW, +}; + +/** pgprot_set_attrs() - Set page table permissions + * + * @addr: Physical address start + * @size: size of memory to change + * @perm: New permissions + * + * Return: 0 on success, error otherwise. + **/ +int pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm); + /** * noncached_init() - Initialize non-cached memory region * -- cgit v1.3.1 From ebc41cadc6bf9cdd092469c779557a40293b882e Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Thu, 27 Feb 2025 00:18:17 +0800 Subject: drivers: mtd: nand: Add driver for Cadence Nand Enable driver for Cadence NAND for the family device agilex5. This driver is leveraged from the path /drivers/mtd/nand/raw/cadence-nand-controller.c from the stable version 6.11.2. Signed-off-by: Dinesh Maniyam --- drivers/mtd/nand/raw/cadence_nand.c | 2243 +++++++++++++++++++++++++++++++++++ include/cadence-nand.h | 527 ++++++++ include/linux/mtd/rawnand.h | 1 + 3 files changed, 2771 insertions(+) create mode 100644 drivers/mtd/nand/raw/cadence_nand.c create mode 100644 include/cadence-nand.h (limited to 'include') diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c new file mode 100644 index 00000000000..359cfc3b68c --- /dev/null +++ b/drivers/mtd/nand/raw/cadence_nand.c @@ -0,0 +1,2243 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Cadence NAND flash controller driver + * + * Copyright (C) 2019 Cadence + * + * Author: Piotr Sroka + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static inline struct +cdns_nand_chip *to_cdns_nand_chip(struct nand_chip *chip) +{ + return container_of(chip, struct cdns_nand_chip, chip); +} + +static inline struct +cadence_nand_info *to_cadence_nand_info(struct nand_hw_control *controller) +{ + return container_of(controller, struct cadence_nand_info, controller); +} + +static bool +cadence_nand_dma_buf_ok(struct cadence_nand_info *cadence, const void *buf, + u32 buf_len) +{ + u8 data_dma_width = cadence->caps2.data_dma_width; + + return buf && + likely(IS_ALIGNED((uintptr_t)buf, data_dma_width)) && + likely(IS_ALIGNED(buf_len, DMA_DATA_SIZE_ALIGN)); +} + +static int cadence_nand_wait_for_value(struct cadence_nand_info *cadence, + u32 reg_offset, u32 timeout_us, + u32 mask, bool is_clear) +{ + u32 val; + int ret; + + ret = readl_poll_sleep_timeout(cadence->reg + reg_offset, + val, !(val & mask) == is_clear, + 10, timeout_us); + + if (ret < 0) { + dev_err(cadence->dev, + "Timeout while waiting for reg %x with mask %x is clear %d\n", + reg_offset, mask, is_clear); + } + + return ret; +} + +static int cadence_nand_set_ecc_enable(struct cadence_nand_info *cadence, + bool enable) +{ + u32 reg; + + if (cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_CTRL_BUSY, true)) + return -ETIMEDOUT; + + reg = readl_relaxed(cadence->reg + ECC_CONFIG_0); + + if (enable) + reg |= ECC_CONFIG_0_ECC_EN; + else + reg &= ~ECC_CONFIG_0_ECC_EN; + + writel_relaxed(reg, cadence->reg + ECC_CONFIG_0); + + return 0; +} + +static void cadence_nand_set_ecc_strength(struct cadence_nand_info *cadence, + u8 corr_str_idx) +{ + u32 reg; + + if (cadence->curr_corr_str_idx == corr_str_idx) + return; + + reg = readl_relaxed(cadence->reg + ECC_CONFIG_0); + reg &= ~ECC_CONFIG_0_CORR_STR; + reg |= FIELD_PREP(ECC_CONFIG_0_CORR_STR, corr_str_idx); + writel_relaxed(reg, cadence->reg + ECC_CONFIG_0); + + cadence->curr_corr_str_idx = corr_str_idx; +} + +static int cadence_nand_get_ecc_strength_idx(struct cadence_nand_info *cadence, + u8 strength) +{ + int i, corr_str_idx = -1; + + for (i = 0; i < BCH_MAX_NUM_CORR_CAPS; i++) { + if (cadence->ecc_strengths[i] == strength) { + corr_str_idx = i; + break; + } + } + + return corr_str_idx; +} + +static int cadence_nand_set_skip_marker_val(struct cadence_nand_info *cadence, + u16 marker_value) +{ + u32 reg; + + if (cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_CTRL_BUSY, true)) + return -ETIMEDOUT; + + reg = readl_relaxed(cadence->reg + SKIP_BYTES_CONF); + reg &= ~SKIP_BYTES_MARKER_VALUE; + reg |= FIELD_PREP(SKIP_BYTES_MARKER_VALUE, + marker_value); + + writel_relaxed(reg, cadence->reg + SKIP_BYTES_CONF); + + return 0; +} + +static int cadence_nand_set_skip_bytes_conf(struct cadence_nand_info *cadence, + u8 num_of_bytes, + u32 offset_value, + int enable) +{ + u32 reg, skip_bytes_offset; + + if (cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_CTRL_BUSY, true)) + return -ETIMEDOUT; + + if (!enable) { + num_of_bytes = 0; + offset_value = 0; + } + + reg = readl_relaxed(cadence->reg + SKIP_BYTES_CONF); + reg &= ~SKIP_BYTES_NUM_OF_BYTES; + reg |= FIELD_PREP(SKIP_BYTES_NUM_OF_BYTES, + num_of_bytes); + skip_bytes_offset = FIELD_PREP(SKIP_BYTES_OFFSET_VALUE, + offset_value); + + writel_relaxed(reg, cadence->reg + SKIP_BYTES_CONF); + writel_relaxed(skip_bytes_offset, cadence->reg + SKIP_BYTES_OFFSET); + + return 0; +} + +/* Functions enables/disables hardware detection of erased data */ +static void cadence_nand_set_erase_detection(struct cadence_nand_info *cadence, + bool enable, + u8 bitflips_threshold) +{ + u32 reg; + + reg = readl_relaxed(cadence->reg + ECC_CONFIG_0); + + if (enable) + reg |= ECC_CONFIG_0_ERASE_DET_EN; + else + reg &= ~ECC_CONFIG_0_ERASE_DET_EN; + + writel_relaxed(reg, cadence->reg + ECC_CONFIG_0); + writel_relaxed(bitflips_threshold, cadence->reg + ECC_CONFIG_1); +} + +static int cadence_nand_set_access_width16(struct cadence_nand_info *cadence, + bool bit_bus16) +{ + u32 reg; + + if (cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_CTRL_BUSY, true)) + return -ETIMEDOUT; + + reg = readl_relaxed(cadence->reg + COMMON_SET); + if (!bit_bus16) + reg &= ~COMMON_SET_DEVICE_16BIT; + else + reg |= COMMON_SET_DEVICE_16BIT; + writel_relaxed(reg, cadence->reg + COMMON_SET); + + return 0; +} + +static void +cadence_nand_clear_interrupt(struct cadence_nand_info *cadence, + struct cadence_nand_irq_status *irq_status) +{ + writel_relaxed(irq_status->status, cadence->reg + INTR_STATUS); + writel_relaxed(irq_status->trd_status, + cadence->reg + TRD_COMP_INT_STATUS); + writel_relaxed(irq_status->trd_error, + cadence->reg + TRD_ERR_INT_STATUS); +} + +static void +cadence_nand_read_int_status(struct cadence_nand_info *cadence, + struct cadence_nand_irq_status *irq_status) +{ + irq_status->status = readl_relaxed(cadence->reg + INTR_STATUS); + irq_status->trd_status = readl_relaxed(cadence->reg + + TRD_COMP_INT_STATUS); + irq_status->trd_error = readl_relaxed(cadence->reg + + TRD_ERR_INT_STATUS); +} + +static u32 irq_detected(struct cadence_nand_info *cadence, + struct cadence_nand_irq_status *irq_status) +{ + cadence_nand_read_int_status(cadence, irq_status); + + return irq_status->status || irq_status->trd_status || + irq_status->trd_error; +} + +static void cadence_nand_reset_irq(struct cadence_nand_info *cadence) +{ + memset(&cadence->irq_status, 0, sizeof(cadence->irq_status)); + memset(&cadence->irq_mask, 0, sizeof(cadence->irq_mask)); +} + +/* + * This is the interrupt service routine. It handles all interrupts + * sent to this device. + */ +static irqreturn_t cadence_nand_isr(struct cadence_nand_info *cadence) +{ + struct cadence_nand_irq_status irq_status; + irqreturn_t result = IRQ_NONE; + + if (irq_detected(cadence, &irq_status)) { + /* Handle interrupt. */ + /* First acknowledge it. */ + cadence_nand_clear_interrupt(cadence, &irq_status); + /* Status in the device context for someone to read. */ + cadence->irq_status.status |= irq_status.status; + cadence->irq_status.trd_status |= irq_status.trd_status; + cadence->irq_status.trd_error |= irq_status.trd_error; + /* Tell the OS that we've handled this. */ + result = IRQ_HANDLED; + } + return result; +} + +static void cadence_nand_set_irq_mask(struct cadence_nand_info *cadence, + struct cadence_nand_irq_status *irq_mask) +{ + writel_relaxed(INTR_ENABLE_INTR_EN | irq_mask->status, + cadence->reg + INTR_ENABLE); + + writel_relaxed(irq_mask->trd_error, + cadence->reg + TRD_ERR_INT_STATUS_EN); +} + +static void +cadence_nand_wait_for_irq(struct cadence_nand_info *cadence, + struct cadence_nand_irq_status *irq_mask, + struct cadence_nand_irq_status *irq_status) +{ + irqreturn_t result = IRQ_NONE; + u32 start = get_timer(0); + + while (get_timer(start) < TIMEOUT_US) { + result = cadence_nand_isr(cadence); + + if (result == IRQ_HANDLED) { + *irq_status = cadence->irq_status; + break; + } + udelay(1); + } + + if (!result) { + /* Timeout error. */ + dev_err(cadence->dev, "timeout occurred:\n"); + dev_err(cadence->dev, "\tstatus = 0x%x, mask = 0x%x\n", + irq_status->status, irq_mask->status); + dev_err(cadence->dev, + "\ttrd_status = 0x%x, trd_status mask = 0x%x\n", + irq_status->trd_status, irq_mask->trd_status); + dev_err(cadence->dev, + "\t trd_error = 0x%x, trd_error mask = 0x%x\n", + irq_status->trd_error, irq_mask->trd_error); + } +} + +/* Execute generic command on NAND controller. */ +static int cadence_nand_generic_cmd_send(struct cadence_nand_info *cadence, + u8 chip_nr, + u64 mini_ctrl_cmd) +{ + u32 mini_ctrl_cmd_l, mini_ctrl_cmd_h, reg; + + mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_CS, chip_nr); + mini_ctrl_cmd_l = mini_ctrl_cmd & 0xFFFFFFFF; + mini_ctrl_cmd_h = mini_ctrl_cmd >> 32; + + if (cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_CTRL_BUSY, true)) + return -ETIMEDOUT; + + cadence_nand_reset_irq(cadence); + + writel_relaxed(mini_ctrl_cmd_l, cadence->reg + CMD_REG2); + writel_relaxed(mini_ctrl_cmd_h, cadence->reg + CMD_REG3); + + /* Select generic command. */ + reg = FIELD_PREP(CMD_REG0_CT, CMD_REG0_CT_GEN); + /* Thread number. */ + reg |= FIELD_PREP(CMD_REG0_TN, 0); + + /* Issue command. */ + writel_relaxed(reg, cadence->reg + CMD_REG0); + + return 0; +} + +/* Wait for data on slave DMA interface. */ +static int cadence_nand_wait_on_sdma(struct cadence_nand_info *cadence, u8 *out_sdma_trd, + u32 *out_sdma_size) +{ + struct cadence_nand_irq_status irq_mask, irq_status; + + irq_mask.trd_status = 0; + irq_mask.trd_error = 0; + irq_mask.status = INTR_STATUS_SDMA_TRIGG + | INTR_STATUS_SDMA_ERR + | INTR_STATUS_UNSUPP_CMD; + + cadence_nand_set_irq_mask(cadence, &irq_mask); + cadence_nand_wait_for_irq(cadence, &irq_mask, &irq_status); + if (irq_status.status == 0) { + dev_err(cadence->dev, "Timeout while waiting for SDMA\n"); + return -ETIMEDOUT; + } + + if (irq_status.status & INTR_STATUS_SDMA_TRIGG) { + *out_sdma_size = readl_relaxed(cadence->reg + SDMA_SIZE); + *out_sdma_trd = readl_relaxed(cadence->reg + SDMA_TRD_NUM); + *out_sdma_trd = + FIELD_GET(SDMA_TRD_NUM_SDMA_TRD, *out_sdma_trd); + } else { + dev_err(cadence->dev, "SDMA error - irq_status %x\n", + irq_status.status); + return -EIO; + } + + return 0; +} + +static void cadence_nand_get_caps(struct cadence_nand_info *cadence) +{ + u32 reg; + + reg = readl_relaxed(cadence->reg + CTRL_FEATURES); + + cadence->caps2.max_banks = 1 << FIELD_GET(CTRL_FEATURES_N_BANKS, reg); + + if (FIELD_GET(CTRL_FEATURES_DMA_DWITH64, reg)) + cadence->caps2.data_dma_width = 8; + else + cadence->caps2.data_dma_width = 4; + + if (reg & CTRL_FEATURES_CONTROL_DATA) + cadence->caps2.data_control_supp = true; + + if (reg & (CTRL_FEATURES_NVDDR_2_3 + | CTRL_FEATURES_NVDDR)) + cadence->caps2.is_phy_type_dll = true; +} + +/* Prepare CDMA descriptor. */ +static void +cadence_nand_cdma_desc_prepare(struct cadence_nand_info *cadence, + char nf_mem, u32 flash_ptr, dma_addr_t mem_ptr, + dma_addr_t ctrl_data_ptr, u16 ctype) +{ + struct cadence_nand_cdma_desc *cdma_desc = cadence->cdma_desc; + + memset(cdma_desc, 0, sizeof(struct cadence_nand_cdma_desc)); + + /* Set fields for one descriptor. */ + cdma_desc->flash_pointer = flash_ptr; + if (cadence->ctrl_rev >= 13) + cdma_desc->bank = nf_mem; + else + cdma_desc->flash_pointer |= (nf_mem << CDMA_CFPTR_MEM_SHIFT); + + cdma_desc->command_flags |= CDMA_CF_DMA_MASTER; + cdma_desc->command_flags |= CDMA_CF_INT; + + cdma_desc->memory_pointer = mem_ptr; + cdma_desc->status = 0; + cdma_desc->sync_flag_pointer = 0; + cdma_desc->sync_arguments = 0; + + cdma_desc->command_type = ctype; + cdma_desc->ctrl_data_ptr = ctrl_data_ptr; +} + +static u8 cadence_nand_check_desc_error(struct cadence_nand_info *cadence, + u32 desc_status) +{ + if (desc_status & CDMA_CS_ERP) + return STAT_ERASED; + + if (desc_status & CDMA_CS_UNCE) + return STAT_ECC_UNCORR; + + if (desc_status & CDMA_CS_ERR) { + dev_err(cadence->dev, ":CDMA desc error flag detected.\n"); + return STAT_FAIL; + } + + if (FIELD_GET(CDMA_CS_MAXERR, desc_status)) + return STAT_ECC_CORR; + + return STAT_FAIL; +} + +static int cadence_nand_cdma_finish(struct cadence_nand_info *cadence) +{ + struct cadence_nand_cdma_desc *desc_ptr = cadence->cdma_desc; + u8 status = STAT_BUSY; + + if (desc_ptr->status & CDMA_CS_FAIL) { + status = cadence_nand_check_desc_error(cadence, + desc_ptr->status); + dev_err(cadence->dev, ":CDMA error %x\n", desc_ptr->status); + } else if (desc_ptr->status & CDMA_CS_COMP) { + /* Descriptor finished with no errors. */ + if (desc_ptr->command_flags & CDMA_CF_CONT) { + dev_info(cadence->dev, "DMA unsupported flag is set"); + status = STAT_UNKNOWN; + } else { + /* Last descriptor. */ + status = STAT_OK; + } + } + + return status; +} + +static int cadence_nand_cdma_send(struct cadence_nand_info *cadence, + u8 thread) +{ + u32 reg; + int status; + + /* Wait for thread ready. */ + status = cadence_nand_wait_for_value(cadence, TRD_STATUS, + TIMEOUT_US, + BIT(thread), true); + if (status) + return status; + + cadence_nand_reset_irq(cadence); + + writel_relaxed((u32)cadence->dma_cdma_desc, + cadence->reg + CMD_REG2); + writel_relaxed(0, cadence->reg + CMD_REG3); + + /* Select CDMA mode. */ + reg = FIELD_PREP(CMD_REG0_CT, CMD_REG0_CT_CDMA); + /* Thread number. */ + reg |= FIELD_PREP(CMD_REG0_TN, thread); + /* Issue command. */ + writel_relaxed(reg, cadence->reg + CMD_REG0); + + return 0; +} + +/* Send SDMA command and wait for finish. */ +static u32 +cadence_nand_cdma_send_and_wait(struct cadence_nand_info *cadence, + u8 thread) +{ + struct cadence_nand_irq_status irq_mask, irq_status = {0}; + int status; + + irq_mask.trd_status = BIT(thread); + irq_mask.trd_error = BIT(thread); + irq_mask.status = INTR_STATUS_CDMA_TERR; + + cadence_nand_set_irq_mask(cadence, &irq_mask); + + status = cadence_nand_cdma_send(cadence, thread); + if (status) + return status; + + cadence_nand_wait_for_irq(cadence, &irq_mask, &irq_status); + + if (irq_status.status == 0 && irq_status.trd_status == 0 && + irq_status.trd_error == 0) { + dev_err(cadence->dev, "CDMA command timeout\n"); + return -ETIMEDOUT; + } + if (irq_status.status & irq_mask.status) { + dev_err(cadence->dev, "CDMA command failed\n"); + return -EIO; + } + + return 0; +} + +/* + * ECC size depends on configured ECC strength and on maximum supported + * ECC step size. + */ +static int cadence_nand_calc_ecc_bytes(int max_step_size, int strength) +{ + int nbytes = DIV_ROUND_UP(fls(8 * max_step_size) * strength, 8); + + return ALIGN(nbytes, 2); +} + +#define CADENCE_NAND_CALC_ECC_BYTES(max_step_size) \ + static int \ + cadence_nand_calc_ecc_bytes_##max_step_size(int step_size, \ + int strength)\ + {\ + return cadence_nand_calc_ecc_bytes(max_step_size, strength);\ + } + +CADENCE_NAND_CALC_ECC_BYTES(256) +CADENCE_NAND_CALC_ECC_BYTES(512) +CADENCE_NAND_CALC_ECC_BYTES(1024) +CADENCE_NAND_CALC_ECC_BYTES(2048) +CADENCE_NAND_CALC_ECC_BYTES(4096) + +/* Function reads BCH capabilities. */ +static int cadence_nand_read_bch_caps(struct cadence_nand_info *cadence) +{ + struct nand_ecc_caps *ecc_caps = &cadence->ecc_caps; + int max_step_size = 0, nstrengths, i; + u32 reg; + + reg = readl_relaxed(cadence->reg + BCH_CFG_3); + cadence->bch_metadata_size = FIELD_GET(BCH_CFG_3_METADATA_SIZE, reg); + if (cadence->bch_metadata_size < 4) { + dev_err(cadence->dev, + "Driver needs at least 4 bytes of BCH meta data\n"); + return -EIO; + } + + reg = readl_relaxed(cadence->reg + BCH_CFG_0); + cadence->ecc_strengths[0] = FIELD_GET(BCH_CFG_0_CORR_CAP_0, reg); + cadence->ecc_strengths[1] = FIELD_GET(BCH_CFG_0_CORR_CAP_1, reg); + cadence->ecc_strengths[2] = FIELD_GET(BCH_CFG_0_CORR_CAP_2, reg); + cadence->ecc_strengths[3] = FIELD_GET(BCH_CFG_0_CORR_CAP_3, reg); + + reg = readl_relaxed(cadence->reg + BCH_CFG_1); + cadence->ecc_strengths[4] = FIELD_GET(BCH_CFG_1_CORR_CAP_4, reg); + cadence->ecc_strengths[5] = FIELD_GET(BCH_CFG_1_CORR_CAP_5, reg); + cadence->ecc_strengths[6] = FIELD_GET(BCH_CFG_1_CORR_CAP_6, reg); + cadence->ecc_strengths[7] = FIELD_GET(BCH_CFG_1_CORR_CAP_7, reg); + + reg = readl_relaxed(cadence->reg + BCH_CFG_2); + cadence->ecc_stepinfos[0].stepsize = + FIELD_GET(BCH_CFG_2_SECT_0, reg); + + cadence->ecc_stepinfos[1].stepsize = + FIELD_GET(BCH_CFG_2_SECT_1, reg); + + nstrengths = 0; + for (i = 0; i < BCH_MAX_NUM_CORR_CAPS; i++) { + if (cadence->ecc_strengths[i] != 0) + nstrengths++; + } + + ecc_caps->nstepinfos = 0; + for (i = 0; i < BCH_MAX_NUM_SECTOR_SIZES; i++) { + /* ECC strengths are common for all step infos. */ + cadence->ecc_stepinfos[i].nstrengths = nstrengths; + cadence->ecc_stepinfos[i].strengths = + cadence->ecc_strengths; + + if (cadence->ecc_stepinfos[i].stepsize != 0) + ecc_caps->nstepinfos++; + + if (cadence->ecc_stepinfos[i].stepsize > max_step_size) + max_step_size = cadence->ecc_stepinfos[i].stepsize; + } + ecc_caps->stepinfos = &cadence->ecc_stepinfos[0]; + + switch (max_step_size) { + case 256: + ecc_caps->calc_ecc_bytes = &cadence_nand_calc_ecc_bytes_256; + break; + case 512: + ecc_caps->calc_ecc_bytes = &cadence_nand_calc_ecc_bytes_512; + break; + case 1024: + ecc_caps->calc_ecc_bytes = &cadence_nand_calc_ecc_bytes_1024; + break; + case 2048: + ecc_caps->calc_ecc_bytes = &cadence_nand_calc_ecc_bytes_2048; + break; + case 4096: + ecc_caps->calc_ecc_bytes = &cadence_nand_calc_ecc_bytes_4096; + break; + default: + dev_err(cadence->dev, + "Unsupported sector size(ecc step size) %d\n", + max_step_size); + return -EIO; + } + + return 0; +} + +/* Hardware initialization. */ +static int cadence_nand_hw_init(struct cadence_nand_info *cadence) +{ + int status; + u32 reg; + + status = cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_INIT_COMP, false); + if (status) + return status; + + reg = readl_relaxed(cadence->reg + CTRL_VERSION); + cadence->ctrl_rev = FIELD_GET(CTRL_VERSION_REV, reg); + + dev_info(cadence->dev, + "%s: cadence nand controller version reg %x\n", + __func__, reg); + + /* Disable cache and multiplane. */ + writel_relaxed(0, cadence->reg + MULTIPLANE_CFG); + writel_relaxed(0, cadence->reg + CACHE_CFG); + + /* Clear all interrupts. */ + writel_relaxed(0xFFFFFFFF, cadence->reg + INTR_STATUS); + + cadence_nand_get_caps(cadence); + if (cadence_nand_read_bch_caps(cadence)) + return -EIO; + + /* + * Set IO width access to 8. + * It is because during SW device discovering width access + * is expected to be 8. + */ + status = cadence_nand_set_access_width16(cadence, false); + + return status; +} + +#define TT_MAIN_OOB_AREAS 2 +#define TT_RAW_PAGE 3 +#define TT_BBM 4 +#define TT_MAIN_OOB_AREA_EXT 5 + +/* Prepare size of data to transfer. */ +static void +cadence_nand_prepare_data_size(struct mtd_info *mtd, + int transfer_type) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + u32 sec_size = 0, offset = 0, sec_cnt = 1; + u32 last_sec_size = cdns_chip->sector_size; + u32 data_ctrl_size = 0; + u32 reg = 0; + + if (cadence->curr_trans_type == transfer_type) + return; + + switch (transfer_type) { + case TT_MAIN_OOB_AREA_EXT: + sec_cnt = cdns_chip->sector_count; + sec_size = cdns_chip->sector_size; + data_ctrl_size = cdns_chip->avail_oob_size; + break; + case TT_MAIN_OOB_AREAS: + sec_cnt = cdns_chip->sector_count; + last_sec_size = cdns_chip->sector_size + + cdns_chip->avail_oob_size; + sec_size = cdns_chip->sector_size; + break; + case TT_RAW_PAGE: + last_sec_size = mtd->writesize + mtd->oobsize; + break; + case TT_BBM: + offset = mtd->writesize + cdns_chip->bbm_offs; + last_sec_size = 8; + break; + } + + reg = 0; + reg |= FIELD_PREP(TRAN_CFG_0_OFFSET, offset); + reg |= FIELD_PREP(TRAN_CFG_0_SEC_CNT, sec_cnt); + writel_relaxed(reg, cadence->reg + TRAN_CFG_0); + + reg = 0; + reg |= FIELD_PREP(TRAN_CFG_1_LAST_SEC_SIZE, last_sec_size); + reg |= FIELD_PREP(TRAN_CFG_1_SECTOR_SIZE, sec_size); + writel_relaxed(reg, cadence->reg + TRAN_CFG_1); + + if (cadence->caps2.data_control_supp) { + reg = readl_relaxed(cadence->reg + CONTROL_DATA_CTRL); + reg &= ~CONTROL_DATA_CTRL_SIZE; + reg |= FIELD_PREP(CONTROL_DATA_CTRL_SIZE, data_ctrl_size); + writel_relaxed(reg, cadence->reg + CONTROL_DATA_CTRL); + } + + cadence->curr_trans_type = transfer_type; +} + +static int +cadence_nand_cdma_transfer(struct cadence_nand_info *cadence, u8 chip_nr, + int page, void *buf, void *ctrl_dat, u32 buf_size, + u32 ctrl_dat_size, enum dma_data_direction dir, + bool with_ecc) +{ + dma_addr_t dma_buf, dma_ctrl_dat = 0; + u8 thread_nr = chip_nr; + int status; + u16 ctype; + + if (dir == DMA_FROM_DEVICE) + ctype = CDMA_CT_RD; + else + ctype = CDMA_CT_WR; + + cadence_nand_set_ecc_enable(cadence, with_ecc); + + dma_buf = dma_map_single(buf, buf_size, dir); + if (dma_mapping_error(cadence->dev, dma_buf)) { + dev_err(cadence->dev, "Failed to map DMA buffer\n"); + return -EIO; + } + + if (ctrl_dat && ctrl_dat_size) { + dma_ctrl_dat = dma_map_single(ctrl_dat, + ctrl_dat_size, dir); + if (dma_mapping_error(cadence->dev, dma_ctrl_dat)) { + dma_unmap_single(dma_buf, + buf_size, dir); + dev_err(cadence->dev, "Failed to map DMA buffer\n"); + return -EIO; + } + } + + cadence_nand_cdma_desc_prepare(cadence, chip_nr, page, + dma_buf, dma_ctrl_dat, ctype); + + status = cadence_nand_cdma_send_and_wait(cadence, thread_nr); + + dma_unmap_single(dma_buf, + buf_size, dir); + + if (ctrl_dat && ctrl_dat_size) + dma_unmap_single(dma_ctrl_dat, + ctrl_dat_size, dir); + if (status) + return status; + + return cadence_nand_cdma_finish(cadence); +} + +static void cadence_nand_set_timings(struct cadence_nand_info *cadence, + struct cadence_nand_timings *t) +{ + writel_relaxed(t->async_toggle_timings, + cadence->reg + ASYNC_TOGGLE_TIMINGS); + writel_relaxed(t->timings0, cadence->reg + TIMINGS0); + writel_relaxed(t->timings1, cadence->reg + TIMINGS1); + writel_relaxed(t->timings2, cadence->reg + TIMINGS2); + + if (cadence->caps2.is_phy_type_dll) + writel_relaxed(t->dll_phy_ctrl, cadence->reg + DLL_PHY_CTRL); + + writel_relaxed(t->phy_ctrl, cadence->reg + PHY_CTRL); + + if (cadence->caps2.is_phy_type_dll) { + writel_relaxed(0, cadence->reg + PHY_TSEL); + writel_relaxed(2, cadence->reg + PHY_DQ_TIMING); + writel_relaxed(t->phy_dqs_timing, + cadence->reg + PHY_DQS_TIMING); + writel_relaxed(t->phy_gate_lpbk_ctrl, + cadence->reg + PHY_GATE_LPBK_CTRL); + writel_relaxed(PHY_DLL_MASTER_CTRL_BYPASS_MODE, + cadence->reg + PHY_DLL_MASTER_CTRL); + writel_relaxed(0, cadence->reg + PHY_DLL_SLAVE_CTRL); + } +} + +static int cadence_nand_select_target(struct nand_chip *chip) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + + if (chip == cadence->selected_chip) + return 0; + + if (cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_CTRL_BUSY, true)) + return -ETIMEDOUT; + + cadence_nand_set_timings(cadence, &cdns_chip->timings); + + cadence_nand_set_ecc_strength(cadence, + cdns_chip->corr_str_idx); + + cadence_nand_set_erase_detection(cadence, true, + chip->ecc.strength); + + cadence->curr_trans_type = -1; + cadence->selected_chip = chip; + + return 0; +} + +static int cadence_nand_erase(struct mtd_info *mtd, int page) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + int status; + u8 thread_nr = cdns_chip->cs[chip->cur_cs]; + + cadence_nand_cdma_desc_prepare(cadence, + cdns_chip->cs[chip->cur_cs], + page, 0, 0, + CDMA_CT_ERASE); + status = cadence_nand_cdma_send_and_wait(cadence, thread_nr); + if (status) { + dev_err(cadence->dev, "erase operation failed\n"); + return -EIO; + } + + status = cadence_nand_cdma_finish(cadence); + if (status) + return status; + + return 0; +} + +static int cadence_ecc_setup(struct mtd_info *mtd, struct nand_chip *chip, int oobavail) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + int ret; + + /* + * If .size and .strength are already set (usually by DT), + * check if they are supported by this controller. + */ + if (chip->ecc.size && chip->ecc.strength) + return nand_check_ecc_caps(chip, &cadence->ecc_caps, oobavail); + + /* + * We want .size and .strength closest to the chip's requirement + * unless NAND_ECC_MAXIMIZE is requested. + */ + if (!(chip->ecc.options & NAND_ECC_MAXIMIZE)) { + ret = nand_match_ecc_req(chip, &cadence->ecc_caps, oobavail); + if (!ret) + return 0; + } + + /* Max ECC strength is the last thing we can do */ + return nand_maximize_ecc(chip, &cadence->ecc_caps, oobavail); +} + +static int cadence_nand_read_bbm(struct mtd_info *mtd, struct nand_chip *chip, int page, u8 *buf) +{ + int status; + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + + cadence_nand_prepare_data_size(mtd, TT_BBM); + + cadence_nand_set_skip_bytes_conf(cadence, 0, 0, 0); + + /* + * Read only bad block marker from offset + * defined by a memory manufacturer. + */ + status = cadence_nand_cdma_transfer(cadence, + cdns_chip->cs[chip->cur_cs], + page, cadence->buf, NULL, + mtd->oobsize, + 0, DMA_FROM_DEVICE, false); + if (status) { + dev_err(cadence->dev, "read BBM failed\n"); + return -EIO; + } + + memcpy(buf + cdns_chip->bbm_offs, cadence->buf, cdns_chip->bbm_len); + + return 0; +} + +static int cadence_nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, + const u8 *buf, int oob_required, int page) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + int status; + u16 marker_val = 0xFFFF; + + status = cadence_nand_select_target(chip); + if (status) + return status; + + cadence_nand_set_skip_bytes_conf(cadence, cdns_chip->bbm_len, + mtd->writesize + + cdns_chip->bbm_offs, + 1); + + if (oob_required) { + marker_val = *(u16 *)(chip->oob_poi + + cdns_chip->bbm_offs); + } else { + /* Set oob data to 0xFF. */ + memset(cadence->buf + mtd->writesize, 0xFF, + cdns_chip->avail_oob_size); + } + + cadence_nand_set_skip_marker_val(cadence, marker_val); + + cadence_nand_prepare_data_size(mtd, TT_MAIN_OOB_AREA_EXT); + + if (cadence_nand_dma_buf_ok(cadence, buf, mtd->writesize) && + cadence->caps2.data_control_supp) { + u8 *oob; + + if (oob_required) + oob = chip->oob_poi; + else + oob = cadence->buf + mtd->writesize; + + status = cadence_nand_cdma_transfer(cadence, + cdns_chip->cs[chip->cur_cs], + page, (void *)buf, oob, + mtd->writesize, + cdns_chip->avail_oob_size, + DMA_TO_DEVICE, true); + if (status) { + dev_err(cadence->dev, "write page failed\n"); + return -EIO; + } + + return 0; + } + + if (oob_required) { + /* Transfer the data to the oob area. */ + memcpy(cadence->buf + mtd->writesize, chip->oob_poi, + cdns_chip->avail_oob_size); + } + + memcpy(cadence->buf, buf, mtd->writesize); + + cadence_nand_prepare_data_size(mtd, TT_MAIN_OOB_AREAS); + + return cadence_nand_cdma_transfer(cadence, + cdns_chip->cs[chip->cur_cs], + page, cadence->buf, NULL, + mtd->writesize + + cdns_chip->avail_oob_size, + 0, DMA_TO_DEVICE, true); +} + +static int cadence_nand_write_oob(struct mtd_info *mtd, struct nand_chip *chip, + int page) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + + memset(cadence->buf, 0xFF, mtd->writesize); + + return cadence_nand_write_page(mtd, chip, cadence->buf, 1, page); +} + +static int cadence_nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + const u8 *buf, int oob_required, int page) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + int writesize = mtd->writesize; + int oobsize = mtd->oobsize; + int ecc_steps = chip->ecc.steps; + int ecc_size = chip->ecc.size; + int ecc_bytes = chip->ecc.bytes; + void *tmp_buf = cadence->buf; + int oob_skip = cdns_chip->bbm_len; + size_t size = writesize + oobsize; + int i, pos, len; + int status; + + status = cadence_nand_select_target(chip); + if (status) + return status; + + /* + * Fill the buffer with 0xff first except the full page transfer. + * This simplifies the logic. + */ + if (!buf || !oob_required) + memset(tmp_buf, 0xff, size); + + cadence_nand_set_skip_bytes_conf(cadence, 0, 0, 0); + + /* Arrange the buffer for syndrome payload/ecc layout. */ + if (buf) { + for (i = 0; i < ecc_steps; i++) { + pos = i * (ecc_size + ecc_bytes); + len = ecc_size; + + if (pos >= writesize) + pos += oob_skip; + else if (pos + len > writesize) + len = writesize - pos; + + memcpy(tmp_buf + pos, buf, len); + buf += len; + if (len < ecc_size) { + len = ecc_size - len; + memcpy(tmp_buf + writesize + oob_skip, buf, + len); + buf += len; + } + } + } + + if (oob_required) { + const u8 *oob = chip->oob_poi; + u32 oob_data_offset = (cdns_chip->sector_count - 1) * + (cdns_chip->sector_size + chip->ecc.bytes) + + cdns_chip->sector_size + oob_skip; + + /* BBM at the beginning of the OOB area. */ + memcpy(tmp_buf + writesize, oob, oob_skip); + + /* OOB free. */ + memcpy(tmp_buf + oob_data_offset, oob, + cdns_chip->avail_oob_size); + oob += cdns_chip->avail_oob_size; + + /* OOB ECC. */ + for (i = 0; i < ecc_steps; i++) { + pos = ecc_size + i * (ecc_size + ecc_bytes); + if (i == (ecc_steps - 1)) + pos += cdns_chip->avail_oob_size; + + len = ecc_bytes; + + if (pos >= writesize) + pos += oob_skip; + else if (pos + len > writesize) + len = writesize - pos; + + memcpy(tmp_buf + pos, oob, len); + oob += len; + if (len < ecc_bytes) { + len = ecc_bytes - len; + memcpy(tmp_buf + writesize + oob_skip, oob, + len); + oob += len; + } + } + } + + cadence_nand_prepare_data_size(mtd, TT_RAW_PAGE); + + return cadence_nand_cdma_transfer(cadence, + cdns_chip->cs[chip->cur_cs], + page, cadence->buf, NULL, + mtd->writesize + + mtd->oobsize, + 0, DMA_TO_DEVICE, false); +} + +static int cadence_nand_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip, + int page) +{ + return cadence_nand_write_page_raw(mtd, chip, NULL, true, page); +} + +static int cadence_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip, + u8 *buf, int oob_required, int page) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + int status; + int ecc_err_count = 0; + + status = cadence_nand_select_target(chip); + if (status) + return status; + + cadence_nand_set_skip_bytes_conf(cadence, cdns_chip->bbm_len, + mtd->writesize + + cdns_chip->bbm_offs, 1); + + /* + * If data buffer can be accessed by DMA and data_control feature + * is supported then transfer data and oob directly. + */ + if (cadence_nand_dma_buf_ok(cadence, buf, mtd->writesize) && + cadence->caps2.data_control_supp) { + u8 *oob; + + if (oob_required) + oob = chip->oob_poi; + else + oob = cadence->buf + mtd->writesize; + + cadence_nand_prepare_data_size(mtd, TT_MAIN_OOB_AREA_EXT); + status = cadence_nand_cdma_transfer(cadence, + cdns_chip->cs[chip->cur_cs], + page, buf, oob, + mtd->writesize, + cdns_chip->avail_oob_size, + DMA_FROM_DEVICE, true); + /* Otherwise use bounce buffer. */ + } else { + cadence_nand_prepare_data_size(mtd, TT_MAIN_OOB_AREAS); + status = cadence_nand_cdma_transfer(cadence, + cdns_chip->cs[chip->cur_cs], + page, cadence->buf, + NULL, mtd->writesize + + cdns_chip->avail_oob_size, + 0, DMA_FROM_DEVICE, true); + + memcpy(buf, cadence->buf, mtd->writesize); + if (oob_required) + memcpy(chip->oob_poi, + cadence->buf + mtd->writesize, + mtd->oobsize); + } + + switch (status) { + case STAT_ECC_UNCORR: + mtd->ecc_stats.failed++; + ecc_err_count++; + break; + case STAT_ECC_CORR: + ecc_err_count = FIELD_GET(CDMA_CS_MAXERR, + cadence->cdma_desc->status); + mtd->ecc_stats.corrected += ecc_err_count; + break; + case STAT_ERASED: + case STAT_OK: + break; + default: + dev_err(cadence->dev, "read page failed\n"); + return -EIO; + } + + if (oob_required) + if (cadence_nand_read_bbm(mtd, chip, page, chip->oob_poi)) + return -EIO; + + return ecc_err_count; +} + +static int cadence_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip, + int page) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + + return cadence_nand_read_page(mtd, chip, cadence->buf, 1, page); +} + +static int cadence_nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + u8 *buf, int oob_required, int page) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + int oob_skip = cdns_chip->bbm_len; + int writesize = mtd->writesize; + int ecc_steps = chip->ecc.steps; + int ecc_size = chip->ecc.size; + int ecc_bytes = chip->ecc.bytes; + void *tmp_buf = cadence->buf; + int i, pos, len; + int status; + + status = cadence_nand_select_target(chip); + if (status) + return status; + + cadence_nand_set_skip_bytes_conf(cadence, 0, 0, 0); + + cadence_nand_prepare_data_size(mtd, TT_RAW_PAGE); + status = cadence_nand_cdma_transfer(cadence, + cdns_chip->cs[chip->cur_cs], + page, cadence->buf, NULL, + mtd->writesize + + mtd->oobsize, + 0, DMA_FROM_DEVICE, false); + + switch (status) { + case STAT_ERASED: + case STAT_OK: + break; + default: + dev_err(cadence->dev, "read raw page failed\n"); + return -EIO; + } + + /* Arrange the buffer for syndrome payload/ecc layout. */ + if (buf) { + for (i = 0; i < ecc_steps; i++) { + pos = i * (ecc_size + ecc_bytes); + len = ecc_size; + + if (pos >= writesize) + pos += oob_skip; + else if (pos + len > writesize) + len = writesize - pos; + + memcpy(buf, tmp_buf + pos, len); + buf += len; + if (len < ecc_size) { + len = ecc_size - len; + memcpy(buf, tmp_buf + writesize + oob_skip, + len); + buf += len; + } + } + } + + if (oob_required) { + u8 *oob = chip->oob_poi; + u32 oob_data_offset = (cdns_chip->sector_count - 1) * + (cdns_chip->sector_size + chip->ecc.bytes) + + cdns_chip->sector_size + oob_skip; + + /* OOB free. */ + memcpy(oob, tmp_buf + oob_data_offset, + cdns_chip->avail_oob_size); + + /* BBM at the beginning of the OOB area. */ + memcpy(oob, tmp_buf + writesize, oob_skip); + + oob += cdns_chip->avail_oob_size; + + /* OOB ECC */ + for (i = 0; i < ecc_steps; i++) { + pos = ecc_size + i * (ecc_size + ecc_bytes); + len = ecc_bytes; + + if (i == (ecc_steps - 1)) + pos += cdns_chip->avail_oob_size; + + if (pos >= writesize) + pos += oob_skip; + else if (pos + len > writesize) + len = writesize - pos; + + memcpy(oob, tmp_buf + pos, len); + oob += len; + if (len < ecc_bytes) { + len = ecc_bytes - len; + memcpy(oob, tmp_buf + writesize + oob_skip, + len); + oob += len; + } + } + } + return 0; +} + +static int cadence_nand_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip, + int page) +{ + return cadence_nand_read_page_raw(mtd, chip, NULL, true, page); +} + +static void cadence_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + u8 thread_nr = 0; + u32 sdma_size; + int status; + int len_in_words = len >> 2; + + /* Wait until slave DMA interface is ready to data transfer. */ + status = cadence_nand_wait_on_sdma(cadence, &thread_nr, &sdma_size); + if (status) { + pr_err("Wait on sdma failed:%x\n", status); + hang(); + } + + if (!cadence->caps1->has_dma) { + readsq(cadence->io.virt, buf, len_in_words); + + if (sdma_size > len) { + memcpy(cadence->buf, buf + (len_in_words << 2), + len - (len_in_words << 2)); + readsl(cadence->io.virt, cadence->buf, + sdma_size / 4 - len_in_words); + } + } +} + +static void cadence_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + u8 thread_nr = 0; + u32 sdma_size; + int status; + int len_in_words = len >> 2; + + /* Wait until slave DMA interface is ready to data transfer. */ + status = cadence_nand_wait_on_sdma(cadence, &thread_nr, &sdma_size); + if (status) { + pr_err("Wait on sdma failed:%x\n", status); + hang(); + } + + if (!cadence->caps1->has_dma) { + writesq(cadence->io.virt, buf, len_in_words); + + if (sdma_size > len) { + memcpy(cadence->buf, buf + (len_in_words << 2), + len - (len_in_words << 2)); + writesl(cadence->io.virt, cadence->buf, + sdma_size / 4 - len_in_words); + } + } +} + +static int cadence_nand_cmd_opcode(struct nand_chip *chip, unsigned int op_id) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + u64 mini_ctrl_cmd = 0; + int ret; + + mini_ctrl_cmd |= GCMD_LAY_TWB; + mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INSTR, GCMD_LAY_INSTR_CMD); + mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INPUT_CMD, op_id); + + ret = cadence_nand_generic_cmd_send(cadence, + cdns_chip->cs[chip->cur_cs], + mini_ctrl_cmd); + + if (ret) + dev_err(cadence->dev, "send cmd %x failed\n", + op_id); + + return ret; +} + +static int cadence_nand_cmd_address(struct nand_chip *chip, + unsigned int naddrs, const u8 *addrs) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + u64 address = 0; + u64 mini_ctrl_cmd = 0; + int ret; + int i; + + mini_ctrl_cmd |= GCMD_LAY_TWB; + + mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INSTR, + GCMD_LAY_INSTR_ADDR); + + for (i = 0; i < naddrs; i++) + address |= (u64)addrs[i] << (8 * i); + + mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INPUT_ADDR, + address); + mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INPUT_ADDR_SIZE, + naddrs - 1); + + ret = cadence_nand_generic_cmd_send(cadence, + cdns_chip->cs[chip->cur_cs], + mini_ctrl_cmd); + + if (ret) + pr_err("send address %llx failed\n", address); + + return ret; +} + +static int cadence_nand_cmd_data(struct nand_chip *chip, + unsigned int len, u8 mode) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + u64 mini_ctrl_cmd = 0; + int ret; + + mini_ctrl_cmd |= GCMD_LAY_TWB; + mini_ctrl_cmd |= FIELD_PREP(GCMD_LAY_INSTR, + GCMD_LAY_INSTR_DATA); + + if (mode) + mini_ctrl_cmd |= FIELD_PREP(GCMD_DIR, GCMD_DIR_WRITE); + + mini_ctrl_cmd |= FIELD_PREP(GCMD_SECT_CNT, 1); + mini_ctrl_cmd |= FIELD_PREP(GCMD_LAST_SIZE, len); + + ret = cadence_nand_generic_cmd_send(cadence, + cdns_chip->cs[chip->cur_cs], + mini_ctrl_cmd); + + if (ret) { + pr_err("send generic data cmd failed\n"); + return ret; + } + + return ret; +} + +static int cadence_nand_waitfunc(struct mtd_info *mtd, struct nand_chip *chip) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + int status; + + status = cadence_nand_wait_for_value(cadence, RBN_SETINGS, + TIMEOUT_US, + BIT(cdns_chip->cs[chip->cur_cs]), + false); + return status; +} + +static int cadence_nand_ooblayout_free(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + + if (section) + return -ERANGE; + + oobregion->offset = cdns_chip->bbm_len; + oobregion->length = cdns_chip->avail_oob_size + - cdns_chip->bbm_len; + + return 0; +} + +static int cadence_nand_ooblayout_ecc(struct mtd_info *mtd, int section, + struct mtd_oob_region *oobregion) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + + if (section) + return -ERANGE; + + oobregion->offset = cdns_chip->avail_oob_size; + oobregion->length = chip->ecc.total; + + return 0; +} + +static const struct mtd_ooblayout_ops cadence_nand_ooblayout_ops = { + .rfree = cadence_nand_ooblayout_free, + .ecc = cadence_nand_ooblayout_ecc, +}; + +static int calc_cycl(u32 timing, u32 clock) +{ + if (timing == 0 || clock == 0) + return 0; + + if ((timing % clock) > 0) + return timing / clock; + else + return timing / clock - 1; +} + +/* Calculate max data valid window. */ +static inline u32 calc_tdvw_max(u32 trp_cnt, u32 clk_period, u32 trhoh_min, + u32 board_delay_skew_min, u32 ext_mode) +{ + if (ext_mode == 0) + clk_period /= 2; + + return (trp_cnt + 1) * clk_period + trhoh_min + + board_delay_skew_min; +} + +/* Calculate data valid window. */ +static inline u32 calc_tdvw(u32 trp_cnt, u32 clk_period, u32 trhoh_min, + u32 trea_max, u32 ext_mode) +{ + if (ext_mode == 0) + clk_period /= 2; + + return (trp_cnt + 1) * clk_period + trhoh_min - trea_max; +} + +static inline int of_get_child_count(const ofnode node) +{ + return fdtdec_get_child_count(gd->fdt_blob, ofnode_to_offset(node)); +} + +static int cadence_setup_data_interface(struct mtd_info *mtd, int chipnr, + const struct nand_data_interface *conf) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(mtd_to_nand(mtd)); + const struct nand_sdr_timings *sdr; + struct cadence_nand_timings *t = &cdns_chip->timings; + u32 reg; + u32 board_delay = cadence->board_delay; + u32 clk_period = DIV_ROUND_DOWN_ULL(1000000000000ULL, + cadence->nf_clk_rate); + u32 tceh_cnt, tcs_cnt, tadl_cnt, tccs_cnt; + u32 tfeat_cnt, trhz_cnt, tvdly_cnt; + u32 trhw_cnt, twb_cnt, twh_cnt = 0, twhr_cnt; + u32 twp_cnt = 0, trp_cnt = 0, trh_cnt = 0; + u32 if_skew = cadence->caps1->if_skew; + u32 board_delay_skew_min = board_delay - if_skew; + u32 board_delay_skew_max = board_delay + if_skew; + u32 dqs_sampl_res, phony_dqs_mod; + u32 tdvw, tdvw_min, tdvw_max; + u32 ext_rd_mode, ext_wr_mode; + u32 dll_phy_dqs_timing = 0, phony_dqs_timing = 0, rd_del_sel = 0; + u32 sampling_point; + + sdr = nand_get_sdr_timings(conf); + if (IS_ERR(sdr)) + return PTR_ERR(sdr); + + memset(t, 0, sizeof(*t)); + /* Sampling point calculation. */ + if (cadence->caps2.is_phy_type_dll) + phony_dqs_mod = 2; + else + phony_dqs_mod = 1; + + dqs_sampl_res = clk_period / phony_dqs_mod; + + tdvw_min = sdr->tREA_max + board_delay_skew_max; + /* + * The idea of those calculation is to get the optimum value + * for tRP and tRH timings. If it is NOT possible to sample data + * with optimal tRP/tRH settings, the parameters will be extended. + * If clk_period is 50ns (the lowest value) this condition is met + * for SDR timing modes 1, 2, 3, 4 and 5. + * If clk_period is 20ns the condition is met only for SDR timing + * mode 5. + */ + if (sdr->tRC_min <= clk_period && + sdr->tRP_min <= (clk_period / 2) && + sdr->tREH_min <= (clk_period / 2)) { + /* Performance mode. */ + ext_rd_mode = 0; + tdvw = calc_tdvw(trp_cnt, clk_period, sdr->tRHOH_min, + sdr->tREA_max, ext_rd_mode); + tdvw_max = calc_tdvw_max(trp_cnt, clk_period, sdr->tRHOH_min, + board_delay_skew_min, + ext_rd_mode); + /* + * Check if data valid window and sampling point can be found + * and is not on the edge (ie. we have hold margin). + * If not extend the tRP timings. + */ + if (tdvw > 0) { + if (tdvw_max <= tdvw_min || + (tdvw_max % dqs_sampl_res) == 0) { + /* + * No valid sampling point so the RE pulse need + * to be widen widening by half clock cycle. + */ + ext_rd_mode = 1; + } + } else { + /* + * There is no valid window + * to be able to sample data the tRP need to be widen. + * Very safe calculations are performed here. + */ + trp_cnt = (sdr->tREA_max + board_delay_skew_max + + dqs_sampl_res) / clk_period; + ext_rd_mode = 1; + } + + } else { + /* Extended read mode. */ + u32 trh; + + ext_rd_mode = 1; + trp_cnt = calc_cycl(sdr->tRP_min, clk_period); + trh = sdr->tRC_min - ((trp_cnt + 1) * clk_period); + if (sdr->tREH_min >= trh) + trh_cnt = calc_cycl(sdr->tREH_min, clk_period); + else + trh_cnt = calc_cycl(trh, clk_period); + + tdvw = calc_tdvw(trp_cnt, clk_period, sdr->tRHOH_min, + sdr->tREA_max, ext_rd_mode); + /* + * Check if data valid window and sampling point can be found + * or if it is at the edge check if previous is valid + * - if not extend the tRP timings. + */ + if (tdvw > 0) { + tdvw_max = calc_tdvw_max(trp_cnt, clk_period, + sdr->tRHOH_min, + board_delay_skew_min, + ext_rd_mode); + + if ((((tdvw_max / dqs_sampl_res) + * dqs_sampl_res) <= tdvw_min) || + (((tdvw_max % dqs_sampl_res) == 0) && + (((tdvw_max / dqs_sampl_res - 1) + * dqs_sampl_res) <= tdvw_min))) { + /* + * Data valid window width is lower than + * sampling resolution and do not hit any + * sampling point to be sure the sampling point + * will be found the RE low pulse width will be + * extended by one clock cycle. + */ + trp_cnt = trp_cnt + 1; + } + } else { + /* + * There is no valid window to be able to sample data. + * The tRP need to be widen. + * Very safe calculations are performed here. + */ + trp_cnt = (sdr->tREA_max + board_delay_skew_max + + dqs_sampl_res) / clk_period; + } + } + + tdvw_max = calc_tdvw_max(trp_cnt, clk_period, + sdr->tRHOH_min, + board_delay_skew_min, ext_rd_mode); + + if (sdr->tWC_min <= clk_period && + (sdr->tWP_min + if_skew) <= (clk_period / 2) && + (sdr->tWH_min + if_skew) <= (clk_period / 2)) { + ext_wr_mode = 0; + } else { + u32 twh; + + ext_wr_mode = 1; + twp_cnt = calc_cycl(sdr->tWP_min + if_skew, clk_period); + if ((twp_cnt + 1) * clk_period < (sdr->tALS_min + if_skew)) + twp_cnt = calc_cycl(sdr->tALS_min + if_skew, + clk_period); + + twh = (sdr->tWC_min - (twp_cnt + 1) * clk_period); + if (sdr->tWH_min >= twh) + twh = sdr->tWH_min; + + twh_cnt = calc_cycl(twh + if_skew, clk_period); + } + + reg = FIELD_PREP(ASYNC_TOGGLE_TIMINGS_TRH, trh_cnt); + reg |= FIELD_PREP(ASYNC_TOGGLE_TIMINGS_TRP, trp_cnt); + reg |= FIELD_PREP(ASYNC_TOGGLE_TIMINGS_TWH, twh_cnt); + reg |= FIELD_PREP(ASYNC_TOGGLE_TIMINGS_TWP, twp_cnt); + t->async_toggle_timings = reg; + dev_dbg(cadence->dev, "ASYNC_TOGGLE_TIMINGS_SDR\t%x\n", reg); + + tadl_cnt = calc_cycl((sdr->tADL_min + if_skew), clk_period); + tccs_cnt = calc_cycl((sdr->tCCS_min + if_skew), clk_period); + twhr_cnt = calc_cycl((sdr->tWHR_min + if_skew), clk_period); + trhw_cnt = calc_cycl((sdr->tRHW_min + if_skew), clk_period); + reg = FIELD_PREP(TIMINGS0_TADL, tadl_cnt); + + /* + * If timing exceeds delay field in timing register + * then use maximum value. + */ + if (FIELD_FIT(TIMINGS0_TCCS, tccs_cnt)) + reg |= FIELD_PREP(TIMINGS0_TCCS, tccs_cnt); + else + reg |= TIMINGS0_TCCS; + + reg |= FIELD_PREP(TIMINGS0_TWHR, twhr_cnt); + reg |= FIELD_PREP(TIMINGS0_TRHW, trhw_cnt); + t->timings0 = reg; + dev_dbg(cadence->dev, "TIMINGS0_SDR\t%x\n", reg); + + /* The following is related to single signal so skew is not needed. */ + trhz_cnt = calc_cycl(sdr->tRHZ_max, clk_period); + trhz_cnt = trhz_cnt + 1; + twb_cnt = calc_cycl((sdr->tWB_max + board_delay), clk_period); + /* + * Because of the two stage syncflop the value must be increased by 3 + * first value is related with sync, second value is related + * with output if delay. + */ + twb_cnt = twb_cnt + 3 + 5; + /* + * The following is related to the we edge of the random data input + * sequence so skew is not needed. + */ + tvdly_cnt = calc_cycl(500000 + if_skew, clk_period); + reg = FIELD_PREP(TIMINGS1_TRHZ, trhz_cnt); + reg |= FIELD_PREP(TIMINGS1_TWB, twb_cnt); + reg |= FIELD_PREP(TIMINGS1_TVDLY, tvdly_cnt); + t->timings1 = reg; + dev_dbg(cadence->dev, "TIMINGS1_SDR\t%x\n", reg); + + tfeat_cnt = calc_cycl(sdr->tFEAT_max, clk_period); + if (tfeat_cnt < twb_cnt) + tfeat_cnt = twb_cnt; + + tceh_cnt = calc_cycl(sdr->tCEH_min, clk_period); + tcs_cnt = calc_cycl((sdr->tCS_min + if_skew), clk_period); + + reg = FIELD_PREP(TIMINGS2_TFEAT, tfeat_cnt); + reg |= FIELD_PREP(TIMINGS2_CS_HOLD_TIME, tceh_cnt); + reg |= FIELD_PREP(TIMINGS2_CS_SETUP_TIME, tcs_cnt); + t->timings2 = reg; + dev_dbg(cadence->dev, "TIMINGS2_SDR\t%x\n", reg); + + if (cadence->caps2.is_phy_type_dll) { + reg = DLL_PHY_CTRL_DLL_RST_N; + if (ext_wr_mode) + reg |= DLL_PHY_CTRL_EXTENDED_WR_MODE; + if (ext_rd_mode) + reg |= DLL_PHY_CTRL_EXTENDED_RD_MODE; + + reg |= FIELD_PREP(DLL_PHY_CTRL_RS_HIGH_WAIT_CNT, 7); + reg |= FIELD_PREP(DLL_PHY_CTRL_RS_IDLE_CNT, 7); + t->dll_phy_ctrl = reg; + dev_dbg(cadence->dev, "DLL_PHY_CTRL_SDR\t%x\n", reg); + } + + /* Sampling point calculation. */ + if ((tdvw_max % dqs_sampl_res) > 0) + sampling_point = tdvw_max / dqs_sampl_res; + else + sampling_point = (tdvw_max / dqs_sampl_res - 1); + + if (sampling_point * dqs_sampl_res > tdvw_min) { + dll_phy_dqs_timing = + FIELD_PREP(PHY_DQS_TIMING_DQS_SEL_OE_END, 4); + dll_phy_dqs_timing |= PHY_DQS_TIMING_USE_PHONY_DQS; + phony_dqs_timing = sampling_point / phony_dqs_mod; + + if ((sampling_point % 2) > 0) { + dll_phy_dqs_timing |= PHY_DQS_TIMING_PHONY_DQS_SEL; + if ((tdvw_max % dqs_sampl_res) == 0) + /* + * Calculation for sampling point at the edge + * of data and being odd number. + */ + phony_dqs_timing = (tdvw_max / dqs_sampl_res) + / phony_dqs_mod - 1; + + if (!cadence->caps2.is_phy_type_dll) + phony_dqs_timing--; + + } else { + phony_dqs_timing--; + } + rd_del_sel = phony_dqs_timing + 3; + } else { + dev_warn(cadence->dev, + "ERROR : cannot find valid sampling point\n"); + } + + reg = FIELD_PREP(PHY_CTRL_PHONY_DQS, phony_dqs_timing); + if (cadence->caps2.is_phy_type_dll) + reg |= PHY_CTRL_SDR_DQS; + t->phy_ctrl = reg; + dev_dbg(cadence->dev, "PHY_CTRL_REG_SDR\t%x\n", reg); + + if (cadence->caps2.is_phy_type_dll) { + dev_dbg(cadence->dev, "PHY_TSEL_REG_SDR\t%x\n", 0); + dev_dbg(cadence->dev, "PHY_DQ_TIMING_REG_SDR\t%x\n", 2); + dev_dbg(cadence->dev, "PHY_DQS_TIMING_REG_SDR\t%x\n", + dll_phy_dqs_timing); + t->phy_dqs_timing = dll_phy_dqs_timing; + + reg = FIELD_PREP(PHY_GATE_LPBK_CTRL_RDS, rd_del_sel); + dev_dbg(cadence->dev, "PHY_GATE_LPBK_CTRL_REG_SDR\t%x\n", + reg); + t->phy_gate_lpbk_ctrl = reg; + + dev_dbg(cadence->dev, "PHY_DLL_MASTER_CTRL_REG_SDR\t%lx\n", + PHY_DLL_MASTER_CTRL_BYPASS_MODE); + dev_dbg(cadence->dev, "PHY_DLL_SLAVE_CTRL_REG_SDR\t%x\n", 0); + } + return 0; +} + +static int cadence_nand_attach_chip(struct nand_chip *chip) +{ + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); + static struct nand_ecclayout nand_oob; + u32 ecc_size; + struct mtd_info *mtd = nand_to_mtd(chip); + int ret; + + if (chip->options & NAND_BUSWIDTH_16) { + ret = cadence_nand_set_access_width16(cadence, true); + if (ret) + return ret; + } + + chip->bbt_options |= NAND_BBT_USE_FLASH; + chip->bbt_options |= NAND_BBT_NO_OOB; + chip->ecc.mode = NAND_ECC_HW_SYNDROME; + + chip->options |= NAND_NO_SUBPAGE_WRITE; + + cdns_chip->bbm_offs = chip->badblockpos; + cdns_chip->bbm_offs &= ~0x01; + /* this value should be even number */ + cdns_chip->bbm_len = 2; + + ret = cadence_ecc_setup(mtd, chip, mtd->oobsize - cdns_chip->bbm_len); + if (ret) { + dev_err(cadence->dev, "ECC configuration failed\n"); + return ret; + } + + dev_dbg(cadence->dev, + "chosen ECC settings: step=%d, strength=%d, bytes=%d\n", + chip->ecc.size, chip->ecc.strength, chip->ecc.bytes); + + /* Error correction configuration. */ + cdns_chip->sector_size = chip->ecc.size; + cdns_chip->sector_count = mtd->writesize / cdns_chip->sector_size; + ecc_size = cdns_chip->sector_count * chip->ecc.bytes; + + cdns_chip->avail_oob_size = mtd->oobsize - ecc_size; + + if (cdns_chip->avail_oob_size > cadence->bch_metadata_size) + cdns_chip->avail_oob_size = cadence->bch_metadata_size; + + if ((cdns_chip->avail_oob_size + cdns_chip->bbm_len + ecc_size) + > mtd->oobsize) + cdns_chip->avail_oob_size -= 4; + + ret = cadence_nand_get_ecc_strength_idx(cadence, chip->ecc.strength); + if (ret < 0) + return -EINVAL; + + cdns_chip->corr_str_idx = (u8)ret; + + if (cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_CTRL_BUSY, true)) + return -ETIMEDOUT; + + cadence_nand_set_ecc_strength(cadence, + cdns_chip->corr_str_idx); + + cadence_nand_set_erase_detection(cadence, true, + chip->ecc.strength); + + dev_dbg(cadence->dev, + "chosen ECC settings: step=%d, strength=%d, bytes=%d\n", + chip->ecc.size, chip->ecc.strength, chip->ecc.bytes); + + /* Override the default read operations. */ + chip->ecc.options |= NAND_ECC_CUSTOM_PAGE_ACCESS; + chip->ecc.read_page = cadence_nand_read_page; + chip->ecc.read_page_raw = cadence_nand_read_page_raw; + chip->ecc.write_page = cadence_nand_write_page; + chip->ecc.write_page_raw = cadence_nand_write_page_raw; + chip->ecc.read_oob = cadence_nand_read_oob; + chip->ecc.write_oob = cadence_nand_write_oob; + chip->ecc.read_oob_raw = cadence_nand_read_oob_raw; + chip->ecc.write_oob_raw = cadence_nand_write_oob_raw; + chip->erase = cadence_nand_erase; + + if ((mtd->writesize + mtd->oobsize) > cadence->buf_size) + cadence->buf_size = mtd->writesize + mtd->oobsize; + + mtd_set_ooblayout(mtd, &cadence_nand_ooblayout_ops); + + nand_oob.eccbytes = cdns_chip->chip.ecc.bytes; + cdns_chip->chip.ecc.layout = &nand_oob; + + return 0; +} + +/* Dummy implementation: we don't support multiple chips */ +static void cadence_nand_select_chip(struct mtd_info *mtd, int chipnr) +{ + switch (chipnr) { + case -1: + case 0: + break; + + default: + WARN_ON(chipnr); + } +} + +static void cadence_nand_cmdfunc(struct mtd_info *mtd, unsigned int command, + int offset_in_page, int page) +{ +} + +static int cadence_nand_dev_ready(struct mtd_info *mtd) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + + if (cadence_nand_wait_for_value(cadence, CTRL_STATUS, + TIMEOUT_US, + CTRL_STATUS_CTRL_BUSY, true)) + return -ETIMEDOUT; + + return 0; +} + +static u8 cadence_nand_read_byte(struct mtd_info *mtd) +{ + return 0; +} + +static void cadence_nand_write_byte(struct mtd_info *mtd, u8 byte) +{ + cadence_nand_write_buf(mtd, &byte, 1); +} + +static int cadence_nand_chip_init(struct cadence_nand_info *cadence, ofnode node) +{ + struct cdns_nand_chip *cdns_chip; + struct nand_chip *chip; + struct mtd_info *mtd; + int ret, i; + int nsels; + u32 cs; + + if (!ofnode_get_property(node, "reg", &nsels)) + return -ENODEV; + + nsels /= sizeof(u32); + if (nsels <= 0) { + dev_err(cadence->dev, "invalid reg property size %d\n", nsels); + return -EINVAL; + } + + cdns_chip = devm_kzalloc(cadence->dev, sizeof(*cdns_chip) + + (nsels * sizeof(u8)), GFP_KERNEL); + if (!cdns_chip) + return -ENODEV; + + cdns_chip->nsels = nsels; + for (i = 0; i < nsels; i++) { + /* Retrieve CS id. */ + ret = ofnode_read_u32_index(node, "reg", i, &cs); + if (ret) { + dev_err(cadence->dev, + "could not retrieve reg property: %d\n", + ret); + goto free_buf; + } + + if (cs >= cadence->caps2.max_banks) { + dev_err(cadence->dev, + "invalid reg value: %u (max CS = %d)\n", + cs, cadence->caps2.max_banks); + ret = -EINVAL; + goto free_buf; + } + + if (test_and_set_bit(cs, &cadence->assigned_cs)) { + dev_err(cadence->dev, + "CS %d already assigned\n", cs); + ret = -EINVAL; + goto free_buf; + } + + cdns_chip->cs[i] = cs; + } + + chip = &cdns_chip->chip; + chip->controller = &cadence->controller; + nand_set_flash_node(chip, node); + mtd = nand_to_mtd(chip); + mtd->dev->parent = cadence->dev; + + chip->options |= NAND_BUSWIDTH_AUTO; + chip->select_chip = cadence_nand_select_chip; + chip->cmdfunc = cadence_nand_cmdfunc; + chip->dev_ready = cadence_nand_dev_ready; + chip->read_byte = cadence_nand_read_byte; + chip->write_byte = cadence_nand_write_byte; + chip->waitfunc = cadence_nand_waitfunc; + chip->read_buf = cadence_nand_read_buf; + chip->write_buf = cadence_nand_write_buf; + chip->setup_data_interface = cadence_setup_data_interface; + + ret = nand_scan_ident(mtd, 1, NULL); + if (ret) { + dev_err(cadence->dev, "Chip identification failure\n"); + goto free_buf; + } + + ret = cadence_nand_attach_chip(chip); + if (ret) { + dev_err(cadence->dev, "Chip not able to attached\n"); + goto free_buf; + } + + ret = nand_scan_tail(mtd); + if (ret) { + dev_err(cadence->dev, "could not scan the nand chip\n"); + goto free_buf; + } + + ret = nand_register(0, mtd); + if (ret) { + dev_err(cadence->dev, "Failed to register MTD: %d\n", ret); + goto free_buf; + } + + return 0; + +free_buf: + devm_kfree(cadence->dev, cdns_chip); + return ret; +} + +static int cadence_nand_chips_init(struct cadence_nand_info *cadence) +{ + struct udevice *dev = cadence->dev; + ofnode node = dev_ofnode(dev); + ofnode nand_node; + int max_cs = cadence->caps2.max_banks; + int nchips, ret; + + nchips = of_get_child_count(node); + + if (nchips > max_cs) { + dev_err(cadence->dev, + "too many NAND chips: %d (max = %d CS)\n", + nchips, max_cs); + return -EINVAL; + } + + ofnode_for_each_subnode(nand_node, node) { + ret = cadence_nand_chip_init(cadence, nand_node); + if (ret) + return ret; + } + + return 0; +} + +static int cadence_nand_init(struct cadence_nand_info *cadence) +{ + int ret; + + cadence->cdma_desc = dma_alloc_coherent(sizeof(*cadence->cdma_desc), + (unsigned long *)&cadence->dma_cdma_desc); + if (!cadence->cdma_desc) + return -ENOMEM; + + cadence->buf_size = SZ_16K; + cadence->buf = kmalloc(cadence->buf_size, GFP_KERNEL); + if (!cadence->buf) { + ret = -ENOMEM; + goto free_buf_desc; + } + + //Hardware initialization + ret = cadence_nand_hw_init(cadence); + if (ret) + goto free_buf; + + cadence->curr_corr_str_idx = 0xFF; + + ret = cadence_nand_chips_init(cadence); + if (ret) { + dev_err(cadence->dev, "Failed to register MTD: %d\n", + ret); + goto free_buf; + } + + kfree(cadence->buf); + cadence->buf = kzalloc(cadence->buf_size, GFP_KERNEL); + if (!cadence->buf) { + ret = -ENOMEM; + goto free_buf_desc; + } + + return 0; + +free_buf: + kfree(cadence->buf); + +free_buf_desc: + dma_free_coherent(cadence->cdma_desc); + + return ret; +} + +static const struct cadence_nand_dt_devdata cadence_nand_default = { + .if_skew = 0, + .has_dma = 0, +}; + +static const struct udevice_id cadence_nand_dt_ids[] = { + { + .compatible = "cdns,nand", + .data = (unsigned long)&cadence_nand_default + }, {} +}; + +static int cadence_nand_dt_probe(struct udevice *dev) +{ + struct cadence_nand_info *cadence = dev_get_priv(dev); + const struct udevice_id *of_id; + const struct cadence_nand_dt_devdata *devdata; + struct resource res; + int ret; + u32 val; + + if (!dev) { + dev_warn(dev, "Device ptr null\n"); + return -EINVAL; + } + + of_id = &cadence_nand_dt_ids[0]; + devdata = (struct cadence_nand_dt_devdata *)of_id->data; + + cadence->caps1 = devdata; + cadence->dev = dev; + + ret = clk_get_by_index(dev, 0, &cadence->clk); + if (ret) + return ret; + + ret = clk_enable(&cadence->clk); + if (ret && ret != -ENOSYS && ret != -ENOMEM) { + dev_err(dev, "failed to enable clock\n"); + return ret; + } + cadence->nf_clk_rate = clk_get_rate(&cadence->clk); + + ret = reset_get_by_index(dev, 1, &cadence->softphy_reset); + if (ret) { + if (ret != -ENOMEM) + dev_warn(dev, "Can't get softphy_reset: %d\n", ret); + } else { + reset_deassert(&cadence->softphy_reset); + } + + ret = reset_get_by_index(dev, 0, &cadence->nand_reset); + if (ret) { + if (ret != -ENOMEM) + dev_warn(dev, "Can't get nand_reset: %d\n", ret); + } else { + reset_deassert(&cadence->nand_reset); + } + + ret = dev_read_resource_byname(dev, "reg", &res); + if (ret) + return ret; + cadence->reg = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = dev_read_resource_byname(dev, "sdma", &res); + if (ret) + return ret; + cadence->io.dma = res.start; + cadence->io.virt = devm_ioremap(dev, res.start, resource_size(&res)); + + ret = ofnode_read_u32(dev_ofnode(dev->parent), + "cdns,board-delay-ps", &val); + if (ret) { + val = 4830; + dev_info(cadence->dev, + "missing cdns,board-delay-ps property, %d was set\n", + val); + } + cadence->board_delay = val; + + ret = cadence_nand_init(cadence); + if (ret) + return ret; + + return 0; +} + +U_BOOT_DRIVER(cadence_nand_dt) = { + .name = "cadence-nand-dt", + .id = UCLASS_MTD, + .of_match = cadence_nand_dt_ids, + .probe = cadence_nand_dt_probe, + .priv_auto = sizeof(struct cadence_nand_info), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(cadence_nand_dt), + &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize Cadence NAND controller. (error %d)\n", + ret); +} diff --git a/include/cadence-nand.h b/include/cadence-nand.h new file mode 100644 index 00000000000..7973e5b55bf --- /dev/null +++ b/include/cadence-nand.h @@ -0,0 +1,527 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Cadence NAND flash controller driver + * + * Copyright (C) 2019 Cadence + * + * Author: Piotr Sroka + * + */ + +#ifndef _CADENCE_NAND_H_ +#define _CADENCE_NAND_H_ +#include +#include +#include +#include + +/* + * HPNFC can work in 3 modes: + * - PIO - can work in master or slave DMA + * - CDMA - needs Master DMA for accessing command descriptors. + * - Generic mode - can use only slave DMA. + * CDMA and PIO modes can be used to execute only base commands. + * CDMA and PIO modes can be used to execute only base commands. + * Generic mode can be used to execute any command + * on NAND flash memory. Driver uses CDMA mode for + * block erasing, page reading, page programing. + * Generic mode is used for executing rest of commands. + */ + +#define DMA_DATA_SIZE_ALIGN 8 + +/* Register definition. */ +/* + * Command register 0. + * Writing data to this register will initiate a new transaction + * of the NF controller. + */ +#define CMD_REG0 0x0000 +/* Command type field mask. */ +#define CMD_REG0_CT GENMASK(31, 30) +/* Command type CDMA. */ +#define CMD_REG0_CT_CDMA 0uL +/* Command type generic. */ +#define CMD_REG0_CT_GEN 3uL +/* Command thread number field mask. */ +#define CMD_REG0_TN GENMASK(27, 24) + +/* Command register 2. */ +#define CMD_REG2 0x0008 +/* Command register 3. */ +#define CMD_REG3 0x000C +/* Pointer register to select which thread status will be selected. */ +#define CMD_STATUS_PTR 0x0010 +/* Command status register for selected thread. */ +#define CMD_STATUS 0x0014 + +/* Interrupt status register. */ +#define INTR_STATUS 0x0110 +#define INTR_STATUS_SDMA_ERR BIT(22) +#define INTR_STATUS_SDMA_TRIGG BIT(21) +#define INTR_STATUS_UNSUPP_CMD BIT(19) +#define INTR_STATUS_DDMA_TERR BIT(18) +#define INTR_STATUS_CDMA_TERR BIT(17) +#define INTR_STATUS_CDMA_IDL BIT(16) + +/* Interrupt enable register. */ +#define INTR_ENABLE 0x0114 +#define INTR_ENABLE_INTR_EN BIT(31) + +/* Controller internal state. */ +#define CTRL_STATUS 0x0118 +#define CTRL_STATUS_INIT_COMP BIT(9) +#define CTRL_STATUS_CTRL_BUSY BIT(8) + +/* Command Engine threads state. */ +#define TRD_STATUS 0x0120 + +/* Command Engine interrupt thread error status. */ +#define TRD_ERR_INT_STATUS 0x0128 +/* Command Engine interrupt thread error enable. */ +#define TRD_ERR_INT_STATUS_EN 0x0130 +/* Command Engine interrupt thread complete status. */ +#define TRD_COMP_INT_STATUS 0x0138 + +/* + * Transfer config 0 register. + * Configures data transfer parameters. + */ +#define TRAN_CFG_0 0x0400 +/* Offset value from the beginning of the page. */ +#define TRAN_CFG_0_OFFSET GENMASK(31, 16) +/* Numbers of sectors to transfer within singlNF device's page. */ +#define TRAN_CFG_0_SEC_CNT GENMASK(7, 0) + +/* + * Transfer config 1 register. + * Configures data transfer parameters. + */ +#define TRAN_CFG_1 0x0404 +/* Size of last data sector. */ +#define TRAN_CFG_1_LAST_SEC_SIZE GENMASK(31, 16) +/* Size of not-last data sector. */ +#define TRAN_CFG_1_SECTOR_SIZE GENMASK(15, 0) + +/* ECC engine configuration register 0. */ +#define ECC_CONFIG_0 0x0428 +/* Correction strength. */ +#define ECC_CONFIG_0_CORR_STR GENMASK(10, 8) +/* Enable erased pages detection mechanism. */ +#define ECC_CONFIG_0_ERASE_DET_EN BIT(1) +/* Enable controller ECC check bits generation and correction. */ +#define ECC_CONFIG_0_ECC_EN BIT(0) + +/* ECC engine configuration register 1. */ +#define ECC_CONFIG_1 0x042C + +/* Multiplane settings register. */ +#define MULTIPLANE_CFG 0x0434 +/* Cache operation settings. */ +#define CACHE_CFG 0x0438 + +/* Transferred data block size for the slave DMA module. */ +#define SDMA_SIZE 0x0440 + +/* Thread number associated with transferred data block + * for the slave DMA module. + */ +#define SDMA_TRD_NUM 0x0444 +/* Thread number mask. */ +#define SDMA_TRD_NUM_SDMA_TRD GENMASK(2, 0) + +#define CONTROL_DATA_CTRL 0x0494 +/* Thread number mask. */ +#define CONTROL_DATA_CTRL_SIZE GENMASK(15, 0) + +#define CTRL_VERSION 0x800 +#define CTRL_VERSION_REV GENMASK(7, 0) + +/* Available hardware features of the controller. */ +#define CTRL_FEATURES 0x804 +/* Support for NV-DDR2/3 work mode. */ +#define CTRL_FEATURES_NVDDR_2_3 BIT(28) +/* Support for NV-DDR work mode. */ +#define CTRL_FEATURES_NVDDR BIT(27) +/* Support for asynchronous work mode. */ +#define CTRL_FEATURES_ASYNC BIT(26) +/* Support for asynchronous work mode. */ +#define CTRL_FEATURES_N_BANKS GENMASK(25, 24) +/* Slave and Master DMA data width. */ +#define CTRL_FEATURES_DMA_DWITH64 BIT(21) +/* Availability of Control Data feature.*/ +#define CTRL_FEATURES_CONTROL_DATA BIT(10) + +/* BCH Engine identification register 0 - correction strengths. */ +#define BCH_CFG_0 0x838 +#define BCH_CFG_0_CORR_CAP_0 GENMASK(7, 0) +#define BCH_CFG_0_CORR_CAP_1 GENMASK(15, 8) +#define BCH_CFG_0_CORR_CAP_2 GENMASK(23, 16) +#define BCH_CFG_0_CORR_CAP_3 GENMASK(31, 24) + +/* BCH Engine identification register 1 - correction strengths. */ +#define BCH_CFG_1 0x83C +#define BCH_CFG_1_CORR_CAP_4 GENMASK(7, 0) +#define BCH_CFG_1_CORR_CAP_5 GENMASK(15, 8) +#define BCH_CFG_1_CORR_CAP_6 GENMASK(23, 16) +#define BCH_CFG_1_CORR_CAP_7 GENMASK(31, 24) + +/* BCH Engine identification register 2 - sector sizes. */ +#define BCH_CFG_2 0x840 +#define BCH_CFG_2_SECT_0 GENMASK(15, 0) +#define BCH_CFG_2_SECT_1 GENMASK(31, 16) + +/* BCH Engine identification register 3. */ +#define BCH_CFG_3 0x844 +#define BCH_CFG_3_METADATA_SIZE GENMASK(23, 16) + +/* Ready/Busy# line status. */ +#define RBN_SETINGS 0x1004 + +/* Common settings. */ +#define COMMON_SET 0x1008 +/* 16 bit device connected to the NAND Flash interface. */ +#define COMMON_SET_DEVICE_16BIT BIT(8) + +/* Skip_bytes registers. */ +#define SKIP_BYTES_CONF 0x100C +#define SKIP_BYTES_MARKER_VALUE GENMASK(31, 16) +#define SKIP_BYTES_NUM_OF_BYTES GENMASK(7, 0) + +#define SKIP_BYTES_OFFSET 0x1010 +#define SKIP_BYTES_OFFSET_VALUE GENMASK(23, 0) + +/* Timings configuration. */ +#define ASYNC_TOGGLE_TIMINGS 0x101c +#define ASYNC_TOGGLE_TIMINGS_TRH GENMASK(28, 24) +#define ASYNC_TOGGLE_TIMINGS_TRP GENMASK(20, 16) +#define ASYNC_TOGGLE_TIMINGS_TWH GENMASK(12, 8) +#define ASYNC_TOGGLE_TIMINGS_TWP GENMASK(4, 0) + +#define TIMINGS0 0x1024 +#define TIMINGS0_TADL GENMASK(31, 24) +#define TIMINGS0_TCCS GENMASK(23, 16) +#define TIMINGS0_TWHR GENMASK(15, 8) +#define TIMINGS0_TRHW GENMASK(7, 0) + +#define TIMINGS1 0x1028 +#define TIMINGS1_TRHZ GENMASK(31, 24) +#define TIMINGS1_TWB GENMASK(23, 16) +#define TIMINGS1_TVDLY GENMASK(7, 0) + +#define TIMINGS2 0x102c +#define TIMINGS2_TFEAT GENMASK(25, 16) +#define TIMINGS2_CS_HOLD_TIME GENMASK(13, 8) +#define TIMINGS2_CS_SETUP_TIME GENMASK(5, 0) + +/* Configuration of the resynchronization of slave DLL of PHY. */ +#define DLL_PHY_CTRL 0x1034 +#define DLL_PHY_CTRL_DLL_RST_N BIT(24) +#define DLL_PHY_CTRL_EXTENDED_WR_MODE BIT(17) +#define DLL_PHY_CTRL_EXTENDED_RD_MODE BIT(16) +#define DLL_PHY_CTRL_RS_HIGH_WAIT_CNT GENMASK(11, 8) +#define DLL_PHY_CTRL_RS_IDLE_CNT GENMASK(7, 0) + +/* TODO: - Identify better way to handle PHY address */ +#define PHY_OFFSET 0x10000 + +/* Register controlling DQ related timing. */ +#define PHY_DQ_TIMING PHY_OFFSET + 0x2000 +/* Register controlling DSQ related timing. */ +#define PHY_DQS_TIMING PHY_OFFSET + 0x2004 +#define PHY_DQS_TIMING_DQS_SEL_OE_END GENMASK(3, 0) +#define PHY_DQS_TIMING_PHONY_DQS_SEL BIT(16) +#define PHY_DQS_TIMING_USE_PHONY_DQS BIT(20) + +/* Register controlling the gate and loopback control related timing. */ +#define PHY_GATE_LPBK_CTRL PHY_OFFSET + 0x2008 +#define PHY_GATE_LPBK_CTRL_RDS GENMASK(24, 19) + +/* Register holds the control for the master DLL logic. */ +#define PHY_DLL_MASTER_CTRL PHY_OFFSET + 0x200C +#define PHY_DLL_MASTER_CTRL_BYPASS_MODE BIT(23) + +/* Register holds the control for the slave DLL logic. */ +#define PHY_DLL_SLAVE_CTRL PHY_OFFSET + 0x2010 + +/* This register handles the global control settings for the PHY. */ +#define PHY_CTRL PHY_OFFSET + 0x2080 +#define PHY_CTRL_SDR_DQS BIT(14) +#define PHY_CTRL_PHONY_DQS GENMASK(9, 4) + +/* + * This register handles the global control settings + * for the termination selects for reads. + */ +#define PHY_TSEL PHY_OFFSET + 0x2084 + +/* Generic command layout. */ +#define GCMD_LAY_CS GENMASK_ULL(11, 8) +/* + * This bit informs the minicotroller if it has to wait for tWB + * after sending the last CMD/ADDR/DATA in the sequence. + */ +#define GCMD_LAY_TWB BIT_ULL(6) +/* Type of generic instruction. */ +#define GCMD_LAY_INSTR GENMASK_ULL(5, 0) + +/* Generic CMD sequence type. */ +#define GCMD_LAY_INSTR_CMD 0 +/* Generic ADDR sequence type. */ +#define GCMD_LAY_INSTR_ADDR 1 +/* Generic data transfer sequence type. */ +#define GCMD_LAY_INSTR_DATA 2 + +/* Input part of generic command type of input is command. */ +#define GCMD_LAY_INPUT_CMD GENMASK_ULL(23, 16) + +/* Generic command address sequence - address fields. */ +#define GCMD_LAY_INPUT_ADDR GENMASK_ULL(63, 16) +/* Generic command address sequence - address size. */ +#define GCMD_LAY_INPUT_ADDR_SIZE GENMASK_ULL(13, 11) + +/* Transfer direction field of generic command data sequence. */ +#define GCMD_DIR BIT_ULL(11) +/* Read transfer direction of generic command data sequence. */ +#define GCMD_DIR_READ 0 +/* Write transfer direction of generic command data sequence. */ +#define GCMD_DIR_WRITE 1 + +/* ECC enabled flag of generic command data sequence - ECC enabled. */ +#define GCMD_ECC_EN BIT_ULL(12) +/* Generic command data sequence - sector size. */ +#define GCMD_SECT_SIZE GENMASK_ULL(31, 16) +/* Generic command data sequence - sector count. */ +#define GCMD_SECT_CNT GENMASK_ULL(39, 32) +/* Generic command data sequence - last sector size. */ +#define GCMD_LAST_SIZE GENMASK_ULL(55, 40) + +/* CDMA descriptor fields. */ +/* Erase command type of CDMA descriptor. */ +#define CDMA_CT_ERASE 0x1000 +/* Program page command type of CDMA descriptor. */ +#define CDMA_CT_WR 0x2100 +/* Read page command type of CDMA descriptor. */ +#define CDMA_CT_RD 0x2200 + +/* Flash pointer memory shift. */ +#define CDMA_CFPTR_MEM_SHIFT 24 +/* Flash pointer memory mask. */ +#define CDMA_CFPTR_MEM GENMASK(26, 24) + +/* + * Command DMA descriptor flags. If set causes issue interrupt after + * the completion of descriptor processing. + */ +#define CDMA_CF_INT BIT(8) +/* + * Command DMA descriptor flags - the next descriptor + * address field is valid and descriptor processing should continue. + */ +#define CDMA_CF_CONT BIT(9) +/* DMA master flag of command DMA descriptor. */ +#define CDMA_CF_DMA_MASTER BIT(10) + +/* Operation complete status of command descriptor. */ +#define CDMA_CS_COMP BIT(15) +/* Operation complete status of command descriptor. */ +/* Command descriptor status - operation fail. */ +#define CDMA_CS_FAIL BIT(14) +/* Command descriptor status - page erased. */ +#define CDMA_CS_ERP BIT(11) +/* Command descriptor status - timeout occurred. */ +#define CDMA_CS_TOUT BIT(10) +/* + * Maximum amount of correction applied to one ECC sector. + * It is part of command descriptor status. + */ +#define CDMA_CS_MAXERR GENMASK(9, 2) +/* Command descriptor status - uncorrectable ECC error. */ +#define CDMA_CS_UNCE BIT(1) +/* Command descriptor status - descriptor error. */ +#define CDMA_CS_ERR BIT(0) + +/* Status of operation - OK. */ +#define STAT_OK 0 +/* Status of operation - FAIL. */ +#define STAT_FAIL 2 +/* Status of operation - uncorrectable ECC error. */ +#define STAT_ECC_UNCORR 3 +/* Status of operation - page erased. */ +#define STAT_ERASED 5 +/* Status of operation - correctable ECC error. */ +#define STAT_ECC_CORR 6 +/* Status of operation - unsuspected state. */ +#define STAT_UNKNOWN 7 +/* Status of operation - operation is not completed yet. */ +#define STAT_BUSY 0xFF + +#define BCH_MAX_NUM_CORR_CAPS 8 +#define BCH_MAX_NUM_SECTOR_SIZES 2 + +#define ONE_CYCLE 1 +#define TIMEOUT_US 1000000 + +struct cadence_nand_timings { + u32 async_toggle_timings; + u32 timings0; + u32 timings1; + u32 timings2; + u32 dll_phy_ctrl; + u32 phy_ctrl; + u32 phy_dqs_timing; + u32 phy_gate_lpbk_ctrl; +}; + +/* Command DMA descriptor. */ +struct cadence_nand_cdma_desc { + /* Next descriptor address. */ + u64 next_pointer; + + /* Flash address is a 32-bit address comprising of BANK and ROW ADDR. */ + u32 flash_pointer; + /*field appears in HPNFC version 13*/ + u16 bank; + u16 rsvd0; + + /* Operation the controller needs to perform. */ + u16 command_type; + u16 rsvd1; + /* Flags for operation of this command. */ + u16 command_flags; + u16 rsvd2; + + /* System/host memory address required for data DMA commands. */ + u64 memory_pointer; + + /* Status of operation. */ + u32 status; + u32 rsvd3; + + /* Address pointer to sync buffer location. */ + u64 sync_flag_pointer; + + /* Controls the buffer sync mechanism. */ + u32 sync_arguments; + u32 rsvd4; + + /* Control data pointer. */ + u64 ctrl_data_ptr; +}; + +/* Interrupt status. */ +struct cadence_nand_irq_status { + /* Thread operation complete status. */ + u32 trd_status; + /* Thread operation error. */ + u32 trd_error; + /* Controller status. */ + u32 status; +}; + +/* Cadence NAND flash controller capabilities get from driver data. */ +struct cadence_nand_dt_devdata { + /* Skew value of the output signals of the NAND Flash interface. */ + u32 if_skew; + /* It informs if slave DMA interface is connected to DMA engine. */ + unsigned int has_dma:1; +}; + +/* Cadence NAND flash controller capabilities read from registers. */ +struct cdns_nand_caps { + /* Maximum number of banks supported by hardware. */ + u8 max_banks; + /* Slave and Master DMA data width in bytes (4 or 8). */ + u8 data_dma_width; + /* Control Data feature supported. */ + bool data_control_supp; + /* Is PHY type DLL. */ + bool is_phy_type_dll; +}; + +struct cadence_nand_info { + struct nand_hw_control controller; + struct udevice *dev; + struct reset_ctl softphy_reset; + struct reset_ctl nand_reset; + struct cadence_nand_cdma_desc *cdma_desc; + /* IP capability. */ + const struct cadence_nand_dt_devdata *caps1; + struct cdns_nand_caps caps2; + u8 ctrl_rev; + dma_addr_t dma_cdma_desc; + /* command interface buffers */ + u8 *buf; + u32 buf_size; + u8 *stat; + + u8 curr_corr_str_idx; + + /* Register interface. */ + void __iomem *reg; + + struct { + void __iomem *virt; + dma_addr_t dma; + } io; + + int irq; + /* Interrupts that have happened. */ + struct cadence_nand_irq_status irq_status; + /* Interrupts we are waiting for. */ + struct cadence_nand_irq_status irq_mask; + + int ecc_strengths[BCH_MAX_NUM_CORR_CAPS]; + struct nand_ecc_step_info ecc_stepinfos[BCH_MAX_NUM_SECTOR_SIZES]; + struct nand_ecc_caps ecc_caps; + + int curr_trans_type; + + struct clk clk; + u32 nf_clk_rate; + /* + * Estimated Board delay. The value includes the total + * round trip delay for the signals and is used for deciding on values + * associated with data read capture. + */ + u32 board_delay; + + struct nand_chip *selected_chip; + + unsigned long assigned_cs; + struct list_head chips; + u8 bch_metadata_size; +}; + +struct cdns_nand_chip { + struct cadence_nand_timings timings; + struct nand_chip chip; + u8 nsels; + struct list_head node; + + /* + * part of oob area of NAND flash memory page. + * This part is available for user to read or write. + */ + u32 avail_oob_size; + + /* Sector size. There are few sectors per mtd->writesize */ + u32 sector_size; + u32 sector_count; + + /* Offset of BBM. */ + u8 bbm_offs; + /* Number of bytes reserved for BBM. */ + u8 bbm_len; + /* ECC strength index. */ + u8 corr_str_idx; + + u8 cs[]; +}; + +struct ecc_info { + int (*calc_ecc_bytes)(int step_size, int strength); + int max_step_size; +}; + +#endif /*_CADENCE_NAND_H_*/ diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 2d85b392465..3bb0a3679f9 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -981,6 +981,7 @@ struct nand_chip { struct nand_bbt_descr *bbt_md; struct nand_bbt_descr *badblock_pattern; + int cur_cs; void *priv; -- cgit v1.3.1 From ac682c4da990c9235c0e890241491fcd52aa731b Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Thu, 27 Feb 2025 00:18:18 +0800 Subject: drivers: mtd: nand: cadence: Add support for read status command Add support for read status command in Cadence NAND driver. This status bit is important to check whether the flash is write-protected. Signed-off-by: Dinesh Maniyam --- drivers/mtd/nand/raw/cadence_nand.c | 48 ++++++++++++++++++++++++++++++++++++- include/cadence-nand.h | 2 ++ 2 files changed, 49 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/drivers/mtd/nand/raw/cadence_nand.c b/drivers/mtd/nand/raw/cadence_nand.c index 359cfc3b68c..6baf06def48 100644 --- a/drivers/mtd/nand/raw/cadence_nand.c +++ b/drivers/mtd/nand/raw/cadence_nand.c @@ -344,6 +344,7 @@ static int cadence_nand_generic_cmd_send(struct cadence_nand_info *cadence, /* Issue command. */ writel_relaxed(reg, cadence->reg + CMD_REG0); + cadence->buf_index = 0; return 0; } @@ -1932,9 +1933,43 @@ static void cadence_nand_select_chip(struct mtd_info *mtd, int chipnr) } } +static int cadence_nand_status(struct mtd_info *mtd, unsigned int command) +{ + struct nand_chip *chip = mtd_to_nand(mtd); + int ret = 0; + + ret = cadence_nand_cmd_opcode(chip, command); + if (ret) + return ret; + + ret = cadence_nand_cmd_data(chip, 1, GCMD_DIR_READ); + if (ret) + return ret; + + return 0; +} + static void cadence_nand_cmdfunc(struct mtd_info *mtd, unsigned int command, int offset_in_page, int page) { + struct nand_chip *chip = mtd_to_nand(mtd); + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + int ret = 0; + + cadence->cmd = command; + switch (command) { + case NAND_CMD_STATUS: + ret = cadence_nand_status(mtd, command); + break; + /* + * ecc will override other command for read, write and erase + */ + default: + break; + } + + if (ret != 0) + printf("ERROR:%s:command:0x%x\n", __func__, cadence->cmd); } static int cadence_nand_dev_ready(struct mtd_info *mtd) @@ -1952,7 +1987,18 @@ static int cadence_nand_dev_ready(struct mtd_info *mtd) static u8 cadence_nand_read_byte(struct mtd_info *mtd) { - return 0; + struct nand_chip *chip = mtd_to_nand(mtd); + struct cadence_nand_info *cadence = to_cadence_nand_info(chip->controller); + u32 size = 1; + u8 val; + + if (cadence->buf_index == 0) + cadence_nand_read_buf(mtd, &cadence->buf[0], size); + + val = *(&cadence->buf[0] + cadence->buf_index); + cadence->buf_index++; + + return val; } static void cadence_nand_write_byte(struct mtd_info *mtd, u8 byte) diff --git a/include/cadence-nand.h b/include/cadence-nand.h index 7973e5b55bf..27ed217b1ed 100644 --- a/include/cadence-nand.h +++ b/include/cadence-nand.h @@ -454,6 +454,8 @@ struct cadence_nand_info { u8 *buf; u32 buf_size; u8 *stat; + u8 cmd; + u32 buf_index; u8 curr_corr_str_idx; -- cgit v1.3.1 From 597fe4098dabdd05c44ec1d68e990a61798cad38 Mon Sep 17 00:00:00 2001 From: Dinesh Maniyam Date: Thu, 27 Feb 2025 00:18:28 +0800 Subject: drivers: mtd: nand: base: Add support for Hardware ECC for check bad block Leverage linux code to support hardware ECC interface to verify nand bad block. Signed-off-by: Dinesh Maniyam --- drivers/mtd/nand/raw/nand_base.c | 69 ++++++++++++++++++++++++++-------------- include/linux/mtd/rawnand.h | 11 +++++++ 2 files changed, 56 insertions(+), 24 deletions(-) (limited to 'include') diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 1b65c6f6443..bb5460e0068 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -306,6 +306,35 @@ void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) ioread16_rep(chip->IO_ADDR_R, p, len >> 1); } +/* + * nand_bbm_get_next_page - Get the next page for bad block markers + * @chip: The NAND chip + * @page: First page to start checking for bad block marker usage + * + * Returns an integer that corresponds to the page offset within a block, for + * a page that is used to store bad block markers. If no more pages are + * available, -EINVAL is returned. + */ +int nand_bbm_get_next_page(struct nand_chip *chip, int page) +{ + struct mtd_info *mtd = nand_to_mtd(chip); + int last_page = ((mtd->erasesize - mtd->writesize) >> + chip->page_shift) & chip->pagemask; + unsigned int bbm_flags = NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE + | NAND_BBM_LASTPAGE; + + if (page == 0 && !(chip->options & bbm_flags)) + return 0; + if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE) + return 0; + if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE) + return 1; + if (page <= last_page && chip->options & NAND_BBM_LASTPAGE) + return last_page; + + return -EINVAL; +} + /** * nand_block_bad - [DEFAULT] Read bad block marker from the chip * @mtd: MTD device structure @@ -315,40 +344,32 @@ void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) */ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs) { - int page, res = 0, i = 0; struct nand_chip *chip = mtd_to_nand(mtd); - u16 bad; + int first_page, page_offset; + int res; + u8 bad; - if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) - ofs += mtd->erasesize - mtd->writesize; + first_page = (int)(ofs >> chip->page_shift) & chip->pagemask; + page_offset = nand_bbm_get_next_page(chip, 0); - page = (int)(ofs >> chip->page_shift) & chip->pagemask; + while (page_offset >= 0) { + res = chip->ecc.read_oob(mtd, chip, first_page + page_offset); + if (res < 0) + return res; - do { - if (chip->options & NAND_BUSWIDTH_16) { - chip->cmdfunc(mtd, NAND_CMD_READOOB, - chip->badblockpos & 0xFE, page); - bad = cpu_to_le16(chip->read_word(mtd)); - if (chip->badblockpos & 0x1) - bad >>= 8; - else - bad &= 0xFF; - } else { - chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, - page); - bad = chip->read_byte(mtd); - } + bad = chip->oob_poi[chip->badblockpos]; if (likely(chip->badblockbits == 8)) res = bad != 0xFF; else res = hweight8(bad) < chip->badblockbits; - ofs += mtd->writesize; - page = (int)(ofs >> chip->page_shift) & chip->pagemask; - i++; - } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE)); + if (res) + return res; - return res; + page_offset = nand_bbm_get_next_page(chip, page_offset + 1); + } + + return 0; } /** diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 3bb0a3679f9..3e80b134063 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -131,6 +131,17 @@ void nand_wait_ready(struct mtd_info *mtd); #define NAND_DATA_IFACE_CHECK_ONLY -1 +/* + * There are different places where the manufacturer stores the factory bad + * block markers. + * + * Position within the block: Each of these pages needs to be checked for a + * bad block marking pattern. + */ +#define NAND_BBM_FIRSTPAGE BIT(24) +#define NAND_BBM_SECONDPAGE BIT(25) +#define NAND_BBM_LASTPAGE BIT(26) + /* * Constants for ECC_MODES */ -- cgit v1.3.1 From b27c94958b976213e3f21e53943a699ffa53f16e Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Mon, 3 Mar 2025 13:15:15 -0600 Subject: board: beagle: Add support for BeagleY-AI Basic board support for BeagleY-AI. Information on this board can be found at https://beagleboard.org/beagley-ai Signed-off-by: Robert Nelson Signed-off-by: Nishanth Menon Signed-off-by: Andrew Davis --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi | 270 +++ arch/arm/dts/k3-am67a-beagley-ddr-lp4.dtsi | 2801 ++++++++++++++++++++++++++ arch/arm/dts/k3-am67a-r5-beagley-ai.dts | 84 + arch/arm/mach-k3/j722s/Kconfig | 18 + board/beagle/beagley-ai/Kconfig | 26 + board/beagle/beagley-ai/MAINTAINERS | 8 + board/beagle/beagley-ai/Makefile | 7 + board/beagle/beagley-ai/beagley-ai.c | 62 + board/beagle/beagley-ai/beagley-ai.env | 21 + board/beagle/beagley-ai/board-cfg.yaml | 36 + board/beagle/beagley-ai/pm-cfg.yaml | 12 + board/beagle/beagley-ai/rm-cfg.yaml | 1137 +++++++++++ board/beagle/beagley-ai/sec-cfg.yaml | 379 ++++ board/beagle/beagley-ai/tifs-rm-cfg.yaml | 993 +++++++++ configs/am67a_beagley_ai_a53_defconfig | 37 + configs/am67a_beagley_ai_r5_defconfig | 14 + include/configs/beagley_ai.h | 14 + 18 files changed, 5921 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am67a-beagley-ddr-lp4.dtsi create mode 100644 arch/arm/dts/k3-am67a-r5-beagley-ai.dts create mode 100644 board/beagle/beagley-ai/Kconfig create mode 100644 board/beagle/beagley-ai/MAINTAINERS create mode 100644 board/beagle/beagley-ai/Makefile create mode 100644 board/beagle/beagley-ai/beagley-ai.c create mode 100644 board/beagle/beagley-ai/beagley-ai.env create mode 100644 board/beagle/beagley-ai/board-cfg.yaml create mode 100644 board/beagle/beagley-ai/pm-cfg.yaml create mode 100644 board/beagle/beagley-ai/rm-cfg.yaml create mode 100644 board/beagle/beagley-ai/sec-cfg.yaml create mode 100644 board/beagle/beagley-ai/tifs-rm-cfg.yaml create mode 100644 configs/am67a_beagley_ai_a53_defconfig create mode 100644 configs/am67a_beagley_ai_r5_defconfig create mode 100644 include/configs/beagley_ai.h (limited to 'include') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 73231824526..2ef8f838af7 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1112,7 +1112,8 @@ dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-r5-base-board.dtb\ dtb-$(CONFIG_SOC_K3_J784S4) += k3-am69-r5-sk.dtb \ k3-j784s4-r5-evm.dtb -dtb-$(CONFIG_SOC_K3_J722S) += k3-j722s-r5-evm.dtb +dtb-$(CONFIG_SOC_K3_J722S) += k3-j722s-r5-evm.dtb \ + k3-am67a-r5-beagley-ai.dtb dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-r5-evm.dtb \ k3-am642-r5-sk.dtb \ diff --git a/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi b/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi new file mode 100644 index 00000000000..6c52038cdca --- /dev/null +++ b/arch/arm/dts/k3-am67a-beagley-ai-u-boot.dtsi @@ -0,0 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Common AM67A BeagleY-AI dts file for SPLs + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2024 Robert Nelson, BeagleBoard.org Foundation + */ + +#include "k3-binman.dtsi" + +/ { + chosen { + stdout-path = "serial2:115200n8"; + tick-timer = &main_timer0; + }; +}; + +&main_pktdma { + reg = <0x00 0x485c0000 0x00 0x100>, + <0x00 0x4a800000 0x00 0x20000>, + <0x00 0x4aa00000 0x00 0x40000>, + <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x485e0000 0x00 0x20000>, + <0x00 0x484a0000 0x00 0x4000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x4000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", + "cfg", "tchan", "rchan", "rflow"; +}; + +&dmsc { + bootph-pre-ram; + k3_sysreset: sysreset-controller { + compatible = "ti,sci-sysreset"; + bootph-pre-ram; + }; +}; + +&usbss0 { + bootph-pre-ram; +}; + +&usb0 { + dr_mode = "peripheral"; + bootph-pre-ram; +}; + +&usbss1 { + status = "disabled"; +}; + +&usb1 { + status = "disabled"; +}; + +#if IS_ENABLED(CONFIG_TARGET_J722S_R5_BEAGLEY_AI) + +&binman { + tiboot3-j722s-hs-evm.bin { + filename = "tiboot3-j722s-hs-evm.bin"; + ti-secure-rom { + content = <&u_boot_spl>, <&ti_fs_enc>, <&combined_tifs_cfg>, + <&combined_dm_cfg>, <&sysfw_inner_cert>; + combined; + dm-data; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl>; + content-sysfw = <&ti_fs_enc>; + content-sysfw-data = <&combined_tifs_cfg>; + content-sysfw-inner-cert = <&sysfw_inner_cert>; + content-dm-data = <&combined_dm_cfg>; + load = <0x43c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x67000>; + load-dm-data = <0x43c7a800>; + }; + + u_boot_spl: u-boot-spl { + no-expanded; + }; + + ti_fs_enc: ti-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j722s-hs-enc.bin"; + type = "blob-ext"; + optional; + }; + + combined_tifs_cfg: combined-tifs-cfg.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + + sysfw_inner_cert: sysfw-inner-cert { + filename = "ti-sysfw/ti-fs-firmware-j722s-hs-cert.bin"; + type = "blob-ext"; + optional; + }; + + combined_dm_cfg: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; + +&binman { + tiboot3-j722s-hs-fs-evm.bin { + filename = "tiboot3-j722s-hs-fs-evm.bin"; + symlink = "tiboot3.bin"; + + ti-secure-rom { + content = <&u_boot_spl_fs>, <&ti_fs_enc_fs>, <&combined_tifs_cfg_fs>, + <&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>; + combined; + dm-data; + sysfw-inner-cert; + keyfile = "custMpk.pem"; + sw-rev = <1>; + content-sbl = <&u_boot_spl_fs>; + content-sysfw = <&ti_fs_enc_fs>; + content-sysfw-data = <&combined_tifs_cfg_fs>; + content-sysfw-inner-cert = <&sysfw_inner_cert_fs>; + content-dm-data = <&combined_dm_cfg_fs>; + load = <0x43c00000>; + load-sysfw = <0x40000>; + load-sysfw-data = <0x67000>; + load-dm-data = <0x43c7a800>; + }; + + u_boot_spl_fs: u-boot-spl { + no-expanded; + }; + + ti_fs_enc_fs: ti-fs-enc.bin { + filename = "ti-sysfw/ti-fs-firmware-j722s-hs-fs-enc.bin"; + type = "blob-ext"; + optional; + }; + + combined_tifs_cfg_fs: combined-tifs-cfg.bin { + filename = "combined-tifs-cfg.bin"; + type = "blob-ext"; + }; + + sysfw_inner_cert_fs: sysfw-inner-cert { + filename = "ti-sysfw/ti-fs-firmware-j722s-hs-fs-cert.bin"; + type = "blob-ext"; + optional; + }; + + combined_dm_cfg_fs: combined-dm-cfg.bin { + filename = "combined-dm-cfg.bin"; + type = "blob-ext"; + }; + }; +}; +#endif /* CONFIG_TARGET_J722S_R5_BEAGLEY_AI */ + +#if IS_ENABLED(CONFIG_TARGET_J722S_A53_BEAGLEY_AI) + +#define SPL_BEAGLEY_AI_DTB "spl/dts/ti/k3-am67a-beagley-ai.dtb" +#define BEAGLEY_AI_DTB "u-boot.dtb" + +&binman { + ti-dm { + filename = "ti-dm.bin"; + + blob-ext { + filename = "ti-dm/j722s/ipc_echo_testb_mcu1_0_release_strip.xer5f"; + optional; + }; + }; + + ti-spl { + insert-template = <&ti_spl_template>; + + fit { + images { + dm { + ti-secure { + content = <&dm>; + keyfile = "custMpk.pem"; + }; + + dm: ti-dm { + filename = "ti-dm.bin"; + }; + }; + + fdt-0 { + description = "k3-am67a-beagley-ai"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + + ti-secure { + content = <&spl_beagley_ai_dtb>; + keyfile = "custMpk.pem"; + }; + + spl_beagley_ai_dtb: blob-ext { + filename = "spl/dts/ti/k3-am67a-beagley-ai.dtb"; + }; + + }; + + }; + + configurations { + default = "conf-0"; + + conf-0 { + description = "k3-am67a-beagley-ai"; + firmware = "atf"; + loadables = "tee", "dm", "spl"; + fdt = "fdt-0"; + }; + }; + }; + }; +}; + +&binman { + u-boot { + insert-template = <&u_boot_template>; + + fit { + images { + uboot { + description = "U-Boot for BeagleY-AI"; + }; + + fdt-0 { + description = "k3-am67a-beagley-ai"; + type = "flat_dt"; + arch = "arm"; + compression = "none"; + + ti-secure { + content = <&beagley_ai_dtb>; + keyfile = "custMpk.pem"; + }; + + beagley_ai_dtb: blob-ext { + filename = "u-boot.dtb"; + }; + + hash { + algo = "crc32"; + }; + }; + }; + + configurations { + default = "conf-0"; + + conf-0 { + description = "k3-k3-am67a-beagley-ai"; + firmware = "uboot"; + loadables = "uboot"; + fdt = "fdt-0"; + }; + + }; + }; + }; +}; +#endif /* CONFIG_TARGET_J722S_A53_BEAGLEY_AI */ diff --git a/arch/arm/dts/k3-am67a-beagley-ddr-lp4.dtsi b/arch/arm/dts/k3-am67a-beagley-ddr-lp4.dtsi new file mode 100644 index 00000000000..6949a3a0f07 --- /dev/null +++ b/arch/arm/dts/k3-am67a-beagley-ddr-lp4.dtsi @@ -0,0 +1,2801 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * DDR Configuration file + * DDR: Kingston_B3221PM3BDGUI-U + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2024 Robert Nelson, BeagleBoard.org Foundation + * + * This file was generated with the Jacinto7_DDRSS_RegConfigTool, Revision: J722S - v0.0.1 + * This file was generated on Tue Mar 12 2024 14:14:02 GMT+0800 +*/ + + +#define DDRSS_PLL_FHS_CNT 3 +#define DDRSS_PLL_FREQUENCY_0 25000000 +#define DDRSS_PLL_FREQUENCY_1 933000000 +#define DDRSS_PLL_FREQUENCY_2 933000000 + +#define DDRSS_CTL_0_DATA 0x00000B00 +#define DDRSS_CTL_1_DATA 0x00000000 +#define DDRSS_CTL_2_DATA 0x00000000 +#define DDRSS_CTL_3_DATA 0x00000000 +#define DDRSS_CTL_4_DATA 0x00000000 +#define DDRSS_CTL_5_DATA 0x00000000 +#define DDRSS_CTL_6_DATA 0x00000000 +#define DDRSS_CTL_7_DATA 0x00002710 +#define DDRSS_CTL_8_DATA 0x000186A0 +#define DDRSS_CTL_9_DATA 0x00000005 +#define DDRSS_CTL_10_DATA 0x00000064 +#define DDRSS_CTL_11_DATA 0x0005B18F +#define DDRSS_CTL_12_DATA 0x0038EF90 +#define DDRSS_CTL_13_DATA 0x00000005 +#define DDRSS_CTL_14_DATA 0x00000E94 +#define DDRSS_CTL_15_DATA 0x0005B18F +#define DDRSS_CTL_16_DATA 0x0038EF90 +#define DDRSS_CTL_17_DATA 0x00000005 +#define DDRSS_CTL_18_DATA 0x00000E94 +#define DDRSS_CTL_19_DATA 0x01010100 +#define DDRSS_CTL_20_DATA 0x01010100 +#define DDRSS_CTL_21_DATA 0x01000110 +#define DDRSS_CTL_22_DATA 0x02010002 +#define DDRSS_CTL_23_DATA 0x0000000A +#define DDRSS_CTL_24_DATA 0x000186A0 +#define DDRSS_CTL_25_DATA 0x00000000 +#define DDRSS_CTL_26_DATA 0x00000000 +#define DDRSS_CTL_27_DATA 0x00000000 +#define DDRSS_CTL_28_DATA 0x00000000 +#define DDRSS_CTL_29_DATA 0x00020200 +#define DDRSS_CTL_30_DATA 0x00000000 +#define DDRSS_CTL_31_DATA 0x00000000 +#define DDRSS_CTL_32_DATA 0x00000000 +#define DDRSS_CTL_33_DATA 0x00000000 +#define DDRSS_CTL_34_DATA 0x08000010 +#define DDRSS_CTL_35_DATA 0x00004B4B +#define DDRSS_CTL_36_DATA 0x00000000 +#define DDRSS_CTL_37_DATA 0x00000000 +#define DDRSS_CTL_38_DATA 0x00000000 +#define DDRSS_CTL_39_DATA 0x00000000 +#define DDRSS_CTL_40_DATA 0x0000040C +#define DDRSS_CTL_41_DATA 0x00000000 +#define DDRSS_CTL_42_DATA 0x00001040 +#define DDRSS_CTL_43_DATA 0x00000000 +#define DDRSS_CTL_44_DATA 0x00001040 +#define DDRSS_CTL_45_DATA 0x00000000 +#define DDRSS_CTL_46_DATA 0x05000804 +#define DDRSS_CTL_47_DATA 0x00000800 +#define DDRSS_CTL_48_DATA 0x09090004 +#define DDRSS_CTL_49_DATA 0x00000204 +#define DDRSS_CTL_50_DATA 0x007A0012 +#define DDRSS_CTL_51_DATA 0x09140054 +#define DDRSS_CTL_52_DATA 0x00003A26 +#define DDRSS_CTL_53_DATA 0x007A0012 +#define DDRSS_CTL_54_DATA 0x09140054 +#define DDRSS_CTL_55_DATA 0x09003A26 +#define DDRSS_CTL_56_DATA 0x000A0A09 +#define DDRSS_CTL_57_DATA 0x0400036D +#define DDRSS_CTL_58_DATA 0x090F2005 +#define DDRSS_CTL_59_DATA 0x00001B13 +#define DDRSS_CTL_60_DATA 0x0E007FE6 +#define DDRSS_CTL_61_DATA 0x090F200F +#define DDRSS_CTL_62_DATA 0x00001B13 +#define DDRSS_CTL_63_DATA 0x0E007FE6 +#define DDRSS_CTL_64_DATA 0x0304200F +#define DDRSS_CTL_65_DATA 0x04050002 +#define DDRSS_CTL_66_DATA 0x24262426 +#define DDRSS_CTL_67_DATA 0x01010008 +#define DDRSS_CTL_68_DATA 0x044A4A08 +#define DDRSS_CTL_69_DATA 0x042B2B04 +#define DDRSS_CTL_70_DATA 0x00002B2B +#define DDRSS_CTL_71_DATA 0x00000101 +#define DDRSS_CTL_72_DATA 0x00000000 +#define DDRSS_CTL_73_DATA 0x01000000 +#define DDRSS_CTL_74_DATA 0x00130803 +#define DDRSS_CTL_75_DATA 0x00000059 +#define DDRSS_CTL_76_DATA 0x000002C5 +#define DDRSS_CTL_77_DATA 0x00000E2E +#define DDRSS_CTL_78_DATA 0x000002C5 +#define DDRSS_CTL_79_DATA 0x00000E2E +#define DDRSS_CTL_80_DATA 0x00000005 +#define DDRSS_CTL_81_DATA 0x0000000A +#define DDRSS_CTL_82_DATA 0x00000010 +#define DDRSS_CTL_83_DATA 0x00000163 +#define DDRSS_CTL_84_DATA 0x00000386 +#define DDRSS_CTL_85_DATA 0x00000163 +#define DDRSS_CTL_86_DATA 0x00000386 +#define DDRSS_CTL_87_DATA 0x03004000 +#define DDRSS_CTL_88_DATA 0x00001201 +#define DDRSS_CTL_89_DATA 0x000E0005 +#define DDRSS_CTL_90_DATA 0x2908000E +#define DDRSS_CTL_91_DATA 0x0A050529 +#define DDRSS_CTL_92_DATA 0x1B0E0A03 +#define DDRSS_CTL_93_DATA 0x1B0E0A04 +#define DDRSS_CTL_94_DATA 0x04010104 +#define DDRSS_CTL_95_DATA 0x00010401 +#define DDRSS_CTL_96_DATA 0x00140014 +#define DDRSS_CTL_97_DATA 0x02D302D3 +#define DDRSS_CTL_98_DATA 0x02D302D3 +#define DDRSS_CTL_99_DATA 0x00000000 +#define DDRSS_CTL_100_DATA 0x03030000 +#define DDRSS_CTL_101_DATA 0x05050501 +#define DDRSS_CTL_102_DATA 0x04041C04 +#define DDRSS_CTL_103_DATA 0x0E0A0E0A +#define DDRSS_CTL_104_DATA 0x0A04041C +#define DDRSS_CTL_105_DATA 0x030E0A0E +#define DDRSS_CTL_106_DATA 0x00000404 +#define DDRSS_CTL_107_DATA 0x00000301 +#define DDRSS_CTL_108_DATA 0x00000001 +#define DDRSS_CTL_109_DATA 0x00000000 +#define DDRSS_CTL_110_DATA 0x40020100 +#define DDRSS_CTL_111_DATA 0x00038010 +#define DDRSS_CTL_112_DATA 0x00050004 +#define DDRSS_CTL_113_DATA 0x00000004 +#define DDRSS_CTL_114_DATA 0x00040003 +#define DDRSS_CTL_115_DATA 0x00040005 +#define DDRSS_CTL_116_DATA 0x00030000 +#define DDRSS_CTL_117_DATA 0x00050004 +#define DDRSS_CTL_118_DATA 0x00000004 +#define DDRSS_CTL_119_DATA 0x00001640 +#define DDRSS_CTL_120_DATA 0x00001640 +#define DDRSS_CTL_121_DATA 0x00001640 +#define DDRSS_CTL_122_DATA 0x00001640 +#define DDRSS_CTL_123_DATA 0x00001640 +#define DDRSS_CTL_124_DATA 0x00000000 +#define DDRSS_CTL_125_DATA 0x0000026F +#define DDRSS_CTL_126_DATA 0x00038B80 +#define DDRSS_CTL_127_DATA 0x00038B80 +#define DDRSS_CTL_128_DATA 0x00038B80 +#define DDRSS_CTL_129_DATA 0x00038B80 +#define DDRSS_CTL_130_DATA 0x00038B80 +#define DDRSS_CTL_131_DATA 0x00000000 +#define DDRSS_CTL_132_DATA 0x00006342 +#define DDRSS_CTL_133_DATA 0x00038B80 +#define DDRSS_CTL_134_DATA 0x00038B80 +#define DDRSS_CTL_135_DATA 0x00038B80 +#define DDRSS_CTL_136_DATA 0x00038B80 +#define DDRSS_CTL_137_DATA 0x00038B80 +#define DDRSS_CTL_138_DATA 0x00000000 +#define DDRSS_CTL_139_DATA 0x00006342 +#define DDRSS_CTL_140_DATA 0x00000000 +#define DDRSS_CTL_141_DATA 0x00000000 +#define DDRSS_CTL_142_DATA 0x00000000 +#define DDRSS_CTL_143_DATA 0x00000000 +#define DDRSS_CTL_144_DATA 0x00000000 +#define DDRSS_CTL_145_DATA 0x00000000 +#define DDRSS_CTL_146_DATA 0x00000000 +#define DDRSS_CTL_147_DATA 0x00000000 +#define DDRSS_CTL_148_DATA 0x00000000 +#define DDRSS_CTL_149_DATA 0x00000000 +#define DDRSS_CTL_150_DATA 0x00000000 +#define DDRSS_CTL_151_DATA 0x00000000 +#define DDRSS_CTL_152_DATA 0x00000000 +#define DDRSS_CTL_153_DATA 0x00000000 +#define DDRSS_CTL_154_DATA 0x00000000 +#define DDRSS_CTL_155_DATA 0x00000000 +#define DDRSS_CTL_156_DATA 0x00000000 +#define DDRSS_CTL_157_DATA 0x00000000 +#define DDRSS_CTL_158_DATA 0x03050000 +#define DDRSS_CTL_159_DATA 0x040A040A +#define DDRSS_CTL_160_DATA 0x00000000 +#define DDRSS_CTL_161_DATA 0x07010A09 +#define DDRSS_CTL_162_DATA 0x000E0A09 +#define DDRSS_CTL_163_DATA 0x010A0900 +#define DDRSS_CTL_164_DATA 0x0E0A0907 +#define DDRSS_CTL_165_DATA 0x0A090000 +#define DDRSS_CTL_166_DATA 0x0A090701 +#define DDRSS_CTL_167_DATA 0x0000000E +#define DDRSS_CTL_168_DATA 0x00040003 +#define DDRSS_CTL_169_DATA 0x00000007 +#define DDRSS_CTL_170_DATA 0x00000000 +#define DDRSS_CTL_171_DATA 0x00000000 +#define DDRSS_CTL_172_DATA 0x00000000 +#define DDRSS_CTL_173_DATA 0x00000000 +#define DDRSS_CTL_174_DATA 0x00000000 +#define DDRSS_CTL_175_DATA 0x00000000 +#define DDRSS_CTL_176_DATA 0x01000000 +#define DDRSS_CTL_177_DATA 0x00000000 +#define DDRSS_CTL_178_DATA 0x00001700 +#define DDRSS_CTL_179_DATA 0x0000100E +#define DDRSS_CTL_180_DATA 0x00000002 +#define DDRSS_CTL_181_DATA 0x00000000 +#define DDRSS_CTL_182_DATA 0x00000001 +#define DDRSS_CTL_183_DATA 0x00000002 +#define DDRSS_CTL_184_DATA 0x00000C00 +#define DDRSS_CTL_185_DATA 0x00008000 +#define DDRSS_CTL_186_DATA 0x00000C00 +#define DDRSS_CTL_187_DATA 0x00008000 +#define DDRSS_CTL_188_DATA 0x00000C00 +#define DDRSS_CTL_189_DATA 0x00008000 +#define DDRSS_CTL_190_DATA 0x00000000 +#define DDRSS_CTL_191_DATA 0x00000000 +#define DDRSS_CTL_192_DATA 0x00000000 +#define DDRSS_CTL_193_DATA 0x00000000 +#define DDRSS_CTL_194_DATA 0x00000000 +#define DDRSS_CTL_195_DATA 0x0005000A +#define DDRSS_CTL_196_DATA 0x0404000D +#define DDRSS_CTL_197_DATA 0x0000000D +#define DDRSS_CTL_198_DATA 0x00BB0176 +#define DDRSS_CTL_199_DATA 0x0E0E01D3 +#define DDRSS_CTL_200_DATA 0x000001D3 +#define DDRSS_CTL_201_DATA 0x00BB0176 +#define DDRSS_CTL_202_DATA 0x0E0E01D3 +#define DDRSS_CTL_203_DATA 0x000001D3 +#define DDRSS_CTL_204_DATA 0x00000000 +#define DDRSS_CTL_205_DATA 0x00000000 +#define DDRSS_CTL_206_DATA 0x00000000 +#define DDRSS_CTL_207_DATA 0x00000000 +#define DDRSS_CTL_208_DATA 0x00000084 +#define DDRSS_CTL_209_DATA 0x00000000 +#define DDRSS_CTL_210_DATA 0x00000000 +#define DDRSS_CTL_211_DATA 0x000000E4 +#define DDRSS_CTL_212_DATA 0x00000036 +#define DDRSS_CTL_213_DATA 0x00000000 +#define DDRSS_CTL_214_DATA 0x000000E4 +#define DDRSS_CTL_215_DATA 0x00000036 +#define DDRSS_CTL_216_DATA 0x00000000 +#define DDRSS_CTL_217_DATA 0x00000084 +#define DDRSS_CTL_218_DATA 0x00000000 +#define DDRSS_CTL_219_DATA 0x00000000 +#define DDRSS_CTL_220_DATA 0x000000E4 +#define DDRSS_CTL_221_DATA 0x00000036 +#define DDRSS_CTL_222_DATA 0x00000000 +#define DDRSS_CTL_223_DATA 0x000000E4 +#define DDRSS_CTL_224_DATA 0x00000036 +#define DDRSS_CTL_225_DATA 0x00000000 +#define DDRSS_CTL_226_DATA 0x00000000 +#define DDRSS_CTL_227_DATA 0x00000033 +#define DDRSS_CTL_228_DATA 0x00000033 +#define DDRSS_CTL_229_DATA 0x00000033 +#define DDRSS_CTL_230_DATA 0x00000033 +#define DDRSS_CTL_231_DATA 0x00000033 +#define DDRSS_CTL_232_DATA 0x00000033 +#define DDRSS_CTL_233_DATA 0x00000000 +#define DDRSS_CTL_234_DATA 0x00000000 +#define DDRSS_CTL_235_DATA 0x00000000 +#define DDRSS_CTL_236_DATA 0x00000000 +#define DDRSS_CTL_237_DATA 0x00000000 +#define DDRSS_CTL_238_DATA 0x00000000 +#define DDRSS_CTL_239_DATA 0x00000000 +#define DDRSS_CTL_240_DATA 0x00000000 +#define DDRSS_CTL_241_DATA 0x00000000 +#define DDRSS_CTL_242_DATA 0x00000000 +#define DDRSS_CTL_243_DATA 0x00000000 +#define DDRSS_CTL_244_DATA 0x00000000 +#define DDRSS_CTL_245_DATA 0x00000000 +#define DDRSS_CTL_246_DATA 0x00000000 +#define DDRSS_CTL_247_DATA 0x00000000 +#define DDRSS_CTL_248_DATA 0x00000000 +#define DDRSS_CTL_249_DATA 0x00000000 +#define DDRSS_CTL_250_DATA 0x00000000 +#define DDRSS_CTL_251_DATA 0x00000000 +#define DDRSS_CTL_252_DATA 0x00000000 +#define DDRSS_CTL_253_DATA 0x00000000 +#define DDRSS_CTL_254_DATA 0x00000000 +#define DDRSS_CTL_255_DATA 0x00000000 +#define DDRSS_CTL_256_DATA 0x35000000 +#define DDRSS_CTL_257_DATA 0x35353535 +#define DDRSS_CTL_258_DATA 0x00002735 +#define DDRSS_CTL_259_DATA 0x00000027 +#define DDRSS_CTL_260_DATA 0x00000027 +#define DDRSS_CTL_261_DATA 0x00000027 +#define DDRSS_CTL_262_DATA 0x00000027 +#define DDRSS_CTL_263_DATA 0x00000027 +#define DDRSS_CTL_264_DATA 0x00000000 +#define DDRSS_CTL_265_DATA 0x00000000 +#define DDRSS_CTL_266_DATA 0x0000000F +#define DDRSS_CTL_267_DATA 0x0000000F +#define DDRSS_CTL_268_DATA 0x0000000F +#define DDRSS_CTL_269_DATA 0x0000000F +#define DDRSS_CTL_270_DATA 0x0000000F +#define DDRSS_CTL_271_DATA 0x0000000F +#define DDRSS_CTL_272_DATA 0x00000000 +#define DDRSS_CTL_273_DATA 0x00001600 +#define DDRSS_CTL_274_DATA 0x00000016 +#define DDRSS_CTL_275_DATA 0x00000016 +#define DDRSS_CTL_276_DATA 0x00000016 +#define DDRSS_CTL_277_DATA 0x00000016 +#define DDRSS_CTL_278_DATA 0x00000016 +#define DDRSS_CTL_279_DATA 0x00000020 +#define DDRSS_CTL_280_DATA 0x00010000 +#define DDRSS_CTL_281_DATA 0x00000100 +#define DDRSS_CTL_282_DATA 0x00000000 +#define DDRSS_CTL_283_DATA 0x00000000 +#define DDRSS_CTL_284_DATA 0x00000101 +#define DDRSS_CTL_285_DATA 0x00000000 +#define DDRSS_CTL_286_DATA 0x00000000 +#define DDRSS_CTL_287_DATA 0x00000000 +#define DDRSS_CTL_288_DATA 0x00000000 +#define DDRSS_CTL_289_DATA 0x00000000 +#define DDRSS_CTL_290_DATA 0x00000000 +#define DDRSS_CTL_291_DATA 0x00000000 +#define DDRSS_CTL_292_DATA 0x00000000 +#define DDRSS_CTL_293_DATA 0x00000000 +#define DDRSS_CTL_294_DATA 0x00000000 +#define DDRSS_CTL_295_DATA 0x00000000 +#define DDRSS_CTL_296_DATA 0x0C181511 +#define DDRSS_CTL_297_DATA 0x00000304 +#define DDRSS_CTL_298_DATA 0x00000000 +#define DDRSS_CTL_299_DATA 0x00000000 +#define DDRSS_CTL_300_DATA 0x00000000 +#define DDRSS_CTL_301_DATA 0x00000000 +#define DDRSS_CTL_302_DATA 0x00000000 +#define DDRSS_CTL_303_DATA 0x00000000 +#define DDRSS_CTL_304_DATA 0x00000000 +#define DDRSS_CTL_305_DATA 0x00000000 +#define DDRSS_CTL_306_DATA 0x00000000 +#define DDRSS_CTL_307_DATA 0x00000000 +#define DDRSS_CTL_308_DATA 0x00000000 +#define DDRSS_CTL_309_DATA 0x00000000 +#define DDRSS_CTL_310_DATA 0x00000000 +#define DDRSS_CTL_311_DATA 0x00020000 +#define DDRSS_CTL_312_DATA 0x00400100 +#define DDRSS_CTL_313_DATA 0x00080032 +#define DDRSS_CTL_314_DATA 0x01000200 +#define DDRSS_CTL_315_DATA 0x074A0040 +#define DDRSS_CTL_316_DATA 0x00020038 +#define DDRSS_CTL_317_DATA 0x00400100 +#define DDRSS_CTL_318_DATA 0x0038074A +#define DDRSS_CTL_319_DATA 0x00030000 +#define DDRSS_CTL_320_DATA 0x005E005E +#define DDRSS_CTL_321_DATA 0x00000100 +#define DDRSS_CTL_322_DATA 0x01010000 +#define DDRSS_CTL_323_DATA 0x00000000 +#define DDRSS_CTL_324_DATA 0x3FFF0000 +#define DDRSS_CTL_325_DATA 0x000FFF00 +#define DDRSS_CTL_326_DATA 0xFFFFFFFF +#define DDRSS_CTL_327_DATA 0x00FFFF00 +#define DDRSS_CTL_328_DATA 0x0B000000 +#define DDRSS_CTL_329_DATA 0x0001FFFF +#define DDRSS_CTL_330_DATA 0x01010101 +#define DDRSS_CTL_331_DATA 0x01010101 +#define DDRSS_CTL_332_DATA 0x00000118 +#define DDRSS_CTL_333_DATA 0x00000C01 +#define DDRSS_CTL_334_DATA 0x00040100 +#define DDRSS_CTL_335_DATA 0x00040100 +#define DDRSS_CTL_336_DATA 0x00000000 +#define DDRSS_CTL_337_DATA 0x00000000 +#define DDRSS_CTL_338_DATA 0x01030303 +#define DDRSS_CTL_339_DATA 0x00000000 +#define DDRSS_CTL_340_DATA 0x00000000 +#define DDRSS_CTL_341_DATA 0x00000000 +#define DDRSS_CTL_342_DATA 0x00000000 +#define DDRSS_CTL_343_DATA 0x00000000 +#define DDRSS_CTL_344_DATA 0x00000000 +#define DDRSS_CTL_345_DATA 0x00000000 +#define DDRSS_CTL_346_DATA 0x00000000 +#define DDRSS_CTL_347_DATA 0x00000000 +#define DDRSS_CTL_348_DATA 0x00000000 +#define DDRSS_CTL_349_DATA 0x00000000 +#define DDRSS_CTL_350_DATA 0x00000000 +#define DDRSS_CTL_351_DATA 0x00000000 +#define DDRSS_CTL_352_DATA 0x00000000 +#define DDRSS_CTL_353_DATA 0x00000000 +#define DDRSS_CTL_354_DATA 0x00000000 +#define DDRSS_CTL_355_DATA 0x00000000 +#define DDRSS_CTL_356_DATA 0x00000000 +#define DDRSS_CTL_357_DATA 0x00000000 +#define DDRSS_CTL_358_DATA 0x00000000 +#define DDRSS_CTL_359_DATA 0x00000000 +#define DDRSS_CTL_360_DATA 0x00000000 +#define DDRSS_CTL_361_DATA 0x00000000 +#define DDRSS_CTL_362_DATA 0x00000000 +#define DDRSS_CTL_363_DATA 0x00000000 +#define DDRSS_CTL_364_DATA 0x00000000 +#define DDRSS_CTL_365_DATA 0x00000000 +#define DDRSS_CTL_366_DATA 0x00000000 +#define DDRSS_CTL_367_DATA 0x00000000 +#define DDRSS_CTL_368_DATA 0x00000000 +#define DDRSS_CTL_369_DATA 0x00000000 +#define DDRSS_CTL_370_DATA 0x00000000 +#define DDRSS_CTL_371_DATA 0x00000000 +#define DDRSS_CTL_372_DATA 0x00000000 +#define DDRSS_CTL_373_DATA 0x00000000 +#define DDRSS_CTL_374_DATA 0x00000000 +#define DDRSS_CTL_375_DATA 0x00000000 +#define DDRSS_CTL_376_DATA 0x00000000 +#define DDRSS_CTL_377_DATA 0x00000000 +#define DDRSS_CTL_378_DATA 0x00000000 +#define DDRSS_CTL_379_DATA 0x00000000 +#define DDRSS_CTL_380_DATA 0x00000000 +#define DDRSS_CTL_381_DATA 0x00000000 +#define DDRSS_CTL_382_DATA 0x00000000 +#define DDRSS_CTL_383_DATA 0x01000101 +#define DDRSS_CTL_384_DATA 0x01010001 +#define DDRSS_CTL_385_DATA 0x00010101 +#define DDRSS_CTL_386_DATA 0x01090903 +#define DDRSS_CTL_387_DATA 0x05020201 +#define DDRSS_CTL_388_DATA 0x0E081B1B +#define DDRSS_CTL_389_DATA 0x0009040E +#define DDRSS_CTL_390_DATA 0x0B0D040F +#define DDRSS_CTL_391_DATA 0x0B0D0406 +#define DDRSS_CTL_392_DATA 0x0D0D0906 +#define DDRSS_CTL_393_DATA 0x01000000 +#define DDRSS_CTL_394_DATA 0x07030701 +#define DDRSS_CTL_395_DATA 0x04000103 +#define DDRSS_CTL_396_DATA 0x1B000004 +#define DDRSS_CTL_397_DATA 0x000000B2 +#define DDRSS_CTL_398_DATA 0x00000200 +#define DDRSS_CTL_399_DATA 0x00000200 +#define DDRSS_CTL_400_DATA 0x00000200 +#define DDRSS_CTL_401_DATA 0x00000200 +#define DDRSS_CTL_402_DATA 0x00000321 +#define DDRSS_CTL_403_DATA 0x000006F4 +#define DDRSS_CTL_404_DATA 0x03000202 +#define DDRSS_CTL_405_DATA 0x37200201 +#define DDRSS_CTL_406_DATA 0x00001C5C +#define DDRSS_CTL_407_DATA 0x00000200 +#define DDRSS_CTL_408_DATA 0x00000200 +#define DDRSS_CTL_409_DATA 0x00000200 +#define DDRSS_CTL_410_DATA 0x00000200 +#define DDRSS_CTL_411_DATA 0x00007F9E +#define DDRSS_CTL_412_DATA 0x00011B98 +#define DDRSS_CTL_413_DATA 0x111A0402 +#define DDRSS_CTL_414_DATA 0x37200C09 +#define DDRSS_CTL_415_DATA 0x00001C5C +#define DDRSS_CTL_416_DATA 0x00000200 +#define DDRSS_CTL_417_DATA 0x00000200 +#define DDRSS_CTL_418_DATA 0x00000200 +#define DDRSS_CTL_419_DATA 0x00000200 +#define DDRSS_CTL_420_DATA 0x00007F9E +#define DDRSS_CTL_421_DATA 0x00011B98 +#define DDRSS_CTL_422_DATA 0x111A0402 +#define DDRSS_CTL_423_DATA 0x00200C09 +#define DDRSS_CTL_424_DATA 0x00000000 +#define DDRSS_CTL_425_DATA 0x02000A00 +#define DDRSS_CTL_426_DATA 0x00050003 +#define DDRSS_CTL_427_DATA 0x00010101 +#define DDRSS_CTL_428_DATA 0x00010101 +#define DDRSS_CTL_429_DATA 0x00010001 +#define DDRSS_CTL_430_DATA 0x00000101 +#define DDRSS_CTL_431_DATA 0x02000201 +#define DDRSS_CTL_432_DATA 0x02010000 +#define DDRSS_CTL_433_DATA 0x06000200 +#define DDRSS_CTL_434_DATA 0x00002222 +#define DDRSS_PI_0_DATA 0x00000B00 +#define DDRSS_PI_1_DATA 0x00000000 +#define DDRSS_PI_2_DATA 0x00000000 +#define DDRSS_PI_3_DATA 0x01000000 +#define DDRSS_PI_4_DATA 0x00000001 +#define DDRSS_PI_5_DATA 0x00010064 +#define DDRSS_PI_6_DATA 0x00000000 +#define DDRSS_PI_7_DATA 0x00000000 +#define DDRSS_PI_8_DATA 0x00000000 +#define DDRSS_PI_9_DATA 0x00000000 +#define DDRSS_PI_10_DATA 0x00000000 +#define DDRSS_PI_11_DATA 0x00000002 +#define DDRSS_PI_12_DATA 0x00000005 +#define DDRSS_PI_13_DATA 0x00050001 +#define DDRSS_PI_14_DATA 0x08000000 +#define DDRSS_PI_15_DATA 0x00010300 +#define DDRSS_PI_16_DATA 0x00000005 +#define DDRSS_PI_17_DATA 0x00000000 +#define DDRSS_PI_18_DATA 0x00000000 +#define DDRSS_PI_19_DATA 0x00000000 +#define DDRSS_PI_20_DATA 0x00000000 +#define DDRSS_PI_21_DATA 0x00000000 +#define DDRSS_PI_22_DATA 0x00000000 +#define DDRSS_PI_23_DATA 0x00000000 +#define DDRSS_PI_24_DATA 0x00000000 +#define DDRSS_PI_25_DATA 0x00000000 +#define DDRSS_PI_26_DATA 0x01010000 +#define DDRSS_PI_27_DATA 0x0A000100 +#define DDRSS_PI_28_DATA 0x00000028 +#define DDRSS_PI_29_DATA 0x05000000 +#define DDRSS_PI_30_DATA 0x00320000 +#define DDRSS_PI_31_DATA 0x00000000 +#define DDRSS_PI_32_DATA 0x00000000 +#define DDRSS_PI_33_DATA 0x01010102 +#define DDRSS_PI_34_DATA 0x00000000 +#define DDRSS_PI_35_DATA 0x00000000 +#define DDRSS_PI_36_DATA 0x00000000 +#define DDRSS_PI_37_DATA 0x00000001 +#define DDRSS_PI_38_DATA 0x000000AA +#define DDRSS_PI_39_DATA 0x00000055 +#define DDRSS_PI_40_DATA 0x000000B5 +#define DDRSS_PI_41_DATA 0x0000004A +#define DDRSS_PI_42_DATA 0x00000056 +#define DDRSS_PI_43_DATA 0x000000A9 +#define DDRSS_PI_44_DATA 0x000000A9 +#define DDRSS_PI_45_DATA 0x000000B5 +#define DDRSS_PI_46_DATA 0x00000000 +#define DDRSS_PI_47_DATA 0x00000000 +#define DDRSS_PI_48_DATA 0x00050500 +#define DDRSS_PI_49_DATA 0x0000001A +#define DDRSS_PI_50_DATA 0x000007D0 +#define DDRSS_PI_51_DATA 0x00000300 +#define DDRSS_PI_52_DATA 0x00000000 +#define DDRSS_PI_53_DATA 0x00000000 +#define DDRSS_PI_54_DATA 0x01000000 +#define DDRSS_PI_55_DATA 0x00010101 +#define DDRSS_PI_56_DATA 0x01000000 +#define DDRSS_PI_57_DATA 0x03000000 +#define DDRSS_PI_58_DATA 0x00000000 +#define DDRSS_PI_59_DATA 0x00001705 +#define DDRSS_PI_60_DATA 0x00000000 +#define DDRSS_PI_61_DATA 0x00000000 +#define DDRSS_PI_62_DATA 0x00000000 +#define DDRSS_PI_63_DATA 0x0A0A140A +#define DDRSS_PI_64_DATA 0x10020101 +#define DDRSS_PI_65_DATA 0x01000210 +#define DDRSS_PI_66_DATA 0x05000404 +#define DDRSS_PI_67_DATA 0x00010001 +#define DDRSS_PI_68_DATA 0x0001000E +#define DDRSS_PI_69_DATA 0x01010500 +#define DDRSS_PI_70_DATA 0x00010000 +#define DDRSS_PI_71_DATA 0x00000034 +#define DDRSS_PI_72_DATA 0x00000000 +#define DDRSS_PI_73_DATA 0x00000000 +#define DDRSS_PI_74_DATA 0x0000FFFF +#define DDRSS_PI_75_DATA 0x00000000 +#define DDRSS_PI_76_DATA 0x00000000 +#define DDRSS_PI_77_DATA 0x00000000 +#define DDRSS_PI_78_DATA 0x00000000 +#define DDRSS_PI_79_DATA 0x01000000 +#define DDRSS_PI_80_DATA 0x00010001 +#define DDRSS_PI_81_DATA 0x02000008 +#define DDRSS_PI_82_DATA 0x01000200 +#define DDRSS_PI_83_DATA 0x00000100 +#define DDRSS_PI_84_DATA 0x02000100 +#define DDRSS_PI_85_DATA 0x02000200 +#define DDRSS_PI_86_DATA 0x00000000 +#define DDRSS_PI_87_DATA 0x00000000 +#define DDRSS_PI_88_DATA 0x00000000 +#define DDRSS_PI_89_DATA 0x00000000 +#define DDRSS_PI_90_DATA 0x00000000 +#define DDRSS_PI_91_DATA 0x00000000 +#define DDRSS_PI_92_DATA 0x00000000 +#define DDRSS_PI_93_DATA 0x00000000 +#define DDRSS_PI_94_DATA 0x00000000 +#define DDRSS_PI_95_DATA 0x00000000 +#define DDRSS_PI_96_DATA 0x00000000 +#define DDRSS_PI_97_DATA 0x00000000 +#define DDRSS_PI_98_DATA 0x00000000 +#define DDRSS_PI_99_DATA 0x01000400 +#define DDRSS_PI_100_DATA 0x0E0D0F12 +#define DDRSS_PI_101_DATA 0x08111413 +#define DDRSS_PI_102_DATA 0x01000009 +#define DDRSS_PI_103_DATA 0x00000302 +#define DDRSS_PI_104_DATA 0x00000008 +#define DDRSS_PI_105_DATA 0x08000000 +#define DDRSS_PI_106_DATA 0x00000100 +#define DDRSS_PI_107_DATA 0x00000000 +#define DDRSS_PI_108_DATA 0x0000AA00 +#define DDRSS_PI_109_DATA 0x00000000 +#define DDRSS_PI_110_DATA 0x00000000 +#define DDRSS_PI_111_DATA 0x00010000 +#define DDRSS_PI_112_DATA 0x00000000 +#define DDRSS_PI_113_DATA 0x00000000 +#define DDRSS_PI_114_DATA 0x00000000 +#define DDRSS_PI_115_DATA 0x00000000 +#define DDRSS_PI_116_DATA 0x00000000 +#define DDRSS_PI_117_DATA 0x00000000 +#define DDRSS_PI_118_DATA 0x00000000 +#define DDRSS_PI_119_DATA 0x00000000 +#define DDRSS_PI_120_DATA 0x00000000 +#define DDRSS_PI_121_DATA 0x00000000 +#define DDRSS_PI_122_DATA 0x00000000 +#define DDRSS_PI_123_DATA 0x00000000 +#define DDRSS_PI_124_DATA 0x00000000 +#define DDRSS_PI_125_DATA 0x00000000 +#define DDRSS_PI_126_DATA 0x00000000 +#define DDRSS_PI_127_DATA 0x00000000 +#define DDRSS_PI_128_DATA 0x00000000 +#define DDRSS_PI_129_DATA 0x00000000 +#define DDRSS_PI_130_DATA 0x00000000 +#define DDRSS_PI_131_DATA 0x00000000 +#define DDRSS_PI_132_DATA 0x00000000 +#define DDRSS_PI_133_DATA 0x00000000 +#define DDRSS_PI_134_DATA 0x00000000 +#define DDRSS_PI_135_DATA 0x00000000 +#define DDRSS_PI_136_DATA 0x00000008 +#define DDRSS_PI_137_DATA 0x00000000 +#define DDRSS_PI_138_DATA 0x00000000 +#define DDRSS_PI_139_DATA 0x00000000 +#define DDRSS_PI_140_DATA 0x00000000 +#define DDRSS_PI_141_DATA 0x00000000 +#define DDRSS_PI_142_DATA 0x00000000 +#define DDRSS_PI_143_DATA 0x00000000 +#define DDRSS_PI_144_DATA 0x00000000 +#define DDRSS_PI_145_DATA 0x00010000 +#define DDRSS_PI_146_DATA 0x00000000 +#define DDRSS_PI_147_DATA 0x00000000 +#define DDRSS_PI_148_DATA 0x0000000A +#define DDRSS_PI_149_DATA 0x000186A0 +#define DDRSS_PI_150_DATA 0x00000100 +#define DDRSS_PI_151_DATA 0x00000000 +#define DDRSS_PI_152_DATA 0x00000000 +#define DDRSS_PI_153_DATA 0x00000000 +#define DDRSS_PI_154_DATA 0x00000000 +#define DDRSS_PI_155_DATA 0x00000000 +#define DDRSS_PI_156_DATA 0x01000000 +#define DDRSS_PI_157_DATA 0x00010003 +#define DDRSS_PI_158_DATA 0x02000101 +#define DDRSS_PI_159_DATA 0x01030001 +#define DDRSS_PI_160_DATA 0x00010400 +#define DDRSS_PI_161_DATA 0x06000105 +#define DDRSS_PI_162_DATA 0x01070001 +#define DDRSS_PI_163_DATA 0x00000000 +#define DDRSS_PI_164_DATA 0x00000000 +#define DDRSS_PI_165_DATA 0x00000000 +#define DDRSS_PI_166_DATA 0x00010001 +#define DDRSS_PI_167_DATA 0x00000000 +#define DDRSS_PI_168_DATA 0x00000000 +#define DDRSS_PI_169_DATA 0x00000000 +#define DDRSS_PI_170_DATA 0x00000000 +#define DDRSS_PI_171_DATA 0x00010000 +#define DDRSS_PI_172_DATA 0x00000004 +#define DDRSS_PI_173_DATA 0x00000000 +#define DDRSS_PI_174_DATA 0x00010000 +#define DDRSS_PI_175_DATA 0x00000000 +#define DDRSS_PI_176_DATA 0x00080000 +#define DDRSS_PI_177_DATA 0x01180118 +#define DDRSS_PI_178_DATA 0x00262601 +#define DDRSS_PI_179_DATA 0x00000034 +#define DDRSS_PI_180_DATA 0x0000005E +#define DDRSS_PI_181_DATA 0x0002005E +#define DDRSS_PI_182_DATA 0x02000200 +#define DDRSS_PI_183_DATA 0x00000004 +#define DDRSS_PI_184_DATA 0x0000100C +#define DDRSS_PI_185_DATA 0x00104000 +#define DDRSS_PI_186_DATA 0x00400000 +#define DDRSS_PI_187_DATA 0x00000013 +#define DDRSS_PI_188_DATA 0x00000059 +#define DDRSS_PI_189_DATA 0x000002C5 +#define DDRSS_PI_190_DATA 0x00000E2E +#define DDRSS_PI_191_DATA 0x000002C5 +#define DDRSS_PI_192_DATA 0x04000E2E +#define DDRSS_PI_193_DATA 0x01010404 +#define DDRSS_PI_194_DATA 0x00001501 +#define DDRSS_PI_195_DATA 0x00270027 +#define DDRSS_PI_196_DATA 0x01000100 +#define DDRSS_PI_197_DATA 0x00000100 +#define DDRSS_PI_198_DATA 0x00000000 +#define DDRSS_PI_199_DATA 0x05090903 +#define DDRSS_PI_200_DATA 0x01011B1B +#define DDRSS_PI_201_DATA 0x01010101 +#define DDRSS_PI_202_DATA 0x000C0C0A +#define DDRSS_PI_203_DATA 0x00000000 +#define DDRSS_PI_204_DATA 0x00000000 +#define DDRSS_PI_205_DATA 0x04000000 +#define DDRSS_PI_206_DATA 0x0C021212 +#define DDRSS_PI_207_DATA 0x0404020C +#define DDRSS_PI_208_DATA 0x00090031 +#define DDRSS_PI_209_DATA 0x001B0043 +#define DDRSS_PI_210_DATA 0x001B0043 +#define DDRSS_PI_211_DATA 0x01010101 +#define DDRSS_PI_212_DATA 0x0003000D +#define DDRSS_PI_213_DATA 0x000301D3 +#define DDRSS_PI_214_DATA 0x010001D3 +#define DDRSS_PI_215_DATA 0x000E000E +#define DDRSS_PI_216_DATA 0x01D40100 +#define DDRSS_PI_217_DATA 0x010001D4 +#define DDRSS_PI_218_DATA 0x01D401D4 +#define DDRSS_PI_219_DATA 0x32103200 +#define DDRSS_PI_220_DATA 0x01013210 +#define DDRSS_PI_221_DATA 0x0A070601 +#define DDRSS_PI_222_DATA 0x1C11090D +#define DDRSS_PI_223_DATA 0x1C110913 +#define DDRSS_PI_224_DATA 0x000C0013 +#define DDRSS_PI_225_DATA 0x00001000 +#define DDRSS_PI_226_DATA 0x00000C00 +#define DDRSS_PI_227_DATA 0x00001000 +#define DDRSS_PI_228_DATA 0x00000C00 +#define DDRSS_PI_229_DATA 0x02001000 +#define DDRSS_PI_230_DATA 0x0021000D +#define DDRSS_PI_231_DATA 0x002101D3 +#define DDRSS_PI_232_DATA 0x000001D3 +#define DDRSS_PI_233_DATA 0x00001900 +#define DDRSS_PI_234_DATA 0x32000056 +#define DDRSS_PI_235_DATA 0x06000301 +#define DDRSS_PI_236_DATA 0x00300204 +#define DDRSS_PI_237_DATA 0x3212005A +#define DDRSS_PI_238_DATA 0x17000301 +#define DDRSS_PI_239_DATA 0x00300C12 +#define DDRSS_PI_240_DATA 0x3212005A +#define DDRSS_PI_241_DATA 0x17000301 +#define DDRSS_PI_242_DATA 0x00000C12 +#define DDRSS_PI_243_DATA 0x05040900 +#define DDRSS_PI_244_DATA 0x00040900 +#define DDRSS_PI_245_DATA 0x00000315 +#define DDRSS_PI_246_DATA 0x20010004 +#define DDRSS_PI_247_DATA 0x0A0A0A03 +#define DDRSS_PI_248_DATA 0x2B0F0000 +#define DDRSS_PI_249_DATA 0x24140026 +#define DDRSS_PI_250_DATA 0x0000731B +#define DDRSS_PI_251_DATA 0x20070054 +#define DDRSS_PI_252_DATA 0x1B131B1C +#define DDRSS_PI_253_DATA 0x2B0F0000 +#define DDRSS_PI_254_DATA 0x24140026 +#define DDRSS_PI_255_DATA 0x0000731B +#define DDRSS_PI_256_DATA 0x20070054 +#define DDRSS_PI_257_DATA 0x1B131B1C +#define DDRSS_PI_258_DATA 0x00000000 +#define DDRSS_PI_259_DATA 0x000000B2 +#define DDRSS_PI_260_DATA 0x000006F4 +#define DDRSS_PI_261_DATA 0x00001C5C +#define DDRSS_PI_262_DATA 0x00011B98 +#define DDRSS_PI_263_DATA 0x00001C5C +#define DDRSS_PI_264_DATA 0x00011B98 +#define DDRSS_PI_265_DATA 0x02D30014 +#define DDRSS_PI_266_DATA 0x030302D3 +#define DDRSS_PI_267_DATA 0x00000003 +#define DDRSS_PI_268_DATA 0x00000000 +#define DDRSS_PI_269_DATA 0x0A040503 +#define DDRSS_PI_270_DATA 0x00000A04 +#define DDRSS_PI_271_DATA 0x00002710 +#define DDRSS_PI_272_DATA 0x000186A0 +#define DDRSS_PI_273_DATA 0x00000005 +#define DDRSS_PI_274_DATA 0x00000064 +#define DDRSS_PI_275_DATA 0x00000014 +#define DDRSS_PI_276_DATA 0x0005B18F +#define DDRSS_PI_277_DATA 0x000186A0 +#define DDRSS_PI_278_DATA 0x00000005 +#define DDRSS_PI_279_DATA 0x00000E94 +#define DDRSS_PI_280_DATA 0x000002D3 +#define DDRSS_PI_281_DATA 0x0005B18F +#define DDRSS_PI_282_DATA 0x000186A0 +#define DDRSS_PI_283_DATA 0x00000005 +#define DDRSS_PI_284_DATA 0x00000E94 +#define DDRSS_PI_285_DATA 0x010002D3 +#define DDRSS_PI_286_DATA 0x00320040 +#define DDRSS_PI_287_DATA 0x00010008 +#define DDRSS_PI_288_DATA 0x074A0040 +#define DDRSS_PI_289_DATA 0x00010038 +#define DDRSS_PI_290_DATA 0x074A0040 +#define DDRSS_PI_291_DATA 0x00000338 +#define DDRSS_PI_292_DATA 0x0028005D +#define DDRSS_PI_293_DATA 0x03040404 +#define DDRSS_PI_294_DATA 0x00000303 +#define DDRSS_PI_295_DATA 0x01010000 +#define DDRSS_PI_296_DATA 0x04040202 +#define DDRSS_PI_297_DATA 0x67670808 +#define DDRSS_PI_298_DATA 0x67676767 +#define DDRSS_PI_299_DATA 0x67676767 +#define DDRSS_PI_300_DATA 0x67676767 +#define DDRSS_PI_301_DATA 0x00006767 +#define DDRSS_PI_302_DATA 0x00000000 +#define DDRSS_PI_303_DATA 0x00000000 +#define DDRSS_PI_304_DATA 0x00000000 +#define DDRSS_PI_305_DATA 0x00000000 +#define DDRSS_PI_306_DATA 0x55000000 +#define DDRSS_PI_307_DATA 0x00000000 +#define DDRSS_PI_308_DATA 0x3C00005A +#define DDRSS_PI_309_DATA 0x00005500 +#define DDRSS_PI_310_DATA 0x00005A00 +#define DDRSS_PI_311_DATA 0x0055003C +#define DDRSS_PI_312_DATA 0x00000000 +#define DDRSS_PI_313_DATA 0x3C00005A +#define DDRSS_PI_314_DATA 0x00005500 +#define DDRSS_PI_315_DATA 0x00005A00 +#define DDRSS_PI_316_DATA 0x1716153C +#define DDRSS_PI_317_DATA 0x13100A18 +#define DDRSS_PI_318_DATA 0x06050414 +#define DDRSS_PI_319_DATA 0x02010007 +#define DDRSS_PI_320_DATA 0x00000003 +#define DDRSS_PI_321_DATA 0x00000000 +#define DDRSS_PI_322_DATA 0x00000000 +#define DDRSS_PI_323_DATA 0x01000000 +#define DDRSS_PI_324_DATA 0x04020201 +#define DDRSS_PI_325_DATA 0x00080804 +#define DDRSS_PI_326_DATA 0x00000000 +#define DDRSS_PI_327_DATA 0x00000000 +#define DDRSS_PI_328_DATA 0x00000000 +#define DDRSS_PI_329_DATA 0x00000084 +#define DDRSS_PI_330_DATA 0x00000000 +#define DDRSS_PI_331_DATA 0x00000033 +#define DDRSS_PI_332_DATA 0x00000000 +#define DDRSS_PI_333_DATA 0x00000000 +#define DDRSS_PI_334_DATA 0x35000000 +#define DDRSS_PI_335_DATA 0x20160F27 +#define DDRSS_PI_336_DATA 0x00000000 +#define DDRSS_PI_337_DATA 0x000000E4 +#define DDRSS_PI_338_DATA 0x00000036 +#define DDRSS_PI_339_DATA 0x00000033 +#define DDRSS_PI_340_DATA 0x00000000 +#define DDRSS_PI_341_DATA 0x00000000 +#define DDRSS_PI_342_DATA 0x35000000 +#define DDRSS_PI_343_DATA 0x20160F27 +#define DDRSS_PI_344_DATA 0x00000000 +#define DDRSS_PI_345_DATA 0x000000E4 +#define DDRSS_PI_346_DATA 0x00000036 +#define DDRSS_PI_347_DATA 0x00000033 +#define DDRSS_PI_348_DATA 0x00000000 +#define DDRSS_PI_349_DATA 0x00000000 +#define DDRSS_PI_350_DATA 0x35000000 +#define DDRSS_PI_351_DATA 0x20160F27 +#define DDRSS_PI_352_DATA 0x00000000 +#define DDRSS_PI_353_DATA 0x00000084 +#define DDRSS_PI_354_DATA 0x00000000 +#define DDRSS_PI_355_DATA 0x00000033 +#define DDRSS_PI_356_DATA 0x00000000 +#define DDRSS_PI_357_DATA 0x00000000 +#define DDRSS_PI_358_DATA 0x35000000 +#define DDRSS_PI_359_DATA 0x20160F27 +#define DDRSS_PI_360_DATA 0x00000000 +#define DDRSS_PI_361_DATA 0x000000E4 +#define DDRSS_PI_362_DATA 0x00000036 +#define DDRSS_PI_363_DATA 0x00000033 +#define DDRSS_PI_364_DATA 0x00000000 +#define DDRSS_PI_365_DATA 0x00000000 +#define DDRSS_PI_366_DATA 0x35000000 +#define DDRSS_PI_367_DATA 0x20160F27 +#define DDRSS_PI_368_DATA 0x00000000 +#define DDRSS_PI_369_DATA 0x000000E4 +#define DDRSS_PI_370_DATA 0x00000036 +#define DDRSS_PI_371_DATA 0x00000033 +#define DDRSS_PI_372_DATA 0x00000000 +#define DDRSS_PI_373_DATA 0x00000000 +#define DDRSS_PI_374_DATA 0x35000000 +#define DDRSS_PI_375_DATA 0x20160F27 +#define DDRSS_PI_376_DATA 0x00000000 +#define DDRSS_PI_377_DATA 0x00000084 +#define DDRSS_PI_378_DATA 0x00000000 +#define DDRSS_PI_379_DATA 0x00000033 +#define DDRSS_PI_380_DATA 0x00000000 +#define DDRSS_PI_381_DATA 0x00000000 +#define DDRSS_PI_382_DATA 0x35000000 +#define DDRSS_PI_383_DATA 0x20160F27 +#define DDRSS_PI_384_DATA 0x00000000 +#define DDRSS_PI_385_DATA 0x000000E4 +#define DDRSS_PI_386_DATA 0x00000036 +#define DDRSS_PI_387_DATA 0x00000033 +#define DDRSS_PI_388_DATA 0x00000000 +#define DDRSS_PI_389_DATA 0x00000000 +#define DDRSS_PI_390_DATA 0x35000000 +#define DDRSS_PI_391_DATA 0x20160F27 +#define DDRSS_PI_392_DATA 0x00000000 +#define DDRSS_PI_393_DATA 0x000000E4 +#define DDRSS_PI_394_DATA 0x00000036 +#define DDRSS_PI_395_DATA 0x00000033 +#define DDRSS_PI_396_DATA 0x00000000 +#define DDRSS_PI_397_DATA 0x00000000 +#define DDRSS_PI_398_DATA 0x35000000 +#define DDRSS_PI_399_DATA 0x20160F27 +#define DDRSS_PI_400_DATA 0x00000000 +#define DDRSS_PI_401_DATA 0x00000084 +#define DDRSS_PI_402_DATA 0x00000000 +#define DDRSS_PI_403_DATA 0x00000033 +#define DDRSS_PI_404_DATA 0x00000000 +#define DDRSS_PI_405_DATA 0x00000000 +#define DDRSS_PI_406_DATA 0x35000000 +#define DDRSS_PI_407_DATA 0x20160F27 +#define DDRSS_PI_408_DATA 0x00000000 +#define DDRSS_PI_409_DATA 0x000000E4 +#define DDRSS_PI_410_DATA 0x00000036 +#define DDRSS_PI_411_DATA 0x00000033 +#define DDRSS_PI_412_DATA 0x00000000 +#define DDRSS_PI_413_DATA 0x00000000 +#define DDRSS_PI_414_DATA 0x35000000 +#define DDRSS_PI_415_DATA 0x20160F27 +#define DDRSS_PI_416_DATA 0x00000000 +#define DDRSS_PI_417_DATA 0x000000E4 +#define DDRSS_PI_418_DATA 0x00000036 +#define DDRSS_PI_419_DATA 0x00000033 +#define DDRSS_PI_420_DATA 0x00000000 +#define DDRSS_PI_421_DATA 0x00000000 +#define DDRSS_PI_422_DATA 0x35000000 +#define DDRSS_PI_423_DATA 0x20160F27 +#define DDRSS_PHY_0_DATA 0x04F00000 +#define DDRSS_PHY_1_DATA 0x00000000 +#define DDRSS_PHY_2_DATA 0x00030200 +#define DDRSS_PHY_3_DATA 0x00000000 +#define DDRSS_PHY_4_DATA 0x00000000 +#define DDRSS_PHY_5_DATA 0x01030000 +#define DDRSS_PHY_6_DATA 0x00010000 +#define DDRSS_PHY_7_DATA 0x01030004 +#define DDRSS_PHY_8_DATA 0x01000000 +#define DDRSS_PHY_9_DATA 0x00000000 +#define DDRSS_PHY_10_DATA 0x00000000 +#define DDRSS_PHY_11_DATA 0x00000000 +#define DDRSS_PHY_12_DATA 0x01010000 +#define DDRSS_PHY_13_DATA 0x00010000 +#define DDRSS_PHY_14_DATA 0x00C00001 +#define DDRSS_PHY_15_DATA 0x00CC0008 +#define DDRSS_PHY_16_DATA 0x00660601 +#define DDRSS_PHY_17_DATA 0x00000003 +#define DDRSS_PHY_18_DATA 0x00000000 +#define DDRSS_PHY_19_DATA 0x00000301 +#define DDRSS_PHY_20_DATA 0x0000AAAA +#define DDRSS_PHY_21_DATA 0x00005555 +#define DDRSS_PHY_22_DATA 0x0000B5B5 +#define DDRSS_PHY_23_DATA 0x00004A4A +#define DDRSS_PHY_24_DATA 0x00005656 +#define DDRSS_PHY_25_DATA 0x0000A9A9 +#define DDRSS_PHY_26_DATA 0x0000B7B7 +#define DDRSS_PHY_27_DATA 0x00004848 +#define DDRSS_PHY_28_DATA 0x00000000 +#define DDRSS_PHY_29_DATA 0x00000000 +#define DDRSS_PHY_30_DATA 0x08000000 +#define DDRSS_PHY_31_DATA 0x0F000008 +#define DDRSS_PHY_32_DATA 0x00000F0F +#define DDRSS_PHY_33_DATA 0x00E4E400 +#define DDRSS_PHY_34_DATA 0x00071040 +#define DDRSS_PHY_35_DATA 0x000C0020 +#define DDRSS_PHY_36_DATA 0x00062000 +#define DDRSS_PHY_37_DATA 0x00000000 +#define DDRSS_PHY_38_DATA 0x55555555 +#define DDRSS_PHY_39_DATA 0xAAAAAAAA +#define DDRSS_PHY_40_DATA 0x55555555 +#define DDRSS_PHY_41_DATA 0xAAAAAAAA +#define DDRSS_PHY_42_DATA 0x00005555 +#define DDRSS_PHY_43_DATA 0x01000100 +#define DDRSS_PHY_44_DATA 0x00800180 +#define DDRSS_PHY_45_DATA 0x00000001 +#define DDRSS_PHY_46_DATA 0x00000000 +#define DDRSS_PHY_47_DATA 0x00000000 +#define DDRSS_PHY_48_DATA 0x00000000 +#define DDRSS_PHY_49_DATA 0x00000000 +#define DDRSS_PHY_50_DATA 0x00000000 +#define DDRSS_PHY_51_DATA 0x00000000 +#define DDRSS_PHY_52_DATA 0x00000000 +#define DDRSS_PHY_53_DATA 0x00000000 +#define DDRSS_PHY_54_DATA 0x00000000 +#define DDRSS_PHY_55_DATA 0x00000000 +#define DDRSS_PHY_56_DATA 0x00000000 +#define DDRSS_PHY_57_DATA 0x00000000 +#define DDRSS_PHY_58_DATA 0x00000000 +#define DDRSS_PHY_59_DATA 0x00000000 +#define DDRSS_PHY_60_DATA 0x00000000 +#define DDRSS_PHY_61_DATA 0x00000000 +#define DDRSS_PHY_62_DATA 0x00000000 +#define DDRSS_PHY_63_DATA 0x00000000 +#define DDRSS_PHY_64_DATA 0x00000000 +#define DDRSS_PHY_65_DATA 0x00000000 +#define DDRSS_PHY_66_DATA 0x00000000 +#define DDRSS_PHY_67_DATA 0x00000004 +#define DDRSS_PHY_68_DATA 0x00000000 +#define DDRSS_PHY_69_DATA 0x00000000 +#define DDRSS_PHY_70_DATA 0x00000000 +#define DDRSS_PHY_71_DATA 0x00000000 +#define DDRSS_PHY_72_DATA 0x00000000 +#define DDRSS_PHY_73_DATA 0x00000000 +#define DDRSS_PHY_74_DATA 0x081F07FF +#define DDRSS_PHY_75_DATA 0x10200080 +#define DDRSS_PHY_76_DATA 0x00000008 +#define DDRSS_PHY_77_DATA 0x00000401 +#define DDRSS_PHY_78_DATA 0x00000000 +#define DDRSS_PHY_79_DATA 0x01CC0C01 +#define DDRSS_PHY_80_DATA 0x1003CC0C +#define DDRSS_PHY_81_DATA 0x20000140 +#define DDRSS_PHY_82_DATA 0x07FF0200 +#define DDRSS_PHY_83_DATA 0x0000DD01 +#define DDRSS_PHY_84_DATA 0x00100303 +#define DDRSS_PHY_85_DATA 0x00000000 +#define DDRSS_PHY_86_DATA 0x00000000 +#define DDRSS_PHY_87_DATA 0x00041000 +#define DDRSS_PHY_88_DATA 0x00100010 +#define DDRSS_PHY_89_DATA 0x00100010 +#define DDRSS_PHY_90_DATA 0x00100010 +#define DDRSS_PHY_91_DATA 0x00100010 +#define DDRSS_PHY_92_DATA 0x02000010 +#define DDRSS_PHY_93_DATA 0x00000005 +#define DDRSS_PHY_94_DATA 0x51516042 +#define DDRSS_PHY_95_DATA 0x31C06000 +#define DDRSS_PHY_96_DATA 0x07AB0340 +#define DDRSS_PHY_97_DATA 0x00C0C001 +#define DDRSS_PHY_98_DATA 0x0D000000 +#define DDRSS_PHY_99_DATA 0x000D0C0C +#define DDRSS_PHY_100_DATA 0x42100010 +#define DDRSS_PHY_101_DATA 0x010C073E +#define DDRSS_PHY_102_DATA 0x000F0C32 +#define DDRSS_PHY_103_DATA 0x01000140 +#define DDRSS_PHY_104_DATA 0x011E0120 +#define DDRSS_PHY_105_DATA 0x00000C00 +#define DDRSS_PHY_106_DATA 0x000002DD +#define DDRSS_PHY_107_DATA 0x00030200 +#define DDRSS_PHY_108_DATA 0x02800000 +#define DDRSS_PHY_109_DATA 0x80800000 +#define DDRSS_PHY_110_DATA 0x000D2010 +#define DDRSS_PHY_111_DATA 0x76543210 +#define DDRSS_PHY_112_DATA 0x00000008 +#define DDRSS_PHY_113_DATA 0x045D045D +#define DDRSS_PHY_114_DATA 0x045D045D +#define DDRSS_PHY_115_DATA 0x045D045D +#define DDRSS_PHY_116_DATA 0x045D045D +#define DDRSS_PHY_117_DATA 0x0000045D +#define DDRSS_PHY_118_DATA 0x0000A000 +#define DDRSS_PHY_119_DATA 0x00A000A0 +#define DDRSS_PHY_120_DATA 0x00A000A0 +#define DDRSS_PHY_121_DATA 0x00A000A0 +#define DDRSS_PHY_122_DATA 0x00A000A0 +#define DDRSS_PHY_123_DATA 0x00A000A0 +#define DDRSS_PHY_124_DATA 0x00A000A0 +#define DDRSS_PHY_125_DATA 0x00A000A0 +#define DDRSS_PHY_126_DATA 0x00A000A0 +#define DDRSS_PHY_127_DATA 0x00B200A0 +#define DDRSS_PHY_128_DATA 0x01000000 +#define DDRSS_PHY_129_DATA 0x00000000 +#define DDRSS_PHY_130_DATA 0x00000000 +#define DDRSS_PHY_131_DATA 0x00080200 +#define DDRSS_PHY_132_DATA 0x00000000 +#define DDRSS_PHY_133_DATA 0x20202020 +#define DDRSS_PHY_134_DATA 0x20202020 +#define DDRSS_PHY_135_DATA 0xF0F02020 +#define DDRSS_PHY_136_DATA 0x00000000 +#define DDRSS_PHY_137_DATA 0x00000000 +#define DDRSS_PHY_138_DATA 0x00000000 +#define DDRSS_PHY_139_DATA 0x00000000 +#define DDRSS_PHY_140_DATA 0x00000000 +#define DDRSS_PHY_141_DATA 0x00000000 +#define DDRSS_PHY_142_DATA 0x00000000 +#define DDRSS_PHY_143_DATA 0x00000000 +#define DDRSS_PHY_144_DATA 0x00000000 +#define DDRSS_PHY_145_DATA 0x00000000 +#define DDRSS_PHY_146_DATA 0x00000000 +#define DDRSS_PHY_147_DATA 0x00000000 +#define DDRSS_PHY_148_DATA 0x00000000 +#define DDRSS_PHY_149_DATA 0x00000000 +#define DDRSS_PHY_150_DATA 0x00000000 +#define DDRSS_PHY_151_DATA 0x00000000 +#define DDRSS_PHY_152_DATA 0x00000000 +#define DDRSS_PHY_153_DATA 0x00000000 +#define DDRSS_PHY_154_DATA 0x00000000 +#define DDRSS_PHY_155_DATA 0x00000000 +#define DDRSS_PHY_156_DATA 0x00000000 +#define DDRSS_PHY_157_DATA 0x00000000 +#define DDRSS_PHY_158_DATA 0x00000000 +#define DDRSS_PHY_159_DATA 0x00000000 +#define DDRSS_PHY_160_DATA 0x00000000 +#define DDRSS_PHY_161_DATA 0x00000000 +#define DDRSS_PHY_162_DATA 0x00000000 +#define DDRSS_PHY_163_DATA 0x00000000 +#define DDRSS_PHY_164_DATA 0x00000000 +#define DDRSS_PHY_165_DATA 0x00000000 +#define DDRSS_PHY_166_DATA 0x00000000 +#define DDRSS_PHY_167_DATA 0x00000000 +#define DDRSS_PHY_168_DATA 0x00000000 +#define DDRSS_PHY_169_DATA 0x00000000 +#define DDRSS_PHY_170_DATA 0x00000000 +#define DDRSS_PHY_171_DATA 0x00000000 +#define DDRSS_PHY_172_DATA 0x00000000 +#define DDRSS_PHY_173_DATA 0x00000000 +#define DDRSS_PHY_174_DATA 0x00000000 +#define DDRSS_PHY_175_DATA 0x00000000 +#define DDRSS_PHY_176_DATA 0x00000000 +#define DDRSS_PHY_177_DATA 0x00000000 +#define DDRSS_PHY_178_DATA 0x00000000 +#define DDRSS_PHY_179_DATA 0x00000000 +#define DDRSS_PHY_180_DATA 0x00000000 +#define DDRSS_PHY_181_DATA 0x00000000 +#define DDRSS_PHY_182_DATA 0x00000000 +#define DDRSS_PHY_183_DATA 0x00000000 +#define DDRSS_PHY_184_DATA 0x00000000 +#define DDRSS_PHY_185_DATA 0x00000000 +#define DDRSS_PHY_186_DATA 0x00000000 +#define DDRSS_PHY_187_DATA 0x00000000 +#define DDRSS_PHY_188_DATA 0x00000000 +#define DDRSS_PHY_189_DATA 0x00000000 +#define DDRSS_PHY_190_DATA 0x00000000 +#define DDRSS_PHY_191_DATA 0x00000000 +#define DDRSS_PHY_192_DATA 0x00000000 +#define DDRSS_PHY_193_DATA 0x00000000 +#define DDRSS_PHY_194_DATA 0x00000000 +#define DDRSS_PHY_195_DATA 0x00000000 +#define DDRSS_PHY_196_DATA 0x00000000 +#define DDRSS_PHY_197_DATA 0x00000000 +#define DDRSS_PHY_198_DATA 0x00000000 +#define DDRSS_PHY_199_DATA 0x00000000 +#define DDRSS_PHY_200_DATA 0x00000000 +#define DDRSS_PHY_201_DATA 0x00000000 +#define DDRSS_PHY_202_DATA 0x00000000 +#define DDRSS_PHY_203_DATA 0x00000000 +#define DDRSS_PHY_204_DATA 0x00000000 +#define DDRSS_PHY_205_DATA 0x00000000 +#define DDRSS_PHY_206_DATA 0x00000000 +#define DDRSS_PHY_207_DATA 0x00000000 +#define DDRSS_PHY_208_DATA 0x00000000 +#define DDRSS_PHY_209_DATA 0x00000000 +#define DDRSS_PHY_210_DATA 0x00000000 +#define DDRSS_PHY_211_DATA 0x00000000 +#define DDRSS_PHY_212_DATA 0x00000000 +#define DDRSS_PHY_213_DATA 0x00000000 +#define DDRSS_PHY_214_DATA 0x00000000 +#define DDRSS_PHY_215_DATA 0x00000000 +#define DDRSS_PHY_216_DATA 0x00000000 +#define DDRSS_PHY_217_DATA 0x00000000 +#define DDRSS_PHY_218_DATA 0x00000000 +#define DDRSS_PHY_219_DATA 0x00000000 +#define DDRSS_PHY_220_DATA 0x00000000 +#define DDRSS_PHY_221_DATA 0x00000000 +#define DDRSS_PHY_222_DATA 0x00000000 +#define DDRSS_PHY_223_DATA 0x00000000 +#define DDRSS_PHY_224_DATA 0x00000000 +#define DDRSS_PHY_225_DATA 0x00000000 +#define DDRSS_PHY_226_DATA 0x00000000 +#define DDRSS_PHY_227_DATA 0x00000000 +#define DDRSS_PHY_228_DATA 0x00000000 +#define DDRSS_PHY_229_DATA 0x00000000 +#define DDRSS_PHY_230_DATA 0x00000000 +#define DDRSS_PHY_231_DATA 0x00000000 +#define DDRSS_PHY_232_DATA 0x00000000 +#define DDRSS_PHY_233_DATA 0x00000000 +#define DDRSS_PHY_234_DATA 0x00000000 +#define DDRSS_PHY_235_DATA 0x00000000 +#define DDRSS_PHY_236_DATA 0x00000000 +#define DDRSS_PHY_237_DATA 0x00000000 +#define DDRSS_PHY_238_DATA 0x00000000 +#define DDRSS_PHY_239_DATA 0x00000000 +#define DDRSS_PHY_240_DATA 0x00000000 +#define DDRSS_PHY_241_DATA 0x00000000 +#define DDRSS_PHY_242_DATA 0x00000000 +#define DDRSS_PHY_243_DATA 0x00000000 +#define DDRSS_PHY_244_DATA 0x00000000 +#define DDRSS_PHY_245_DATA 0x00000000 +#define DDRSS_PHY_246_DATA 0x00000000 +#define DDRSS_PHY_247_DATA 0x00000000 +#define DDRSS_PHY_248_DATA 0x00000000 +#define DDRSS_PHY_249_DATA 0x00000000 +#define DDRSS_PHY_250_DATA 0x00000000 +#define DDRSS_PHY_251_DATA 0x00000000 +#define DDRSS_PHY_252_DATA 0x00000000 +#define DDRSS_PHY_253_DATA 0x00000000 +#define DDRSS_PHY_254_DATA 0x00000000 +#define DDRSS_PHY_255_DATA 0x00000000 +#define DDRSS_PHY_256_DATA 0x04F00000 +#define DDRSS_PHY_257_DATA 0x00000000 +#define DDRSS_PHY_258_DATA 0x00030200 +#define DDRSS_PHY_259_DATA 0x00000000 +#define DDRSS_PHY_260_DATA 0x00000000 +#define DDRSS_PHY_261_DATA 0x01030000 +#define DDRSS_PHY_262_DATA 0x00010000 +#define DDRSS_PHY_263_DATA 0x01030004 +#define DDRSS_PHY_264_DATA 0x01000000 +#define DDRSS_PHY_265_DATA 0x00000000 +#define DDRSS_PHY_266_DATA 0x00000000 +#define DDRSS_PHY_267_DATA 0x00000000 +#define DDRSS_PHY_268_DATA 0x01010000 +#define DDRSS_PHY_269_DATA 0x00010000 +#define DDRSS_PHY_270_DATA 0x00C00001 +#define DDRSS_PHY_271_DATA 0x00CC0008 +#define DDRSS_PHY_272_DATA 0x00660601 +#define DDRSS_PHY_273_DATA 0x00000003 +#define DDRSS_PHY_274_DATA 0x00000000 +#define DDRSS_PHY_275_DATA 0x00000301 +#define DDRSS_PHY_276_DATA 0x0000AAAA +#define DDRSS_PHY_277_DATA 0x00005555 +#define DDRSS_PHY_278_DATA 0x0000B5B5 +#define DDRSS_PHY_279_DATA 0x00004A4A +#define DDRSS_PHY_280_DATA 0x00005656 +#define DDRSS_PHY_281_DATA 0x0000A9A9 +#define DDRSS_PHY_282_DATA 0x0000B7B7 +#define DDRSS_PHY_283_DATA 0x00004848 +#define DDRSS_PHY_284_DATA 0x00000000 +#define DDRSS_PHY_285_DATA 0x00000000 +#define DDRSS_PHY_286_DATA 0x08000000 +#define DDRSS_PHY_287_DATA 0x0F000008 +#define DDRSS_PHY_288_DATA 0x00000F0F +#define DDRSS_PHY_289_DATA 0x00E4E400 +#define DDRSS_PHY_290_DATA 0x00071040 +#define DDRSS_PHY_291_DATA 0x000C0020 +#define DDRSS_PHY_292_DATA 0x00062000 +#define DDRSS_PHY_293_DATA 0x00000000 +#define DDRSS_PHY_294_DATA 0x55555555 +#define DDRSS_PHY_295_DATA 0xAAAAAAAA +#define DDRSS_PHY_296_DATA 0x55555555 +#define DDRSS_PHY_297_DATA 0xAAAAAAAA +#define DDRSS_PHY_298_DATA 0x00005555 +#define DDRSS_PHY_299_DATA 0x01000100 +#define DDRSS_PHY_300_DATA 0x00800180 +#define DDRSS_PHY_301_DATA 0x00000000 +#define DDRSS_PHY_302_DATA 0x00000000 +#define DDRSS_PHY_303_DATA 0x00000000 +#define DDRSS_PHY_304_DATA 0x00000000 +#define DDRSS_PHY_305_DATA 0x00000000 +#define DDRSS_PHY_306_DATA 0x00000000 +#define DDRSS_PHY_307_DATA 0x00000000 +#define DDRSS_PHY_308_DATA 0x00000000 +#define DDRSS_PHY_309_DATA 0x00000000 +#define DDRSS_PHY_310_DATA 0x00000000 +#define DDRSS_PHY_311_DATA 0x00000000 +#define DDRSS_PHY_312_DATA 0x00000000 +#define DDRSS_PHY_313_DATA 0x00000000 +#define DDRSS_PHY_314_DATA 0x00000000 +#define DDRSS_PHY_315_DATA 0x00000000 +#define DDRSS_PHY_316_DATA 0x00000000 +#define DDRSS_PHY_317_DATA 0x00000000 +#define DDRSS_PHY_318_DATA 0x00000000 +#define DDRSS_PHY_319_DATA 0x00000000 +#define DDRSS_PHY_320_DATA 0x00000000 +#define DDRSS_PHY_321_DATA 0x00000000 +#define DDRSS_PHY_322_DATA 0x00000000 +#define DDRSS_PHY_323_DATA 0x00000004 +#define DDRSS_PHY_324_DATA 0x00000000 +#define DDRSS_PHY_325_DATA 0x00000000 +#define DDRSS_PHY_326_DATA 0x00000000 +#define DDRSS_PHY_327_DATA 0x00000000 +#define DDRSS_PHY_328_DATA 0x00000000 +#define DDRSS_PHY_329_DATA 0x00000000 +#define DDRSS_PHY_330_DATA 0x081F07FF +#define DDRSS_PHY_331_DATA 0x10200080 +#define DDRSS_PHY_332_DATA 0x00000008 +#define DDRSS_PHY_333_DATA 0x00000401 +#define DDRSS_PHY_334_DATA 0x00000000 +#define DDRSS_PHY_335_DATA 0x01CC0C01 +#define DDRSS_PHY_336_DATA 0x1003CC0C +#define DDRSS_PHY_337_DATA 0x20000140 +#define DDRSS_PHY_338_DATA 0x07FF0200 +#define DDRSS_PHY_339_DATA 0x0000DD01 +#define DDRSS_PHY_340_DATA 0x00100303 +#define DDRSS_PHY_341_DATA 0x00000000 +#define DDRSS_PHY_342_DATA 0x00000000 +#define DDRSS_PHY_343_DATA 0x00041000 +#define DDRSS_PHY_344_DATA 0x00100010 +#define DDRSS_PHY_345_DATA 0x00100010 +#define DDRSS_PHY_346_DATA 0x00100010 +#define DDRSS_PHY_347_DATA 0x00100010 +#define DDRSS_PHY_348_DATA 0x02000010 +#define DDRSS_PHY_349_DATA 0x00000005 +#define DDRSS_PHY_350_DATA 0x51516042 +#define DDRSS_PHY_351_DATA 0x31C06000 +#define DDRSS_PHY_352_DATA 0x07AB0340 +#define DDRSS_PHY_353_DATA 0x00C0C001 +#define DDRSS_PHY_354_DATA 0x0D000000 +#define DDRSS_PHY_355_DATA 0x000D0C0C +#define DDRSS_PHY_356_DATA 0x42100010 +#define DDRSS_PHY_357_DATA 0x010C073E +#define DDRSS_PHY_358_DATA 0x000F0C32 +#define DDRSS_PHY_359_DATA 0x01000140 +#define DDRSS_PHY_360_DATA 0x011E0120 +#define DDRSS_PHY_361_DATA 0x00000C00 +#define DDRSS_PHY_362_DATA 0x000002DD +#define DDRSS_PHY_363_DATA 0x00030200 +#define DDRSS_PHY_364_DATA 0x02800000 +#define DDRSS_PHY_365_DATA 0x80800000 +#define DDRSS_PHY_366_DATA 0x000D2010 +#define DDRSS_PHY_367_DATA 0x76543210 +#define DDRSS_PHY_368_DATA 0x00000008 +#define DDRSS_PHY_369_DATA 0x045D045D +#define DDRSS_PHY_370_DATA 0x045D045D +#define DDRSS_PHY_371_DATA 0x045D045D +#define DDRSS_PHY_372_DATA 0x045D045D +#define DDRSS_PHY_373_DATA 0x0000045D +#define DDRSS_PHY_374_DATA 0x0000A000 +#define DDRSS_PHY_375_DATA 0x00A000A0 +#define DDRSS_PHY_376_DATA 0x00A000A0 +#define DDRSS_PHY_377_DATA 0x00A000A0 +#define DDRSS_PHY_378_DATA 0x00A000A0 +#define DDRSS_PHY_379_DATA 0x00A000A0 +#define DDRSS_PHY_380_DATA 0x00A000A0 +#define DDRSS_PHY_381_DATA 0x00A000A0 +#define DDRSS_PHY_382_DATA 0x00A000A0 +#define DDRSS_PHY_383_DATA 0x00B200A0 +#define DDRSS_PHY_384_DATA 0x01000000 +#define DDRSS_PHY_385_DATA 0x00000000 +#define DDRSS_PHY_386_DATA 0x00000000 +#define DDRSS_PHY_387_DATA 0x00080200 +#define DDRSS_PHY_388_DATA 0x00000000 +#define DDRSS_PHY_389_DATA 0x20202020 +#define DDRSS_PHY_390_DATA 0x20202020 +#define DDRSS_PHY_391_DATA 0xF0F02020 +#define DDRSS_PHY_392_DATA 0x00000000 +#define DDRSS_PHY_393_DATA 0x00000000 +#define DDRSS_PHY_394_DATA 0x00000000 +#define DDRSS_PHY_395_DATA 0x00000000 +#define DDRSS_PHY_396_DATA 0x00000000 +#define DDRSS_PHY_397_DATA 0x00000000 +#define DDRSS_PHY_398_DATA 0x00000000 +#define DDRSS_PHY_399_DATA 0x00000000 +#define DDRSS_PHY_400_DATA 0x00000000 +#define DDRSS_PHY_401_DATA 0x00000000 +#define DDRSS_PHY_402_DATA 0x00000000 +#define DDRSS_PHY_403_DATA 0x00000000 +#define DDRSS_PHY_404_DATA 0x00000000 +#define DDRSS_PHY_405_DATA 0x00000000 +#define DDRSS_PHY_406_DATA 0x00000000 +#define DDRSS_PHY_407_DATA 0x00000000 +#define DDRSS_PHY_408_DATA 0x00000000 +#define DDRSS_PHY_409_DATA 0x00000000 +#define DDRSS_PHY_410_DATA 0x00000000 +#define DDRSS_PHY_411_DATA 0x00000000 +#define DDRSS_PHY_412_DATA 0x00000000 +#define DDRSS_PHY_413_DATA 0x00000000 +#define DDRSS_PHY_414_DATA 0x00000000 +#define DDRSS_PHY_415_DATA 0x00000000 +#define DDRSS_PHY_416_DATA 0x00000000 +#define DDRSS_PHY_417_DATA 0x00000000 +#define DDRSS_PHY_418_DATA 0x00000000 +#define DDRSS_PHY_419_DATA 0x00000000 +#define DDRSS_PHY_420_DATA 0x00000000 +#define DDRSS_PHY_421_DATA 0x00000000 +#define DDRSS_PHY_422_DATA 0x00000000 +#define DDRSS_PHY_423_DATA 0x00000000 +#define DDRSS_PHY_424_DATA 0x00000000 +#define DDRSS_PHY_425_DATA 0x00000000 +#define DDRSS_PHY_426_DATA 0x00000000 +#define DDRSS_PHY_427_DATA 0x00000000 +#define DDRSS_PHY_428_DATA 0x00000000 +#define DDRSS_PHY_429_DATA 0x00000000 +#define DDRSS_PHY_430_DATA 0x00000000 +#define DDRSS_PHY_431_DATA 0x00000000 +#define DDRSS_PHY_432_DATA 0x00000000 +#define DDRSS_PHY_433_DATA 0x00000000 +#define DDRSS_PHY_434_DATA 0x00000000 +#define DDRSS_PHY_435_DATA 0x00000000 +#define DDRSS_PHY_436_DATA 0x00000000 +#define DDRSS_PHY_437_DATA 0x00000000 +#define DDRSS_PHY_438_DATA 0x00000000 +#define DDRSS_PHY_439_DATA 0x00000000 +#define DDRSS_PHY_440_DATA 0x00000000 +#define DDRSS_PHY_441_DATA 0x00000000 +#define DDRSS_PHY_442_DATA 0x00000000 +#define DDRSS_PHY_443_DATA 0x00000000 +#define DDRSS_PHY_444_DATA 0x00000000 +#define DDRSS_PHY_445_DATA 0x00000000 +#define DDRSS_PHY_446_DATA 0x00000000 +#define DDRSS_PHY_447_DATA 0x00000000 +#define DDRSS_PHY_448_DATA 0x00000000 +#define DDRSS_PHY_449_DATA 0x00000000 +#define DDRSS_PHY_450_DATA 0x00000000 +#define DDRSS_PHY_451_DATA 0x00000000 +#define DDRSS_PHY_452_DATA 0x00000000 +#define DDRSS_PHY_453_DATA 0x00000000 +#define DDRSS_PHY_454_DATA 0x00000000 +#define DDRSS_PHY_455_DATA 0x00000000 +#define DDRSS_PHY_456_DATA 0x00000000 +#define DDRSS_PHY_457_DATA 0x00000000 +#define DDRSS_PHY_458_DATA 0x00000000 +#define DDRSS_PHY_459_DATA 0x00000000 +#define DDRSS_PHY_460_DATA 0x00000000 +#define DDRSS_PHY_461_DATA 0x00000000 +#define DDRSS_PHY_462_DATA 0x00000000 +#define DDRSS_PHY_463_DATA 0x00000000 +#define DDRSS_PHY_464_DATA 0x00000000 +#define DDRSS_PHY_465_DATA 0x00000000 +#define DDRSS_PHY_466_DATA 0x00000000 +#define DDRSS_PHY_467_DATA 0x00000000 +#define DDRSS_PHY_468_DATA 0x00000000 +#define DDRSS_PHY_469_DATA 0x00000000 +#define DDRSS_PHY_470_DATA 0x00000000 +#define DDRSS_PHY_471_DATA 0x00000000 +#define DDRSS_PHY_472_DATA 0x00000000 +#define DDRSS_PHY_473_DATA 0x00000000 +#define DDRSS_PHY_474_DATA 0x00000000 +#define DDRSS_PHY_475_DATA 0x00000000 +#define DDRSS_PHY_476_DATA 0x00000000 +#define DDRSS_PHY_477_DATA 0x00000000 +#define DDRSS_PHY_478_DATA 0x00000000 +#define DDRSS_PHY_479_DATA 0x00000000 +#define DDRSS_PHY_480_DATA 0x00000000 +#define DDRSS_PHY_481_DATA 0x00000000 +#define DDRSS_PHY_482_DATA 0x00000000 +#define DDRSS_PHY_483_DATA 0x00000000 +#define DDRSS_PHY_484_DATA 0x00000000 +#define DDRSS_PHY_485_DATA 0x00000000 +#define DDRSS_PHY_486_DATA 0x00000000 +#define DDRSS_PHY_487_DATA 0x00000000 +#define DDRSS_PHY_488_DATA 0x00000000 +#define DDRSS_PHY_489_DATA 0x00000000 +#define DDRSS_PHY_490_DATA 0x00000000 +#define DDRSS_PHY_491_DATA 0x00000000 +#define DDRSS_PHY_492_DATA 0x00000000 +#define DDRSS_PHY_493_DATA 0x00000000 +#define DDRSS_PHY_494_DATA 0x00000000 +#define DDRSS_PHY_495_DATA 0x00000000 +#define DDRSS_PHY_496_DATA 0x00000000 +#define DDRSS_PHY_497_DATA 0x00000000 +#define DDRSS_PHY_498_DATA 0x00000000 +#define DDRSS_PHY_499_DATA 0x00000000 +#define DDRSS_PHY_500_DATA 0x00000000 +#define DDRSS_PHY_501_DATA 0x00000000 +#define DDRSS_PHY_502_DATA 0x00000000 +#define DDRSS_PHY_503_DATA 0x00000000 +#define DDRSS_PHY_504_DATA 0x00000000 +#define DDRSS_PHY_505_DATA 0x00000000 +#define DDRSS_PHY_506_DATA 0x00000000 +#define DDRSS_PHY_507_DATA 0x00000000 +#define DDRSS_PHY_508_DATA 0x00000000 +#define DDRSS_PHY_509_DATA 0x00000000 +#define DDRSS_PHY_510_DATA 0x00000000 +#define DDRSS_PHY_511_DATA 0x00000000 +#define DDRSS_PHY_512_DATA 0x04F00000 +#define DDRSS_PHY_513_DATA 0x00000000 +#define DDRSS_PHY_514_DATA 0x00030200 +#define DDRSS_PHY_515_DATA 0x00000000 +#define DDRSS_PHY_516_DATA 0x00000000 +#define DDRSS_PHY_517_DATA 0x01030000 +#define DDRSS_PHY_518_DATA 0x00010000 +#define DDRSS_PHY_519_DATA 0x01030004 +#define DDRSS_PHY_520_DATA 0x01000000 +#define DDRSS_PHY_521_DATA 0x00000000 +#define DDRSS_PHY_522_DATA 0x00000000 +#define DDRSS_PHY_523_DATA 0x00000000 +#define DDRSS_PHY_524_DATA 0x01010000 +#define DDRSS_PHY_525_DATA 0x00010000 +#define DDRSS_PHY_526_DATA 0x00C00001 +#define DDRSS_PHY_527_DATA 0x00CC0008 +#define DDRSS_PHY_528_DATA 0x00660601 +#define DDRSS_PHY_529_DATA 0x00000003 +#define DDRSS_PHY_530_DATA 0x00000000 +#define DDRSS_PHY_531_DATA 0x00000301 +#define DDRSS_PHY_532_DATA 0x0000AAAA +#define DDRSS_PHY_533_DATA 0x00005555 +#define DDRSS_PHY_534_DATA 0x0000B5B5 +#define DDRSS_PHY_535_DATA 0x00004A4A +#define DDRSS_PHY_536_DATA 0x00005656 +#define DDRSS_PHY_537_DATA 0x0000A9A9 +#define DDRSS_PHY_538_DATA 0x0000B7B7 +#define DDRSS_PHY_539_DATA 0x00004848 +#define DDRSS_PHY_540_DATA 0x00000000 +#define DDRSS_PHY_541_DATA 0x00000000 +#define DDRSS_PHY_542_DATA 0x08000000 +#define DDRSS_PHY_543_DATA 0x0F000008 +#define DDRSS_PHY_544_DATA 0x00000F0F +#define DDRSS_PHY_545_DATA 0x00E4E400 +#define DDRSS_PHY_546_DATA 0x00071040 +#define DDRSS_PHY_547_DATA 0x000C0020 +#define DDRSS_PHY_548_DATA 0x00062000 +#define DDRSS_PHY_549_DATA 0x00000000 +#define DDRSS_PHY_550_DATA 0x55555555 +#define DDRSS_PHY_551_DATA 0xAAAAAAAA +#define DDRSS_PHY_552_DATA 0x55555555 +#define DDRSS_PHY_553_DATA 0xAAAAAAAA +#define DDRSS_PHY_554_DATA 0x00005555 +#define DDRSS_PHY_555_DATA 0x01000100 +#define DDRSS_PHY_556_DATA 0x00800180 +#define DDRSS_PHY_557_DATA 0x00000001 +#define DDRSS_PHY_558_DATA 0x00000000 +#define DDRSS_PHY_559_DATA 0x00000000 +#define DDRSS_PHY_560_DATA 0x00000000 +#define DDRSS_PHY_561_DATA 0x00000000 +#define DDRSS_PHY_562_DATA 0x00000000 +#define DDRSS_PHY_563_DATA 0x00000000 +#define DDRSS_PHY_564_DATA 0x00000000 +#define DDRSS_PHY_565_DATA 0x00000000 +#define DDRSS_PHY_566_DATA 0x00000000 +#define DDRSS_PHY_567_DATA 0x00000000 +#define DDRSS_PHY_568_DATA 0x00000000 +#define DDRSS_PHY_569_DATA 0x00000000 +#define DDRSS_PHY_570_DATA 0x00000000 +#define DDRSS_PHY_571_DATA 0x00000000 +#define DDRSS_PHY_572_DATA 0x00000000 +#define DDRSS_PHY_573_DATA 0x00000000 +#define DDRSS_PHY_574_DATA 0x00000000 +#define DDRSS_PHY_575_DATA 0x00000000 +#define DDRSS_PHY_576_DATA 0x00000000 +#define DDRSS_PHY_577_DATA 0x00000000 +#define DDRSS_PHY_578_DATA 0x00000000 +#define DDRSS_PHY_579_DATA 0x00000004 +#define DDRSS_PHY_580_DATA 0x00000000 +#define DDRSS_PHY_581_DATA 0x00000000 +#define DDRSS_PHY_582_DATA 0x00000000 +#define DDRSS_PHY_583_DATA 0x00000000 +#define DDRSS_PHY_584_DATA 0x00000000 +#define DDRSS_PHY_585_DATA 0x00000000 +#define DDRSS_PHY_586_DATA 0x081F07FF +#define DDRSS_PHY_587_DATA 0x10200080 +#define DDRSS_PHY_588_DATA 0x00000008 +#define DDRSS_PHY_589_DATA 0x00000401 +#define DDRSS_PHY_590_DATA 0x00000000 +#define DDRSS_PHY_591_DATA 0x01CC0C01 +#define DDRSS_PHY_592_DATA 0x1003CC0C +#define DDRSS_PHY_593_DATA 0x20000140 +#define DDRSS_PHY_594_DATA 0x07FF0200 +#define DDRSS_PHY_595_DATA 0x0000DD01 +#define DDRSS_PHY_596_DATA 0x00100303 +#define DDRSS_PHY_597_DATA 0x00000000 +#define DDRSS_PHY_598_DATA 0x00000000 +#define DDRSS_PHY_599_DATA 0x00041000 +#define DDRSS_PHY_600_DATA 0x00100010 +#define DDRSS_PHY_601_DATA 0x00100010 +#define DDRSS_PHY_602_DATA 0x00100010 +#define DDRSS_PHY_603_DATA 0x00100010 +#define DDRSS_PHY_604_DATA 0x02000010 +#define DDRSS_PHY_605_DATA 0x00000005 +#define DDRSS_PHY_606_DATA 0x51516042 +#define DDRSS_PHY_607_DATA 0x31C06000 +#define DDRSS_PHY_608_DATA 0x07AB0340 +#define DDRSS_PHY_609_DATA 0x00C0C001 +#define DDRSS_PHY_610_DATA 0x0D000000 +#define DDRSS_PHY_611_DATA 0x000D0C0C +#define DDRSS_PHY_612_DATA 0x42100010 +#define DDRSS_PHY_613_DATA 0x010C073E +#define DDRSS_PHY_614_DATA 0x000F0C32 +#define DDRSS_PHY_615_DATA 0x01000140 +#define DDRSS_PHY_616_DATA 0x011E0120 +#define DDRSS_PHY_617_DATA 0x00000C00 +#define DDRSS_PHY_618_DATA 0x000002DD +#define DDRSS_PHY_619_DATA 0x00030200 +#define DDRSS_PHY_620_DATA 0x02800000 +#define DDRSS_PHY_621_DATA 0x80800000 +#define DDRSS_PHY_622_DATA 0x000D2010 +#define DDRSS_PHY_623_DATA 0x76543210 +#define DDRSS_PHY_624_DATA 0x00000008 +#define DDRSS_PHY_625_DATA 0x045D045D +#define DDRSS_PHY_626_DATA 0x045D045D +#define DDRSS_PHY_627_DATA 0x045D045D +#define DDRSS_PHY_628_DATA 0x045D045D +#define DDRSS_PHY_629_DATA 0x0000045D +#define DDRSS_PHY_630_DATA 0x0000A000 +#define DDRSS_PHY_631_DATA 0x00A000A0 +#define DDRSS_PHY_632_DATA 0x00A000A0 +#define DDRSS_PHY_633_DATA 0x00A000A0 +#define DDRSS_PHY_634_DATA 0x00A000A0 +#define DDRSS_PHY_635_DATA 0x00A000A0 +#define DDRSS_PHY_636_DATA 0x00A000A0 +#define DDRSS_PHY_637_DATA 0x00A000A0 +#define DDRSS_PHY_638_DATA 0x00A000A0 +#define DDRSS_PHY_639_DATA 0x00B200A0 +#define DDRSS_PHY_640_DATA 0x01000000 +#define DDRSS_PHY_641_DATA 0x00000000 +#define DDRSS_PHY_642_DATA 0x00000000 +#define DDRSS_PHY_643_DATA 0x00080200 +#define DDRSS_PHY_644_DATA 0x00000000 +#define DDRSS_PHY_645_DATA 0x20202020 +#define DDRSS_PHY_646_DATA 0x20202020 +#define DDRSS_PHY_647_DATA 0xF0F02020 +#define DDRSS_PHY_648_DATA 0x00000000 +#define DDRSS_PHY_649_DATA 0x00000000 +#define DDRSS_PHY_650_DATA 0x00000000 +#define DDRSS_PHY_651_DATA 0x00000000 +#define DDRSS_PHY_652_DATA 0x00000000 +#define DDRSS_PHY_653_DATA 0x00000000 +#define DDRSS_PHY_654_DATA 0x00000000 +#define DDRSS_PHY_655_DATA 0x00000000 +#define DDRSS_PHY_656_DATA 0x00000000 +#define DDRSS_PHY_657_DATA 0x00000000 +#define DDRSS_PHY_658_DATA 0x00000000 +#define DDRSS_PHY_659_DATA 0x00000000 +#define DDRSS_PHY_660_DATA 0x00000000 +#define DDRSS_PHY_661_DATA 0x00000000 +#define DDRSS_PHY_662_DATA 0x00000000 +#define DDRSS_PHY_663_DATA 0x00000000 +#define DDRSS_PHY_664_DATA 0x00000000 +#define DDRSS_PHY_665_DATA 0x00000000 +#define DDRSS_PHY_666_DATA 0x00000000 +#define DDRSS_PHY_667_DATA 0x00000000 +#define DDRSS_PHY_668_DATA 0x00000000 +#define DDRSS_PHY_669_DATA 0x00000000 +#define DDRSS_PHY_670_DATA 0x00000000 +#define DDRSS_PHY_671_DATA 0x00000000 +#define DDRSS_PHY_672_DATA 0x00000000 +#define DDRSS_PHY_673_DATA 0x00000000 +#define DDRSS_PHY_674_DATA 0x00000000 +#define DDRSS_PHY_675_DATA 0x00000000 +#define DDRSS_PHY_676_DATA 0x00000000 +#define DDRSS_PHY_677_DATA 0x00000000 +#define DDRSS_PHY_678_DATA 0x00000000 +#define DDRSS_PHY_679_DATA 0x00000000 +#define DDRSS_PHY_680_DATA 0x00000000 +#define DDRSS_PHY_681_DATA 0x00000000 +#define DDRSS_PHY_682_DATA 0x00000000 +#define DDRSS_PHY_683_DATA 0x00000000 +#define DDRSS_PHY_684_DATA 0x00000000 +#define DDRSS_PHY_685_DATA 0x00000000 +#define DDRSS_PHY_686_DATA 0x00000000 +#define DDRSS_PHY_687_DATA 0x00000000 +#define DDRSS_PHY_688_DATA 0x00000000 +#define DDRSS_PHY_689_DATA 0x00000000 +#define DDRSS_PHY_690_DATA 0x00000000 +#define DDRSS_PHY_691_DATA 0x00000000 +#define DDRSS_PHY_692_DATA 0x00000000 +#define DDRSS_PHY_693_DATA 0x00000000 +#define DDRSS_PHY_694_DATA 0x00000000 +#define DDRSS_PHY_695_DATA 0x00000000 +#define DDRSS_PHY_696_DATA 0x00000000 +#define DDRSS_PHY_697_DATA 0x00000000 +#define DDRSS_PHY_698_DATA 0x00000000 +#define DDRSS_PHY_699_DATA 0x00000000 +#define DDRSS_PHY_700_DATA 0x00000000 +#define DDRSS_PHY_701_DATA 0x00000000 +#define DDRSS_PHY_702_DATA 0x00000000 +#define DDRSS_PHY_703_DATA 0x00000000 +#define DDRSS_PHY_704_DATA 0x00000000 +#define DDRSS_PHY_705_DATA 0x00000000 +#define DDRSS_PHY_706_DATA 0x00000000 +#define DDRSS_PHY_707_DATA 0x00000000 +#define DDRSS_PHY_708_DATA 0x00000000 +#define DDRSS_PHY_709_DATA 0x00000000 +#define DDRSS_PHY_710_DATA 0x00000000 +#define DDRSS_PHY_711_DATA 0x00000000 +#define DDRSS_PHY_712_DATA 0x00000000 +#define DDRSS_PHY_713_DATA 0x00000000 +#define DDRSS_PHY_714_DATA 0x00000000 +#define DDRSS_PHY_715_DATA 0x00000000 +#define DDRSS_PHY_716_DATA 0x00000000 +#define DDRSS_PHY_717_DATA 0x00000000 +#define DDRSS_PHY_718_DATA 0x00000000 +#define DDRSS_PHY_719_DATA 0x00000000 +#define DDRSS_PHY_720_DATA 0x00000000 +#define DDRSS_PHY_721_DATA 0x00000000 +#define DDRSS_PHY_722_DATA 0x00000000 +#define DDRSS_PHY_723_DATA 0x00000000 +#define DDRSS_PHY_724_DATA 0x00000000 +#define DDRSS_PHY_725_DATA 0x00000000 +#define DDRSS_PHY_726_DATA 0x00000000 +#define DDRSS_PHY_727_DATA 0x00000000 +#define DDRSS_PHY_728_DATA 0x00000000 +#define DDRSS_PHY_729_DATA 0x00000000 +#define DDRSS_PHY_730_DATA 0x00000000 +#define DDRSS_PHY_731_DATA 0x00000000 +#define DDRSS_PHY_732_DATA 0x00000000 +#define DDRSS_PHY_733_DATA 0x00000000 +#define DDRSS_PHY_734_DATA 0x00000000 +#define DDRSS_PHY_735_DATA 0x00000000 +#define DDRSS_PHY_736_DATA 0x00000000 +#define DDRSS_PHY_737_DATA 0x00000000 +#define DDRSS_PHY_738_DATA 0x00000000 +#define DDRSS_PHY_739_DATA 0x00000000 +#define DDRSS_PHY_740_DATA 0x00000000 +#define DDRSS_PHY_741_DATA 0x00000000 +#define DDRSS_PHY_742_DATA 0x00000000 +#define DDRSS_PHY_743_DATA 0x00000000 +#define DDRSS_PHY_744_DATA 0x00000000 +#define DDRSS_PHY_745_DATA 0x00000000 +#define DDRSS_PHY_746_DATA 0x00000000 +#define DDRSS_PHY_747_DATA 0x00000000 +#define DDRSS_PHY_748_DATA 0x00000000 +#define DDRSS_PHY_749_DATA 0x00000000 +#define DDRSS_PHY_750_DATA 0x00000000 +#define DDRSS_PHY_751_DATA 0x00000000 +#define DDRSS_PHY_752_DATA 0x00000000 +#define DDRSS_PHY_753_DATA 0x00000000 +#define DDRSS_PHY_754_DATA 0x00000000 +#define DDRSS_PHY_755_DATA 0x00000000 +#define DDRSS_PHY_756_DATA 0x00000000 +#define DDRSS_PHY_757_DATA 0x00000000 +#define DDRSS_PHY_758_DATA 0x00000000 +#define DDRSS_PHY_759_DATA 0x00000000 +#define DDRSS_PHY_760_DATA 0x00000000 +#define DDRSS_PHY_761_DATA 0x00000000 +#define DDRSS_PHY_762_DATA 0x00000000 +#define DDRSS_PHY_763_DATA 0x00000000 +#define DDRSS_PHY_764_DATA 0x00000000 +#define DDRSS_PHY_765_DATA 0x00000000 +#define DDRSS_PHY_766_DATA 0x00000000 +#define DDRSS_PHY_767_DATA 0x00000000 +#define DDRSS_PHY_768_DATA 0x04F00000 +#define DDRSS_PHY_769_DATA 0x00000000 +#define DDRSS_PHY_770_DATA 0x00030200 +#define DDRSS_PHY_771_DATA 0x00000000 +#define DDRSS_PHY_772_DATA 0x00000000 +#define DDRSS_PHY_773_DATA 0x01030000 +#define DDRSS_PHY_774_DATA 0x00010000 +#define DDRSS_PHY_775_DATA 0x01030004 +#define DDRSS_PHY_776_DATA 0x01000000 +#define DDRSS_PHY_777_DATA 0x00000000 +#define DDRSS_PHY_778_DATA 0x00000000 +#define DDRSS_PHY_779_DATA 0x00000000 +#define DDRSS_PHY_780_DATA 0x01010000 +#define DDRSS_PHY_781_DATA 0x00010000 +#define DDRSS_PHY_782_DATA 0x00C00001 +#define DDRSS_PHY_783_DATA 0x00CC0008 +#define DDRSS_PHY_784_DATA 0x00660601 +#define DDRSS_PHY_785_DATA 0x00000003 +#define DDRSS_PHY_786_DATA 0x00000000 +#define DDRSS_PHY_787_DATA 0x00000301 +#define DDRSS_PHY_788_DATA 0x0000AAAA +#define DDRSS_PHY_789_DATA 0x00005555 +#define DDRSS_PHY_790_DATA 0x0000B5B5 +#define DDRSS_PHY_791_DATA 0x00004A4A +#define DDRSS_PHY_792_DATA 0x00005656 +#define DDRSS_PHY_793_DATA 0x0000A9A9 +#define DDRSS_PHY_794_DATA 0x0000B7B7 +#define DDRSS_PHY_795_DATA 0x00004848 +#define DDRSS_PHY_796_DATA 0x00000000 +#define DDRSS_PHY_797_DATA 0x00000000 +#define DDRSS_PHY_798_DATA 0x08000000 +#define DDRSS_PHY_799_DATA 0x0F000008 +#define DDRSS_PHY_800_DATA 0x00000F0F +#define DDRSS_PHY_801_DATA 0x00E4E400 +#define DDRSS_PHY_802_DATA 0x00071040 +#define DDRSS_PHY_803_DATA 0x000C0020 +#define DDRSS_PHY_804_DATA 0x00062000 +#define DDRSS_PHY_805_DATA 0x00000000 +#define DDRSS_PHY_806_DATA 0x55555555 +#define DDRSS_PHY_807_DATA 0xAAAAAAAA +#define DDRSS_PHY_808_DATA 0x55555555 +#define DDRSS_PHY_809_DATA 0xAAAAAAAA +#define DDRSS_PHY_810_DATA 0x00005555 +#define DDRSS_PHY_811_DATA 0x01000100 +#define DDRSS_PHY_812_DATA 0x00800180 +#define DDRSS_PHY_813_DATA 0x00000000 +#define DDRSS_PHY_814_DATA 0x00000000 +#define DDRSS_PHY_815_DATA 0x00000000 +#define DDRSS_PHY_816_DATA 0x00000000 +#define DDRSS_PHY_817_DATA 0x00000000 +#define DDRSS_PHY_818_DATA 0x00000000 +#define DDRSS_PHY_819_DATA 0x00000000 +#define DDRSS_PHY_820_DATA 0x00000000 +#define DDRSS_PHY_821_DATA 0x00000000 +#define DDRSS_PHY_822_DATA 0x00000000 +#define DDRSS_PHY_823_DATA 0x00000000 +#define DDRSS_PHY_824_DATA 0x00000000 +#define DDRSS_PHY_825_DATA 0x00000000 +#define DDRSS_PHY_826_DATA 0x00000000 +#define DDRSS_PHY_827_DATA 0x00000000 +#define DDRSS_PHY_828_DATA 0x00000000 +#define DDRSS_PHY_829_DATA 0x00000000 +#define DDRSS_PHY_830_DATA 0x00000000 +#define DDRSS_PHY_831_DATA 0x00000000 +#define DDRSS_PHY_832_DATA 0x00000000 +#define DDRSS_PHY_833_DATA 0x00000000 +#define DDRSS_PHY_834_DATA 0x00000000 +#define DDRSS_PHY_835_DATA 0x00000004 +#define DDRSS_PHY_836_DATA 0x00000000 +#define DDRSS_PHY_837_DATA 0x00000000 +#define DDRSS_PHY_838_DATA 0x00000000 +#define DDRSS_PHY_839_DATA 0x00000000 +#define DDRSS_PHY_840_DATA 0x00000000 +#define DDRSS_PHY_841_DATA 0x00000000 +#define DDRSS_PHY_842_DATA 0x081F07FF +#define DDRSS_PHY_843_DATA 0x10200080 +#define DDRSS_PHY_844_DATA 0x00000008 +#define DDRSS_PHY_845_DATA 0x00000401 +#define DDRSS_PHY_846_DATA 0x00000000 +#define DDRSS_PHY_847_DATA 0x01CC0C01 +#define DDRSS_PHY_848_DATA 0x1003CC0C +#define DDRSS_PHY_849_DATA 0x20000140 +#define DDRSS_PHY_850_DATA 0x07FF0200 +#define DDRSS_PHY_851_DATA 0x0000DD01 +#define DDRSS_PHY_852_DATA 0x00100303 +#define DDRSS_PHY_853_DATA 0x00000000 +#define DDRSS_PHY_854_DATA 0x00000000 +#define DDRSS_PHY_855_DATA 0x00041000 +#define DDRSS_PHY_856_DATA 0x00100010 +#define DDRSS_PHY_857_DATA 0x00100010 +#define DDRSS_PHY_858_DATA 0x00100010 +#define DDRSS_PHY_859_DATA 0x00100010 +#define DDRSS_PHY_860_DATA 0x02000010 +#define DDRSS_PHY_861_DATA 0x00000005 +#define DDRSS_PHY_862_DATA 0x51516042 +#define DDRSS_PHY_863_DATA 0x31C06000 +#define DDRSS_PHY_864_DATA 0x07AB0340 +#define DDRSS_PHY_865_DATA 0x00C0C001 +#define DDRSS_PHY_866_DATA 0x0D000000 +#define DDRSS_PHY_867_DATA 0x000D0C0C +#define DDRSS_PHY_868_DATA 0x42100010 +#define DDRSS_PHY_869_DATA 0x010C073E +#define DDRSS_PHY_870_DATA 0x000F0C32 +#define DDRSS_PHY_871_DATA 0x01000140 +#define DDRSS_PHY_872_DATA 0x011E0120 +#define DDRSS_PHY_873_DATA 0x00000C00 +#define DDRSS_PHY_874_DATA 0x000002DD +#define DDRSS_PHY_875_DATA 0x00030200 +#define DDRSS_PHY_876_DATA 0x02800000 +#define DDRSS_PHY_877_DATA 0x80800000 +#define DDRSS_PHY_878_DATA 0x000D2010 +#define DDRSS_PHY_879_DATA 0x76543210 +#define DDRSS_PHY_880_DATA 0x00000008 +#define DDRSS_PHY_881_DATA 0x045D045D +#define DDRSS_PHY_882_DATA 0x045D045D +#define DDRSS_PHY_883_DATA 0x045D045D +#define DDRSS_PHY_884_DATA 0x045D045D +#define DDRSS_PHY_885_DATA 0x0000045D +#define DDRSS_PHY_886_DATA 0x0000A000 +#define DDRSS_PHY_887_DATA 0x00A000A0 +#define DDRSS_PHY_888_DATA 0x00A000A0 +#define DDRSS_PHY_889_DATA 0x00A000A0 +#define DDRSS_PHY_890_DATA 0x00A000A0 +#define DDRSS_PHY_891_DATA 0x00A000A0 +#define DDRSS_PHY_892_DATA 0x00A000A0 +#define DDRSS_PHY_893_DATA 0x00A000A0 +#define DDRSS_PHY_894_DATA 0x00A000A0 +#define DDRSS_PHY_895_DATA 0x00B200A0 +#define DDRSS_PHY_896_DATA 0x01000000 +#define DDRSS_PHY_897_DATA 0x00000000 +#define DDRSS_PHY_898_DATA 0x00000000 +#define DDRSS_PHY_899_DATA 0x00080200 +#define DDRSS_PHY_900_DATA 0x00000000 +#define DDRSS_PHY_901_DATA 0x20202020 +#define DDRSS_PHY_902_DATA 0x20202020 +#define DDRSS_PHY_903_DATA 0xF0F02020 +#define DDRSS_PHY_904_DATA 0x00000000 +#define DDRSS_PHY_905_DATA 0x00000000 +#define DDRSS_PHY_906_DATA 0x00000000 +#define DDRSS_PHY_907_DATA 0x00000000 +#define DDRSS_PHY_908_DATA 0x00000000 +#define DDRSS_PHY_909_DATA 0x00000000 +#define DDRSS_PHY_910_DATA 0x00000000 +#define DDRSS_PHY_911_DATA 0x00000000 +#define DDRSS_PHY_912_DATA 0x00000000 +#define DDRSS_PHY_913_DATA 0x00000000 +#define DDRSS_PHY_914_DATA 0x00000000 +#define DDRSS_PHY_915_DATA 0x00000000 +#define DDRSS_PHY_916_DATA 0x00000000 +#define DDRSS_PHY_917_DATA 0x00000000 +#define DDRSS_PHY_918_DATA 0x00000000 +#define DDRSS_PHY_919_DATA 0x00000000 +#define DDRSS_PHY_920_DATA 0x00000000 +#define DDRSS_PHY_921_DATA 0x00000000 +#define DDRSS_PHY_922_DATA 0x00000000 +#define DDRSS_PHY_923_DATA 0x00000000 +#define DDRSS_PHY_924_DATA 0x00000000 +#define DDRSS_PHY_925_DATA 0x00000000 +#define DDRSS_PHY_926_DATA 0x00000000 +#define DDRSS_PHY_927_DATA 0x00000000 +#define DDRSS_PHY_928_DATA 0x00000000 +#define DDRSS_PHY_929_DATA 0x00000000 +#define DDRSS_PHY_930_DATA 0x00000000 +#define DDRSS_PHY_931_DATA 0x00000000 +#define DDRSS_PHY_932_DATA 0x00000000 +#define DDRSS_PHY_933_DATA 0x00000000 +#define DDRSS_PHY_934_DATA 0x00000000 +#define DDRSS_PHY_935_DATA 0x00000000 +#define DDRSS_PHY_936_DATA 0x00000000 +#define DDRSS_PHY_937_DATA 0x00000000 +#define DDRSS_PHY_938_DATA 0x00000000 +#define DDRSS_PHY_939_DATA 0x00000000 +#define DDRSS_PHY_940_DATA 0x00000000 +#define DDRSS_PHY_941_DATA 0x00000000 +#define DDRSS_PHY_942_DATA 0x00000000 +#define DDRSS_PHY_943_DATA 0x00000000 +#define DDRSS_PHY_944_DATA 0x00000000 +#define DDRSS_PHY_945_DATA 0x00000000 +#define DDRSS_PHY_946_DATA 0x00000000 +#define DDRSS_PHY_947_DATA 0x00000000 +#define DDRSS_PHY_948_DATA 0x00000000 +#define DDRSS_PHY_949_DATA 0x00000000 +#define DDRSS_PHY_950_DATA 0x00000000 +#define DDRSS_PHY_951_DATA 0x00000000 +#define DDRSS_PHY_952_DATA 0x00000000 +#define DDRSS_PHY_953_DATA 0x00000000 +#define DDRSS_PHY_954_DATA 0x00000000 +#define DDRSS_PHY_955_DATA 0x00000000 +#define DDRSS_PHY_956_DATA 0x00000000 +#define DDRSS_PHY_957_DATA 0x00000000 +#define DDRSS_PHY_958_DATA 0x00000000 +#define DDRSS_PHY_959_DATA 0x00000000 +#define DDRSS_PHY_960_DATA 0x00000000 +#define DDRSS_PHY_961_DATA 0x00000000 +#define DDRSS_PHY_962_DATA 0x00000000 +#define DDRSS_PHY_963_DATA 0x00000000 +#define DDRSS_PHY_964_DATA 0x00000000 +#define DDRSS_PHY_965_DATA 0x00000000 +#define DDRSS_PHY_966_DATA 0x00000000 +#define DDRSS_PHY_967_DATA 0x00000000 +#define DDRSS_PHY_968_DATA 0x00000000 +#define DDRSS_PHY_969_DATA 0x00000000 +#define DDRSS_PHY_970_DATA 0x00000000 +#define DDRSS_PHY_971_DATA 0x00000000 +#define DDRSS_PHY_972_DATA 0x00000000 +#define DDRSS_PHY_973_DATA 0x00000000 +#define DDRSS_PHY_974_DATA 0x00000000 +#define DDRSS_PHY_975_DATA 0x00000000 +#define DDRSS_PHY_976_DATA 0x00000000 +#define DDRSS_PHY_977_DATA 0x00000000 +#define DDRSS_PHY_978_DATA 0x00000000 +#define DDRSS_PHY_979_DATA 0x00000000 +#define DDRSS_PHY_980_DATA 0x00000000 +#define DDRSS_PHY_981_DATA 0x00000000 +#define DDRSS_PHY_982_DATA 0x00000000 +#define DDRSS_PHY_983_DATA 0x00000000 +#define DDRSS_PHY_984_DATA 0x00000000 +#define DDRSS_PHY_985_DATA 0x00000000 +#define DDRSS_PHY_986_DATA 0x00000000 +#define DDRSS_PHY_987_DATA 0x00000000 +#define DDRSS_PHY_988_DATA 0x00000000 +#define DDRSS_PHY_989_DATA 0x00000000 +#define DDRSS_PHY_990_DATA 0x00000000 +#define DDRSS_PHY_991_DATA 0x00000000 +#define DDRSS_PHY_992_DATA 0x00000000 +#define DDRSS_PHY_993_DATA 0x00000000 +#define DDRSS_PHY_994_DATA 0x00000000 +#define DDRSS_PHY_995_DATA 0x00000000 +#define DDRSS_PHY_996_DATA 0x00000000 +#define DDRSS_PHY_997_DATA 0x00000000 +#define DDRSS_PHY_998_DATA 0x00000000 +#define DDRSS_PHY_999_DATA 0x00000000 +#define DDRSS_PHY_1000_DATA 0x00000000 +#define DDRSS_PHY_1001_DATA 0x00000000 +#define DDRSS_PHY_1002_DATA 0x00000000 +#define DDRSS_PHY_1003_DATA 0x00000000 +#define DDRSS_PHY_1004_DATA 0x00000000 +#define DDRSS_PHY_1005_DATA 0x00000000 +#define DDRSS_PHY_1006_DATA 0x00000000 +#define DDRSS_PHY_1007_DATA 0x00000000 +#define DDRSS_PHY_1008_DATA 0x00000000 +#define DDRSS_PHY_1009_DATA 0x00000000 +#define DDRSS_PHY_1010_DATA 0x00000000 +#define DDRSS_PHY_1011_DATA 0x00000000 +#define DDRSS_PHY_1012_DATA 0x00000000 +#define DDRSS_PHY_1013_DATA 0x00000000 +#define DDRSS_PHY_1014_DATA 0x00000000 +#define DDRSS_PHY_1015_DATA 0x00000000 +#define DDRSS_PHY_1016_DATA 0x00000000 +#define DDRSS_PHY_1017_DATA 0x00000000 +#define DDRSS_PHY_1018_DATA 0x00000000 +#define DDRSS_PHY_1019_DATA 0x00000000 +#define DDRSS_PHY_1020_DATA 0x00000000 +#define DDRSS_PHY_1021_DATA 0x00000000 +#define DDRSS_PHY_1022_DATA 0x00000000 +#define DDRSS_PHY_1023_DATA 0x00000000 +#define DDRSS_PHY_1024_DATA 0x00000000 +#define DDRSS_PHY_1025_DATA 0x00000000 +#define DDRSS_PHY_1026_DATA 0x00000000 +#define DDRSS_PHY_1027_DATA 0x00000000 +#define DDRSS_PHY_1028_DATA 0x00000000 +#define DDRSS_PHY_1029_DATA 0x00000100 +#define DDRSS_PHY_1030_DATA 0x00000200 +#define DDRSS_PHY_1031_DATA 0x00000000 +#define DDRSS_PHY_1032_DATA 0x00000000 +#define DDRSS_PHY_1033_DATA 0x00000000 +#define DDRSS_PHY_1034_DATA 0x00000000 +#define DDRSS_PHY_1035_DATA 0x00400000 +#define DDRSS_PHY_1036_DATA 0x00000080 +#define DDRSS_PHY_1037_DATA 0x00DCBA98 +#define DDRSS_PHY_1038_DATA 0x03000000 +#define DDRSS_PHY_1039_DATA 0x00200000 +#define DDRSS_PHY_1040_DATA 0x00000000 +#define DDRSS_PHY_1041_DATA 0x00000000 +#define DDRSS_PHY_1042_DATA 0x00000000 +#define DDRSS_PHY_1043_DATA 0x00000000 +#define DDRSS_PHY_1044_DATA 0x00000000 +#define DDRSS_PHY_1045_DATA 0x0000002A +#define DDRSS_PHY_1046_DATA 0x00000015 +#define DDRSS_PHY_1047_DATA 0x00000015 +#define DDRSS_PHY_1048_DATA 0x0000002A +#define DDRSS_PHY_1049_DATA 0x00000033 +#define DDRSS_PHY_1050_DATA 0x0000000C +#define DDRSS_PHY_1051_DATA 0x0000000C +#define DDRSS_PHY_1052_DATA 0x00000033 +#define DDRSS_PHY_1053_DATA 0x0A418820 +#define DDRSS_PHY_1054_DATA 0x003F0000 +#define DDRSS_PHY_1055_DATA 0x000F013F +#define DDRSS_PHY_1056_DATA 0x20202003 +#define DDRSS_PHY_1057_DATA 0x00202020 +#define DDRSS_PHY_1058_DATA 0x20008008 +#define DDRSS_PHY_1059_DATA 0x00000810 +#define DDRSS_PHY_1060_DATA 0x00000F00 +#define DDRSS_PHY_1061_DATA 0x000405CC +#define DDRSS_PHY_1062_DATA 0x03000004 +#define DDRSS_PHY_1063_DATA 0x00030000 +#define DDRSS_PHY_1064_DATA 0x00000300 +#define DDRSS_PHY_1065_DATA 0x00000300 +#define DDRSS_PHY_1066_DATA 0x00000300 +#define DDRSS_PHY_1067_DATA 0x00000300 +#define DDRSS_PHY_1068_DATA 0x42080010 +#define DDRSS_PHY_1069_DATA 0x0000803E +#define DDRSS_PHY_1070_DATA 0x00000001 +#define DDRSS_PHY_1071_DATA 0x01000002 +#define DDRSS_PHY_1072_DATA 0x00008000 +#define DDRSS_PHY_1073_DATA 0x00000000 +#define DDRSS_PHY_1074_DATA 0x00000000 +#define DDRSS_PHY_1075_DATA 0x00000000 +#define DDRSS_PHY_1076_DATA 0x00000000 +#define DDRSS_PHY_1077_DATA 0x00000000 +#define DDRSS_PHY_1078_DATA 0x00000000 +#define DDRSS_PHY_1079_DATA 0x00000000 +#define DDRSS_PHY_1080_DATA 0x00000000 +#define DDRSS_PHY_1081_DATA 0x00000000 +#define DDRSS_PHY_1082_DATA 0x00000000 +#define DDRSS_PHY_1083_DATA 0x00000000 +#define DDRSS_PHY_1084_DATA 0x00000000 +#define DDRSS_PHY_1085_DATA 0x00000000 +#define DDRSS_PHY_1086_DATA 0x00000000 +#define DDRSS_PHY_1087_DATA 0x00000000 +#define DDRSS_PHY_1088_DATA 0x00000000 +#define DDRSS_PHY_1089_DATA 0x00000000 +#define DDRSS_PHY_1090_DATA 0x00000000 +#define DDRSS_PHY_1091_DATA 0x00000000 +#define DDRSS_PHY_1092_DATA 0x00000000 +#define DDRSS_PHY_1093_DATA 0x00000000 +#define DDRSS_PHY_1094_DATA 0x00000000 +#define DDRSS_PHY_1095_DATA 0x00000000 +#define DDRSS_PHY_1096_DATA 0x00000000 +#define DDRSS_PHY_1097_DATA 0x00000000 +#define DDRSS_PHY_1098_DATA 0x00000000 +#define DDRSS_PHY_1099_DATA 0x00000000 +#define DDRSS_PHY_1100_DATA 0x00000000 +#define DDRSS_PHY_1101_DATA 0x00000000 +#define DDRSS_PHY_1102_DATA 0x00000000 +#define DDRSS_PHY_1103_DATA 0x00000000 +#define DDRSS_PHY_1104_DATA 0x00000000 +#define DDRSS_PHY_1105_DATA 0x00000000 +#define DDRSS_PHY_1106_DATA 0x00000000 +#define DDRSS_PHY_1107_DATA 0x00000000 +#define DDRSS_PHY_1108_DATA 0x00000000 +#define DDRSS_PHY_1109_DATA 0x00000000 +#define DDRSS_PHY_1110_DATA 0x00000000 +#define DDRSS_PHY_1111_DATA 0x00000000 +#define DDRSS_PHY_1112_DATA 0x00000000 +#define DDRSS_PHY_1113_DATA 0x00000000 +#define DDRSS_PHY_1114_DATA 0x00000000 +#define DDRSS_PHY_1115_DATA 0x00000000 +#define DDRSS_PHY_1116_DATA 0x00000000 +#define DDRSS_PHY_1117_DATA 0x00000000 +#define DDRSS_PHY_1118_DATA 0x00000000 +#define DDRSS_PHY_1119_DATA 0x00000000 +#define DDRSS_PHY_1120_DATA 0x00000000 +#define DDRSS_PHY_1121_DATA 0x00000000 +#define DDRSS_PHY_1122_DATA 0x00000000 +#define DDRSS_PHY_1123_DATA 0x00000000 +#define DDRSS_PHY_1124_DATA 0x00000000 +#define DDRSS_PHY_1125_DATA 0x00000000 +#define DDRSS_PHY_1126_DATA 0x00000000 +#define DDRSS_PHY_1127_DATA 0x00000000 +#define DDRSS_PHY_1128_DATA 0x00000000 +#define DDRSS_PHY_1129_DATA 0x00000000 +#define DDRSS_PHY_1130_DATA 0x00000000 +#define DDRSS_PHY_1131_DATA 0x00000000 +#define DDRSS_PHY_1132_DATA 0x00000000 +#define DDRSS_PHY_1133_DATA 0x00000000 +#define DDRSS_PHY_1134_DATA 0x00000000 +#define DDRSS_PHY_1135_DATA 0x00000000 +#define DDRSS_PHY_1136_DATA 0x00000000 +#define DDRSS_PHY_1137_DATA 0x00000000 +#define DDRSS_PHY_1138_DATA 0x00000000 +#define DDRSS_PHY_1139_DATA 0x00000000 +#define DDRSS_PHY_1140_DATA 0x00000000 +#define DDRSS_PHY_1141_DATA 0x00000000 +#define DDRSS_PHY_1142_DATA 0x00000000 +#define DDRSS_PHY_1143_DATA 0x00000000 +#define DDRSS_PHY_1144_DATA 0x00000000 +#define DDRSS_PHY_1145_DATA 0x00000000 +#define DDRSS_PHY_1146_DATA 0x00000000 +#define DDRSS_PHY_1147_DATA 0x00000000 +#define DDRSS_PHY_1148_DATA 0x00000000 +#define DDRSS_PHY_1149_DATA 0x00000000 +#define DDRSS_PHY_1150_DATA 0x00000000 +#define DDRSS_PHY_1151_DATA 0x00000000 +#define DDRSS_PHY_1152_DATA 0x00000000 +#define DDRSS_PHY_1153_DATA 0x00000000 +#define DDRSS_PHY_1154_DATA 0x00000000 +#define DDRSS_PHY_1155_DATA 0x00000000 +#define DDRSS_PHY_1156_DATA 0x00000000 +#define DDRSS_PHY_1157_DATA 0x00000000 +#define DDRSS_PHY_1158_DATA 0x00000000 +#define DDRSS_PHY_1159_DATA 0x00000000 +#define DDRSS_PHY_1160_DATA 0x00000000 +#define DDRSS_PHY_1161_DATA 0x00000000 +#define DDRSS_PHY_1162_DATA 0x00000000 +#define DDRSS_PHY_1163_DATA 0x00000000 +#define DDRSS_PHY_1164_DATA 0x00000000 +#define DDRSS_PHY_1165_DATA 0x00000000 +#define DDRSS_PHY_1166_DATA 0x00000000 +#define DDRSS_PHY_1167_DATA 0x00000000 +#define DDRSS_PHY_1168_DATA 0x00000000 +#define DDRSS_PHY_1169_DATA 0x00000000 +#define DDRSS_PHY_1170_DATA 0x00000000 +#define DDRSS_PHY_1171_DATA 0x00000000 +#define DDRSS_PHY_1172_DATA 0x00000000 +#define DDRSS_PHY_1173_DATA 0x00000000 +#define DDRSS_PHY_1174_DATA 0x00000000 +#define DDRSS_PHY_1175_DATA 0x00000000 +#define DDRSS_PHY_1176_DATA 0x00000000 +#define DDRSS_PHY_1177_DATA 0x00000000 +#define DDRSS_PHY_1178_DATA 0x00000000 +#define DDRSS_PHY_1179_DATA 0x00000000 +#define DDRSS_PHY_1180_DATA 0x00000000 +#define DDRSS_PHY_1181_DATA 0x00000000 +#define DDRSS_PHY_1182_DATA 0x00000000 +#define DDRSS_PHY_1183_DATA 0x00000000 +#define DDRSS_PHY_1184_DATA 0x00000000 +#define DDRSS_PHY_1185_DATA 0x00000000 +#define DDRSS_PHY_1186_DATA 0x00000000 +#define DDRSS_PHY_1187_DATA 0x00000000 +#define DDRSS_PHY_1188_DATA 0x00000000 +#define DDRSS_PHY_1189_DATA 0x00000000 +#define DDRSS_PHY_1190_DATA 0x00000000 +#define DDRSS_PHY_1191_DATA 0x00000000 +#define DDRSS_PHY_1192_DATA 0x00000000 +#define DDRSS_PHY_1193_DATA 0x00000000 +#define DDRSS_PHY_1194_DATA 0x00000000 +#define DDRSS_PHY_1195_DATA 0x00000000 +#define DDRSS_PHY_1196_DATA 0x00000000 +#define DDRSS_PHY_1197_DATA 0x00000000 +#define DDRSS_PHY_1198_DATA 0x00000000 +#define DDRSS_PHY_1199_DATA 0x00000000 +#define DDRSS_PHY_1200_DATA 0x00000000 +#define DDRSS_PHY_1201_DATA 0x00000000 +#define DDRSS_PHY_1202_DATA 0x00000000 +#define DDRSS_PHY_1203_DATA 0x00000000 +#define DDRSS_PHY_1204_DATA 0x00000000 +#define DDRSS_PHY_1205_DATA 0x00000000 +#define DDRSS_PHY_1206_DATA 0x00000000 +#define DDRSS_PHY_1207_DATA 0x00000000 +#define DDRSS_PHY_1208_DATA 0x00000000 +#define DDRSS_PHY_1209_DATA 0x00000000 +#define DDRSS_PHY_1210_DATA 0x00000000 +#define DDRSS_PHY_1211_DATA 0x00000000 +#define DDRSS_PHY_1212_DATA 0x00000000 +#define DDRSS_PHY_1213_DATA 0x00000000 +#define DDRSS_PHY_1214_DATA 0x00000000 +#define DDRSS_PHY_1215_DATA 0x00000000 +#define DDRSS_PHY_1216_DATA 0x00000000 +#define DDRSS_PHY_1217_DATA 0x00000000 +#define DDRSS_PHY_1218_DATA 0x00000000 +#define DDRSS_PHY_1219_DATA 0x00000000 +#define DDRSS_PHY_1220_DATA 0x00000000 +#define DDRSS_PHY_1221_DATA 0x00000000 +#define DDRSS_PHY_1222_DATA 0x00000000 +#define DDRSS_PHY_1223_DATA 0x00000000 +#define DDRSS_PHY_1224_DATA 0x00000000 +#define DDRSS_PHY_1225_DATA 0x00000000 +#define DDRSS_PHY_1226_DATA 0x00000000 +#define DDRSS_PHY_1227_DATA 0x00000000 +#define DDRSS_PHY_1228_DATA 0x00000000 +#define DDRSS_PHY_1229_DATA 0x00000000 +#define DDRSS_PHY_1230_DATA 0x00000000 +#define DDRSS_PHY_1231_DATA 0x00000000 +#define DDRSS_PHY_1232_DATA 0x00000000 +#define DDRSS_PHY_1233_DATA 0x00000000 +#define DDRSS_PHY_1234_DATA 0x00000000 +#define DDRSS_PHY_1235_DATA 0x00000000 +#define DDRSS_PHY_1236_DATA 0x00000000 +#define DDRSS_PHY_1237_DATA 0x00000000 +#define DDRSS_PHY_1238_DATA 0x00000000 +#define DDRSS_PHY_1239_DATA 0x00000000 +#define DDRSS_PHY_1240_DATA 0x00000000 +#define DDRSS_PHY_1241_DATA 0x00000000 +#define DDRSS_PHY_1242_DATA 0x00000000 +#define DDRSS_PHY_1243_DATA 0x00000000 +#define DDRSS_PHY_1244_DATA 0x00000000 +#define DDRSS_PHY_1245_DATA 0x00000000 +#define DDRSS_PHY_1246_DATA 0x00000000 +#define DDRSS_PHY_1247_DATA 0x00000000 +#define DDRSS_PHY_1248_DATA 0x00000000 +#define DDRSS_PHY_1249_DATA 0x00000000 +#define DDRSS_PHY_1250_DATA 0x00000000 +#define DDRSS_PHY_1251_DATA 0x00000000 +#define DDRSS_PHY_1252_DATA 0x00000000 +#define DDRSS_PHY_1253_DATA 0x00000000 +#define DDRSS_PHY_1254_DATA 0x00000000 +#define DDRSS_PHY_1255_DATA 0x00000000 +#define DDRSS_PHY_1256_DATA 0x00000000 +#define DDRSS_PHY_1257_DATA 0x00000000 +#define DDRSS_PHY_1258_DATA 0x00000000 +#define DDRSS_PHY_1259_DATA 0x00000000 +#define DDRSS_PHY_1260_DATA 0x00000000 +#define DDRSS_PHY_1261_DATA 0x00000000 +#define DDRSS_PHY_1262_DATA 0x00000000 +#define DDRSS_PHY_1263_DATA 0x00000000 +#define DDRSS_PHY_1264_DATA 0x00000000 +#define DDRSS_PHY_1265_DATA 0x00000000 +#define DDRSS_PHY_1266_DATA 0x00000000 +#define DDRSS_PHY_1267_DATA 0x00000000 +#define DDRSS_PHY_1268_DATA 0x00000000 +#define DDRSS_PHY_1269_DATA 0x00000000 +#define DDRSS_PHY_1270_DATA 0x00000000 +#define DDRSS_PHY_1271_DATA 0x00000000 +#define DDRSS_PHY_1272_DATA 0x00000000 +#define DDRSS_PHY_1273_DATA 0x00000000 +#define DDRSS_PHY_1274_DATA 0x00000000 +#define DDRSS_PHY_1275_DATA 0x00000000 +#define DDRSS_PHY_1276_DATA 0x00000000 +#define DDRSS_PHY_1277_DATA 0x00000000 +#define DDRSS_PHY_1278_DATA 0x00000000 +#define DDRSS_PHY_1279_DATA 0x00000000 +#define DDRSS_PHY_1280_DATA 0x00000000 +#define DDRSS_PHY_1281_DATA 0x00000000 +#define DDRSS_PHY_1282_DATA 0x00000000 +#define DDRSS_PHY_1283_DATA 0x00000000 +#define DDRSS_PHY_1284_DATA 0x00000000 +#define DDRSS_PHY_1285_DATA 0x00000100 +#define DDRSS_PHY_1286_DATA 0x00000200 +#define DDRSS_PHY_1287_DATA 0x00000000 +#define DDRSS_PHY_1288_DATA 0x00000000 +#define DDRSS_PHY_1289_DATA 0x00000000 +#define DDRSS_PHY_1290_DATA 0x00000000 +#define DDRSS_PHY_1291_DATA 0x00400000 +#define DDRSS_PHY_1292_DATA 0x00000080 +#define DDRSS_PHY_1293_DATA 0x00DCBA98 +#define DDRSS_PHY_1294_DATA 0x03000000 +#define DDRSS_PHY_1295_DATA 0x00200000 +#define DDRSS_PHY_1296_DATA 0x00000000 +#define DDRSS_PHY_1297_DATA 0x00000000 +#define DDRSS_PHY_1298_DATA 0x00000000 +#define DDRSS_PHY_1299_DATA 0x00000000 +#define DDRSS_PHY_1300_DATA 0x00000000 +#define DDRSS_PHY_1301_DATA 0x0000002A +#define DDRSS_PHY_1302_DATA 0x00000015 +#define DDRSS_PHY_1303_DATA 0x00000015 +#define DDRSS_PHY_1304_DATA 0x0000002A +#define DDRSS_PHY_1305_DATA 0x00000033 +#define DDRSS_PHY_1306_DATA 0x0000000C +#define DDRSS_PHY_1307_DATA 0x0000000C +#define DDRSS_PHY_1308_DATA 0x00000033 +#define DDRSS_PHY_1309_DATA 0x0A418820 +#define DDRSS_PHY_1310_DATA 0x00000000 +#define DDRSS_PHY_1311_DATA 0x000F0000 +#define DDRSS_PHY_1312_DATA 0x20202003 +#define DDRSS_PHY_1313_DATA 0x00202020 +#define DDRSS_PHY_1314_DATA 0x20008008 +#define DDRSS_PHY_1315_DATA 0x00000810 +#define DDRSS_PHY_1316_DATA 0x00000F00 +#define DDRSS_PHY_1317_DATA 0x000405CC +#define DDRSS_PHY_1318_DATA 0x03000004 +#define DDRSS_PHY_1319_DATA 0x00030000 +#define DDRSS_PHY_1320_DATA 0x00000300 +#define DDRSS_PHY_1321_DATA 0x00000300 +#define DDRSS_PHY_1322_DATA 0x00000300 +#define DDRSS_PHY_1323_DATA 0x00000300 +#define DDRSS_PHY_1324_DATA 0x42080010 +#define DDRSS_PHY_1325_DATA 0x0000803E +#define DDRSS_PHY_1326_DATA 0x00000001 +#define DDRSS_PHY_1327_DATA 0x01000002 +#define DDRSS_PHY_1328_DATA 0x00008000 +#define DDRSS_PHY_1329_DATA 0x00000000 +#define DDRSS_PHY_1330_DATA 0x00000000 +#define DDRSS_PHY_1331_DATA 0x00000000 +#define DDRSS_PHY_1332_DATA 0x00000000 +#define DDRSS_PHY_1333_DATA 0x00000000 +#define DDRSS_PHY_1334_DATA 0x00000000 +#define DDRSS_PHY_1335_DATA 0x00000000 +#define DDRSS_PHY_1336_DATA 0x00000000 +#define DDRSS_PHY_1337_DATA 0x00000000 +#define DDRSS_PHY_1338_DATA 0x00000000 +#define DDRSS_PHY_1339_DATA 0x00000000 +#define DDRSS_PHY_1340_DATA 0x00000000 +#define DDRSS_PHY_1341_DATA 0x00000000 +#define DDRSS_PHY_1342_DATA 0x00000000 +#define DDRSS_PHY_1343_DATA 0x00000000 +#define DDRSS_PHY_1344_DATA 0x00000000 +#define DDRSS_PHY_1345_DATA 0x00000000 +#define DDRSS_PHY_1346_DATA 0x00000000 +#define DDRSS_PHY_1347_DATA 0x00000000 +#define DDRSS_PHY_1348_DATA 0x00000000 +#define DDRSS_PHY_1349_DATA 0x00000000 +#define DDRSS_PHY_1350_DATA 0x00000000 +#define DDRSS_PHY_1351_DATA 0x00000000 +#define DDRSS_PHY_1352_DATA 0x00000000 +#define DDRSS_PHY_1353_DATA 0x00000000 +#define DDRSS_PHY_1354_DATA 0x00000000 +#define DDRSS_PHY_1355_DATA 0x00000000 +#define DDRSS_PHY_1356_DATA 0x00000000 +#define DDRSS_PHY_1357_DATA 0x00000000 +#define DDRSS_PHY_1358_DATA 0x00000000 +#define DDRSS_PHY_1359_DATA 0x00000000 +#define DDRSS_PHY_1360_DATA 0x00000000 +#define DDRSS_PHY_1361_DATA 0x00000000 +#define DDRSS_PHY_1362_DATA 0x00000000 +#define DDRSS_PHY_1363_DATA 0x00000000 +#define DDRSS_PHY_1364_DATA 0x00000000 +#define DDRSS_PHY_1365_DATA 0x00000000 +#define DDRSS_PHY_1366_DATA 0x00000000 +#define DDRSS_PHY_1367_DATA 0x00000000 +#define DDRSS_PHY_1368_DATA 0x00000000 +#define DDRSS_PHY_1369_DATA 0x00000000 +#define DDRSS_PHY_1370_DATA 0x00000000 +#define DDRSS_PHY_1371_DATA 0x00000000 +#define DDRSS_PHY_1372_DATA 0x00000000 +#define DDRSS_PHY_1373_DATA 0x00000000 +#define DDRSS_PHY_1374_DATA 0x00000000 +#define DDRSS_PHY_1375_DATA 0x00000000 +#define DDRSS_PHY_1376_DATA 0x00000000 +#define DDRSS_PHY_1377_DATA 0x00000000 +#define DDRSS_PHY_1378_DATA 0x00000000 +#define DDRSS_PHY_1379_DATA 0x00000000 +#define DDRSS_PHY_1380_DATA 0x00000000 +#define DDRSS_PHY_1381_DATA 0x00000000 +#define DDRSS_PHY_1382_DATA 0x00000000 +#define DDRSS_PHY_1383_DATA 0x00000000 +#define DDRSS_PHY_1384_DATA 0x00000000 +#define DDRSS_PHY_1385_DATA 0x00000000 +#define DDRSS_PHY_1386_DATA 0x00000000 +#define DDRSS_PHY_1387_DATA 0x00000000 +#define DDRSS_PHY_1388_DATA 0x00000000 +#define DDRSS_PHY_1389_DATA 0x00000000 +#define DDRSS_PHY_1390_DATA 0x00000000 +#define DDRSS_PHY_1391_DATA 0x00000000 +#define DDRSS_PHY_1392_DATA 0x00000000 +#define DDRSS_PHY_1393_DATA 0x00000000 +#define DDRSS_PHY_1394_DATA 0x00000000 +#define DDRSS_PHY_1395_DATA 0x00000000 +#define DDRSS_PHY_1396_DATA 0x00000000 +#define DDRSS_PHY_1397_DATA 0x00000000 +#define DDRSS_PHY_1398_DATA 0x00000000 +#define DDRSS_PHY_1399_DATA 0x00000000 +#define DDRSS_PHY_1400_DATA 0x00000000 +#define DDRSS_PHY_1401_DATA 0x00000000 +#define DDRSS_PHY_1402_DATA 0x00000000 +#define DDRSS_PHY_1403_DATA 0x00000000 +#define DDRSS_PHY_1404_DATA 0x00000000 +#define DDRSS_PHY_1405_DATA 0x00000000 +#define DDRSS_PHY_1406_DATA 0x00000000 +#define DDRSS_PHY_1407_DATA 0x00000000 +#define DDRSS_PHY_1408_DATA 0x00000000 +#define DDRSS_PHY_1409_DATA 0x00000000 +#define DDRSS_PHY_1410_DATA 0x00000000 +#define DDRSS_PHY_1411_DATA 0x00000000 +#define DDRSS_PHY_1412_DATA 0x00000000 +#define DDRSS_PHY_1413_DATA 0x00000000 +#define DDRSS_PHY_1414_DATA 0x00000000 +#define DDRSS_PHY_1415_DATA 0x00000000 +#define DDRSS_PHY_1416_DATA 0x00000000 +#define DDRSS_PHY_1417_DATA 0x00000000 +#define DDRSS_PHY_1418_DATA 0x00000000 +#define DDRSS_PHY_1419_DATA 0x00000000 +#define DDRSS_PHY_1420_DATA 0x00000000 +#define DDRSS_PHY_1421_DATA 0x00000000 +#define DDRSS_PHY_1422_DATA 0x00000000 +#define DDRSS_PHY_1423_DATA 0x00000000 +#define DDRSS_PHY_1424_DATA 0x00000000 +#define DDRSS_PHY_1425_DATA 0x00000000 +#define DDRSS_PHY_1426_DATA 0x00000000 +#define DDRSS_PHY_1427_DATA 0x00000000 +#define DDRSS_PHY_1428_DATA 0x00000000 +#define DDRSS_PHY_1429_DATA 0x00000000 +#define DDRSS_PHY_1430_DATA 0x00000000 +#define DDRSS_PHY_1431_DATA 0x00000000 +#define DDRSS_PHY_1432_DATA 0x00000000 +#define DDRSS_PHY_1433_DATA 0x00000000 +#define DDRSS_PHY_1434_DATA 0x00000000 +#define DDRSS_PHY_1435_DATA 0x00000000 +#define DDRSS_PHY_1436_DATA 0x00000000 +#define DDRSS_PHY_1437_DATA 0x00000000 +#define DDRSS_PHY_1438_DATA 0x00000000 +#define DDRSS_PHY_1439_DATA 0x00000000 +#define DDRSS_PHY_1440_DATA 0x00000000 +#define DDRSS_PHY_1441_DATA 0x00000000 +#define DDRSS_PHY_1442_DATA 0x00000000 +#define DDRSS_PHY_1443_DATA 0x00000000 +#define DDRSS_PHY_1444_DATA 0x00000000 +#define DDRSS_PHY_1445_DATA 0x00000000 +#define DDRSS_PHY_1446_DATA 0x00000000 +#define DDRSS_PHY_1447_DATA 0x00000000 +#define DDRSS_PHY_1448_DATA 0x00000000 +#define DDRSS_PHY_1449_DATA 0x00000000 +#define DDRSS_PHY_1450_DATA 0x00000000 +#define DDRSS_PHY_1451_DATA 0x00000000 +#define DDRSS_PHY_1452_DATA 0x00000000 +#define DDRSS_PHY_1453_DATA 0x00000000 +#define DDRSS_PHY_1454_DATA 0x00000000 +#define DDRSS_PHY_1455_DATA 0x00000000 +#define DDRSS_PHY_1456_DATA 0x00000000 +#define DDRSS_PHY_1457_DATA 0x00000000 +#define DDRSS_PHY_1458_DATA 0x00000000 +#define DDRSS_PHY_1459_DATA 0x00000000 +#define DDRSS_PHY_1460_DATA 0x00000000 +#define DDRSS_PHY_1461_DATA 0x00000000 +#define DDRSS_PHY_1462_DATA 0x00000000 +#define DDRSS_PHY_1463_DATA 0x00000000 +#define DDRSS_PHY_1464_DATA 0x00000000 +#define DDRSS_PHY_1465_DATA 0x00000000 +#define DDRSS_PHY_1466_DATA 0x00000000 +#define DDRSS_PHY_1467_DATA 0x00000000 +#define DDRSS_PHY_1468_DATA 0x00000000 +#define DDRSS_PHY_1469_DATA 0x00000000 +#define DDRSS_PHY_1470_DATA 0x00000000 +#define DDRSS_PHY_1471_DATA 0x00000000 +#define DDRSS_PHY_1472_DATA 0x00000000 +#define DDRSS_PHY_1473_DATA 0x00000000 +#define DDRSS_PHY_1474_DATA 0x00000000 +#define DDRSS_PHY_1475_DATA 0x00000000 +#define DDRSS_PHY_1476_DATA 0x00000000 +#define DDRSS_PHY_1477_DATA 0x00000000 +#define DDRSS_PHY_1478_DATA 0x00000000 +#define DDRSS_PHY_1479_DATA 0x00000000 +#define DDRSS_PHY_1480_DATA 0x00000000 +#define DDRSS_PHY_1481_DATA 0x00000000 +#define DDRSS_PHY_1482_DATA 0x00000000 +#define DDRSS_PHY_1483_DATA 0x00000000 +#define DDRSS_PHY_1484_DATA 0x00000000 +#define DDRSS_PHY_1485_DATA 0x00000000 +#define DDRSS_PHY_1486_DATA 0x00000000 +#define DDRSS_PHY_1487_DATA 0x00000000 +#define DDRSS_PHY_1488_DATA 0x00000000 +#define DDRSS_PHY_1489_DATA 0x00000000 +#define DDRSS_PHY_1490_DATA 0x00000000 +#define DDRSS_PHY_1491_DATA 0x00000000 +#define DDRSS_PHY_1492_DATA 0x00000000 +#define DDRSS_PHY_1493_DATA 0x00000000 +#define DDRSS_PHY_1494_DATA 0x00000000 +#define DDRSS_PHY_1495_DATA 0x00000000 +#define DDRSS_PHY_1496_DATA 0x00000000 +#define DDRSS_PHY_1497_DATA 0x00000000 +#define DDRSS_PHY_1498_DATA 0x00000000 +#define DDRSS_PHY_1499_DATA 0x00000000 +#define DDRSS_PHY_1500_DATA 0x00000000 +#define DDRSS_PHY_1501_DATA 0x00000000 +#define DDRSS_PHY_1502_DATA 0x00000000 +#define DDRSS_PHY_1503_DATA 0x00000000 +#define DDRSS_PHY_1504_DATA 0x00000000 +#define DDRSS_PHY_1505_DATA 0x00000000 +#define DDRSS_PHY_1506_DATA 0x00000000 +#define DDRSS_PHY_1507_DATA 0x00000000 +#define DDRSS_PHY_1508_DATA 0x00000000 +#define DDRSS_PHY_1509_DATA 0x00000000 +#define DDRSS_PHY_1510_DATA 0x00000000 +#define DDRSS_PHY_1511_DATA 0x00000000 +#define DDRSS_PHY_1512_DATA 0x00000000 +#define DDRSS_PHY_1513_DATA 0x00000000 +#define DDRSS_PHY_1514_DATA 0x00000000 +#define DDRSS_PHY_1515_DATA 0x00000000 +#define DDRSS_PHY_1516_DATA 0x00000000 +#define DDRSS_PHY_1517_DATA 0x00000000 +#define DDRSS_PHY_1518_DATA 0x00000000 +#define DDRSS_PHY_1519_DATA 0x00000000 +#define DDRSS_PHY_1520_DATA 0x00000000 +#define DDRSS_PHY_1521_DATA 0x00000000 +#define DDRSS_PHY_1522_DATA 0x00000000 +#define DDRSS_PHY_1523_DATA 0x00000000 +#define DDRSS_PHY_1524_DATA 0x00000000 +#define DDRSS_PHY_1525_DATA 0x00000000 +#define DDRSS_PHY_1526_DATA 0x00000000 +#define DDRSS_PHY_1527_DATA 0x00000000 +#define DDRSS_PHY_1528_DATA 0x00000000 +#define DDRSS_PHY_1529_DATA 0x00000000 +#define DDRSS_PHY_1530_DATA 0x00000000 +#define DDRSS_PHY_1531_DATA 0x00000000 +#define DDRSS_PHY_1532_DATA 0x00000000 +#define DDRSS_PHY_1533_DATA 0x00000000 +#define DDRSS_PHY_1534_DATA 0x00000000 +#define DDRSS_PHY_1535_DATA 0x00000000 +#define DDRSS_PHY_1536_DATA 0x00000000 +#define DDRSS_PHY_1537_DATA 0x00000000 +#define DDRSS_PHY_1538_DATA 0x00000000 +#define DDRSS_PHY_1539_DATA 0x00000000 +#define DDRSS_PHY_1540_DATA 0x00000000 +#define DDRSS_PHY_1541_DATA 0x00000100 +#define DDRSS_PHY_1542_DATA 0x00000200 +#define DDRSS_PHY_1543_DATA 0x00000000 +#define DDRSS_PHY_1544_DATA 0x00000000 +#define DDRSS_PHY_1545_DATA 0x00000000 +#define DDRSS_PHY_1546_DATA 0x00000000 +#define DDRSS_PHY_1547_DATA 0x00400000 +#define DDRSS_PHY_1548_DATA 0x00000080 +#define DDRSS_PHY_1549_DATA 0x00DCBA98 +#define DDRSS_PHY_1550_DATA 0x03000000 +#define DDRSS_PHY_1551_DATA 0x00200000 +#define DDRSS_PHY_1552_DATA 0x00000000 +#define DDRSS_PHY_1553_DATA 0x00000000 +#define DDRSS_PHY_1554_DATA 0x00000000 +#define DDRSS_PHY_1555_DATA 0x00000000 +#define DDRSS_PHY_1556_DATA 0x00000000 +#define DDRSS_PHY_1557_DATA 0x0000002A +#define DDRSS_PHY_1558_DATA 0x00000015 +#define DDRSS_PHY_1559_DATA 0x00000015 +#define DDRSS_PHY_1560_DATA 0x0000002A +#define DDRSS_PHY_1561_DATA 0x00000033 +#define DDRSS_PHY_1562_DATA 0x0000000C +#define DDRSS_PHY_1563_DATA 0x0000000C +#define DDRSS_PHY_1564_DATA 0x00000033 +#define DDRSS_PHY_1565_DATA 0x0A418820 +#define DDRSS_PHY_1566_DATA 0x10000000 +#define DDRSS_PHY_1567_DATA 0x000F0000 +#define DDRSS_PHY_1568_DATA 0x20202003 +#define DDRSS_PHY_1569_DATA 0x00202020 +#define DDRSS_PHY_1570_DATA 0x20008008 +#define DDRSS_PHY_1571_DATA 0x00000810 +#define DDRSS_PHY_1572_DATA 0x00000F00 +#define DDRSS_PHY_1573_DATA 0x000405CC +#define DDRSS_PHY_1574_DATA 0x03000004 +#define DDRSS_PHY_1575_DATA 0x00030000 +#define DDRSS_PHY_1576_DATA 0x00000300 +#define DDRSS_PHY_1577_DATA 0x00000300 +#define DDRSS_PHY_1578_DATA 0x00000300 +#define DDRSS_PHY_1579_DATA 0x00000300 +#define DDRSS_PHY_1580_DATA 0x42080010 +#define DDRSS_PHY_1581_DATA 0x0000803E +#define DDRSS_PHY_1582_DATA 0x00000001 +#define DDRSS_PHY_1583_DATA 0x01000002 +#define DDRSS_PHY_1584_DATA 0x00008000 +#define DDRSS_PHY_1585_DATA 0x00000000 +#define DDRSS_PHY_1586_DATA 0x00000000 +#define DDRSS_PHY_1587_DATA 0x00000000 +#define DDRSS_PHY_1588_DATA 0x00000000 +#define DDRSS_PHY_1589_DATA 0x00000000 +#define DDRSS_PHY_1590_DATA 0x00000000 +#define DDRSS_PHY_1591_DATA 0x00000000 +#define DDRSS_PHY_1592_DATA 0x00000000 +#define DDRSS_PHY_1593_DATA 0x00000000 +#define DDRSS_PHY_1594_DATA 0x00000000 +#define DDRSS_PHY_1595_DATA 0x00000000 +#define DDRSS_PHY_1596_DATA 0x00000000 +#define DDRSS_PHY_1597_DATA 0x00000000 +#define DDRSS_PHY_1598_DATA 0x00000000 +#define DDRSS_PHY_1599_DATA 0x00000000 +#define DDRSS_PHY_1600_DATA 0x00000000 +#define DDRSS_PHY_1601_DATA 0x00000000 +#define DDRSS_PHY_1602_DATA 0x00000000 +#define DDRSS_PHY_1603_DATA 0x00000000 +#define DDRSS_PHY_1604_DATA 0x00000000 +#define DDRSS_PHY_1605_DATA 0x00000000 +#define DDRSS_PHY_1606_DATA 0x00000000 +#define DDRSS_PHY_1607_DATA 0x00000000 +#define DDRSS_PHY_1608_DATA 0x00000000 +#define DDRSS_PHY_1609_DATA 0x00000000 +#define DDRSS_PHY_1610_DATA 0x00000000 +#define DDRSS_PHY_1611_DATA 0x00000000 +#define DDRSS_PHY_1612_DATA 0x00000000 +#define DDRSS_PHY_1613_DATA 0x00000000 +#define DDRSS_PHY_1614_DATA 0x00000000 +#define DDRSS_PHY_1615_DATA 0x00000000 +#define DDRSS_PHY_1616_DATA 0x00000000 +#define DDRSS_PHY_1617_DATA 0x00000000 +#define DDRSS_PHY_1618_DATA 0x00000000 +#define DDRSS_PHY_1619_DATA 0x00000000 +#define DDRSS_PHY_1620_DATA 0x00000000 +#define DDRSS_PHY_1621_DATA 0x00000000 +#define DDRSS_PHY_1622_DATA 0x00000000 +#define DDRSS_PHY_1623_DATA 0x00000000 +#define DDRSS_PHY_1624_DATA 0x00000000 +#define DDRSS_PHY_1625_DATA 0x00000000 +#define DDRSS_PHY_1626_DATA 0x00000000 +#define DDRSS_PHY_1627_DATA 0x00000000 +#define DDRSS_PHY_1628_DATA 0x00000000 +#define DDRSS_PHY_1629_DATA 0x00000000 +#define DDRSS_PHY_1630_DATA 0x00000000 +#define DDRSS_PHY_1631_DATA 0x00000000 +#define DDRSS_PHY_1632_DATA 0x00000000 +#define DDRSS_PHY_1633_DATA 0x00000000 +#define DDRSS_PHY_1634_DATA 0x00000000 +#define DDRSS_PHY_1635_DATA 0x00000000 +#define DDRSS_PHY_1636_DATA 0x00000000 +#define DDRSS_PHY_1637_DATA 0x00000000 +#define DDRSS_PHY_1638_DATA 0x00000000 +#define DDRSS_PHY_1639_DATA 0x00000000 +#define DDRSS_PHY_1640_DATA 0x00000000 +#define DDRSS_PHY_1641_DATA 0x00000000 +#define DDRSS_PHY_1642_DATA 0x00000000 +#define DDRSS_PHY_1643_DATA 0x00000000 +#define DDRSS_PHY_1644_DATA 0x00000000 +#define DDRSS_PHY_1645_DATA 0x00000000 +#define DDRSS_PHY_1646_DATA 0x00000000 +#define DDRSS_PHY_1647_DATA 0x00000000 +#define DDRSS_PHY_1648_DATA 0x00000000 +#define DDRSS_PHY_1649_DATA 0x00000000 +#define DDRSS_PHY_1650_DATA 0x00000000 +#define DDRSS_PHY_1651_DATA 0x00000000 +#define DDRSS_PHY_1652_DATA 0x00000000 +#define DDRSS_PHY_1653_DATA 0x00000000 +#define DDRSS_PHY_1654_DATA 0x00000000 +#define DDRSS_PHY_1655_DATA 0x00000000 +#define DDRSS_PHY_1656_DATA 0x00000000 +#define DDRSS_PHY_1657_DATA 0x00000000 +#define DDRSS_PHY_1658_DATA 0x00000000 +#define DDRSS_PHY_1659_DATA 0x00000000 +#define DDRSS_PHY_1660_DATA 0x00000000 +#define DDRSS_PHY_1661_DATA 0x00000000 +#define DDRSS_PHY_1662_DATA 0x00000000 +#define DDRSS_PHY_1663_DATA 0x00000000 +#define DDRSS_PHY_1664_DATA 0x00000000 +#define DDRSS_PHY_1665_DATA 0x00000000 +#define DDRSS_PHY_1666_DATA 0x00000000 +#define DDRSS_PHY_1667_DATA 0x00000000 +#define DDRSS_PHY_1668_DATA 0x00000000 +#define DDRSS_PHY_1669_DATA 0x00000000 +#define DDRSS_PHY_1670_DATA 0x00000000 +#define DDRSS_PHY_1671_DATA 0x00000000 +#define DDRSS_PHY_1672_DATA 0x00000000 +#define DDRSS_PHY_1673_DATA 0x00000000 +#define DDRSS_PHY_1674_DATA 0x00000000 +#define DDRSS_PHY_1675_DATA 0x00000000 +#define DDRSS_PHY_1676_DATA 0x00000000 +#define DDRSS_PHY_1677_DATA 0x00000000 +#define DDRSS_PHY_1678_DATA 0x00000000 +#define DDRSS_PHY_1679_DATA 0x00000000 +#define DDRSS_PHY_1680_DATA 0x00000000 +#define DDRSS_PHY_1681_DATA 0x00000000 +#define DDRSS_PHY_1682_DATA 0x00000000 +#define DDRSS_PHY_1683_DATA 0x00000000 +#define DDRSS_PHY_1684_DATA 0x00000000 +#define DDRSS_PHY_1685_DATA 0x00000000 +#define DDRSS_PHY_1686_DATA 0x00000000 +#define DDRSS_PHY_1687_DATA 0x00000000 +#define DDRSS_PHY_1688_DATA 0x00000000 +#define DDRSS_PHY_1689_DATA 0x00000000 +#define DDRSS_PHY_1690_DATA 0x00000000 +#define DDRSS_PHY_1691_DATA 0x00000000 +#define DDRSS_PHY_1692_DATA 0x00000000 +#define DDRSS_PHY_1693_DATA 0x00000000 +#define DDRSS_PHY_1694_DATA 0x00000000 +#define DDRSS_PHY_1695_DATA 0x00000000 +#define DDRSS_PHY_1696_DATA 0x00000000 +#define DDRSS_PHY_1697_DATA 0x00000000 +#define DDRSS_PHY_1698_DATA 0x00000000 +#define DDRSS_PHY_1699_DATA 0x00000000 +#define DDRSS_PHY_1700_DATA 0x00000000 +#define DDRSS_PHY_1701_DATA 0x00000000 +#define DDRSS_PHY_1702_DATA 0x00000000 +#define DDRSS_PHY_1703_DATA 0x00000000 +#define DDRSS_PHY_1704_DATA 0x00000000 +#define DDRSS_PHY_1705_DATA 0x00000000 +#define DDRSS_PHY_1706_DATA 0x00000000 +#define DDRSS_PHY_1707_DATA 0x00000000 +#define DDRSS_PHY_1708_DATA 0x00000000 +#define DDRSS_PHY_1709_DATA 0x00000000 +#define DDRSS_PHY_1710_DATA 0x00000000 +#define DDRSS_PHY_1711_DATA 0x00000000 +#define DDRSS_PHY_1712_DATA 0x00000000 +#define DDRSS_PHY_1713_DATA 0x00000000 +#define DDRSS_PHY_1714_DATA 0x00000000 +#define DDRSS_PHY_1715_DATA 0x00000000 +#define DDRSS_PHY_1716_DATA 0x00000000 +#define DDRSS_PHY_1717_DATA 0x00000000 +#define DDRSS_PHY_1718_DATA 0x00000000 +#define DDRSS_PHY_1719_DATA 0x00000000 +#define DDRSS_PHY_1720_DATA 0x00000000 +#define DDRSS_PHY_1721_DATA 0x00000000 +#define DDRSS_PHY_1722_DATA 0x00000000 +#define DDRSS_PHY_1723_DATA 0x00000000 +#define DDRSS_PHY_1724_DATA 0x00000000 +#define DDRSS_PHY_1725_DATA 0x00000000 +#define DDRSS_PHY_1726_DATA 0x00000000 +#define DDRSS_PHY_1727_DATA 0x00000000 +#define DDRSS_PHY_1728_DATA 0x00000000 +#define DDRSS_PHY_1729_DATA 0x00000000 +#define DDRSS_PHY_1730_DATA 0x00000000 +#define DDRSS_PHY_1731_DATA 0x00000000 +#define DDRSS_PHY_1732_DATA 0x00000000 +#define DDRSS_PHY_1733_DATA 0x00000000 +#define DDRSS_PHY_1734_DATA 0x00000000 +#define DDRSS_PHY_1735_DATA 0x00000000 +#define DDRSS_PHY_1736_DATA 0x00000000 +#define DDRSS_PHY_1737_DATA 0x00000000 +#define DDRSS_PHY_1738_DATA 0x00000000 +#define DDRSS_PHY_1739_DATA 0x00000000 +#define DDRSS_PHY_1740_DATA 0x00000000 +#define DDRSS_PHY_1741_DATA 0x00000000 +#define DDRSS_PHY_1742_DATA 0x00000000 +#define DDRSS_PHY_1743_DATA 0x00000000 +#define DDRSS_PHY_1744_DATA 0x00000000 +#define DDRSS_PHY_1745_DATA 0x00000000 +#define DDRSS_PHY_1746_DATA 0x00000000 +#define DDRSS_PHY_1747_DATA 0x00000000 +#define DDRSS_PHY_1748_DATA 0x00000000 +#define DDRSS_PHY_1749_DATA 0x00000000 +#define DDRSS_PHY_1750_DATA 0x00000000 +#define DDRSS_PHY_1751_DATA 0x00000000 +#define DDRSS_PHY_1752_DATA 0x00000000 +#define DDRSS_PHY_1753_DATA 0x00000000 +#define DDRSS_PHY_1754_DATA 0x00000000 +#define DDRSS_PHY_1755_DATA 0x00000000 +#define DDRSS_PHY_1756_DATA 0x00000000 +#define DDRSS_PHY_1757_DATA 0x00000000 +#define DDRSS_PHY_1758_DATA 0x00000000 +#define DDRSS_PHY_1759_DATA 0x00000000 +#define DDRSS_PHY_1760_DATA 0x00000000 +#define DDRSS_PHY_1761_DATA 0x00000000 +#define DDRSS_PHY_1762_DATA 0x00000000 +#define DDRSS_PHY_1763_DATA 0x00000000 +#define DDRSS_PHY_1764_DATA 0x00000000 +#define DDRSS_PHY_1765_DATA 0x00000000 +#define DDRSS_PHY_1766_DATA 0x00000000 +#define DDRSS_PHY_1767_DATA 0x00000000 +#define DDRSS_PHY_1768_DATA 0x00000000 +#define DDRSS_PHY_1769_DATA 0x00000000 +#define DDRSS_PHY_1770_DATA 0x00000000 +#define DDRSS_PHY_1771_DATA 0x00000000 +#define DDRSS_PHY_1772_DATA 0x00000000 +#define DDRSS_PHY_1773_DATA 0x00000000 +#define DDRSS_PHY_1774_DATA 0x00000000 +#define DDRSS_PHY_1775_DATA 0x00000000 +#define DDRSS_PHY_1776_DATA 0x00000000 +#define DDRSS_PHY_1777_DATA 0x00000000 +#define DDRSS_PHY_1778_DATA 0x00000000 +#define DDRSS_PHY_1779_DATA 0x00000000 +#define DDRSS_PHY_1780_DATA 0x00000000 +#define DDRSS_PHY_1781_DATA 0x00000000 +#define DDRSS_PHY_1782_DATA 0x00000000 +#define DDRSS_PHY_1783_DATA 0x00000000 +#define DDRSS_PHY_1784_DATA 0x00000000 +#define DDRSS_PHY_1785_DATA 0x00000000 +#define DDRSS_PHY_1786_DATA 0x00000000 +#define DDRSS_PHY_1787_DATA 0x00000000 +#define DDRSS_PHY_1788_DATA 0x00000000 +#define DDRSS_PHY_1789_DATA 0x00000000 +#define DDRSS_PHY_1790_DATA 0x00000000 +#define DDRSS_PHY_1791_DATA 0x00000000 +#define DDRSS_PHY_1792_DATA 0x00000000 +#define DDRSS_PHY_1793_DATA 0x00010100 +#define DDRSS_PHY_1794_DATA 0x00000000 +#define DDRSS_PHY_1795_DATA 0x00000000 +#define DDRSS_PHY_1796_DATA 0x00000000 +#define DDRSS_PHY_1797_DATA 0x00000000 +#define DDRSS_PHY_1798_DATA 0x00050000 +#define DDRSS_PHY_1799_DATA 0x04000000 +#define DDRSS_PHY_1800_DATA 0x00000055 +#define DDRSS_PHY_1801_DATA 0x00000000 +#define DDRSS_PHY_1802_DATA 0x00000000 +#define DDRSS_PHY_1803_DATA 0x00000000 +#define DDRSS_PHY_1804_DATA 0x00000000 +#define DDRSS_PHY_1805_DATA 0x00002001 +#define DDRSS_PHY_1806_DATA 0x00004003 +#define DDRSS_PHY_1807_DATA 0x50020028 +#define DDRSS_PHY_1808_DATA 0x01010000 +#define DDRSS_PHY_1809_DATA 0x80080001 +#define DDRSS_PHY_1810_DATA 0x10200000 +#define DDRSS_PHY_1811_DATA 0x00000008 +#define DDRSS_PHY_1812_DATA 0x00000000 +#define DDRSS_PHY_1813_DATA 0x06000000 +#define DDRSS_PHY_1814_DATA 0x010F0F0E +#define DDRSS_PHY_1815_DATA 0x00040101 +#define DDRSS_PHY_1816_DATA 0x0000010F +#define DDRSS_PHY_1817_DATA 0x00000000 +#define DDRSS_PHY_1818_DATA 0x00000064 +#define DDRSS_PHY_1819_DATA 0x00000000 +#define DDRSS_PHY_1820_DATA 0x00000000 +#define DDRSS_PHY_1821_DATA 0x0F0F0F0F +#define DDRSS_PHY_1822_DATA 0x0F0F0F0F +#define DDRSS_PHY_1823_DATA 0x0F0F0F0F +#define DDRSS_PHY_1824_DATA 0x02010804 +#define DDRSS_PHY_1825_DATA 0x00800120 +#define DDRSS_PHY_1826_DATA 0x00041B42 +#define DDRSS_PHY_1827_DATA 0x00004201 +#define DDRSS_PHY_1828_DATA 0x00000000 +#define DDRSS_PHY_1829_DATA 0x00000000 +#define DDRSS_PHY_1830_DATA 0x00000000 +#define DDRSS_PHY_1831_DATA 0x00000000 +#define DDRSS_PHY_1832_DATA 0x00000000 +#define DDRSS_PHY_1833_DATA 0x00000000 +#define DDRSS_PHY_1834_DATA 0x03010100 +#define DDRSS_PHY_1835_DATA 0x00540007 +#define DDRSS_PHY_1836_DATA 0x000040A2 +#define DDRSS_PHY_1837_DATA 0x00024410 +#define DDRSS_PHY_1838_DATA 0x00004410 +#define DDRSS_PHY_1839_DATA 0x00004410 +#define DDRSS_PHY_1840_DATA 0x00004410 +#define DDRSS_PHY_1841_DATA 0x00004410 +#define DDRSS_PHY_1842_DATA 0x00004410 +#define DDRSS_PHY_1843_DATA 0x00004410 +#define DDRSS_PHY_1844_DATA 0x00004410 +#define DDRSS_PHY_1845_DATA 0x00004410 +#define DDRSS_PHY_1846_DATA 0x00004410 +#define DDRSS_PHY_1847_DATA 0x00000000 +#define DDRSS_PHY_1848_DATA 0x00000076 +#define DDRSS_PHY_1849_DATA 0x00000400 +#define DDRSS_PHY_1850_DATA 0x00000008 +#define DDRSS_PHY_1851_DATA 0x00000000 +#define DDRSS_PHY_1852_DATA 0x00000000 +#define DDRSS_PHY_1853_DATA 0x00000000 +#define DDRSS_PHY_1854_DATA 0x00000000 +#define DDRSS_PHY_1855_DATA 0x00000000 +#define DDRSS_PHY_1856_DATA 0x03000000 +#define DDRSS_PHY_1857_DATA 0x00000000 +#define DDRSS_PHY_1858_DATA 0x00000000 +#define DDRSS_PHY_1859_DATA 0x00000000 +#define DDRSS_PHY_1860_DATA 0x04102006 +#define DDRSS_PHY_1861_DATA 0x00041020 +#define DDRSS_PHY_1862_DATA 0x01C98C98 +#define DDRSS_PHY_1863_DATA 0x3F400000 +#define DDRSS_PHY_1864_DATA 0x3F3F1F3F +#define DDRSS_PHY_1865_DATA 0x0000001F +#define DDRSS_PHY_1866_DATA 0x00000000 +#define DDRSS_PHY_1867_DATA 0x00000000 +#define DDRSS_PHY_1868_DATA 0x00000000 +#define DDRSS_PHY_1869_DATA 0x00000001 +#define DDRSS_PHY_1870_DATA 0x00000000 +#define DDRSS_PHY_1871_DATA 0x00000000 +#define DDRSS_PHY_1872_DATA 0x00000000 +#define DDRSS_PHY_1873_DATA 0x00000000 +#define DDRSS_PHY_1874_DATA 0x76543210 +#define DDRSS_PHY_1875_DATA 0x06010198 +#define DDRSS_PHY_1876_DATA 0x00000000 +#define DDRSS_PHY_1877_DATA 0x00000000 +#define DDRSS_PHY_1878_DATA 0x00000000 +#define DDRSS_PHY_1879_DATA 0x00040700 +#define DDRSS_PHY_1880_DATA 0x00000000 +#define DDRSS_PHY_1881_DATA 0x00000000 +#define DDRSS_PHY_1882_DATA 0x00000000 +#define DDRSS_PHY_1883_DATA 0x00000000 +#define DDRSS_PHY_1884_DATA 0x00000000 +#define DDRSS_PHY_1885_DATA 0x00000002 +#define DDRSS_PHY_1886_DATA 0x00000000 +#define DDRSS_PHY_1887_DATA 0x00000000 +#define DDRSS_PHY_1888_DATA 0x0001F7C4 +#define DDRSS_PHY_1889_DATA 0x04000004 +#define DDRSS_PHY_1890_DATA 0x00000000 +#define DDRSS_PHY_1891_DATA 0x00001142 +#define DDRSS_PHY_1892_DATA 0x01020000 +#define DDRSS_PHY_1893_DATA 0x00000080 +#define DDRSS_PHY_1894_DATA 0x03900390 +#define DDRSS_PHY_1895_DATA 0x03900390 +#define DDRSS_PHY_1896_DATA 0x03900390 +#define DDRSS_PHY_1897_DATA 0x03900390 +#define DDRSS_PHY_1898_DATA 0x03000300 +#define DDRSS_PHY_1899_DATA 0x03000300 +#define DDRSS_PHY_1900_DATA 0x00000300 +#define DDRSS_PHY_1901_DATA 0x00000300 +#define DDRSS_PHY_1902_DATA 0x00000300 +#define DDRSS_PHY_1903_DATA 0x00000300 +#define DDRSS_PHY_1904_DATA 0x00000005 +#define DDRSS_PHY_1905_DATA 0x3183BF77 +#define DDRSS_PHY_1906_DATA 0x00000000 +#define DDRSS_PHY_1907_DATA 0x0C000DFF +#define DDRSS_PHY_1908_DATA 0x30000DFF +#define DDRSS_PHY_1909_DATA 0x3F0DFF11 +#define DDRSS_PHY_1910_DATA 0x00EF0000 +#define DDRSS_PHY_1911_DATA 0x780DFFCC +#define DDRSS_PHY_1912_DATA 0x00000C11 +#define DDRSS_PHY_1913_DATA 0x00018011 +#define DDRSS_PHY_1914_DATA 0x0089FF00 +#define DDRSS_PHY_1915_DATA 0x000C3F11 +#define DDRSS_PHY_1916_DATA 0x01990000 +#define DDRSS_PHY_1917_DATA 0x000C3F11 +#define DDRSS_PHY_1918_DATA 0x01990000 +#define DDRSS_PHY_1919_DATA 0x3F0DFF11 +#define DDRSS_PHY_1920_DATA 0x00EF0000 +#define DDRSS_PHY_1921_DATA 0x00018011 +#define DDRSS_PHY_1922_DATA 0x0089FF00 +#define DDRSS_PHY_1923_DATA 0x20040006 diff --git a/arch/arm/dts/k3-am67a-r5-beagley-ai.dts b/arch/arm/dts/k3-am67a-r5-beagley-ai.dts new file mode 100644 index 00000000000..664be358a97 --- /dev/null +++ b/arch/arm/dts/k3-am67a-r5-beagley-ai.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AM67A BeagleY-AI dts file for R5 SPL + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2024 Robert Nelson, BeagleBoard.org Foundation + */ + +#include "k3-am67a-beagley-ai.dts" +#include "k3-am67a-beagley-ai-u-boot.dtsi" + +#include "k3-am67a-beagley-ddr-lp4.dtsi" +#include "k3-am62a-ddr.dtsi" + +/ { + aliases { + remoteproc0 = &sysctrler; + remoteproc1 = &a53_0; + serial0 = &wkup_uart0; + serial2 = &main_uart0; + }; + + a53_0: a53@0 { + compatible = "ti,am654-rproc"; + reg = <0x00 0x00a90000 0x00 0x10>; + power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, + <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>, + <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>; + resets = <&k3_reset 135 0>; + clocks = <&k3_clks 61 0>; + assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>; + assigned-clock-parents = <&k3_clks 61 2>; + assigned-clock-rates = <200000000>, <1200000000>; + ti,sci = <&dmsc>; + ti,sci-proc-id = <32>; + ti,sci-host-id = <10>; + bootph-all; + }; + + dm_tifs: dm-tifs { + compatible = "ti,j721e-dm-sci"; + ti,host-id = <36>; + ti,secure-host; + mbox-names = "rx", "tx"; + mboxes= <&secure_proxy_main 22>, + <&secure_proxy_main 23>; + bootph-all; + }; +}; + +&dmsc { + mboxes= <&secure_proxy_main 0>, + <&secure_proxy_main 1>, + <&secure_proxy_main 0>; + mbox-names = "rx", "tx", "notify"; + ti,host-id = <35>; + ti,secure-host; +}; + +&cbass_main { + sa3_secproxy: secproxy@44880000 { + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg = <0x00 0x44880000 0x00 0x20000>, + <0x00 0x44860000 0x00 0x20000>, + <0x00 0x43600000 0x00 0x10000>; + reg-names = "rt", "scfg", "target_data"; + bootph-all; + }; + + sysctrler: sysctrler { + compatible = "ti,am654-system-controller"; + mboxes= <&secure_proxy_main 1>, + <&secure_proxy_main 0>, + <&sa3_secproxy 0>; + mbox-names = "tx", "rx", "boot_notify"; + bootph-all; + }; +}; + +/* WKUP UART0 is used for DM firmware logs */ +&wkup_uart0 { + status = "okay"; +}; diff --git a/arch/arm/mach-k3/j722s/Kconfig b/arch/arm/mach-k3/j722s/Kconfig index 39d38ea5cf5..fe76d77e58a 100644 --- a/arch/arm/mach-k3/j722s/Kconfig +++ b/arch/arm/mach-k3/j722s/Kconfig @@ -26,8 +26,26 @@ config TARGET_J722S_R5_EVM select BINMAN imply SYS_K3_SPL_ATF +config TARGET_J722S_A53_BEAGLEY_AI + bool "BeagleBoard.org BeagleY-AI running on A53" + select ARM64 + select BINMAN + select OF_SYSTEM_SETUP + +config TARGET_J722S_R5_BEAGLEY_AI + bool "BeagleBoard.org BeagleY-AI running on R5" + select CPU_V7R + select SYS_THUMB_BUILD + select K3_LOAD_SYSFW + select RAM + select SPL_RAM + select K3_DDRSS + select BINMAN + imply SYS_K3_SPL_ATF + endchoice source "board/ti/j722s/Kconfig" +source "board/beagle/beagley-ai/Kconfig" endif diff --git a/board/beagle/beagley-ai/Kconfig b/board/beagle/beagley-ai/Kconfig new file mode 100644 index 00000000000..bf953982151 --- /dev/null +++ b/board/beagle/beagley-ai/Kconfig @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ +# + +if TARGET_J722S_R5_BEAGLEY_AI || TARGET_J722S_A53_BEAGLEY_AI + +config SYS_BOARD + default "beagley-ai" + +config SYS_VENDOR + default "beagle" + +config SYS_CONFIG_NAME + default "beagley_ai" + +source "board/ti/common/Kconfig" + +endif + +if TARGET_J722S_R5_BEAGLEY_AI + +config SPL_LDSCRIPT + default "arch/arm/mach-omap2/u-boot-spl.lds" + +endif diff --git a/board/beagle/beagley-ai/MAINTAINERS b/board/beagle/beagley-ai/MAINTAINERS new file mode 100644 index 00000000000..1623329b714 --- /dev/null +++ b/board/beagle/beagley-ai/MAINTAINERS @@ -0,0 +1,8 @@ +BEAGLEY-AI BOARD +M: Robert Nelson +M: Tom Rini +S: Maintained +F: board/beagle/beagley-ai/ +F: include/configs/beagley_ai.h +F: configs/am67a_beagley_ai_r5_defconfig +F: configs/am67a_beagley_ai_a53_defconfig diff --git a/board/beagle/beagley-ai/Makefile b/board/beagle/beagley-ai/Makefile new file mode 100644 index 00000000000..08593548e58 --- /dev/null +++ b/board/beagle/beagley-ai/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += beagley-ai.o diff --git a/board/beagle/beagley-ai/beagley-ai.c b/board/beagle/beagley-ai/beagley-ai.c new file mode 100644 index 00000000000..9786f628f6d --- /dev/null +++ b/board/beagle/beagley-ai/beagley-ai.c @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * https://www.beagleboard.org/boards/beagley-ai + * + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#include +#include +#include +#include +#include +#include +#include + +#if IS_ENABLED(CONFIG_SET_DFU_ALT_INFO) +void set_dfu_alt_info(char *interface, char *devstr) +{ + if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)) + env_set("dfu_alt_info", update_info.dfu_string); +} +#endif + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} + +#if defined(CONFIG_XPL_BUILD) +void spl_perform_fixups(struct spl_image_info *spl_image) +{ + if (IS_ENABLED(CONFIG_K3_DDRSS)) { + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) + fixup_ddr_driver_for_ecc(spl_image); + } else { + fixup_memory_node(spl_image); + } +} +#endif + +#if IS_ENABLED(CONFIG_BOARD_LATE_INIT) +int board_late_init(void) +{ + char fdtfile[50]; + + snprintf(fdtfile, sizeof(fdtfile), "%s.dtb", CONFIG_DEFAULT_DEVICE_TREE); + + env_set("fdtfile", fdtfile); + + return 0; +} +#endif diff --git a/board/beagle/beagley-ai/beagley-ai.env b/board/beagle/beagley-ai/beagley-ai.env new file mode 100644 index 00000000000..10d62034e1a --- /dev/null +++ b/board/beagle/beagley-ai/beagley-ai.env @@ -0,0 +1,21 @@ +#include +#include + +#if CONFIG_CMD_REMOTEPROC +#include +#endif + +name_kern=Image +console=ttyS2,115200n8 +args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000 + ${mtdparts} +run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr} + +boot_targets=mmc1 mmc0 pxe dhcp +boot=mmc +mmcdev=1 +bootpart=1:2 +bootdir=/boot +rd_spec=- + +rproc_fw_binaries= 0 /lib/firmware/j722s-mcu-r5f0_0-fw 2 /lib/firmware/j722s-main-r5f0_0-fw 3 /lib/firmware/j722s-c71_0-fw 4 /lib/firmware/j722s-c71_1-fw diff --git a/board/beagle/beagley-ai/board-cfg.yaml b/board/beagle/beagley-ai/board-cfg.yaml new file mode 100644 index 00000000000..f9a4c438ca9 --- /dev/null +++ b/board/beagle/beagley-ai/board-cfg.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Board configuration for J722S +# + +--- + +board-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + control: + subhdr: + magic: 0xC1D3 + size: 7 + main_isolation_enable: 0x5A + main_isolation_hostid: 0x2 + secproxy: + subhdr: + magic: 0x1207 + size: 7 + scaling_factor: 0x1 + scaling_profile: 0x1 + disable_main_nav_secure_proxy: 0 + msmc: + subhdr: + magic: 0xA5C3 + size: 5 + msmc_cache_size: 0x0 + debug_cfg: + subhdr: + magic: 0x020C + size: 8 + trace_dst_enables: 0x00 + trace_src_enables: 0x00 diff --git a/board/beagle/beagley-ai/pm-cfg.yaml b/board/beagle/beagley-ai/pm-cfg.yaml new file mode 100644 index 00000000000..46b3ad20109 --- /dev/null +++ b/board/beagle/beagley-ai/pm-cfg.yaml @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Power management configuration for J722S +# + +--- + +pm-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 diff --git a/board/beagle/beagley-ai/rm-cfg.yaml b/board/beagle/beagley-ai/rm-cfg.yaml new file mode 100644 index 00000000000..e32beb84795 --- /dev/null +++ b/board/beagle/beagley-ai/rm-cfg.yaml @@ -0,0 +1,1137 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J722S +# + +--- + +rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 20 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 22 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 30 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 36 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 38 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + 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start_resource: 3072 + num_resource: 32 + type: 12826 + host_id: 128 + reserved: 0 + - + start_resource: 3584 + num_resource: 32 + type: 12827 + host_id: 128 + reserved: 0 + - + start_resource: 4096 + num_resource: 32 + type: 12828 + host_id: 128 + reserved: 0 diff --git a/board/beagle/beagley-ai/sec-cfg.yaml b/board/beagle/beagley-ai/sec-cfg.yaml new file mode 100644 index 00000000000..a41374b30c9 --- /dev/null +++ b/board/beagle/beagley-ai/sec-cfg.yaml @@ -0,0 +1,379 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Security management configuration for J722S +# + +--- + +sec-cfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + processor_acl_list: + subhdr: + magic: 0xF1EA + size: 164 + proc_acl_entries: + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + - + processor_id: 0 + proc_access_master: 0 + proc_access_secondary: [0, 0, 0] + host_hierarchy: + subhdr: + magic: 0x8D27 + size: 68 + host_hierarchy_entries: + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + - + host_id: 0 + supervisor_host_id: 0 + otp_config: + subhdr: + magic: 0x4081 + size: 69 + write_host_id: 0 + otp_entry: + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + - + host_id: 0 + host_perms: 0 + dkek_config: + subhdr: + magic: 0x5170 + size: 12 + allowed_hosts: [128, 0, 0, 0] + allow_dkek_export_tisci: 0x5A + rsvd: [0, 0, 0] + sa2ul_cfg: + subhdr: + magic: 0x23BE + size: 0 + auth_resource_owner: 0 + enable_saul_psil_global_config_writes: 0x5A + rsvd: [0, 0] + sec_dbg_config: + subhdr: + magic: 0x42AF + size: 16 + allow_jtag_unlock: 0x5A + allow_wildcard_unlock: 0x5A + allowed_debug_level_rsvd: 0 + rsvd: 0 + min_cert_rev: 0x0 + jtag_unlock_hosts: [0, 0, 0, 0] + sec_handover_cfg: + subhdr: + magic: 0x608F + size: 10 + handover_msg_sender: 0 + handover_to_host_id: 0 + rsvd: [0, 0, 0, 0] diff --git a/board/beagle/beagley-ai/tifs-rm-cfg.yaml b/board/beagle/beagley-ai/tifs-rm-cfg.yaml new file mode 100644 index 00000000000..4a2af0ebcaf --- /dev/null +++ b/board/beagle/beagley-ai/tifs-rm-cfg.yaml @@ -0,0 +1,993 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ +# +# Resource management configuration for J722S +# + +--- + +tifs-rm-cfg: + rm_boardcfg: + rev: + boardcfg_abi_maj: 0x0 + boardcfg_abi_min: 0x1 + host_cfg: + subhdr: + magic: 0x4C41 + size: 356 + host_cfg_entries: + - #1 + host_id: 12 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #2 + host_id: 20 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #3 + host_id: 22 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #4 + host_id: 30 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #5 + host_id: 36 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #6 + host_id: 38 + allowed_atype: 0x2A + allowed_qos: 0xAAAA + allowed_orderid: 0xAAAAAAAA + allowed_priority: 0xAAAA + allowed_sched_priority: 0xAA + - #7 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #8 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #9 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #10 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #11 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #12 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #13 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + allowed_orderid: 0 + allowed_priority: 0 + allowed_sched_priority: 0 + - #14 + host_id: 0 + allowed_atype: 0 + allowed_qos: 0 + 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4096 + num_resource: 32 + type: 12828 + host_id: 128 + reserved: 0 diff --git a/configs/am67a_beagley_ai_a53_defconfig b/configs/am67a_beagley_ai_a53_defconfig new file mode 100644 index 00000000000..b0903b6ae8f --- /dev/null +++ b/configs/am67a_beagley_ai_a53_defconfig @@ -0,0 +1,37 @@ +#include + +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_SOC_K3_J722S=y +CONFIG_TARGET_J722S_A53_BEAGLEY_AI=y + +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am67a-beagley-ai" +CONFIG_SPL_OF_LIST="ti/k3-am67a-beagley-ai" +CONFIG_OF_LIST="ti/k3-am67a-beagley-ai" + +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run distro_bootcmd" +CONFIG_EXT4_WRITE=y +CONFIG_LZO=y +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_DELAY_STR="d" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_TI_I2C_BOARD_DETECT=n +CONFIG_SPL_SPI=n +CONFIG_SPL_SPI_FLASH_SUPPORT=n +CONFIG_SPL_DM_SPI_FLASH=n +CONFIG_SPL_MTD_SUPPORT=n +CONFIG_SPL_MTD_SUPPORT=n +CONFIG_DM_SPI_FLASH=n +CONFIG_SPI_FLASH=n +CONFIG_MTD=n +CONFIG_MTD_PARTITIONS=n +CONFIG_DM_MTD=n +CONFIG_MTD_UBI=n +CONFIG_CMD_UBIFS=n +CONFIG_CMD_UBI=n +CONFIG_DFU_SF=n +CONFIG_DM_SPI=n +CONFIG_SPL_SPI_LOAD=n +CONFIG_SPL_MTD=n +CONFIG_CMD_SPI=n diff --git a/configs/am67a_beagley_ai_r5_defconfig b/configs/am67a_beagley_ai_r5_defconfig new file mode 100644 index 00000000000..5380747fe3c --- /dev/null +++ b/configs/am67a_beagley_ai_r5_defconfig @@ -0,0 +1,14 @@ +#include + +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_SOC_K3_J722S=y +CONFIG_TARGET_J722S_R5_BEAGLEY_AI=y + +CONFIG_DEFAULT_DEVICE_TREE="k3-am67a-r5-beagley-ai" +CONFIG_SPL_OF_LIST="k3-am67a-r5-beagley-ai" +CONFIG_OF_LIST="k3-am67a-r5-beagley-ai" + +CONFIG_TI_I2C_BOARD_DETECT=n +CONFIG_SPL_DM_SPI_FLASH=n +CONFIG_SPL_MTD_SUPPORT=n diff --git a/include/configs/beagley_ai.h b/include/configs/beagley_ai.h new file mode 100644 index 00000000000..a7072a094c5 --- /dev/null +++ b/include/configs/beagley_ai.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration header file for BeagleY-AI + * + * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ + */ + +#ifndef __CONFIG_BEAGLEY_AI_H +#define __CONFIG_BEAGLEY_AI_H + +/* Now for the remaining common defines */ +#include + +#endif /* __CONFIG_BEAGLEY_AI_H */ -- cgit v1.3.1 From 7193c252db3578766a3d7fb4019a27fb16b418f8 Mon Sep 17 00:00:00 2001 From: Wadim Egorov Date: Wed, 5 Mar 2025 05:58:27 +0100 Subject: include: configs: phycore-am62ax: Define capsule FW names Define firmware names for phycore-am62ax capsules. Signed-off-by: Wadim Egorov --- include/configs/phycore_am62ax.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/configs/phycore_am62ax.h b/include/configs/phycore_am62ax.h index 661ba8f73ca..4f612d2c2ce 100644 --- a/include/configs/phycore_am62ax.h +++ b/include/configs/phycore_am62ax.h @@ -12,4 +12,8 @@ /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE 0x80000000 +#define PHYCORE_AM6XX_FW_NAME_TIBOOT3 u"PHYCORE_AM62AX_TIBOOT3" +#define PHYCORE_AM6XX_FW_NAME_SPL u"PHYCORE_AM62AX_SPL" +#define PHYCORE_AM6XX_FW_NAME_UBOOT u"PHYCORE_AM62AX_UBOOT" + #endif /* __PHYCORE_AM62AX_H */ -- cgit v1.3.1 From 7719682164ee3d8a21e3b5d62d8eb28f0acbd45d Mon Sep 17 00:00:00 2001 From: Wadim Egorov Date: Wed, 5 Mar 2025 05:58:31 +0100 Subject: board: phytec: phycore_am62x: Use custom k3_dfu.env fragment TI's k3_dfu.env includes redundant dfu_alt_info_* data, some of which is incompatible with our board configuration. Replace it with a custom variant that better aligns with our setup, ensuring correct offsets and eliminating unnecessary entries. Signed-off-by: Wadim Egorov --- board/phytec/phycore_am62x/phycore_am62x.env | 2 +- include/env/phytec/k3_dfu.env | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) create mode 100644 include/env/phytec/k3_dfu.env (limited to 'include') diff --git a/board/phytec/phycore_am62x/phycore_am62x.env b/board/phytec/phycore_am62x/phycore_am62x.env index 711ca3040c4..a0eacd1dfc3 100644 --- a/board/phytec/phycore_am62x/phycore_am62x.env +++ b/board/phytec/phycore_am62x/phycore_am62x.env @@ -1,4 +1,4 @@ -#include +#include #include #include #include diff --git a/include/env/phytec/k3_dfu.env b/include/env/phytec/k3_dfu.env new file mode 100644 index 00000000000..0cba87da99d --- /dev/null +++ b/include/env/phytec/k3_dfu.env @@ -0,0 +1,3 @@ +dfu_alt_info_ram= + tispl.bin ram 0x80080000 0x200000; + u-boot.img ram 0x81000000 0x400000 -- cgit v1.3.1 From 95641f4bf98d3c90bfc4ae94515c98c440ffb2e1 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:24:56 -0700 Subject: x86: Rename zboot_run() to zboot_run_args() Rename this function so we can (later) create a zboot_run() function which looks the same as bootm_run() Signed-off-by: Simon Glass --- arch/x86/lib/zimage.c | 4 ++-- boot/bootmeth_cros.c | 6 +++--- include/bootm.h | 6 +++--- 3 files changed, 8 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 2eece34a073..8d791416066 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -435,8 +435,8 @@ int zboot_go(void) return ret; } -int zboot_run(ulong addr, ulong size, ulong initrd, ulong initrd_size, - ulong base, char *cmdline) +int zboot_run_args(ulong addr, ulong size, ulong initrd, ulong initrd_size, + ulong base, char *cmdline) { int ret; diff --git a/boot/bootmeth_cros.c b/boot/bootmeth_cros.c index c7b862e512a..ea4c9ed830f 100644 --- a/boot/bootmeth_cros.c +++ b/boot/bootmeth_cros.c @@ -446,9 +446,9 @@ static int cros_boot(struct udevice *dev, struct bootflow *bflow) } if (IS_ENABLED(CONFIG_X86)) { - ret = zboot_run(map_to_sysmem(bflow->buf), bflow->size, 0, 0, - map_to_sysmem(bflow->x86_setup), - bflow->cmdline); + ret = zboot_run_args(map_to_sysmem(bflow->buf), bflow->size, 0, + 0, map_to_sysmem(bflow->x86_setup), + bflow->cmdline); } else { ret = bootm_boot_start(map_to_sysmem(bflow->buf), bflow->cmdline); diff --git a/include/bootm.h b/include/bootm.h index 61160705215..154fb98cfcd 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -273,7 +273,7 @@ int bootm_process_cmdline(char *buf, int maxlen, int flags); int bootm_process_cmdline_env(int flags); /** - * zboot_run() - Run through the various steps to boot a zimage + * zboot_run_args() - Run through the various steps to boot a zimage * * Boot a zimage, given the component parts * @@ -289,8 +289,8 @@ int bootm_process_cmdline_env(int flags); * to use for booting * Return: -EFAULT on error (normally it does not return) */ -int zboot_run(ulong addr, ulong size, ulong initrd, ulong initrd_size, - ulong base, char *cmdline); +int zboot_run_args(ulong addr, ulong size, ulong initrd, ulong initrd_size, + ulong base, char *cmdline); /* * zimage_get_kernel_version() - Get the version string from a kernel -- cgit v1.3.1 From 75e85df7963f57e4bb80b3d805ba2295b1843911 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:24:58 -0700 Subject: x86: Move x86 zboot state into struct bootm_info This structure is supposed to handle any type of booting programmatically, i.e. without needing a command to be executed. Move the x86-specific members into it and use it instead of struct zboot_state. Provide a macro so access is possible without adding lots of #ifdefs to the code. This will allow the struct to be used for all four types of booting (bootm, bootz, booti and zboot). Call bootm_init() to init the state, to match other boot methods. Note that some rationalisation could be performed on this. But this is tricky since addresses are stored as strings in several places. Also some strings combine multiple arguments into one. So to keep this task somewhat manageable, we content ourselves with just getting everything into the same struct Signed-off-by: Simon Glass --- arch/x86/include/asm/zimage.h | 29 +---------------------------- arch/x86/lib/zimage.c | 4 ++-- include/bootm.h | 33 +++++++++++++++++++++++++++++++++ 3 files changed, 36 insertions(+), 30 deletions(-) (limited to 'include') diff --git a/arch/x86/include/asm/zimage.h b/arch/x86/include/asm/zimage.h index 76b2a797ccf..13a08850dfb 100644 --- a/arch/x86/include/asm/zimage.h +++ b/arch/x86/include/asm/zimage.h @@ -42,34 +42,7 @@ enum { ZBOOT_STATE_COUNT = 5, }; -/** - * struct zboot_state - Current state of the boot - * - * @bzimage_addr: Address of the bzImage to boot, or 0 if the image has already - * been loaded and does not exist (as a cohesive whole) in memory - * @bzimage_size: Size of the bzImage, or 0 to detect this - * @initrd_addr: Address of the initial ramdisk, or 0 if none - * @initrd_size: Size of the initial ramdisk, or 0 if none - * @load_address: Address where the bzImage is moved before booting, either - * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR - * This is set up when loading the zimage - * @base_ptr: Pointer to the boot parameters, typically at address - * DEFAULT_SETUP_BASE - * This is set up when loading the zimage - * @cmdline: Environment variable containing the 'override' command line, or - * NULL to use the one in the setup block - */ -struct zboot_state { - ulong bzimage_addr; - ulong bzimage_size; - ulong initrd_addr; - ulong initrd_size; - ulong load_address; - struct boot_params *base_ptr; - const char *cmdline; -}; - -extern struct zboot_state state; +extern struct bootm_info state; /** * zboot_load() - Load a zimage diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 8d791416066..1dbebfe8afd 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -56,7 +56,7 @@ DECLARE_GLOBAL_DATA_PTR; #define COMMAND_LINE_SIZE 2048 /* Current state of the boot */ -struct zboot_state state; +struct bootm_info state; static void build_command_line(char *command_line, int auto_boot) { @@ -642,7 +642,7 @@ void zimage_dump(struct boot_params *base_ptr, bool show_cmdline) void zboot_start(ulong bzimage_addr, ulong bzimage_size, ulong initrd_addr, ulong initrd_size, ulong base_addr, const char *cmdline) { - memset(&state, '\0', sizeof(state)); + bootm_init(&state); state.bzimage_size = bzimage_size; state.initrd_addr = initrd_addr; diff --git a/include/bootm.h b/include/bootm.h index 154fb98cfcd..5fa9761629e 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -44,6 +44,21 @@ struct cmd_tbl; * @argc: Number of arguments to the command (excluding the actual command). * This is 0 if there are no arguments * @argv: NULL-terminated list of arguments, or NULL if there are no arguments + * + * For zboot: + * @bzimage_addr: Address of the bzImage to boot, or 0 if the image has already + * been loaded and does not exist (as a cohesive whole) in memory + * @bzimage_size: Size of the bzImage, or 0 to detect this + * @initrd_addr: Address of the initial ramdisk, or 0 if none + * @initrd_size: Size of the initial ramdisk, or 0 if none + * @load_address: Address where the bzImage is moved before booting, either + * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR + * This is set up when loading the zimage + * @base_ptr: Pointer to the boot parameters, typically at address + * DEFAULT_SETUP_BASE + * This is set up when loading the zimage + * @cmdline: Environment variable containing the 'override' command line, or + * NULL to use the one in the setup block */ struct bootm_info { const char *addr_img; @@ -54,8 +69,26 @@ struct bootm_info { const char *cmd_name; int argc; char *const *argv; + + /* zboot items */ +#ifdef CONFIG_X86 + ulong bzimage_addr; + ulong bzimage_size; + ulong initrd_addr; + ulong initrd_size; + ulong load_address; + struct boot_params *base_ptr; + const char *cmdline; +#endif }; +/* macro to allow setting fields in generic code */ +#ifdef CONFIG_X86 +#define bootm_x86_set(_bmi, _field, _val) (_bmi)->_field = (_val) +#else +#define bootm_x86_set(_bmi, _field, _val) +#endif + /** * bootm_init() - Set up a bootm_info struct with useful defaults * -- cgit v1.3.1 From 4e36b1739b03e81ff395959b58fe33e67c4d2233 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:00 -0700 Subject: x86: Move the bootm state for zimage into cmd/ Rather than holding the state in the implementation code, move it to the command code. The state is now passed to the implementation functions and can there (with future work) be pass in from bootstd, without going through the commands. Signed-off-by: Simon Glass --- arch/x86/include/asm/zimage.h | 22 +++++++------ arch/x86/lib/zimage.c | 75 +++++++++++++++++++++---------------------- cmd/bootflow.c | 5 ++- cmd/x86/zboot.c | 20 ++++++++---- include/bootm.h | 8 +++-- 5 files changed, 73 insertions(+), 57 deletions(-) (limited to 'include') diff --git a/arch/x86/include/asm/zimage.h b/arch/x86/include/asm/zimage.h index b592057e58b..4ed6d8d5cc2 100644 --- a/arch/x86/include/asm/zimage.h +++ b/arch/x86/include/asm/zimage.h @@ -10,6 +10,8 @@ #include #include +struct bootm_info; + /* linux i386 zImage/bzImage header. Offsets relative to * the start of the image */ @@ -42,8 +44,6 @@ enum { ZBOOT_STATE_COUNT = 5, }; -extern struct bootm_info bmi; - /** * zboot_load() - Load a zimage * @@ -51,21 +51,21 @@ extern struct bootm_info bmi; * * Return: 0 if OK, -ve on error */ -int zboot_load(void); +int zboot_load(struct bootm_info *bmi); /** * zboot_setup() - Set up the zboot image reeady for booting * * Return: 0 if OK, -ve on error */ -int zboot_setup(void); +int zboot_setup(struct bootm_info *bmi); /** * zboot_go() - Start the image * * Return: 0 if OK, -ve on error */ -int zboot_go(void); +int zboot_go(struct bootm_info *bmi); /** * load_zimage() - Load a zImage or bzImage @@ -104,6 +104,7 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, * * Record information about a zimage so it can be booted * + * @bmi: Bootm information * @bzimage_addr: Address of the bzImage to boot * @bzimage_size: Size of the bzImage, or 0 to detect this * @initrd_addr: Address of the initial ramdisk, or 0 if none @@ -114,14 +115,17 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, * @cmdline: Environment variable containing the 'override' command line, or * NULL to use the one in the setup block */ -void zboot_start(ulong bzimage_addr, ulong bzimage_size, ulong initrd_addr, - ulong initrd_size, ulong base_addr, const char *cmdline); +void zboot_start(struct bootm_info *bmi, ulong bzimage_addr, ulong bzimage_size, + ulong initrd_addr, ulong initrd_size, ulong base_addr, + const char *cmdline); /** * zboot_info() - Show simple info about a zimage * - * Shows wherer the kernel was loaded and also the setup base + * Shows where the kernel was loaded and also the setup base + * + * @bmi: Bootm information */ -void zboot_info(void); +void zboot_info(struct bootm_info *bmi); #endif diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 991d0c84006..7f4b117b403 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -55,9 +55,6 @@ DECLARE_GLOBAL_DATA_PTR; #define COMMAND_LINE_SIZE 2048 -/* Current state of the boot */ -struct bootm_info bmi; - static void build_command_line(char *command_line, int auto_boot) { char *env_command_line; @@ -366,13 +363,13 @@ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, return 0; } -int zboot_load(void) +int zboot_load(struct bootm_info *bmi) { struct boot_params *base_ptr; int ret; - if (bmi.base_ptr) { - struct boot_params *from = (struct boot_params *)bmi.base_ptr; + if (bmi->base_ptr) { + struct boot_params *from = (struct boot_params *)bmi->base_ptr; base_ptr = (struct boot_params *)DEFAULT_SETUP_BASE; log_debug("Building boot_params at 0x%8.8lx\n", @@ -380,41 +377,41 @@ int zboot_load(void) memset(base_ptr, '\0', sizeof(*base_ptr)); base_ptr->hdr = from->hdr; } else { - base_ptr = load_zimage((void *)bmi.bzimage_addr, bmi.bzimage_size, - &bmi.load_address); + base_ptr = load_zimage((void *)bmi->bzimage_addr, + bmi->bzimage_size, &bmi->load_address); if (!base_ptr) { puts("## Kernel loading failed ...\n"); return -EINVAL; } } - bmi.base_ptr = base_ptr; + bmi->base_ptr = base_ptr; - ret = env_set_hex("zbootbase", map_to_sysmem(bmi.base_ptr)); + ret = env_set_hex("zbootbase", map_to_sysmem(bmi->base_ptr)); if (!ret) - ret = env_set_hex("zbootaddr", bmi.load_address); + ret = env_set_hex("zbootaddr", bmi->load_address); if (ret) return ret; return 0; } -int zboot_setup(void) +int zboot_setup(struct bootm_info *bmi) { - struct boot_params *base_ptr = bmi.base_ptr; + struct boot_params *base_ptr = bmi->base_ptr; int ret; ret = setup_zimage(base_ptr, (char *)base_ptr + COMMAND_LINE_OFFSET, - 0, bmi.initrd_addr, bmi.initrd_size, - (ulong)bmi.cmdline); + 0, bmi->initrd_addr, bmi->initrd_size, + (ulong)bmi->cmdline); if (ret) return -EINVAL; return 0; } -int zboot_go(void) +int zboot_go(struct bootm_info *bmi) { - struct boot_params *params = bmi.base_ptr; + struct boot_params *params = bmi->base_ptr; struct setup_header *hdr = ¶ms->hdr; bool image_64bit; ulong entry; @@ -422,7 +419,7 @@ int zboot_go(void) disable_interrupts(); - entry = bmi.load_address; + entry = bmi->load_address; image_64bit = false; if (IS_ENABLED(CONFIG_X86_RUN_64BIT) && (hdr->xloadflags & XLF_KERNEL_64)) { @@ -430,7 +427,7 @@ int zboot_go(void) } /* we assume that the kernel is in place */ - ret = boot_linux_kernel((ulong)bmi.base_ptr, entry, image_64bit); + ret = boot_linux_kernel((ulong)bmi->base_ptr, entry, image_64bit); return ret; } @@ -438,16 +435,18 @@ int zboot_go(void) int zboot_run_args(ulong addr, ulong size, ulong initrd, ulong initrd_size, ulong base, char *cmdline) { + struct bootm_info bmi; int ret; - zboot_start(addr, size, initrd, initrd_size, base, cmdline); - ret = zboot_load(); + bootm_init(&bmi); + zboot_start(&bmi, addr, size, initrd, initrd_size, base, cmdline); + ret = zboot_load(&bmi); if (ret) return log_msg_ret("ld", ret); - ret = zboot_setup(); + ret = zboot_setup(&bmi); if (ret) return log_msg_ret("set", ret); - ret = zboot_go(); + ret = zboot_go(&bmi); if (ret) return log_msg_ret("go", ret); @@ -555,7 +554,8 @@ static void show_loader(struct setup_header *hdr) printf("\n"); } -void zimage_dump(struct boot_params *base_ptr, bool show_cmdline) +void zimage_dump(struct bootm_info *bmi, struct boot_params *base_ptr, + bool show_cmdline) { struct setup_header *hdr; const char *version; @@ -596,7 +596,7 @@ void zimage_dump(struct boot_params *base_ptr, bool show_cmdline) print_num("Start sys seg", hdr->start_sys_seg); print_num("Kernel version", hdr->kernel_version); version = zimage_get_kernel_version(base_ptr, - (void *)bmi.bzimage_addr); + (void *)bmi->bzimage_addr); if (version) printf(" @%p: %s\n", version, version); print_num("Type of loader", hdr->type_of_loader); @@ -639,25 +639,24 @@ void zimage_dump(struct boot_params *base_ptr, bool show_cmdline) print_num("Kernel info offset", hdr->kernel_info_offset); } -void zboot_start(ulong bzimage_addr, ulong bzimage_size, ulong initrd_addr, - ulong initrd_size, ulong base_addr, const char *cmdline) +void zboot_start(struct bootm_info *bmi, ulong bzimage_addr, ulong bzimage_size, + ulong initrd_addr, ulong initrd_size, ulong base_addr, + const char *cmdline) { - bootm_init(&bmi); - - bmi.bzimage_size = bzimage_size; - bmi.initrd_addr = initrd_addr; - bmi.initrd_size = initrd_size; + bmi->bzimage_size = bzimage_size; + bmi->initrd_addr = initrd_addr; + bmi->initrd_size = initrd_size; if (base_addr) { - bmi.base_ptr = map_sysmem(base_addr, 0); - bmi.load_address = bzimage_addr; + bmi->base_ptr = map_sysmem(base_addr, 0); + bmi->load_address = bzimage_addr; } else { - bmi.bzimage_addr = bzimage_addr; + bmi->bzimage_addr = bzimage_addr; } - bmi.cmdline = cmdline; + bmi->cmdline = cmdline; } -void zboot_info(void) +void zboot_info(struct bootm_info *bmi) { printf("Kernel loaded at %08lx, setup_base=%p\n", - bmi.load_address, bmi.base_ptr); + bmi->load_address, bmi->base_ptr); } diff --git a/cmd/bootflow.c b/cmd/bootflow.c index f88995a478f..72b06a42e4d 100644 --- a/cmd/bootflow.c +++ b/cmd/bootflow.c @@ -380,7 +380,10 @@ static int do_bootflow_info(struct cmd_tbl *cmdtp, int flag, int argc, bflow = std->cur_bootflow; if (IS_ENABLED(CONFIG_X86) && x86_setup) { - zimage_dump(bflow->x86_setup, false); + struct bootm_info bmi; + + bootm_init(&bmi); + zimage_dump(&bmi, bflow->x86_setup, false); return 0; } diff --git a/cmd/x86/zboot.c b/cmd/x86/zboot.c index 0d0a8e53172..029ff4eb9fd 100644 --- a/cmd/x86/zboot.c +++ b/cmd/x86/zboot.c @@ -13,6 +13,9 @@ #include #include +/* Current state of the boot */ +static struct bootm_info bmi; + static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -21,6 +24,8 @@ static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc, ulong base_addr; int i; + bootm_init(&bmi); + log_debug("argc %d:", argc); for (i = 0; i < argc; i++) log_debug(" %s", argv[i]); @@ -36,7 +41,7 @@ static int do_zboot_start(struct cmd_tbl *cmdtp, int flag, int argc, base_addr = argc > 5 ? hextoul(argv[5], NULL) : 0; cmdline = argc > 6 ? env_get(argv[6]) : NULL; - zboot_start(bzimage_addr, bzimage_size, initrd_addr, initrd_size, + zboot_start(&bmi, bzimage_addr, bzimage_size, initrd_addr, initrd_size, base_addr, cmdline); return 0; @@ -47,7 +52,7 @@ static int do_zboot_load(struct cmd_tbl *cmdtp, int flag, int argc, { int ret; - ret = zboot_load(); + ret = zboot_load(&bmi); if (ret) return ret; @@ -61,12 +66,13 @@ static int do_zboot_setup(struct cmd_tbl *cmdtp, int flag, int argc, printf("base is not set: use 'zboot load' first\n"); return CMD_RET_FAILURE; } - if (zboot_setup()) { + + if (zboot_setup(&bmi)) { puts("Setting up boot parameters failed ...\n"); return CMD_RET_FAILURE; } - if (zboot_setup()) + if (zboot_setup(&bmi)) return CMD_RET_FAILURE; return 0; @@ -75,7 +81,7 @@ static int do_zboot_setup(struct cmd_tbl *cmdtp, int flag, int argc, static int do_zboot_info(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - zboot_info(); + zboot_info(&bmi); return 0; } @@ -85,7 +91,7 @@ static int do_zboot_go(struct cmd_tbl *cmdtp, int flag, int argc, { int ret; - ret = zboot_go(); + ret = zboot_go(&bmi); if (ret) { printf("Kernel returned! (err=%d)\n", ret); return CMD_RET_FAILURE; @@ -105,7 +111,7 @@ static int do_zboot_dump(struct cmd_tbl *cmdtp, int flag, int argc, printf("No zboot setup_base\n"); return CMD_RET_FAILURE; } - zimage_dump(base_ptr, true); + zimage_dump(&bmi, base_ptr, true); return 0; } diff --git a/include/bootm.h b/include/bootm.h index 5fa9761629e..fe7f80b88a5 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -92,6 +92,8 @@ struct bootm_info { /** * bootm_init() - Set up a bootm_info struct with useful defaults * + * @bmi: Bootm information + * * Set up the struct with default values for all members: * @boot_progress is set to true and @images is set to the global images * variable. Everything else is set to NULL except @argc which is 0 @@ -107,7 +109,7 @@ void bootm_init(struct bootm_info *bmi); * - disabled interrupts. * * @flag: Flags indicating what to do (BOOTM_STATE_...) - * bmi: Bootm information + * @bmi: Bootm information * Return: 1 on error. On success the OS boots so this function does * not return. */ @@ -340,11 +342,13 @@ const char *zimage_get_kernel_version(struct boot_params *params, * * This shows all available information in a zimage that has been loaded. * + * @bmi: Bootm information * @base_ptr: Pointer to the boot parameters, typically at address * DEFAULT_SETUP_BASE * @show_cmdline: true to show the full command line */ -void zimage_dump(struct boot_params *base_ptr, bool show_cmdline); +void zimage_dump(struct bootm_info *bmi, struct boot_params *base_ptr, + bool show_cmdline); /* * bootm_boot_start() - Boot an image at the given address -- cgit v1.3.1 From c73da92304280b229e3d8dfd565fae5a24fe3ce8 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:02 -0700 Subject: x86: Drop the unnecessary base_ptr argument to zboot_dump() This value is include the bootm_info, so drop the unnecessary parameter. Signed-off-by: Simon Glass --- arch/x86/lib/zimage.c | 5 +++-- cmd/bootflow.c | 3 ++- cmd/x86/zboot.c | 8 +++----- include/bootm.h | 7 ++----- 4 files changed, 10 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index d71285e71d9..145ba0b8ea0 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -554,12 +554,13 @@ static void show_loader(struct setup_header *hdr) printf("\n"); } -void zimage_dump(struct bootm_info *bmi, struct boot_params *base_ptr, - bool show_cmdline) +void zimage_dump(struct bootm_info *bmi, bool show_cmdline) { + struct boot_params *base_ptr; struct setup_header *hdr; int i; + base_ptr = bmi->base_ptr; printf("Setup located at %p:\n\n", base_ptr); print_num64("ACPI RSDP addr", base_ptr->acpi_rsdp_addr); diff --git a/cmd/bootflow.c b/cmd/bootflow.c index da17fd93b8b..6d0be320bdb 100644 --- a/cmd/bootflow.c +++ b/cmd/bootflow.c @@ -385,7 +385,8 @@ static int do_bootflow_info(struct cmd_tbl *cmdtp, int flag, int argc, bootm_init(&bmi); /* we don't know this at present */ bootm_x86_set(&bmi, bzimage_addr, 0); - zimage_dump(&bmi, bflow->x86_setup, false); + bootm_x86_set(&bmi, base_ptr, bflow->x86_setup); + zimage_dump(&bmi, false); return 0; } diff --git a/cmd/x86/zboot.c b/cmd/x86/zboot.c index 029ff4eb9fd..ee099ca041b 100644 --- a/cmd/x86/zboot.c +++ b/cmd/x86/zboot.c @@ -103,15 +103,13 @@ static int do_zboot_go(struct cmd_tbl *cmdtp, int flag, int argc, static int do_zboot_dump(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - struct boot_params *base_ptr = bmi.base_ptr; - if (argc > 1) - base_ptr = (void *)hextoul(argv[1], NULL); - if (!base_ptr) { + bmi.base_ptr = (void *)hextoul(argv[1], NULL); + if (!bmi.base_ptr) { printf("No zboot setup_base\n"); return CMD_RET_FAILURE; } - zimage_dump(&bmi, base_ptr, true); + zimage_dump(&bmi, true); return 0; } diff --git a/include/bootm.h b/include/bootm.h index fe7f80b88a5..c471615b08c 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -342,13 +342,10 @@ const char *zimage_get_kernel_version(struct boot_params *params, * * This shows all available information in a zimage that has been loaded. * - * @bmi: Bootm information - * @base_ptr: Pointer to the boot parameters, typically at address - * DEFAULT_SETUP_BASE + * @bmi: Bootm information, with valid base_ptr * @show_cmdline: true to show the full command line */ -void zimage_dump(struct bootm_info *bmi, struct boot_params *base_ptr, - bool show_cmdline); +void zimage_dump(struct bootm_info *bmi, bool show_cmdline); /* * bootm_boot_start() - Boot an image at the given address -- cgit v1.3.1 From 7f10a7fe126dce5644d933af693eda40497d7755 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:07 -0700 Subject: bootm: Allow building bootm.c without CONFIG_SYS_BOOTM_LEN This code cannot be compiled by boards which don't have this option. Add an accessor in the header file to avoid another #ifdef Signed-off-by: Simon Glass Reviewed-by: Quentin Schulz --- boot/bootm.c | 8 ++++---- include/bootm.h | 8 ++++++++ 2 files changed, 12 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/boot/bootm.c b/boot/bootm.c index 854ac7ec738..c719a50ef9a 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -633,11 +633,11 @@ static int bootm_load_os(struct bootm_headers *images, int boot_progress) load_buf = map_sysmem(load, 0); image_buf = map_sysmem(os.image_start, image_len); err = image_decomp(os.comp, load, os.image_start, os.type, - load_buf, image_buf, image_len, - CONFIG_SYS_BOOTM_LEN, &load_end); + load_buf, image_buf, image_len, bootm_len(), + &load_end); if (err) { - err = handle_decomp_error(os.comp, load_end - load, - CONFIG_SYS_BOOTM_LEN, err); + err = handle_decomp_error(os.comp, load_end - load, bootm_len(), + err); bootstage_error(BOOTSTAGE_ID_DECOMP_IMAGE); return err; } diff --git a/include/bootm.h b/include/bootm.h index c471615b08c..d174f18ac18 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -89,6 +89,14 @@ struct bootm_info { #define bootm_x86_set(_bmi, _field, _val) #endif +static inline ulong bootm_len(void) +{ +#ifdef CONFIG_SYS_BOOTM_LEN + return CONFIG_SYS_BOOTM_LEN; +#endif + return 0; +} + /** * bootm_init() - Set up a bootm_info struct with useful defaults * -- cgit v1.3.1 From 3c7b13b075488ebcff2923b0a7b46cc11f39285e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:08 -0700 Subject: boot: Convert IMAGE_FORMAT into an enum Use an enum so it is clearer that these options are related. Update genimg_get_format(), tidy up the function comment and move it to the header file, since it is exported. Signed-off-by: Simon Glass --- boot/image-board.c | 18 +++--------------- include/image.h | 26 +++++++++++++++++++++----- 2 files changed, 24 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/boot/image-board.c b/boot/image-board.c index 514f8e63f9c..addccf87c80 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -234,21 +234,7 @@ ulong genimg_get_kernel_addr(char * const img_addr) &fit_uname_kernel); } -/** - * genimg_get_format - get image format type - * @img_addr: image start address - * - * genimg_get_format() checks whether provided address points to a valid - * legacy or FIT image. - * - * New uImage format and FDT blob are based on a libfdt. FDT blob - * may be passed directly or embedded in a FIT image. In both situations - * genimg_get_format() must be able to dectect libfdt header. - * - * returns: - * image format type or IMAGE_FORMAT_INVALID if no image is present - */ -int genimg_get_format(const void *img_addr) +enum image_fmt_t genimg_get_format(const void *img_addr) { if (CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)) { const struct legacy_img_hdr *hdr; @@ -434,6 +420,8 @@ static int select_ramdisk(struct bootm_headers *images, const char *select, u8 a done = true; } break; + case IMAGE_FORMAT_INVALID: + break; } if (!done) { diff --git a/include/image.h b/include/image.h index c1db8383459..dc1a7c307cc 100644 --- a/include/image.h +++ b/include/image.h @@ -598,10 +598,12 @@ int boot_get_setup(struct bootm_headers *images, uint8_t arch, ulong *setup_star ulong *setup_len); /* Image format types, returned by _get_format() routine */ -#define IMAGE_FORMAT_INVALID 0x00 -#define IMAGE_FORMAT_LEGACY 0x01 /* legacy image_header based format */ -#define IMAGE_FORMAT_FIT 0x02 /* new, libfdt based format */ -#define IMAGE_FORMAT_ANDROID 0x03 /* Android boot image */ +enum image_fmt_t { + IMAGE_FORMAT_INVALID, + IMAGE_FORMAT_LEGACY, /* legacy image_header based format */ + IMAGE_FORMAT_FIT, /* new, libfdt based format */ + IMAGE_FORMAT_ANDROID, /* Android boot image */ +}; /** * genimg_get_kernel_addr_fit() - Parse FIT specifier @@ -630,7 +632,21 @@ ulong genimg_get_kernel_addr_fit(const char *const img_addr, const char **fit_uname_kernel); ulong genimg_get_kernel_addr(char * const img_addr); -int genimg_get_format(const void *img_addr); + +/** + * genimg_get_format - get image format type + * @img_addr: image start address + * Return: image format type or IMAGE_FORMAT_INVALID if no image is present + * + * genimg_get_format() checks whether provided address points to a valid + * legacy or FIT image. + * + * New uImage format and FDT blob are based on a libfdt. FDT blob + * may be passed directly or embedded in a FIT image. In both situations + * genimg_get_format() must be able to dectect libfdt header. + */ +enum image_fmt_t genimg_get_format(const void *img_addr); + int genimg_has_config(struct bootm_headers *images); /** -- cgit v1.3.1 From 098407e67390ed0c369029bab0777a51e5a7bad2 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:09 -0700 Subject: boot: arm: riscv: sandbox: Add a format for the booti file Arm invented a new format for arm64 and something similar is also used with RISC-V. Add this to the list of supported formats and provide a way for the format to be detected on both architectures. Update the genimg_get_format() function to support this. Fix up switch() statements which don't currently mention this format. Booti does not support a ramdisk, so this can be ignored. Signed-off-by: Simon Glass --- arch/arm/lib/image.c | 9 ++++++++- arch/riscv/lib/image.c | 9 ++++++++- arch/sandbox/lib/bootm.c | 5 +++++ boot/image-board.c | 5 +++++ include/image.h | 9 +++++++++ 5 files changed, 35 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/arch/arm/lib/image.c b/arch/arm/lib/image.c index 1f672eee2c8..d78d704cb58 100644 --- a/arch/arm/lib/image.c +++ b/arch/arm/lib/image.c @@ -28,6 +28,13 @@ struct Image_header { uint32_t res5; }; +bool booti_is_valid(const void *img) +{ + const struct Image_header *ih = img; + + return ih->magic == le32_to_cpu(LINUX_ARM64_IMAGE_MAGIC); +} + int booti_setup(ulong image, ulong *relocated_addr, ulong *size, bool force_reloc) { @@ -39,7 +46,7 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size, ih = (struct Image_header *)map_sysmem(image, 0); - if (ih->magic != le32_to_cpu(LINUX_ARM64_IMAGE_MAGIC)) { + if (!booti_is_valid(ih)) { puts("Bad Linux ARM64 Image magic!\n"); return 1; } diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c index a82f48e9a50..859326cbac8 100644 --- a/arch/riscv/lib/image.c +++ b/arch/riscv/lib/image.c @@ -32,6 +32,13 @@ struct linux_image_h { uint32_t res4; /* reserved */ }; +bool booti_is_valid(const void *img) +{ + const struct linux_image_h *lhdr = img; + + return lhdr->magic == LINUX_RISCV_IMAGE_MAGIC; +} + int booti_setup(ulong image, ulong *relocated_addr, ulong *size, bool force_reloc) { @@ -39,7 +46,7 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size, lhdr = (struct linux_image_h *)map_sysmem(image, 0); - if (lhdr->magic != LINUX_RISCV_IMAGE_MAGIC) { + if (!booti_is_valid(lhdr)) { puts("Bad Linux RISCV Image magic!\n"); return -EINVAL; } diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c index 44ba8b52e13..8ed923750f4 100644 --- a/arch/sandbox/lib/bootm.c +++ b/arch/sandbox/lib/bootm.c @@ -89,3 +89,8 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size, return 1; } + +bool booti_is_valid(const void *img) +{ + return false; +} diff --git a/boot/image-board.c b/boot/image-board.c index addccf87c80..07931c64198 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -250,6 +250,9 @@ enum image_fmt_t genimg_get_format(const void *img_addr) if (IS_ENABLED(CONFIG_ANDROID_BOOT_IMAGE) && is_android_boot_image_header(img_addr)) return IMAGE_FORMAT_ANDROID; + if (IS_ENABLED(CONFIG_CMD_BOOTI) && + booti_is_valid(img_addr)) + return IMAGE_FORMAT_BOOTI; return IMAGE_FORMAT_INVALID; } @@ -420,6 +423,8 @@ static int select_ramdisk(struct bootm_headers *images, const char *select, u8 a done = true; } break; + case IMAGE_FORMAT_BOOTI: + break; case IMAGE_FORMAT_INVALID: break; } diff --git a/include/image.h b/include/image.h index dc1a7c307cc..f8f2c887a4b 100644 --- a/include/image.h +++ b/include/image.h @@ -603,6 +603,7 @@ enum image_fmt_t { IMAGE_FORMAT_LEGACY, /* legacy image_header based format */ IMAGE_FORMAT_FIT, /* new, libfdt based format */ IMAGE_FORMAT_ANDROID, /* Android boot image */ + IMAGE_FORMAT_BOOTI, /* Arm64/RISC-V boot image */ }; /** @@ -649,6 +650,14 @@ enum image_fmt_t genimg_get_format(const void *img_addr); int genimg_has_config(struct bootm_headers *images); +/** + * booti_is_valid() - Check if an image appears to be an Arm64 image + * + * @img: Pointer to image + * Return: true if the image has the Arm64 magic + */ +bool booti_is_valid(const void *img); + /** * boot_get_fpga() - Locate the FPGA image * -- cgit v1.3.1 From d6bb0ea535e4384ed1975ee9c755488f5036a79e Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:10 -0700 Subject: boot: Support booti format in bootm At present the booti format is handled separately, in its own command. Provide a way to boot uncompressed booti images within the bootm code, so that eventually we can boot these images without CONFIG_CMDLINE Update bootm_init() to attach the images for all formats which use them. Add some debugging while we are here. Signed-off-by: Simon Glass --- boot/bootm.c | 42 +++++++++++++++++++++++++++++++++++++++++- include/image.h | 2 +- 2 files changed, 42 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/boot/bootm.c b/boot/bootm.c index c719a50ef9a..272623c9258 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -227,6 +227,12 @@ static int boot_get_kernel(const char *addr_fit, struct bootm_headers *images, break; } #endif + case IMAGE_FORMAT_BOOTI: + if (IS_ENABLED(CONFIG_CMD_BOOTI)) { + *os_data = img_addr; + break; + } + fallthrough; default: bootstage_error(BOOTSTAGE_ID_CHECK_IMAGETYPE); return -EPROTOTYPE; @@ -286,6 +292,24 @@ static int bootm_pre_load(const char *addr_str) return ret; } +static int found_booti_os(enum image_comp_t comp) +{ + images.os.load = images.os.image_start; + images.os.type = IH_TYPE_KERNEL; + images.os.os = IH_OS_LINUX; + images.os.comp = comp; + if (IS_ENABLED(CONFIG_RISCV_SMODE)) + images.os.arch = IH_ARCH_RISCV; + else if (IS_ENABLED(CONFIG_ARM64)) + images.os.arch = IH_ARCH_ARM64; + + log_debug("load %lx start %lx len %lx ep %lx os %x comp %x\n", + images.os.load, images.os.image_start, images.os.image_len, + images.ep, images.os.os, images.os.comp); + + return 0; +} + /** * bootm_find_os(): Find the OS to boot * @@ -390,6 +414,14 @@ static int bootm_find_os(const char *cmd_name, const char *addr_fit) } break; #endif + case IMAGE_FORMAT_BOOTI: + if (IS_ENABLED(CONFIG_CMD_BOOTI)) { + if (found_booti_os(IH_COMP_NONE)) + return 1; + ep_found = true; + break; + } + fallthrough; default: puts("ERROR: unknown image format type!\n"); return 1; @@ -541,6 +573,7 @@ int bootm_find_images(ulong img_addr, const char *conf_ramdisk, static int bootm_find_other(ulong img_addr, const char *conf_ramdisk, const char *conf_fdt) { + log_debug("find_other type %x os %x\n", images.os.type, images.os.os); if ((images.os.type == IH_TYPE_KERNEL || images.os.type == IH_TYPE_KERNEL_NOLOAD || images.os.type == IH_TYPE_MULTI) && @@ -629,6 +662,8 @@ static int bootm_load_os(struct bootm_headers *images, int boot_progress) debug("Allocated %lx bytes at %lx for kernel (size %lx) decompression\n", req_size, load, image_len); } + log_debug("load_os load %lx image_start %lx image_len %lx\n", load, + image_start, image_len); load_buf = map_sysmem(load, 0); image_buf = map_sysmem(os.image_start, image_len); @@ -1110,6 +1145,10 @@ int boot_run(struct bootm_info *bmi, const char *cmd, int extra_states) states |= BOOTM_STATE_RAMDISK; states |= extra_states; + log_debug("cmd '%s' states %x addr_img '%s' conf_ramdisk '%s' conf_fdt '%s' images %p\n", + cmd, states, bmi->addr_img, bmi->conf_ramdisk, bmi->conf_fdt, + bmi->images); + return bootm_run_states(bmi, states); } @@ -1166,7 +1205,8 @@ void bootm_init(struct bootm_info *bmi) { memset(bmi, '\0', sizeof(struct bootm_info)); bmi->boot_progress = true; - if (IS_ENABLED(CONFIG_CMD_BOOTM)) + if (IS_ENABLED(CONFIG_CMD_BOOTM) || IS_ENABLED(CONFIG_CMD_BOOTZ) || + IS_ENABLED(CONFIG_CMD_BOOTI) || IS_ENABLED(CONFIG_PXE_UTILS)) bmi->images = &images; } diff --git a/include/image.h b/include/image.h index f8f2c887a4b..5b9bd6a9649 100644 --- a/include/image.h +++ b/include/image.h @@ -244,7 +244,7 @@ enum image_type_t { * New IDs *MUST* be appended at the end of the list and *NEVER* * inserted for backward compatibility. */ -enum { +enum image_comp_t { IH_COMP_NONE = 0, /* No Compression Used */ IH_COMP_GZIP, /* gzip Compression Used */ IH_COMP_BZIP2, /* bzip2 Compression Used */ -- cgit v1.3.1 From ecd50bb4643c9052e5f8b6171ab6c3905ed0ca70 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:11 -0700 Subject: boot: Support compressed booti images in bootm A compressed booti image relies on the compression-format's header at the start to indicate which compression algorithm is used. We don't support this elsewhere in U-Boot, so assume that a compressed file is always a booti file. Once it is compressed, a check is made to make sure that it actually is. Simplify the implementation by adding a new function which returns the booti image-type if compression is detected. Signed-off-by: Simon Glass --- boot/bootm.c | 37 ++++++++++++++++++++++++++++++------- boot/image-board.c | 13 ++++++++++++- include/image.h | 11 +++++++++++ 3 files changed, 53 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/boot/bootm.c b/boot/bootm.c index 272623c9258..8a1aac7515f 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -146,7 +146,7 @@ static int boot_get_kernel(const char *addr_fit, struct bootm_headers *images, /* check image type, for FIT images get FIT kernel node */ *os_data = *os_len = 0; buf = map_sysmem(img_addr, 0); - switch (genimg_get_format(buf)) { + switch (genimg_get_format_comp(buf)) { #if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT) case IMAGE_FORMAT_LEGACY: printf("## Booting kernel from Legacy Image at %08lx ...\n", @@ -228,11 +228,8 @@ static int boot_get_kernel(const char *addr_fit, struct bootm_headers *images, } #endif case IMAGE_FORMAT_BOOTI: - if (IS_ENABLED(CONFIG_CMD_BOOTI)) { - *os_data = img_addr; - break; - } - fallthrough; + *os_data = img_addr; + break; default: bootstage_error(BOOTSTAGE_ID_CHECK_IMAGETYPE); return -EPROTOTYPE; @@ -306,6 +303,17 @@ static int found_booti_os(enum image_comp_t comp) log_debug("load %lx start %lx len %lx ep %lx os %x comp %x\n", images.os.load, images.os.image_start, images.os.image_len, images.ep, images.os.os, images.os.comp); + if (comp != IH_COMP_NONE) { + images.os.load = env_get_hex("kernel_comp_addr_r", 0); + images.os.image_len = env_get_ulong("kernel_comp_size", 16, 0); + if (!images.os.load || !images.os.image_len) { + puts("kernel_comp_addr_r or kernel_comp_size is not provided!\n"); + return -ENOTSUPP; + } + if (lmb_reserve(images.os.load, images.os.image_len, LMB_NONE) + < 0) + return -EXDEV; + } return 0; } @@ -423,6 +431,19 @@ static int bootm_find_os(const char *cmd_name, const char *addr_fit) } fallthrough; default: + /* any compressed image is probably a booti image */ + if (IS_ENABLED(CONFIG_CMD_BOOTI)) { + int comp; + + comp = image_decomp_type(os_hdr, 2); + if (comp != IH_COMP_NONE) { + if (found_booti_os(comp)) + return 1; + ep_found = true; + } + break; + } + puts("ERROR: unknown image format type!\n"); return 1; } @@ -1166,7 +1187,9 @@ int bootz_run(struct bootm_info *bmi) int booti_run(struct bootm_info *bmi) { - return boot_run(bmi, "booti", 0); + return boot_run(bmi, "booti", BOOTM_STATE_START | BOOTM_STATE_FINDOS | + BOOTM_STATE_PRE_LOAD | BOOTM_STATE_FINDOTHER | + BOOTM_STATE_LOADOS); } int bootm_boot_start(ulong addr, const char *cmdline) diff --git a/boot/image-board.c b/boot/image-board.c index 07931c64198..a2bafba7ae1 100644 --- a/boot/image-board.c +++ b/boot/image-board.c @@ -257,6 +257,17 @@ enum image_fmt_t genimg_get_format(const void *img_addr) return IMAGE_FORMAT_INVALID; } +enum image_fmt_t genimg_get_format_comp(const void *img_addr) +{ + enum image_fmt_t fmt = genimg_get_format(img_addr); + + if (IS_ENABLED(CONFIG_CMD_BOOTI) && fmt == IMAGE_FORMAT_INVALID && + image_decomp_type(img_addr, 2) != IH_COMP_NONE) + fmt = IMAGE_FORMAT_BOOTI; + + return fmt; +} + /** * fit_has_config - check if there is a valid FIT configuration * @images: pointer to the bootm command headers structure @@ -353,7 +364,7 @@ static int select_ramdisk(struct bootm_headers *images, const char *select, u8 a * check image type, for FIT images get FIT node. */ buf = map_sysmem(rd_addr, 0); - switch (genimg_get_format(buf)) { + switch (genimg_get_format_comp(buf)) { case IMAGE_FORMAT_LEGACY: if (CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)) { const struct legacy_img_hdr *rd_hdr; diff --git a/include/image.h b/include/image.h index 5b9bd6a9649..2455baa6667 100644 --- a/include/image.h +++ b/include/image.h @@ -648,6 +648,17 @@ ulong genimg_get_kernel_addr(char * const img_addr); */ enum image_fmt_t genimg_get_format(const void *img_addr); +/** + * genimg_get_format_comp() - Like genimg_get_format() but adds compressed booti + * + * If a compressed file is detected (with image_decomp_type()) and + * CONFIG_CMD_BOOTI is enabled, then this returns IMAGE_FORMAT_BOOTI + * + * @img_addr: image start address + * Return: image format type or IMAGE_FORMAT_INVALID if no image is present + */ +enum image_fmt_t genimg_get_format_comp(const void *img_addr); + int genimg_has_config(struct bootm_headers *images); /** -- cgit v1.3.1 From e2e87b840162ddf4ec8df3f235be98a74a964509 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:14 -0700 Subject: boot: pxe: Refactor label_run_boot() to avoid cmdline Adjust the remaining call in this function to use the bootm API. This will allow PXE to work without the command line. Signed-off-by: Simon Glass --- arch/x86/lib/zimage.c | 27 +++++++++++++++++++-------- boot/pxe_utils.c | 14 ++++++-------- include/bootm.h | 9 +++++++++ 3 files changed, 34 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c index 145ba0b8ea0..ba7a008fec7 100644 --- a/arch/x86/lib/zimage.c +++ b/arch/x86/lib/zimage.c @@ -432,27 +432,38 @@ int zboot_go(struct bootm_info *bmi) return ret; } -int zboot_run_args(ulong addr, ulong size, ulong initrd, ulong initrd_size, - ulong base, char *cmdline) +int zboot_run(struct bootm_info *bmi) { - struct bootm_info bmi; int ret; - bootm_init(&bmi); - zboot_start(&bmi, addr, size, initrd, initrd_size, base, cmdline); - ret = zboot_load(&bmi); + ret = zboot_load(bmi); if (ret) return log_msg_ret("ld", ret); - ret = zboot_setup(&bmi); + ret = zboot_setup(bmi); if (ret) return log_msg_ret("set", ret); - ret = zboot_go(&bmi); + ret = zboot_go(bmi); if (ret) return log_msg_ret("go", ret); return -EFAULT; } +int zboot_run_args(ulong addr, ulong size, ulong initrd, ulong initrd_size, + ulong base, char *cmdline) +{ + struct bootm_info bmi; + int ret; + + bootm_init(&bmi); + zboot_start(&bmi, addr, size, initrd, initrd_size, base, cmdline); + ret = zboot_run(&bmi); + if (ret) + return log_msg_ret("zra", ret); + + return 0; +} + static void print_num(const char *name, ulong value) { printf("%-20s: %lx\n", name, value); diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c index 37306f37009..c606da9e96b 100644 --- a/boot/pxe_utils.c +++ b/boot/pxe_utils.c @@ -585,10 +585,8 @@ static int label_run_boot(struct pxe_context *ctx, struct pxe_label *label, char *kernel_addr, char *initrd_addr_str, char *initrd_filesize, char *initrd_str) { - char *zboot_argv[] = { "zboot", NULL, "0", NULL, NULL }; struct bootm_info bmi; ulong kernel_addr_r; - int zboot_argc = 3; void *buf; int ret; @@ -601,14 +599,14 @@ static int label_run_boot(struct pxe_context *ctx, struct pxe_label *label, return ret; bmi.addr_img = kernel_addr; - zboot_argv[1] = kernel_addr; + bootm_x86_set(&bmi, bzimage_addr, hextoul(kernel_addr, NULL)); if (initrd_addr_str) { bmi.conf_ramdisk = initrd_str; - - zboot_argv[3] = initrd_addr_str; - zboot_argv[4] = initrd_filesize; - zboot_argc = 5; + bootm_x86_set(&bmi, initrd_addr, + hextoul(initrd_addr_str, NULL)); + bootm_x86_set(&bmi, initrd_size, + hextoul(initrd_filesize, NULL)); } if (!bmi.conf_fdt) { @@ -642,7 +640,7 @@ static int label_run_boot(struct pxe_context *ctx, struct pxe_label *label, /* Try booting an x86_64 Linux kernel image */ } else if (IS_ENABLED(CONFIG_CMD_ZBOOT)) { log_debug("using zboot\n"); - do_zboot_parent(ctx->cmdtp, 0, zboot_argc, zboot_argv, NULL); + ret = zboot_run(&bmi); } unmap_sysmem(buf); diff --git a/include/bootm.h b/include/bootm.h index d174f18ac18..465577a66f5 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -315,6 +315,15 @@ int bootm_process_cmdline(char *buf, int maxlen, int flags); */ int bootm_process_cmdline_env(int flags); +/** + * zboot_run() - Run through the various steps to boot a zimage + * + * @bmi: Bootm information, with bzimage_size, initrd_addr, initrd_size and + * cmdline set up. If base_ptr is 0, then bzimage_addr must be set to the start + * of the bzImage. Otherwise base_ptr and load_address must be provided. + */ +int zboot_run(struct bootm_info *bmi); + /** * zboot_run_args() - Run through the various steps to boot a zimage * -- cgit v1.3.1 From 0f094b8b146679c3980cd2febde4e902bbc4405d Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 5 Mar 2025 17:25:23 -0700 Subject: net: Provide a function to run network operations Add a new netboot_run() function which can be used for simple network operations, such as loading a file. Put the implementation in an internal function, used by the existing code. Place this function into the net/ code, so that it does not need the command line to be available. Document which network operations are supported, i.e. a limited subset, for now. For the one board which uses lwip, it is not quite clear how to avoid using the cmdline interface. This will need some discussion. Signed-off-by: Simon Glass --- cmd/net.c | 40 +--------------------------------------- include/net-common.h | 30 ++++++++++++++++++++++++++++++ net/net.c | 44 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 75 insertions(+), 39 deletions(-) (limited to 'include') diff --git a/cmd/net.c b/cmd/net.c index 6d1c6374f76..8f33c9f55d5 100644 --- a/cmd/net.c +++ b/cmd/net.c @@ -382,44 +382,6 @@ static int parse_args(enum proto_t proto, int argc, char *const argv[], return 0; } -static int netboot_run_(enum proto_t proto, ulong addr, const char *fname, - ulong size, bool fname_explicit, bool ipv6) -{ - int ret; - - bootstage_mark(BOOTSTAGE_ID_NET_START); - - /* - * For now we use the global variables as that is the only way to - * control the network stack. At some point, perhaps, the state could be - * in a struct - */ - if (IS_ENABLED(CONFIG_CMD_TFTPPUT) && proto == TFTPPUT) - image_save_addr = addr; - else - image_load_addr = addr; - - net_boot_file_name_explicit = fname_explicit; - copy_filename(net_boot_file_name, fname, sizeof(net_boot_file_name)); - if (IS_ENABLED(CONFIG_IPV6)) - use_ip6 = ipv6; - if (IS_ENABLED(CONFIG_CMD_TFTPPUT) && proto == TFTPPUT) { - image_save_addr = addr; - image_save_size = size; - } else { - image_load_addr = addr; - } - - ret = net_loop(proto); - if (ret < 0) { - bootstage_error(BOOTSTAGE_ID_NET_NETLOOP_OK); - return ret; - } - bootstage_mark(BOOTSTAGE_ID_NET_NETLOOP_OK); - - return 0; -} - static int netboot_common(enum proto_t proto, struct cmd_tbl *cmdtp, int argc, char *const argv[]) { @@ -475,7 +437,7 @@ static int netboot_common(enum proto_t proto, struct cmd_tbl *cmdtp, int argc, } size = netboot_run_(proto, addr, fname, save_size, fname_explicit, - use_ip6); + IS_ENABLED(CONFIG_IPV6) && use_ip6); if (size < 0) return CMD_RET_FAILURE; diff --git a/include/net-common.h b/include/net-common.h index 29d31f37263..210042fc337 100644 --- a/include/net-common.h +++ b/include/net-common.h @@ -474,6 +474,36 @@ int net_init(void); enum proto_t; int net_loop(enum proto_t protocol); +/* internal function: do not use! */ +int netboot_run_(enum proto_t proto, ulong addr, const char *fname, ulong size, + bool fname_explicit, bool ipv6); + +/** + * netboot_run() - Run a network operation + * + * The following proto values are NOT supported: + * PING, since net_ping_ip cannot be set + * NETCONS, since its parameters cannot bet set + * RS, since first_call cannot be set, along with perhaps other things + * UDP, since udp_ops cannot be set + * DNS, since net_dns_resolve and net_dns_env_var cannot be set + * WGET, since DNS must be done first and that is not supported + * DHCP6, since the required parameters cannot be passed in + * + * To support one of these, either add the required arguments or perhaps a + * separate function and a struct to hold the information. + * + * @proto: Operation to run: TFTPGET, FASTBOOT_UDP, FASTBOOT_TCP, BOOTP, + * TFTPPUT, RARP, NFS, DHCP + * @addr: Load/save address + * @fname: Filename + * @size: Save size (not used for TFTPGET) + * @ipv6: true to use IPv6, false to use IPv4 + * Return 0 on success, else -ve error code + */ +int netboot_run(enum proto_t proto, ulong addr, const char *fname, ulong size, + bool ipv6); + /** * dhcp_run() - Run DHCP on the current ethernet device * diff --git a/net/net.c b/net/net.c index 1828f1cca36..ef97377cdec 100644 --- a/net/net.c +++ b/net/net.c @@ -775,6 +775,50 @@ done: return ret; } +int netboot_run_(enum proto_t proto, ulong addr, const char *fname, ulong size, + bool fname_explicit, bool ipv6) +{ + int ret; + + bootstage_mark(BOOTSTAGE_ID_NET_START); + + /* + * For now we use the global variables as that is the only way to + * control the network stack. At some point, perhaps, the state could be + * in a struct + */ + if (IS_ENABLED(CONFIG_CMD_TFTPPUT) && proto == TFTPPUT) + image_save_addr = addr; + else + image_load_addr = addr; + + net_boot_file_name_explicit = fname_explicit; + copy_filename(net_boot_file_name, fname, sizeof(net_boot_file_name)); + if (IS_ENABLED(CONFIG_IPV6)) + use_ip6 = ipv6; + if (IS_ENABLED(CONFIG_CMD_TFTPPUT) && proto == TFTPPUT) { + image_save_addr = addr; + image_save_size = size; + } else { + image_load_addr = addr; + } + + ret = net_loop(proto); + if (ret < 0) { + bootstage_error(BOOTSTAGE_ID_NET_NETLOOP_OK); + return ret; + } + bootstage_mark(BOOTSTAGE_ID_NET_NETLOOP_OK); + + return 0; +} + +int netboot_run(enum proto_t proto, ulong addr, const char *fname, ulong size, + bool ipv6) +{ + return netboot_run_(proto, addr, fname, size, true, ipv6); +} + /**********************************************************************/ static void start_again_timeout_handler(void) -- cgit v1.3.1 From b85fe01d7df253a86aa61e0a6ed88971ffe44aac Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Tue, 11 Mar 2025 20:57:43 +0000 Subject: reset: rzg2l-usbphy-ctrl: Add new driver Add a new driver to control the USB 2.0 PHY reset controller on the Renesas RZ/G2L and related SoCs. Signed-off-by: Paul Barker Reviewed-by: Marek Vasut --- drivers/reset/Kconfig | 9 +++ drivers/reset/Makefile | 1 + drivers/reset/reset-rzg2l-usbphy-ctrl.c | 113 ++++++++++++++++++++++++++++++++ include/renesas/rzg2l-usbphy.h | 17 +++++ 4 files changed, 140 insertions(+) create mode 100644 drivers/reset/reset-rzg2l-usbphy-ctrl.c create mode 100644 include/renesas/rzg2l-usbphy.h (limited to 'include') diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index fe5c1214f57..80e83a40bdf 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -235,4 +235,13 @@ config RESET_AT91 This enables the Reset Controller driver support for Microchip/Atmel SoCs. Mainly used to expose assert/deassert methods to other drivers that require it. + +config RESET_RZG2L_USBPHY_CTRL + bool "Enable support for Renesas RZ/G2L USB 2.0 PHY control" + depends on DM_RESET + help + Enable support for controlling USB 2.0 PHY resets on the Renesas + RZ/G2L SoC. This is required for USB 2.0 functionality to work on this + SoC. + endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index d99a78c9828..9d438a755b3 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -33,3 +33,4 @@ obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o obj-$(CONFIG_RESET_DRA7) += reset-dra7.o obj-$(CONFIG_RESET_AT91) += reset-at91.o obj-$(CONFIG_$(PHASE_)RESET_JH7110) += reset-jh7110.o +obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o diff --git a/drivers/reset/reset-rzg2l-usbphy-ctrl.c b/drivers/reset/reset-rzg2l-usbphy-ctrl.c new file mode 100644 index 00000000000..afd647e00b1 --- /dev/null +++ b/drivers/reset/reset-rzg2l-usbphy-ctrl.c @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2024 Renesas Electronics Corporation + */ + +#include +#include +#include +#include +#include +#include +#include + +#define RESET 0x000 + +#define RESET_SEL_PLLRESET BIT(12) +#define RESET_PLLRESET BIT(8) + +#define RESET_SEL_P2RESET BIT(5) +#define RESET_SEL_P1RESET BIT(4) +#define RESET_PHYRST_2 BIT(1) +#define RESET_PHYRST_1 BIT(0) + +#define PHY_RESET_MASK (RESET_PHYRST_1 | RESET_PHYRST_2) + +#define NUM_PORTS 2 + +static int rzg2l_usbphy_ctrl_assert(struct reset_ctl *reset_ctl) +{ + struct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(reset_ctl->dev); + u32 val; + + val = readl(priv->regs + RESET); + val |= reset_ctl->id ? RESET_PHYRST_2 : RESET_PHYRST_1; + + /* If both ports are in reset, we can also place the PLL into reset. */ + if ((val & PHY_RESET_MASK) == PHY_RESET_MASK) + val |= RESET_PLLRESET; + + writel(val, priv->regs + RESET); + return 0; +} + +static int rzg2l_usbphy_ctrl_deassert(struct reset_ctl *reset_ctl) +{ + struct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(reset_ctl->dev); + u32 val = reset_ctl->id ? RESET_PHYRST_2 : RESET_PHYRST_1; + + /* If either port is out of reset, the PLL must also be out of reset. */ + val |= RESET_PLLRESET; + + clrbits_le32(priv->regs + RESET, val); + return 0; +} + +static int rzg2l_usbphy_ctrl_of_xlate(struct reset_ctl *reset_ctl, + struct ofnode_phandle_args *args) +{ + if (args->args[0] >= NUM_PORTS) + return -EINVAL; + + reset_ctl->id = args->args[0]; + return 0; +} + +struct reset_ops rzg2l_usbphy_ctrl_ops = { + .rst_assert = rzg2l_usbphy_ctrl_assert, + .rst_deassert = rzg2l_usbphy_ctrl_deassert, + .of_xlate = rzg2l_usbphy_ctrl_of_xlate, +}; + +static int rzg2l_usbphy_ctrl_probe(struct udevice *dev) +{ + struct rzg2l_usbphy_ctrl_priv *priv = dev_get_priv(dev); + struct reset_ctl rst; + int ret; + + priv->regs = dev_read_addr(dev); + + ret = reset_get_by_index(dev, 0, &rst); + if (ret < 0) { + dev_err(dev, "failed to get reset line: %d\n", ret); + return ret; + } + + ret = reset_deassert(&rst); + if (ret < 0) { + dev_err(dev, "failed to de-assert reset line: %d\n", ret); + return ret; + } + + /* put pll and phy into reset state */ + setbits_le32(priv->regs + RESET, + RESET_SEL_PLLRESET | RESET_PLLRESET | + RESET_SEL_P1RESET | RESET_PHYRST_1 | + RESET_SEL_P2RESET | RESET_PHYRST_2); + + return 0; +} + +static const struct udevice_id rzg2l_usbphy_ctrl_ids[] = { + { .compatible = "renesas,rzg2l-usbphy-ctrl", }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(rzg2l_usbphy_ctrl) = { + .name = "rzg2l_usbphy_ctrl", + .id = UCLASS_RESET, + .of_match = rzg2l_usbphy_ctrl_ids, + .probe = rzg2l_usbphy_ctrl_probe, + .ops = &rzg2l_usbphy_ctrl_ops, + .priv_auto = sizeof(struct rzg2l_usbphy_ctrl_priv), +}; diff --git a/include/renesas/rzg2l-usbphy.h b/include/renesas/rzg2l-usbphy.h new file mode 100644 index 00000000000..1a46b585f17 --- /dev/null +++ b/include/renesas/rzg2l-usbphy.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * RZ/G2L USB PHY common definitions + * + * Copyright (C) 2021-2023 Renesas Electronics Corp. + */ + +#ifndef RENESAS_RZG2L_USBPHY_H +#define RENESAS_RZG2L_USBPHY_H + +#include + +struct rzg2l_usbphy_ctrl_priv { + fdt_addr_t regs; +}; + +#endif /* RENESAS_RZG2L_USBPHY_H */ -- cgit v1.3.1 From 985dc81a1d962a04ad1084bc4fe912492c8fe463 Mon Sep 17 00:00:00 2001 From: Paul Barker Date: Fri, 28 Feb 2025 12:47:52 +0000 Subject: net: phy: Port set/clear bits from Linux To simply porting phy drivers from Linux to U-Boot, define phy_set_bits() and phy_clear_bits() functions with a similar API to those used in Linux. The U-Boot versions of these functions include the `devad` argument which is not present in the Linux versions, to keep them aligned with the other phy functions in U-Boot. Reviewed-by: Marek Vasut Signed-off-by: Paul Barker --- include/phy.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'include') diff --git a/include/phy.h b/include/phy.h index 36785031eeb..36354aaf774 100644 --- a/include/phy.h +++ b/include/phy.h @@ -333,6 +333,30 @@ int gen10g_startup(struct phy_device *phydev); int gen10g_shutdown(struct phy_device *phydev); int gen10g_discover_mmds(struct phy_device *phydev); +/** + * phy_set_bits - Convenience function for setting bits in a PHY register + * @phydev: the phy_device struct + * @devad: The MMD to read from + * @regnum: register number to write + * @val: bits to set + */ +static inline int phy_set_bits(struct phy_device *phydev, int devad, u32 regnum, u16 val) +{ + return phy_modify(phydev, devad, regnum, 0, val); +} + +/** + * phy_clear_bits - Convenience function for clearing bits in a PHY register + * @phydev: the phy_device struct + * @devad: The MMD to write to + * @regnum: register number to write + * @val: bits to clear + */ +static inline int phy_clear_bits(struct phy_device *phydev, int devad, u32 regnum, u16 val) +{ + return phy_modify(phydev, devad, regnum, val, 0); +} + /** * U_BOOT_PHY_DRIVER() - Declare a new U-Boot driver * @__name: name of the driver -- cgit v1.3.1 From 03f61b153965101f21783e8e6a1e5e86496598ff Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Wed, 5 Mar 2025 15:05:30 +0200 Subject: board: ouya: add Ouya Game Console support The Ouya microconsole is build on Nvidia Tegra 3 (T33) SoC, featuring a quad-core 1.7 GHz ARM Cortex-A9 CPU and a ULP GeForce GPU, paired with 1GB of DDR3 RAM and 8GB of internal flash storage. Running a modified Android 4.1 (Jelly Bean) OS with a custom launcher, it aimed for open-source gaming via a digital storefront. This implementation is mostly based on upstream Linux device tree and fragments of work done by previous developers. Co-developed-by: Peter Geis Signed-off-by: Peter Geis Signed-off-by: Svyatoslav Ryhel --- arch/arm/dts/Makefile | 1 + arch/arm/dts/tegra30-ouya.dts | 2063 +++++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra30/Kconfig | 5 + board/ouya/ouya/Kconfig | 12 + board/ouya/ouya/MAINTAINERS | 8 + board/ouya/ouya/Makefile | 11 + board/ouya/ouya/ouya-spl.c | 41 + board/ouya/ouya/ouya.c | 21 + board/ouya/ouya/ouya.env | 12 + configs/ouya_defconfig | 86 ++ doc/board/index.rst | 1 + doc/board/ouya/index.rst | 9 + doc/board/ouya/ouya.rst | 124 +++ include/configs/ouya.h | 23 + include/env/nvidia/prod_upd.env | 5 +- 15 files changed, 2420 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/tegra30-ouya.dts create mode 100644 board/ouya/ouya/Kconfig create mode 100644 board/ouya/ouya/MAINTAINERS create mode 100644 board/ouya/ouya/Makefile create mode 100644 board/ouya/ouya/ouya-spl.c create mode 100644 board/ouya/ouya/ouya.c create mode 100644 board/ouya/ouya/ouya.env create mode 100644 configs/ouya_defconfig create mode 100644 doc/board/ouya/index.rst create mode 100644 doc/board/ouya/ouya.rst create mode 100644 include/configs/ouya.h (limited to 'include') diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 73231824526..bad582c66b0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -113,6 +113,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += \ tegra30-lg-p880.dtb \ tegra30-lg-p895.dtb \ tegra30-microsoft-surface-rt.dtb \ + tegra30-ouya.dtb \ tegra30-tec-ng.dtb \ tegra30-wexler-qc750.dtb \ tegra114-dalmore.dtb \ diff --git a/arch/arm/dts/tegra30-ouya.dts b/arch/arm/dts/tegra30-ouya.dts new file mode 100644 index 00000000000..04453eb2432 --- /dev/null +++ b/arch/arm/dts/tegra30-ouya.dts @@ -0,0 +1,2063 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include +#include "tegra30.dtsi" + +/ { + model = "Ouya Game Console"; + compatible = "ouya,ouya", "nvidia,tegra30"; + + chosen { + stdout-path = &uartd; + }; + + aliases { + i2c0 = &pwr_i2c; + i2c1 = &hdmi_ddc; + + mmc0 = &sdmmc4; + + rtc0 = &pmic; + rtc1 = "/rtc@7000e000"; + + usb0 = µ_usb; + usb1 = ðernet_usb; + usb2 = &fullsize_usb; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000>; + }; + + host1x@50000000 { + dc@54200000 { + status = "disabled"; + }; + + hdmi: hdmi@54280000 { + status = "okay"; + + hdmi-supply = <&sys_3v3_reg>; + pll-supply = <&ldo7_reg>; + vdd-supply = <&vdd_vid_reg>; + + nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + }; + }; + + gpio@6000d000 { + fan-en-hog { + gpio-hog; + gpios = ; + output-high; + }; + }; + + pinmux@70000868 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + clk_32k_out_pa0 { + nvidia,pins = "clk_32k_out_pa0"; + nvidia,function = "blink"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + uart3_cts_n_pa1 { + nvidia,pins = "uart3_cts_n_pa1"; + nvidia,function = "uartc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap2_fs_pa2 { + nvidia,pins = "dap2_fs_pa2"; + nvidia,function = "i2s1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap2_sclk_pa3 { + nvidia,pins = "dap2_sclk_pa3"; + nvidia,function = "i2s1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap2_din_pa4 { + nvidia,pins = "dap2_din_pa4"; + nvidia,function = "i2s1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap2_dout_pa5 { + nvidia,pins = "dap2_dout_pa5"; + nvidia,function = "i2s1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_clk_pa6 { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_cmd_pa7 { + nvidia,pins = "sdmmc3_cmd_pa7"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_a17_pb0 { + nvidia,pins = "gmi_a17_pb0"; + nvidia,function = "spi4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_a18_pb1 { + nvidia,pins = "gmi_a18_pb1"; + nvidia,function = "spi4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_pwr0_pb2 { + nvidia,pins = "lcd_pwr0_pb2"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_pclk_pb3 { + nvidia,pins = "lcd_pclk_pb3"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_dat3_pb4 { + nvidia,pins = "sdmmc3_dat3_pb4"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_dat2_pb5 { + nvidia,pins = "sdmmc3_dat2_pb5"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_dat1_pb6 { + nvidia,pins = "sdmmc3_dat1_pb6"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_dat0_pb7 { + nvidia,pins = "sdmmc3_dat0_pb7"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + uart3_rts_n_pc0 { + nvidia,pins = "uart3_rts_n_pc0"; + nvidia,function = "uartc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_pwr1_pc1 { + nvidia,pins = "lcd_pwr1_pc1"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + uart2_txd_pc2 { + nvidia,pins = "uart2_txd_pc2"; + nvidia,function = "uartb"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + uart2_rxd_pc3 { + nvidia,pins = "uart2_rxd_pc3"; + nvidia,function = "uartb"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gen1_i2c_scl_pc4 { + nvidia,pins = "gen1_i2c_scl_pc4"; + nvidia,function = "i2c1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + gen1_i2c_sda_pc5 { + nvidia,pins = "gen1_i2c_sda_pc5"; + nvidia,function = "i2c1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + lcd_pwr2_pc6 { + nvidia,pins = "lcd_pwr2_pc6"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_wp_n_pc7 { + nvidia,pins = "gmi_wp_n_pc7"; + nvidia,function = "gmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_dat5_pd0 { + nvidia,pins = "sdmmc3_dat5_pd0"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_dat4_pd1 { + nvidia,pins = "sdmmc3_dat4_pd1"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_dc1_pd2 { + nvidia,pins = "lcd_dc1_pd2"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_dat6_pd3 { + nvidia,pins = "sdmmc3_dat6_pd3"; + nvidia,function = "spi4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc3_dat7_pd4 { + nvidia,pins = "sdmmc3_dat7_pd4"; + nvidia,function = "spi4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d1_pd5 { + nvidia,pins = "vi_d1_pd5"; + nvidia,function = "sdmmc2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_vsync_pd6 { + nvidia,pins = "vi_vsync_pd6"; + nvidia,function = "ddr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_hsync_pd7 { + nvidia,pins = "vi_hsync_pd7"; + nvidia,function = "ddr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d0_pe0 { + nvidia,pins = "lcd_d0_pe0"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d1_pe1 { + nvidia,pins = "lcd_d1_pe1"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d2_pe2 { + nvidia,pins = "lcd_d2_pe2"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d3_pe3 { + nvidia,pins = "lcd_d3_pe3"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d4_pe4 { + nvidia,pins = "lcd_d4_pe4"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d5_pe5 { + nvidia,pins = "lcd_d5_pe5"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d6_pe6 { + nvidia,pins = "lcd_d6_pe6"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d7_pe7 { + nvidia,pins = "lcd_d7_pe7"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d8_pf0 { + nvidia,pins = "lcd_d8_pf0"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d9_pf1 { + nvidia,pins = "lcd_d9_pf1"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d10_pf2 { + nvidia,pins = "lcd_d10_pf2"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d11_pf3 { + nvidia,pins = "lcd_d11_pf3"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d12_pf4 { + nvidia,pins = "lcd_d12_pf4"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d13_pf5 { + nvidia,pins = "lcd_d13_pf5"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d14_pf6 { + nvidia,pins = "lcd_d14_pf6"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d15_pf7 { + nvidia,pins = "lcd_d15_pf7"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad0_pg0 { + nvidia,pins = "gmi_ad0_pg0"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad1_pg1 { + nvidia,pins = "gmi_ad1_pg1"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad2_pg2 { + nvidia,pins = "gmi_ad2_pg2"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad3_pg3 { + nvidia,pins = "gmi_ad3_pg3"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad4_pg4 { + nvidia,pins = "gmi_ad4_pg4"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad5_pg5 { + nvidia,pins = "gmi_ad5_pg5"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad6_pg6 { + nvidia,pins = "gmi_ad6_pg6"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad7_pg7 { + nvidia,pins = "gmi_ad7_pg7"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad8_ph0 { + nvidia,pins = "gmi_ad8_ph0"; + nvidia,function = "pwm0"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad9_ph1 { + nvidia,pins = "gmi_ad9_ph1"; + nvidia,function = "pwm1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad10_ph2 { + nvidia,pins = "gmi_ad10_ph2"; + nvidia,function = "pwm2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad11_ph3 { + nvidia,pins = "gmi_ad11_ph3"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad12_ph4 { + nvidia,pins = "gmi_ad12_ph4"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad13_ph5 { + nvidia,pins = "gmi_ad13_ph5"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_ad14_ph6 { + nvidia,pins = "gmi_ad14_ph6"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_wr_n_pi0 { + nvidia,pins = "gmi_wr_n_pi0"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_oe_n_pi1 { + nvidia,pins = "gmi_oe_n_pi1"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_dqs_pi2 { + nvidia,pins = "gmi_dqs_pi2"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_iordy_pi5 { + nvidia,pins = "gmi_iordy_pi5"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_cs7_n_pi6 { + nvidia,pins = "gmi_cs7_n_pi6"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_wait_pi7 { + nvidia,pins = "gmi_wait_pi7"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_de_pj1 { + nvidia,pins = "lcd_de_pj1"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_cs1_n_pj2 { + nvidia,pins = "gmi_cs1_n_pj2"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_hsync_pj3 { + nvidia,pins = "lcd_hsync_pj3"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_vsync_pj4 { + nvidia,pins = "lcd_vsync_pj4"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + uart2_cts_n_pj5 { + nvidia,pins = "uart2_cts_n_pj5"; + nvidia,function = "uartb"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + uart2_rts_n_pj6 { + nvidia,pins = "uart2_rts_n_pj6"; + nvidia,function = "uartb"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_a16_pj7 { + nvidia,pins = "gmi_a16_pj7"; + nvidia,function = "spi4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_adv_n_pk0 { + nvidia,pins = "gmi_adv_n_pk0"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_clk_pk1 { + nvidia,pins = "gmi_clk_pk1"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_cs2_n_pk3 { + nvidia,pins = "gmi_cs2_n_pk3"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_cs3_n_pk4 { + nvidia,pins = "gmi_cs3_n_pk4"; + nvidia,function = "nand"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + spdif_out_pk5 { + nvidia,pins = "spdif_out_pk5"; + nvidia,function = "spdif"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + spdif_in_pk6 { + nvidia,pins = "spdif_in_pk6"; + nvidia,function = "spdif"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gmi_a19_pk7 { + nvidia,pins = "gmi_a19_pk7"; + nvidia,function = "spi4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d2_pl0 { + nvidia,pins = "vi_d2_pl0"; + nvidia,function = "sdmmc2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d3_pl1 { + nvidia,pins = "vi_d3_pl1"; + nvidia,function = "sdmmc2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d4_pl2 { + nvidia,pins = "vi_d4_pl2"; + nvidia,function = "vi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d5_pl3 { + nvidia,pins = "vi_d5_pl3"; + nvidia,function = "sdmmc2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d6_pl4 { + nvidia,pins = "vi_d6_pl4"; + nvidia,function = "vi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d7_pl5 { + nvidia,pins = "vi_d7_pl5"; + nvidia,function = "sdmmc2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d8_pl6 { + nvidia,pins = "vi_d8_pl6"; + nvidia,function = "sdmmc2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d9_pl7 { + nvidia,pins = "vi_d9_pl7"; + nvidia,function = "sdmmc2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d16_pm0 { + nvidia,pins = "lcd_d16_pm0"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d17_pm1 { + nvidia,pins = "lcd_d17_pm1"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d18_pm2 { + nvidia,pins = "lcd_d18_pm2"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d19_pm3 { + nvidia,pins = "lcd_d19_pm3"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d20_pm4 { + nvidia,pins = "lcd_d20_pm4"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d21_pm5 { + nvidia,pins = "lcd_d21_pm5"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d22_pm6 { + nvidia,pins = "lcd_d22_pm6"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_d23_pm7 { + nvidia,pins = "lcd_d23_pm7"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap1_fs_pn0 { + nvidia,pins = "dap1_fs_pn0"; + nvidia,function = "i2s0"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap1_din_pn1 { + nvidia,pins = "dap1_din_pn1"; + nvidia,function = "i2s0"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap1_dout_pn2 { + nvidia,pins = "dap1_dout_pn2"; + nvidia,function = "i2s0"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap1_sclk_pn3 { + nvidia,pins = "dap1_sclk_pn3"; + nvidia,function = "i2s0"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_cs0_n_pn4 { + nvidia,pins = "lcd_cs0_n_pn4"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_sdout_pn5 { + nvidia,pins = "lcd_sdout_pn5"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_dc0_pn6 { + nvidia,pins = "lcd_dc0_pn6"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + hdmi_int_pn7 { + nvidia,pins = "hdmi_int_pn7"; + nvidia,function = "hdmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_data7_po0 { + nvidia,pins = "ulpi_data7_po0"; + nvidia,function = "uarta"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_data0_po1 { + nvidia,pins = "ulpi_data0_po1"; + nvidia,function = "uarta"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_data1_po2 { + nvidia,pins = "ulpi_data1_po2"; + nvidia,function = "uarta"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_data2_po3 { + nvidia,pins = "ulpi_data2_po3"; + nvidia,function = "uarta"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_data3_po4 { + nvidia,pins = "ulpi_data3_po4"; + nvidia,function = "uarta"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_data4_po5 { + nvidia,pins = "ulpi_data4_po5"; + nvidia,function = "uarta"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_data5_po6 { + nvidia,pins = "ulpi_data5_po6"; + nvidia,function = "uarta"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_data6_po7 { + nvidia,pins = "ulpi_data6_po7"; + nvidia,function = "uarta"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap3_fs_pp0 { + nvidia,pins = "dap3_fs_pp0"; + nvidia,function = "i2s2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap3_din_pp1 { + nvidia,pins = "dap3_din_pp1"; + nvidia,function = "i2s2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap3_dout_pp2 { + nvidia,pins = "dap3_dout_pp2"; + nvidia,function = "i2s2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap3_sclk_pp3 { + nvidia,pins = "dap3_sclk_pp3"; + nvidia,function = "i2s2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap4_fs_pp4 { + nvidia,pins = "dap4_fs_pp4"; + nvidia,function = "i2s3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap4_din_pp5 { + nvidia,pins = "dap4_din_pp5"; + nvidia,function = "i2s3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap4_dout_pp6 { + nvidia,pins = "dap4_dout_pp6"; + nvidia,function = "i2s3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + dap4_sclk_pp7 { + nvidia,pins = "dap4_sclk_pp7"; + nvidia,function = "i2s3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_col0_pq0 { + nvidia,pins = "kb_col0_pq0"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_col1_pq1 { + nvidia,pins = "kb_col1_pq1"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_col2_pq2 { + nvidia,pins = "kb_col2_pq2"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_col3_pq3 { + nvidia,pins = "kb_col3_pq3"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_col4_pq4 { + nvidia,pins = "kb_col4_pq4"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_col5_pq5 { + nvidia,pins = "kb_col5_pq5"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_col6_pq6 { + nvidia,pins = "kb_col6_pq6"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_col7_pq7 { + nvidia,pins = "kb_col7_pq7"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row0_pr0 { + nvidia,pins = "kb_row0_pr0"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row1_pr1 { + nvidia,pins = "kb_row1_pr1"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row2_pr2 { + nvidia,pins = "kb_row2_pr2"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row3_pr3 { + nvidia,pins = "kb_row3_pr3"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row4_pr4 { + nvidia,pins = "kb_row4_pr4"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row5_pr5 { + nvidia,pins = "kb_row5_pr5"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row6_pr6 { + nvidia,pins = "kb_row6_pr6"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row7_pr7 { + nvidia,pins = "kb_row7_pr7"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row8_ps0 { + nvidia,pins = "kb_row8_ps0"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row9_ps1 { + nvidia,pins = "kb_row9_ps1"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row10_ps2 { + nvidia,pins = "kb_row10_ps2"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row11_ps3 { + nvidia,pins = "kb_row11_ps3"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row12_ps4 { + nvidia,pins = "kb_row12_ps4"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row13_ps5 { + nvidia,pins = "kb_row13_ps5"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row14_ps6 { + nvidia,pins = "kb_row14_ps6"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + kb_row15_ps7 { + nvidia,pins = "kb_row15_ps7"; + nvidia,function = "kbc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_pclk_pt0 { + nvidia,pins = "vi_pclk_pt0"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_mclk_pt1 { + nvidia,pins = "vi_mclk_pt1"; + nvidia,function = "vi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d10_pt2 { + nvidia,pins = "vi_d10_pt2"; + nvidia,function = "ddr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d11_pt3 { + nvidia,pins = "vi_d11_pt3"; + nvidia,function = "ddr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + vi_d0_pt4 { + nvidia,pins = "vi_d0_pt4"; + nvidia,function = "ddr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + gen2_i2c_scl_pt5 { + nvidia,pins = "gen2_i2c_scl_pt5"; + nvidia,function = "i2c2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + gen2_i2c_sda_pt6 { + nvidia,pins = "gen2_i2c_sda_pt6"; + nvidia,function = "i2c2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + pu0 { + nvidia,pins = "pu0"; + nvidia,function = "owr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pu1 { + nvidia,pins = "pu1"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pu2 { + nvidia,pins = "pu2"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pu3 { + nvidia,pins = "pu3"; + nvidia,function = "pwm0"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pu4 { + nvidia,pins = "pu4"; + nvidia,function = "pwm1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pu5 { + nvidia,pins = "pu5"; + nvidia,function = "rsvd4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pu6 { + nvidia,pins = "pu6"; + nvidia,function = "pwm3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + jtag_rtck_pu7 { + nvidia,pins = "jtag_rtck_pu7"; + nvidia,function = "rtck"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pv0 { + nvidia,pins = "pv0"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pv1 { + nvidia,pins = "pv1"; + nvidia,function = "rsvd1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pv2 { + nvidia,pins = "pv2"; + nvidia,function = "owr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pv3 { + nvidia,pins = "pv3"; + nvidia,function = "clk_12m_out"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ddc_scl_pv4 { + nvidia,pins = "ddc_scl_pv4"; + nvidia,function = "i2c4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ddc_sda_pv5 { + nvidia,pins = "ddc_sda_pv5"; + nvidia,function = "i2c4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + crt_hsync_pv6 { + nvidia,pins = "crt_hsync_pv6"; + nvidia,function = "crt"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + crt_vsync_pv7 { + nvidia,pins = "crt_vsync_pv7"; + nvidia,function = "crt"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_cs1_n_pw0 { + nvidia,pins = "lcd_cs1_n_pw0"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_m1_pw1 { + nvidia,pins = "lcd_m1_pw1"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + spi2_cs1_n_pw2 { + nvidia,pins = "spi2_cs1_n_pw2"; + nvidia,function = "spi2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + clk1_out_pw4 { + nvidia,pins = "clk1_out_pw4"; + nvidia,function = "extperiph1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + clk2_out_pw5 { + nvidia,pins = "clk2_out_pw5"; + nvidia,function = "extperiph2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + uart3_txd_pw6 { + nvidia,pins = "uart3_txd_pw6"; + nvidia,function = "uartc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + uart3_rxd_pw7 { + nvidia,pins = "uart3_rxd_pw7"; + nvidia,function = "uartc"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + spi2_sck_px2 { + nvidia,pins = "spi2_sck_px2"; + nvidia,function = "gmi"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + spi1_mosi_px4 { + nvidia,pins = "spi1_mosi_px4"; + nvidia,function = "spi1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + spi1_sck_px5 { + nvidia,pins = "spi1_sck_px5"; + nvidia,function = "spi1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + spi1_cs0_n_px6 { + nvidia,pins = "spi1_cs0_n_px6"; + nvidia,function = "spi1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + spi1_miso_px7 { + nvidia,pins = "spi1_miso_px7"; + nvidia,function = "spi1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_clk_py0 { + nvidia,pins = "ulpi_clk_py0"; + nvidia,function = "uartd"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_dir_py1 { + nvidia,pins = "ulpi_dir_py1"; + nvidia,function = "uartd"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_nxt_py2 { + nvidia,pins = "ulpi_nxt_py2"; + nvidia,function = "uartd"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + ulpi_stp_py3 { + nvidia,pins = "ulpi_stp_py3"; + nvidia,function = "uartd"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc1_dat3_py4 { + nvidia,pins = "sdmmc1_dat3_py4"; + nvidia,function = "sdmmc1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc1_dat2_py5 { + nvidia,pins = "sdmmc1_dat2_py5"; + nvidia,function = "sdmmc1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc1_dat1_py6 { + nvidia,pins = "sdmmc1_dat1_py6"; + nvidia,function = "sdmmc1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc1_dat0_py7 { + nvidia,pins = "sdmmc1_dat0_py7"; + nvidia,function = "sdmmc1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc1_clk_pz0 { + nvidia,pins = "sdmmc1_clk_pz0"; + nvidia,function = "sdmmc1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sdmmc1_cmd_pz1 { + nvidia,pins = "sdmmc1_cmd_pz1"; + nvidia,function = "sdmmc1"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_sdin_pz2 { + nvidia,pins = "lcd_sdin_pz2"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_wr_n_pz3 { + nvidia,pins = "lcd_wr_n_pz3"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + lcd_sck_pz4 { + nvidia,pins = "lcd_sck_pz4"; + nvidia,function = "displaya"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + sys_clk_req_pz5 { + nvidia,pins = "sys_clk_req_pz5"; + nvidia,function = "sysclk"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pwr_i2c_scl_pz6 { + nvidia,pins = "pwr_i2c_scl_pz6"; + nvidia,function = "i2cpwr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + pwr_i2c_sda_pz7 { + nvidia,pins = "pwr_i2c_sda_pz7"; + nvidia,function = "i2cpwr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + pbb0 { + nvidia,pins = "pbb0"; + nvidia,function = "i2s4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + cam_i2c_scl_pbb1 { + nvidia,pins = "cam_i2c_scl_pbb1"; + nvidia,function = "i2c3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + cam_i2c_sda_pbb2 { + nvidia,pins = "cam_i2c_sda_pbb2"; + nvidia,function = "i2c3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + pbb3 { + nvidia,pins = "pbb3"; + nvidia,function = "vgp3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pbb4 { + nvidia,pins = "pbb4"; + nvidia,function = "vgp4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pbb5 { + nvidia,pins = "pbb5"; + nvidia,function = "vgp5"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pbb6 { + nvidia,pins = "pbb6"; + nvidia,function = "vgp6"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pbb7 { + nvidia,pins = "pbb7"; + nvidia,function = "i2s4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pcc1 { + nvidia,pins = "pcc1"; + nvidia,function = "i2s4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pcc2 { + nvidia,pins = "pcc2"; + nvidia,function = "i2s4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + clk2_req_pcc5 { + nvidia,pins = "clk2_req_pcc5"; + nvidia,function = "dap"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l2_rst_n_pcc6 { + nvidia,pins = "pex_l2_rst_n_pcc6"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l2_clkreq_n_pcc7 { + nvidia,pins = "pex_l2_clkreq_n_pcc7"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l0_prsnt_n_pdd0 { + nvidia,pins = "pex_l0_prsnt_n_pdd0"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l0_rst_n_pdd1 { + nvidia,pins = "pex_l0_rst_n_pdd1"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l0_clkreq_n_pdd2 { + nvidia,pins = "pex_l0_clkreq_n_pdd2"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_wake_n_pdd3 { + nvidia,pins = "pex_wake_n_pdd3"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l1_prsnt_n_pdd4 { + nvidia,pins = "pex_l1_prsnt_n_pdd4"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l1_rst_n_pdd5 { + nvidia,pins = "pex_l1_rst_n_pdd5"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l1_clkreq_n_pdd6 { + nvidia,pins = "pex_l1_clkreq_n_pdd6"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + pex_l2_prsnt_n_pdd7 { + nvidia,pins = "pex_l2_prsnt_n_pdd7"; + nvidia,function = "pcie"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + clk3_out_pee0 { + nvidia,pins = "clk3_out_pee0"; + nvidia,function = "extperiph3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + clk3_req_pee1 { + nvidia,pins = "clk3_req_pee1"; + nvidia,function = "dev3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + clk1_req_pee2 { + nvidia,pins = "clk1_req_pee2"; + nvidia,function = "dap"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + hdmi_cec_pee3 { + nvidia,pins = "hdmi_cec_pee3"; + nvidia,function = "cec"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,open-drain = ; + }; + + owr { + nvidia,pins = "owr"; + nvidia,function = "owr"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + /* SDMMC4 pinmux */ + sdmmc4_clk { + nvidia,pins = "sdmmc4_clk_pcc4"; + nvidia,function = "sdmmc4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,lock = ; + nvidia,io-reset = ; + }; + sdmmc4_cmd { + nvidia,pins = "sdmmc4_cmd_pt7", + "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + nvidia,lock = ; + nvidia,io-reset = ; + }; + sdmmc4_rst_n { + nvidia,pins = "sdmmc4_rst_n_pcc3"; + nvidia,function = "rsvd2"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + cam_mclk { + nvidia,pins = "cam_mclk_pcc0"; + nvidia,function = "vi_alt3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; + + drive_groups { + nvidia,pins = "drive_gma", + "drive_gmb", + "drive_gmc", + "drive_gmd"; + nvidia,pull-down-strength = <9>; + nvidia,pull-up-strength = <9>; + nvidia,slew-rate-rising = ; + nvidia,slew-rate-falling = ; + }; + }; + }; + + uartd: serial@70006300 { + status = "okay"; + }; + + hdmi_ddc: i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + pwr_i2c: i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + pmic: pmic@2d { + compatible = "ti,tps65911"; + reg = <0x2d>; + + interrupts = ; + #interrupt-cells = <2>; + interrupt-controller; + wakeup-source; + + ti,en-gpio-sleep = <0 1 1 1 1 1 0 0 1>; + ti,system-power-controller; + ti,sleep-keep-ck32k; + ti,sleep-enable; + + #gpio-cells = <2>; + gpio-controller; + + regulators { + vdd_1v8: vddio { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo7_reg: ldo7 { + regulator-name = "vdd_pllm,x,u,a_p_c_s"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + }; + }; + }; + }; + + sdmmc4: sdhci@78000600 { + status = "okay"; + bus-width = <8>; + non-removable; + + vmmc-supply = <&sys_3v3_reg>; + vqmmc-supply = <&vdd_1v8>; + }; + + micro_usb: usb@7d000000 { + status = "okay"; + dr_mode = "otg"; + }; + + usb-phy@7d000000 { + status = "okay"; + }; + + ethernet_usb: usb@7d004000 { + status = "okay"; + nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 5) GPIO_ACTIVE_HIGH>; + + #address-cells = <1>; + #size-cells = <0>; + + /* SMSC 10/100T Ethernet Controller */ + ethernet@2 { + compatible = "usb424,9e00"; + reg = <2>; + local-mac-address = [00 11 22 33 44 55]; + }; + }; + + usb-phy@7d004000 { + status = "okay"; + }; + + fullsize_usb: usb@7d008000 { + status = "okay"; + nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>; + }; + + usb-phy@7d008000 { + status = "okay"; + }; + + /* PMIC has a built-in 32KHz oscillator which is used by PMC */ + clk32k_in: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "pmic-oscillator"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + key-power { + label = "Power"; + gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-power { + label = "power-led"; + gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; + default-state = "on"; + linux,default-trigger = "heartbeat"; + retain-state-suspended; + }; + }; + + sys_3v3_reg: regulator-sys-3v3 { + compatible = "regulator-fixed"; + regulator-name = "sys_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_vid_reg: regulator-vdd-vid { + compatible = "regulator-fixed"; + regulator-name = "vddio_vid"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; diff --git a/arch/arm/mach-tegra/tegra30/Kconfig b/arch/arm/mach-tegra/tegra30/Kconfig index e0f054af8e0..b5099ce67fc 100644 --- a/arch/arm/mach-tegra/tegra30/Kconfig +++ b/arch/arm/mach-tegra/tegra30/Kconfig @@ -32,6 +32,10 @@ config TARGET_IDEAPAD_YOGA_11 bool "Lenovo Ideapad Yoga 11 board" select BOARD_LATE_INIT +config TARGET_OUYA + bool "Ouya Game Console board" + select BOARD_LATE_INIT + config TARGET_QC750 bool "Wexler QC750 board" select BOARD_LATE_INIT @@ -64,6 +68,7 @@ source "board/toradex/colibri_t30/Kconfig" source "board/htc/endeavoru/Kconfig" source "board/asus/grouper/Kconfig" source "board/lenovo/ideapad-yoga-11/Kconfig" +source "board/ouya/ouya/Kconfig" source "board/wexler/qc750/Kconfig" source "board/microsoft/surface-rt/Kconfig" source "board/avionic-design/tec-ng/Kconfig" diff --git a/board/ouya/ouya/Kconfig b/board/ouya/ouya/Kconfig new file mode 100644 index 00000000000..6bab40ce933 --- /dev/null +++ b/board/ouya/ouya/Kconfig @@ -0,0 +1,12 @@ +if TARGET_OUYA + +config SYS_BOARD + default "ouya" + +config SYS_VENDOR + default "ouya" + +config SYS_CONFIG_NAME + default "ouya" + +endif diff --git a/board/ouya/ouya/MAINTAINERS b/board/ouya/ouya/MAINTAINERS new file mode 100644 index 00000000000..7f664b2e65f --- /dev/null +++ b/board/ouya/ouya/MAINTAINERS @@ -0,0 +1,8 @@ +OUYA BOARD +M: Svyatoslav Ryhel +M: Peter Geis +S: Maintained +F: board/ouya/ouya/ +F: configs/ouya_defconfig +F: doc/board/ouya/ouya.rst +F: include/configs/ouya.h diff --git a/board/ouya/ouya/Makefile b/board/ouya/ouya/Makefile new file mode 100644 index 00000000000..d479ec83e5e --- /dev/null +++ b/board/ouya/ouya/Makefile @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2010-2012 +# NVIDIA Corporation +# +# (C) Copyright 2021 +# Svyatoslav Ryhel + +obj-$(CONFIG_XPL_BUILD) += ouya-spl.o + +obj-y += ouya.o diff --git a/board/ouya/ouya/ouya-spl.c b/board/ouya/ouya/ouya-spl.c new file mode 100644 index 00000000000..1f45853c8be --- /dev/null +++ b/board/ouya/ouya/ouya-spl.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * T30 Ouya SPL stage configuration + * + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2025 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +#define TPS65911_I2C_ADDR (0x2D << 1) +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +#define TPS62361B_I2C_ADDR (0x60 << 1) +#define TPS62361B_SET3_REG 0x03 +#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS62361B_I2C_ADDR, TPS62361B_SET3_DATA); + + udelay(1000); + + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} diff --git a/board/ouya/ouya/ouya.c b/board/ouya/ouya/ouya.c new file mode 100644 index 00000000000..6d6eb54afe2 --- /dev/null +++ b/board/ouya/ouya/ouya.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2025 + * Svyatoslav Ryhel + */ + +#include + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, struct bd_info *bd) +{ + /* Remove TrustZone nodes */ + fdt_del_node_and_alias(blob, "/firmware"); + fdt_del_node_and_alias(blob, "/reserved-memory/trustzone@bfe00000"); + + return 0; +} +#endif diff --git a/board/ouya/ouya/ouya.env b/board/ouya/ouya/ouya.env new file mode 100644 index 00000000000..6ec881b910a --- /dev/null +++ b/board/ouya/ouya/ouya.env @@ -0,0 +1,12 @@ +#include + +partitions=name=emmc,start=0,size=-,uuid=${uuid_gpt_rootfs} +boot_interface=usb + +bootmenu_0=mount internal storage=usb start && ums 0 mmc 0; bootmenu +bootmenu_1=fastboot=echo Starting Fastboot protocol ...; fastboot usb 0; bootmenu +bootmenu_2=update bootloader=run flash_uboot +bootmenu_3=reboot RCM=enterrcm +bootmenu_4=reboot=reset +bootmenu_5=power off=poweroff +bootmenu_delay=-1 diff --git a/configs/ouya_defconfig b/configs/ouya_defconfig new file mode 100644 index 00000000000..ccd6ae4d36f --- /dev/null +++ b/configs/ouya_defconfig @@ -0,0 +1,86 @@ +CONFIG_ARM=y +CONFIG_ARCH_TEGRA=y +CONFIG_SUPPORT_PASSING_ATAGS=y +CONFIG_CMDLINE_TAG=y +CONFIG_INITRD_TAG=y +CONFIG_TEXT_BASE=0x80110000 +CONFIG_NR_DRAM_BANKS=2 +CONFIG_ENV_SOURCE_FILE="ouya" +CONFIG_ENV_SIZE=0x3000 +CONFIG_ENV_OFFSET=0xFFFFD000 +CONFIG_DEFAULT_DEVICE_TREE="tegra30-ouya" +CONFIG_SPL_STACK=0x800ffffc +CONFIG_SPL_TEXT_BASE=0x80108000 +CONFIG_SYS_LOAD_ADDR=0x82000000 +CONFIG_TEGRA30=y +CONFIG_TARGET_OUYA=y +CONFIG_TEGRA_ENABLE_UARTD=y +CONFIG_CMD_EBTUPDATE=y +CONFIG_BUTTON_CMD=y +CONFIG_BOOTDELAY=3 +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_BOOTCOMMAND="bootflow scan; echo 'Boot configuration not found... Power off in 3 sec'; sleep 3; poweroff" +CONFIG_USE_PREBOOT=y +CONFIG_SYS_PBSIZE=2084 +CONFIG_SPL_FOOTPRINT_LIMIT=y +CONFIG_SPL_MAX_FOOTPRINT=0x8000 +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SYS_MALLOC=y +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x80090000 +CONFIG_SPL_SYS_MALLOC_SIZE=0x10000 +CONFIG_SYS_PROMPT="Tegra30 (Ouya) # " +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_UMS_ABORT_KEYED=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PAUSE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_PART=2 +CONFIG_BUTTON=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x91000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_GPIO_HOG=y +CONFIG_SYS_I2C_TEGRA=y +CONFIG_BUTTON_KEYBOARD=y +CONFIG_LED=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_TPS65910=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_TPS65911=y +CONFIG_PWM_TEGRA=y +CONFIG_SYS_NS16550=y +CONFIG_SYSRESET_TPS65910=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TEGRA=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_LOGO is not set +CONFIG_I2C_EDID_STANDARD=y +CONFIG_VIDEO_BRIDGE=y +CONFIG_VIDEO_HDMI_TEGRA=y diff --git a/doc/board/index.rst b/doc/board/index.rst index 84c135e02c1..7ad1137c94a 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -43,6 +43,7 @@ Board-specific doc microsoft/index nxp/index openpiton/index + ouya/index phytec/index purism/index qualcomm/index diff --git a/doc/board/ouya/index.rst b/doc/board/ouya/index.rst new file mode 100644 index 00000000000..7413240a1b8 --- /dev/null +++ b/doc/board/ouya/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +OUYA +==== + +.. toctree:: + :maxdepth: 2 + + ouya diff --git a/doc/board/ouya/ouya.rst b/doc/board/ouya/ouya.rst new file mode 100644 index 00000000000..641affc6294 --- /dev/null +++ b/doc/board/ouya/ouya.rst @@ -0,0 +1,124 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for the Ouya Game Console (ouya) +======================================= + +``DISCLAMER!`` Moving your Ouya to use U-Boot assumes replacement of the +vendor bootloader. Vendor android firmwares will no longer be able to run on the +device. This replacement IS reversible. + +Quick Start +----------- + +- Build U-Boot +- Process U-Boot +- Flashing U-Boot into the eMMC +- Boot +- Self Upgrading + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=arm-none-eabi- + $ make ouya_defconfig + $ make + +After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin`` +image, ready for further processing. + +Process U-Boot +-------------- + +``DISCLAMER!`` All questions related to the re-crypt work should be asked +in re-crypt repo issues. NOT HERE! + +re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form +usable by device. This process is required only on the first installation or +to recover the device in case of a failed update. + +Permanent installation can be performed either by using the nv3p protocol or by +pre-loading just built U-Boot into RAM. + +Processing for the NV3P protocol +******************************** + +.. code-block:: bash + + $ git clone https://gitlab.com/grate-driver/re-crypt.git + $ cd re-crypt # place your u-boot-dtb-tegra.bin here + $ ./re-crypt.py --dev ouya + +The script will produce a ``repart-block.bin`` ready to flash. + +Processing for pre-loaded U-Boot +******************************** + +The procedure is the same, but the ``--split`` argument is used with the +``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready +to flash. + +Flashing U-Boot into the eMMC +----------------------------- + +Permanent installation can be performed either by using the nv3p protocol or by +pre-loading just built U-Boot into RAM. Regardless of the method bct and bootloader +will end up in boot0 and boot1 partitions of eMMC. + +Flashing with the NV3P protocol +******************************* + +``DISCLAMER!`` All questions related to NvFlash should be asked in the proper +place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before! + +Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can +enter it by pre-loading vendor bootloader with the Fusée Gelée. + +With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in +encrypted state in form, which can just be written RAW at the start of eMMC. + +.. code-block:: bash + + $ ./run_bootloader.sh -s T30 -t ./bct/ouya.bct -b android_bootloader.bin + $ ./utiils/nvflash_v1.13.87205 --resume --rawdevicewrite 0 1024 repart-block.bin + +When flashing is done, reboot the device. + +Flashing with a pre-loaded U-Boot +********************************* + +U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently +U-Boot supports bootmenu entry fastboot, which allows to write a processed copy +of U-Boot permanently into eMMC. + +While pre-loading U-Boot, interrupt bootflow by pressing ``CTRL + C`` (USB keyboard +must be plugged in before U-Boot is preloaded, else it will not work), input +``bootmenu`` from the keyboard and hit enter. The bootmenu will appear. There, select +``fastboot`` using the up and down arrows and enter key. After, on host PC, do: + +.. code-block:: bash + + $ fastboot flash 0.1 bct.img + $ fastboot flash 0.2 ebt.img + $ fastboot reboot + +Device will reboot. + +Boot +---- + +To boot Linux, U-Boot will look for an ``extlinux.conf`` on eMMC. Additionally, +bootmenu provides entries to mount eMMC as mass storage, fastboot, reboot, +reboot RCM, poweroff, enter U-Boot console and update bootloader (check +the next chapter). + +Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows +the user to use/partition it in any way the user desires. + +Self Upgrading +-------------- + +Place your ``u-boot-dtb-tegra.bin`` on the first partition of the USB. Enter +bootmenu, choose update bootloader option with Enter and U-Boot should update +itself. Once the process is completed, U-Boot will ask to press any button to reboot. diff --git a/include/configs/ouya.h b/include/configs/ouya.h new file mode 100644 index 00000000000..cc86c1002e3 --- /dev/null +++ b/include/configs/ouya.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2010,2012 + * NVIDIA Corporation + * + * (C) Copyright 2025 + * Svyatoslav Ryhel + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "tegra30-common.h" + +/* High-level configuration options */ +#define CFG_TEGRA_BOARD_STRING "Ouya Game Console" + +/* Board-specific serial config */ +#define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ diff --git a/include/env/nvidia/prod_upd.env b/include/env/nvidia/prod_upd.env index f4e381994be..6a457d1b75b 100644 --- a/include/env/nvidia/prod_upd.env +++ b/include/env/nvidia/prod_upd.env @@ -3,6 +3,7 @@ boot_block_size=0x1000 bootloader_file=u-boot-dtb-tegra.bin spi_size=0x400000 boot_dev=0 +boot_interface=mmc flash_uboot=echo Preparing RAM; mw ${kernel_addr_r} 0 ${boot_block_size_r}; @@ -11,9 +12,9 @@ flash_uboot=echo Preparing RAM; mmc dev 0 1; mmc read ${kernel_addr_r} 0 ${boot_block_size}; echo Reading bootloader; - if load mmc ${boot_dev}:1 ${ramdisk_addr_r} ${bootloader_file}; + if load ${boot_interface} ${boot_dev}:1 ${ramdisk_addr_r} ${bootloader_file}; then echo Calculating bootloader size; - size mmc ${boot_dev}:1 ${bootloader_file}; + size ${boot_interface} ${boot_dev}:1 ${bootloader_file}; ebtupdate ${kernel_addr_r} ${ramdisk_addr_r} ${filesize}; echo Writing bootloader to eMMC; mmc dev 0 1; -- cgit v1.3.1 From dda454e933c636b225eef325f5f2b815ed01ac2e Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Tue, 18 Mar 2025 18:38:33 -0500 Subject: serial: mxc: Support bulk enabling clocks Depending on the platform, there may be multiple clock sources required to enable a UART. Use the bulk functions to get and enable the clocks when the UART probes. This can facilitate the removal of functions to manually enable the clock. This is made dependent on CLK_CCF which is used on imx6q, imx8m[mnqp], several imxrt, imx9. If/when the UART clock registration is done for older boards, this limitation could be updated. Signed-off-by: Adam Ford Reviewed-by: Peng Fan --- drivers/serial/serial_mxc.c | 11 +++++++++++ include/dm/platform_data/serial_mxc.h | 3 +++ 2 files changed, 14 insertions(+) (limited to 'include') diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c index c5fd740be4d..28f4435d01d 100644 --- a/drivers/serial/serial_mxc.c +++ b/drivers/serial/serial_mxc.c @@ -3,6 +3,7 @@ * (c) 2007 Sascha Hauer */ +#include #include #include #include @@ -312,7 +313,17 @@ int mxc_serial_setbrg(struct udevice *dev, int baudrate) static int mxc_serial_probe(struct udevice *dev) { struct mxc_serial_plat *plat = dev_get_plat(dev); +#if CONFIG_IS_ENABLED(CLK_CCF) + int ret; + ret = clk_get_bulk(dev, &plat->clks); + if (ret) + return ret; + + ret = clk_enable_bulk(&plat->clks); + if (ret) + return ret; +#endif _mxc_serial_init(plat->reg, plat->use_dte); return 0; diff --git a/include/dm/platform_data/serial_mxc.h b/include/dm/platform_data/serial_mxc.h index cc59eeb1dd1..52657aa3deb 100644 --- a/include/dm/platform_data/serial_mxc.h +++ b/include/dm/platform_data/serial_mxc.h @@ -9,6 +9,9 @@ /* Information about a serial port */ struct mxc_serial_plat { struct mxc_uart *reg; /* address of registers in physical memory */ +#if CONFIG_IS_ENABLED(CLK_CCF) + struct clk_bulk clks; +#endif bool use_dte; }; -- cgit v1.3.1 From 1054163c4dc79eef2732d1129990d47827ae1c06 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Mar 2025 16:58:30 +0100 Subject: clk: Add clk_resolve_parent_clk() Add clk_resolve_parent_clk() to resolve parent clock udevice name based on clock-names DT property. This is used in SoC clock drivers to look up the clock name in clock tables, which matches a clock name in DT clock-names property, and convert it into udevice name which is used by U-Boot clock framework to look up parent clock in e.g. clk_register() using uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent); Signed-off-by: Marek Vasut --- drivers/clk/clk-uclass.c | 18 ++++++++++++++++++ include/clk.h | 9 +++++++++ 2 files changed, 27 insertions(+) (limited to 'include') diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index 353ae476068..90b70529a47 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -420,6 +420,24 @@ int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk) return clk_get_by_index_nodev(node, index, clk); } +const char * +clk_resolve_parent_clk(struct udevice *dev, const char *name) +{ + struct udevice *parent; + struct clk clk; + int ret; + + ret = uclass_get_device_by_name(UCLASS_CLK, name, &parent); + if (!ret) + return name; + + ret = clk_get_by_name(dev, name, &clk); + if (!clk.dev) + return name; + + return clk.dev->name; +} + int clk_release_all(struct clk *clk, unsigned int count) { unsigned int i; diff --git a/include/clk.h b/include/clk.h index 045e923a529..a6ef4e02692 100644 --- a/include/clk.h +++ b/include/clk.h @@ -350,6 +350,15 @@ static inline int clk_get_by_name_nodev_optional(ofnode node, const char *name, return ret; } +/** + * clk_resolve_parent_clk - Determine name of clock udevice based on clock-names + * @dev: The client udevice. + * @name: The name of the clock to look up. + * + * Return name of the clock udevice which represents clock with clock-names name. + */ +const char *clk_resolve_parent_clk(struct udevice *dev, const char *name); + /** * enum clk_defaults_stage - What stage clk_set_defaults() is called at * @CLK_DEFAULTS_PRE: Called before probe. Setting of defaults for clocks owned -- cgit v1.3.1 From 54a4c83b12ae81289df93c048c4dd6f62481d242 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Mar 2025 16:58:32 +0100 Subject: clk: clk-mux: Use struct udevice instead of struct device Use U-Boot specific struct udevice instead of Linux compatibility struct device in clk-mux registration. Signed-off-by: Marek Vasut --- drivers/clk/clk-mux.c | 2 +- include/linux/clk-provider.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 9507a779525..e2331a07840 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -159,7 +159,7 @@ const struct clk_ops clk_mux_ops = { .set_parent = clk_mux_set_parent, }; -struct clk *clk_register_mux(struct device *dev, const char *name, +struct clk *clk_register_mux(struct udevice *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 59f9c241b84..f27878ae6fa 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -242,7 +242,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags); -struct clk *clk_register_mux(struct device *dev, const char *name, +struct clk *clk_register_mux(struct udevice *dev, const char *name, const char * const *parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, -- cgit v1.3.1 From aee51ad0d945cf3ffbad143adb76aba40f66ecb7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Mar 2025 16:58:36 +0100 Subject: clk: clk-gate: Use struct udevice instead of struct device Use U-Boot specific struct udevice instead of Linux compatibility struct device in clk-gate registration. Signed-off-by: Marek Vasut --- drivers/clk/clk-gate.c | 2 +- include/linux/clk-provider.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index bf1c6a93b46..cef98720b69 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -117,7 +117,7 @@ const struct clk_ops clk_gate_ops = { .get_rate = clk_generic_get_rate, }; -struct clk *clk_register_gate(struct device *dev, const char *name, +struct clk *clk_register_gate(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index f27878ae6fa..e282be12897 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -105,7 +105,7 @@ struct clk_gate { #define CLK_GATE_HIWORD_MASK BIT(1) extern const struct clk_ops clk_gate_ops; -struct clk *clk_register_gate(struct device *dev, const char *name, +struct clk *clk_register_gate(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock); -- cgit v1.3.1 From 45c6b6a850895b58d39ca1906a741ebc8563f4bc Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Mar 2025 16:58:42 +0100 Subject: clk: clk-composite: Use struct udevice instead of struct device Use U-Boot specific struct udevice instead of Linux compatibility struct device in clk-composite registration. Signed-off-by: Marek Vasut --- drivers/clk/clk-composite.c | 2 +- include/linux/clk-provider.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c index 199ca6eaa37..1191bdf87df 100644 --- a/drivers/clk/clk-composite.c +++ b/drivers/clk/clk-composite.c @@ -97,7 +97,7 @@ static int clk_composite_disable(struct clk *clk) return 0; } -struct clk *clk_register_composite(struct device *dev, const char *name, +struct clk *clk_register_composite(struct udevice *dev, const char *name, const char * const *parent_names, int num_parents, struct clk *mux, const struct clk_ops *mux_ops, diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index e282be12897..d44ead53079 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -223,7 +223,7 @@ struct clk_composite { #define to_clk_composite(_clk) container_of(_clk, struct clk_composite, clk) -struct clk *clk_register_composite(struct device *dev, const char *name, +struct clk *clk_register_composite(struct udevice *dev, const char *name, const char * const *parent_names, int num_parents, struct clk *mux_clk, const struct clk_ops *mux_ops, struct clk *rate_clk, const struct clk_ops *rate_ops, -- cgit v1.3.1 From e14dd5c35aa8098b024257d9ee0073d1ba6e0281 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Mar 2025 16:58:48 +0100 Subject: clk: clk-divider: Use struct udevice instead of struct device Use U-Boot specific struct udevice instead of Linux compatibility struct device in clk-divider clock registration. Signed-off-by: Marek Vasut --- drivers/clk/clk-divider.c | 4 ++-- include/linux/clk-provider.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index aa210e3d15f..3b4b3c4fa5f 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -183,7 +183,7 @@ const struct clk_ops clk_divider_ops = { .set_rate = clk_divider_set_rate, }; -static struct clk *_register_divider(struct device *dev, const char *name, +static struct clk *_register_divider(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table) @@ -227,7 +227,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, return clk; } -struct clk *clk_register_divider(struct device *dev, const char *name, +struct clk *clk_register_divider(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags) diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index d44ead53079..198f3ff0e42 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -237,7 +237,7 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div); -struct clk *clk_register_divider(struct device *dev, const char *name, +struct clk *clk_register_divider(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags); -- cgit v1.3.1 From 1987fa7b344bdde12e0b07194b462388fe562954 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Mar 2025 16:58:51 +0100 Subject: clk: clk-fixed-factor: Use struct udevice instead of struct device Use U-Boot specific struct udevice instead of Linux compatibility struct device in clk-fixed-factor registration. Signed-off-by: Marek Vasut --- drivers/clk/clk-fixed-factor.c | 4 ++-- include/linux/clk-provider.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index 068798cf9b0..ff61fb4d706 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -37,7 +37,7 @@ const struct clk_ops ccf_clk_fixed_factor_ops = { .get_rate = clk_factor_recalc_rate, }; -struct clk *clk_hw_register_fixed_factor(struct device *dev, +struct clk *clk_hw_register_fixed_factor(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div) { @@ -65,7 +65,7 @@ struct clk *clk_hw_register_fixed_factor(struct device *dev, return clk; } -struct clk *clk_register_fixed_factor(struct device *dev, const char *name, +struct clk *clk_register_fixed_factor(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div) { diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 198f3ff0e42..5ea2171492e 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -233,7 +233,7 @@ struct clk *clk_register_composite(struct udevice *dev, const char *name, int clk_register(struct clk *clk, const char *drv_name, const char *name, const char *parent_name); -struct clk *clk_register_fixed_factor(struct device *dev, const char *name, +struct clk *clk_register_fixed_factor(struct udevice *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div); -- cgit v1.3.1 From 2fb72968ce491f30b0e09fcd4486ee07b5581b33 Mon Sep 17 00:00:00 2001 From: Jimmy Ho Date: Mon, 10 Mar 2025 09:47:48 +0800 Subject: RISCV: config: Remove CFG_SYS_SDRAM_BASE Remove CFG_SYS_SDRAM_BASE so that we can get DRAM base from dt instead of compile time config. Removing this config helps the u-boot more portable. Signed-off-by: Jimmy Ho Reviewed-by: Leo Yu-Chi Liang --- include/configs/sifive-unleashed.h | 1 - include/configs/sifive-unmatched.h | 1 - 2 files changed, 2 deletions(-) (limited to 'include') diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 2996b375723..cd8d0438ba6 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -11,7 +11,6 @@ #include -#define CFG_SYS_SDRAM_BASE 0x80000000 #define RISCV_MMODE_TIMERBASE 0x2000000 #define RISCV_MMODE_TIMEROFF 0xbff8 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 27e0912665b..e0064edc5c9 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -11,6 +11,5 @@ #include -#define CFG_SYS_SDRAM_BASE 0x80000000 #endif /* __SIFIVE_UNMATCHED_H */ -- cgit v1.3.1 From a8c9451f052c55648d173690bbf8f0d6d281e65a Mon Sep 17 00:00:00 2001 From: Huan Zhou Date: Tue, 11 Mar 2025 09:38:48 +0800 Subject: riscv: dt-binding: k1: Add reset driver binding definition Add dt-binding for reset driver. Signed-off-by: Huan Zhou Reviewed-by: Leo Yu-Chi Liang --- include/dt-bindings/reset/spacemit-k1-reset.h | 118 ++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) create mode 100644 include/dt-bindings/reset/spacemit-k1-reset.h (limited to 'include') diff --git a/include/dt-bindings/reset/spacemit-k1-reset.h b/include/dt-bindings/reset/spacemit-k1-reset.h new file mode 100644 index 00000000000..74db58b27ef --- /dev/null +++ b/include/dt-bindings/reset/spacemit-k1-reset.h @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 Spacemit Inc. + * Copyright (C) 2025 Huan Zhou + */ + +#ifndef __DT_BINDINGS_RESET_SAPCEMIT_K1_H__ +#define __DT_BINDINGS_RESET_SAPCEMIT_K1_H__ +/* APBC */ +#define RESET_UART1 1 +#define RESET_UART2 2 +#define RESET_GPIO 3 +#define RESET_PWM0 4 +#define RESET_PWM1 5 +#define RESET_PWM2 6 +#define RESET_PWM3 7 +#define RESET_PWM4 8 +#define RESET_PWM5 9 +#define RESET_PWM6 10 +#define RESET_PWM7 11 +#define RESET_PWM8 12 +#define RESET_PWM9 13 +#define RESET_PWM10 14 +#define RESET_PWM11 15 +#define RESET_PWM12 16 +#define RESET_PWM13 17 +#define RESET_PWM14 18 +#define RESET_PWM15 19 +#define RESET_PWM16 20 +#define RESET_PWM17 21 +#define RESET_PWM18 22 +#define RESET_PWM19 23 +#define RESET_SSP3 24 +#define RESET_UART3 25 +#define RESET_RTC 26 +#define RESET_TWSI0 27 +#define RESET_TIMERS1 28 +#define RESET_AIB 29 +#define RESET_TIMERS2 30 +#define RESET_ONEWIRE 31 +#define RESET_SSPA0 32 +#define RESET_SSPA1 33 +#define RESET_DRO 34 +#define RESET_IR 35 +#define RESET_TWSI1 36 +#define RESET_TSEN 37 +#define RESET_TWSI2 38 +#define RESET_TWSI4 39 +#define RESET_TWSI5 40 +#define RESET_TWSI6 41 +#define RESET_TWSI7 42 +#define RESET_TWSI8 43 +#define RESET_IPC_AP2AUD 44 +#define RESET_UART4 45 +#define RESET_UART5 46 +#define RESET_UART6 47 +#define RESET_UART7 48 +#define RESET_UART8 49 +#define RESET_UART9 50 +#define RESET_CAN0 51 + +/* MPMU */ +#define RESET_WDT 52 + +/* APMU */ +#define RESET_JPG 53 +#define RESET_CSI 54 +#define RESET_CCIC2_PHY 55 +#define RESET_CCIC3_PHY 56 +#define RESET_ISP 57 +#define RESET_ISP_AHB 58 +#define RESET_ISP_CI 59 +#define RESET_ISP_CPP 60 +#define RESET_LCD 61 +#define RESET_DSI_ESC 62 +#define RESET_V2D 63 +#define RESET_MIPI 64 +#define RESET_LCD_SPI 65 +#define RESET_LCD_SPI_BUS 66 +#define RESET_LCD_SPI_HBUS 67 +#define RESET_LCD_MCLK 68 +#define RESET_CCIC_4X 69 +#define RESET_CCIC1_PHY 70 +#define RESET_SDH_AXI 71 +#define RESET_SDH0 72 +#define RESET_SDH1 73 +#define RESET_USB_AXI 74 +#define RESET_USBP1_AXI 75 +#define RESET_USB3_0 76 +#define RESET_QSPI 77 +#define RESET_QSPI_BUS 78 +#define RESET_DMA 79 +#define RESET_AES 80 +#define RESET_VPU 81 +#define RESET_GPU 82 +#define RESET_SDH2 83 +#define RESET_MC 84 +#define RESET_EM_AXI 85 +#define RESET_EM 86 +#define RESET_AUDIO_SYS 87 +#define RESET_HDMI 88 +#define RESET_PCIE0 89 +#define RESET_PCIE1 90 +#define RESET_PCIE2 91 +#define RESET_EMAC0 92 +#define RESET_EMAC1 93 + +/* APBC2 */ +#define RESET_SEC_UART1 94 +#define RESET_SEC_SSP2 95 +#define RESET_SEC_TWSI3 96 +#define RESET_SEC_RTC 97 +#define RESET_SEC_TIMERS0 98 +#define RESET_SEC_KPC 99 +#define RESET_SEC_GPIO 100 +#define RESET_NUMBER 101 + +#endif -- cgit v1.3.1 From 9c407347b496124849665aca6b76f48118891707 Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Mon, 17 Mar 2025 14:03:57 +0530 Subject: fdt: add support for adding pmem nodes One of the problems an OS may face, when running in EFI, is that a mounted ISO, after calling ExitBootServices goes away, if that ISO is resident in RAM memory as a ramdisk. ACPI has NFIT and NVDIMM support to provide ramdisks to the OS, but we don't have anything in place for DTs. Linux and device trees have support for persistent memory devices. So add a function that can inject a pmem node in a DT, so we can pass information on the ramdisk the OS. Signed-off-by: Masahisa Kojima Signed-off-by: Sughosh Ganu Reviewed-by: Ilias Apalodimas Signed-off-by: Ilias Apalodimas --- boot/fdt_support.c | 39 ++++++++++++++++++++++++++++++++++++++- include/fdt_support.h | 14 ++++++++++++++ 2 files changed, 52 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/boot/fdt_support.c b/boot/fdt_support.c index 49efeec3681..92f2f534ee0 100644 --- a/boot/fdt_support.c +++ b/boot/fdt_support.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -464,7 +465,6 @@ void do_fixup_by_compat_u32(void *fdt, const char *compat, do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create); } -#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY /* * fdt_pack_reg - pack address and size array into the "reg"-suitable stream */ @@ -493,6 +493,7 @@ static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size, return p - (char *)buf; } +#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY #if CONFIG_NR_DRAM_BANKS > 4 #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS #else @@ -2222,3 +2223,39 @@ int fdt_valid(struct fdt_header **blobp) } return 1; } + +int fdt_fixup_pmem_region(void *fdt, u64 pmem_start, u64 pmem_size) +{ + char node_name[32]; + int nodeoffset, len; + int err; + u8 tmp[4 * 16]; /* Up to 64-bit address + 64-bit size */ + + if (!IS_ALIGNED(pmem_start, SZ_2M) || + !IS_ALIGNED(pmem_start + pmem_size, SZ_2M)) { + printf("Start and end address must be 2MiB aligned\n"); + return -1; + } + + snprintf(node_name, sizeof(node_name), "pmem@%llx", pmem_start); + nodeoffset = fdt_find_or_add_subnode(fdt, 0, node_name); + if (nodeoffset < 0) + return nodeoffset; + + err = fdt_setprop_string(fdt, nodeoffset, "compatible", "pmem-region"); + if (err) + return err; + err = fdt_setprop_empty(fdt, nodeoffset, "volatile"); + if (err) + return err; + + len = fdt_pack_reg(fdt, tmp, &pmem_start, &pmem_size, 1); + err = fdt_setprop(fdt, nodeoffset, "reg", tmp, len); + if (err < 0) { + printf("WARNING: could not set pmem %s %s.\n", "reg", + fdt_strerror(err)); + return err; + } + + return 0; +} diff --git a/include/fdt_support.h b/include/fdt_support.h index f0ad2e6b365..049190cf3d7 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -471,6 +471,20 @@ int fdt_valid(struct fdt_header **blobp); */ int fdt_get_cells_len(const void *blob, char *nr_cells_name); +/** + * fdt_fixup_pmem_region() - add a pmem node on the device tree + * + * This functions adds/updates a pmem node to the device tree. + * Usually used with EFI installers to preserve installer + * images + * + * @fdt: device tree provided by caller + * @addr: start address of the pmem node + * @size: size of the memory of the pmem node + * Return: 0 on success or < 0 on failure + */ +int fdt_fixup_pmem_region(void *fdt, u64 pmem_start, u64 pmem_size); + #endif /* !USE_HOSTCC */ #ifdef USE_HOSTCC -- cgit v1.3.1 From c5f6542aa8ae93b7705e27103a9fdaf8445e2915 Mon Sep 17 00:00:00 2001 From: Ilias Apalodimas Date: Mon, 17 Mar 2025 14:03:58 +0530 Subject: efi_loader: allow for removal of memory from the EFI map With upcoming changes supporting pmem nodes, we need to remove the pmem area from the EFI memory map. Rename efi_add_memory_map_pg() to efi_update_memory_map(), and allow removing memory from the EFI memory map. Signed-off-by: Sughosh Ganu Signed-off-by: Ilias Apalodimas --- include/efi_loader.h | 15 +++++++++++++++ lib/efi_loader/efi_memory.c | 34 ++++++++++++++++++---------------- 2 files changed, 33 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/efi_loader.h b/include/efi_loader.h index e9c10819ba2..5f769786786 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -878,6 +878,21 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size, /* Adds a range into the EFI memory map */ efi_status_t efi_add_memory_map(u64 start, u64 size, int memory_type); +/** + * efi_update_memory_map() - update the memory map by adding/removing pages + * + * @start: start address, must be a multiple of + * EFI_PAGE_SIZE + * @pages: number of pages to add + * @memory_type: type of memory added + * @overlap_conventional: region may only overlap free(conventional) + * memory + * @remove: remove memory map + * Return: status code + */ +efi_status_t efi_update_memory_map(u64 start, u64 pages, int memory_type, + bool overlap_conventional, bool remove); + /* Called by board init to initialize the EFI drivers */ efi_status_t efi_driver_init(void); /* Called when a block device is added */ diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c index c39b53922bb..0abb1f6159a 100644 --- a/lib/efi_loader/efi_memory.c +++ b/lib/efi_loader/efi_memory.c @@ -258,7 +258,7 @@ static s64 efi_mem_carve_out(struct efi_mem_list *map, } /** - * efi_add_memory_map_pg() - add pages to the memory map + * efi_update_memory_map() - update the memory map by adding/removing pages * * @start: start address, must be a multiple of * EFI_PAGE_SIZE @@ -266,12 +266,11 @@ static s64 efi_mem_carve_out(struct efi_mem_list *map, * @memory_type: type of memory added * @overlap_conventional: region may only overlap free(conventional) * memory + * @remove: remove memory map * Return: status code */ -static -efi_status_t efi_add_memory_map_pg(u64 start, u64 pages, - int memory_type, - bool overlap_conventional) +efi_status_t efi_update_memory_map(u64 start, u64 pages, int memory_type, + bool overlap_conventional, bool remove) { struct efi_mem_list *lmem; struct efi_mem_list *newlist; @@ -279,9 +278,9 @@ efi_status_t efi_add_memory_map_pg(u64 start, u64 pages, uint64_t carved_pages = 0; struct efi_event *evt; - EFI_PRINT("%s: 0x%llx 0x%llx %d %s\n", __func__, + EFI_PRINT("%s: 0x%llx 0x%llx %d %s %s\n", __func__, start, pages, memory_type, overlap_conventional ? - "yes" : "no"); + "yes" : "no", remove ? "remove" : "add"); if (memory_type >= EFI_MAX_MEMORY_TYPE) return EFI_INVALID_PARAMETER; @@ -364,7 +363,10 @@ efi_status_t efi_add_memory_map_pg(u64 start, u64 pages, } /* Add our new map */ - list_add_tail(&newlist->link, &efi_mem); + if (!remove) + list_add_tail(&newlist->link, &efi_mem); + else + free(newlist); /* And make sure memory is listed in descending order */ efi_mem_sort(); @@ -401,7 +403,7 @@ efi_status_t efi_add_memory_map(u64 start, u64 size, int memory_type) pages = efi_size_in_pages(size + (start & EFI_PAGE_MASK)); start &= ~EFI_PAGE_MASK; - return efi_add_memory_map_pg(start, pages, memory_type, false); + return efi_update_memory_map(start, pages, memory_type, false, false); } /** @@ -501,7 +503,7 @@ efi_status_t efi_allocate_pages(enum efi_allocate_type type, efi_addr = (u64)(uintptr_t)map_sysmem(addr, 0); /* Reserve that map in our memory maps */ - ret = efi_add_memory_map_pg(efi_addr, pages, memory_type, true); + ret = efi_update_memory_map(efi_addr, pages, memory_type, true, false); if (ret != EFI_SUCCESS) { /* Map would overlap, bail out */ lmb_free_flags(addr, (u64)pages << EFI_PAGE_SHIFT, flags); @@ -822,8 +824,8 @@ static void add_u_boot_and_runtime(void) uboot_stack_size) & ~EFI_PAGE_MASK; uboot_pages = ((uintptr_t)map_sysmem(gd->ram_top - 1, 0) - uboot_start + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT; - efi_add_memory_map_pg(uboot_start, uboot_pages, EFI_BOOT_SERVICES_CODE, - false); + efi_update_memory_map(uboot_start, uboot_pages, EFI_BOOT_SERVICES_CODE, + false, false); #if defined(__aarch64__) /* * Runtime Services must be 64KiB aligned according to the @@ -841,8 +843,8 @@ static void add_u_boot_and_runtime(void) runtime_end = (uintptr_t)__efi_runtime_stop; runtime_end = (runtime_end + runtime_mask) & ~runtime_mask; runtime_pages = (runtime_end - runtime_start) >> EFI_PAGE_SHIFT; - efi_add_memory_map_pg(runtime_start, runtime_pages, - EFI_RUNTIME_SERVICES_CODE, false); + efi_update_memory_map(runtime_start, runtime_pages, + EFI_RUNTIME_SERVICES_CODE, false, false); } int efi_memory_init(void) @@ -877,11 +879,11 @@ int efi_map_update_notify(phys_addr_t addr, phys_size_t size, pages = efi_size_in_pages(size + (efi_addr & EFI_PAGE_MASK)); efi_addr &= ~EFI_PAGE_MASK; - status = efi_add_memory_map_pg(efi_addr, pages, + status = efi_update_memory_map(efi_addr, pages, op == LMB_MAP_OP_RESERVE ? EFI_BOOT_SERVICES_DATA : EFI_CONVENTIONAL_MEMORY, - false); + false, false); if (status != EFI_SUCCESS) { log_err("LMB Map notify failure %lu\n", status & ~EFI_ERROR_MASK); -- cgit v1.3.1 From 54c39bf104017e3a0b30fdff6104141b719af9ef Mon Sep 17 00:00:00 2001 From: Sughosh Ganu Date: Mon, 17 Mar 2025 14:04:01 +0530 Subject: blkmap: add an attribute to preserve the mem mapping Some blkmap memory mapped devices might have to be relevant even after U-Boot passes control to the next image as part of the platform boot. An example of such a mapping would be an OS installer ISO image, information for which has to be provided to the OS kernel. Use the 'preserve' attribute for such mappings. The code for adding a pmem node to the device-tree then checks if this attribute is set, and adds a node only for mappings which have this attribute. Signed-off-by: Sughosh Ganu Reviewed-by: Tobias Waldekranz Reviewed-by: Ilias Apalodimas Signed-off-by: Ilias Apalodimas --- cmd/blkmap.c | 9 +++++++-- drivers/block/blkmap.c | 19 +++++++++++++++---- drivers/block/blkmap_helper.c | 2 +- include/blkmap.h | 4 +++- 4 files changed, 26 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/cmd/blkmap.c b/cmd/blkmap.c index 164f80f1387..86a123b1cd3 100644 --- a/cmd/blkmap.c +++ b/cmd/blkmap.c @@ -62,13 +62,18 @@ static int do_blkmap_map_mem(struct map_ctx *ctx, int argc, char *const argv[]) { phys_addr_t addr; int err; + bool preserve = false; if (argc < 2) return CMD_RET_USAGE; addr = hextoul(argv[1], NULL); - err = blkmap_map_pmem(ctx->dev, ctx->blknr, ctx->blkcnt, addr); + if (argc == 3 && !strcmp(argv[2], "preserve")) + preserve = true; + + err = blkmap_map_pmem(ctx->dev, ctx->blknr, ctx->blkcnt, addr, + preserve); if (err) { printf("Unable to map %#llx at block 0x" LBAF ": %d\n", (unsigned long long)addr, ctx->blknr, err); @@ -221,7 +226,7 @@ U_BOOT_CMD_WITH_SUBCMDS( "blkmap create