From 20ecfbe93175e84dbf597d39a6ddeed29099dd73 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 2 Mar 2021 09:36:23 -0500 Subject: configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini --- scripts/config_whitelist.txt | 51 -------------------------------------------- 1 file changed, 51 deletions(-) (limited to 'scripts') diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c8c87900ce8..e98185c0642 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -78,7 +78,6 @@ CONFIG_AT91_GPIO_PULLUP CONFIG_AT91_LED CONFIG_AT91_WANTS_COMMON_PHY CONFIG_ATAPI -CONFIG_ATM CONFIG_ATMEL_LCD CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 @@ -615,8 +614,6 @@ CONFIG_HAS_ETH0 CONFIG_HAS_ETH1 CONFIG_HAS_ETH2 CONFIG_HAS_ETH3 -CONFIG_HAS_ETH5 -CONFIG_HAS_ETH7 CONFIG_HAS_FEC CONFIG_HAS_FSL_DR_USB CONFIG_HAS_FSL_MPH_USB @@ -1276,7 +1273,6 @@ CONFIG_POST_WATCHDOG CONFIG_POWER CONFIG_POWER_FSL CONFIG_POWER_FSL_MC13892 -CONFIG_POWER_FSL_MC34704 CONFIG_POWER_HI6553 CONFIG_POWER_I2C CONFIG_POWER_LTC3676 @@ -1387,7 +1383,6 @@ CONFIG_RTC_DS1388 CONFIG_RTC_DS1388_TCR_VAL CONFIG_RTC_DS3231 CONFIG_RTC_FTRTC010 -CONFIG_RTC_IMXDI CONFIG_RTC_M41T11 CONFIG_RTC_MC13XXX CONFIG_RTC_MCFRRTC @@ -1696,7 +1691,6 @@ CONFIG_SYS_BAUDRATE_TABLE CONFIG_SYS_BCSR CONFIG_SYS_BCSR_ADDR CONFIG_SYS_BCSR_BASE -CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_SIZE CONFIG_SYS_BD_REV CONFIG_SYS_BFTIC3_BASE @@ -1968,8 +1962,6 @@ CONFIG_SYS_DDRTC CONFIG_SYS_DDRUA CONFIG_SYS_DDR_BLOCK1_SIZE CONFIG_SYS_DDR_BLOCK2_BASE -CONFIG_SYS_DDR_CDR_1 -CONFIG_SYS_DDR_CDR_2 CONFIG_SYS_DDR_CFG_1A CONFIG_SYS_DDR_CFG_1B CONFIG_SYS_DDR_CFG_2 @@ -1986,7 +1978,6 @@ CONFIG_SYS_DDR_CONFIG CONFIG_SYS_DDR_CONFIG_2 CONFIG_SYS_DDR_CONFIG_256 CONFIG_SYS_DDR_CONTROL -CONFIG_SYS_DDR_CONTROL2 CONFIG_SYS_DDR_CONTROL_2 CONFIG_SYS_DDR_CPO CONFIG_SYS_DDR_CS0_BNDS @@ -2000,8 +1991,6 @@ CONFIG_SYS_DDR_CS2_CONFIG CONFIG_SYS_DDR_CS3_BNDS CONFIG_SYS_DDR_CS3_CONFIG CONFIG_SYS_DDR_DATA_INIT -CONFIG_SYS_DDR_ERR_DIS -CONFIG_SYS_DDR_ERR_INT_EN CONFIG_SYS_DDR_INIT_ADDR CONFIG_SYS_DDR_INIT_EXT_ADDR CONFIG_SYS_DDR_INTERVAL @@ -2027,21 +2016,14 @@ CONFIG_SYS_DDR_MODE_2_900 CONFIG_SYS_DDR_MODE_CONTROL CONFIG_SYS_DDR_MODE_CTL CONFIG_SYS_DDR_MODE_WEAK -CONFIG_SYS_DDR_OCD_CTRL -CONFIG_SYS_DDR_OCD_STATUS CONFIG_SYS_DDR_RAW_TIMING CONFIG_SYS_DDR_RCW_1 CONFIG_SYS_DDR_RCW_2 -CONFIG_SYS_DDR_SBE CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE2 CONFIG_SYS_DDR_SDRAM_CFG CONFIG_SYS_DDR_SDRAM_CFG2 -CONFIG_SYS_DDR_SDRAM_CFG_2 CONFIG_SYS_DDR_SDRAM_CLK_CNTL -CONFIG_SYS_DDR_SDRAM_INTERVAL -CONFIG_SYS_DDR_SDRAM_MODE -CONFIG_SYS_DDR_SDRAM_MODE_2 CONFIG_SYS_DDR_SIZE CONFIG_SYS_DDR_SR_CNTR CONFIG_SYS_DDR_TIMING_0 @@ -2818,7 +2800,6 @@ CONFIG_SYS_LBC0_BASE CONFIG_SYS_LBC0_BASE_PHYS CONFIG_SYS_LBC1_BASE CONFIG_SYS_LBC1_BASE_PHYS -CONFIG_SYS_LBCR_ADDR CONFIG_SYS_LBC_ADDR CONFIG_SYS_LBC_CACHE_BASE CONFIG_SYS_LBC_FLASH_BASE @@ -2894,8 +2875,6 @@ CONFIG_SYS_MAX_MTD_BANKS CONFIG_SYS_MAX_NAND_CHIPS CONFIG_SYS_MAX_NAND_DEVICE CONFIG_SYS_MAX_PCI_EPS -CONFIG_SYS_MB862xx_CCF -CONFIG_SYS_MB862xx_MMR CONFIG_SYS_MBAR CONFIG_SYS_MBAR2 CONFIG_SYS_MCATT0_VAL @@ -3099,7 +3078,6 @@ CONFIG_SYS_NAND_REGS_BASE CONFIG_SYS_NAND_SELECT_DEVICE CONFIG_SYS_NAND_SIZE CONFIG_SYS_NAND_SPL_KERNEL_OFFS -CONFIG_SYS_NAND_SPL_SIZE CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_NAND_U_BOOT_RELOC CONFIG_SYS_NAND_U_BOOT_RELOC_SP @@ -3700,8 +3678,6 @@ CONFIG_SYS_UART_PORT CONFIG_SYS_UBOOT_BASE CONFIG_SYS_UBOOT_END CONFIG_SYS_UBOOT_START -CONFIG_SYS_UCC_RGMII_MODE -CONFIG_SYS_UCC_RMII_MODE CONFIG_SYS_UDELAY_BASE CONFIG_SYS_UEC CONFIG_SYS_UEC1_ETH_TYPE @@ -3718,34 +3694,8 @@ CONFIG_SYS_UEC2_PHY_ADDR CONFIG_SYS_UEC2_RX_CLK CONFIG_SYS_UEC2_TX_CLK CONFIG_SYS_UEC2_UCC_NUM -CONFIG_SYS_UEC3_ETH_TYPE -CONFIG_SYS_UEC3_INTERFACE_SPEED -CONFIG_SYS_UEC3_INTERFACE_TYPE CONFIG_SYS_UEC3_PHY_ADDR -CONFIG_SYS_UEC3_RX_CLK -CONFIG_SYS_UEC3_TX_CLK -CONFIG_SYS_UEC3_UCC_NUM -CONFIG_SYS_UEC4_ETH_TYPE -CONFIG_SYS_UEC4_INTERFACE_SPEED -CONFIG_SYS_UEC4_INTERFACE_TYPE CONFIG_SYS_UEC4_PHY_ADDR -CONFIG_SYS_UEC4_RX_CLK -CONFIG_SYS_UEC4_TX_CLK -CONFIG_SYS_UEC4_UCC_NUM -CONFIG_SYS_UEC6_ETH_TYPE -CONFIG_SYS_UEC6_INTERFACE_SPEED -CONFIG_SYS_UEC6_INTERFACE_TYPE -CONFIG_SYS_UEC6_PHY_ADDR -CONFIG_SYS_UEC6_RX_CLK -CONFIG_SYS_UEC6_TX_CLK -CONFIG_SYS_UEC6_UCC_NUM -CONFIG_SYS_UEC8_ETH_TYPE -CONFIG_SYS_UEC8_INTERFACE_SPEED -CONFIG_SYS_UEC8_INTERFACE_TYPE -CONFIG_SYS_UEC8_PHY_ADDR -CONFIG_SYS_UEC8_RX_CLK -CONFIG_SYS_UEC8_TX_CLK -CONFIG_SYS_UEC8_UCC_NUM CONFIG_SYS_UECx_PHY_ADDR CONFIG_SYS_UHC0_EHCI_BASE CONFIG_SYS_UHC1_EHCI_BASE @@ -3931,7 +3881,6 @@ CONFIG_USB_BOOTING CONFIG_USB_DEVICE CONFIG_USB_DEV_BASE CONFIG_USB_DEV_PULLUP_GPIO -CONFIG_USB_DWC2_REG_ADDR CONFIG_USB_EHCI_ARMADA100 CONFIG_USB_EHCI_BASE CONFIG_USB_EHCI_BASE_LIST -- cgit v1.3.1 From 504debcd8c1f4d86682ed8f3c7472284a2b6e822 Mon Sep 17 00:00:00 2001 From: Rajesh Bhagat Date: Thu, 11 Feb 2021 13:28:49 +0100 Subject: configs: fsl: move bootrom specific defines to Kconfig Moves below bootrom specific defines to Kconfig: CONFIG_SYS_FSL_BOOTROM_BASE CONFIG_SYS_FSL_BOOTROM_SIZE Signed-off-by: Rajesh Bhagat Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 10 ++++++++++ arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 -- scripts/config_whitelist.txt | 2 -- 3 files changed, 10 insertions(+), 4 deletions(-) (limited to 'scripts') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 4d465872140..ae0b7b21e81 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -640,3 +640,13 @@ config HAS_FSL_XHCI_USB help For some SoC(such as LS1043A and LS1046A), USB and QE-HDLC multiplex use pins, select it when the pins are assigned to USB. + +config SYS_FSL_BOOTROM_BASE + hex + depends on FSL_LSCH2 + default 0 + +config SYS_FSL_BOOTROM_SIZE + hex + depends on FSL_LSCH2 + default 0x1000000 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h index 4335aa0ec28..c51b65ea36d 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h @@ -69,8 +69,6 @@ #define CONFIG_SYS_FSL_DRAM_SIZE2 0x7F80000000 #endif #elif defined(CONFIG_FSL_LSCH2) -#define CONFIG_SYS_FSL_BOOTROM_BASE 0x0 -#define CONFIG_SYS_FSL_BOOTROM_SIZE 0x1000000 #define CONFIG_SYS_FSL_CCSR_BASE 0x1000000 #define CONFIG_SYS_FSL_CCSR_SIZE 0xf000000 #define CONFIG_SYS_FSL_DCSR_BASE 0x20000000 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e98185c0642..3ba2781e5a3 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -2251,8 +2251,6 @@ CONFIG_SYS_FSL_AIOP1_SIZE CONFIG_SYS_FSL_B4860QDS_XFI_ERR CONFIG_SYS_FSL_BMAN_ADDR CONFIG_SYS_FSL_BMAN_OFFSET -CONFIG_SYS_FSL_BOOTROM_BASE -CONFIG_SYS_FSL_BOOTROM_SIZE CONFIG_SYS_FSL_CCSR_BASE CONFIG_SYS_FSL_CCSR_GUR_BE CONFIG_SYS_FSL_CCSR_GUR_LE -- cgit v1.3.1 From c8c0170f192e975c85aadb8ebcfb4d1ac3cfc5f2 Mon Sep 17 00:00:00 2001 From: Rajesh Bhagat Date: Mon, 15 Feb 2021 09:46:14 +0100 Subject: configs: fsl: move via specific defines to Kconfig Moves below via specific defines to Kconfig: CONFIG_FSL_VIA Signed-off-by: Rajesh Bhagat [Rebased] Signed-off-by: Priyanka Jain --- arch/powerpc/cpu/mpc85xx/Kconfig | 6 ++++++ include/configs/MPC8541CDS.h | 2 -- include/configs/MPC8548CDS.h | 2 -- include/configs/MPC8555CDS.h | 2 -- scripts/config_whitelist.txt | 1 - 5 files changed, 6 insertions(+), 7 deletions(-) (limited to 'scripts') diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 6f905189277..1a4e0b93a64 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -51,14 +51,17 @@ config TARGET_P5040DS config TARGET_MPC8541CDS bool "Support MPC8541CDS" select ARCH_MPC8541 + select FSL_VIA config TARGET_MPC8548CDS bool "Support MPC8548CDS" select ARCH_MPC8548 + select FSL_VIA config TARGET_MPC8555CDS bool "Support MPC8555CDS" select ARCH_MPC8555 + select FSL_VIA config TARGET_MPC8568MDS bool "Support MPC8568MDS" @@ -1409,6 +1412,9 @@ config SYS_FSL_LBC_CLK_DIV Defines divider of platform clock(clock input to eLBC controller). +config FSL_VIA + bool + source "board/freescale/corenet_ds/Kconfig" source "board/freescale/mpc8541cds/Kconfig" source "board/freescale/mpc8548cds/Kconfig" diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index b1c8917f216..ea4da6a5fe4 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -18,8 +18,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_VIA - #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); #endif diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 0605f70ffcb..9f83931bed5 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -23,8 +23,6 @@ #define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */ -#define CONFIG_FSL_VIA - #ifndef __ASSEMBLY__ #include extern unsigned long get_clock_freq(void); diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 88999ef2b85..79e309c95c1 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -18,8 +18,6 @@ #define CONFIG_PCI_INDIRECT_BRIDGE #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ -#define CONFIG_FSL_VIA - #ifndef __ASSEMBLY__ extern unsigned long get_clock_freq(void); #endif diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 3ba2781e5a3..e793cd1169f 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -551,7 +551,6 @@ CONFIG_FSL_SERDES2 CONFIG_FSL_SGMII_RISER CONFIG_FSL_TBCLK_EXTRA_DIV CONFIG_FSL_TRUST_ARCH_v1 -CONFIG_FSL_VIA CONFIG_FSMC_NAND_BASE CONFIG_FSMTDBLK CONFIG_FSNOTIFY -- cgit v1.3.1 From 9773ebcfbca23c7d6fe1dc202913b005bc23cc89 Mon Sep 17 00:00:00 2001 From: Dalon Westergreen Date: Mon, 1 Mar 2021 20:04:16 +0800 Subject: Makefile: socfpga: Add target to generate hex output for combined spl and dtb Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex" is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to generate the final configuration bitstream for Intel SOCFPGA SOC64 devices. Signed-off-by: Dalon Westergreen Signed-off-by: Siew Chin Lim --- Makefile | 11 ++++++----- include/configs/socfpga_soc64_common.h | 2 +- scripts/Makefile.spl | 7 +++++++ 3 files changed, 14 insertions(+), 6 deletions(-) (limited to 'scripts') diff --git a/Makefile b/Makefile index 68ce5195b22..d6eda45385c 100644 --- a/Makefile +++ b/Makefile @@ -1264,11 +1264,6 @@ OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \ $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \ $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec) -OBJCOPYFLAGS_u-boot-spl.hex = $(OBJCOPYFLAGS_u-boot.hex) - -spl/u-boot-spl.hex: spl/u-boot-spl FORCE - $(call if_changed,objcopy) - binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ map_size=$(shell cat u-boot.map | \ @@ -1940,6 +1935,12 @@ spl/u-boot-spl.bin: spl/u-boot-spl @: $(SPL_SIZE_CHECK) +spl/u-boot-spl-dtb.bin: spl/u-boot-spl + @: + +spl/u-boot-spl-dtb.hex: spl/u-boot-spl + @: + spl/u-boot-spl: tools prepare \ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SPL_OF_PLATDATA),dts/dt.dtb) \ $(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_TPL_OF_PLATDATA),dts/dt.dtb) diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 0e546012578..1cfa1900478 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -194,7 +194,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB) * */ -#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex" +#define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex" #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index ea4e045769c..1fd63efdfd3 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -229,6 +229,8 @@ ifneq ($(CONFIG_TARGET_SOCFPGA_GEN5)$(CONFIG_TARGET_SOCFPGA_ARRIA10),) INPUTS-y += $(obj)/$(SPL_BIN).sfp endif +INPUTS-$(CONFIG_TARGET_SOCFPGA_SOC64) += $(obj)/u-boot-spl-dtb.hex + ifdef CONFIG_ARCH_SUNXI INPUTS-y += $(obj)/sunxi-spl.bin @@ -389,6 +391,11 @@ $(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE MKIMAGEFLAGS_sunxi-spl.bin = -T sunxi_egon \ -n $(CONFIG_DEFAULT_DEVICE_TREE) +OBJCOPYFLAGS_u-boot-spl-dtb.hex := -I binary -O ihex --change-address=$(CONFIG_SPL_TEXT_BASE) + +$(obj)/u-boot-spl-dtb.hex: $(obj)/u-boot-spl-dtb.bin FORCE + $(call if_changed,objcopy) + $(obj)/sunxi-spl.bin: $(obj)/$(SPL_BIN).bin FORCE $(call if_changed,mkimage) -- cgit v1.3.1 From 15942805b7efe47e186d8b30ec378666561ad1f9 Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Fri, 5 Mar 2021 15:52:42 +0100 Subject: arm: mvebu: a38x: Remove dead code ARMADA_39X MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Config option ARMADA_39X is never set so remove all dead code hidden under ifdef CONFIG_ARMADA_39X blocks. Also remove useless checks for CONFIG_ARMADA_38X define as this macro is always defined for a38x code path. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- arch/arm/mach-mvebu/include/mach/cpu.h | 2 +- .../mach-mvebu/serdes/a38x/high_speed_env_spec.c | 46 ---------------------- arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c | 24 ----------- arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h | 35 ---------------- drivers/ddr/marvell/a38x/ddr3_training_leveling.c | 2 - drivers/ddr/marvell/a38x/mv_ddr_plat.c | 8 ---- drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h | 7 ---- scripts/config_whitelist.txt | 1 - tools/Makefile | 4 +- 9 files changed, 3 insertions(+), 126 deletions(-) (limited to 'scripts') diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index c3f8ad85065..52473ade7a7 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -164,7 +164,7 @@ int serdes_phy_config(void); int ddr3_init(void); /* Auto Voltage Scaling */ -#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X) +#if defined(CONFIG_ARMADA_38X) void mv_avs_init(void); void mv_rtc_config(void); #else diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c index ae2a3611049..3b41c7d49b7 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c +++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c @@ -14,11 +14,6 @@ #include "sys_env_lib.h" #include "ctrl_pex.h" -#if defined(CONFIG_ARMADA_38X) -#elif defined(CONFIG_ARMADA_39X) -#else -#error "No device is defined" -#endif /* @@ -79,11 +74,6 @@ u8 selectors_serdes_rev2_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = { { NA, 0x6, NA, NA, 0x4, NA, NA }, /* USB3_HOST0 */ { NA, NA, NA, 0x5, NA, 0x4, NA }, /* USB3_HOST1 */ { NA, NA, NA, 0x6, 0x5, 0x5, NA }, /* USB3_DEVICE */ -#ifdef CONFIG_ARMADA_39X - { NA, NA, 0x5, NA, 0x8, NA, 0x2 }, /* SGMII3 */ - { NA, NA, NA, 0x8, 0x9, 0x8, 0x4 }, /* XAUI */ - { NA, NA, NA, NA, NA, 0x8, 0x4 }, /* RXAUI */ -#endif { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, NA } /* DEFAULT_SERDES */ }; @@ -798,11 +788,9 @@ struct op_params serdes_power_down_params[] = { */ u8 hws_ctrl_serdes_rev_get(void) { -#ifdef CONFIG_ARMADA_38X /* for A38x-Z1 */ if (sys_env_device_rev_get() == MV_88F68XX_Z1_ID) return MV_SERDES_REV_1_2; -#endif /* for A39x-Z1, A38x-A0 */ return MV_SERDES_REV_2_1; @@ -1351,9 +1339,6 @@ enum serdes_seq serdes_type_and_speed_to_speed_seq(enum serdes_type serdes_type, case SGMII0: case SGMII1: case SGMII2: -#ifdef CONFIG_ARMADA_39X - case SGMII3: -#endif if (baud_rate == SERDES_SPEED_1_25_GBPS) seq_id = SGMII_1_25_SPEED_CONFIG_SEQ; else if (baud_rate == SERDES_SPEED_3_125_GBPS) @@ -1362,14 +1347,6 @@ enum serdes_seq serdes_type_and_speed_to_speed_seq(enum serdes_type serdes_type, case QSGMII: seq_id = QSGMII_5_SPEED_CONFIG_SEQ; break; -#ifdef CONFIG_ARMADA_39X - case XAUI: - seq_id = XAUI_3_125_SPEED_CONFIG_SEQ; - break; - case RXAUI: - seq_id = RXAUI_6_25_SPEED_CONFIG_SEQ; - break; -#endif default: return SERDES_LAST_SEQ; } @@ -2054,13 +2031,6 @@ int hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type, (serdes_num, PEX_CONFIG_REF_CLOCK_100MHZ_SEQ)); return MV_OK; -#ifdef CONFIG_ARMADA_39X - case REF_CLOCK_40MHZ: - CHECK_STATUS(mv_seq_exec - (serdes_num, - PEX_CONFIG_REF_CLOCK_40MHZ_SEQ)); - return MV_OK; -#endif default: printf ("%s: Error: ref_clock %d for SerDes lane #%d, type %d is not supported\n", @@ -2104,22 +2074,6 @@ int hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type, return MV_BAD_PARAM; } break; -#ifdef CONFIG_ARMADA_39X - case SGMII3: - case XAUI: - case RXAUI: - if (ref_clock == REF_CLOCK_25MHZ) { - data1 = POWER_AND_PLL_CTRL_REG_25MHZ_VAL_1; - } else if (ref_clock == REF_CLOCK_40MHZ) { - data1 = POWER_AND_PLL_CTRL_REG_40MHZ_VAL; - } else { - printf - ("hws_ref_clock_set: ref clock is not valid for serdes type %d\n", - serdes_type); - return MV_BAD_PARAM; - } - break; -#endif default: DEBUG_INIT_S("hws_ref_clock_set: not supported serdes type\n"); return MV_BAD_PARAM; diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c index 3c4c7e01a1c..950680a5816 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c @@ -12,7 +12,6 @@ #include "seq_exec.h" #include "sys_env_lib.h" -#ifdef CONFIG_ARMADA_38X enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = { /* 6820 6810 6811 6828 */ /* PEX_UNIT_ID */ { 4, 3, 3, 4}, @@ -24,19 +23,6 @@ enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = { /* XAUI_UNIT_ID */ { 0, 0, 0, 0}, /* RXAUI_UNIT_ID */ { 0, 0, 0, 0} }; -#else /* if (CONFIG_ARMADA_39X) */ -enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = { -/* 6920 6928 */ -/* PEX_UNIT_ID */ { 4, 4}, -/* ETH_GIG_UNIT_ID */ { 3, 4}, -/* USB3H_UNIT_ID */ { 1, 2}, -/* USB3D_UNIT_ID */ { 0, 1}, -/* SATA_UNIT_ID */ { 0, 4}, -/* QSGMII_UNIT_ID */ { 0, 1}, -/* XAUI_UNIT_ID */ { 1, 1}, -/* RXAUI_UNIT_ID */ { 1, 1} -}; -#endif u32 g_dev_id = -1; @@ -202,11 +188,7 @@ u16 sys_env_model_get(void) return ctrl_id; default: /* Device ID Default for A38x: 6820 , for A39x: 6920 */ - #ifdef CONFIG_ARMADA_38X default_ctrl_id = MV_6820_DEV_ID; - #else - default_ctrl_id = MV_6920_DEV_ID; - #endif printf("%s: Error retrieving device ID (%x), using default ID = %x\n", __func__, ctrl_id, default_ctrl_id); return default_ctrl_id; @@ -261,9 +243,6 @@ void mv_rtc_config(void) { u32 i, val; - if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X))) - return; - /* Activate pipe0 for read/write transaction, and set XBAR client number #1 */ val = 0x1 << DFX_PIPE_SELECT_PIPE0_ACTIVE_OFFS | 0x1 << DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS; @@ -278,9 +257,6 @@ void mv_avs_init(void) { u32 sar_freq; - if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X))) - return; - reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE); reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE); diff --git a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h index 17cd811331d..118bf56602a 100644 --- a/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h +++ b/arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h @@ -118,12 +118,8 @@ /* TWSI addresses */ /* starting from A38x A0, i2c address of EEPROM is 0x57 */ -#ifdef CONFIG_ARMADA_39X -#define EEPROM_I2C_ADDR 0x50 -#else #define EEPROM_I2C_ADDR (sys_env_device_rev_get() == \ MV_88F68XX_Z1_ID ? 0x50 : 0x57) -#endif #define RD_GET_MODE_ADDR 0x4c #define DB_GET_MODE_SLM1363_ADDR 0x25 #define DB_GET_MODE_SLM1364_ADDR 0x24 @@ -216,7 +212,6 @@ #define A39X_MV_MARVELL_BOARD_NUM (A39X_MV_MAX_MARVELL_BOARD_ID - \ A39X_MARVELL_BOARD_ID_BASE) -#ifdef CONFIG_ARMADA_38X #define CUTOMER_BOARD_ID_BASE A38X_CUSTOMER_BOARD_ID_BASE #define CUSTOMER_BOARD_ID0 A38X_CUSTOMER_BOARD_ID0 #define CUSTOMER_BOARD_ID1 A38X_CUSTOMER_BOARD_ID1 @@ -227,18 +222,6 @@ #define MV_MARVELL_BOARD_NUM A38X_MV_MARVELL_BOARD_NUM #define MV_DEFAULT_BOARD_ID DB_68XX_ID #define MV_DEFAULT_DEVICE_ID MV_6811 -#elif defined(CONFIG_ARMADA_39X) -#define CUTOMER_BOARD_ID_BASE A39X_CUSTOMER_BOARD_ID_BASE -#define CUSTOMER_BOARD_ID0 A39X_CUSTOMER_BOARD_ID0 -#define CUSTOMER_BOARD_ID1 A39X_CUSTOMER_BOARD_ID1 -#define MV_MAX_CUSTOMER_BOARD_ID A39X_MV_MAX_CUSTOMER_BOARD_ID -#define MV_CUSTOMER_BOARD_NUM A39X_MV_CUSTOMER_BOARD_NUM -#define MARVELL_BOARD_ID_BASE A39X_MARVELL_BOARD_ID_BASE -#define MV_MAX_MARVELL_BOARD_ID A39X_MV_MAX_MARVELL_BOARD_ID -#define MV_MARVELL_BOARD_NUM A39X_MV_MARVELL_BOARD_NUM -#define MV_DEFAULT_BOARD_ID A39X_DB_69XX_ID -#define MV_DEFAULT_DEVICE_ID MV_6920 -#endif #define MV_INVALID_BOARD_ID 0xffffffff @@ -295,11 +278,7 @@ enum { #define MV_6920_INDEX 0 #define MV_6928_INDEX 1 -#ifdef CONFIG_ARMADA_38X #define MAX_DEV_ID_NUM 4 -#else -#define MAX_DEV_ID_NUM 2 -#endif #define MV_6820_INDEX 0 #define MV_6810_INDEX 1 @@ -340,21 +319,13 @@ enum suspend_wakeup_status { * If suspend to RAM is not supported set '-1' */ #ifdef CONFIG_CUSTOMER_BOARD_SUPPORT -#ifdef CONFIG_ARMADA_38X #define MV_BOARD_WAKEUP_GPIO_INFO { \ {A38X_CUSTOMER_BOARD_ID0, -1 }, \ {A38X_CUSTOMER_BOARD_ID0, -1 }, \ }; -#else -#define MV_BOARD_WAKEUP_GPIO_INFO { \ - {A39X_CUSTOMER_BOARD_ID0, -1 }, \ - {A39X_CUSTOMER_BOARD_ID0, -1 }, \ -}; -#endif /* CONFIG_ARMADA_38X */ #else -#ifdef CONFIG_ARMADA_38X #define MV_BOARD_WAKEUP_GPIO_INFO { \ {RD_NAS_68XX_ID, -2 }, \ {DB_68XX_ID, -1 }, \ @@ -364,12 +335,6 @@ enum suspend_wakeup_status { {DB_BP_6821_ID, -2 }, \ {DB_AMC_6820_ID, -2 }, \ }; -#else -#define MV_BOARD_WAKEUP_GPIO_INFO { \ - {A39X_RD_69XX_ID, -1 }, \ - {A39X_DB_69XX_ID, -1 }, \ -}; -#endif /* CONFIG_ARMADA_38X */ #endif /* CONFIG_CUSTOMER_BOARD_SUPPORT */ u32 mv_board_tclk_get(void); diff --git a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c index 7f7df6794a9..6523281f2b2 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c +++ b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c @@ -915,10 +915,8 @@ int ddr3_tip_dynamic_write_leveling(u32 dev_num, int phase_remove) DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("training done failed\n")); } else { /* check for training pass */ reg_data = data_read[0]; -#if defined(CONFIG_ARMADA_38X) /* JIRA #1498 for 16 bit with ECC */ if (tm->bus_act_mask == 0xb) /* set to data to 0 to skip the check */ reg_data = 0; -#endif if (reg_data != PASS) DEBUG_LEVELING(DEBUG_LEVEL_INFO, ("training result failed\n")); diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.c b/drivers/ddr/marvell/a38x/mv_ddr_plat.c index da0d63d4f7a..faafc86ea26 100644 --- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c +++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c @@ -559,11 +559,7 @@ static int ddr3_tip_a38x_get_medium_freq(int dev_num, enum mv_ddr_freq *freq) static int ddr3_tip_a38x_get_device_info(u8 dev_num, struct ddr3_device_info *info_ptr) { -#if defined(CONFIG_ARMADA_39X) - info_ptr->device_id = 0x6900; -#else info_ptr->device_id = 0x6800; -#endif info_ptr->ck_delay = ck_delay; return MV_OK; @@ -666,11 +662,7 @@ static int mv_ddr_sw_db_init(u32 dev_num, u32 board_id) ddr3_tip_dev_attr_set(dev_num, MV_ATTR_TIP_REV, MV_TIP_REV_4); ddr3_tip_dev_attr_set(dev_num, MV_ATTR_PHY_EDGE, MV_DDR_PHY_EDGE_POSITIVE); ddr3_tip_dev_attr_set(dev_num, MV_ATTR_OCTET_PER_INTERFACE, DDR_INTERFACE_OCTETS_NUM); -#ifdef CONFIG_ARMADA_39X - ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 1); -#else ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 0); -#endif ca_delay = 0; delay_enable = 1; diff --git a/drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h b/drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h index cf5142094d3..10b0d45b35e 100644 --- a/drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h +++ b/drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h @@ -79,7 +79,6 @@ enum suspend_wakeup_status { * If suspend to RAM is not supported set '-1' */ -#ifdef CONFIG_ARMADA_38X #define MV_BOARD_WAKEUP_GPIO_INFO { \ {RD_NAS_68XX_ID, -2 }, \ {DB_68XX_ID, -1 }, \ @@ -89,12 +88,6 @@ enum suspend_wakeup_status { {DB_BP_6821_ID, -2 }, \ {DB_AMC_6820_ID, -2 }, \ }; -#else -#define MV_BOARD_WAKEUP_GPIO_INFO { \ - {A39X_RD_69XX_ID, -1 }, \ - {A39X_DB_69XX_ID, -1 }, \ -}; -#endif /* CONFIG_ARMADA_38X */ enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void); u32 mv_ddr_sys_env_get_cs_ena_from_reg(void); diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e793cd1169f..819e362e5b5 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -43,7 +43,6 @@ CONFIG_ARC_MMU_VER CONFIG_ARMADA100 CONFIG_ARMADA100_FEC CONFIG_ARMADA168 -CONFIG_ARMADA_39X CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_MAX_SIZE CONFIG_ARMV7_SECURE_RESERVE_SIZE diff --git a/tools/Makefile b/tools/Makefile index 2d550432ba5..62de7e6fe07 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -150,12 +150,12 @@ ifdef CONFIG_SYS_U_BOOT_OFFS HOSTCFLAGS_kwbimage.o += -DCONFIG_SYS_U_BOOT_OFFS=$(CONFIG_SYS_U_BOOT_OFFS) endif -ifneq ($(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X),) +ifneq ($(CONFIG_ARMADA_38X),) HOSTCFLAGS_kwbimage.o += -DCONFIG_KWB_SECURE endif # MXSImage needs LibSSL -ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X)$(CONFIG_FIT_SIGNATURE)$(CONFIG_FIT_CIPHER),) +ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_FIT_SIGNATURE)$(CONFIG_FIT_CIPHER),) HOSTCFLAGS_kwbimage.o += \ $(shell pkg-config --cflags libssl libcrypto 2> /dev/null || echo "") HOSTLDLIBS_mkimage += \ -- cgit v1.3.1 From 6ad0769c8e76e4abe321f59061ad8e35d950bca3 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 15 Mar 2021 10:50:47 -0400 Subject: configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini --- configs/am65x_evm_a53_defconfig | 1 - configs/am65x_hs_evm_a53_defconfig | 1 - configs/chromebook_coral_defconfig | 2 +- configs/cm_fx6_defconfig | 1 - configs/firefly-rk3288_defconfig | 1 - configs/libretech-cc_v2_defconfig | 1 - configs/libretech-s905d-pc_defconfig | 1 - configs/libretech-s912-pc_defconfig | 1 - configs/mvebu_espressobin-88f3720_defconfig | 1 - configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/pinebook-pro-rk3399_defconfig | 1 - configs/rock960-rk3399_defconfig | 1 - configs/rockpro64-rk3399_defconfig | 1 - configs/rpi_0_w_defconfig | 1 - configs/rpi_2_defconfig | 1 - configs/rpi_3_32b_defconfig | 1 - configs/rpi_3_b_plus_defconfig | 1 - configs/rpi_3_defconfig | 1 - configs/rpi_4_32b_defconfig | 1 - configs/rpi_4_defconfig | 1 - configs/rpi_arm64_defconfig | 1 - configs/rpi_defconfig | 1 - configs/tbs2910_defconfig | 1 - scripts/config_whitelist.txt | 1 - 25 files changed, 3 insertions(+), 25 deletions(-) (limited to 'scripts') diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 0b5a27f7cfb..1f2d78d1ac6 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -98,7 +98,6 @@ CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_OMAP24XX=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_DM_MMC=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 7d467c167e9..a9737d0835f 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -92,7 +92,6 @@ CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_OMAP24XX=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_DM_MMC=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index ab73a0a88ce..0811ffd79d4 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -20,6 +20,7 @@ CONFIG_HAVE_ACPI_RESUME=y CONFIG_INTEL_CAR_CQOS=y CONFIG_X86_OFFSET_U_BOOT=0xffd00000 CONFIG_X86_OFFSET_SPL=0xffe80000 +CONFIG_INTEL_ACPIGEN=y CONFIG_INTEL_GENERIC_WIFI=y CONFIG_CHROMEOS=y CONFIG_BOOTSTAGE=y @@ -76,7 +77,6 @@ CONFIG_ENV_OVERWRITE=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y -CONFIG_INTEL_ACPIGEN=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_DW=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 86e4135b117..aed25b63675 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -63,7 +63,6 @@ CONFIG_SPL_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y # CONFIG_DWC_AHSATA_AHCI is not set -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_MTD=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 6c04123b2d2..b3c22346f4e 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -48,7 +48,6 @@ CONFIG_SPL_CLK=y CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_DM_KEYBOARD=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MMC_DW=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index 017e81bb5d1..86f88dbc6eb 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -31,7 +31,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index 9d4c880a3b2..85dfd9c7300 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -33,7 +33,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index cf600c1cbe8..a515833cc5c 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -32,7 +32,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SARADC_MESON=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_MESON_GX=y CONFIG_MTD=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index c791f98dfea..212bc00786c 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -89,4 +89,3 @@ CONFIG_USB_ETHER_MCS7830=y CONFIG_USB_ETHER_RTL8152=y CONFIG_USB_ETHER_SMSC95XX=y CONFIG_SHA1=y -CONFIG_SHA256=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 9ed4064ffc0..4f4e7aca4d2 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -20,7 +20,6 @@ CONFIG_NXP_BOARD_REVISION=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabreauto" CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y -CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y @@ -28,6 +27,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_FS_EXT4=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index dd9ac933478..e5275330591 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -20,13 +20,13 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd" CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FIT_IMAGE_TINY=y CONFIG_SPL_USB_HOST_SUPPORT=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index a471c3e06a5..c4bab29a063 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -40,7 +40,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_DM_KEYBOARD=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index 56ebaeb34ec..28d1fc53a59 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -33,7 +33,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_DM_KEYBOARD=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 1d4f5449433..e9a01ec9d56 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -35,7 +35,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_DM_KEYBOARD=y CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index 93d790aae6d..01565991f50 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -21,7 +21,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index a0f36e1a930..1ad0626782a 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -21,7 +21,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index cdc67cb3ac6..a14d7eefbce 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -22,7 +22,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig index 1321ee6b262..ebab0b4f860 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig @@ -22,7 +22,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 7075d39d10a..4aedfb17cd2 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -22,7 +22,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig index 91eeb3cd32b..0cbdd5fee10 100644 --- a/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig @@ -24,7 +24,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_DMA=y CONFIG_DFU_MMC=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig index cb6ee773e15..3f21f99edbf 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig @@ -24,7 +24,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_DMA=y CONFIG_DFU_MMC=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index 4d69026c1d5..d282d509ce8 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -21,7 +21,6 @@ CONFIG_OF_BOARD=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_DMA=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index bba36ca7fc4..78638105f75 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -21,7 +21,6 @@ CONFIG_OF_EMBED=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 239e9ed04ec..b71657ad7fb 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -67,7 +67,6 @@ CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y -CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 819e362e5b5..43295eec7d4 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3941,7 +3941,6 @@ CONFIG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP CONFIG_VEXPRESS_ORIGINAL_MEMORY_MAP -CONFIG_VID CONFIG_VIDEO_BCM2835 CONFIG_VIDEO_BMP_LOGO CONFIG_VIDEO_CORALP -- cgit v1.3.1