From d1c3d8bdfa41a7002bc9c9c0fe8cf7b41d573c0e Mon Sep 17 00:00:00 2001 From: Daniel Schwierzeck Date: Fri, 7 Sep 2018 19:18:44 +0200 Subject: MIPS: start.S: make boot config at offset 0x10 configurable Some MIPS systems store some board-specific boot configuration in the U-Boot binary at offset 0x10. This is used by Malta boards and by Lantiq/Intel SoC's when booting from parallel NOR flash. Convert the hard-coded values to Kconfig options to remove such board-specific stuff out of the generic start.S code. This also deprecates the config option CONFIG_SYS_XWAY_EBU_BOOTCFG. Signed-off-by: Daniel Schwierzeck --- scripts/config_whitelist.txt | 1 - 1 file changed, 1 deletion(-) (limited to 'scripts') diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 94953d87380..15c1cc08b79 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -4421,7 +4421,6 @@ CONFIG_SYS_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB3_ADDR CONFIG_SYS_XIMG_LEN -CONFIG_SYS_XWAY_EBU_BOOTCFG CONFIG_SYS_ZYNQ_QSPI_WAIT CONFIG_SYS_ZYNQ_SPI_WAIT CONFIG_SYS_i2C_FSL -- cgit v1.3.1 From 46203baf665c6bab72bd5945a37d9a7e0a77699a Mon Sep 17 00:00:00 2001 From: Daniel Schwierzeck Date: Fri, 7 Sep 2018 19:02:06 +0200 Subject: MIPS: cache: remove config option CONFIG_SYS_MIPS_CACHE_MODE Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT (or CONF_CM_CACHABLE_COW when a CM is available). There is no need to make this configurable. Signed-off-by: Daniel Schwierzeck --- README | 14 -------------- arch/mips/lib/cache_init.S | 6 +----- include/configs/imgtec_xilfpga.h | 3 --- include/configs/pic32mzdask.h | 3 --- scripts/config_whitelist.txt | 1 - 5 files changed, 1 insertion(+), 26 deletions(-) (limited to 'scripts') diff --git a/README b/README index 21d1f8a007b..f7ed7eaae16 100644 --- a/README +++ b/README @@ -528,20 +528,6 @@ The following options need to be configured: pointer. This is needed for the temporary stack before relocation. - CONFIG_SYS_MIPS_CACHE_MODE - - Cache operation mode for the MIPS CPU. - See also arch/mips/include/asm/mipsregs.h. - Possible values are: - CONF_CM_CACHABLE_NO_WA - CONF_CM_CACHABLE_WA - CONF_CM_UNCACHED - CONF_CM_CACHABLE_NONCOHERENT - CONF_CM_CACHABLE_CE - CONF_CM_CACHABLE_COW - CONF_CM_CACHABLE_CUW - CONF_CM_CACHABLE_ACCELERATED - CONFIG_XWAY_SWAP_BYTES Enable compilation of tools/xway-swap-bytes needed for Lantiq diff --git a/arch/mips/lib/cache_init.S b/arch/mips/lib/cache_init.S index 5616ee6dfd6..cfad1d9c8a9 100644 --- a/arch/mips/lib/cache_init.S +++ b/arch/mips/lib/cache_init.S @@ -14,10 +14,6 @@ #include #include -#ifndef CONFIG_SYS_MIPS_CACHE_MODE -#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT -#endif - .macro f_fill64 dst, offset, val LONG_S \val, (\offset + 0 * LONGSIZE)(\dst) LONG_S \val, (\offset + 1 * LONGSIZE)(\dst) @@ -331,7 +327,7 @@ l1_init: and t0, t0, t1 PTR_LI t1, CKSEG1 or t0, t0, t1 - li a0, CONFIG_SYS_MIPS_CACHE_MODE + li a0, CONF_CM_CACHABLE_NONCOHERENT jalr.hb t0 /* diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h index 29b23fa40e5..8e2d72323d6 100644 --- a/include/configs/imgtec_xilfpga.h +++ b/include/configs/imgtec_xilfpga.h @@ -19,9 +19,6 @@ /* CPU Timer rate */ #define CONFIG_SYS_MIPS_TIMER_FREQ 50000000 -/* Cache Configuration */ -#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT - /*---------------------------------------------------------------------- * Memory Layout */ diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 374957737dd..d3ab5575ee7 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -16,9 +16,6 @@ /* CPU Timer rate */ #define CONFIG_SYS_MIPS_TIMER_FREQ 100000000 -/* Cache Configuration */ -#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT - /*---------------------------------------------------------------------- * Memory Layout */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 15c1cc08b79..e058a06e8f9 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3424,7 +3424,6 @@ CONFIG_SYS_MEM_TOP_HIDE CONFIG_SYS_MFD CONFIG_SYS_MHZ CONFIG_SYS_MII_MODE -CONFIG_SYS_MIPS_CACHE_MODE CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_SYS_MMCSD_FS_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR -- cgit v1.3.1