// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
 */

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/memreserve/ 0x80002fa0 0x00000008;

/ {
	aliases {
		serial3 = &uart3;
	};

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x0 0x0>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0x80002fa0>;
		};
		cpu1: cpu@1 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x0 0x1>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0x80002fa0>;
		};
		cpu2: cpu@2 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x0 0x2>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0x80002fa0>;
		};
		cpu3: cpu@3 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0x0 0x3>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0x80002fa0>;
		};
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupt-parent = <&gic500>;
		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
		clock-frequency = <1000000000>;
	};

	clocks {
		refclk: refclk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <125000000>;
			bootph-pre-reloc;
		};
	};

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		interrupt-parent = <&gic500>;
		ranges;

		gic500: interrupt-controller@40400000 {
			compatible = "arm,gic-v3";
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;
			#interrupt-cells = <3>;
			interrupt-controller;
			#redistributor-regions = <1>;
			reg = <0x00 0x40400000 0x00 0x10000>,
			      <0x00 0x40500000 0x00 0xc0000>;
			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
		};

		uart3: serial@33020800 {
			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
			interrupt-parent = <&gic500>;
			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
			reg = <0x00 0x33020800 0x00 0x100>;
			clock-names = "uart_clk", "pclk";
			clocks = <&refclk &refclk>;
			bootph-pre-reloc;
			status = "disabled";
		};
	};
};