// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2026 MediaTek Inc. * Author: Bo-Chen Chen */ #include #include "pinctrl-mtk-common.h" enum { IO_BASE, IO_BASE_LM, IO_BASE_RB0, IO_BASE_RB1, IO_BASE_BM0, IO_BASE_BM1, IO_BASE_BM2, IO_BASE_LT0, IO_BASE_LT1, IO_BASE_RT, IO_BASE_EINT0, IO_BASE_EINT1, IO_BASE_EINT2, IO_BASE_EINT3, IO_BASE_EINT4, }; #define PIN_FIELD_IOCFG0(s_pin, e_pin, s_addr, x_addrs, s_bit, x_bits) \ PIN_FIELD_BASE_CALC(s_pin, e_pin, IO_BASE, s_addr, x_addrs, s_bit, \ x_bits, 32, 0) #define PIN_FIELD_BASE(pin, i_base, s_addr, s_bit, x_bits) \ PIN_FIELD_BASE_CALC(pin, pin, i_base, s_addr, 0x10, s_bit, x_bits, \ 32, 0) static const struct mtk_pin_field_calc mt8189_pin_mode_range[] = { PIN_FIELD_IOCFG0(0, 182, 0x0300, 0x10, 0, 4), }; static const struct mtk_pin_field_calc mt8189_pin_dir_range[] = { PIN_FIELD_IOCFG0(0, 182, 0x0000, 0x10, 0, 1), }; static const struct mtk_pin_field_calc mt8189_pin_di_range[] = { PIN_FIELD_IOCFG0(0, 182, 0x0200, 0x10, 0, 1), }; static const struct mtk_pin_field_calc mt8189_pin_do_range[] = { PIN_FIELD_IOCFG0(0, 182, 0x0100, 0x10, 0, 1), }; static const struct mtk_pin_field_calc mt8189_pin_smt_range[] = { PIN_FIELD_BASE(0, IO_BASE_RB0, 0x00e0, 5, 1), PIN_FIELD_BASE(1, IO_BASE_RB1, 0x00c0, 3, 1), PIN_FIELD_BASE(2, IO_BASE_RB1, 0x00c0, 4, 1), PIN_FIELD_BASE(3, IO_BASE_RB1, 0x00c0, 5, 1), PIN_FIELD_BASE(4, IO_BASE_RB1, 0x00c0, 6, 1), PIN_FIELD_BASE(5, IO_BASE_RB1, 0x00c0, 7, 1), PIN_FIELD_BASE(6, IO_BASE_RB0, 0x00e0, 6, 1), PIN_FIELD_BASE(7, IO_BASE_RB0, 0x00e0, 7, 1), PIN_FIELD_BASE(8, IO_BASE_RB0, 0x00e0, 8, 1), PIN_FIELD_BASE(9, IO_BASE_RB0, 0x00e0, 9, 1), PIN_FIELD_BASE(10, IO_BASE_RB0, 0x00e0, 10, 1), PIN_FIELD_BASE(11, IO_BASE_RB0, 0x00e0, 11, 1), PIN_FIELD_BASE(12, IO_BASE_BM1, 0x00e0, 5, 1), PIN_FIELD_BASE(13, IO_BASE_BM1, 0x00e0, 6, 1), PIN_FIELD_BASE(14, IO_BASE_BM2, 0x00f0, 0, 1), PIN_FIELD_BASE(15, IO_BASE_BM2, 0x00f0, 1, 1), PIN_FIELD_BASE(16, IO_BASE_BM1, 0x00e0, 7, 1), PIN_FIELD_BASE(17, IO_BASE_BM1, 0x00e0, 8, 1), PIN_FIELD_BASE(18, IO_BASE_RB0, 0x00e0, 0, 1), PIN_FIELD_BASE(19, IO_BASE_RB0, 0x00e0, 2, 1), PIN_FIELD_BASE(20, IO_BASE_RB0, 0x00e0, 1, 1), PIN_FIELD_BASE(21, IO_BASE_RB0, 0x00e0, 3, 1), PIN_FIELD_BASE(22, IO_BASE_RT, 0x00f0, 0, 1), PIN_FIELD_BASE(23, IO_BASE_RT, 0x00f0, 1, 1), PIN_FIELD_BASE(24, IO_BASE_RT, 0x00f0, 2, 1), PIN_FIELD_BASE(25, IO_BASE_LM, 0x00c0, 2, 1), PIN_FIELD_BASE(26, IO_BASE_LM, 0x00c0, 1, 1), PIN_FIELD_BASE(27, IO_BASE_BM1, 0x00e0, 1, 1), PIN_FIELD_BASE(28, IO_BASE_BM1, 0x00e0, 2, 1), PIN_FIELD_BASE(29, IO_BASE_LM, 0x00c0, 0, 1), PIN_FIELD_BASE(30, IO_BASE_BM1, 0x00e0, 0, 1), PIN_FIELD_BASE(31, IO_BASE_BM2, 0x00f0, 19, 1), PIN_FIELD_BASE(32, IO_BASE_BM0, 0x00c0, 30, 1), PIN_FIELD_BASE(33, IO_BASE_BM2, 0x00f0, 21, 1), PIN_FIELD_BASE(34, IO_BASE_BM2, 0x00f0, 20, 1), PIN_FIELD_BASE(35, IO_BASE_BM2, 0x00f0, 23, 1), PIN_FIELD_BASE(36, IO_BASE_BM2, 0x00f0, 22, 1), PIN_FIELD_BASE(37, IO_BASE_BM2, 0x00f0, 25, 1), PIN_FIELD_BASE(38, IO_BASE_BM2, 0x00f0, 24, 1), PIN_FIELD_BASE(39, IO_BASE_BM2, 0x00f0, 5, 1), PIN_FIELD_BASE(40, IO_BASE_BM2, 0x00f0, 2, 1), PIN_FIELD_BASE(41, IO_BASE_BM2, 0x00f0, 3, 1), PIN_FIELD_BASE(42, IO_BASE_BM2, 0x00f0, 4, 1), PIN_FIELD_BASE(43, IO_BASE_BM2, 0x00f0, 6, 1), PIN_FIELD_BASE(44, IO_BASE_RB0, 0x00e0, 20, 1), PIN_FIELD_BASE(45, IO_BASE_RB0, 0x00e0, 21, 1), PIN_FIELD_BASE(46, IO_BASE_RB0, 0x00e0, 22, 1), PIN_FIELD_BASE(47, IO_BASE_RB0, 0x00e0, 23, 1), PIN_FIELD_BASE(48, IO_BASE_LM, 0x00c0, 5, 1), PIN_FIELD_BASE(49, IO_BASE_LM, 0x00c0, 4, 1), PIN_FIELD_BASE(50, IO_BASE_LM, 0x00c0, 3, 1), PIN_FIELD_BASE(51, IO_BASE_RB1, 0x00c0, 8, 1), PIN_FIELD_BASE(52, IO_BASE_RB1, 0x00c0, 10, 1), PIN_FIELD_BASE(53, IO_BASE_RB1, 0x00c0, 9, 1), PIN_FIELD_BASE(54, IO_BASE_RB1, 0x00c0, 11, 1), PIN_FIELD_BASE(55, IO_BASE_LM, 0x00c0, 6, 1), PIN_FIELD_BASE(56, IO_BASE_LM, 0x00c0, 7, 1), PIN_FIELD_BASE(57, IO_BASE_BM1, 0x00e0, 13, 1), PIN_FIELD_BASE(58, IO_BASE_BM1, 0x00e0, 17, 1), PIN_FIELD_BASE(59, IO_BASE_BM1, 0x00e0, 14, 1), PIN_FIELD_BASE(60, IO_BASE_BM1, 0x00e0, 18, 1), PIN_FIELD_BASE(61, IO_BASE_BM1, 0x00e0, 15, 1), PIN_FIELD_BASE(62, IO_BASE_BM1, 0x00e0, 19, 1), PIN_FIELD_BASE(63, IO_BASE_BM1, 0x00e0, 16, 1), PIN_FIELD_BASE(64, IO_BASE_BM1, 0x00e0, 20, 1), PIN_FIELD_BASE(65, IO_BASE_RT, 0x00f0, 10, 1), PIN_FIELD_BASE(66, IO_BASE_RT, 0x00f0, 12, 1), PIN_FIELD_BASE(67, IO_BASE_RT, 0x00f0, 11, 1), PIN_FIELD_BASE(68, IO_BASE_RT, 0x00f0, 13, 1), PIN_FIELD_BASE(69, IO_BASE_BM1, 0x00e0, 22, 1), PIN_FIELD_BASE(70, IO_BASE_BM1, 0x00e0, 21, 1), PIN_FIELD_BASE(71, IO_BASE_BM1, 0x00e0, 24, 1), PIN_FIELD_BASE(72, IO_BASE_BM1, 0x00e0, 23, 1), PIN_FIELD_BASE(73, IO_BASE_BM1, 0x00e0, 26, 1), PIN_FIELD_BASE(74, IO_BASE_BM1, 0x00e0, 25, 1), PIN_FIELD_BASE(75, IO_BASE_BM2, 0x00f0, 13, 1), PIN_FIELD_BASE(76, IO_BASE_BM1, 0x00e0, 27, 1), PIN_FIELD_BASE(77, IO_BASE_RB1, 0x00c0, 13, 1), PIN_FIELD_BASE(78, IO_BASE_RB1, 0x00c0, 12, 1), PIN_FIELD_BASE(79, IO_BASE_RB1, 0x00c0, 15, 1), PIN_FIELD_BASE(80, IO_BASE_RB1, 0x00c0, 14, 1), PIN_FIELD_BASE(81, IO_BASE_BM1, 0x00e0, 29, 1), PIN_FIELD_BASE(82, IO_BASE_BM1, 0x00e0, 28, 1), PIN_FIELD_BASE(83, IO_BASE_BM1, 0x00e0, 30, 1), PIN_FIELD_BASE(84, IO_BASE_RB0, 0x00e0, 24, 1), PIN_FIELD_BASE(85, IO_BASE_RB0, 0x00e0, 25, 1), PIN_FIELD_BASE(86, IO_BASE_RB0, 0x00e0, 26, 1), PIN_FIELD_BASE(87, IO_BASE_RB0, 0x00e0, 27, 1), PIN_FIELD_BASE(88, IO_BASE_LT0, 0x0120, 20, 1), PIN_FIELD_BASE(89, IO_BASE_LT0, 0x0120, 19, 1), PIN_FIELD_BASE(90, IO_BASE_LT0, 0x0120, 22, 1), PIN_FIELD_BASE(91, IO_BASE_LT0, 0x0120, 21, 1), PIN_FIELD_BASE(92, IO_BASE_LT0, 0x0120, 16, 1), PIN_FIELD_BASE(93, IO_BASE_LT0, 0x0120, 17, 1), PIN_FIELD_BASE(94, IO_BASE_LT0, 0x0120, 23, 1), PIN_FIELD_BASE(95, IO_BASE_LT0, 0x0120, 15, 1), PIN_FIELD_BASE(96, IO_BASE_LT0, 0x0120, 18, 1), PIN_FIELD_BASE(97, IO_BASE_LT0, 0x0120, 0, 1), PIN_FIELD_BASE(98, IO_BASE_LT0, 0x0120, 5, 1), PIN_FIELD_BASE(99, IO_BASE_LT0, 0x0120, 3, 1), PIN_FIELD_BASE(100, IO_BASE_LT0, 0x0120, 4, 1), PIN_FIELD_BASE(101, IO_BASE_LT0, 0x0120, 1, 1), PIN_FIELD_BASE(102, IO_BASE_LT0, 0x0120, 2, 1), PIN_FIELD_BASE(103, IO_BASE_RB0, 0x00e0, 15, 1), PIN_FIELD_BASE(104, IO_BASE_RB0, 0x00e0, 12, 1), PIN_FIELD_BASE(105, IO_BASE_RB0, 0x00e0, 14, 1), PIN_FIELD_BASE(106, IO_BASE_RB0, 0x00e0, 13, 1), PIN_FIELD_BASE(107, IO_BASE_RB0, 0x00e0, 19, 1), PIN_FIELD_BASE(108, IO_BASE_RB0, 0x00e0, 16, 1), PIN_FIELD_BASE(109, IO_BASE_RB0, 0x00e0, 18, 1), PIN_FIELD_BASE(110, IO_BASE_RB0, 0x00e0, 17, 1), PIN_FIELD_BASE(111, IO_BASE_RB0, 0x00e0, 4, 1), PIN_FIELD_BASE(112, IO_BASE_RB1, 0x00c0, 0, 1), PIN_FIELD_BASE(113, IO_BASE_RB1, 0x00c0, 1, 1), PIN_FIELD_BASE(114, IO_BASE_RB1, 0x00c0, 2, 1), PIN_FIELD_BASE(115, IO_BASE_BM1, 0x00e0, 9, 1), PIN_FIELD_BASE(116, IO_BASE_BM1, 0x00e0, 12, 1), PIN_FIELD_BASE(117, IO_BASE_BM1, 0x00e0, 10, 1), PIN_FIELD_BASE(118, IO_BASE_BM1, 0x00e0, 11, 1), PIN_FIELD_BASE(119, IO_BASE_BM0, 0x00c0, 26, 1), PIN_FIELD_BASE(120, IO_BASE_BM0, 0x00c0, 25, 1), PIN_FIELD_BASE(121, IO_BASE_BM0, 0x00c0, 24, 1), PIN_FIELD_BASE(122, IO_BASE_BM0, 0x00c0, 23, 1), PIN_FIELD_BASE(123, IO_BASE_BM0, 0x00c0, 19, 1), PIN_FIELD_BASE(124, IO_BASE_BM0, 0x00c0, 18, 1), PIN_FIELD_BASE(125, IO_BASE_BM0, 0x00c0, 17, 1), PIN_FIELD_BASE(126, IO_BASE_BM0, 0x00c0, 16, 1), PIN_FIELD_BASE(127, IO_BASE_BM0, 0x00c0, 22, 1), PIN_FIELD_BASE(128, IO_BASE_BM0, 0x00c0, 15, 1), PIN_FIELD_BASE(129, IO_BASE_BM0, 0x00c0, 20, 1), PIN_FIELD_BASE(130, IO_BASE_BM0, 0x00c0, 27, 1), PIN_FIELD_BASE(131, IO_BASE_BM0, 0x00c0, 13, 1), PIN_FIELD_BASE(132, IO_BASE_BM0, 0x00c0, 14, 1), PIN_FIELD_BASE(133, IO_BASE_BM0, 0x00c0, 28, 1), PIN_FIELD_BASE(134, IO_BASE_BM0, 0x00c0, 21, 1), PIN_FIELD_BASE(135, IO_BASE_BM0, 0x00c0, 11, 1), PIN_FIELD_BASE(136, IO_BASE_BM0, 0x00c0, 12, 1), PIN_FIELD_BASE(137, IO_BASE_BM1, 0x00e0, 3, 1), PIN_FIELD_BASE(138, IO_BASE_BM1, 0x00e0, 4, 1), PIN_FIELD_BASE(139, IO_BASE_BM0, 0x00c0, 3, 1), PIN_FIELD_BASE(140, IO_BASE_BM0, 0x00c0, 4, 1), PIN_FIELD_BASE(141, IO_BASE_BM0, 0x00c0, 0, 1), PIN_FIELD_BASE(142, IO_BASE_BM0, 0x00c0, 1, 1), PIN_FIELD_BASE(143, IO_BASE_BM0, 0x00c0, 2, 1), PIN_FIELD_BASE(144, IO_BASE_BM0, 0x00c0, 5, 1), PIN_FIELD_BASE(145, IO_BASE_BM0, 0x00c0, 6, 1), PIN_FIELD_BASE(146, IO_BASE_BM0, 0x00c0, 7, 1), PIN_FIELD_BASE(147, IO_BASE_BM0, 0x00c0, 8, 1), PIN_FIELD_BASE(148, IO_BASE_BM0, 0x00c0, 9, 1), PIN_FIELD_BASE(149, IO_BASE_BM0, 0x00c0, 10, 1), PIN_FIELD_BASE(150, IO_BASE_BM2, 0x00f0, 14, 1), PIN_FIELD_BASE(151, IO_BASE_BM0, 0x00c0, 29, 1), PIN_FIELD_BASE(152, IO_BASE_BM2, 0x00f0, 15, 1), PIN_FIELD_BASE(153, IO_BASE_BM2, 0x00f0, 16, 1), PIN_FIELD_BASE(154, IO_BASE_BM2, 0x00f0, 17, 1), PIN_FIELD_BASE(155, IO_BASE_BM2, 0x00f0, 18, 1), PIN_FIELD_BASE(156, IO_BASE_LT0, 0x0120, 12, 1), PIN_FIELD_BASE(157, IO_BASE_LT0, 0x0120, 11, 1), PIN_FIELD_BASE(158, IO_BASE_LT0, 0x0120, 10, 1), PIN_FIELD_BASE(159, IO_BASE_LT1, 0x0090, 2, 1), PIN_FIELD_BASE(160, IO_BASE_LT0, 0x0120, 14, 1), PIN_FIELD_BASE(161, IO_BASE_LT0, 0x0120, 7, 1), PIN_FIELD_BASE(162, IO_BASE_LT0, 0x0120, 6, 1), PIN_FIELD_BASE(163, IO_BASE_LT1, 0x0090, 1, 1), PIN_FIELD_BASE(164, IO_BASE_LT0, 0x0120, 9, 1), PIN_FIELD_BASE(165, IO_BASE_LT0, 0x0120, 8, 1), PIN_FIELD_BASE(166, IO_BASE_LT1, 0x0090, 0, 1), PIN_FIELD_BASE(167, IO_BASE_LT0, 0x0120, 13, 1), PIN_FIELD_BASE(168, IO_BASE_BM2, 0x00f0, 8, 1), PIN_FIELD_BASE(169, IO_BASE_BM2, 0x00f0, 7, 1), PIN_FIELD_BASE(170, IO_BASE_BM2, 0x00f0, 9, 1), PIN_FIELD_BASE(171, IO_BASE_BM2, 0x00f0, 10, 1), PIN_FIELD_BASE(172, IO_BASE_BM2, 0x00f0, 11, 1), PIN_FIELD_BASE(173, IO_BASE_BM2, 0x00f0, 12, 1), PIN_FIELD_BASE(174, IO_BASE_RT, 0x00f0, 5, 1), PIN_FIELD_BASE(175, IO_BASE_RT, 0x00f0, 4, 1), PIN_FIELD_BASE(176, IO_BASE_RT, 0x00f0, 6, 1), PIN_FIELD_BASE(177, IO_BASE_RT, 0x00f0, 7, 1), PIN_FIELD_BASE(178, IO_BASE_RT, 0x00f0, 8, 1), PIN_FIELD_BASE(179, IO_BASE_RT, 0x00f0, 9, 1), PIN_FIELD_BASE(180, IO_BASE_LT0, 0x0120, 24, 1), PIN_FIELD_BASE(181, IO_BASE_LT0, 0x0120, 25, 1), PIN_FIELD_BASE(182, IO_BASE_RT, 0x00f0, 3, 1), }; static const struct mtk_pin_field_calc mt8189_pin_ies_range[] = { PIN_FIELD_BASE(0, IO_BASE_RB0, 0x0050, 5, 1), PIN_FIELD_BASE(1, IO_BASE_RB1, 0x0050, 3, 1), PIN_FIELD_BASE(2, IO_BASE_RB1, 0x0050, 4, 1), PIN_FIELD_BASE(3, IO_BASE_RB1, 0x0050, 5, 1), PIN_FIELD_BASE(4, IO_BASE_RB1, 0x0050, 6, 1), PIN_FIELD_BASE(5, IO_BASE_RB1, 0x0050, 7, 1), PIN_FIELD_BASE(6, IO_BASE_RB0, 0x0050, 6, 1), PIN_FIELD_BASE(7, IO_BASE_RB0, 0x0050, 7, 1), PIN_FIELD_BASE(8, IO_BASE_RB0, 0x0050, 8, 1), PIN_FIELD_BASE(9, IO_BASE_RB0, 0x0050, 9, 1), PIN_FIELD_BASE(10, IO_BASE_RB0, 0x0050, 10, 1), PIN_FIELD_BASE(11, IO_BASE_RB0, 0x0050, 11, 1), PIN_FIELD_BASE(12, IO_BASE_BM1, 0x0070, 5, 1), PIN_FIELD_BASE(13, IO_BASE_BM1, 0x0070, 6, 1), PIN_FIELD_BASE(14, IO_BASE_BM2, 0x0050, 0, 1), PIN_FIELD_BASE(15, IO_BASE_BM2, 0x0050, 1, 1), PIN_FIELD_BASE(16, IO_BASE_BM1, 0x0070, 7, 1), PIN_FIELD_BASE(17, IO_BASE_BM1, 0x0070, 8, 1), PIN_FIELD_BASE(18, IO_BASE_RB0, 0x0050, 0, 1), PIN_FIELD_BASE(19, IO_BASE_RB0, 0x0050, 2, 1), PIN_FIELD_BASE(20, IO_BASE_RB0, 0x0050, 1, 1), PIN_FIELD_BASE(21, IO_BASE_RB0, 0x0050, 3, 1), PIN_FIELD_BASE(22, IO_BASE_RT, 0x0040, 0, 1), PIN_FIELD_BASE(23, IO_BASE_RT, 0x0040, 1, 1), PIN_FIELD_BASE(24, IO_BASE_RT, 0x0040, 2, 1), PIN_FIELD_BASE(25, IO_BASE_LM, 0x0050, 2, 1), PIN_FIELD_BASE(26, IO_BASE_LM, 0x0050, 1, 1), PIN_FIELD_BASE(27, IO_BASE_BM1, 0x0070, 1, 1), PIN_FIELD_BASE(28, IO_BASE_BM1, 0x0070, 2, 1), PIN_FIELD_BASE(29, IO_BASE_LM, 0x0050, 0, 1), PIN_FIELD_BASE(30, IO_BASE_BM1, 0x0070, 0, 1), PIN_FIELD_BASE(31, IO_BASE_BM2, 0x0050, 19, 1), PIN_FIELD_BASE(32, IO_BASE_BM0, 0x0050, 30, 1), PIN_FIELD_BASE(33, IO_BASE_BM2, 0x0050, 21, 1), PIN_FIELD_BASE(34, IO_BASE_BM2, 0x0050, 20, 1), PIN_FIELD_BASE(35, IO_BASE_BM2, 0x0050, 23, 1), PIN_FIELD_BASE(36, IO_BASE_BM2, 0x0050, 22, 1), PIN_FIELD_BASE(37, IO_BASE_BM2, 0x0050, 25, 1), PIN_FIELD_BASE(38, IO_BASE_BM2, 0x0050, 24, 1), PIN_FIELD_BASE(39, IO_BASE_BM2, 0x0050, 5, 1), PIN_FIELD_BASE(40, IO_BASE_BM2, 0x0050, 2, 1), PIN_FIELD_BASE(41, IO_BASE_BM2, 0x0050, 3, 1), PIN_FIELD_BASE(42, IO_BASE_BM2, 0x0050, 4, 1), PIN_FIELD_BASE(43, IO_BASE_BM2, 0x0050, 6, 1), PIN_FIELD_BASE(44, IO_BASE_RB0, 0x0050, 20, 1), PIN_FIELD_BASE(45, IO_BASE_RB0, 0x0050, 21, 1), PIN_FIELD_BASE(46, IO_BASE_RB0, 0x0050, 22, 1), PIN_FIELD_BASE(47, IO_BASE_RB0, 0x0050, 23, 1), PIN_FIELD_BASE(48, IO_BASE_LM, 0x0050, 5, 1), PIN_FIELD_BASE(49, IO_BASE_LM, 0x0050, 4, 1), PIN_FIELD_BASE(50, IO_BASE_LM, 0x0050, 3, 1), PIN_FIELD_BASE(51, IO_BASE_RB1, 0x0050, 8, 1), PIN_FIELD_BASE(52, IO_BASE_RB1, 0x0050, 10, 1), PIN_FIELD_BASE(53, IO_BASE_RB1, 0x0050, 9, 1), PIN_FIELD_BASE(54, IO_BASE_RB1, 0x0050, 11, 1), PIN_FIELD_BASE(55, IO_BASE_LM, 0x0050, 6, 1), PIN_FIELD_BASE(56, IO_BASE_LM, 0x0050, 7, 1), PIN_FIELD_BASE(57, IO_BASE_BM1, 0x0070, 13, 1), PIN_FIELD_BASE(58, IO_BASE_BM1, 0x0070, 17, 1), PIN_FIELD_BASE(59, IO_BASE_BM1, 0x0070, 14, 1), PIN_FIELD_BASE(60, IO_BASE_BM1, 0x0070, 18, 1), PIN_FIELD_BASE(61, IO_BASE_BM1, 0x0070, 15, 1), PIN_FIELD_BASE(62, IO_BASE_BM1, 0x0070, 19, 1), PIN_FIELD_BASE(63, IO_BASE_BM1, 0x0070, 16, 1), PIN_FIELD_BASE(64, IO_BASE_BM1, 0x0070, 20, 1), PIN_FIELD_BASE(65, IO_BASE_RT, 0x0040, 10, 1), PIN_FIELD_BASE(66, IO_BASE_RT, 0x0040, 12, 1), PIN_FIELD_BASE(67, IO_BASE_RT, 0x0040, 11, 1), PIN_FIELD_BASE(68, IO_BASE_RT, 0x0040, 13, 1), PIN_FIELD_BASE(69, IO_BASE_BM1, 0x0070, 22, 1), PIN_FIELD_BASE(70, IO_BASE_BM1, 0x0070, 21, 1), PIN_FIELD_BASE(71, IO_BASE_BM1, 0x0070, 24, 1), PIN_FIELD_BASE(72, IO_BASE_BM1, 0x0070, 23, 1), PIN_FIELD_BASE(73, IO_BASE_BM1, 0x0070, 26, 1), PIN_FIELD_BASE(74, IO_BASE_BM1, 0x0070, 25, 1), PIN_FIELD_BASE(75, IO_BASE_BM2, 0x0050, 13, 1), PIN_FIELD_BASE(76, IO_BASE_BM1, 0x0070, 27, 1), PIN_FIELD_BASE(77, IO_BASE_RB1, 0x0050, 13, 1), PIN_FIELD_BASE(78, IO_BASE_RB1, 0x0050, 12, 1), PIN_FIELD_BASE(79, IO_BASE_RB1, 0x0050, 15, 1), PIN_FIELD_BASE(80, IO_BASE_RB1, 0x0050, 14, 1), PIN_FIELD_BASE(81, IO_BASE_BM1, 0x0070, 29, 1), PIN_FIELD_BASE(82, IO_BASE_BM1, 0x0070, 28, 1), PIN_FIELD_BASE(83, IO_BASE_BM1, 0x0070, 30, 1), PIN_FIELD_BASE(84, IO_BASE_RB0, 0x0050, 24, 1), PIN_FIELD_BASE(85, IO_BASE_RB0, 0x0050, 25, 1), PIN_FIELD_BASE(86, IO_BASE_RB0, 0x0050, 26, 1), PIN_FIELD_BASE(87, IO_BASE_RB0, 0x0050, 27, 1), PIN_FIELD_BASE(88, IO_BASE_LT0, 0x0060, 20, 1), PIN_FIELD_BASE(89, IO_BASE_LT0, 0x0060, 19, 1), PIN_FIELD_BASE(90, IO_BASE_LT0, 0x0060, 22, 1), PIN_FIELD_BASE(91, IO_BASE_LT0, 0x0060, 21, 1), PIN_FIELD_BASE(92, IO_BASE_LT0, 0x0060, 16, 1), PIN_FIELD_BASE(93, IO_BASE_LT0, 0x0060, 17, 1), PIN_FIELD_BASE(94, IO_BASE_LT0, 0x0060, 23, 1), PIN_FIELD_BASE(95, IO_BASE_LT0, 0x0060, 15, 1), PIN_FIELD_BASE(96, IO_BASE_LT0, 0x0060, 18, 1), PIN_FIELD_BASE(97, IO_BASE_LT0, 0x0060, 0, 1), PIN_FIELD_BASE(98, IO_BASE_LT0, 0x0060, 5, 1), PIN_FIELD_BASE(99, IO_BASE_LT0, 0x0060, 3, 1), PIN_FIELD_BASE(100, IO_BASE_LT0, 0x0060, 4, 1), PIN_FIELD_BASE(101, IO_BASE_LT0, 0x0060, 1, 1), PIN_FIELD_BASE(102, IO_BASE_LT0, 0x0060, 2, 1), PIN_FIELD_BASE(103, IO_BASE_RB0, 0x0050, 15, 1), PIN_FIELD_BASE(104, IO_BASE_RB0, 0x0050, 12, 1), PIN_FIELD_BASE(105, IO_BASE_RB0, 0x0050, 14, 1), PIN_FIELD_BASE(106, IO_BASE_RB0, 0x0050, 13, 1), PIN_FIELD_BASE(107, IO_BASE_RB0, 0x0050, 19, 1), PIN_FIELD_BASE(108, IO_BASE_RB0, 0x0050, 16, 1), PIN_FIELD_BASE(109, IO_BASE_RB0, 0x0050, 18, 1), PIN_FIELD_BASE(110, IO_BASE_RB0, 0x0050, 17, 1), PIN_FIELD_BASE(111, IO_BASE_RB0, 0x0050, 4, 1), PIN_FIELD_BASE(112, IO_BASE_RB1, 0x0050, 0, 1), PIN_FIELD_BASE(113, IO_BASE_RB1, 0x0050, 1, 1), PIN_FIELD_BASE(114, IO_BASE_RB1, 0x0050, 2, 1), PIN_FIELD_BASE(115, IO_BASE_BM1, 0x0070, 9, 1), PIN_FIELD_BASE(116, IO_BASE_BM1, 0x0070, 12, 1), PIN_FIELD_BASE(117, IO_BASE_BM1, 0x0070, 10, 1), PIN_FIELD_BASE(118, IO_BASE_BM1, 0x0070, 11, 1), PIN_FIELD_BASE(119, IO_BASE_BM0, 0x0050, 26, 1), PIN_FIELD_BASE(120, IO_BASE_BM0, 0x0050, 25, 1), PIN_FIELD_BASE(121, IO_BASE_BM0, 0x0050, 24, 1), PIN_FIELD_BASE(122, IO_BASE_BM0, 0x0050, 23, 1), PIN_FIELD_BASE(123, IO_BASE_BM0, 0x0050, 19, 1), PIN_FIELD_BASE(124, IO_BASE_BM0, 0x0050, 18, 1), PIN_FIELD_BASE(125, IO_BASE_BM0, 0x0050, 17, 1), PIN_FIELD_BASE(126, IO_BASE_BM0, 0x0050, 16, 1), PIN_FIELD_BASE(127, IO_BASE_BM0, 0x0050, 22, 1), PIN_FIELD_BASE(128, IO_BASE_BM0, 0x0050, 15, 1), PIN_FIELD_BASE(129, IO_BASE_BM0, 0x0050, 20, 1), PIN_FIELD_BASE(130, IO_BASE_BM0, 0x0050, 27, 1), PIN_FIELD_BASE(131, IO_BASE_BM0, 0x0050, 13, 1), PIN_FIELD_BASE(132, IO_BASE_BM0, 0x0050, 14, 1), PIN_FIELD_BASE(133, IO_BASE_BM0, 0x0050, 28, 1), PIN_FIELD_BASE(134, IO_BASE_BM0, 0x0050, 21, 1), PIN_FIELD_BASE(135, IO_BASE_BM0, 0x0050, 11, 1), PIN_FIELD_BASE(136, IO_BASE_BM0, 0x0050, 12, 1), PIN_FIELD_BASE(137, IO_BASE_BM1, 0x0070, 3, 1), PIN_FIELD_BASE(138, IO_BASE_BM1, 0x0070, 4, 1), PIN_FIELD_BASE(139, IO_BASE_BM0, 0x0050, 3, 1), PIN_FIELD_BASE(140, IO_BASE_BM0, 0x0050, 4, 1), PIN_FIELD_BASE(141, IO_BASE_BM0, 0x0050, 0, 1), PIN_FIELD_BASE(142, IO_BASE_BM0, 0x0050, 1, 1), PIN_FIELD_BASE(143, IO_BASE_BM0, 0x0050, 2, 1), PIN_FIELD_BASE(144, IO_BASE_BM0, 0x0050, 5, 1), PIN_FIELD_BASE(145, IO_BASE_BM0, 0x0050, 6, 1), PIN_FIELD_BASE(146, IO_BASE_BM0, 0x0050, 7, 1), PIN_FIELD_BASE(147, IO_BASE_BM0, 0x0050, 8, 1), PIN_FIELD_BASE(148, IO_BASE_BM0, 0x0050, 9, 1), PIN_FIELD_BASE(149, IO_BASE_BM0, 0x0050, 10, 1), PIN_FIELD_BASE(150, IO_BASE_BM2, 0x0050, 14, 1), PIN_FIELD_BASE(151, IO_BASE_BM0, 0x0050, 29, 1), PIN_FIELD_BASE(152, IO_BASE_BM2, 0x0050, 15, 1), PIN_FIELD_BASE(153, IO_BASE_BM2, 0x0050, 16, 1), PIN_FIELD_BASE(154, IO_BASE_BM2, 0x0050, 17, 1), PIN_FIELD_BASE(155, IO_BASE_BM2, 0x0050, 18, 1), PIN_FIELD_BASE(156, IO_BASE_LT0, 0x0060, 12, 1), PIN_FIELD_BASE(157, IO_BASE_LT0, 0x0060, 11, 1), PIN_FIELD_BASE(158, IO_BASE_LT0, 0x0060, 10, 1), PIN_FIELD_BASE(159, IO_BASE_LT1, 0x0020, 2, 1), PIN_FIELD_BASE(160, IO_BASE_LT0, 0x0060, 14, 1), PIN_FIELD_BASE(161, IO_BASE_LT0, 0x0060, 7, 1), PIN_FIELD_BASE(162, IO_BASE_LT0, 0x0060, 6, 1), PIN_FIELD_BASE(163, IO_BASE_LT1, 0x0020, 1, 1), PIN_FIELD_BASE(164, IO_BASE_LT0, 0x0060, 9, 1), PIN_FIELD_BASE(165, IO_BASE_LT0, 0x0060, 8, 1), PIN_FIELD_BASE(166, IO_BASE_LT1, 0x0020, 0, 1), PIN_FIELD_BASE(167, IO_BASE_LT0, 0x0060, 13, 1), PIN_FIELD_BASE(168, IO_BASE_BM2, 0x0050, 8, 1), PIN_FIELD_BASE(169, IO_BASE_BM2, 0x0050, 7, 1), PIN_FIELD_BASE(170, IO_BASE_BM2, 0x0050, 9, 1), PIN_FIELD_BASE(171, IO_BASE_BM2, 0x0050, 10, 1), PIN_FIELD_BASE(172, IO_BASE_BM2, 0x0050, 11, 1), PIN_FIELD_BASE(173, IO_BASE_BM2, 0x0050, 12, 1), PIN_FIELD_BASE(174, IO_BASE_RT, 0x0040, 5, 1), PIN_FIELD_BASE(175, IO_BASE_RT, 0x0040, 4, 1), PIN_FIELD_BASE(176, IO_BASE_RT, 0x0040, 6, 1), PIN_FIELD_BASE(177, IO_BASE_RT, 0x0040, 7, 1), PIN_FIELD_BASE(178, IO_BASE_RT, 0x0040, 8, 1), PIN_FIELD_BASE(179, IO_BASE_RT, 0x0040, 9, 1), PIN_FIELD_BASE(180, IO_BASE_LT0, 0x0060, 24, 1), PIN_FIELD_BASE(181, IO_BASE_LT0, 0x0060, 25, 1), PIN_FIELD_BASE(182, IO_BASE_RT, 0x0040, 3, 1), }; static const struct mtk_pin_field_calc mt8189_pin_pupd_range[] = { PIN_FIELD_BASE(44, IO_BASE_RB0, 0x0090, 0, 1), PIN_FIELD_BASE(45, IO_BASE_RB0, 0x0090, 1, 1), PIN_FIELD_BASE(46, IO_BASE_RB0, 0x0090, 2, 1), PIN_FIELD_BASE(47, IO_BASE_RB0, 0x0090, 3, 1), PIN_FIELD_BASE(156, IO_BASE_LT0, 0x00a0, 6, 1), PIN_FIELD_BASE(157, IO_BASE_LT0, 0x00a0, 5, 1), PIN_FIELD_BASE(158, IO_BASE_LT0, 0x00a0, 4, 1), PIN_FIELD_BASE(159, IO_BASE_LT1, 0x0050, 2, 1), PIN_FIELD_BASE(160, IO_BASE_LT0, 0x00a0, 8, 1), PIN_FIELD_BASE(161, IO_BASE_LT0, 0x00a0, 1, 1), PIN_FIELD_BASE(162, IO_BASE_LT0, 0x00a0, 0, 1), PIN_FIELD_BASE(163, IO_BASE_LT1, 0x0050, 1, 1), PIN_FIELD_BASE(164, IO_BASE_LT0, 0x00a0, 3, 1), PIN_FIELD_BASE(165, IO_BASE_LT0, 0x00a0, 2, 1), PIN_FIELD_BASE(166, IO_BASE_LT1, 0x0050, 0, 1), PIN_FIELD_BASE(167, IO_BASE_LT0, 0x00a0, 7, 1), PIN_FIELD_BASE(168, IO_BASE_BM2, 0x0090, 1, 1), PIN_FIELD_BASE(169, IO_BASE_BM2, 0x0090, 0, 1), PIN_FIELD_BASE(170, IO_BASE_BM2, 0x0090, 2, 1), PIN_FIELD_BASE(171, IO_BASE_BM2, 0x0090, 3, 1), PIN_FIELD_BASE(172, IO_BASE_BM2, 0x0090, 4, 1), PIN_FIELD_BASE(173, IO_BASE_BM2, 0x0090, 5, 1), PIN_FIELD_BASE(174, IO_BASE_RT, 0x0080, 1, 1), PIN_FIELD_BASE(175, IO_BASE_RT, 0x0080, 0, 1), PIN_FIELD_BASE(176, IO_BASE_RT, 0x0080, 2, 1), PIN_FIELD_BASE(177, IO_BASE_RT, 0x0080, 3, 1), PIN_FIELD_BASE(178, IO_BASE_RT, 0x0080, 4, 1), PIN_FIELD_BASE(179, IO_BASE_RT, 0x0080, 5, 1), }; static const struct mtk_pin_field_calc mt8189_pin_r0_range[] = { PIN_FIELD_BASE(44, IO_BASE_RB0, 0x00b0, 0, 1), PIN_FIELD_BASE(45, IO_BASE_RB0, 0x00b0, 1, 1), PIN_FIELD_BASE(46, IO_BASE_RB0, 0x00b0, 2, 1), PIN_FIELD_BASE(47, IO_BASE_RB0, 0x00b0, 3, 1), PIN_FIELD_BASE(156, IO_BASE_LT0, 0x00c0, 6, 1), PIN_FIELD_BASE(157, IO_BASE_LT0, 0x00c0, 5, 1), PIN_FIELD_BASE(158, IO_BASE_LT0, 0x00c0, 4, 1), PIN_FIELD_BASE(159, IO_BASE_LT1, 0x0060, 2, 1), PIN_FIELD_BASE(160, IO_BASE_LT0, 0x00c0, 8, 1), PIN_FIELD_BASE(161, IO_BASE_LT0, 0x00c0, 1, 1), PIN_FIELD_BASE(162, IO_BASE_LT0, 0x00c0, 0, 1), PIN_FIELD_BASE(163, IO_BASE_LT1, 0x0060, 1, 1), PIN_FIELD_BASE(164, IO_BASE_LT0, 0x00c0, 3, 1), PIN_FIELD_BASE(165, IO_BASE_LT0, 0x00c0, 2, 1), PIN_FIELD_BASE(166, IO_BASE_LT1, 0x0060, 0, 1), PIN_FIELD_BASE(167, IO_BASE_LT0, 0x00c0, 7, 1), PIN_FIELD_BASE(168, IO_BASE_BM2, 0x00b0, 1, 1), PIN_FIELD_BASE(169, IO_BASE_BM2, 0x00b0, 0, 1), PIN_FIELD_BASE(170, IO_BASE_BM2, 0x00b0, 2, 1), PIN_FIELD_BASE(171, IO_BASE_BM2, 0x00b0, 3, 1), PIN_FIELD_BASE(172, IO_BASE_BM2, 0x00b0, 4, 1), PIN_FIELD_BASE(173, IO_BASE_BM2, 0x00b0, 5, 1), PIN_FIELD_BASE(174, IO_BASE_RT, 0x00a0, 1, 1), PIN_FIELD_BASE(175, IO_BASE_RT, 0x00a0, 0, 1), PIN_FIELD_BASE(176, IO_BASE_RT, 0x00a0, 2, 1), PIN_FIELD_BASE(177, IO_BASE_RT, 0x00a0, 3, 1), PIN_FIELD_BASE(178, IO_BASE_RT, 0x00a0, 4, 1), PIN_FIELD_BASE(179, IO_BASE_RT, 0x00a0, 5, 1), }; static const struct mtk_pin_field_calc mt8189_pin_r1_range[] = { PIN_FIELD_BASE(44, IO_BASE_RB0, 0x00c0, 0, 1), PIN_FIELD_BASE(45, IO_BASE_RB0, 0x00c0, 1, 1), PIN_FIELD_BASE(46, IO_BASE_RB0, 0x00c0, 2, 1), PIN_FIELD_BASE(47, IO_BASE_RB0, 0x00c0, 3, 1), PIN_FIELD_BASE(156, IO_BASE_LT0, 0x00d0, 6, 1), PIN_FIELD_BASE(157, IO_BASE_LT0, 0x00d0, 5, 1), PIN_FIELD_BASE(158, IO_BASE_LT0, 0x00d0, 4, 1), PIN_FIELD_BASE(159, IO_BASE_LT1, 0x0070, 2, 1), PIN_FIELD_BASE(160, IO_BASE_LT0, 0x00d0, 8, 1), PIN_FIELD_BASE(161, IO_BASE_LT0, 0x00d0, 1, 1), PIN_FIELD_BASE(162, IO_BASE_LT0, 0x00d0, 0, 1), PIN_FIELD_BASE(163, IO_BASE_LT1, 0x0070, 1, 1), PIN_FIELD_BASE(164, IO_BASE_LT0, 0x00d0, 3, 1), PIN_FIELD_BASE(165, IO_BASE_LT0, 0x00d0, 2, 1), PIN_FIELD_BASE(166, IO_BASE_LT1, 0x0070, 0, 1), PIN_FIELD_BASE(167, IO_BASE_LT0, 0x00d0, 7, 1), PIN_FIELD_BASE(168, IO_BASE_BM2, 0x00c0, 1, 1), PIN_FIELD_BASE(169, IO_BASE_BM2, 0x00c0, 0, 1), PIN_FIELD_BASE(170, IO_BASE_BM2, 0x00c0, 2, 1), PIN_FIELD_BASE(171, IO_BASE_BM2, 0x00c0, 3, 1), PIN_FIELD_BASE(172, IO_BASE_BM2, 0x00c0, 4, 1), PIN_FIELD_BASE(173, IO_BASE_BM2, 0x00c0, 5, 1), PIN_FIELD_BASE(174, IO_BASE_RT, 0x00b0, 1, 1), PIN_FIELD_BASE(175, IO_BASE_RT, 0x00b0, 0, 1), PIN_FIELD_BASE(176, IO_BASE_RT, 0x00b0, 2, 1), PIN_FIELD_BASE(177, IO_BASE_RT, 0x00b0, 3, 1), PIN_FIELD_BASE(178, IO_BASE_RT, 0x00b0, 4, 1), PIN_FIELD_BASE(179, IO_BASE_RT, 0x00b0, 5, 1), }; static const struct mtk_pin_field_calc mt8189_pin_pu_range[] = { PIN_FIELD_BASE(0, IO_BASE_RB0, 0x00a0, 5, 1), PIN_FIELD_BASE(1, IO_BASE_RB1, 0x0090, 3, 1), PIN_FIELD_BASE(2, IO_BASE_RB1, 0x0090, 4, 1), PIN_FIELD_BASE(3, IO_BASE_RB1, 0x0090, 5, 1), PIN_FIELD_BASE(4, IO_BASE_RB1, 0x0090, 6, 1), PIN_FIELD_BASE(5, IO_BASE_RB1, 0x0090, 7, 1), PIN_FIELD_BASE(6, IO_BASE_RB0, 0x00a0, 6, 1), PIN_FIELD_BASE(7, IO_BASE_RB0, 0x00a0, 7, 1), PIN_FIELD_BASE(8, IO_BASE_RB0, 0x00a0, 8, 1), PIN_FIELD_BASE(9, IO_BASE_RB0, 0x00a0, 9, 1), PIN_FIELD_BASE(10, IO_BASE_RB0, 0x00a0, 10, 1), PIN_FIELD_BASE(11, IO_BASE_RB0, 0x00a0, 11, 1), PIN_FIELD_BASE(12, IO_BASE_BM1, 0x00b0, 5, 1), PIN_FIELD_BASE(13, IO_BASE_BM1, 0x00b0, 6, 1), PIN_FIELD_BASE(14, IO_BASE_BM2, 0x00a0, 0, 1), PIN_FIELD_BASE(15, IO_BASE_BM2, 0x00a0, 1, 1), PIN_FIELD_BASE(16, IO_BASE_BM1, 0x00b0, 7, 1), PIN_FIELD_BASE(17, IO_BASE_BM1, 0x00b0, 8, 1), PIN_FIELD_BASE(18, IO_BASE_RB0, 0x00a0, 0, 1), PIN_FIELD_BASE(19, IO_BASE_RB0, 0x00a0, 2, 1), PIN_FIELD_BASE(20, IO_BASE_RB0, 0x00a0, 1, 1), PIN_FIELD_BASE(21, IO_BASE_RB0, 0x00a0, 3, 1), PIN_FIELD_BASE(22, IO_BASE_RT, 0x0090, 0, 1), PIN_FIELD_BASE(23, IO_BASE_RT, 0x0090, 1, 1), PIN_FIELD_BASE(24, IO_BASE_RT, 0x0090, 2, 1), PIN_FIELD_BASE(25, IO_BASE_LM, 0x0090, 2, 1), PIN_FIELD_BASE(26, IO_BASE_LM, 0x0090, 1, 1), PIN_FIELD_BASE(27, IO_BASE_BM1, 0x00b0, 1, 1), PIN_FIELD_BASE(28, IO_BASE_BM1, 0x00b0, 2, 1), PIN_FIELD_BASE(29, IO_BASE_LM, 0x0090, 0, 1), PIN_FIELD_BASE(30, IO_BASE_BM1, 0x00b0, 0, 1), PIN_FIELD_BASE(31, IO_BASE_BM2, 0x00a0, 13, 1), PIN_FIELD_BASE(32, IO_BASE_BM0, 0x0090, 30, 1), PIN_FIELD_BASE(33, IO_BASE_BM2, 0x00a0, 15, 1), PIN_FIELD_BASE(34, IO_BASE_BM2, 0x00a0, 14, 1), PIN_FIELD_BASE(35, IO_BASE_BM2, 0x00a0, 17, 1), PIN_FIELD_BASE(36, IO_BASE_BM2, 0x00a0, 16, 1), PIN_FIELD_BASE(37, IO_BASE_BM2, 0x00a0, 19, 1), PIN_FIELD_BASE(38, IO_BASE_BM2, 0x00a0, 18, 1), PIN_FIELD_BASE(39, IO_BASE_BM2, 0x00a0, 5, 1), PIN_FIELD_BASE(40, IO_BASE_BM2, 0x00a0, 2, 1), PIN_FIELD_BASE(41, IO_BASE_BM2, 0x00a0, 3, 1), PIN_FIELD_BASE(42, IO_BASE_BM2, 0x00a0, 4, 1), PIN_FIELD_BASE(43, IO_BASE_BM2, 0x00a0, 6, 1), PIN_FIELD_BASE(48, IO_BASE_LM, 0x0090, 5, 1), PIN_FIELD_BASE(49, IO_BASE_LM, 0x0090, 4, 1), PIN_FIELD_BASE(50, IO_BASE_LM, 0x0090, 3, 1), PIN_FIELD_BASE(51, IO_BASE_RB1, 0x0090, 8, 1), PIN_FIELD_BASE(52, IO_BASE_RB1, 0x0090, 10, 1), PIN_FIELD_BASE(53, IO_BASE_RB1, 0x0090, 9, 1), PIN_FIELD_BASE(54, IO_BASE_RB1, 0x0090, 11, 1), PIN_FIELD_BASE(55, IO_BASE_LM, 0x0090, 6, 1), PIN_FIELD_BASE(56, IO_BASE_LM, 0x0090, 7, 1), PIN_FIELD_BASE(57, IO_BASE_BM1, 0x00b0, 13, 1), PIN_FIELD_BASE(58, IO_BASE_BM1, 0x00b0, 17, 1), PIN_FIELD_BASE(59, IO_BASE_BM1, 0x00b0, 14, 1), PIN_FIELD_BASE(60, IO_BASE_BM1, 0x00b0, 18, 1), PIN_FIELD_BASE(61, IO_BASE_BM1, 0x00b0, 15, 1), PIN_FIELD_BASE(62, IO_BASE_BM1, 0x00b0, 19, 1), PIN_FIELD_BASE(63, IO_BASE_BM1, 0x00b0, 16, 1), PIN_FIELD_BASE(64, IO_BASE_BM1, 0x00b0, 20, 1), PIN_FIELD_BASE(65, IO_BASE_RT, 0x0090, 4, 1), PIN_FIELD_BASE(66, IO_BASE_RT, 0x0090, 6, 1), PIN_FIELD_BASE(67, IO_BASE_RT, 0x0090, 5, 1), PIN_FIELD_BASE(68, IO_BASE_RT, 0x0090, 7, 1), PIN_FIELD_BASE(69, IO_BASE_BM1, 0x00b0, 22, 1), PIN_FIELD_BASE(70, IO_BASE_BM1, 0x00b0, 21, 1), PIN_FIELD_BASE(71, IO_BASE_BM1, 0x00b0, 24, 1), PIN_FIELD_BASE(72, IO_BASE_BM1, 0x00b0, 23, 1), PIN_FIELD_BASE(73, IO_BASE_BM1, 0x00b0, 26, 1), PIN_FIELD_BASE(74, IO_BASE_BM1, 0x00b0, 25, 1), PIN_FIELD_BASE(75, IO_BASE_BM2, 0x00a0, 7, 1), PIN_FIELD_BASE(76, IO_BASE_BM1, 0x00b0, 27, 1), PIN_FIELD_BASE(77, IO_BASE_RB1, 0x0090, 13, 1), PIN_FIELD_BASE(78, IO_BASE_RB1, 0x0090, 12, 1), PIN_FIELD_BASE(79, IO_BASE_RB1, 0x0090, 15, 1), PIN_FIELD_BASE(80, IO_BASE_RB1, 0x0090, 14, 1), PIN_FIELD_BASE(81, IO_BASE_BM1, 0x00b0, 29, 1), PIN_FIELD_BASE(82, IO_BASE_BM1, 0x00b0, 28, 1), PIN_FIELD_BASE(83, IO_BASE_BM1, 0x00b0, 30, 1), PIN_FIELD_BASE(84, IO_BASE_RB0, 0x00a0, 22, 1), PIN_FIELD_BASE(85, IO_BASE_RB0, 0x00a0, 23, 1), PIN_FIELD_BASE(86, IO_BASE_RB0, 0x00a0, 24, 1), PIN_FIELD_BASE(87, IO_BASE_RB0, 0x00a0, 25, 1), PIN_FIELD_BASE(88, IO_BASE_LT0, 0x00b0, 11, 1), PIN_FIELD_BASE(89, IO_BASE_LT0, 0x00b0, 10, 1), PIN_FIELD_BASE(90, IO_BASE_LT0, 0x00b0, 13, 1), PIN_FIELD_BASE(91, IO_BASE_LT0, 0x00b0, 12, 1), PIN_FIELD_BASE(92, IO_BASE_LT0, 0x00b0, 7, 1), PIN_FIELD_BASE(93, IO_BASE_LT0, 0x00b0, 8, 1), PIN_FIELD_BASE(94, IO_BASE_LT0, 0x00b0, 14, 1), PIN_FIELD_BASE(95, IO_BASE_LT0, 0x00b0, 6, 1), PIN_FIELD_BASE(96, IO_BASE_LT0, 0x00b0, 9, 1), PIN_FIELD_BASE(97, IO_BASE_LT0, 0x00b0, 0, 1), PIN_FIELD_BASE(98, IO_BASE_LT0, 0x00b0, 5, 1), PIN_FIELD_BASE(99, IO_BASE_LT0, 0x00b0, 3, 1), PIN_FIELD_BASE(100, IO_BASE_LT0, 0x00b0, 4, 1), PIN_FIELD_BASE(101, IO_BASE_LT0, 0x00b0, 1, 1), PIN_FIELD_BASE(102, IO_BASE_LT0, 0x00b0, 2, 1), PIN_FIELD_BASE(103, IO_BASE_RB0, 0x00a0, 15, 1), PIN_FIELD_BASE(104, IO_BASE_RB0, 0x00a0, 12, 1), PIN_FIELD_BASE(105, IO_BASE_RB0, 0x00a0, 14, 1), PIN_FIELD_BASE(106, IO_BASE_RB0, 0x00a0, 13, 1), PIN_FIELD_BASE(107, IO_BASE_RB0, 0x00a0, 19, 1), PIN_FIELD_BASE(108, IO_BASE_RB0, 0x00a0, 16, 1), PIN_FIELD_BASE(109, IO_BASE_RB0, 0x00a0, 18, 1), PIN_FIELD_BASE(110, IO_BASE_RB0, 0x00a0, 17, 1), PIN_FIELD_BASE(111, IO_BASE_RB0, 0x00a0, 4, 1), PIN_FIELD_BASE(112, IO_BASE_RB1, 0x0090, 0, 1), PIN_FIELD_BASE(113, IO_BASE_RB1, 0x0090, 1, 1), PIN_FIELD_BASE(114, IO_BASE_RB1, 0x0090, 2, 1), PIN_FIELD_BASE(115, IO_BASE_BM1, 0x00b0, 9, 1), PIN_FIELD_BASE(116, IO_BASE_BM1, 0x00b0, 12, 1), PIN_FIELD_BASE(117, IO_BASE_BM1, 0x00b0, 10, 1), PIN_FIELD_BASE(118, IO_BASE_BM1, 0x00b0, 11, 1), PIN_FIELD_BASE(119, IO_BASE_BM0, 0x0090, 26, 1), PIN_FIELD_BASE(120, IO_BASE_BM0, 0x0090, 25, 1), PIN_FIELD_BASE(121, IO_BASE_BM0, 0x0090, 24, 1), PIN_FIELD_BASE(122, IO_BASE_BM0, 0x0090, 23, 1), PIN_FIELD_BASE(123, IO_BASE_BM0, 0x0090, 19, 1), PIN_FIELD_BASE(124, IO_BASE_BM0, 0x0090, 18, 1), PIN_FIELD_BASE(125, IO_BASE_BM0, 0x0090, 17, 1), PIN_FIELD_BASE(126, IO_BASE_BM0, 0x0090, 16, 1), PIN_FIELD_BASE(127, IO_BASE_BM0, 0x0090, 22, 1), PIN_FIELD_BASE(128, IO_BASE_BM0, 0x0090, 15, 1), PIN_FIELD_BASE(129, IO_BASE_BM0, 0x0090, 20, 1), PIN_FIELD_BASE(130, IO_BASE_BM0, 0x0090, 27, 1), PIN_FIELD_BASE(131, IO_BASE_BM0, 0x0090, 13, 1), PIN_FIELD_BASE(132, IO_BASE_BM0, 0x0090, 14, 1), PIN_FIELD_BASE(133, IO_BASE_BM0, 0x0090, 28, 1), PIN_FIELD_BASE(134, IO_BASE_BM0, 0x0090, 21, 1), PIN_FIELD_BASE(135, IO_BASE_BM0, 0x0090, 11, 1), PIN_FIELD_BASE(136, IO_BASE_BM0, 0x0090, 12, 1), PIN_FIELD_BASE(137, IO_BASE_BM1, 0x00b0, 3, 1), PIN_FIELD_BASE(138, IO_BASE_BM1, 0x00b0, 4, 1), PIN_FIELD_BASE(139, IO_BASE_BM0, 0x0090, 3, 1), PIN_FIELD_BASE(140, IO_BASE_BM0, 0x0090, 4, 1), PIN_FIELD_BASE(141, IO_BASE_BM0, 0x0090, 0, 1), PIN_FIELD_BASE(142, IO_BASE_BM0, 0x0090, 1, 1), PIN_FIELD_BASE(143, IO_BASE_BM0, 0x0090, 2, 1), PIN_FIELD_BASE(144, IO_BASE_BM0, 0x0090, 5, 1), PIN_FIELD_BASE(145, IO_BASE_BM0, 0x0090, 6, 1), PIN_FIELD_BASE(146, IO_BASE_BM0, 0x0090, 7, 1), PIN_FIELD_BASE(147, IO_BASE_BM0, 0x0090, 8, 1), PIN_FIELD_BASE(148, IO_BASE_BM0, 0x0090, 9, 1), PIN_FIELD_BASE(149, IO_BASE_BM0, 0x0090, 10, 1), PIN_FIELD_BASE(150, IO_BASE_BM2, 0x00a0, 8, 1), PIN_FIELD_BASE(151, IO_BASE_BM0, 0x0090, 29, 1), PIN_FIELD_BASE(152, IO_BASE_BM2, 0x00a0, 9, 1), PIN_FIELD_BASE(153, IO_BASE_BM2, 0x00a0, 10, 1), PIN_FIELD_BASE(154, IO_BASE_BM2, 0x00a0, 11, 1), PIN_FIELD_BASE(155, IO_BASE_BM2, 0x00a0, 12, 1), PIN_FIELD_BASE(180, IO_BASE_LT0, 0x00b0, 15, 1), PIN_FIELD_BASE(181, IO_BASE_LT0, 0x00b0, 16, 1), PIN_FIELD_BASE(182, IO_BASE_RT, 0x0090, 3, 1), }; static const struct mtk_pin_field_calc mt8189_pin_pd_range[] = { PIN_FIELD_BASE(0, IO_BASE_RB0, 0x0080, 5, 1), PIN_FIELD_BASE(1, IO_BASE_RB1, 0x0080, 3, 1), PIN_FIELD_BASE(2, IO_BASE_RB1, 0x0080, 4, 1), PIN_FIELD_BASE(3, IO_BASE_RB1, 0x0080, 5, 1), PIN_FIELD_BASE(4, IO_BASE_RB1, 0x0080, 6, 1), PIN_FIELD_BASE(5, IO_BASE_RB1, 0x0080, 7, 1), PIN_FIELD_BASE(6, IO_BASE_RB0, 0x0080, 6, 1), PIN_FIELD_BASE(7, IO_BASE_RB0, 0x0080, 7, 1), PIN_FIELD_BASE(8, IO_BASE_RB0, 0x0080, 8, 1), PIN_FIELD_BASE(9, IO_BASE_RB0, 0x0080, 9, 1), PIN_FIELD_BASE(10, IO_BASE_RB0, 0x0080, 10, 1), PIN_FIELD_BASE(11, IO_BASE_RB0, 0x0080, 11, 1), PIN_FIELD_BASE(12, IO_BASE_BM1, 0x00a0, 5, 1), PIN_FIELD_BASE(13, IO_BASE_BM1, 0x00a0, 6, 1), PIN_FIELD_BASE(14, IO_BASE_BM2, 0x0080, 0, 1), PIN_FIELD_BASE(15, IO_BASE_BM2, 0x0080, 1, 1), PIN_FIELD_BASE(16, IO_BASE_BM1, 0x00a0, 7, 1), PIN_FIELD_BASE(17, IO_BASE_BM1, 0x00a0, 8, 1), PIN_FIELD_BASE(18, IO_BASE_RB0, 0x0080, 0, 1), PIN_FIELD_BASE(19, IO_BASE_RB0, 0x0080, 2, 1), PIN_FIELD_BASE(20, IO_BASE_RB0, 0x0080, 1, 1), PIN_FIELD_BASE(21, IO_BASE_RB0, 0x0080, 3, 1), PIN_FIELD_BASE(22, IO_BASE_RT, 0x0070, 0, 1), PIN_FIELD_BASE(23, IO_BASE_RT, 0x0070, 1, 1), PIN_FIELD_BASE(24, IO_BASE_RT, 0x0070, 2, 1), PIN_FIELD_BASE(25, IO_BASE_LM, 0x0080, 2, 1), PIN_FIELD_BASE(26, IO_BASE_LM, 0x0080, 1, 1), PIN_FIELD_BASE(27, IO_BASE_BM1, 0x00a0, 1, 1), PIN_FIELD_BASE(28, IO_BASE_BM1, 0x00a0, 2, 1), PIN_FIELD_BASE(29, IO_BASE_LM, 0x0080, 0, 1), PIN_FIELD_BASE(30, IO_BASE_BM1, 0x00a0, 0, 1), PIN_FIELD_BASE(31, IO_BASE_BM2, 0x0080, 13, 1), PIN_FIELD_BASE(32, IO_BASE_BM0, 0x0080, 30, 1), PIN_FIELD_BASE(33, IO_BASE_BM2, 0x0080, 15, 1), PIN_FIELD_BASE(34, IO_BASE_BM2, 0x0080, 14, 1), PIN_FIELD_BASE(35, IO_BASE_BM2, 0x0080, 17, 1), PIN_FIELD_BASE(36, IO_BASE_BM2, 0x0080, 16, 1), PIN_FIELD_BASE(37, IO_BASE_BM2, 0x0080, 19, 1), PIN_FIELD_BASE(38, IO_BASE_BM2, 0x0080, 18, 1), PIN_FIELD_BASE(39, IO_BASE_BM2, 0x0080, 5, 1), PIN_FIELD_BASE(40, IO_BASE_BM2, 0x0080, 2, 1), PIN_FIELD_BASE(41, IO_BASE_BM2, 0x0080, 3, 1), PIN_FIELD_BASE(42, IO_BASE_BM2, 0x0080, 4, 1), PIN_FIELD_BASE(43, IO_BASE_BM2, 0x0080, 6, 1), PIN_FIELD_BASE(48, IO_BASE_LM, 0x0080, 5, 1), PIN_FIELD_BASE(49, IO_BASE_LM, 0x0080, 4, 1), PIN_FIELD_BASE(50, IO_BASE_LM, 0x0080, 3, 1), PIN_FIELD_BASE(51, IO_BASE_RB1, 0x0080, 8, 1), PIN_FIELD_BASE(52, IO_BASE_RB1, 0x0080, 10, 1), PIN_FIELD_BASE(53, IO_BASE_RB1, 0x0080, 9, 1), PIN_FIELD_BASE(54, IO_BASE_RB1, 0x0080, 11, 1), PIN_FIELD_BASE(55, IO_BASE_LM, 0x0080, 6, 1), PIN_FIELD_BASE(56, IO_BASE_LM, 0x0080, 7, 1), PIN_FIELD_BASE(57, IO_BASE_BM1, 0x00a0, 13, 1), PIN_FIELD_BASE(58, IO_BASE_BM1, 0x00a0, 17, 1), PIN_FIELD_BASE(59, IO_BASE_BM1, 0x00a0, 14, 1), PIN_FIELD_BASE(60, IO_BASE_BM1, 0x00a0, 18, 1), PIN_FIELD_BASE(61, IO_BASE_BM1, 0x00a0, 15, 1), PIN_FIELD_BASE(62, IO_BASE_BM1, 0x00a0, 19, 1), PIN_FIELD_BASE(63, IO_BASE_BM1, 0x00a0, 16, 1), PIN_FIELD_BASE(64, IO_BASE_BM1, 0x00a0, 20, 1), PIN_FIELD_BASE(65, IO_BASE_RT, 0x0070, 4, 1), PIN_FIELD_BASE(66, IO_BASE_RT, 0x0070, 6, 1), PIN_FIELD_BASE(67, IO_BASE_RT, 0x0070, 5, 1), PIN_FIELD_BASE(68, IO_BASE_RT, 0x0070, 7, 1), PIN_FIELD_BASE(69, IO_BASE_BM1, 0x00a0, 22, 1), PIN_FIELD_BASE(70, IO_BASE_BM1, 0x00a0, 21, 1), PIN_FIELD_BASE(71, IO_BASE_BM1, 0x00a0, 24, 1), PIN_FIELD_BASE(72, IO_BASE_BM1, 0x00a0, 23, 1), PIN_FIELD_BASE(73, IO_BASE_BM1, 0x00a0, 26, 1), PIN_FIELD_BASE(74, IO_BASE_BM1, 0x00a0, 25, 1), PIN_FIELD_BASE(75, IO_BASE_BM2, 0x0080, 7, 1), PIN_FIELD_BASE(76, IO_BASE_BM1, 0x00a0, 27, 1), PIN_FIELD_BASE(77, IO_BASE_RB1, 0x0080, 13, 1), PIN_FIELD_BASE(78, IO_BASE_RB1, 0x0080, 12, 1), PIN_FIELD_BASE(79, IO_BASE_RB1, 0x0080, 15, 1), PIN_FIELD_BASE(80, IO_BASE_RB1, 0x0080, 14, 1), PIN_FIELD_BASE(81, IO_BASE_BM1, 0x00a0, 29, 1), PIN_FIELD_BASE(82, IO_BASE_BM1, 0x00a0, 28, 1), PIN_FIELD_BASE(83, IO_BASE_BM1, 0x00a0, 30, 1), PIN_FIELD_BASE(84, IO_BASE_RB0, 0x0080, 22, 1), PIN_FIELD_BASE(85, IO_BASE_RB0, 0x0080, 23, 1), PIN_FIELD_BASE(86, IO_BASE_RB0, 0x0080, 24, 1), PIN_FIELD_BASE(87, IO_BASE_RB0, 0x0080, 25, 1), PIN_FIELD_BASE(88, IO_BASE_LT0, 0x0090, 11, 1), PIN_FIELD_BASE(89, IO_BASE_LT0, 0x0090, 10, 1), PIN_FIELD_BASE(90, IO_BASE_LT0, 0x0090, 13, 1), PIN_FIELD_BASE(91, IO_BASE_LT0, 0x0090, 12, 1), PIN_FIELD_BASE(92, IO_BASE_LT0, 0x0090, 7, 1), PIN_FIELD_BASE(93, IO_BASE_LT0, 0x0090, 8, 1), PIN_FIELD_BASE(94, IO_BASE_LT0, 0x0090, 14, 1), PIN_FIELD_BASE(95, IO_BASE_LT0, 0x0090, 6, 1), PIN_FIELD_BASE(96, IO_BASE_LT0, 0x0090, 9, 1), PIN_FIELD_BASE(97, IO_BASE_LT0, 0x0090, 0, 1), PIN_FIELD_BASE(98, IO_BASE_LT0, 0x0090, 5, 1), PIN_FIELD_BASE(99, IO_BASE_LT0, 0x0090, 3, 1), PIN_FIELD_BASE(100, IO_BASE_LT0, 0x0090, 4, 1), PIN_FIELD_BASE(101, IO_BASE_LT0, 0x0090, 1, 1), PIN_FIELD_BASE(102, IO_BASE_LT0, 0x0090, 2, 1), PIN_FIELD_BASE(103, IO_BASE_RB0, 0x0080, 15, 1), PIN_FIELD_BASE(104, IO_BASE_RB0, 0x0080, 12, 1), PIN_FIELD_BASE(105, IO_BASE_RB0, 0x0080, 14, 1), PIN_FIELD_BASE(106, IO_BASE_RB0, 0x0080, 13, 1), PIN_FIELD_BASE(107, IO_BASE_RB0, 0x0080, 19, 1), PIN_FIELD_BASE(108, IO_BASE_RB0, 0x0080, 16, 1), PIN_FIELD_BASE(109, IO_BASE_RB0, 0x0080, 18, 1), PIN_FIELD_BASE(110, IO_BASE_RB0, 0x0080, 17, 1), PIN_FIELD_BASE(111, IO_BASE_RB0, 0x0080, 4, 1), PIN_FIELD_BASE(112, IO_BASE_RB1, 0x0080, 0, 1), PIN_FIELD_BASE(113, IO_BASE_RB1, 0x0080, 1, 1), PIN_FIELD_BASE(114, IO_BASE_RB1, 0x0080, 2, 1), PIN_FIELD_BASE(115, IO_BASE_BM1, 0x00a0, 9, 1), PIN_FIELD_BASE(116, IO_BASE_BM1, 0x00a0, 12, 1), PIN_FIELD_BASE(117, IO_BASE_BM1, 0x00a0, 10, 1), PIN_FIELD_BASE(118, IO_BASE_BM1, 0x00a0, 11, 1), PIN_FIELD_BASE(119, IO_BASE_BM0, 0x0080, 26, 1), PIN_FIELD_BASE(120, IO_BASE_BM0, 0x0080, 25, 1), PIN_FIELD_BASE(121, IO_BASE_BM0, 0x0080, 24, 1), PIN_FIELD_BASE(122, IO_BASE_BM0, 0x0080, 23, 1), PIN_FIELD_BASE(123, IO_BASE_BM0, 0x0080, 19, 1), PIN_FIELD_BASE(124, IO_BASE_BM0, 0x0080, 18, 1), PIN_FIELD_BASE(125, IO_BASE_BM0, 0x0080, 17, 1), PIN_FIELD_BASE(126, IO_BASE_BM0, 0x0080, 16, 1), PIN_FIELD_BASE(127, IO_BASE_BM0, 0x0080, 22, 1), PIN_FIELD_BASE(128, IO_BASE_BM0, 0x0080, 15, 1), PIN_FIELD_BASE(129, IO_BASE_BM0, 0x0080, 20, 1), PIN_FIELD_BASE(130, IO_BASE_BM0, 0x0080, 27, 1), PIN_FIELD_BASE(131, IO_BASE_BM0, 0x0080, 13, 1), PIN_FIELD_BASE(132, IO_BASE_BM0, 0x0080, 14, 1), PIN_FIELD_BASE(133, IO_BASE_BM0, 0x0080, 28, 1), PIN_FIELD_BASE(134, IO_BASE_BM0, 0x0080, 21, 1), PIN_FIELD_BASE(135, IO_BASE_BM0, 0x0080, 11, 1), PIN_FIELD_BASE(136, IO_BASE_BM0, 0x0080, 12, 1), PIN_FIELD_BASE(137, IO_BASE_BM1, 0x00a0, 3, 1), PIN_FIELD_BASE(138, IO_BASE_BM1, 0x00a0, 4, 1), PIN_FIELD_BASE(139, IO_BASE_BM0, 0x0080, 3, 1), PIN_FIELD_BASE(140, IO_BASE_BM0, 0x0080, 4, 1), PIN_FIELD_BASE(141, IO_BASE_BM0, 0x0080, 0, 1), PIN_FIELD_BASE(142, IO_BASE_BM0, 0x0080, 1, 1), PIN_FIELD_BASE(143, IO_BASE_BM0, 0x0080, 2, 1), PIN_FIELD_BASE(144, IO_BASE_BM0, 0x0080, 5, 1), PIN_FIELD_BASE(145, IO_BASE_BM0, 0x0080, 6, 1), PIN_FIELD_BASE(146, IO_BASE_BM0, 0x0080, 7, 1), PIN_FIELD_BASE(147, IO_BASE_BM0, 0x0080, 8, 1), PIN_FIELD_BASE(148, IO_BASE_BM0, 0x0080, 9, 1), PIN_FIELD_BASE(149, IO_BASE_BM0, 0x0080, 10, 1), PIN_FIELD_BASE(150, IO_BASE_BM2, 0x0080, 8, 1), PIN_FIELD_BASE(151, IO_BASE_BM0, 0x0080, 29, 1), PIN_FIELD_BASE(152, IO_BASE_BM2, 0x0080, 9, 1), PIN_FIELD_BASE(153, IO_BASE_BM2, 0x0080, 10, 1), PIN_FIELD_BASE(154, IO_BASE_BM2, 0x0080, 11, 1), PIN_FIELD_BASE(155, IO_BASE_BM2, 0x0080, 12, 1), PIN_FIELD_BASE(180, IO_BASE_LT0, 0x0090, 15, 1), PIN_FIELD_BASE(181, IO_BASE_LT0, 0x0090, 16, 1), PIN_FIELD_BASE(182, IO_BASE_RT, 0x0070, 3, 1), }; static const struct mtk_pin_field_calc mt8189_pin_drv_range[] = { PIN_FIELD_BASE(0, IO_BASE_RB0, 0x0000, 15, 3), PIN_FIELD_BASE(1, IO_BASE_RB1, 0x0000, 9, 3), PIN_FIELD_BASE(2, IO_BASE_RB1, 0x0000, 12, 3), PIN_FIELD_BASE(3, IO_BASE_RB1, 0x0000, 15, 3), PIN_FIELD_BASE(4, IO_BASE_RB1, 0x0000, 18, 3), PIN_FIELD_BASE(5, IO_BASE_RB1, 0x0000, 21, 3), PIN_FIELD_BASE(6, IO_BASE_RB0, 0x0000, 18, 3), PIN_FIELD_BASE(7, IO_BASE_RB0, 0x0000, 21, 3), PIN_FIELD_BASE(8, IO_BASE_RB0, 0x0000, 24, 3), PIN_FIELD_BASE(9, IO_BASE_RB0, 0x0000, 27, 3), PIN_FIELD_BASE(10, IO_BASE_RB0, 0x0010, 0, 3), PIN_FIELD_BASE(11, IO_BASE_RB0, 0x0010, 3, 3), PIN_FIELD_BASE(12, IO_BASE_BM1, 0x0000, 15, 3), PIN_FIELD_BASE(13, IO_BASE_BM1, 0x0000, 18, 3), PIN_FIELD_BASE(14, IO_BASE_BM2, 0x0000, 0, 3), PIN_FIELD_BASE(15, IO_BASE_BM2, 0x0000, 3, 3), PIN_FIELD_BASE(16, IO_BASE_BM1, 0x0000, 21, 3), PIN_FIELD_BASE(17, IO_BASE_BM1, 0x0000, 24, 3), PIN_FIELD_BASE(18, IO_BASE_RB0, 0x0000, 0, 3), PIN_FIELD_BASE(19, IO_BASE_RB0, 0x0000, 6, 3), PIN_FIELD_BASE(20, IO_BASE_RB0, 0x0000, 3, 3), PIN_FIELD_BASE(21, IO_BASE_RB0, 0x0000, 9, 3), PIN_FIELD_BASE(22, IO_BASE_RT, 0x0000, 0, 3), PIN_FIELD_BASE(23, IO_BASE_RT, 0x0000, 3, 3), PIN_FIELD_BASE(24, IO_BASE_RT, 0x0000, 6, 3), PIN_FIELD_BASE(25, IO_BASE_LM, 0x0000, 6, 3), PIN_FIELD_BASE(26, IO_BASE_LM, 0x0000, 3, 3), PIN_FIELD_BASE(27, IO_BASE_BM1, 0x0000, 3, 3), PIN_FIELD_BASE(28, IO_BASE_BM1, 0x0000, 6, 3), PIN_FIELD_BASE(29, IO_BASE_LM, 0x0000, 0, 3), PIN_FIELD_BASE(30, IO_BASE_BM1, 0x0000, 0, 3), PIN_FIELD_BASE(31, IO_BASE_BM2, 0x0010, 27, 3), PIN_FIELD_BASE(32, IO_BASE_BM0, 0x0030, 0, 3), PIN_FIELD_BASE(33, IO_BASE_BM2, 0x0020, 3, 3), PIN_FIELD_BASE(34, IO_BASE_BM2, 0x0020, 0, 3), PIN_FIELD_BASE(35, IO_BASE_BM2, 0x0020, 9, 3), PIN_FIELD_BASE(36, IO_BASE_BM2, 0x0020, 6, 3), PIN_FIELD_BASE(37, IO_BASE_BM2, 0x0020, 15, 3), PIN_FIELD_BASE(38, IO_BASE_BM2, 0x0020, 12, 3), PIN_FIELD_BASE(39, IO_BASE_BM2, 0x0000, 15, 3), PIN_FIELD_BASE(40, IO_BASE_BM2, 0x0000, 6, 3), PIN_FIELD_BASE(41, IO_BASE_BM2, 0x0000, 9, 3), PIN_FIELD_BASE(42, IO_BASE_BM2, 0x0000, 12, 3), PIN_FIELD_BASE(43, IO_BASE_BM2, 0x0000, 18, 3), PIN_FIELD_BASE(44, IO_BASE_RB0, 0x0020, 0, 3), PIN_FIELD_BASE(45, IO_BASE_RB0, 0x0020, 3, 3), PIN_FIELD_BASE(46, IO_BASE_RB0, 0x0020, 6, 3), PIN_FIELD_BASE(47, IO_BASE_RB0, 0x0020, 9, 3), PIN_FIELD_BASE(48, IO_BASE_LM, 0x0000, 15, 3), PIN_FIELD_BASE(49, IO_BASE_LM, 0x0000, 12, 3), PIN_FIELD_BASE(50, IO_BASE_LM, 0x0000, 9, 3), PIN_FIELD_BASE(51, IO_BASE_RB1, 0x0000, 24, 3), PIN_FIELD_BASE(52, IO_BASE_RB1, 0x0010, 0, 3), PIN_FIELD_BASE(53, IO_BASE_RB1, 0x0000, 27, 3), PIN_FIELD_BASE(54, IO_BASE_RB1, 0x0010, 3, 3), PIN_FIELD_BASE(55, IO_BASE_LM, 0x0000, 18, 3), PIN_FIELD_BASE(56, IO_BASE_LM, 0x0000, 21, 3), PIN_FIELD_BASE(57, IO_BASE_BM1, 0x0010, 9, 3), PIN_FIELD_BASE(58, IO_BASE_BM1, 0x0010, 21, 3), PIN_FIELD_BASE(59, IO_BASE_BM1, 0x0010, 12, 3), PIN_FIELD_BASE(60, IO_BASE_BM1, 0x0010, 24, 3), PIN_FIELD_BASE(61, IO_BASE_BM1, 0x0010, 15, 3), PIN_FIELD_BASE(62, IO_BASE_BM1, 0x0010, 27, 3), PIN_FIELD_BASE(63, IO_BASE_BM1, 0x0010, 18, 3), PIN_FIELD_BASE(64, IO_BASE_BM1, 0x0020, 0, 3), PIN_FIELD_BASE(65, IO_BASE_RT, 0x0010, 0, 3), PIN_FIELD_BASE(66, IO_BASE_RT, 0x0010, 6, 3), PIN_FIELD_BASE(67, IO_BASE_RT, 0x0010, 3, 3), PIN_FIELD_BASE(68, IO_BASE_RT, 0x0010, 9, 3), PIN_FIELD_BASE(69, IO_BASE_BM1, 0x0020, 6, 3), PIN_FIELD_BASE(70, IO_BASE_BM1, 0x0020, 3, 3), PIN_FIELD_BASE(71, IO_BASE_BM1, 0x0020, 12, 3), PIN_FIELD_BASE(72, IO_BASE_BM1, 0x0020, 9, 3), PIN_FIELD_BASE(73, IO_BASE_BM1, 0x0020, 18, 3), PIN_FIELD_BASE(74, IO_BASE_BM1, 0x0020, 15, 3), PIN_FIELD_BASE(75, IO_BASE_BM2, 0x0010, 9, 3), PIN_FIELD_BASE(76, IO_BASE_BM1, 0x0020, 21, 3), PIN_FIELD_BASE(77, IO_BASE_RB1, 0x0010, 9, 3), PIN_FIELD_BASE(78, IO_BASE_RB1, 0x0010, 6, 3), PIN_FIELD_BASE(79, IO_BASE_RB1, 0x0010, 15, 3), PIN_FIELD_BASE(80, IO_BASE_RB1, 0x0010, 12, 3), PIN_FIELD_BASE(81, IO_BASE_BM1, 0x0020, 27, 3), PIN_FIELD_BASE(82, IO_BASE_BM1, 0x0020, 24, 3), PIN_FIELD_BASE(83, IO_BASE_BM1, 0x0030, 0, 3), PIN_FIELD_BASE(84, IO_BASE_RB0, 0x0020, 12, 3), PIN_FIELD_BASE(85, IO_BASE_RB0, 0x0020, 15, 3), PIN_FIELD_BASE(86, IO_BASE_RB0, 0x0020, 18, 3), PIN_FIELD_BASE(87, IO_BASE_RB0, 0x0020, 21, 3), PIN_FIELD_BASE(88, IO_BASE_LT0, 0x0020, 0, 3), PIN_FIELD_BASE(89, IO_BASE_LT0, 0x0010, 27, 3), PIN_FIELD_BASE(90, IO_BASE_LT0, 0x0020, 6, 3), PIN_FIELD_BASE(91, IO_BASE_LT0, 0x0020, 3, 3), PIN_FIELD_BASE(92, IO_BASE_LT0, 0x0010, 18, 3), PIN_FIELD_BASE(93, IO_BASE_LT0, 0x0010, 21, 3), PIN_FIELD_BASE(94, IO_BASE_LT0, 0x0020, 9, 3), PIN_FIELD_BASE(95, IO_BASE_LT0, 0x0010, 15, 3), PIN_FIELD_BASE(96, IO_BASE_LT0, 0x0010, 24, 3), PIN_FIELD_BASE(97, IO_BASE_LT0, 0x0000, 0, 3), PIN_FIELD_BASE(98, IO_BASE_LT0, 0x0000, 15, 3), PIN_FIELD_BASE(99, IO_BASE_LT0, 0x0000, 9, 3), PIN_FIELD_BASE(100, IO_BASE_LT0, 0x0000, 12, 3), PIN_FIELD_BASE(101, IO_BASE_LT0, 0x0000, 3, 3), PIN_FIELD_BASE(102, IO_BASE_LT0, 0x0000, 6, 3), PIN_FIELD_BASE(103, IO_BASE_RB0, 0x0010, 15, 3), PIN_FIELD_BASE(104, IO_BASE_RB0, 0x0010, 6, 3), PIN_FIELD_BASE(105, IO_BASE_RB0, 0x0010, 12, 3), PIN_FIELD_BASE(106, IO_BASE_RB0, 0x0010, 9, 3), PIN_FIELD_BASE(107, IO_BASE_RB0, 0x0010, 27, 3), PIN_FIELD_BASE(108, IO_BASE_RB0, 0x0010, 18, 3), PIN_FIELD_BASE(109, IO_BASE_RB0, 0x0010, 24, 3), PIN_FIELD_BASE(110, IO_BASE_RB0, 0x0010, 21, 3), PIN_FIELD_BASE(111, IO_BASE_RB0, 0x0000, 12, 3), PIN_FIELD_BASE(112, IO_BASE_RB1, 0x0000, 0, 3), PIN_FIELD_BASE(113, IO_BASE_RB1, 0x0000, 3, 3), PIN_FIELD_BASE(114, IO_BASE_RB1, 0x0000, 6, 3), PIN_FIELD_BASE(115, IO_BASE_BM1, 0x0000, 27, 3), PIN_FIELD_BASE(116, IO_BASE_BM1, 0x0010, 6, 3), PIN_FIELD_BASE(117, IO_BASE_BM1, 0x0010, 0, 3), PIN_FIELD_BASE(118, IO_BASE_BM1, 0x0010, 3, 3), PIN_FIELD_BASE(119, IO_BASE_BM0, 0x0020, 18, 3), PIN_FIELD_BASE(120, IO_BASE_BM0, 0x0020, 15, 3), PIN_FIELD_BASE(121, IO_BASE_BM0, 0x0020, 12, 3), PIN_FIELD_BASE(122, IO_BASE_BM0, 0x0020, 9, 3), PIN_FIELD_BASE(123, IO_BASE_BM0, 0x0010, 27, 3), PIN_FIELD_BASE(124, IO_BASE_BM0, 0x0010, 24, 3), PIN_FIELD_BASE(125, IO_BASE_BM0, 0x0010, 21, 3), PIN_FIELD_BASE(126, IO_BASE_BM0, 0x0010, 18, 3), PIN_FIELD_BASE(127, IO_BASE_BM0, 0x0020, 6, 3), PIN_FIELD_BASE(128, IO_BASE_BM0, 0x0010, 15, 3), PIN_FIELD_BASE(129, IO_BASE_BM0, 0x0020, 0, 3), PIN_FIELD_BASE(130, IO_BASE_BM0, 0x0020, 21, 3), PIN_FIELD_BASE(131, IO_BASE_BM0, 0x0010, 9, 3), PIN_FIELD_BASE(132, IO_BASE_BM0, 0x0010, 12, 3), PIN_FIELD_BASE(133, IO_BASE_BM0, 0x0020, 24, 3), PIN_FIELD_BASE(134, IO_BASE_BM0, 0x0020, 3, 3), PIN_FIELD_BASE(135, IO_BASE_BM0, 0x0010, 3, 3), PIN_FIELD_BASE(136, IO_BASE_BM0, 0x0010, 6, 3), PIN_FIELD_BASE(137, IO_BASE_BM1, 0x0000, 9, 3), PIN_FIELD_BASE(138, IO_BASE_BM1, 0x0000, 12, 3), PIN_FIELD_BASE(139, IO_BASE_BM0, 0x0000, 9, 3), PIN_FIELD_BASE(140, IO_BASE_BM0, 0x0000, 12, 3), PIN_FIELD_BASE(141, IO_BASE_BM0, 0x0000, 0, 3), PIN_FIELD_BASE(142, IO_BASE_BM0, 0x0000, 3, 3), PIN_FIELD_BASE(143, IO_BASE_BM0, 0x0000, 6, 3), PIN_FIELD_BASE(144, IO_BASE_BM0, 0x0000, 15, 3), PIN_FIELD_BASE(145, IO_BASE_BM0, 0x0000, 18, 3), PIN_FIELD_BASE(146, IO_BASE_BM0, 0x0000, 21, 3), PIN_FIELD_BASE(147, IO_BASE_BM0, 0x0000, 24, 3), PIN_FIELD_BASE(148, IO_BASE_BM0, 0x0000, 27, 3), PIN_FIELD_BASE(149, IO_BASE_BM0, 0x0010, 0, 3), PIN_FIELD_BASE(150, IO_BASE_BM2, 0x0010, 12, 3), PIN_FIELD_BASE(151, IO_BASE_BM0, 0x0020, 27, 3), PIN_FIELD_BASE(152, IO_BASE_BM2, 0x0010, 15, 3), PIN_FIELD_BASE(153, IO_BASE_BM2, 0x0010, 18, 3), PIN_FIELD_BASE(154, IO_BASE_BM2, 0x0010, 21, 3), PIN_FIELD_BASE(155, IO_BASE_BM2, 0x0010, 24, 3), PIN_FIELD_BASE(156, IO_BASE_LT0, 0x0010, 6, 3), PIN_FIELD_BASE(157, IO_BASE_LT0, 0x0010, 3, 3), PIN_FIELD_BASE(158, IO_BASE_LT0, 0x0010, 0, 3), PIN_FIELD_BASE(159, IO_BASE_LT1, 0x0000, 6, 3), PIN_FIELD_BASE(160, IO_BASE_LT0, 0x0010, 12, 3), PIN_FIELD_BASE(161, IO_BASE_LT0, 0x0000, 21, 3), PIN_FIELD_BASE(162, IO_BASE_LT0, 0x0000, 18, 3), PIN_FIELD_BASE(163, IO_BASE_LT1, 0x0000, 3, 3), PIN_FIELD_BASE(164, IO_BASE_LT0, 0x0000, 27, 3), PIN_FIELD_BASE(165, IO_BASE_LT0, 0x0000, 24, 3), PIN_FIELD_BASE(166, IO_BASE_LT1, 0x0000, 0, 3), PIN_FIELD_BASE(167, IO_BASE_LT0, 0x0010, 9, 3), PIN_FIELD_BASE(168, IO_BASE_BM2, 0x0000, 24, 3), PIN_FIELD_BASE(169, IO_BASE_BM2, 0x0000, 21, 3), PIN_FIELD_BASE(170, IO_BASE_BM2, 0x0000, 27, 3), PIN_FIELD_BASE(171, IO_BASE_BM2, 0x0010, 0, 3), PIN_FIELD_BASE(172, IO_BASE_BM2, 0x0010, 3, 3), PIN_FIELD_BASE(173, IO_BASE_BM2, 0x0010, 6, 3), PIN_FIELD_BASE(174, IO_BASE_RT, 0x0000, 15, 3), PIN_FIELD_BASE(175, IO_BASE_RT, 0x0000, 12, 3), PIN_FIELD_BASE(176, IO_BASE_RT, 0x0000, 18, 3), PIN_FIELD_BASE(177, IO_BASE_RT, 0x0000, 21, 3), PIN_FIELD_BASE(178, IO_BASE_RT, 0x0000, 24, 3), PIN_FIELD_BASE(179, IO_BASE_RT, 0x0000, 27, 3), PIN_FIELD_BASE(180, IO_BASE_LT0, 0x0020, 12, 3), PIN_FIELD_BASE(181, IO_BASE_LT0, 0x0020, 15, 3), PIN_FIELD_BASE(182, IO_BASE_RT, 0x0000, 9, 3), }; static const struct mtk_pin_field_calc mt8189_pin_rsel_range[] = { PIN_FIELD_BASE(51, IO_BASE_RB1, 0x00B0, 0, 3), /* SCP_SCL0 */ PIN_FIELD_BASE(52, IO_BASE_RB1, 0x00B0, 6, 3), /* SCP_SDA0 */ PIN_FIELD_BASE(53, IO_BASE_RB1, 0x00B0, 3, 3), /* SCP_SCL1 */ PIN_FIELD_BASE(54, IO_BASE_RB1, 0x00B0, 9, 3), /* SCP_SDA1 */ PIN_FIELD_BASE(55, IO_BASE_LM, 0x00B0, 0, 3), /* SCL2 */ PIN_FIELD_BASE(56, IO_BASE_LM, 0x00B0, 3, 3), /* SDA2 */ PIN_FIELD_BASE(57, IO_BASE_BM1, 0x00B0, 0, 3), /* SCL3 */ PIN_FIELD_BASE(58, IO_BASE_BM1, 0x00B0, 12, 3), /* SDA3 */ PIN_FIELD_BASE(59, IO_BASE_BM1, 0x00B0, 3, 3), /* SCL4 */ PIN_FIELD_BASE(60, IO_BASE_BM1, 0x00B0, 15, 3), /* SDA4 */ PIN_FIELD_BASE(61, IO_BASE_BM1, 0x00B0, 6, 3), /* SCL5 */ PIN_FIELD_BASE(62, IO_BASE_BM1, 0x00B0, 18, 3), /* SDA5 */ PIN_FIELD_BASE(63, IO_BASE_BM1, 0x00B0, 9, 3), /* SCL6 */ PIN_FIELD_BASE(64, IO_BASE_BM1, 0x00B0, 21, 3), /* SDA6 */ PIN_FIELD_BASE(65, IO_BASE_RT, 0x00E0, 0, 3), /* SCL7 */ PIN_FIELD_BASE(66, IO_BASE_RT, 0x00E0, 6, 3), /* SDA7 */ PIN_FIELD_BASE(67, IO_BASE_RT, 0x00E0, 3, 3), /* SCL8 */ PIN_FIELD_BASE(68, IO_BASE_RT, 0x00E0, 9, 3), /* SDA8 */ PIN_FIELD_BASE(180, IO_BASE_LT0, 0x0110, 0, 3), /* SPMI_P_SCL */ PIN_FIELD_BASE(181, IO_BASE_LT0, 0x0110, 3, 3), /* SPMI_P_SDA */ }; static const struct mtk_pin_reg_calc mt8189_reg_cals[PINCTRL_PIN_REG_MAX] = { [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8189_pin_mode_range), [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8189_pin_dir_range), [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8189_pin_di_range), [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8189_pin_do_range), [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8189_pin_smt_range), [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8189_pin_ies_range), [PINCTRL_PIN_REG_PUPD] = MTK_RANGE(mt8189_pin_pupd_range), [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8189_pin_r0_range), [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8189_pin_r1_range), [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt8189_pin_pu_range), [PINCTRL_PIN_REG_PD] = MTK_RANGE(mt8189_pin_pd_range), [PINCTRL_PIN_REG_DRV] = MTK_RANGE(mt8189_pin_drv_range), [PINCTRL_PIN_REG_RSEL] = MTK_RANGE(mt8189_pin_rsel_range), }; static const char * const mt8189_pinctrl_register_base_names[] = { [IO_BASE] = "base", [IO_BASE_LM] = "lm", [IO_BASE_RB0] = "rb0", [IO_BASE_RB1] = "rb1", [IO_BASE_BM0] = "bm0", [IO_BASE_BM1] = "bm1", [IO_BASE_BM2] = "bm2", [IO_BASE_LT0] = "lt0", [IO_BASE_LT1] = "lt1", [IO_BASE_RT] = "rt", [IO_BASE_EINT0] = "eint0", [IO_BASE_EINT1] = "eint1", [IO_BASE_EINT2] = "eint2", [IO_BASE_EINT3] = "eint3", [IO_BASE_EINT4] = "eint4", }; #define MT8189_TYPE0_PIN(_number, _name) \ MTK_TYPED_PIN(_number, _name, DRV_GRP4, IO_TYPE_GRP0) #define MT8189_TYPE1_PIN(_number, _name) \ MTK_TYPED_PIN(_number, _name, DRV_GRP4, IO_TYPE_GRP1) #define MT8189_TYPE2_PIN(_number, _name) \ MTK_TYPED_PIN(_number, _name, DRV_GRP4, IO_TYPE_GRP2) static const struct mtk_pin_desc mt8189_pins[] = { MT8189_TYPE0_PIN(0, "GPIO00"), MT8189_TYPE0_PIN(1, "GPIO01"), MT8189_TYPE0_PIN(2, "GPIO02"), MT8189_TYPE0_PIN(3, "GPIO03"), MT8189_TYPE0_PIN(4, "GPIO04"), MT8189_TYPE0_PIN(5, "GPIO05"), MT8189_TYPE0_PIN(6, "GPIO06"), MT8189_TYPE0_PIN(7, "GPIO07"), MT8189_TYPE0_PIN(8, "GPIO08"), MT8189_TYPE0_PIN(9, "GPIO09"), MT8189_TYPE0_PIN(10, "GPIO10"), MT8189_TYPE0_PIN(11, "GPIO11"), MT8189_TYPE0_PIN(12, "GPIO12"), MT8189_TYPE0_PIN(13, "GPIO13"), MT8189_TYPE0_PIN(14, "GPIO14"), MT8189_TYPE0_PIN(15, "GPIO15"), MT8189_TYPE0_PIN(16, "GPIO16"), MT8189_TYPE0_PIN(17, "GPIO17"), MT8189_TYPE0_PIN(18, "GPIO18"), MT8189_TYPE0_PIN(19, "GPIO19"), MT8189_TYPE0_PIN(20, "GPIO20"), MT8189_TYPE0_PIN(21, "GPIO21"), MT8189_TYPE0_PIN(22, "GPIO22"), MT8189_TYPE0_PIN(23, "GPIO23"), MT8189_TYPE0_PIN(24, "GPIO24"), MT8189_TYPE0_PIN(25, "GPIO25"), MT8189_TYPE0_PIN(26, "GPIO26"), MT8189_TYPE0_PIN(27, "GPIO27"), MT8189_TYPE0_PIN(28, "GPIO28"), MT8189_TYPE0_PIN(29, "GPIO29"), MT8189_TYPE0_PIN(30, "GPIO30"), MT8189_TYPE0_PIN(31, "GPIO31"), MT8189_TYPE0_PIN(32, "GPIO32"), MT8189_TYPE0_PIN(33, "GPIO33"), MT8189_TYPE0_PIN(34, "GPIO34"), MT8189_TYPE0_PIN(35, "GPIO35"), MT8189_TYPE0_PIN(36, "GPIO36"), MT8189_TYPE0_PIN(37, "GPIO37"), MT8189_TYPE0_PIN(38, "GPIO38"), MT8189_TYPE0_PIN(39, "GPIO39"), MT8189_TYPE0_PIN(40, "GPIO40"), MT8189_TYPE0_PIN(41, "GPIO41"), MT8189_TYPE0_PIN(42, "GPIO42"), MT8189_TYPE0_PIN(43, "GPIO43"), MT8189_TYPE1_PIN(44, "GPIO44"), MT8189_TYPE1_PIN(45, "GPIO45"), MT8189_TYPE1_PIN(46, "GPIO46"), MT8189_TYPE1_PIN(47, "GPIO47"), MT8189_TYPE0_PIN(48, "GPIO48"), MT8189_TYPE0_PIN(49, "GPIO49"), MT8189_TYPE0_PIN(50, "GPIO50"), MT8189_TYPE2_PIN(51, "GPIO51"), MT8189_TYPE2_PIN(52, "GPIO52"), MT8189_TYPE2_PIN(53, "GPIO53"), MT8189_TYPE2_PIN(54, "GPIO54"), MT8189_TYPE2_PIN(55, "GPIO55"), MT8189_TYPE2_PIN(56, "GPIO56"), MT8189_TYPE2_PIN(57, "GPIO57"), MT8189_TYPE2_PIN(58, "GPIO58"), MT8189_TYPE2_PIN(59, "GPIO59"), MT8189_TYPE2_PIN(60, "GPIO60"), MT8189_TYPE2_PIN(61, "GPIO61"), MT8189_TYPE2_PIN(62, "GPIO62"), MT8189_TYPE2_PIN(63, "GPIO63"), MT8189_TYPE2_PIN(64, "GPIO64"), MT8189_TYPE2_PIN(65, "GPIO65"), MT8189_TYPE2_PIN(66, "GPIO66"), MT8189_TYPE2_PIN(67, "GPIO67"), MT8189_TYPE2_PIN(68, "GPIO68"), MT8189_TYPE0_PIN(69, "GPIO69"), MT8189_TYPE0_PIN(70, "GPIO70"), MT8189_TYPE0_PIN(71, "GPIO71"), MT8189_TYPE0_PIN(72, "GPIO72"), MT8189_TYPE0_PIN(73, "GPIO73"), MT8189_TYPE0_PIN(74, "GPIO74"), MT8189_TYPE0_PIN(75, "GPIO75"), MT8189_TYPE0_PIN(76, "GPIO76"), MT8189_TYPE0_PIN(77, "GPIO77"), MT8189_TYPE0_PIN(78, "GPIO78"), MT8189_TYPE0_PIN(79, "GPIO79"), MT8189_TYPE0_PIN(80, "GPIO80"), MT8189_TYPE0_PIN(81, "GPIO81"), MT8189_TYPE0_PIN(82, "GPIO82"), MT8189_TYPE0_PIN(83, "GPIO83"), MT8189_TYPE0_PIN(84, "GPIO84"), MT8189_TYPE0_PIN(85, "GPIO85"), MT8189_TYPE0_PIN(86, "GPIO86"), MT8189_TYPE0_PIN(87, "GPIO87"), MT8189_TYPE0_PIN(88, "GPIO88"), MT8189_TYPE0_PIN(89, "GPIO89"), MT8189_TYPE0_PIN(90, "GPIO90"), MT8189_TYPE0_PIN(91, "GPIO91"), MT8189_TYPE0_PIN(92, "GPIO92"), MT8189_TYPE0_PIN(93, "GPIO93"), MT8189_TYPE0_PIN(94, "GPIO94"), MT8189_TYPE0_PIN(95, "GPIO95"), MT8189_TYPE0_PIN(96, "GPIO96"), MT8189_TYPE0_PIN(97, "GPIO97"), MT8189_TYPE0_PIN(98, "GPIO98"), MT8189_TYPE0_PIN(99, "GPIO99"), MT8189_TYPE0_PIN(100, "GPIO100"), MT8189_TYPE0_PIN(101, "GPIO101"), MT8189_TYPE0_PIN(102, "GPIO102"), MT8189_TYPE0_PIN(103, "GPIO103"), MT8189_TYPE0_PIN(104, "GPIO104"), MT8189_TYPE0_PIN(105, "GPIO105"), MT8189_TYPE0_PIN(106, "GPIO106"), MT8189_TYPE0_PIN(107, "GPIO107"), MT8189_TYPE0_PIN(108, "GPIO108"), MT8189_TYPE0_PIN(109, "GPIO109"), MT8189_TYPE0_PIN(110, "GPIO110"), MT8189_TYPE0_PIN(111, "GPIO111"), MT8189_TYPE0_PIN(112, "GPIO112"), MT8189_TYPE0_PIN(113, "GPIO113"), MT8189_TYPE0_PIN(114, "GPIO114"), MT8189_TYPE0_PIN(115, "GPIO115"), MT8189_TYPE0_PIN(116, "GPIO116"), MT8189_TYPE0_PIN(117, "GPIO117"), MT8189_TYPE0_PIN(118, "GPIO118"), MT8189_TYPE0_PIN(119, "GPIO119"), MT8189_TYPE0_PIN(120, "GPIO120"), MT8189_TYPE0_PIN(121, "GPIO121"), MT8189_TYPE0_PIN(122, "GPIO122"), MT8189_TYPE0_PIN(123, "GPIO123"), MT8189_TYPE0_PIN(124, "GPIO124"), MT8189_TYPE0_PIN(125, "GPIO125"), MT8189_TYPE0_PIN(126, "GPIO126"), MT8189_TYPE0_PIN(127, "GPIO127"), MT8189_TYPE0_PIN(128, "GPIO128"), MT8189_TYPE0_PIN(129, "GPIO129"), MT8189_TYPE0_PIN(130, "GPIO130"), MT8189_TYPE0_PIN(131, "GPIO131"), MT8189_TYPE0_PIN(132, "GPIO132"), MT8189_TYPE0_PIN(133, "GPIO133"), MT8189_TYPE0_PIN(134, "GPIO134"), MT8189_TYPE0_PIN(135, "GPIO135"), MT8189_TYPE0_PIN(136, "GPIO136"), MT8189_TYPE0_PIN(137, "GPIO137"), MT8189_TYPE0_PIN(138, "GPIO138"), MT8189_TYPE0_PIN(139, "GPIO139"), MT8189_TYPE0_PIN(140, "GPIO140"), MT8189_TYPE0_PIN(141, "GPIO141"), MT8189_TYPE0_PIN(142, "GPIO142"), MT8189_TYPE0_PIN(143, "GPIO143"), MT8189_TYPE0_PIN(144, "GPIO144"), MT8189_TYPE0_PIN(145, "GPIO145"), MT8189_TYPE0_PIN(146, "GPIO146"), MT8189_TYPE0_PIN(147, "GPIO147"), MT8189_TYPE0_PIN(148, "GPIO148"), MT8189_TYPE0_PIN(149, "GPIO149"), MT8189_TYPE0_PIN(150, "GPIO150"), MT8189_TYPE0_PIN(151, "GPIO151"), MT8189_TYPE0_PIN(152, "GPIO152"), MT8189_TYPE0_PIN(153, "GPIO153"), MT8189_TYPE0_PIN(154, "GPIO154"), MT8189_TYPE0_PIN(155, "GPIO155"), MT8189_TYPE1_PIN(156, "GPIO156"), MT8189_TYPE1_PIN(157, "GPIO157"), MT8189_TYPE1_PIN(158, "GPIO158"), MT8189_TYPE1_PIN(159, "GPIO159"), MT8189_TYPE1_PIN(160, "GPIO160"), MT8189_TYPE1_PIN(161, "GPIO161"), MT8189_TYPE1_PIN(162, "GPIO162"), MT8189_TYPE1_PIN(163, "GPIO163"), MT8189_TYPE1_PIN(164, "GPIO164"), MT8189_TYPE1_PIN(165, "GPIO165"), MT8189_TYPE1_PIN(166, "GPIO166"), MT8189_TYPE1_PIN(167, "GPIO167"), MT8189_TYPE1_PIN(168, "GPIO168"), MT8189_TYPE1_PIN(169, "GPIO169"), MT8189_TYPE1_PIN(170, "GPIO170"), MT8189_TYPE1_PIN(171, "GPIO171"), MT8189_TYPE1_PIN(172, "GPIO172"), MT8189_TYPE1_PIN(173, "GPIO173"), MT8189_TYPE1_PIN(174, "GPIO174"), MT8189_TYPE1_PIN(175, "GPIO175"), MT8189_TYPE1_PIN(176, "GPIO176"), MT8189_TYPE1_PIN(177, "GPIO177"), MT8189_TYPE1_PIN(178, "GPIO178"), MT8189_TYPE1_PIN(179, "GPIO179"), MT8189_TYPE2_PIN(180, "GPIO180"), MT8189_TYPE2_PIN(181, "GPIO181"), MT8189_TYPE0_PIN(182, "GPIO182"), }; static const struct mtk_io_type_desc mt8189_io_type_desc[] = { [IO_TYPE_GRP0] = { .name = "mt8189", .bias_set = mtk_pinconf_bias_set_pu_pd, .drive_set = mtk_pinconf_drive_set_v1, .input_enable = mtk_pinconf_input_enable_v1, .get_pinconf = mtk_pinconf_get_pu_pd, }, [IO_TYPE_GRP1] = { .name = "MSDC", .bias_set = mtk_pinconf_bias_set_pupd_r1_r0, .drive_set = mtk_pinconf_drive_set_v1, .input_enable = mtk_pinconf_input_enable_v1, .get_pinconf = mtk_pinconf_get_pupd_r1_r0, }, [IO_TYPE_GRP2] = { .name = "I2C", .bias_set = mtk_pinconf_bias_set_pu_pd_rsel, .drive_set = mtk_pinconf_drive_set_v1, .input_enable = mtk_pinconf_input_enable_v1, .get_pinconf = mtk_pinconf_get_pu_pd_rsel, }, }; static struct mtk_pinctrl_soc mt8189_data = { .name = "mt8189_pinctrl", .reg_cal = mt8189_reg_cals, .pins = mt8189_pins, .npins = ARRAY_SIZE(mt8189_pins), .io_type = mt8189_io_type_desc, .ntype = ARRAY_SIZE(mt8189_io_type_desc), .base_names = mt8189_pinctrl_register_base_names, .nbase_names = ARRAY_SIZE(mt8189_pinctrl_register_base_names), .base_calc = 1, .rev = MTK_PINCTRL_V1, }; static int mtk_pinctrl_mt8189_probe(struct udevice *dev) { return mtk_pinctrl_common_probe(dev, &mt8189_data); } static const struct udevice_id mt8189_pctrl_match[] = { { .compatible = "mediatek,mt8189-pinctrl" }, { } }; U_BOOT_DRIVER(mt8189_pinctrl) = { .name = "mt8189_pinctrl", .id = UCLASS_PINCTRL, .of_match = mt8189_pctrl_match, .ops = &mtk_pinctrl_ops, .bind = mtk_pinctrl_common_bind, .probe = mtk_pinctrl_mt8189_probe, .priv_auto = sizeof(struct mtk_pinctrl_priv), };