// SPDX-License-Identifier: GPL-2.0+
/*
 * Qualcomm sc7280 pinctrl
 *
 * (C) Copyright 2024 Linaro Ltd.
 *
 */

#include <dm.h>

#include "pinctrl-qcom.h"

#define MAX_PIN_NAME_LEN 32
static char pin_name[MAX_PIN_NAME_LEN] __section(".data");

typedef unsigned int msm_pin_function[10];

#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9)\
	{					        \
		msm_mux_gpio, /* gpio mode */		\
		msm_mux_##f1,				\
		msm_mux_##f2,				\
		msm_mux_##f3,				\
		msm_mux_##f4,				\
		msm_mux_##f5,				\
		msm_mux_##f6,				\
		msm_mux_##f7,				\
		msm_mux_##f8,				\
		msm_mux_##f9				\
	}

#define SDC_PINGROUP(pg_name, ctl, pull, drv)		\
	{						\
		.name = pg_name,			\
		.ctl_reg = ctl,				\
		.io_reg = 0,				\
		.pull_bit = pull,			\
		.drv_bit = drv,				\
		.oe_bit = -1,				\
		.in_bit = -1,				\
		.out_bit = -1,				\
	}

#define UFS_RESET(pg_name, offset)			\
	{						\
		.name = pg_name,			\
		.ctl_reg = offset,			\
		.io_reg = offset + 0x4,			\
		.pull_bit = 3,				\
		.drv_bit = 0,				\
		.oe_bit = -1,				\
		.in_bit = -1,				\
		.out_bit = 0,				\
	}

enum sc7280_functions {
	msm_mux_atest_char,
	msm_mux_atest_char0,
	msm_mux_atest_char1,
	msm_mux_atest_char2,
	msm_mux_atest_char3,
	msm_mux_atest_usb0,
	msm_mux_atest_usb00,
	msm_mux_atest_usb01,
	msm_mux_atest_usb02,
	msm_mux_atest_usb03,
	msm_mux_atest_usb1,
	msm_mux_atest_usb10,
	msm_mux_atest_usb11,
	msm_mux_atest_usb12,
	msm_mux_atest_usb13,
	msm_mux_audio_ref,
	msm_mux_cam_mclk,
	msm_mux_cci_async,
	msm_mux_cci_i2c,
	msm_mux_cci_timer0,
	msm_mux_cci_timer1,
	msm_mux_cci_timer2,
	msm_mux_cci_timer3,
	msm_mux_cci_timer4,
	msm_mux_cmu_rng0,
	msm_mux_cmu_rng1,
	msm_mux_cmu_rng2,
	msm_mux_cmu_rng3,
	msm_mux_coex_uart1,
	msm_mux_cri_trng,
	msm_mux_cri_trng0,
	msm_mux_cri_trng1,
	msm_mux_dbg_out,
	msm_mux_ddr_bist,
	msm_mux_ddr_pxi0,
	msm_mux_ddr_pxi1,
	msm_mux_dp_hot,
	msm_mux_dp_lcd,
	msm_mux_edp_hot,
	msm_mux_edp_lcd,
	msm_mux_egpio,
	msm_mux_gcc_gp1,
	msm_mux_gcc_gp2,
	msm_mux_gcc_gp3,
	msm_mux_gpio,
	msm_mux_host2wlan_sol,
	msm_mux_ibi_i3c,
	msm_mux_jitter_bist,
	msm_mux_lpass_slimbus,
	msm_mux_mdp_vsync,
	msm_mux_mdp_vsync0,
	msm_mux_mdp_vsync1,
	msm_mux_mdp_vsync2,
	msm_mux_mdp_vsync3,
	msm_mux_mdp_vsync4,
	msm_mux_mdp_vsync5,
	msm_mux_mi2s0_data0,
	msm_mux_mi2s0_data1,
	msm_mux_mi2s0_sck,
	msm_mux_mi2s0_ws,
	msm_mux_mi2s1_data0,
	msm_mux_mi2s1_data1,
	msm_mux_mi2s1_sck,
	msm_mux_mi2s1_ws,
	msm_mux_mi2s2_data0,
	msm_mux_mi2s2_data1,
	msm_mux_mi2s2_sck,
	msm_mux_mi2s2_ws,
	msm_mux_mss_grfc0,
	msm_mux_mss_grfc1,
	msm_mux_mss_grfc10,
	msm_mux_mss_grfc11,
	msm_mux_mss_grfc12,
	msm_mux_mss_grfc2,
	msm_mux_mss_grfc3,
	msm_mux_mss_grfc4,
	msm_mux_mss_grfc5,
	msm_mux_mss_grfc6,
	msm_mux_mss_grfc7,
	msm_mux_mss_grfc8,
	msm_mux_mss_grfc9,
	msm_mux_nav_gpio0,
	msm_mux_nav_gpio1,
	msm_mux_nav_gpio2,
	msm_mux_pa_indicator,
	msm_mux_pcie0_clkreqn,
	msm_mux_pcie1_clkreqn,
	msm_mux_phase_flag,
	msm_mux_pll_bist,
	msm_mux_pll_bypassnl,
	msm_mux_pll_clk,
	msm_mux_pll_reset,
	msm_mux_pri_mi2s,
	msm_mux_prng_rosc,
	msm_mux_qdss,
	msm_mux_qdss_cti,
	msm_mux_qlink0_enable,
	msm_mux_qlink0_request,
	msm_mux_qlink0_wmss,
	msm_mux_qlink1_enable,
	msm_mux_qlink1_request,
	msm_mux_qlink1_wmss,
	msm_mux_qspi_clk,
	msm_mux_qspi_cs,
	msm_mux_qspi_data,
	msm_mux_qup00,
	msm_mux_qup01,
	msm_mux_qup02,
	msm_mux_qup03,
	msm_mux_qup04,
	msm_mux_qup05,
	msm_mux_qup06,
	msm_mux_qup07,
	msm_mux_qup10,
	msm_mux_qup11,
	msm_mux_qup12,
	msm_mux_qup13,
	msm_mux_qup14,
	msm_mux_qup15,
	msm_mux_qup16,
	msm_mux_qup17,
	msm_mux_sd_write,
	msm_mux_sdc40,
	msm_mux_sdc41,
	msm_mux_sdc42,
	msm_mux_sdc43,
	msm_mux_sdc4_clk,
	msm_mux_sdc4_cmd,
	msm_mux_sec_mi2s,
	msm_mux_tb_trig,
	msm_mux_tgu_ch0,
	msm_mux_tgu_ch1,
	msm_mux_tsense_pwm1,
	msm_mux_tsense_pwm2,
	msm_mux_uim0_clk,
	msm_mux_uim0_data,
	msm_mux_uim0_present,
	msm_mux_uim0_reset,
	msm_mux_uim1_clk,
	msm_mux_uim1_data,
	msm_mux_uim1_present,
	msm_mux_uim1_reset,
	msm_mux_usb2phy_ac,
	msm_mux_usb_phy,
	msm_mux_vfr_0,
	msm_mux_vfr_1,
	msm_mux_vsense_trigger,
	msm_mux__,
};

#define MSM_PIN_FUNCTION(fname)                         \
	[msm_mux_##fname] = {#fname, msm_mux_##fname}

static const struct pinctrl_function msm_pinctrl_functions[] = {
	MSM_PIN_FUNCTION(atest_char),
	MSM_PIN_FUNCTION(atest_char0),
	MSM_PIN_FUNCTION(atest_char1),
	MSM_PIN_FUNCTION(atest_char2),
	MSM_PIN_FUNCTION(atest_char3),
	MSM_PIN_FUNCTION(atest_usb0),
	MSM_PIN_FUNCTION(atest_usb00),
	MSM_PIN_FUNCTION(atest_usb01),
	MSM_PIN_FUNCTION(atest_usb02),
	MSM_PIN_FUNCTION(atest_usb03),
	MSM_PIN_FUNCTION(atest_usb1),
	MSM_PIN_FUNCTION(atest_usb10),
	MSM_PIN_FUNCTION(atest_usb11),
	MSM_PIN_FUNCTION(atest_usb12),
	MSM_PIN_FUNCTION(atest_usb13),
	MSM_PIN_FUNCTION(audio_ref),
	MSM_PIN_FUNCTION(cam_mclk),
	MSM_PIN_FUNCTION(cci_async),
	MSM_PIN_FUNCTION(cci_i2c),
	MSM_PIN_FUNCTION(cci_timer0),
	MSM_PIN_FUNCTION(cci_timer1),
	MSM_PIN_FUNCTION(cci_timer2),
	MSM_PIN_FUNCTION(cci_timer3),
	MSM_PIN_FUNCTION(cci_timer4),
	MSM_PIN_FUNCTION(cmu_rng0),
	MSM_PIN_FUNCTION(cmu_rng1),
	MSM_PIN_FUNCTION(cmu_rng2),
	MSM_PIN_FUNCTION(cmu_rng3),
	MSM_PIN_FUNCTION(coex_uart1),
	MSM_PIN_FUNCTION(cri_trng),
	MSM_PIN_FUNCTION(cri_trng0),
	MSM_PIN_FUNCTION(cri_trng1),
	MSM_PIN_FUNCTION(dbg_out),
	MSM_PIN_FUNCTION(ddr_bist),
	MSM_PIN_FUNCTION(ddr_pxi0),
	MSM_PIN_FUNCTION(ddr_pxi1),
	MSM_PIN_FUNCTION(dp_hot),
	MSM_PIN_FUNCTION(dp_lcd),
	MSM_PIN_FUNCTION(edp_hot),
	MSM_PIN_FUNCTION(edp_lcd),
	MSM_PIN_FUNCTION(egpio),
	MSM_PIN_FUNCTION(gcc_gp1),
	MSM_PIN_FUNCTION(gcc_gp2),
	MSM_PIN_FUNCTION(gcc_gp3),
	MSM_PIN_FUNCTION(gpio),
	MSM_PIN_FUNCTION(host2wlan_sol),
	MSM_PIN_FUNCTION(ibi_i3c),
	MSM_PIN_FUNCTION(jitter_bist),
	MSM_PIN_FUNCTION(lpass_slimbus),
	MSM_PIN_FUNCTION(mdp_vsync),
	MSM_PIN_FUNCTION(mdp_vsync0),
	MSM_PIN_FUNCTION(mdp_vsync1),
	MSM_PIN_FUNCTION(mdp_vsync2),
	MSM_PIN_FUNCTION(mdp_vsync3),
	MSM_PIN_FUNCTION(mdp_vsync4),
	MSM_PIN_FUNCTION(mdp_vsync5),
	MSM_PIN_FUNCTION(mi2s0_data0),
	MSM_PIN_FUNCTION(mi2s0_data1),
	MSM_PIN_FUNCTION(mi2s0_sck),
	MSM_PIN_FUNCTION(mi2s0_ws),
	MSM_PIN_FUNCTION(mi2s1_data0),
	MSM_PIN_FUNCTION(mi2s1_data1),
	MSM_PIN_FUNCTION(mi2s1_sck),
	MSM_PIN_FUNCTION(mi2s1_ws),
	MSM_PIN_FUNCTION(mi2s2_data0),
	MSM_PIN_FUNCTION(mi2s2_data1),
	MSM_PIN_FUNCTION(mi2s2_sck),
	MSM_PIN_FUNCTION(mi2s2_ws),
	MSM_PIN_FUNCTION(mss_grfc0),
	MSM_PIN_FUNCTION(mss_grfc1),
	MSM_PIN_FUNCTION(mss_grfc10),
	MSM_PIN_FUNCTION(mss_grfc11),
	MSM_PIN_FUNCTION(mss_grfc12),
	MSM_PIN_FUNCTION(mss_grfc2),
	MSM_PIN_FUNCTION(mss_grfc3),
	MSM_PIN_FUNCTION(mss_grfc4),
	MSM_PIN_FUNCTION(mss_grfc5),
	MSM_PIN_FUNCTION(mss_grfc6),
	MSM_PIN_FUNCTION(mss_grfc7),
	MSM_PIN_FUNCTION(mss_grfc8),
	MSM_PIN_FUNCTION(mss_grfc9),
	MSM_PIN_FUNCTION(nav_gpio0),
	MSM_PIN_FUNCTION(nav_gpio1),
	MSM_PIN_FUNCTION(nav_gpio2),
	MSM_PIN_FUNCTION(pa_indicator),
	MSM_PIN_FUNCTION(pcie0_clkreqn),
	MSM_PIN_FUNCTION(pcie1_clkreqn),
	MSM_PIN_FUNCTION(phase_flag),
	MSM_PIN_FUNCTION(pll_bist),
	MSM_PIN_FUNCTION(pll_bypassnl),
	MSM_PIN_FUNCTION(pll_clk),
	MSM_PIN_FUNCTION(pll_reset),
	MSM_PIN_FUNCTION(pri_mi2s),
	MSM_PIN_FUNCTION(prng_rosc),
	MSM_PIN_FUNCTION(qdss),
	MSM_PIN_FUNCTION(qdss_cti),
	MSM_PIN_FUNCTION(qlink0_enable),
	MSM_PIN_FUNCTION(qlink0_request),
	MSM_PIN_FUNCTION(qlink0_wmss),
	MSM_PIN_FUNCTION(qlink1_enable),
	MSM_PIN_FUNCTION(qlink1_request),
	MSM_PIN_FUNCTION(qlink1_wmss),
	MSM_PIN_FUNCTION(qspi_clk),
	MSM_PIN_FUNCTION(qspi_cs),
	MSM_PIN_FUNCTION(qspi_data),
	MSM_PIN_FUNCTION(qup00),
	MSM_PIN_FUNCTION(qup01),
	MSM_PIN_FUNCTION(qup02),
	MSM_PIN_FUNCTION(qup03),
	MSM_PIN_FUNCTION(qup04),
	MSM_PIN_FUNCTION(qup05),
	MSM_PIN_FUNCTION(qup06),
	MSM_PIN_FUNCTION(qup07),
	MSM_PIN_FUNCTION(qup10),
	MSM_PIN_FUNCTION(qup11),
	MSM_PIN_FUNCTION(qup12),
	MSM_PIN_FUNCTION(qup13),
	MSM_PIN_FUNCTION(qup14),
	MSM_PIN_FUNCTION(qup15),
	MSM_PIN_FUNCTION(qup16),
	MSM_PIN_FUNCTION(qup17),
	MSM_PIN_FUNCTION(sd_write),
	MSM_PIN_FUNCTION(sdc40),
	MSM_PIN_FUNCTION(sdc41),
	MSM_PIN_FUNCTION(sdc42),
	MSM_PIN_FUNCTION(sdc43),
	MSM_PIN_FUNCTION(sdc4_clk),
	MSM_PIN_FUNCTION(sdc4_cmd),
	MSM_PIN_FUNCTION(sec_mi2s),
	MSM_PIN_FUNCTION(tb_trig),
	MSM_PIN_FUNCTION(tgu_ch0),
	MSM_PIN_FUNCTION(tgu_ch1),
	MSM_PIN_FUNCTION(tsense_pwm1),
	MSM_PIN_FUNCTION(tsense_pwm2),
	MSM_PIN_FUNCTION(uim0_clk),
	MSM_PIN_FUNCTION(uim0_data),
	MSM_PIN_FUNCTION(uim0_present),
	MSM_PIN_FUNCTION(uim0_reset),
	MSM_PIN_FUNCTION(uim1_clk),
	MSM_PIN_FUNCTION(uim1_data),
	MSM_PIN_FUNCTION(uim1_present),
	MSM_PIN_FUNCTION(uim1_reset),
	MSM_PIN_FUNCTION(usb2phy_ac),
	MSM_PIN_FUNCTION(usb_phy),
	MSM_PIN_FUNCTION(vfr_0),
	MSM_PIN_FUNCTION(vfr_1),
	MSM_PIN_FUNCTION(vsense_trigger),
};

static const msm_pin_function sc7280_pin_functions[] = {
	[0] = PINGROUP(0, qup00, ibi_i3c, _, _, _, _, _, _, _),
	[1] = PINGROUP(1, qup00, ibi_i3c, _, _, _, _, _, _, _),
	[2] = PINGROUP(2, qup00, qup07, _, qdss, _, _, _, _, _),
	[3] = PINGROUP(3, qup00, qup07, _, qdss, _, _, _, _, _),
	[4] = PINGROUP(4, qup01, ibi_i3c, _, _, _, _, _, _, _),
	[5] = PINGROUP(5, qup01, ibi_i3c, _, _, _, _, _, _, _),
	[6] = PINGROUP(6, qup01, qup07, _, _, _, _, _, _, _),
	[7] = PINGROUP(7, qup01, _, _, _, _, _, _, _, _),
	[8] = PINGROUP(8, qup02, _, qdss, _, _, _, _, _, _),
	[9] = PINGROUP(9, qup02, _, qdss, _, _, _, _, _, _),
	[10] = PINGROUP(10, qup02, _, qdss, _, _, _, _, _, _),
	[11] = PINGROUP(11, qup02, _, qdss, _, _, _, _, _, _),
	[12] = PINGROUP(12, qup03, qspi_data, sdc40, tb_trig, phase_flag, qdss, ddr_pxi1, _, _),
	[13] = PINGROUP(13, qup03, qspi_data, sdc41, tb_trig, phase_flag, qdss, ddr_pxi1, _, _),
	[14] = PINGROUP(14, qup03, qspi_clk, sdc4_clk, mdp_vsync, phase_flag, ddr_pxi0, _, _, _),
	[15] = PINGROUP(15, qup03, qspi_cs, tb_trig, phase_flag, qdss_cti, ddr_pxi0, _, _, _),
	[16] = PINGROUP(16, qup04, qspi_data, sdc42, mdp_vsync, phase_flag, qdss_cti, _, _, _),
	[17] = PINGROUP(17, qup04, qspi_data, sdc43, _, phase_flag, _, _, _, _),
	[18] = PINGROUP(18, qup04, _, phase_flag, qdss_cti, _, _, _, _, _),
	[19] = PINGROUP(19, qup04, qspi_cs, sdc4_cmd, _, phase_flag, qdss_cti, _, _, _),
	[20] = PINGROUP(20, qup05, cci_timer0, _, qdss, _, _, _, _, _),
	[21] = PINGROUP(21, qup05, cci_timer1, _, qdss, _, _, _, _, _),
	[22] = PINGROUP(22, qup05, _, qdss, _, _, _, _, _, _),
	[23] = PINGROUP(23, qup05, _, qdss, _, _, _, _, _, _),
	[24] = PINGROUP(24, qup06, _, qdss, _, _, _, _, _, _),
	[25] = PINGROUP(25, qup06, _, qdss, _, _, _, _, _, _),
	[26] = PINGROUP(26, qup06, host2wlan_sol, _, qdss, _, _, _, _, _),
	[27] = PINGROUP(27, qup06, _, qdss, _, _, _, _, _, _),
	[28] = PINGROUP(28, qup07, _, qdss, _, _, _, _, _, _),
	[29] = PINGROUP(29, qup07, qdss, _, _, _, _, _, _, _),
	[30] = PINGROUP(30, qup07, _, _, _, _, _, _, _, _),
	[31] = PINGROUP(31, qup07, _, _, _, _, _, _, _, _),
	[32] = PINGROUP(32, qup10, _, _, _, _, _, _, _, _),
	[33] = PINGROUP(33, qup10, _, _, _, _, _, _, _, _),
	[34] = PINGROUP(34, qup10, _, _, _, _, _, _, _, _),
	[35] = PINGROUP(35, qup10, _, _, _, _, _, _, _, _),
	[36] = PINGROUP(36, qup11, ibi_i3c, _, _, _, _, _, _, _),
	[37] = PINGROUP(37, qup11, ibi_i3c, _, _, _, _, _, _, _),
	[38] = PINGROUP(38, qup11, qup14, dbg_out, _, _, _, _, _, _),
	[39] = PINGROUP(39, qup11, _, _, _, _, _, _, _, _),
	[40] = PINGROUP(40, qup12, _, _, _, _, _, _, _, _),
	[41] = PINGROUP(41, qup12, _, _, _, _, _, _, _, _),
	[42] = PINGROUP(42, qup12, _, _, _, _, _, _, _, _),
	[43] = PINGROUP(43, qup12, _, _, _, _, _, _, _, _),
	[44] = PINGROUP(44, qup13, _, _, _, _, _, _, _, _),
	[45] = PINGROUP(45, qup13, _, _, _, _, _, _, _, _),
	[46] = PINGROUP(46, qup13, edp_lcd, _, _, _, _, _, _, _),
	[47] = PINGROUP(47, qup13, dp_hot, _, _, _, _, _, _, _),
	[48] = PINGROUP(48, qup14, _, _, _, _, _, _, _, _),
	[49] = PINGROUP(49, qup14, _, _, _, _, _, _, _, _),
	[50] = PINGROUP(50, qup14, qup16, _, _, _, _, _, _, _),
	[51] = PINGROUP(51, qup14, _, _, _, _, _, _, _, _),
	[52] = PINGROUP(52, qup15, _, _, _, _, _, _, _, _),
	[53] = PINGROUP(53, qup15, _, _, _, _, _, _, _, _),
	[54] = PINGROUP(54, qup15, qup14, _, _, _, _, _, _, _),
	[55] = PINGROUP(55, qup15, qup14, _, _, _, _, _, _, _),
	[56] = PINGROUP(56, qup16, ddr_bist, phase_flag, _, _, _, _, _, _),
	[57] = PINGROUP(57, qup16, ddr_bist, phase_flag, _, _, _, _, _, _),
	[58] = PINGROUP(58, qup16, ddr_bist, phase_flag, qdss, _, _, _, _, _),
	[59] = PINGROUP(59, qup16, ddr_bist, phase_flag, qdss, _, _, _, _, _),
	[60] = PINGROUP(60, qup17, edp_hot, _, phase_flag, _, _, _, _, _),
	[61] = PINGROUP(61, qup17, sd_write, phase_flag, tsense_pwm1, tsense_pwm2, _, _, _, _),
	[62] = PINGROUP(62, qup17, qup16, phase_flag, _, _, _, _, _, _),
	[63] = PINGROUP(63, qup17, qup16, phase_flag, _, _, _, _, _, _),
	[64] = PINGROUP(64, cam_mclk, _, _, _, _, _, _, _, _),
	[65] = PINGROUP(65, cam_mclk, tgu_ch0, _, _, _, _, _, _, _),
	[66] = PINGROUP(66, cam_mclk, pll_bypassnl, tgu_ch1, _, _, _, _, _, _),
	[67] = PINGROUP(67, cam_mclk, pll_reset, _, _, _, _, _, _, _),
	[68] = PINGROUP(68, cam_mclk, _, _, _, _, _, _, _, _),
	[69] = PINGROUP(69, cci_i2c, _, _, _, _, _, _, _, _),
	[70] = PINGROUP(70, cci_i2c, _, _, _, _, _, _, _, _),
	[71] = PINGROUP(71, cci_i2c, _, _, _, _, _, _, _, _),
	[72] = PINGROUP(72, cci_i2c, _, _, _, _, _, _, _, _),
	[73] = PINGROUP(73, cci_i2c, _, _, _, _, _, _, _, _),
	[74] = PINGROUP(74, cci_i2c, _, _, _, _, _, _, _, _),
	[75] = PINGROUP(75, cci_i2c, _, _, _, _, _, _, _, _),
	[76] = PINGROUP(76, cci_i2c, gcc_gp1, _, _, _, _, _, _, _),
	[77] = PINGROUP(77, cci_timer2, gcc_gp2, _, atest_usb13, atest_char0, _, _, _, _),
	[78] = PINGROUP(78, cci_timer3, cci_async, gcc_gp3, _, atest_usb12, atest_char1, _, _, _),
	[79] = PINGROUP(79, cci_timer4, cci_async, pcie1_clkreqn, mdp_vsync, jitter_bist,
			atest_usb11, atest_char2, _, _),
	[80] = PINGROUP(80, mdp_vsync, vfr_0, mdp_vsync0, mdp_vsync1, mdp_vsync4, pll_bist,
			atest_usb10, atest_char3, _),
	[81] = PINGROUP(81, mdp_vsync, dp_lcd, mdp_vsync2, mdp_vsync3, mdp_vsync5, atest_usb1,
			atest_char, _, _),
	[82] = PINGROUP(82, _, _, _, _, _, _, _, _, _),
	[83] = PINGROUP(83, _, _, _, _, _, _, _, _, _),
	[84] = PINGROUP(84, usb2phy_ac, _, _, _, _, _, _, _, _),
	[85] = PINGROUP(85, usb2phy_ac, _, _, _, _, _, _, _, _),
	[86] = PINGROUP(86, _, _, _, _, _, _, _, _, _),
	[87] = PINGROUP(87, _, _, _, _, _, _, _, _, _),
	[88] = PINGROUP(88, pcie0_clkreqn, _, _, _, _, _, _, _, _),
	[89] = PINGROUP(89, _, _, _, _, _, _, _, _, _),
	[90] = PINGROUP(90, _, _, _, _, _, _, _, _, _),
	[91] = PINGROUP(91, _, _, _, _, _, _, _, _, _),
	[92] = PINGROUP(92, _, _, _, _, _, _, _, _, _),
	[93] = PINGROUP(93, cam_mclk, cci_async, _, _, _, _, _, _, _),
	[94] = PINGROUP(94, lpass_slimbus, _, _, _, _, _, _, _, _),
	[95] = PINGROUP(95, lpass_slimbus, _, _, _, _, _, _, _, _),
	[96] = PINGROUP(96, pri_mi2s, _, _, _, _, _, _, _, _),
	[97] = PINGROUP(97, mi2s0_sck, _, _, _, _, _, _, _, _),
	[98] = PINGROUP(98, mi2s0_data0, _, _, _, _, _, _, _, _),
	[99] = PINGROUP(99, mi2s0_data1, _, _, _, _, _, _, _, _),
	[100] = PINGROUP(100, mi2s0_ws, _, vsense_trigger, _, _, _, _, _, _),
	[101] = PINGROUP(101, mi2s2_sck, _, qdss, _, _, _, _, _, _),
	[102] = PINGROUP(102, mi2s2_data0, _, _, qdss, _, _, _, _, _),
	[103] = PINGROUP(103, mi2s2_ws, vfr_1, _, _, qdss, _, atest_usb03, _, _),
	[104] = PINGROUP(104, mi2s2_data1, _, _, qdss, _, atest_usb02, _, _, _),
	[105] = PINGROUP(105, sec_mi2s, mi2s1_data1, audio_ref, gcc_gp1, _, qdss,
			 atest_usb01, _, _),
	[106] = PINGROUP(106, mi2s1_sck, gcc_gp2, _, qdss, atest_usb00, _, _, _, _),
	[107] = PINGROUP(107, mi2s1_data0, gcc_gp3, _, qdss, atest_usb0, _, _, _, _),
	[108] = PINGROUP(108, mi2s1_ws, _, qdss, _, _, _, _, _, _),
	[109] = PINGROUP(109, uim1_data, _, _, _, _, _, _, _, _),
	[110] = PINGROUP(110, uim1_clk, _, _, _, _, _, _, _, _),
	[111] = PINGROUP(111, uim1_reset, _, _, _, _, _, _, _, _),
	[112] = PINGROUP(112, uim1_present, _, _, _, _, _, _, _, _),
	[113] = PINGROUP(113, uim0_data, _, _, _, _, _, _, _, _),
	[114] = PINGROUP(114, uim0_clk, _, _, _, _, _, _, _, _),
	[115] = PINGROUP(115, uim0_reset, _, _, _, _, _, _, _, _),
	[116] = PINGROUP(116, uim0_present, _, _, _, _, _, _, _, _),
	[117] = PINGROUP(117, _, mss_grfc0, cmu_rng3, phase_flag, _, _, _, _, _),
	[118] = PINGROUP(118, _, mss_grfc1, cmu_rng2, phase_flag, _, _, _, _, _),
	[119] = PINGROUP(119, _, mss_grfc2, cmu_rng1, phase_flag, _, _, _, _, _),
	[120] = PINGROUP(120, _, mss_grfc3, cmu_rng0, phase_flag, _, _, _, _, _),
	[121] = PINGROUP(121, _, mss_grfc4, cri_trng0, phase_flag, _, _, _, _, _),
	[122] = PINGROUP(122, _, mss_grfc5, cri_trng1, phase_flag, _, _, _, _, _),
	[123] = PINGROUP(123, _, mss_grfc6, prng_rosc, phase_flag, _, _, _, _, _),
	[124] = PINGROUP(124, _, mss_grfc7, cri_trng, phase_flag, _, _, _, _, _),
	[125] = PINGROUP(125, _, mss_grfc8, phase_flag, _, _, _, _, _, _),
	[126] = PINGROUP(126, _, mss_grfc9, phase_flag, _, _, _, _, _, _),
	[127] = PINGROUP(127, coex_uart1, mss_grfc10, phase_flag, _, _, _, _, _, _),
	[128] = PINGROUP(128, coex_uart1, mss_grfc11, phase_flag, _, _, _, _, _, _),
	[129] = PINGROUP(129, nav_gpio0, phase_flag, _, _, _, _, _, _, _),
	[130] = PINGROUP(130, nav_gpio1, phase_flag, _, _, _, _, _, _, _),
	[131] = PINGROUP(131, mss_grfc12, nav_gpio2, pa_indicator, phase_flag, _, _, _, _, _),
	[132] = PINGROUP(132, mss_grfc0, phase_flag, _, _, _, _, _, _, _),
	[133] = PINGROUP(133, qlink0_request, _, _, _, _, _, _, _, _),
	[134] = PINGROUP(134, qlink0_enable, _, _, _, _, _, _, _, _),
	[135] = PINGROUP(135, qlink0_wmss, _, _, _, _, _, _, _, _),
	[136] = PINGROUP(136, qlink1_request, _, _, _, _, _, _, _, _),
	[137] = PINGROUP(137, qlink1_enable, _, _, _, _, _, _, _, _),
	[138] = PINGROUP(138, qlink1_wmss, _, _, _, _, _, _, _, _),
	[139] = PINGROUP(139, _, _, _, _, _, _, _, _, _),
	[140] = PINGROUP(140, usb_phy, pll_clk, _, _, _, _, _, _, _),
	[141] = PINGROUP(141, _, _, _, _, _, _, _, _, _),
	[142] = PINGROUP(142, _, _, _, _, _, _, _, _, _),
	[143] = PINGROUP(143, _, _, _, _, _, _, _, _, _),
	[144] = PINGROUP(144, _, _, _, _, _, _, _, _, egpio),
	[145] = PINGROUP(145, _, _, _, _, _, _, _, _, egpio),
	[146] = PINGROUP(146, _, _, _, _, _, _, _, _, egpio),
	[147] = PINGROUP(147, _, _, _, _, _, _, _, _, egpio),
	[148] = PINGROUP(148, _, _, _, _, _, _, _, _, egpio),
	[149] = PINGROUP(149, _, _, _, _, _, _, _, _, egpio),
	[150] = PINGROUP(150, qdss, _, _, _, _, _, _, _, egpio),
	[151] = PINGROUP(151, qdss, _, _, _, _, _, _, _, egpio),
	[152] = PINGROUP(152, qdss, _, _, _, _, _, _, _, egpio),
	[153] = PINGROUP(153, qdss, _, _, _, _, _, _, _, egpio),
	[154] = PINGROUP(154, _, _, _, _, _, _, _, _, egpio),
	[155] = PINGROUP(155, _, _, _, _, _, _, _, _, egpio),
	[156] = PINGROUP(156, qdss_cti, _, _, _, _, _, _, _, egpio),
	[157] = PINGROUP(157, qdss_cti, _, _, _, _, _, _, _, egpio),
	[158] = PINGROUP(158, _, _, _, _, _, _, _, _, egpio),
	[159] = PINGROUP(159, _, _, _, _, _, _, _, _, egpio),
	[160] = PINGROUP(160, _, _, _, _, _, _, _, _, egpio),
	[161] = PINGROUP(161, _, _, _, _, _, _, _, _, egpio),
	[162] = PINGROUP(162, _, _, _, _, _, _, _, _, egpio),
	[163] = PINGROUP(163, _, _, _, _, _, _, _, _, egpio),
	[164] = PINGROUP(164, _, _, _, _, _, _, _, _, egpio),
	[165] = PINGROUP(165, qdss_cti, _, _, _, _, _, _, _, egpio),
	[166] = PINGROUP(166, qdss_cti, _, _, _, _, _, _, _, egpio),
	[167] = PINGROUP(167, _, _, _, _, _, _, _, _, egpio),
	[168] = PINGROUP(168, _, _, _, _, _, _, _, _, egpio),
	[169] = PINGROUP(169, _, _, _, _, _, _, _, _, egpio),
	[170] = PINGROUP(170, _, _, _, _, _, _, _, _, egpio),
	[171] = PINGROUP(171, qdss, _, _, _, _, _, _, _, egpio),
	[172] = PINGROUP(172, qdss, _, _, _, _, _, _, _, egpio),
	[173] = PINGROUP(173, qdss, _, _, _, _, _, _, _, egpio),
	[174] = PINGROUP(174, qdss, _, _, _, _, _, _, _, egpio),
};

static const struct msm_special_pin_data sc7280_special_pins_data[] = {
	[0] = UFS_RESET("ufs_reset", 0xbe000),
	[1] = SDC_PINGROUP("sdc1_rclk", 0xb3004, 0, 6),
	[2] = SDC_PINGROUP("sdc1_clk", 0xb3000, 13, 6),
	[3] = SDC_PINGROUP("sdc1_cmd", 0xb3000, 11, 3),
	[4] = SDC_PINGROUP("sdc1_data", 0xb3000, 9, 0),
	[5] = SDC_PINGROUP("sdc2_clk", 0xb4000, 14, 6),
	[6] = SDC_PINGROUP("sdc2_cmd", 0xb4000, 11, 3),
	[7] = SDC_PINGROUP("sdc2_data", 0xb4000, 9, 0),
};

static const char *sc7280_get_function_name(struct udevice *dev, unsigned int selector)
{
	return msm_pinctrl_functions[selector].name;
}

static const char *sc7280_get_pin_name(struct udevice *dev, unsigned int selector)
{
	if (selector >= 175 && selector <= 182)
		snprintf(pin_name, MAX_PIN_NAME_LEN,
			 sc7280_special_pins_data[selector - 175].name);
	else
		snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector);

	return pin_name;
}

static int sc7280_get_function_mux(__maybe_unused unsigned int pin, unsigned int selector)
{
	unsigned int i;
	const msm_pin_function *func = NULL;

	if (pin >= ARRAY_SIZE(sc7280_pin_functions))
		return -EINVAL;

	func = sc7280_pin_functions + pin;
	for (i = 0; i < 10; i++)
		if ((*func)[i] == selector)
			return i;

	pr_err("Can't find requested function for pin %u pin\n", pin);

	return -EINVAL;
}

static struct msm_pinctrl_data sc7280_data = {
	.pin_data = {
		.pin_count = 183,
		.special_pins_start = 175,
		.special_pins_data = sc7280_special_pins_data,
	},
	.functions_count = ARRAY_SIZE(msm_pinctrl_functions),
	.get_function_name = sc7280_get_function_name,
	.get_function_mux = sc7280_get_function_mux,
	.get_pin_name = sc7280_get_pin_name,
};

static const struct udevice_id msm_pinctrl_ids[] = {
	{
		.compatible = "qcom,sc7280-pinctrl",
		.data = (ulong)&sc7280_data
	},
	{ /* Sentinel */ } };

U_BOOT_DRIVER(pinctrl_sc7280) = {
	.name = "pinctrl_sc7280",
	.id = UCLASS_NOP,
	.of_match = msm_pinctrl_ids,
	.ops = &msm_pinctrl_ops,
	.bind = msm_pinctrl_bind,
};