// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
 * Copyright (c) 2026 Yixun Lan <dlan@kernel.org>
 */

#include <dt-bindings/gpio/gpio.h>

#define K3_PADCONF(pin, func) (((pin) << 16) | (func))

/* Map GPIO pin to each bank's <index, offset> */
#define K3_GPIO(x)	(x / 32) (x % 32)

&pinctrl {
	gmac0_rgmii_0_cfg: gmac0-rgmii-0-cfg {
		gmac0-rgmii-0-pins {
			pinmux = <K3_PADCONF(0, 1)>,	/* gmac0_rxdv */
				 <K3_PADCONF(1, 1)>,	/* gmac0_rx_d0 */
				 <K3_PADCONF(2, 1)>,	/* gmac0_rx_d1 */
				 <K3_PADCONF(3, 1)>,	/* gmac0_rx_clk */
				 <K3_PADCONF(4, 1)>,	/* gmac0_rx_d2 */
				 <K3_PADCONF(5, 1)>,	/* gmac0_rx_d3 */
				 <K3_PADCONF(6, 1)>,	/* gmac0_tx_d0 */
				 <K3_PADCONF(7, 1)>,	/* gmac0_tx_d1 */
				 <K3_PADCONF(8, 1)>,	/* gmac0_tx_clk */
				 <K3_PADCONF(9, 1)>,	/* gmac0_tx_d2 */
				 <K3_PADCONF(10, 1)>,	/* gmac0_tx_d3 */
				 <K3_PADCONF(11, 1)>,	/* gmac0_tx_en */
				 <K3_PADCONF(12, 1)>,	/* gmac0_mdc */
				 <K3_PADCONF(13, 1)>;	/* gmac0_mdio */

			bias-disable;
			drive-strength = <25>;
			power-source = <1800>;
		};

	};

	gmac0_phy_0_cfg: gmac0-phy-0-cfg {
		gmac0-phy-0-pins {
			pinmux = <K3_PADCONF(14, 1)>;   /* gmac0_int */

			bias-disable;
			drive-strength = <25>;
			power-source = <1800>;
		};
	};

	/omit-if-no-ref/
	i2c8_cfg: i2c8-cfg {
		i2c8-pins {
			pinmux = <K3_PADCONF(128, 0)>,	/* i2c8 scl */
				 <K3_PADCONF(129, 0)>;	/* i2c8 sda */

			bias-pull-up = <0>;
			drive-strength = <25>;
		};
	};

	/omit-if-no-ref/
	uart0_0_cfg: uart0-0-cfg {
		uart0-0-pins {
			pinmux = <K3_PADCONF(149, 2)>,	/* uart0 tx */
				 <K3_PADCONF(150, 2)>;	/* uart0 rx */

			bias-pull-up = <0>;
			drive-strength = <25>;
		};
	};
};