diff options
| author | tyustli <[email protected]> | 2024-08-27 14:16:03 +0800 |
|---|---|---|
| committer | sakumisu <[email protected]> | 2024-08-29 09:43:11 +0800 |
| commit | 0d561ea31322d128bc601f2d2746183e9462d887 (patch) | |
| tree | cee5b25f78e869e577b174befe14c1313cd48b05 | |
| parent | e603389638e6399a25015a470d8b02281781f531 (diff) | |
Update usb_dc_dwc2.c
According to DS, the status register is W1C, |= will read the register first, write 1 to the corresponding bit, then write the register, if there is more than one status, it will be cleared by mistake. I'm not sure if other IP dcd's have the same problem?
| -rw-r--r-- | port/dwc2/usb_dc_dwc2.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/port/dwc2/usb_dc_dwc2.c b/port/dwc2/usb_dc_dwc2.c index ce951623..102b4c88 100644 --- a/port/dwc2/usb_dc_dwc2.c +++ b/port/dwc2/usb_dc_dwc2.c @@ -1111,7 +1111,7 @@ void USBD_IRQHandler(uint8_t busid) } } if (gint_status & USB_OTG_GINTSTS_USBRST) { - USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_USBRST; + USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_USBRST; USB_OTG_DEV->DCTL &= ~USB_OTG_DCTL_RWUSIG; dwc2_flush_txfifo(busid, 0x10U); @@ -1202,14 +1202,14 @@ void USBD_IRQHandler(uint8_t busid) } if (gint_status & USB_OTG_GINTSTS_SOF) { - USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_SOF; + USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_SOF; } if (gint_status & USB_OTG_GINTSTS_USBSUSP) { - USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_USBSUSP; + USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_USBSUSP; usbd_event_suspend_handler(busid); } if (gint_status & USB_OTG_GINTSTS_WKUINT) { - USB_OTG_GLB->GINTSTS |= USB_OTG_GINTSTS_WKUINT; + USB_OTG_GLB->GINTSTS = USB_OTG_GINTSTS_WKUINT; usbd_event_resume_handler(busid); } if (gint_status & USB_OTG_GINTSTS_OTGINT) { |