diff options
| author | sakumisu <[email protected]> | 2022-07-24 14:36:34 +0800 |
|---|---|---|
| committer | sakumisu <[email protected]> | 2022-07-24 14:36:34 +0800 |
| commit | 120f994ee3b6d892eda154f2053818fbcfb3fc92 (patch) | |
| tree | c377f413438cf6ac1c24ed6ed5033a7b529291af | |
| parent | 9a46c6c663a1ad812a97824688f8f8fe258e4f25 (diff) | |
fix spelling
| -rw-r--r-- | port/musb/usb_dc_musb.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/port/musb/usb_dc_musb.c b/port/musb/usb_dc_musb.c index 6b808668..81452ca6 100644 --- a/port/musb/usb_dc_musb.c +++ b/port/musb/usb_dc_musb.c @@ -489,7 +489,7 @@ int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint } if (!data_len) { - if (ep == 0x00) { + if (ep_idx == 0x00) { HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) = USB_CSRL0_TXRDY; } else { HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) = USB_TXCSRL1_TXRDY; @@ -505,7 +505,7 @@ int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint musb_write_packet(ep_idx, (uint8_t *)data, data_len); - if (ep == 0x00) { + if (ep_idx == 0x00) { HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) = USB_CSRL0_TXRDY; } else { HWREGB(USB_BASE + MUSB_IND_TXCSRL_OFFSET) = USB_TXCSRL1_TXRDY; |