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authorLiPeng <[email protected]>2025-06-04 15:45:34 +0800
committersakumisu <[email protected]>2025-06-04 16:11:32 +0800
commit1feaed024e0321ecfd374277034cfeeec5113177 (patch)
tree0454a4b2c83e7d07cfb9df0473a8906b940a9956
parent88cbed98070304eef0e09c50983518a2b0cd6733 (diff)
Fix esp32-p4 cache operation adaptation issue
-rw-r--r--CMakeLists.txt4
-rw-r--r--osal/idf/usb_config.h8
2 files changed, 5 insertions, 7 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 39118455..be61060b 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1,6 +1,6 @@
cmake_minimum_required(VERSION 3.15)
-if(CONFIG_CHERRYUSB)
+if(CONFIG_CHERRYUSB OR ESP_PLATFORM)
if(BL_SDK_BASE)
message(STATUS "enable cherryusb in bouffalo_sdk")
@@ -71,7 +71,7 @@ elseif(ESP_PLATFORM)
${cherryusb_incs}
${freertos_include}
PRIV_REQUIRES
- usb
+ usb esp_mm
LDFRAGMENTS
${ldfragments}
)
diff --git a/osal/idf/usb_config.h b/osal/idf/usb_config.h
index d7cc5885..742600fb 100644
--- a/osal/idf/usb_config.h
+++ b/osal/idf/usb_config.h
@@ -8,6 +8,7 @@
#include "sdkconfig.h"
#include "esp_rom_sys.h"
+#include "esp_attr.h"
/* ================ USB common Configuration ================ */
@@ -28,7 +29,7 @@
// #define CONFIG_USB_DCACHE_ENABLE
/* attribute data into no cache ram */
-#define USB_NOCACHE_RAM_SECTION
+#define USB_NOCACHE_RAM_SECTION DRAM_DMA_ALIGNED_ATTR
/* use usb_memcpy default for high performance but cost more flash memory.
* And, arm libc has a bug that memcpy() may cause data misalignment when the size is not a multiple of 4.
@@ -340,9 +341,6 @@
#define CONFIG_USB_DCACHE_ENABLE
#undef CONFIG_USB_ALIGN_SIZE
-#define CONFIG_USB_ALIGN_SIZE 32
+#define CONFIG_USB_ALIGN_SIZE CONFIG_CACHE_L1_CACHE_LINE_SIZE
-void usb_dcache_clean(uintptr_t addr, uint32_t size);
-void usb_dcache_invalidate(uintptr_t addr, uint32_t size);
-void usb_dcache_flush(uintptr_t addr, uint32_t size);
#endif \ No newline at end of file